1 /* 2 * Copyright (c) 2010-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/dma-mapping.h> 18 #include <linux/slab.h> 19 20 #include "ath9k.h" 21 #include "mci.h" 22 23 static const u8 ath_mci_duty_cycle[] = { 0, 50, 60, 70, 80, 85, 90, 95, 98 }; 24 25 static struct ath_mci_profile_info* 26 ath_mci_find_profile(struct ath_mci_profile *mci, 27 struct ath_mci_profile_info *info) 28 { 29 struct ath_mci_profile_info *entry; 30 31 list_for_each_entry(entry, &mci->info, list) { 32 if (entry->conn_handle == info->conn_handle) 33 break; 34 } 35 return entry; 36 } 37 38 static bool ath_mci_add_profile(struct ath_common *common, 39 struct ath_mci_profile *mci, 40 struct ath_mci_profile_info *info) 41 { 42 struct ath_mci_profile_info *entry; 43 44 if ((mci->num_sco == ATH_MCI_MAX_SCO_PROFILE) && 45 (info->type == MCI_GPM_COEX_PROFILE_VOICE)) { 46 ath_dbg(common, MCI, 47 "Too many SCO profile, failed to add new profile\n"); 48 return false; 49 } 50 51 if (((NUM_PROF(mci) - mci->num_sco) == ATH_MCI_MAX_ACL_PROFILE) && 52 (info->type != MCI_GPM_COEX_PROFILE_VOICE)) { 53 ath_dbg(common, MCI, 54 "Too many ACL profile, failed to add new profile\n"); 55 return false; 56 } 57 58 entry = ath_mci_find_profile(mci, info); 59 60 if (entry) 61 memcpy(entry, info, 10); 62 else { 63 entry = kzalloc(sizeof(*entry), GFP_KERNEL); 64 if (!entry) 65 return false; 66 67 memcpy(entry, info, 10); 68 INC_PROF(mci, info); 69 list_add_tail(&info->list, &mci->info); 70 } 71 return true; 72 } 73 74 static void ath_mci_del_profile(struct ath_common *common, 75 struct ath_mci_profile *mci, 76 struct ath_mci_profile_info *info) 77 { 78 struct ath_mci_profile_info *entry; 79 80 entry = ath_mci_find_profile(mci, info); 81 82 if (!entry) { 83 ath_dbg(common, MCI, "Profile to be deleted not found\n"); 84 return; 85 } 86 DEC_PROF(mci, entry); 87 list_del(&entry->list); 88 kfree(entry); 89 } 90 91 void ath_mci_flush_profile(struct ath_mci_profile *mci) 92 { 93 struct ath_mci_profile_info *info, *tinfo; 94 95 list_for_each_entry_safe(info, tinfo, &mci->info, list) { 96 list_del(&info->list); 97 DEC_PROF(mci, info); 98 kfree(info); 99 } 100 mci->aggr_limit = 0; 101 } 102 103 static void ath_mci_adjust_aggr_limit(struct ath_btcoex *btcoex) 104 { 105 struct ath_mci_profile *mci = &btcoex->mci; 106 u32 wlan_airtime = btcoex->btcoex_period * 107 (100 - btcoex->duty_cycle) / 100; 108 109 /* 110 * Scale: wlan_airtime is in ms, aggr_limit is in 0.25 ms. 111 * When wlan_airtime is less than 4ms, aggregation limit has to be 112 * adjusted half of wlan_airtime to ensure that the aggregation can fit 113 * without collision with BT traffic. 114 */ 115 if ((wlan_airtime <= 4) && 116 (!mci->aggr_limit || (mci->aggr_limit > (2 * wlan_airtime)))) 117 mci->aggr_limit = 2 * wlan_airtime; 118 } 119 120 static void ath_mci_update_scheme(struct ath_softc *sc) 121 { 122 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 123 struct ath_btcoex *btcoex = &sc->btcoex; 124 struct ath_mci_profile *mci = &btcoex->mci; 125 struct ath_mci_profile_info *info; 126 u32 num_profile = NUM_PROF(mci); 127 128 if (num_profile == 1) { 129 info = list_first_entry(&mci->info, 130 struct ath_mci_profile_info, 131 list); 132 if (mci->num_sco && info->T == 12) { 133 mci->aggr_limit = 8; 134 ath_dbg(common, MCI, 135 "Single SCO, aggregation limit 2 ms\n"); 136 } else if ((info->type == MCI_GPM_COEX_PROFILE_BNEP) && 137 !info->master) { 138 btcoex->btcoex_period = 60; 139 ath_dbg(common, MCI, 140 "Single slave PAN/FTP, bt period 60 ms\n"); 141 } else if ((info->type == MCI_GPM_COEX_PROFILE_HID) && 142 (info->T > 0 && info->T < 50) && 143 (info->A > 1 || info->W > 1)) { 144 btcoex->duty_cycle = 30; 145 mci->aggr_limit = 8; 146 ath_dbg(common, MCI, 147 "Multiple attempt/timeout single HID " 148 "aggregation limit 2 ms dutycycle 30%%\n"); 149 } 150 } else if ((num_profile == 2) && (mci->num_hid == 2)) { 151 btcoex->duty_cycle = 30; 152 mci->aggr_limit = 8; 153 ath_dbg(common, MCI, 154 "Two HIDs aggregation limit 2 ms dutycycle 30%%\n"); 155 } else if (num_profile > 3) { 156 mci->aggr_limit = 6; 157 ath_dbg(common, MCI, 158 "Three or more profiles aggregation limit 1.5 ms\n"); 159 } 160 161 if (IS_CHAN_2GHZ(sc->sc_ah->curchan)) { 162 if (IS_CHAN_HT(sc->sc_ah->curchan)) 163 ath_mci_adjust_aggr_limit(btcoex); 164 else 165 btcoex->btcoex_period >>= 1; 166 } 167 168 ath9k_hw_btcoex_disable(sc->sc_ah); 169 ath9k_btcoex_timer_pause(sc); 170 171 if (IS_CHAN_5GHZ(sc->sc_ah->curchan)) 172 return; 173 174 btcoex->duty_cycle += (mci->num_bdr ? ATH_MCI_MAX_DUTY_CYCLE : 0); 175 if (btcoex->duty_cycle > ATH_MCI_MAX_DUTY_CYCLE) 176 btcoex->duty_cycle = ATH_MCI_MAX_DUTY_CYCLE; 177 178 btcoex->btcoex_period *= 1000; 179 btcoex->btcoex_no_stomp = btcoex->btcoex_period * 180 (100 - btcoex->duty_cycle) / 100; 181 182 ath9k_hw_btcoex_enable(sc->sc_ah); 183 ath9k_btcoex_timer_resume(sc); 184 } 185 186 187 static void ath_mci_cal_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload) 188 { 189 struct ath_hw *ah = sc->sc_ah; 190 struct ath_common *common = ath9k_hw_common(ah); 191 u32 payload[4] = {0, 0, 0, 0}; 192 193 switch (opcode) { 194 case MCI_GPM_BT_CAL_REQ: 195 196 ath_dbg(common, MCI, "MCI received BT_CAL_REQ\n"); 197 198 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) { 199 ar9003_mci_state(ah, MCI_STATE_SET_BT_CAL_START, NULL); 200 ieee80211_queue_work(sc->hw, &sc->hw_reset_work); 201 } else 202 ath_dbg(common, MCI, "MCI State mismatches: %d\n", 203 ar9003_mci_state(ah, MCI_STATE_BT, NULL)); 204 205 break; 206 207 case MCI_GPM_BT_CAL_DONE: 208 209 ath_dbg(common, MCI, "MCI received BT_CAL_DONE\n"); 210 211 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_CAL) 212 ath_dbg(common, MCI, "MCI error illegal!\n"); 213 else 214 ath_dbg(common, MCI, "MCI BT not in CAL state\n"); 215 216 break; 217 218 case MCI_GPM_BT_CAL_GRANT: 219 220 ath_dbg(common, MCI, "MCI received BT_CAL_GRANT\n"); 221 222 /* Send WLAN_CAL_DONE for now */ 223 ath_dbg(common, MCI, "MCI send WLAN_CAL_DONE\n"); 224 MCI_GPM_SET_CAL_TYPE(payload, MCI_GPM_WLAN_CAL_DONE); 225 ar9003_mci_send_message(sc->sc_ah, MCI_GPM, 0, payload, 226 16, false, true); 227 break; 228 229 default: 230 ath_dbg(common, MCI, "MCI Unknown GPM CAL message\n"); 231 break; 232 } 233 } 234 235 static void ath_mci_process_profile(struct ath_softc *sc, 236 struct ath_mci_profile_info *info) 237 { 238 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 239 struct ath_btcoex *btcoex = &sc->btcoex; 240 struct ath_mci_profile *mci = &btcoex->mci; 241 242 if (info->start) { 243 if (!ath_mci_add_profile(common, mci, info)) 244 return; 245 } else 246 ath_mci_del_profile(common, mci, info); 247 248 btcoex->btcoex_period = ATH_MCI_DEF_BT_PERIOD; 249 mci->aggr_limit = mci->num_sco ? 6 : 0; 250 if (NUM_PROF(mci)) { 251 btcoex->bt_stomp_type = ATH_BTCOEX_STOMP_LOW; 252 btcoex->duty_cycle = ath_mci_duty_cycle[NUM_PROF(mci)]; 253 } else { 254 btcoex->bt_stomp_type = mci->num_mgmt ? ATH_BTCOEX_STOMP_ALL : 255 ATH_BTCOEX_STOMP_LOW; 256 btcoex->duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE; 257 } 258 259 ath_mci_update_scheme(sc); 260 } 261 262 static void ath_mci_process_status(struct ath_softc *sc, 263 struct ath_mci_profile_status *status) 264 { 265 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 266 struct ath_btcoex *btcoex = &sc->btcoex; 267 struct ath_mci_profile *mci = &btcoex->mci; 268 struct ath_mci_profile_info info; 269 int i = 0, old_num_mgmt = mci->num_mgmt; 270 271 /* Link status type are not handled */ 272 if (status->is_link) { 273 ath_dbg(common, MCI, "Skip link type status update\n"); 274 return; 275 } 276 277 memset(&info, 0, sizeof(struct ath_mci_profile_info)); 278 279 info.conn_handle = status->conn_handle; 280 if (ath_mci_find_profile(mci, &info)) { 281 ath_dbg(common, MCI, 282 "Skip non link state update for existing profile %d\n", 283 status->conn_handle); 284 return; 285 } 286 if (status->conn_handle >= ATH_MCI_MAX_PROFILE) { 287 ath_dbg(common, MCI, "Ignore too many non-link update\n"); 288 return; 289 } 290 if (status->is_critical) 291 __set_bit(status->conn_handle, mci->status); 292 else 293 __clear_bit(status->conn_handle, mci->status); 294 295 mci->num_mgmt = 0; 296 do { 297 if (test_bit(i, mci->status)) 298 mci->num_mgmt++; 299 } while (++i < ATH_MCI_MAX_PROFILE); 300 301 if (old_num_mgmt != mci->num_mgmt) 302 ath_mci_update_scheme(sc); 303 } 304 305 static void ath_mci_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload) 306 { 307 struct ath_hw *ah = sc->sc_ah; 308 struct ath_mci_profile_info profile_info; 309 struct ath_mci_profile_status profile_status; 310 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 311 u32 version; 312 u8 major; 313 u8 minor; 314 u32 seq_num; 315 316 switch (opcode) { 317 318 case MCI_GPM_COEX_VERSION_QUERY: 319 ath_dbg(common, MCI, "MCI Recv GPM COEX Version Query\n"); 320 version = ar9003_mci_state(ah, 321 MCI_STATE_SEND_WLAN_COEX_VERSION, NULL); 322 break; 323 324 case MCI_GPM_COEX_VERSION_RESPONSE: 325 ath_dbg(common, MCI, "MCI Recv GPM COEX Version Response\n"); 326 major = *(rx_payload + MCI_GPM_COEX_B_MAJOR_VERSION); 327 minor = *(rx_payload + MCI_GPM_COEX_B_MINOR_VERSION); 328 ath_dbg(common, MCI, "MCI BT Coex version: %d.%d\n", 329 major, minor); 330 version = (major << 8) + minor; 331 version = ar9003_mci_state(ah, 332 MCI_STATE_SET_BT_COEX_VERSION, &version); 333 break; 334 335 case MCI_GPM_COEX_STATUS_QUERY: 336 ath_dbg(common, MCI, 337 "MCI Recv GPM COEX Status Query = 0x%02x\n", 338 *(rx_payload + MCI_GPM_COEX_B_WLAN_BITMAP)); 339 ar9003_mci_state(ah, 340 MCI_STATE_SEND_WLAN_CHANNELS, NULL); 341 break; 342 343 case MCI_GPM_COEX_BT_PROFILE_INFO: 344 ath_dbg(common, MCI, "MCI Recv GPM Coex BT profile info\n"); 345 memcpy(&profile_info, 346 (rx_payload + MCI_GPM_COEX_B_PROFILE_TYPE), 10); 347 348 if ((profile_info.type == MCI_GPM_COEX_PROFILE_UNKNOWN) 349 || (profile_info.type >= 350 MCI_GPM_COEX_PROFILE_MAX)) { 351 352 ath_dbg(common, MCI, 353 "illegal profile type = %d, state = %d\n", 354 profile_info.type, 355 profile_info.start); 356 break; 357 } 358 359 ath_mci_process_profile(sc, &profile_info); 360 break; 361 362 case MCI_GPM_COEX_BT_STATUS_UPDATE: 363 profile_status.is_link = *(rx_payload + 364 MCI_GPM_COEX_B_STATUS_TYPE); 365 profile_status.conn_handle = *(rx_payload + 366 MCI_GPM_COEX_B_STATUS_LINKID); 367 profile_status.is_critical = *(rx_payload + 368 MCI_GPM_COEX_B_STATUS_STATE); 369 370 seq_num = *((u32 *)(rx_payload + 12)); 371 ath_dbg(common, MCI, 372 "MCI Recv GPM COEX BT_Status_Update: is_link=%d, linkId=%d, state=%d, SEQ=%d\n", 373 profile_status.is_link, profile_status.conn_handle, 374 profile_status.is_critical, seq_num); 375 376 ath_mci_process_status(sc, &profile_status); 377 break; 378 379 default: 380 ath_dbg(common, MCI, "MCI Unknown GPM COEX message = 0x%02x\n", 381 opcode); 382 break; 383 } 384 } 385 386 static int ath_mci_buf_alloc(struct ath_softc *sc, struct ath_mci_buf *buf) 387 { 388 int error = 0; 389 390 buf->bf_addr = dma_alloc_coherent(sc->dev, buf->bf_len, 391 &buf->bf_paddr, GFP_KERNEL); 392 393 if (buf->bf_addr == NULL) { 394 error = -ENOMEM; 395 goto fail; 396 } 397 398 return 0; 399 400 fail: 401 memset(buf, 0, sizeof(*buf)); 402 return error; 403 } 404 405 static void ath_mci_buf_free(struct ath_softc *sc, struct ath_mci_buf *buf) 406 { 407 if (buf->bf_addr) { 408 dma_free_coherent(sc->dev, buf->bf_len, buf->bf_addr, 409 buf->bf_paddr); 410 memset(buf, 0, sizeof(*buf)); 411 } 412 } 413 414 int ath_mci_setup(struct ath_softc *sc) 415 { 416 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 417 struct ath_mci_coex *mci = &sc->mci_coex; 418 int error = 0; 419 420 if (!ATH9K_HW_CAP_MCI) 421 return 0; 422 423 mci->sched_buf.bf_len = ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE; 424 425 if (ath_mci_buf_alloc(sc, &mci->sched_buf)) { 426 ath_dbg(common, FATAL, "MCI buffer alloc failed\n"); 427 error = -ENOMEM; 428 goto fail; 429 } 430 431 mci->sched_buf.bf_len = ATH_MCI_SCHED_BUF_SIZE; 432 433 memset(mci->sched_buf.bf_addr, MCI_GPM_RSVD_PATTERN, 434 mci->sched_buf.bf_len); 435 436 mci->gpm_buf.bf_len = ATH_MCI_GPM_BUF_SIZE; 437 mci->gpm_buf.bf_addr = (u8 *)mci->sched_buf.bf_addr + 438 mci->sched_buf.bf_len; 439 mci->gpm_buf.bf_paddr = mci->sched_buf.bf_paddr + mci->sched_buf.bf_len; 440 441 /* initialize the buffer */ 442 memset(mci->gpm_buf.bf_addr, MCI_GPM_RSVD_PATTERN, mci->gpm_buf.bf_len); 443 444 ar9003_mci_setup(sc->sc_ah, mci->gpm_buf.bf_paddr, 445 mci->gpm_buf.bf_addr, (mci->gpm_buf.bf_len >> 4), 446 mci->sched_buf.bf_paddr); 447 fail: 448 return error; 449 } 450 451 void ath_mci_cleanup(struct ath_softc *sc) 452 { 453 struct ath_hw *ah = sc->sc_ah; 454 struct ath_mci_coex *mci = &sc->mci_coex; 455 456 if (!ATH9K_HW_CAP_MCI) 457 return; 458 459 /* 460 * both schedule and gpm buffers will be released 461 */ 462 ath_mci_buf_free(sc, &mci->sched_buf); 463 ar9003_mci_cleanup(ah); 464 } 465 466 void ath_mci_intr(struct ath_softc *sc) 467 { 468 struct ath_mci_coex *mci = &sc->mci_coex; 469 struct ath_hw *ah = sc->sc_ah; 470 struct ath_common *common = ath9k_hw_common(ah); 471 u32 mci_int, mci_int_rxmsg; 472 u32 offset, subtype, opcode; 473 u32 *pgpm; 474 u32 more_data = MCI_GPM_MORE; 475 bool skip_gpm = false; 476 477 if (!ATH9K_HW_CAP_MCI) 478 return; 479 480 ar9003_mci_get_interrupt(sc->sc_ah, &mci_int, &mci_int_rxmsg); 481 482 if (ar9003_mci_state(ah, MCI_STATE_ENABLE, NULL) == 0) { 483 484 ar9003_mci_state(sc->sc_ah, MCI_STATE_INIT_GPM_OFFSET, NULL); 485 ath_dbg(common, MCI, "MCI interrupt but MCI disabled\n"); 486 487 ath_dbg(common, MCI, 488 "MCI interrupt: intr = 0x%x, intr_rxmsg = 0x%x\n", 489 mci_int, mci_int_rxmsg); 490 return; 491 } 492 493 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE) { 494 u32 payload[4] = { 0xffffffff, 0xffffffff, 495 0xffffffff, 0xffffff00}; 496 497 /* 498 * The following REMOTE_RESET and SYS_WAKING used to sent 499 * only when BT wake up. Now they are always sent, as a 500 * recovery method to reset BT MCI's RX alignment. 501 */ 502 ath_dbg(common, MCI, "MCI interrupt send REMOTE_RESET\n"); 503 504 ar9003_mci_send_message(ah, MCI_REMOTE_RESET, 0, 505 payload, 16, true, false); 506 ath_dbg(common, MCI, "MCI interrupt send SYS_WAKING\n"); 507 ar9003_mci_send_message(ah, MCI_SYS_WAKING, 0, 508 NULL, 0, true, false); 509 510 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE; 511 ar9003_mci_state(ah, MCI_STATE_RESET_REQ_WAKE, NULL); 512 513 /* 514 * always do this for recovery and 2G/5G toggling and LNA_TRANS 515 */ 516 ath_dbg(common, MCI, "MCI Set BT state to AWAKE\n"); 517 ar9003_mci_state(ah, MCI_STATE_SET_BT_AWAKE, NULL); 518 } 519 520 /* Processing SYS_WAKING/SYS_SLEEPING */ 521 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING) { 522 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING; 523 524 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_SLEEP) { 525 526 if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL) 527 == MCI_BT_SLEEP) 528 ath_dbg(common, MCI, 529 "MCI BT stays in sleep mode\n"); 530 else { 531 ath_dbg(common, MCI, 532 "MCI Set BT state to AWAKE\n"); 533 ar9003_mci_state(ah, 534 MCI_STATE_SET_BT_AWAKE, NULL); 535 } 536 } else 537 ath_dbg(common, MCI, "MCI BT stays in AWAKE mode\n"); 538 } 539 540 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING) { 541 542 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING; 543 544 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) { 545 546 if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL) 547 == MCI_BT_AWAKE) 548 ath_dbg(common, MCI, 549 "MCI BT stays in AWAKE mode\n"); 550 else { 551 ath_dbg(common, MCI, 552 "MCI SetBT state to SLEEP\n"); 553 ar9003_mci_state(ah, MCI_STATE_SET_BT_SLEEP, 554 NULL); 555 } 556 } else 557 ath_dbg(common, MCI, "MCI BT stays in SLEEP mode\n"); 558 } 559 560 if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) || 561 (mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT)) { 562 563 ath_dbg(common, MCI, "MCI RX broken, skip GPM msgs\n"); 564 ar9003_mci_state(ah, MCI_STATE_RECOVER_RX, NULL); 565 skip_gpm = true; 566 } 567 568 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO) { 569 570 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO; 571 offset = ar9003_mci_state(ah, MCI_STATE_LAST_SCHD_MSG_OFFSET, 572 NULL); 573 } 574 575 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_GPM) { 576 577 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_GPM; 578 579 while (more_data == MCI_GPM_MORE) { 580 581 pgpm = mci->gpm_buf.bf_addr; 582 offset = ar9003_mci_state(ah, 583 MCI_STATE_NEXT_GPM_OFFSET, &more_data); 584 585 if (offset == MCI_GPM_INVALID) 586 break; 587 588 pgpm += (offset >> 2); 589 590 /* 591 * The first dword is timer. 592 * The real data starts from 2nd dword. 593 */ 594 595 subtype = MCI_GPM_TYPE(pgpm); 596 opcode = MCI_GPM_OPCODE(pgpm); 597 598 if (!skip_gpm) { 599 600 if (MCI_GPM_IS_CAL_TYPE(subtype)) 601 ath_mci_cal_msg(sc, subtype, 602 (u8 *) pgpm); 603 else { 604 switch (subtype) { 605 case MCI_GPM_COEX_AGENT: 606 ath_mci_msg(sc, opcode, 607 (u8 *) pgpm); 608 break; 609 default: 610 break; 611 } 612 } 613 } 614 MCI_GPM_RECYCLE(pgpm); 615 } 616 } 617 618 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_HW_MSG_MASK) { 619 620 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL) 621 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL; 622 623 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_INFO) { 624 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_INFO; 625 ath_dbg(common, MCI, "MCI LNA_INFO\n"); 626 } 627 628 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_INFO) { 629 630 int value_dbm = ar9003_mci_state(ah, 631 MCI_STATE_CONT_RSSI_POWER, NULL); 632 633 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_INFO; 634 635 if (ar9003_mci_state(ah, MCI_STATE_CONT_TXRX, NULL)) 636 ath_dbg(common, MCI, 637 "MCI CONT_INFO: (tx) pri = %d, pwr = %d dBm\n", 638 ar9003_mci_state(ah, 639 MCI_STATE_CONT_PRIORITY, NULL), 640 value_dbm); 641 else 642 ath_dbg(common, MCI, 643 "MCI CONT_INFO: (rx) pri = %d,pwr = %d dBm\n", 644 ar9003_mci_state(ah, 645 MCI_STATE_CONT_PRIORITY, NULL), 646 value_dbm); 647 } 648 649 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_NACK) { 650 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_NACK; 651 ath_dbg(common, MCI, "MCI CONT_NACK\n"); 652 } 653 654 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_RST) { 655 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_RST; 656 ath_dbg(common, MCI, "MCI CONT_RST\n"); 657 } 658 } 659 660 if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) || 661 (mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT)) 662 mci_int &= ~(AR_MCI_INTERRUPT_RX_INVALID_HDR | 663 AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT); 664 665 if (mci_int_rxmsg & 0xfffffffe) 666 ath_dbg(common, MCI, "MCI not processed mci_int_rxmsg = 0x%x\n", 667 mci_int_rxmsg); 668 } 669