1 /* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/nl80211.h> 18 #include <linux/delay.h> 19 #include "ath9k.h" 20 #include "btcoex.h" 21 22 static void ath9k_set_assoc_state(struct ath_softc *sc, 23 struct ieee80211_vif *vif); 24 25 u8 ath9k_parse_mpdudensity(u8 mpdudensity) 26 { 27 /* 28 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing": 29 * 0 for no restriction 30 * 1 for 1/4 us 31 * 2 for 1/2 us 32 * 3 for 1 us 33 * 4 for 2 us 34 * 5 for 4 us 35 * 6 for 8 us 36 * 7 for 16 us 37 */ 38 switch (mpdudensity) { 39 case 0: 40 return 0; 41 case 1: 42 case 2: 43 case 3: 44 /* Our lower layer calculations limit our precision to 45 1 microsecond */ 46 return 1; 47 case 4: 48 return 2; 49 case 5: 50 return 4; 51 case 6: 52 return 8; 53 case 7: 54 return 16; 55 default: 56 return 0; 57 } 58 } 59 60 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq) 61 { 62 bool pending = false; 63 64 spin_lock_bh(&txq->axq_lock); 65 66 if (txq->axq_depth || !list_empty(&txq->axq_acq)) 67 pending = true; 68 69 spin_unlock_bh(&txq->axq_lock); 70 return pending; 71 } 72 73 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode) 74 { 75 unsigned long flags; 76 bool ret; 77 78 spin_lock_irqsave(&sc->sc_pm_lock, flags); 79 ret = ath9k_hw_setpower(sc->sc_ah, mode); 80 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 81 82 return ret; 83 } 84 85 void ath9k_ps_wakeup(struct ath_softc *sc) 86 { 87 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 88 unsigned long flags; 89 enum ath9k_power_mode power_mode; 90 91 spin_lock_irqsave(&sc->sc_pm_lock, flags); 92 if (++sc->ps_usecount != 1) 93 goto unlock; 94 95 power_mode = sc->sc_ah->power_mode; 96 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); 97 98 /* 99 * While the hardware is asleep, the cycle counters contain no 100 * useful data. Better clear them now so that they don't mess up 101 * survey data results. 102 */ 103 if (power_mode != ATH9K_PM_AWAKE) { 104 spin_lock(&common->cc_lock); 105 ath_hw_cycle_counters_update(common); 106 memset(&common->cc_survey, 0, sizeof(common->cc_survey)); 107 memset(&common->cc_ani, 0, sizeof(common->cc_ani)); 108 spin_unlock(&common->cc_lock); 109 } 110 111 unlock: 112 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 113 } 114 115 void ath9k_ps_restore(struct ath_softc *sc) 116 { 117 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 118 enum ath9k_power_mode mode; 119 unsigned long flags; 120 bool reset; 121 122 spin_lock_irqsave(&sc->sc_pm_lock, flags); 123 if (--sc->ps_usecount != 0) 124 goto unlock; 125 126 if (sc->ps_idle) { 127 ath9k_hw_setrxabort(sc->sc_ah, 1); 128 ath9k_hw_stopdmarecv(sc->sc_ah, &reset); 129 mode = ATH9K_PM_FULL_SLEEP; 130 } else if (sc->ps_enabled && 131 !(sc->ps_flags & (PS_WAIT_FOR_BEACON | 132 PS_WAIT_FOR_CAB | 133 PS_WAIT_FOR_PSPOLL_DATA | 134 PS_WAIT_FOR_TX_ACK | 135 PS_WAIT_FOR_ANI))) { 136 mode = ATH9K_PM_NETWORK_SLEEP; 137 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah)) 138 ath9k_btcoex_stop_gen_timer(sc); 139 } else { 140 goto unlock; 141 } 142 143 spin_lock(&common->cc_lock); 144 ath_hw_cycle_counters_update(common); 145 spin_unlock(&common->cc_lock); 146 147 ath9k_hw_setpower(sc->sc_ah, mode); 148 149 unlock: 150 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 151 } 152 153 static void __ath_cancel_work(struct ath_softc *sc) 154 { 155 cancel_work_sync(&sc->paprd_work); 156 cancel_work_sync(&sc->hw_check_work); 157 cancel_delayed_work_sync(&sc->tx_complete_work); 158 cancel_delayed_work_sync(&sc->hw_pll_work); 159 160 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 161 if (ath9k_hw_mci_is_enabled(sc->sc_ah)) 162 cancel_work_sync(&sc->mci_work); 163 #endif 164 } 165 166 static void ath_cancel_work(struct ath_softc *sc) 167 { 168 __ath_cancel_work(sc); 169 cancel_work_sync(&sc->hw_reset_work); 170 } 171 172 static void ath_restart_work(struct ath_softc *sc) 173 { 174 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); 175 176 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah)) 177 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, 178 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL)); 179 180 ath_start_rx_poll(sc, 3); 181 ath_start_ani(sc); 182 } 183 184 static bool ath_prepare_reset(struct ath_softc *sc) 185 { 186 struct ath_hw *ah = sc->sc_ah; 187 bool ret = true; 188 189 ieee80211_stop_queues(sc->hw); 190 191 sc->hw_busy_count = 0; 192 ath_stop_ani(sc); 193 del_timer_sync(&sc->rx_poll_timer); 194 195 ath9k_hw_disable_interrupts(ah); 196 197 if (!ath_drain_all_txq(sc)) 198 ret = false; 199 200 if (!ath_stoprecv(sc)) 201 ret = false; 202 203 return ret; 204 } 205 206 static bool ath_complete_reset(struct ath_softc *sc, bool start) 207 { 208 struct ath_hw *ah = sc->sc_ah; 209 struct ath_common *common = ath9k_hw_common(ah); 210 unsigned long flags; 211 int i; 212 213 if (ath_startrecv(sc) != 0) { 214 ath_err(common, "Unable to restart recv logic\n"); 215 return false; 216 } 217 218 ath9k_cmn_update_txpow(ah, sc->curtxpow, 219 sc->config.txpowlimit, &sc->curtxpow); 220 221 clear_bit(SC_OP_HW_RESET, &sc->sc_flags); 222 ath9k_hw_set_interrupts(ah); 223 ath9k_hw_enable_interrupts(ah); 224 225 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) { 226 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags)) 227 goto work; 228 229 if (ah->opmode == NL80211_IFTYPE_STATION && 230 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) { 231 spin_lock_irqsave(&sc->sc_pm_lock, flags); 232 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON; 233 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 234 } else { 235 ath9k_set_beacon(sc); 236 } 237 work: 238 ath_restart_work(sc); 239 240 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 241 if (!ATH_TXQ_SETUP(sc, i)) 242 continue; 243 244 spin_lock_bh(&sc->tx.txq[i].axq_lock); 245 ath_txq_schedule(sc, &sc->tx.txq[i]); 246 spin_unlock_bh(&sc->tx.txq[i].axq_lock); 247 } 248 } 249 250 ieee80211_wake_queues(sc->hw); 251 252 return true; 253 } 254 255 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan) 256 { 257 struct ath_hw *ah = sc->sc_ah; 258 struct ath_common *common = ath9k_hw_common(ah); 259 struct ath9k_hw_cal_data *caldata = NULL; 260 bool fastcc = true; 261 int r; 262 263 __ath_cancel_work(sc); 264 265 tasklet_disable(&sc->intr_tq); 266 spin_lock_bh(&sc->sc_pcu_lock); 267 268 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) { 269 fastcc = false; 270 caldata = &sc->caldata; 271 } 272 273 if (!hchan) { 274 fastcc = false; 275 hchan = ah->curchan; 276 } 277 278 if (!ath_prepare_reset(sc)) 279 fastcc = false; 280 281 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n", 282 hchan->channel, IS_CHAN_HT40(hchan), fastcc); 283 284 r = ath9k_hw_reset(ah, hchan, caldata, fastcc); 285 if (r) { 286 ath_err(common, 287 "Unable to reset channel, reset status %d\n", r); 288 289 ath9k_hw_enable_interrupts(ah); 290 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG); 291 292 goto out; 293 } 294 295 if (ath9k_hw_mci_is_enabled(sc->sc_ah) && 296 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) 297 ath9k_mci_set_txpower(sc, true, false); 298 299 if (!ath_complete_reset(sc, true)) 300 r = -EIO; 301 302 out: 303 spin_unlock_bh(&sc->sc_pcu_lock); 304 tasklet_enable(&sc->intr_tq); 305 306 return r; 307 } 308 309 310 /* 311 * Set/change channels. If the channel is really being changed, it's done 312 * by reseting the chip. To accomplish this we must first cleanup any pending 313 * DMA, then restart stuff. 314 */ 315 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, 316 struct ath9k_channel *hchan) 317 { 318 int r; 319 320 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) 321 return -EIO; 322 323 r = ath_reset_internal(sc, hchan); 324 325 return r; 326 } 327 328 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta, 329 struct ieee80211_vif *vif) 330 { 331 struct ath_node *an; 332 an = (struct ath_node *)sta->drv_priv; 333 334 an->sc = sc; 335 an->sta = sta; 336 an->vif = vif; 337 338 ath_tx_node_init(sc, an); 339 340 if (sta->ht_cap.ht_supported) { 341 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + 342 sta->ht_cap.ampdu_factor); 343 an->mpdudensity = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density); 344 } 345 } 346 347 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta) 348 { 349 struct ath_node *an = (struct ath_node *)sta->drv_priv; 350 ath_tx_node_cleanup(sc, an); 351 } 352 353 void ath9k_tasklet(unsigned long data) 354 { 355 struct ath_softc *sc = (struct ath_softc *)data; 356 struct ath_hw *ah = sc->sc_ah; 357 struct ath_common *common = ath9k_hw_common(ah); 358 enum ath_reset_type type; 359 unsigned long flags; 360 u32 status = sc->intrstatus; 361 u32 rxmask; 362 363 ath9k_ps_wakeup(sc); 364 spin_lock(&sc->sc_pcu_lock); 365 366 if ((status & ATH9K_INT_FATAL) || 367 (status & ATH9K_INT_BB_WATCHDOG)) { 368 369 if (status & ATH9K_INT_FATAL) 370 type = RESET_TYPE_FATAL_INT; 371 else 372 type = RESET_TYPE_BB_WATCHDOG; 373 374 ath9k_queue_reset(sc, type); 375 goto out; 376 } 377 378 spin_lock_irqsave(&sc->sc_pm_lock, flags); 379 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) { 380 /* 381 * TSF sync does not look correct; remain awake to sync with 382 * the next Beacon. 383 */ 384 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n"); 385 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC; 386 } 387 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 388 389 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 390 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL | 391 ATH9K_INT_RXORN); 392 else 393 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 394 395 if (status & rxmask) { 396 /* Check for high priority Rx first */ 397 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 398 (status & ATH9K_INT_RXHP)) 399 ath_rx_tasklet(sc, 0, true); 400 401 ath_rx_tasklet(sc, 0, false); 402 } 403 404 if (status & ATH9K_INT_TX) { 405 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 406 ath_tx_edma_tasklet(sc); 407 else 408 ath_tx_tasklet(sc); 409 } 410 411 ath9k_btcoex_handle_interrupt(sc, status); 412 413 out: 414 /* re-enable hardware interrupt */ 415 ath9k_hw_enable_interrupts(ah); 416 417 spin_unlock(&sc->sc_pcu_lock); 418 ath9k_ps_restore(sc); 419 } 420 421 irqreturn_t ath_isr(int irq, void *dev) 422 { 423 #define SCHED_INTR ( \ 424 ATH9K_INT_FATAL | \ 425 ATH9K_INT_BB_WATCHDOG | \ 426 ATH9K_INT_RXORN | \ 427 ATH9K_INT_RXEOL | \ 428 ATH9K_INT_RX | \ 429 ATH9K_INT_RXLP | \ 430 ATH9K_INT_RXHP | \ 431 ATH9K_INT_TX | \ 432 ATH9K_INT_BMISS | \ 433 ATH9K_INT_CST | \ 434 ATH9K_INT_TSFOOR | \ 435 ATH9K_INT_GENTIMER | \ 436 ATH9K_INT_MCI) 437 438 struct ath_softc *sc = dev; 439 struct ath_hw *ah = sc->sc_ah; 440 struct ath_common *common = ath9k_hw_common(ah); 441 enum ath9k_int status; 442 bool sched = false; 443 444 /* 445 * The hardware is not ready/present, don't 446 * touch anything. Note this can happen early 447 * on if the IRQ is shared. 448 */ 449 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) 450 return IRQ_NONE; 451 452 /* shared irq, not for us */ 453 454 if (!ath9k_hw_intrpend(ah)) 455 return IRQ_NONE; 456 457 if (test_bit(SC_OP_HW_RESET, &sc->sc_flags)) { 458 ath9k_hw_kill_interrupts(ah); 459 return IRQ_HANDLED; 460 } 461 462 /* 463 * Figure out the reason(s) for the interrupt. Note 464 * that the hal returns a pseudo-ISR that may include 465 * bits we haven't explicitly enabled so we mask the 466 * value to insure we only process bits we requested. 467 */ 468 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */ 469 status &= ah->imask; /* discard unasked-for bits */ 470 471 /* 472 * If there are no status bits set, then this interrupt was not 473 * for me (should have been caught above). 474 */ 475 if (!status) 476 return IRQ_NONE; 477 478 /* Cache the status */ 479 sc->intrstatus = status; 480 481 if (status & SCHED_INTR) 482 sched = true; 483 484 /* 485 * If a FATAL or RXORN interrupt is received, we have to reset the 486 * chip immediately. 487 */ 488 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) && 489 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA))) 490 goto chip_reset; 491 492 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 493 (status & ATH9K_INT_BB_WATCHDOG)) { 494 495 spin_lock(&common->cc_lock); 496 ath_hw_cycle_counters_update(common); 497 ar9003_hw_bb_watchdog_dbg_info(ah); 498 spin_unlock(&common->cc_lock); 499 500 goto chip_reset; 501 } 502 #ifdef CONFIG_PM_SLEEP 503 if (status & ATH9K_INT_BMISS) { 504 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) { 505 ath_dbg(common, ANY, "during WoW we got a BMISS\n"); 506 atomic_inc(&sc->wow_got_bmiss_intr); 507 atomic_dec(&sc->wow_sleep_proc_intr); 508 } 509 } 510 #endif 511 if (status & ATH9K_INT_SWBA) 512 tasklet_schedule(&sc->bcon_tasklet); 513 514 if (status & ATH9K_INT_TXURN) 515 ath9k_hw_updatetxtriglevel(ah, true); 516 517 if (status & ATH9K_INT_RXEOL) { 518 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 519 ath9k_hw_set_interrupts(ah); 520 } 521 522 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 523 if (status & ATH9K_INT_TIM_TIMER) { 524 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle)) 525 goto chip_reset; 526 /* Clear RxAbort bit so that we can 527 * receive frames */ 528 ath9k_setpower(sc, ATH9K_PM_AWAKE); 529 spin_lock(&sc->sc_pm_lock); 530 ath9k_hw_setrxabort(sc->sc_ah, 0); 531 sc->ps_flags |= PS_WAIT_FOR_BEACON; 532 spin_unlock(&sc->sc_pm_lock); 533 } 534 535 chip_reset: 536 537 ath_debug_stat_interrupt(sc, status); 538 539 if (sched) { 540 /* turn off every interrupt */ 541 ath9k_hw_disable_interrupts(ah); 542 tasklet_schedule(&sc->intr_tq); 543 } 544 545 return IRQ_HANDLED; 546 547 #undef SCHED_INTR 548 } 549 550 static int ath_reset(struct ath_softc *sc) 551 { 552 int r; 553 554 ath9k_ps_wakeup(sc); 555 r = ath_reset_internal(sc, NULL); 556 ath9k_ps_restore(sc); 557 558 return r; 559 } 560 561 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type) 562 { 563 #ifdef CONFIG_ATH9K_DEBUGFS 564 RESET_STAT_INC(sc, type); 565 #endif 566 set_bit(SC_OP_HW_RESET, &sc->sc_flags); 567 ieee80211_queue_work(sc->hw, &sc->hw_reset_work); 568 } 569 570 void ath_reset_work(struct work_struct *work) 571 { 572 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work); 573 574 ath_reset(sc); 575 } 576 577 /**********************/ 578 /* mac80211 callbacks */ 579 /**********************/ 580 581 static int ath9k_start(struct ieee80211_hw *hw) 582 { 583 struct ath_softc *sc = hw->priv; 584 struct ath_hw *ah = sc->sc_ah; 585 struct ath_common *common = ath9k_hw_common(ah); 586 struct ieee80211_channel *curchan = hw->conf.chandef.chan; 587 struct ath9k_channel *init_channel; 588 int r; 589 590 ath_dbg(common, CONFIG, 591 "Starting driver with initial channel: %d MHz\n", 592 curchan->center_freq); 593 594 ath9k_ps_wakeup(sc); 595 mutex_lock(&sc->mutex); 596 597 init_channel = ath9k_cmn_get_curchannel(hw, ah); 598 599 /* Reset SERDES registers */ 600 ath9k_hw_configpcipowersave(ah, false); 601 602 /* 603 * The basic interface to setting the hardware in a good 604 * state is ``reset''. On return the hardware is known to 605 * be powered up and with interrupts disabled. This must 606 * be followed by initialization of the appropriate bits 607 * and then setup of the interrupt mask. 608 */ 609 spin_lock_bh(&sc->sc_pcu_lock); 610 611 atomic_set(&ah->intr_ref_cnt, -1); 612 613 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false); 614 if (r) { 615 ath_err(common, 616 "Unable to reset hardware; reset status %d (freq %u MHz)\n", 617 r, curchan->center_freq); 618 ah->reset_power_on = false; 619 } 620 621 /* Setup our intr mask. */ 622 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL | 623 ATH9K_INT_RXORN | ATH9K_INT_FATAL | 624 ATH9K_INT_GLOBAL; 625 626 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 627 ah->imask |= ATH9K_INT_RXHP | 628 ATH9K_INT_RXLP | 629 ATH9K_INT_BB_WATCHDOG; 630 else 631 ah->imask |= ATH9K_INT_RX; 632 633 ah->imask |= ATH9K_INT_GTT; 634 635 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) 636 ah->imask |= ATH9K_INT_CST; 637 638 ath_mci_enable(sc); 639 640 clear_bit(SC_OP_INVALID, &sc->sc_flags); 641 sc->sc_ah->is_monitoring = false; 642 643 if (!ath_complete_reset(sc, false)) 644 ah->reset_power_on = false; 645 646 if (ah->led_pin >= 0) { 647 ath9k_hw_cfg_output(ah, ah->led_pin, 648 AR_GPIO_OUTPUT_MUX_AS_OUTPUT); 649 ath9k_hw_set_gpio(ah, ah->led_pin, 0); 650 } 651 652 /* 653 * Reset key cache to sane defaults (all entries cleared) instead of 654 * semi-random values after suspend/resume. 655 */ 656 ath9k_cmn_init_crypto(sc->sc_ah); 657 658 spin_unlock_bh(&sc->sc_pcu_lock); 659 660 mutex_unlock(&sc->mutex); 661 662 ath9k_ps_restore(sc); 663 664 return 0; 665 } 666 667 static void ath9k_tx(struct ieee80211_hw *hw, 668 struct ieee80211_tx_control *control, 669 struct sk_buff *skb) 670 { 671 struct ath_softc *sc = hw->priv; 672 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 673 struct ath_tx_control txctl; 674 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; 675 unsigned long flags; 676 677 if (sc->ps_enabled) { 678 /* 679 * mac80211 does not set PM field for normal data frames, so we 680 * need to update that based on the current PS mode. 681 */ 682 if (ieee80211_is_data(hdr->frame_control) && 683 !ieee80211_is_nullfunc(hdr->frame_control) && 684 !ieee80211_has_pm(hdr->frame_control)) { 685 ath_dbg(common, PS, 686 "Add PM=1 for a TX frame while in PS mode\n"); 687 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM); 688 } 689 } 690 691 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) { 692 /* 693 * We are using PS-Poll and mac80211 can request TX while in 694 * power save mode. Need to wake up hardware for the TX to be 695 * completed and if needed, also for RX of buffered frames. 696 */ 697 ath9k_ps_wakeup(sc); 698 spin_lock_irqsave(&sc->sc_pm_lock, flags); 699 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 700 ath9k_hw_setrxabort(sc->sc_ah, 0); 701 if (ieee80211_is_pspoll(hdr->frame_control)) { 702 ath_dbg(common, PS, 703 "Sending PS-Poll to pick a buffered frame\n"); 704 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA; 705 } else { 706 ath_dbg(common, PS, "Wake up to complete TX\n"); 707 sc->ps_flags |= PS_WAIT_FOR_TX_ACK; 708 } 709 /* 710 * The actual restore operation will happen only after 711 * the ps_flags bit is cleared. We are just dropping 712 * the ps_usecount here. 713 */ 714 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 715 ath9k_ps_restore(sc); 716 } 717 718 /* 719 * Cannot tx while the hardware is in full sleep, it first needs a full 720 * chip reset to recover from that 721 */ 722 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) { 723 ath_err(common, "TX while HW is in FULL_SLEEP mode\n"); 724 goto exit; 725 } 726 727 memset(&txctl, 0, sizeof(struct ath_tx_control)); 728 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)]; 729 txctl.sta = control->sta; 730 731 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb); 732 733 if (ath_tx_start(hw, skb, &txctl) != 0) { 734 ath_dbg(common, XMIT, "TX failed\n"); 735 TX_STAT_INC(txctl.txq->axq_qnum, txfailed); 736 goto exit; 737 } 738 739 return; 740 exit: 741 ieee80211_free_txskb(hw, skb); 742 } 743 744 static void ath9k_stop(struct ieee80211_hw *hw) 745 { 746 struct ath_softc *sc = hw->priv; 747 struct ath_hw *ah = sc->sc_ah; 748 struct ath_common *common = ath9k_hw_common(ah); 749 bool prev_idle; 750 751 mutex_lock(&sc->mutex); 752 753 ath_cancel_work(sc); 754 del_timer_sync(&sc->rx_poll_timer); 755 756 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) { 757 ath_dbg(common, ANY, "Device not present\n"); 758 mutex_unlock(&sc->mutex); 759 return; 760 } 761 762 /* Ensure HW is awake when we try to shut it down. */ 763 ath9k_ps_wakeup(sc); 764 765 spin_lock_bh(&sc->sc_pcu_lock); 766 767 /* prevent tasklets to enable interrupts once we disable them */ 768 ah->imask &= ~ATH9K_INT_GLOBAL; 769 770 /* make sure h/w will not generate any interrupt 771 * before setting the invalid flag. */ 772 ath9k_hw_disable_interrupts(ah); 773 774 spin_unlock_bh(&sc->sc_pcu_lock); 775 776 /* we can now sync irq and kill any running tasklets, since we already 777 * disabled interrupts and not holding a spin lock */ 778 synchronize_irq(sc->irq); 779 tasklet_kill(&sc->intr_tq); 780 tasklet_kill(&sc->bcon_tasklet); 781 782 prev_idle = sc->ps_idle; 783 sc->ps_idle = true; 784 785 spin_lock_bh(&sc->sc_pcu_lock); 786 787 if (ah->led_pin >= 0) { 788 ath9k_hw_set_gpio(ah, ah->led_pin, 1); 789 ath9k_hw_cfg_gpio_input(ah, ah->led_pin); 790 } 791 792 ath_prepare_reset(sc); 793 794 if (sc->rx.frag) { 795 dev_kfree_skb_any(sc->rx.frag); 796 sc->rx.frag = NULL; 797 } 798 799 if (!ah->curchan) 800 ah->curchan = ath9k_cmn_get_curchannel(hw, ah); 801 802 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false); 803 ath9k_hw_phy_disable(ah); 804 805 ath9k_hw_configpcipowersave(ah, true); 806 807 spin_unlock_bh(&sc->sc_pcu_lock); 808 809 ath9k_ps_restore(sc); 810 811 set_bit(SC_OP_INVALID, &sc->sc_flags); 812 sc->ps_idle = prev_idle; 813 814 mutex_unlock(&sc->mutex); 815 816 ath_dbg(common, CONFIG, "Driver halt\n"); 817 } 818 819 bool ath9k_uses_beacons(int type) 820 { 821 switch (type) { 822 case NL80211_IFTYPE_AP: 823 case NL80211_IFTYPE_ADHOC: 824 case NL80211_IFTYPE_MESH_POINT: 825 return true; 826 default: 827 return false; 828 } 829 } 830 831 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 832 { 833 struct ath9k_vif_iter_data *iter_data = data; 834 int i; 835 836 if (iter_data->has_hw_macaddr) { 837 for (i = 0; i < ETH_ALEN; i++) 838 iter_data->mask[i] &= 839 ~(iter_data->hw_macaddr[i] ^ mac[i]); 840 } else { 841 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN); 842 iter_data->has_hw_macaddr = true; 843 } 844 845 switch (vif->type) { 846 case NL80211_IFTYPE_AP: 847 iter_data->naps++; 848 break; 849 case NL80211_IFTYPE_STATION: 850 iter_data->nstations++; 851 break; 852 case NL80211_IFTYPE_ADHOC: 853 iter_data->nadhocs++; 854 break; 855 case NL80211_IFTYPE_MESH_POINT: 856 iter_data->nmeshes++; 857 break; 858 case NL80211_IFTYPE_WDS: 859 iter_data->nwds++; 860 break; 861 default: 862 break; 863 } 864 } 865 866 static void ath9k_sta_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 867 { 868 struct ath_softc *sc = data; 869 struct ath_vif *avp = (void *)vif->drv_priv; 870 871 if (vif->type != NL80211_IFTYPE_STATION) 872 return; 873 874 if (avp->primary_sta_vif) 875 ath9k_set_assoc_state(sc, vif); 876 } 877 878 /* Called with sc->mutex held. */ 879 void ath9k_calculate_iter_data(struct ieee80211_hw *hw, 880 struct ieee80211_vif *vif, 881 struct ath9k_vif_iter_data *iter_data) 882 { 883 struct ath_softc *sc = hw->priv; 884 struct ath_hw *ah = sc->sc_ah; 885 struct ath_common *common = ath9k_hw_common(ah); 886 887 /* 888 * Use the hardware MAC address as reference, the hardware uses it 889 * together with the BSSID mask when matching addresses. 890 */ 891 memset(iter_data, 0, sizeof(*iter_data)); 892 memset(&iter_data->mask, 0xff, ETH_ALEN); 893 894 if (vif) 895 ath9k_vif_iter(iter_data, vif->addr, vif); 896 897 /* Get list of all active MAC addresses */ 898 ieee80211_iterate_active_interfaces_atomic( 899 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL, 900 ath9k_vif_iter, iter_data); 901 902 memcpy(common->macaddr, iter_data->hw_macaddr, ETH_ALEN); 903 } 904 905 /* Called with sc->mutex held. */ 906 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw, 907 struct ieee80211_vif *vif) 908 { 909 struct ath_softc *sc = hw->priv; 910 struct ath_hw *ah = sc->sc_ah; 911 struct ath_common *common = ath9k_hw_common(ah); 912 struct ath9k_vif_iter_data iter_data; 913 enum nl80211_iftype old_opmode = ah->opmode; 914 915 ath9k_calculate_iter_data(hw, vif, &iter_data); 916 917 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN); 918 ath_hw_setbssidmask(common); 919 920 if (iter_data.naps > 0) { 921 ath9k_hw_set_tsfadjust(ah, true); 922 ah->opmode = NL80211_IFTYPE_AP; 923 } else { 924 ath9k_hw_set_tsfadjust(ah, false); 925 926 if (iter_data.nmeshes) 927 ah->opmode = NL80211_IFTYPE_MESH_POINT; 928 else if (iter_data.nwds) 929 ah->opmode = NL80211_IFTYPE_AP; 930 else if (iter_data.nadhocs) 931 ah->opmode = NL80211_IFTYPE_ADHOC; 932 else 933 ah->opmode = NL80211_IFTYPE_STATION; 934 } 935 936 ath9k_hw_setopmode(ah); 937 938 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) 939 ah->imask |= ATH9K_INT_TSFOOR; 940 else 941 ah->imask &= ~ATH9K_INT_TSFOOR; 942 943 ath9k_hw_set_interrupts(ah); 944 945 /* 946 * If we are changing the opmode to STATION, 947 * a beacon sync needs to be done. 948 */ 949 if (ah->opmode == NL80211_IFTYPE_STATION && 950 old_opmode == NL80211_IFTYPE_AP && 951 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) { 952 ieee80211_iterate_active_interfaces_atomic( 953 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL, 954 ath9k_sta_vif_iter, sc); 955 } 956 } 957 958 static int ath9k_add_interface(struct ieee80211_hw *hw, 959 struct ieee80211_vif *vif) 960 { 961 struct ath_softc *sc = hw->priv; 962 struct ath_hw *ah = sc->sc_ah; 963 struct ath_common *common = ath9k_hw_common(ah); 964 struct ath_vif *avp = (void *)vif->drv_priv; 965 struct ath_node *an = &avp->mcast_node; 966 967 mutex_lock(&sc->mutex); 968 969 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type); 970 sc->nvifs++; 971 972 ath9k_ps_wakeup(sc); 973 ath9k_calculate_summary_state(hw, vif); 974 ath9k_ps_restore(sc); 975 976 if (ath9k_uses_beacons(vif->type)) 977 ath9k_beacon_assign_slot(sc, vif); 978 979 an->sc = sc; 980 an->sta = NULL; 981 an->vif = vif; 982 an->no_ps_filter = true; 983 ath_tx_node_init(sc, an); 984 985 mutex_unlock(&sc->mutex); 986 return 0; 987 } 988 989 static int ath9k_change_interface(struct ieee80211_hw *hw, 990 struct ieee80211_vif *vif, 991 enum nl80211_iftype new_type, 992 bool p2p) 993 { 994 struct ath_softc *sc = hw->priv; 995 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 996 997 ath_dbg(common, CONFIG, "Change Interface\n"); 998 mutex_lock(&sc->mutex); 999 1000 if (ath9k_uses_beacons(vif->type)) 1001 ath9k_beacon_remove_slot(sc, vif); 1002 1003 vif->type = new_type; 1004 vif->p2p = p2p; 1005 1006 ath9k_ps_wakeup(sc); 1007 ath9k_calculate_summary_state(hw, vif); 1008 ath9k_ps_restore(sc); 1009 1010 if (ath9k_uses_beacons(vif->type)) 1011 ath9k_beacon_assign_slot(sc, vif); 1012 1013 mutex_unlock(&sc->mutex); 1014 return 0; 1015 } 1016 1017 static void ath9k_remove_interface(struct ieee80211_hw *hw, 1018 struct ieee80211_vif *vif) 1019 { 1020 struct ath_softc *sc = hw->priv; 1021 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1022 struct ath_vif *avp = (void *)vif->drv_priv; 1023 1024 ath_dbg(common, CONFIG, "Detach Interface\n"); 1025 1026 mutex_lock(&sc->mutex); 1027 1028 sc->nvifs--; 1029 1030 if (ath9k_uses_beacons(vif->type)) 1031 ath9k_beacon_remove_slot(sc, vif); 1032 1033 if (sc->csa_vif == vif) 1034 sc->csa_vif = NULL; 1035 1036 ath9k_ps_wakeup(sc); 1037 ath9k_calculate_summary_state(hw, NULL); 1038 ath9k_ps_restore(sc); 1039 1040 ath_tx_node_cleanup(sc, &avp->mcast_node); 1041 1042 mutex_unlock(&sc->mutex); 1043 } 1044 1045 static void ath9k_enable_ps(struct ath_softc *sc) 1046 { 1047 struct ath_hw *ah = sc->sc_ah; 1048 struct ath_common *common = ath9k_hw_common(ah); 1049 1050 sc->ps_enabled = true; 1051 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1052 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) { 1053 ah->imask |= ATH9K_INT_TIM_TIMER; 1054 ath9k_hw_set_interrupts(ah); 1055 } 1056 ath9k_hw_setrxabort(ah, 1); 1057 } 1058 ath_dbg(common, PS, "PowerSave enabled\n"); 1059 } 1060 1061 static void ath9k_disable_ps(struct ath_softc *sc) 1062 { 1063 struct ath_hw *ah = sc->sc_ah; 1064 struct ath_common *common = ath9k_hw_common(ah); 1065 1066 sc->ps_enabled = false; 1067 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE); 1068 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1069 ath9k_hw_setrxabort(ah, 0); 1070 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON | 1071 PS_WAIT_FOR_CAB | 1072 PS_WAIT_FOR_PSPOLL_DATA | 1073 PS_WAIT_FOR_TX_ACK); 1074 if (ah->imask & ATH9K_INT_TIM_TIMER) { 1075 ah->imask &= ~ATH9K_INT_TIM_TIMER; 1076 ath9k_hw_set_interrupts(ah); 1077 } 1078 } 1079 ath_dbg(common, PS, "PowerSave disabled\n"); 1080 } 1081 1082 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw) 1083 { 1084 struct ath_softc *sc = hw->priv; 1085 struct ath_hw *ah = sc->sc_ah; 1086 struct ath_common *common = ath9k_hw_common(ah); 1087 u32 rxfilter; 1088 1089 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) { 1090 ath_err(common, "spectrum analyzer not implemented on this hardware\n"); 1091 return; 1092 } 1093 1094 ath9k_ps_wakeup(sc); 1095 rxfilter = ath9k_hw_getrxfilter(ah); 1096 ath9k_hw_setrxfilter(ah, rxfilter | 1097 ATH9K_RX_FILTER_PHYRADAR | 1098 ATH9K_RX_FILTER_PHYERR); 1099 1100 /* TODO: usually this should not be neccesary, but for some reason 1101 * (or in some mode?) the trigger must be called after the 1102 * configuration, otherwise the register will have its values reset 1103 * (on my ar9220 to value 0x01002310) 1104 */ 1105 ath9k_spectral_scan_config(hw, sc->spectral_mode); 1106 ath9k_hw_ops(ah)->spectral_scan_trigger(ah); 1107 ath9k_ps_restore(sc); 1108 } 1109 1110 int ath9k_spectral_scan_config(struct ieee80211_hw *hw, 1111 enum spectral_mode spectral_mode) 1112 { 1113 struct ath_softc *sc = hw->priv; 1114 struct ath_hw *ah = sc->sc_ah; 1115 struct ath_common *common = ath9k_hw_common(ah); 1116 1117 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) { 1118 ath_err(common, "spectrum analyzer not implemented on this hardware\n"); 1119 return -1; 1120 } 1121 1122 switch (spectral_mode) { 1123 case SPECTRAL_DISABLED: 1124 sc->spec_config.enabled = 0; 1125 break; 1126 case SPECTRAL_BACKGROUND: 1127 /* send endless samples. 1128 * TODO: is this really useful for "background"? 1129 */ 1130 sc->spec_config.endless = 1; 1131 sc->spec_config.enabled = 1; 1132 break; 1133 case SPECTRAL_CHANSCAN: 1134 case SPECTRAL_MANUAL: 1135 sc->spec_config.endless = 0; 1136 sc->spec_config.enabled = 1; 1137 break; 1138 default: 1139 return -1; 1140 } 1141 1142 ath9k_ps_wakeup(sc); 1143 ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config); 1144 ath9k_ps_restore(sc); 1145 1146 sc->spectral_mode = spectral_mode; 1147 1148 return 0; 1149 } 1150 1151 static int ath9k_config(struct ieee80211_hw *hw, u32 changed) 1152 { 1153 struct ath_softc *sc = hw->priv; 1154 struct ath_hw *ah = sc->sc_ah; 1155 struct ath_common *common = ath9k_hw_common(ah); 1156 struct ieee80211_conf *conf = &hw->conf; 1157 bool reset_channel = false; 1158 1159 ath9k_ps_wakeup(sc); 1160 mutex_lock(&sc->mutex); 1161 1162 if (changed & IEEE80211_CONF_CHANGE_IDLE) { 1163 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE); 1164 if (sc->ps_idle) { 1165 ath_cancel_work(sc); 1166 ath9k_stop_btcoex(sc); 1167 } else { 1168 ath9k_start_btcoex(sc); 1169 /* 1170 * The chip needs a reset to properly wake up from 1171 * full sleep 1172 */ 1173 reset_channel = ah->chip_fullsleep; 1174 } 1175 } 1176 1177 /* 1178 * We just prepare to enable PS. We have to wait until our AP has 1179 * ACK'd our null data frame to disable RX otherwise we'll ignore 1180 * those ACKs and end up retransmitting the same null data frames. 1181 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode. 1182 */ 1183 if (changed & IEEE80211_CONF_CHANGE_PS) { 1184 unsigned long flags; 1185 spin_lock_irqsave(&sc->sc_pm_lock, flags); 1186 if (conf->flags & IEEE80211_CONF_PS) 1187 ath9k_enable_ps(sc); 1188 else 1189 ath9k_disable_ps(sc); 1190 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1191 } 1192 1193 if (changed & IEEE80211_CONF_CHANGE_MONITOR) { 1194 if (conf->flags & IEEE80211_CONF_MONITOR) { 1195 ath_dbg(common, CONFIG, "Monitor mode is enabled\n"); 1196 sc->sc_ah->is_monitoring = true; 1197 } else { 1198 ath_dbg(common, CONFIG, "Monitor mode is disabled\n"); 1199 sc->sc_ah->is_monitoring = false; 1200 } 1201 } 1202 1203 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) { 1204 struct ieee80211_channel *curchan = hw->conf.chandef.chan; 1205 int pos = curchan->hw_value; 1206 int old_pos = -1; 1207 unsigned long flags; 1208 1209 if (ah->curchan) 1210 old_pos = ah->curchan - &ah->channels[0]; 1211 1212 ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n", 1213 curchan->center_freq, hw->conf.chandef.width); 1214 1215 /* update survey stats for the old channel before switching */ 1216 spin_lock_irqsave(&common->cc_lock, flags); 1217 ath_update_survey_stats(sc); 1218 spin_unlock_irqrestore(&common->cc_lock, flags); 1219 1220 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos], 1221 &conf->chandef); 1222 1223 /* 1224 * If the operating channel changes, change the survey in-use flags 1225 * along with it. 1226 * Reset the survey data for the new channel, unless we're switching 1227 * back to the operating channel from an off-channel operation. 1228 */ 1229 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && 1230 sc->cur_survey != &sc->survey[pos]) { 1231 1232 if (sc->cur_survey) 1233 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE; 1234 1235 sc->cur_survey = &sc->survey[pos]; 1236 1237 memset(sc->cur_survey, 0, sizeof(struct survey_info)); 1238 sc->cur_survey->filled |= SURVEY_INFO_IN_USE; 1239 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) { 1240 memset(&sc->survey[pos], 0, sizeof(struct survey_info)); 1241 } 1242 1243 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) { 1244 ath_err(common, "Unable to set channel\n"); 1245 mutex_unlock(&sc->mutex); 1246 ath9k_ps_restore(sc); 1247 return -EINVAL; 1248 } 1249 1250 /* 1251 * The most recent snapshot of channel->noisefloor for the old 1252 * channel is only available after the hardware reset. Copy it to 1253 * the survey stats now. 1254 */ 1255 if (old_pos >= 0) 1256 ath_update_survey_nf(sc, old_pos); 1257 1258 /* 1259 * Enable radar pulse detection if on a DFS channel. Spectral 1260 * scanning and radar detection can not be used concurrently. 1261 */ 1262 if (hw->conf.radar_enabled) { 1263 u32 rxfilter; 1264 1265 /* set HW specific DFS configuration */ 1266 ath9k_hw_set_radar_params(ah); 1267 rxfilter = ath9k_hw_getrxfilter(ah); 1268 rxfilter |= ATH9K_RX_FILTER_PHYRADAR | 1269 ATH9K_RX_FILTER_PHYERR; 1270 ath9k_hw_setrxfilter(ah, rxfilter); 1271 ath_dbg(common, DFS, "DFS enabled at freq %d\n", 1272 curchan->center_freq); 1273 } else { 1274 /* perform spectral scan if requested. */ 1275 if (test_bit(SC_OP_SCANNING, &sc->sc_flags) && 1276 sc->spectral_mode == SPECTRAL_CHANSCAN) 1277 ath9k_spectral_scan_trigger(hw); 1278 } 1279 } 1280 1281 if (changed & IEEE80211_CONF_CHANGE_POWER) { 1282 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level); 1283 sc->config.txpowlimit = 2 * conf->power_level; 1284 ath9k_cmn_update_txpow(ah, sc->curtxpow, 1285 sc->config.txpowlimit, &sc->curtxpow); 1286 } 1287 1288 mutex_unlock(&sc->mutex); 1289 ath9k_ps_restore(sc); 1290 1291 return 0; 1292 } 1293 1294 #define SUPPORTED_FILTERS \ 1295 (FIF_PROMISC_IN_BSS | \ 1296 FIF_ALLMULTI | \ 1297 FIF_CONTROL | \ 1298 FIF_PSPOLL | \ 1299 FIF_OTHER_BSS | \ 1300 FIF_BCN_PRBRESP_PROMISC | \ 1301 FIF_PROBE_REQ | \ 1302 FIF_FCSFAIL) 1303 1304 /* FIXME: sc->sc_full_reset ? */ 1305 static void ath9k_configure_filter(struct ieee80211_hw *hw, 1306 unsigned int changed_flags, 1307 unsigned int *total_flags, 1308 u64 multicast) 1309 { 1310 struct ath_softc *sc = hw->priv; 1311 u32 rfilt; 1312 1313 changed_flags &= SUPPORTED_FILTERS; 1314 *total_flags &= SUPPORTED_FILTERS; 1315 1316 sc->rx.rxfilter = *total_flags; 1317 ath9k_ps_wakeup(sc); 1318 rfilt = ath_calcrxfilter(sc); 1319 ath9k_hw_setrxfilter(sc->sc_ah, rfilt); 1320 ath9k_ps_restore(sc); 1321 1322 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n", 1323 rfilt); 1324 } 1325 1326 static int ath9k_sta_add(struct ieee80211_hw *hw, 1327 struct ieee80211_vif *vif, 1328 struct ieee80211_sta *sta) 1329 { 1330 struct ath_softc *sc = hw->priv; 1331 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1332 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1333 struct ieee80211_key_conf ps_key = { }; 1334 int key; 1335 1336 ath_node_attach(sc, sta, vif); 1337 1338 if (vif->type != NL80211_IFTYPE_AP && 1339 vif->type != NL80211_IFTYPE_AP_VLAN) 1340 return 0; 1341 1342 key = ath_key_config(common, vif, sta, &ps_key); 1343 if (key > 0) 1344 an->ps_key = key; 1345 1346 return 0; 1347 } 1348 1349 static void ath9k_del_ps_key(struct ath_softc *sc, 1350 struct ieee80211_vif *vif, 1351 struct ieee80211_sta *sta) 1352 { 1353 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1354 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1355 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key }; 1356 1357 if (!an->ps_key) 1358 return; 1359 1360 ath_key_delete(common, &ps_key); 1361 an->ps_key = 0; 1362 } 1363 1364 static int ath9k_sta_remove(struct ieee80211_hw *hw, 1365 struct ieee80211_vif *vif, 1366 struct ieee80211_sta *sta) 1367 { 1368 struct ath_softc *sc = hw->priv; 1369 1370 ath9k_del_ps_key(sc, vif, sta); 1371 ath_node_detach(sc, sta); 1372 1373 return 0; 1374 } 1375 1376 static void ath9k_sta_notify(struct ieee80211_hw *hw, 1377 struct ieee80211_vif *vif, 1378 enum sta_notify_cmd cmd, 1379 struct ieee80211_sta *sta) 1380 { 1381 struct ath_softc *sc = hw->priv; 1382 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1383 1384 switch (cmd) { 1385 case STA_NOTIFY_SLEEP: 1386 an->sleeping = true; 1387 ath_tx_aggr_sleep(sta, sc, an); 1388 break; 1389 case STA_NOTIFY_AWAKE: 1390 an->sleeping = false; 1391 ath_tx_aggr_wakeup(sc, an); 1392 break; 1393 } 1394 } 1395 1396 static int ath9k_conf_tx(struct ieee80211_hw *hw, 1397 struct ieee80211_vif *vif, u16 queue, 1398 const struct ieee80211_tx_queue_params *params) 1399 { 1400 struct ath_softc *sc = hw->priv; 1401 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1402 struct ath_txq *txq; 1403 struct ath9k_tx_queue_info qi; 1404 int ret = 0; 1405 1406 if (queue >= IEEE80211_NUM_ACS) 1407 return 0; 1408 1409 txq = sc->tx.txq_map[queue]; 1410 1411 ath9k_ps_wakeup(sc); 1412 mutex_lock(&sc->mutex); 1413 1414 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); 1415 1416 qi.tqi_aifs = params->aifs; 1417 qi.tqi_cwmin = params->cw_min; 1418 qi.tqi_cwmax = params->cw_max; 1419 qi.tqi_burstTime = params->txop * 32; 1420 1421 ath_dbg(common, CONFIG, 1422 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", 1423 queue, txq->axq_qnum, params->aifs, params->cw_min, 1424 params->cw_max, params->txop); 1425 1426 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime); 1427 ret = ath_txq_update(sc, txq->axq_qnum, &qi); 1428 if (ret) 1429 ath_err(common, "TXQ Update failed\n"); 1430 1431 mutex_unlock(&sc->mutex); 1432 ath9k_ps_restore(sc); 1433 1434 return ret; 1435 } 1436 1437 static int ath9k_set_key(struct ieee80211_hw *hw, 1438 enum set_key_cmd cmd, 1439 struct ieee80211_vif *vif, 1440 struct ieee80211_sta *sta, 1441 struct ieee80211_key_conf *key) 1442 { 1443 struct ath_softc *sc = hw->priv; 1444 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1445 int ret = 0; 1446 1447 if (ath9k_modparam_nohwcrypt) 1448 return -ENOSPC; 1449 1450 if ((vif->type == NL80211_IFTYPE_ADHOC || 1451 vif->type == NL80211_IFTYPE_MESH_POINT) && 1452 (key->cipher == WLAN_CIPHER_SUITE_TKIP || 1453 key->cipher == WLAN_CIPHER_SUITE_CCMP) && 1454 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { 1455 /* 1456 * For now, disable hw crypto for the RSN IBSS group keys. This 1457 * could be optimized in the future to use a modified key cache 1458 * design to support per-STA RX GTK, but until that gets 1459 * implemented, use of software crypto for group addressed 1460 * frames is a acceptable to allow RSN IBSS to be used. 1461 */ 1462 return -EOPNOTSUPP; 1463 } 1464 1465 mutex_lock(&sc->mutex); 1466 ath9k_ps_wakeup(sc); 1467 ath_dbg(common, CONFIG, "Set HW Key\n"); 1468 1469 switch (cmd) { 1470 case SET_KEY: 1471 if (sta) 1472 ath9k_del_ps_key(sc, vif, sta); 1473 1474 ret = ath_key_config(common, vif, sta, key); 1475 if (ret >= 0) { 1476 key->hw_key_idx = ret; 1477 /* push IV and Michael MIC generation to stack */ 1478 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 1479 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) 1480 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; 1481 if (sc->sc_ah->sw_mgmt_crypto && 1482 key->cipher == WLAN_CIPHER_SUITE_CCMP) 1483 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX; 1484 ret = 0; 1485 } 1486 break; 1487 case DISABLE_KEY: 1488 ath_key_delete(common, key); 1489 break; 1490 default: 1491 ret = -EINVAL; 1492 } 1493 1494 ath9k_ps_restore(sc); 1495 mutex_unlock(&sc->mutex); 1496 1497 return ret; 1498 } 1499 1500 static void ath9k_set_assoc_state(struct ath_softc *sc, 1501 struct ieee80211_vif *vif) 1502 { 1503 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1504 struct ath_vif *avp = (void *)vif->drv_priv; 1505 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; 1506 unsigned long flags; 1507 1508 set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags); 1509 avp->primary_sta_vif = true; 1510 1511 /* 1512 * Set the AID, BSSID and do beacon-sync only when 1513 * the HW opmode is STATION. 1514 * 1515 * But the primary bit is set above in any case. 1516 */ 1517 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION) 1518 return; 1519 1520 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); 1521 common->curaid = bss_conf->aid; 1522 ath9k_hw_write_associd(sc->sc_ah); 1523 1524 sc->last_rssi = ATH_RSSI_DUMMY_MARKER; 1525 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER; 1526 1527 spin_lock_irqsave(&sc->sc_pm_lock, flags); 1528 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON; 1529 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1530 1531 if (ath9k_hw_mci_is_enabled(sc->sc_ah)) 1532 ath9k_mci_update_wlan_channels(sc, false); 1533 1534 ath_dbg(common, CONFIG, 1535 "Primary Station interface: %pM, BSSID: %pM\n", 1536 vif->addr, common->curbssid); 1537 } 1538 1539 static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 1540 { 1541 struct ath_softc *sc = data; 1542 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; 1543 1544 if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) 1545 return; 1546 1547 if (bss_conf->assoc) 1548 ath9k_set_assoc_state(sc, vif); 1549 } 1550 1551 static void ath9k_bss_info_changed(struct ieee80211_hw *hw, 1552 struct ieee80211_vif *vif, 1553 struct ieee80211_bss_conf *bss_conf, 1554 u32 changed) 1555 { 1556 #define CHECK_ANI \ 1557 (BSS_CHANGED_ASSOC | \ 1558 BSS_CHANGED_IBSS | \ 1559 BSS_CHANGED_BEACON_ENABLED) 1560 1561 struct ath_softc *sc = hw->priv; 1562 struct ath_hw *ah = sc->sc_ah; 1563 struct ath_common *common = ath9k_hw_common(ah); 1564 struct ath_vif *avp = (void *)vif->drv_priv; 1565 int slottime; 1566 1567 ath9k_ps_wakeup(sc); 1568 mutex_lock(&sc->mutex); 1569 1570 if (changed & BSS_CHANGED_ASSOC) { 1571 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n", 1572 bss_conf->bssid, bss_conf->assoc); 1573 1574 if (avp->primary_sta_vif && !bss_conf->assoc) { 1575 clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags); 1576 avp->primary_sta_vif = false; 1577 1578 if (ah->opmode == NL80211_IFTYPE_STATION) 1579 clear_bit(SC_OP_BEACONS, &sc->sc_flags); 1580 } 1581 1582 ieee80211_iterate_active_interfaces_atomic( 1583 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL, 1584 ath9k_bss_assoc_iter, sc); 1585 1586 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags) && 1587 ah->opmode == NL80211_IFTYPE_STATION) { 1588 memset(common->curbssid, 0, ETH_ALEN); 1589 common->curaid = 0; 1590 ath9k_hw_write_associd(sc->sc_ah); 1591 if (ath9k_hw_mci_is_enabled(sc->sc_ah)) 1592 ath9k_mci_update_wlan_channels(sc, true); 1593 } 1594 } 1595 1596 if (changed & BSS_CHANGED_IBSS) { 1597 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); 1598 common->curaid = bss_conf->aid; 1599 ath9k_hw_write_associd(sc->sc_ah); 1600 } 1601 1602 if ((changed & BSS_CHANGED_BEACON_ENABLED) || 1603 (changed & BSS_CHANGED_BEACON_INT)) { 1604 if (ah->opmode == NL80211_IFTYPE_AP && 1605 bss_conf->enable_beacon) 1606 ath9k_set_tsfadjust(sc, vif); 1607 if (ath9k_allow_beacon_config(sc, vif)) 1608 ath9k_beacon_config(sc, vif, changed); 1609 } 1610 1611 if (changed & BSS_CHANGED_ERP_SLOT) { 1612 if (bss_conf->use_short_slot) 1613 slottime = 9; 1614 else 1615 slottime = 20; 1616 if (vif->type == NL80211_IFTYPE_AP) { 1617 /* 1618 * Defer update, so that connected stations can adjust 1619 * their settings at the same time. 1620 * See beacon.c for more details 1621 */ 1622 sc->beacon.slottime = slottime; 1623 sc->beacon.updateslot = UPDATE; 1624 } else { 1625 ah->slottime = slottime; 1626 ath9k_hw_init_global_settings(ah); 1627 } 1628 } 1629 1630 if (changed & CHECK_ANI) 1631 ath_check_ani(sc); 1632 1633 mutex_unlock(&sc->mutex); 1634 ath9k_ps_restore(sc); 1635 1636 #undef CHECK_ANI 1637 } 1638 1639 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1640 { 1641 struct ath_softc *sc = hw->priv; 1642 u64 tsf; 1643 1644 mutex_lock(&sc->mutex); 1645 ath9k_ps_wakeup(sc); 1646 tsf = ath9k_hw_gettsf64(sc->sc_ah); 1647 ath9k_ps_restore(sc); 1648 mutex_unlock(&sc->mutex); 1649 1650 return tsf; 1651 } 1652 1653 static void ath9k_set_tsf(struct ieee80211_hw *hw, 1654 struct ieee80211_vif *vif, 1655 u64 tsf) 1656 { 1657 struct ath_softc *sc = hw->priv; 1658 1659 mutex_lock(&sc->mutex); 1660 ath9k_ps_wakeup(sc); 1661 ath9k_hw_settsf64(sc->sc_ah, tsf); 1662 ath9k_ps_restore(sc); 1663 mutex_unlock(&sc->mutex); 1664 } 1665 1666 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1667 { 1668 struct ath_softc *sc = hw->priv; 1669 1670 mutex_lock(&sc->mutex); 1671 1672 ath9k_ps_wakeup(sc); 1673 ath9k_hw_reset_tsf(sc->sc_ah); 1674 ath9k_ps_restore(sc); 1675 1676 mutex_unlock(&sc->mutex); 1677 } 1678 1679 static int ath9k_ampdu_action(struct ieee80211_hw *hw, 1680 struct ieee80211_vif *vif, 1681 enum ieee80211_ampdu_mlme_action action, 1682 struct ieee80211_sta *sta, 1683 u16 tid, u16 *ssn, u8 buf_size) 1684 { 1685 struct ath_softc *sc = hw->priv; 1686 bool flush = false; 1687 int ret = 0; 1688 1689 mutex_lock(&sc->mutex); 1690 1691 switch (action) { 1692 case IEEE80211_AMPDU_RX_START: 1693 break; 1694 case IEEE80211_AMPDU_RX_STOP: 1695 break; 1696 case IEEE80211_AMPDU_TX_START: 1697 ath9k_ps_wakeup(sc); 1698 ret = ath_tx_aggr_start(sc, sta, tid, ssn); 1699 if (!ret) 1700 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1701 ath9k_ps_restore(sc); 1702 break; 1703 case IEEE80211_AMPDU_TX_STOP_FLUSH: 1704 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: 1705 flush = true; 1706 case IEEE80211_AMPDU_TX_STOP_CONT: 1707 ath9k_ps_wakeup(sc); 1708 ath_tx_aggr_stop(sc, sta, tid); 1709 if (!flush) 1710 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1711 ath9k_ps_restore(sc); 1712 break; 1713 case IEEE80211_AMPDU_TX_OPERATIONAL: 1714 ath9k_ps_wakeup(sc); 1715 ath_tx_aggr_resume(sc, sta, tid); 1716 ath9k_ps_restore(sc); 1717 break; 1718 default: 1719 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n"); 1720 } 1721 1722 mutex_unlock(&sc->mutex); 1723 1724 return ret; 1725 } 1726 1727 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx, 1728 struct survey_info *survey) 1729 { 1730 struct ath_softc *sc = hw->priv; 1731 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1732 struct ieee80211_supported_band *sband; 1733 struct ieee80211_channel *chan; 1734 unsigned long flags; 1735 int pos; 1736 1737 spin_lock_irqsave(&common->cc_lock, flags); 1738 if (idx == 0) 1739 ath_update_survey_stats(sc); 1740 1741 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ]; 1742 if (sband && idx >= sband->n_channels) { 1743 idx -= sband->n_channels; 1744 sband = NULL; 1745 } 1746 1747 if (!sband) 1748 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ]; 1749 1750 if (!sband || idx >= sband->n_channels) { 1751 spin_unlock_irqrestore(&common->cc_lock, flags); 1752 return -ENOENT; 1753 } 1754 1755 chan = &sband->channels[idx]; 1756 pos = chan->hw_value; 1757 memcpy(survey, &sc->survey[pos], sizeof(*survey)); 1758 survey->channel = chan; 1759 spin_unlock_irqrestore(&common->cc_lock, flags); 1760 1761 return 0; 1762 } 1763 1764 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class) 1765 { 1766 struct ath_softc *sc = hw->priv; 1767 struct ath_hw *ah = sc->sc_ah; 1768 1769 mutex_lock(&sc->mutex); 1770 ah->coverage_class = coverage_class; 1771 1772 ath9k_ps_wakeup(sc); 1773 ath9k_hw_init_global_settings(ah); 1774 ath9k_ps_restore(sc); 1775 1776 mutex_unlock(&sc->mutex); 1777 } 1778 1779 static void ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop) 1780 { 1781 struct ath_softc *sc = hw->priv; 1782 struct ath_hw *ah = sc->sc_ah; 1783 struct ath_common *common = ath9k_hw_common(ah); 1784 int timeout = 200; /* ms */ 1785 int i, j; 1786 bool drain_txq; 1787 1788 mutex_lock(&sc->mutex); 1789 cancel_delayed_work_sync(&sc->tx_complete_work); 1790 1791 if (ah->ah_flags & AH_UNPLUGGED) { 1792 ath_dbg(common, ANY, "Device has been unplugged!\n"); 1793 mutex_unlock(&sc->mutex); 1794 return; 1795 } 1796 1797 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) { 1798 ath_dbg(common, ANY, "Device not present\n"); 1799 mutex_unlock(&sc->mutex); 1800 return; 1801 } 1802 1803 for (j = 0; j < timeout; j++) { 1804 bool npend = false; 1805 1806 if (j) 1807 usleep_range(1000, 2000); 1808 1809 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 1810 if (!ATH_TXQ_SETUP(sc, i)) 1811 continue; 1812 1813 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]); 1814 1815 if (npend) 1816 break; 1817 } 1818 1819 if (!npend) 1820 break; 1821 } 1822 1823 if (drop) { 1824 ath9k_ps_wakeup(sc); 1825 spin_lock_bh(&sc->sc_pcu_lock); 1826 drain_txq = ath_drain_all_txq(sc); 1827 spin_unlock_bh(&sc->sc_pcu_lock); 1828 1829 if (!drain_txq) 1830 ath_reset(sc); 1831 1832 ath9k_ps_restore(sc); 1833 ieee80211_wake_queues(hw); 1834 } 1835 1836 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0); 1837 mutex_unlock(&sc->mutex); 1838 } 1839 1840 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw) 1841 { 1842 struct ath_softc *sc = hw->priv; 1843 int i; 1844 1845 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 1846 if (!ATH_TXQ_SETUP(sc, i)) 1847 continue; 1848 1849 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i])) 1850 return true; 1851 } 1852 return false; 1853 } 1854 1855 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw) 1856 { 1857 struct ath_softc *sc = hw->priv; 1858 struct ath_hw *ah = sc->sc_ah; 1859 struct ieee80211_vif *vif; 1860 struct ath_vif *avp; 1861 struct ath_buf *bf; 1862 struct ath_tx_status ts; 1863 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); 1864 int status; 1865 1866 vif = sc->beacon.bslot[0]; 1867 if (!vif) 1868 return 0; 1869 1870 if (!vif->bss_conf.enable_beacon) 1871 return 0; 1872 1873 avp = (void *)vif->drv_priv; 1874 1875 if (!sc->beacon.tx_processed && !edma) { 1876 tasklet_disable(&sc->bcon_tasklet); 1877 1878 bf = avp->av_bcbuf; 1879 if (!bf || !bf->bf_mpdu) 1880 goto skip; 1881 1882 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts); 1883 if (status == -EINPROGRESS) 1884 goto skip; 1885 1886 sc->beacon.tx_processed = true; 1887 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK); 1888 1889 skip: 1890 tasklet_enable(&sc->bcon_tasklet); 1891 } 1892 1893 return sc->beacon.tx_last; 1894 } 1895 1896 static int ath9k_get_stats(struct ieee80211_hw *hw, 1897 struct ieee80211_low_level_stats *stats) 1898 { 1899 struct ath_softc *sc = hw->priv; 1900 struct ath_hw *ah = sc->sc_ah; 1901 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats; 1902 1903 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad; 1904 stats->dot11RTSFailureCount = mib_stats->rts_bad; 1905 stats->dot11FCSErrorCount = mib_stats->fcs_bad; 1906 stats->dot11RTSSuccessCount = mib_stats->rts_good; 1907 return 0; 1908 } 1909 1910 static u32 fill_chainmask(u32 cap, u32 new) 1911 { 1912 u32 filled = 0; 1913 int i; 1914 1915 for (i = 0; cap && new; i++, cap >>= 1) { 1916 if (!(cap & BIT(0))) 1917 continue; 1918 1919 if (new & BIT(0)) 1920 filled |= BIT(i); 1921 1922 new >>= 1; 1923 } 1924 1925 return filled; 1926 } 1927 1928 static bool validate_antenna_mask(struct ath_hw *ah, u32 val) 1929 { 1930 if (AR_SREV_9300_20_OR_LATER(ah)) 1931 return true; 1932 1933 switch (val & 0x7) { 1934 case 0x1: 1935 case 0x3: 1936 case 0x7: 1937 return true; 1938 case 0x2: 1939 return (ah->caps.rx_chainmask == 1); 1940 default: 1941 return false; 1942 } 1943 } 1944 1945 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) 1946 { 1947 struct ath_softc *sc = hw->priv; 1948 struct ath_hw *ah = sc->sc_ah; 1949 1950 if (ah->caps.rx_chainmask != 1) 1951 rx_ant |= tx_ant; 1952 1953 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant) 1954 return -EINVAL; 1955 1956 sc->ant_rx = rx_ant; 1957 sc->ant_tx = tx_ant; 1958 1959 if (ah->caps.rx_chainmask == 1) 1960 return 0; 1961 1962 /* AR9100 runs into calibration issues if not all rx chains are enabled */ 1963 if (AR_SREV_9100(ah)) 1964 ah->rxchainmask = 0x7; 1965 else 1966 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant); 1967 1968 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant); 1969 ath9k_reload_chainmask_settings(sc); 1970 1971 return 0; 1972 } 1973 1974 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant) 1975 { 1976 struct ath_softc *sc = hw->priv; 1977 1978 *tx_ant = sc->ant_tx; 1979 *rx_ant = sc->ant_rx; 1980 return 0; 1981 } 1982 1983 #ifdef CONFIG_PM_SLEEP 1984 1985 static void ath9k_wow_map_triggers(struct ath_softc *sc, 1986 struct cfg80211_wowlan *wowlan, 1987 u32 *wow_triggers) 1988 { 1989 if (wowlan->disconnect) 1990 *wow_triggers |= AH_WOW_LINK_CHANGE | 1991 AH_WOW_BEACON_MISS; 1992 if (wowlan->magic_pkt) 1993 *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN; 1994 1995 if (wowlan->n_patterns) 1996 *wow_triggers |= AH_WOW_USER_PATTERN_EN; 1997 1998 sc->wow_enabled = *wow_triggers; 1999 2000 } 2001 2002 static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc) 2003 { 2004 struct ath_hw *ah = sc->sc_ah; 2005 struct ath_common *common = ath9k_hw_common(ah); 2006 int pattern_count = 0; 2007 int i, byte_cnt; 2008 u8 dis_deauth_pattern[MAX_PATTERN_SIZE]; 2009 u8 dis_deauth_mask[MAX_PATTERN_SIZE]; 2010 2011 memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE); 2012 memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE); 2013 2014 /* 2015 * Create Dissassociate / Deauthenticate packet filter 2016 * 2017 * 2 bytes 2 byte 6 bytes 6 bytes 6 bytes 2018 * +--------------+----------+---------+--------+--------+---- 2019 * + Frame Control+ Duration + DA + SA + BSSID + 2020 * +--------------+----------+---------+--------+--------+---- 2021 * 2022 * The above is the management frame format for disassociate/ 2023 * deauthenticate pattern, from this we need to match the first byte 2024 * of 'Frame Control' and DA, SA, and BSSID fields 2025 * (skipping 2nd byte of FC and Duration feild. 2026 * 2027 * Disassociate pattern 2028 * -------------------- 2029 * Frame control = 00 00 1010 2030 * DA, SA, BSSID = x:x:x:x:x:x 2031 * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x 2032 * | x:x:x:x:x:x -- 22 bytes 2033 * 2034 * Deauthenticate pattern 2035 * ---------------------- 2036 * Frame control = 00 00 1100 2037 * DA, SA, BSSID = x:x:x:x:x:x 2038 * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x 2039 * | x:x:x:x:x:x -- 22 bytes 2040 */ 2041 2042 /* Create Disassociate Pattern first */ 2043 2044 byte_cnt = 0; 2045 2046 /* Fill out the mask with all FF's */ 2047 2048 for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++) 2049 dis_deauth_mask[i] = 0xff; 2050 2051 /* copy the first byte of frame control field */ 2052 dis_deauth_pattern[byte_cnt] = 0xa0; 2053 byte_cnt++; 2054 2055 /* skip 2nd byte of frame control and Duration field */ 2056 byte_cnt += 3; 2057 2058 /* 2059 * need not match the destination mac address, it can be a broadcast 2060 * mac address or an unicast to this station 2061 */ 2062 byte_cnt += 6; 2063 2064 /* copy the source mac address */ 2065 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN); 2066 2067 byte_cnt += 6; 2068 2069 /* copy the bssid, its same as the source mac address */ 2070 2071 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN); 2072 2073 /* Create Disassociate pattern mask */ 2074 2075 dis_deauth_mask[0] = 0xfe; 2076 dis_deauth_mask[1] = 0x03; 2077 dis_deauth_mask[2] = 0xc0; 2078 2079 ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n"); 2080 2081 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask, 2082 pattern_count, byte_cnt); 2083 2084 pattern_count++; 2085 /* 2086 * for de-authenticate pattern, only the first byte of the frame 2087 * control field gets changed from 0xA0 to 0xC0 2088 */ 2089 dis_deauth_pattern[0] = 0xC0; 2090 2091 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask, 2092 pattern_count, byte_cnt); 2093 2094 } 2095 2096 static void ath9k_wow_add_pattern(struct ath_softc *sc, 2097 struct cfg80211_wowlan *wowlan) 2098 { 2099 struct ath_hw *ah = sc->sc_ah; 2100 struct ath9k_wow_pattern *wow_pattern = NULL; 2101 struct cfg80211_pkt_pattern *patterns = wowlan->patterns; 2102 int mask_len; 2103 s8 i = 0; 2104 2105 if (!wowlan->n_patterns) 2106 return; 2107 2108 /* 2109 * Add the new user configured patterns 2110 */ 2111 for (i = 0; i < wowlan->n_patterns; i++) { 2112 2113 wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL); 2114 2115 if (!wow_pattern) 2116 return; 2117 2118 /* 2119 * TODO: convert the generic user space pattern to 2120 * appropriate chip specific/802.11 pattern. 2121 */ 2122 2123 mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8); 2124 memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE); 2125 memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE); 2126 memcpy(wow_pattern->pattern_bytes, patterns[i].pattern, 2127 patterns[i].pattern_len); 2128 memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len); 2129 wow_pattern->pattern_len = patterns[i].pattern_len; 2130 2131 /* 2132 * just need to take care of deauth and disssoc pattern, 2133 * make sure we don't overwrite them. 2134 */ 2135 2136 ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes, 2137 wow_pattern->mask_bytes, 2138 i + 2, 2139 wow_pattern->pattern_len); 2140 kfree(wow_pattern); 2141 2142 } 2143 2144 } 2145 2146 static int ath9k_suspend(struct ieee80211_hw *hw, 2147 struct cfg80211_wowlan *wowlan) 2148 { 2149 struct ath_softc *sc = hw->priv; 2150 struct ath_hw *ah = sc->sc_ah; 2151 struct ath_common *common = ath9k_hw_common(ah); 2152 u32 wow_triggers_enabled = 0; 2153 int ret = 0; 2154 2155 mutex_lock(&sc->mutex); 2156 2157 ath_cancel_work(sc); 2158 ath_stop_ani(sc); 2159 del_timer_sync(&sc->rx_poll_timer); 2160 2161 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) { 2162 ath_dbg(common, ANY, "Device not present\n"); 2163 ret = -EINVAL; 2164 goto fail_wow; 2165 } 2166 2167 if (WARN_ON(!wowlan)) { 2168 ath_dbg(common, WOW, "None of the WoW triggers enabled\n"); 2169 ret = -EINVAL; 2170 goto fail_wow; 2171 } 2172 2173 if (!device_can_wakeup(sc->dev)) { 2174 ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n"); 2175 ret = 1; 2176 goto fail_wow; 2177 } 2178 2179 /* 2180 * none of the sta vifs are associated 2181 * and we are not currently handling multivif 2182 * cases, for instance we have to seperately 2183 * configure 'keep alive frame' for each 2184 * STA. 2185 */ 2186 2187 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) { 2188 ath_dbg(common, WOW, "None of the STA vifs are associated\n"); 2189 ret = 1; 2190 goto fail_wow; 2191 } 2192 2193 if (sc->nvifs > 1) { 2194 ath_dbg(common, WOW, "WoW for multivif is not yet supported\n"); 2195 ret = 1; 2196 goto fail_wow; 2197 } 2198 2199 ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled); 2200 2201 ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n", 2202 wow_triggers_enabled); 2203 2204 ath9k_ps_wakeup(sc); 2205 2206 ath9k_stop_btcoex(sc); 2207 2208 /* 2209 * Enable wake up on recieving disassoc/deauth 2210 * frame by default. 2211 */ 2212 ath9k_wow_add_disassoc_deauth_pattern(sc); 2213 2214 if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN) 2215 ath9k_wow_add_pattern(sc, wowlan); 2216 2217 spin_lock_bh(&sc->sc_pcu_lock); 2218 /* 2219 * To avoid false wake, we enable beacon miss interrupt only 2220 * when we go to sleep. We save the current interrupt mask 2221 * so we can restore it after the system wakes up 2222 */ 2223 sc->wow_intr_before_sleep = ah->imask; 2224 ah->imask &= ~ATH9K_INT_GLOBAL; 2225 ath9k_hw_disable_interrupts(ah); 2226 ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL; 2227 ath9k_hw_set_interrupts(ah); 2228 ath9k_hw_enable_interrupts(ah); 2229 2230 spin_unlock_bh(&sc->sc_pcu_lock); 2231 2232 /* 2233 * we can now sync irq and kill any running tasklets, since we already 2234 * disabled interrupts and not holding a spin lock 2235 */ 2236 synchronize_irq(sc->irq); 2237 tasklet_kill(&sc->intr_tq); 2238 2239 ath9k_hw_wow_enable(ah, wow_triggers_enabled); 2240 2241 ath9k_ps_restore(sc); 2242 ath_dbg(common, ANY, "WoW enabled in ath9k\n"); 2243 atomic_inc(&sc->wow_sleep_proc_intr); 2244 2245 fail_wow: 2246 mutex_unlock(&sc->mutex); 2247 return ret; 2248 } 2249 2250 static int ath9k_resume(struct ieee80211_hw *hw) 2251 { 2252 struct ath_softc *sc = hw->priv; 2253 struct ath_hw *ah = sc->sc_ah; 2254 struct ath_common *common = ath9k_hw_common(ah); 2255 u32 wow_status; 2256 2257 mutex_lock(&sc->mutex); 2258 2259 ath9k_ps_wakeup(sc); 2260 2261 spin_lock_bh(&sc->sc_pcu_lock); 2262 2263 ath9k_hw_disable_interrupts(ah); 2264 ah->imask = sc->wow_intr_before_sleep; 2265 ath9k_hw_set_interrupts(ah); 2266 ath9k_hw_enable_interrupts(ah); 2267 2268 spin_unlock_bh(&sc->sc_pcu_lock); 2269 2270 wow_status = ath9k_hw_wow_wakeup(ah); 2271 2272 if (atomic_read(&sc->wow_got_bmiss_intr) == 0) { 2273 /* 2274 * some devices may not pick beacon miss 2275 * as the reason they woke up so we add 2276 * that here for that shortcoming. 2277 */ 2278 wow_status |= AH_WOW_BEACON_MISS; 2279 atomic_dec(&sc->wow_got_bmiss_intr); 2280 ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n"); 2281 } 2282 2283 atomic_dec(&sc->wow_sleep_proc_intr); 2284 2285 if (wow_status) { 2286 ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n", 2287 ath9k_hw_wow_event_to_string(wow_status), wow_status); 2288 } 2289 2290 ath_restart_work(sc); 2291 ath9k_start_btcoex(sc); 2292 2293 ath9k_ps_restore(sc); 2294 mutex_unlock(&sc->mutex); 2295 2296 return 0; 2297 } 2298 2299 static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled) 2300 { 2301 struct ath_softc *sc = hw->priv; 2302 2303 mutex_lock(&sc->mutex); 2304 device_init_wakeup(sc->dev, 1); 2305 device_set_wakeup_enable(sc->dev, enabled); 2306 mutex_unlock(&sc->mutex); 2307 } 2308 2309 #endif 2310 static void ath9k_sw_scan_start(struct ieee80211_hw *hw) 2311 { 2312 struct ath_softc *sc = hw->priv; 2313 set_bit(SC_OP_SCANNING, &sc->sc_flags); 2314 } 2315 2316 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw) 2317 { 2318 struct ath_softc *sc = hw->priv; 2319 clear_bit(SC_OP_SCANNING, &sc->sc_flags); 2320 } 2321 2322 static void ath9k_channel_switch_beacon(struct ieee80211_hw *hw, 2323 struct ieee80211_vif *vif, 2324 struct cfg80211_chan_def *chandef) 2325 { 2326 struct ath_softc *sc = hw->priv; 2327 2328 /* mac80211 does not support CSA in multi-if cases (yet) */ 2329 if (WARN_ON(sc->csa_vif)) 2330 return; 2331 2332 sc->csa_vif = vif; 2333 } 2334 2335 struct ieee80211_ops ath9k_ops = { 2336 .tx = ath9k_tx, 2337 .start = ath9k_start, 2338 .stop = ath9k_stop, 2339 .add_interface = ath9k_add_interface, 2340 .change_interface = ath9k_change_interface, 2341 .remove_interface = ath9k_remove_interface, 2342 .config = ath9k_config, 2343 .configure_filter = ath9k_configure_filter, 2344 .sta_add = ath9k_sta_add, 2345 .sta_remove = ath9k_sta_remove, 2346 .sta_notify = ath9k_sta_notify, 2347 .conf_tx = ath9k_conf_tx, 2348 .bss_info_changed = ath9k_bss_info_changed, 2349 .set_key = ath9k_set_key, 2350 .get_tsf = ath9k_get_tsf, 2351 .set_tsf = ath9k_set_tsf, 2352 .reset_tsf = ath9k_reset_tsf, 2353 .ampdu_action = ath9k_ampdu_action, 2354 .get_survey = ath9k_get_survey, 2355 .rfkill_poll = ath9k_rfkill_poll_state, 2356 .set_coverage_class = ath9k_set_coverage_class, 2357 .flush = ath9k_flush, 2358 .tx_frames_pending = ath9k_tx_frames_pending, 2359 .tx_last_beacon = ath9k_tx_last_beacon, 2360 .release_buffered_frames = ath9k_release_buffered_frames, 2361 .get_stats = ath9k_get_stats, 2362 .set_antenna = ath9k_set_antenna, 2363 .get_antenna = ath9k_get_antenna, 2364 2365 #ifdef CONFIG_PM_SLEEP 2366 .suspend = ath9k_suspend, 2367 .resume = ath9k_resume, 2368 .set_wakeup = ath9k_set_wakeup, 2369 #endif 2370 2371 #ifdef CONFIG_ATH9K_DEBUGFS 2372 .get_et_sset_count = ath9k_get_et_sset_count, 2373 .get_et_stats = ath9k_get_et_stats, 2374 .get_et_strings = ath9k_get_et_strings, 2375 #endif 2376 2377 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS) 2378 .sta_add_debugfs = ath9k_sta_add_debugfs, 2379 #endif 2380 .sw_scan_start = ath9k_sw_scan_start, 2381 .sw_scan_complete = ath9k_sw_scan_complete, 2382 .channel_switch_beacon = ath9k_channel_switch_beacon, 2383 }; 2384