1 /* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/nl80211.h> 18 #include <linux/delay.h> 19 #include "ath9k.h" 20 #include "btcoex.h" 21 22 static void ath9k_set_assoc_state(struct ath_softc *sc, 23 struct ieee80211_vif *vif); 24 25 u8 ath9k_parse_mpdudensity(u8 mpdudensity) 26 { 27 /* 28 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing": 29 * 0 for no restriction 30 * 1 for 1/4 us 31 * 2 for 1/2 us 32 * 3 for 1 us 33 * 4 for 2 us 34 * 5 for 4 us 35 * 6 for 8 us 36 * 7 for 16 us 37 */ 38 switch (mpdudensity) { 39 case 0: 40 return 0; 41 case 1: 42 case 2: 43 case 3: 44 /* Our lower layer calculations limit our precision to 45 1 microsecond */ 46 return 1; 47 case 4: 48 return 2; 49 case 5: 50 return 4; 51 case 6: 52 return 8; 53 case 7: 54 return 16; 55 default: 56 return 0; 57 } 58 } 59 60 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq) 61 { 62 bool pending = false; 63 64 spin_lock_bh(&txq->axq_lock); 65 66 if (txq->axq_depth || !list_empty(&txq->axq_acq)) 67 pending = true; 68 69 spin_unlock_bh(&txq->axq_lock); 70 return pending; 71 } 72 73 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode) 74 { 75 unsigned long flags; 76 bool ret; 77 78 spin_lock_irqsave(&sc->sc_pm_lock, flags); 79 ret = ath9k_hw_setpower(sc->sc_ah, mode); 80 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 81 82 return ret; 83 } 84 85 void ath9k_ps_wakeup(struct ath_softc *sc) 86 { 87 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 88 unsigned long flags; 89 enum ath9k_power_mode power_mode; 90 91 spin_lock_irqsave(&sc->sc_pm_lock, flags); 92 if (++sc->ps_usecount != 1) 93 goto unlock; 94 95 power_mode = sc->sc_ah->power_mode; 96 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); 97 98 /* 99 * While the hardware is asleep, the cycle counters contain no 100 * useful data. Better clear them now so that they don't mess up 101 * survey data results. 102 */ 103 if (power_mode != ATH9K_PM_AWAKE) { 104 spin_lock(&common->cc_lock); 105 ath_hw_cycle_counters_update(common); 106 memset(&common->cc_survey, 0, sizeof(common->cc_survey)); 107 memset(&common->cc_ani, 0, sizeof(common->cc_ani)); 108 spin_unlock(&common->cc_lock); 109 } 110 111 unlock: 112 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 113 } 114 115 void ath9k_ps_restore(struct ath_softc *sc) 116 { 117 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 118 enum ath9k_power_mode mode; 119 unsigned long flags; 120 bool reset; 121 122 spin_lock_irqsave(&sc->sc_pm_lock, flags); 123 if (--sc->ps_usecount != 0) 124 goto unlock; 125 126 if (sc->ps_idle) { 127 ath9k_hw_setrxabort(sc->sc_ah, 1); 128 ath9k_hw_stopdmarecv(sc->sc_ah, &reset); 129 mode = ATH9K_PM_FULL_SLEEP; 130 } else if (sc->ps_enabled && 131 !(sc->ps_flags & (PS_WAIT_FOR_BEACON | 132 PS_WAIT_FOR_CAB | 133 PS_WAIT_FOR_PSPOLL_DATA | 134 PS_WAIT_FOR_TX_ACK | 135 PS_WAIT_FOR_ANI))) { 136 mode = ATH9K_PM_NETWORK_SLEEP; 137 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah)) 138 ath9k_btcoex_stop_gen_timer(sc); 139 } else { 140 goto unlock; 141 } 142 143 spin_lock(&common->cc_lock); 144 ath_hw_cycle_counters_update(common); 145 spin_unlock(&common->cc_lock); 146 147 ath9k_hw_setpower(sc->sc_ah, mode); 148 149 unlock: 150 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 151 } 152 153 static void __ath_cancel_work(struct ath_softc *sc) 154 { 155 cancel_work_sync(&sc->paprd_work); 156 cancel_work_sync(&sc->hw_check_work); 157 cancel_delayed_work_sync(&sc->tx_complete_work); 158 cancel_delayed_work_sync(&sc->hw_pll_work); 159 160 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 161 if (ath9k_hw_mci_is_enabled(sc->sc_ah)) 162 cancel_work_sync(&sc->mci_work); 163 #endif 164 } 165 166 static void ath_cancel_work(struct ath_softc *sc) 167 { 168 __ath_cancel_work(sc); 169 cancel_work_sync(&sc->hw_reset_work); 170 } 171 172 static void ath_restart_work(struct ath_softc *sc) 173 { 174 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); 175 176 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah)) 177 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, 178 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL)); 179 180 ath_start_rx_poll(sc, 3); 181 ath_start_ani(sc); 182 } 183 184 static bool ath_prepare_reset(struct ath_softc *sc) 185 { 186 struct ath_hw *ah = sc->sc_ah; 187 bool ret = true; 188 189 ieee80211_stop_queues(sc->hw); 190 191 sc->hw_busy_count = 0; 192 ath_stop_ani(sc); 193 del_timer_sync(&sc->rx_poll_timer); 194 195 ath9k_hw_disable_interrupts(ah); 196 197 if (!ath_drain_all_txq(sc)) 198 ret = false; 199 200 if (!ath_stoprecv(sc)) 201 ret = false; 202 203 return ret; 204 } 205 206 static bool ath_complete_reset(struct ath_softc *sc, bool start) 207 { 208 struct ath_hw *ah = sc->sc_ah; 209 struct ath_common *common = ath9k_hw_common(ah); 210 unsigned long flags; 211 int i; 212 213 if (ath_startrecv(sc) != 0) { 214 ath_err(common, "Unable to restart recv logic\n"); 215 return false; 216 } 217 218 ath9k_cmn_update_txpow(ah, sc->curtxpow, 219 sc->config.txpowlimit, &sc->curtxpow); 220 221 clear_bit(SC_OP_HW_RESET, &sc->sc_flags); 222 ath9k_hw_set_interrupts(ah); 223 ath9k_hw_enable_interrupts(ah); 224 225 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) { 226 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags)) 227 goto work; 228 229 if (ah->opmode == NL80211_IFTYPE_STATION && 230 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) { 231 spin_lock_irqsave(&sc->sc_pm_lock, flags); 232 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON; 233 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 234 } else { 235 ath9k_set_beacon(sc); 236 } 237 work: 238 ath_restart_work(sc); 239 240 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 241 if (!ATH_TXQ_SETUP(sc, i)) 242 continue; 243 244 spin_lock_bh(&sc->tx.txq[i].axq_lock); 245 ath_txq_schedule(sc, &sc->tx.txq[i]); 246 spin_unlock_bh(&sc->tx.txq[i].axq_lock); 247 } 248 } 249 250 ieee80211_wake_queues(sc->hw); 251 252 return true; 253 } 254 255 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan) 256 { 257 struct ath_hw *ah = sc->sc_ah; 258 struct ath_common *common = ath9k_hw_common(ah); 259 struct ath9k_hw_cal_data *caldata = NULL; 260 bool fastcc = true; 261 int r; 262 263 __ath_cancel_work(sc); 264 265 tasklet_disable(&sc->intr_tq); 266 spin_lock_bh(&sc->sc_pcu_lock); 267 268 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) { 269 fastcc = false; 270 caldata = &sc->caldata; 271 } 272 273 if (!hchan) { 274 fastcc = false; 275 hchan = ah->curchan; 276 } 277 278 if (!ath_prepare_reset(sc)) 279 fastcc = false; 280 281 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n", 282 hchan->channel, IS_CHAN_HT40(hchan), fastcc); 283 284 r = ath9k_hw_reset(ah, hchan, caldata, fastcc); 285 if (r) { 286 ath_err(common, 287 "Unable to reset channel, reset status %d\n", r); 288 289 ath9k_hw_enable_interrupts(ah); 290 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG); 291 292 goto out; 293 } 294 295 if (ath9k_hw_mci_is_enabled(sc->sc_ah) && 296 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) 297 ath9k_mci_set_txpower(sc, true, false); 298 299 if (!ath_complete_reset(sc, true)) 300 r = -EIO; 301 302 out: 303 spin_unlock_bh(&sc->sc_pcu_lock); 304 tasklet_enable(&sc->intr_tq); 305 306 return r; 307 } 308 309 310 /* 311 * Set/change channels. If the channel is really being changed, it's done 312 * by reseting the chip. To accomplish this we must first cleanup any pending 313 * DMA, then restart stuff. 314 */ 315 static int ath_set_channel(struct ath_softc *sc, struct cfg80211_chan_def *chandef) 316 { 317 struct ath_hw *ah = sc->sc_ah; 318 struct ath_common *common = ath9k_hw_common(ah); 319 struct ieee80211_hw *hw = sc->hw; 320 struct ath9k_channel *hchan; 321 struct ieee80211_channel *chan = chandef->chan; 322 unsigned long flags; 323 bool offchannel; 324 int pos = chan->hw_value; 325 int old_pos = -1; 326 int r; 327 328 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) 329 return -EIO; 330 331 offchannel = !!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL); 332 333 if (ah->curchan) 334 old_pos = ah->curchan - &ah->channels[0]; 335 336 ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n", 337 chan->center_freq, chandef->width); 338 339 /* update survey stats for the old channel before switching */ 340 spin_lock_irqsave(&common->cc_lock, flags); 341 ath_update_survey_stats(sc); 342 spin_unlock_irqrestore(&common->cc_lock, flags); 343 344 ath9k_cmn_get_channel(hw, ah, chandef); 345 346 /* 347 * If the operating channel changes, change the survey in-use flags 348 * along with it. 349 * Reset the survey data for the new channel, unless we're switching 350 * back to the operating channel from an off-channel operation. 351 */ 352 if (!offchannel && sc->cur_survey != &sc->survey[pos]) { 353 if (sc->cur_survey) 354 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE; 355 356 sc->cur_survey = &sc->survey[pos]; 357 358 memset(sc->cur_survey, 0, sizeof(struct survey_info)); 359 sc->cur_survey->filled |= SURVEY_INFO_IN_USE; 360 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) { 361 memset(&sc->survey[pos], 0, sizeof(struct survey_info)); 362 } 363 364 hchan = &sc->sc_ah->channels[pos]; 365 r = ath_reset_internal(sc, hchan); 366 if (r) 367 return r; 368 369 /* 370 * The most recent snapshot of channel->noisefloor for the old 371 * channel is only available after the hardware reset. Copy it to 372 * the survey stats now. 373 */ 374 if (old_pos >= 0) 375 ath_update_survey_nf(sc, old_pos); 376 377 /* 378 * Enable radar pulse detection if on a DFS channel. Spectral 379 * scanning and radar detection can not be used concurrently. 380 */ 381 if (hw->conf.radar_enabled) { 382 u32 rxfilter; 383 384 /* set HW specific DFS configuration */ 385 ath9k_hw_set_radar_params(ah); 386 rxfilter = ath9k_hw_getrxfilter(ah); 387 rxfilter |= ATH9K_RX_FILTER_PHYRADAR | 388 ATH9K_RX_FILTER_PHYERR; 389 ath9k_hw_setrxfilter(ah, rxfilter); 390 ath_dbg(common, DFS, "DFS enabled at freq %d\n", 391 chan->center_freq); 392 } else { 393 /* perform spectral scan if requested. */ 394 if (test_bit(SC_OP_SCANNING, &sc->sc_flags) && 395 sc->spectral_mode == SPECTRAL_CHANSCAN) 396 ath9k_spectral_scan_trigger(hw); 397 } 398 399 return 0; 400 } 401 402 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta, 403 struct ieee80211_vif *vif) 404 { 405 struct ath_node *an; 406 an = (struct ath_node *)sta->drv_priv; 407 408 an->sc = sc; 409 an->sta = sta; 410 an->vif = vif; 411 412 ath_tx_node_init(sc, an); 413 414 if (sta->ht_cap.ht_supported) { 415 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + 416 sta->ht_cap.ampdu_factor); 417 an->mpdudensity = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density); 418 } 419 } 420 421 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta) 422 { 423 struct ath_node *an = (struct ath_node *)sta->drv_priv; 424 ath_tx_node_cleanup(sc, an); 425 } 426 427 void ath9k_tasklet(unsigned long data) 428 { 429 struct ath_softc *sc = (struct ath_softc *)data; 430 struct ath_hw *ah = sc->sc_ah; 431 struct ath_common *common = ath9k_hw_common(ah); 432 enum ath_reset_type type; 433 unsigned long flags; 434 u32 status = sc->intrstatus; 435 u32 rxmask; 436 437 ath9k_ps_wakeup(sc); 438 spin_lock(&sc->sc_pcu_lock); 439 440 if ((status & ATH9K_INT_FATAL) || 441 (status & ATH9K_INT_BB_WATCHDOG)) { 442 443 if (status & ATH9K_INT_FATAL) 444 type = RESET_TYPE_FATAL_INT; 445 else 446 type = RESET_TYPE_BB_WATCHDOG; 447 448 ath9k_queue_reset(sc, type); 449 450 /* 451 * Increment the ref. counter here so that 452 * interrupts are enabled in the reset routine. 453 */ 454 atomic_inc(&ah->intr_ref_cnt); 455 ath_dbg(common, ANY, "FATAL: Skipping interrupts\n"); 456 goto out; 457 } 458 459 spin_lock_irqsave(&sc->sc_pm_lock, flags); 460 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) { 461 /* 462 * TSF sync does not look correct; remain awake to sync with 463 * the next Beacon. 464 */ 465 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n"); 466 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC; 467 } 468 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 469 470 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 471 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL | 472 ATH9K_INT_RXORN); 473 else 474 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 475 476 if (status & rxmask) { 477 /* Check for high priority Rx first */ 478 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 479 (status & ATH9K_INT_RXHP)) 480 ath_rx_tasklet(sc, 0, true); 481 482 ath_rx_tasklet(sc, 0, false); 483 } 484 485 if (status & ATH9K_INT_TX) { 486 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 487 ath_tx_edma_tasklet(sc); 488 else 489 ath_tx_tasklet(sc); 490 } 491 492 ath9k_btcoex_handle_interrupt(sc, status); 493 494 /* re-enable hardware interrupt */ 495 ath9k_hw_enable_interrupts(ah); 496 out: 497 spin_unlock(&sc->sc_pcu_lock); 498 ath9k_ps_restore(sc); 499 } 500 501 irqreturn_t ath_isr(int irq, void *dev) 502 { 503 #define SCHED_INTR ( \ 504 ATH9K_INT_FATAL | \ 505 ATH9K_INT_BB_WATCHDOG | \ 506 ATH9K_INT_RXORN | \ 507 ATH9K_INT_RXEOL | \ 508 ATH9K_INT_RX | \ 509 ATH9K_INT_RXLP | \ 510 ATH9K_INT_RXHP | \ 511 ATH9K_INT_TX | \ 512 ATH9K_INT_BMISS | \ 513 ATH9K_INT_CST | \ 514 ATH9K_INT_TSFOOR | \ 515 ATH9K_INT_GENTIMER | \ 516 ATH9K_INT_MCI) 517 518 struct ath_softc *sc = dev; 519 struct ath_hw *ah = sc->sc_ah; 520 struct ath_common *common = ath9k_hw_common(ah); 521 enum ath9k_int status; 522 bool sched = false; 523 524 /* 525 * The hardware is not ready/present, don't 526 * touch anything. Note this can happen early 527 * on if the IRQ is shared. 528 */ 529 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) 530 return IRQ_NONE; 531 532 /* shared irq, not for us */ 533 534 if (!ath9k_hw_intrpend(ah)) 535 return IRQ_NONE; 536 537 if (test_bit(SC_OP_HW_RESET, &sc->sc_flags)) { 538 ath9k_hw_kill_interrupts(ah); 539 return IRQ_HANDLED; 540 } 541 542 /* 543 * Figure out the reason(s) for the interrupt. Note 544 * that the hal returns a pseudo-ISR that may include 545 * bits we haven't explicitly enabled so we mask the 546 * value to insure we only process bits we requested. 547 */ 548 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */ 549 status &= ah->imask; /* discard unasked-for bits */ 550 551 /* 552 * If there are no status bits set, then this interrupt was not 553 * for me (should have been caught above). 554 */ 555 if (!status) 556 return IRQ_NONE; 557 558 /* Cache the status */ 559 sc->intrstatus = status; 560 561 if (status & SCHED_INTR) 562 sched = true; 563 564 /* 565 * If a FATAL or RXORN interrupt is received, we have to reset the 566 * chip immediately. 567 */ 568 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) && 569 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA))) 570 goto chip_reset; 571 572 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 573 (status & ATH9K_INT_BB_WATCHDOG)) { 574 575 spin_lock(&common->cc_lock); 576 ath_hw_cycle_counters_update(common); 577 ar9003_hw_bb_watchdog_dbg_info(ah); 578 spin_unlock(&common->cc_lock); 579 580 goto chip_reset; 581 } 582 #ifdef CONFIG_PM_SLEEP 583 if (status & ATH9K_INT_BMISS) { 584 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) { 585 ath_dbg(common, ANY, "during WoW we got a BMISS\n"); 586 atomic_inc(&sc->wow_got_bmiss_intr); 587 atomic_dec(&sc->wow_sleep_proc_intr); 588 } 589 } 590 #endif 591 if (status & ATH9K_INT_SWBA) 592 tasklet_schedule(&sc->bcon_tasklet); 593 594 if (status & ATH9K_INT_TXURN) 595 ath9k_hw_updatetxtriglevel(ah, true); 596 597 if (status & ATH9K_INT_RXEOL) { 598 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 599 ath9k_hw_set_interrupts(ah); 600 } 601 602 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 603 if (status & ATH9K_INT_TIM_TIMER) { 604 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle)) 605 goto chip_reset; 606 /* Clear RxAbort bit so that we can 607 * receive frames */ 608 ath9k_setpower(sc, ATH9K_PM_AWAKE); 609 spin_lock(&sc->sc_pm_lock); 610 ath9k_hw_setrxabort(sc->sc_ah, 0); 611 sc->ps_flags |= PS_WAIT_FOR_BEACON; 612 spin_unlock(&sc->sc_pm_lock); 613 } 614 615 chip_reset: 616 617 ath_debug_stat_interrupt(sc, status); 618 619 if (sched) { 620 /* turn off every interrupt */ 621 ath9k_hw_disable_interrupts(ah); 622 tasklet_schedule(&sc->intr_tq); 623 } 624 625 return IRQ_HANDLED; 626 627 #undef SCHED_INTR 628 } 629 630 static int ath_reset(struct ath_softc *sc) 631 { 632 int r; 633 634 ath9k_ps_wakeup(sc); 635 r = ath_reset_internal(sc, NULL); 636 ath9k_ps_restore(sc); 637 638 return r; 639 } 640 641 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type) 642 { 643 #ifdef CONFIG_ATH9K_DEBUGFS 644 RESET_STAT_INC(sc, type); 645 #endif 646 set_bit(SC_OP_HW_RESET, &sc->sc_flags); 647 ieee80211_queue_work(sc->hw, &sc->hw_reset_work); 648 } 649 650 void ath_reset_work(struct work_struct *work) 651 { 652 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work); 653 654 ath_reset(sc); 655 } 656 657 /**********************/ 658 /* mac80211 callbacks */ 659 /**********************/ 660 661 static int ath9k_start(struct ieee80211_hw *hw) 662 { 663 struct ath_softc *sc = hw->priv; 664 struct ath_hw *ah = sc->sc_ah; 665 struct ath_common *common = ath9k_hw_common(ah); 666 struct ieee80211_channel *curchan = hw->conf.chandef.chan; 667 struct ath9k_channel *init_channel; 668 int r; 669 670 ath_dbg(common, CONFIG, 671 "Starting driver with initial channel: %d MHz\n", 672 curchan->center_freq); 673 674 ath9k_ps_wakeup(sc); 675 mutex_lock(&sc->mutex); 676 677 init_channel = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef); 678 679 /* Reset SERDES registers */ 680 ath9k_hw_configpcipowersave(ah, false); 681 682 /* 683 * The basic interface to setting the hardware in a good 684 * state is ``reset''. On return the hardware is known to 685 * be powered up and with interrupts disabled. This must 686 * be followed by initialization of the appropriate bits 687 * and then setup of the interrupt mask. 688 */ 689 spin_lock_bh(&sc->sc_pcu_lock); 690 691 atomic_set(&ah->intr_ref_cnt, -1); 692 693 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false); 694 if (r) { 695 ath_err(common, 696 "Unable to reset hardware; reset status %d (freq %u MHz)\n", 697 r, curchan->center_freq); 698 ah->reset_power_on = false; 699 } 700 701 /* Setup our intr mask. */ 702 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL | 703 ATH9K_INT_RXORN | ATH9K_INT_FATAL | 704 ATH9K_INT_GLOBAL; 705 706 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 707 ah->imask |= ATH9K_INT_RXHP | 708 ATH9K_INT_RXLP | 709 ATH9K_INT_BB_WATCHDOG; 710 else 711 ah->imask |= ATH9K_INT_RX; 712 713 ah->imask |= ATH9K_INT_GTT; 714 715 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) 716 ah->imask |= ATH9K_INT_CST; 717 718 ath_mci_enable(sc); 719 720 clear_bit(SC_OP_INVALID, &sc->sc_flags); 721 sc->sc_ah->is_monitoring = false; 722 723 if (!ath_complete_reset(sc, false)) 724 ah->reset_power_on = false; 725 726 if (ah->led_pin >= 0) { 727 ath9k_hw_cfg_output(ah, ah->led_pin, 728 AR_GPIO_OUTPUT_MUX_AS_OUTPUT); 729 ath9k_hw_set_gpio(ah, ah->led_pin, 0); 730 } 731 732 /* 733 * Reset key cache to sane defaults (all entries cleared) instead of 734 * semi-random values after suspend/resume. 735 */ 736 ath9k_cmn_init_crypto(sc->sc_ah); 737 738 spin_unlock_bh(&sc->sc_pcu_lock); 739 740 mutex_unlock(&sc->mutex); 741 742 ath9k_ps_restore(sc); 743 744 return 0; 745 } 746 747 static void ath9k_tx(struct ieee80211_hw *hw, 748 struct ieee80211_tx_control *control, 749 struct sk_buff *skb) 750 { 751 struct ath_softc *sc = hw->priv; 752 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 753 struct ath_tx_control txctl; 754 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; 755 unsigned long flags; 756 757 if (sc->ps_enabled) { 758 /* 759 * mac80211 does not set PM field for normal data frames, so we 760 * need to update that based on the current PS mode. 761 */ 762 if (ieee80211_is_data(hdr->frame_control) && 763 !ieee80211_is_nullfunc(hdr->frame_control) && 764 !ieee80211_has_pm(hdr->frame_control)) { 765 ath_dbg(common, PS, 766 "Add PM=1 for a TX frame while in PS mode\n"); 767 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM); 768 } 769 } 770 771 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) { 772 /* 773 * We are using PS-Poll and mac80211 can request TX while in 774 * power save mode. Need to wake up hardware for the TX to be 775 * completed and if needed, also for RX of buffered frames. 776 */ 777 ath9k_ps_wakeup(sc); 778 spin_lock_irqsave(&sc->sc_pm_lock, flags); 779 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 780 ath9k_hw_setrxabort(sc->sc_ah, 0); 781 if (ieee80211_is_pspoll(hdr->frame_control)) { 782 ath_dbg(common, PS, 783 "Sending PS-Poll to pick a buffered frame\n"); 784 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA; 785 } else { 786 ath_dbg(common, PS, "Wake up to complete TX\n"); 787 sc->ps_flags |= PS_WAIT_FOR_TX_ACK; 788 } 789 /* 790 * The actual restore operation will happen only after 791 * the ps_flags bit is cleared. We are just dropping 792 * the ps_usecount here. 793 */ 794 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 795 ath9k_ps_restore(sc); 796 } 797 798 /* 799 * Cannot tx while the hardware is in full sleep, it first needs a full 800 * chip reset to recover from that 801 */ 802 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) { 803 ath_err(common, "TX while HW is in FULL_SLEEP mode\n"); 804 goto exit; 805 } 806 807 memset(&txctl, 0, sizeof(struct ath_tx_control)); 808 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)]; 809 txctl.sta = control->sta; 810 811 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb); 812 813 if (ath_tx_start(hw, skb, &txctl) != 0) { 814 ath_dbg(common, XMIT, "TX failed\n"); 815 TX_STAT_INC(txctl.txq->axq_qnum, txfailed); 816 goto exit; 817 } 818 819 return; 820 exit: 821 ieee80211_free_txskb(hw, skb); 822 } 823 824 static void ath9k_stop(struct ieee80211_hw *hw) 825 { 826 struct ath_softc *sc = hw->priv; 827 struct ath_hw *ah = sc->sc_ah; 828 struct ath_common *common = ath9k_hw_common(ah); 829 bool prev_idle; 830 831 mutex_lock(&sc->mutex); 832 833 ath_cancel_work(sc); 834 del_timer_sync(&sc->rx_poll_timer); 835 836 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) { 837 ath_dbg(common, ANY, "Device not present\n"); 838 mutex_unlock(&sc->mutex); 839 return; 840 } 841 842 /* Ensure HW is awake when we try to shut it down. */ 843 ath9k_ps_wakeup(sc); 844 845 spin_lock_bh(&sc->sc_pcu_lock); 846 847 /* prevent tasklets to enable interrupts once we disable them */ 848 ah->imask &= ~ATH9K_INT_GLOBAL; 849 850 /* make sure h/w will not generate any interrupt 851 * before setting the invalid flag. */ 852 ath9k_hw_disable_interrupts(ah); 853 854 spin_unlock_bh(&sc->sc_pcu_lock); 855 856 /* we can now sync irq and kill any running tasklets, since we already 857 * disabled interrupts and not holding a spin lock */ 858 synchronize_irq(sc->irq); 859 tasklet_kill(&sc->intr_tq); 860 tasklet_kill(&sc->bcon_tasklet); 861 862 prev_idle = sc->ps_idle; 863 sc->ps_idle = true; 864 865 spin_lock_bh(&sc->sc_pcu_lock); 866 867 if (ah->led_pin >= 0) { 868 ath9k_hw_set_gpio(ah, ah->led_pin, 1); 869 ath9k_hw_cfg_gpio_input(ah, ah->led_pin); 870 } 871 872 ath_prepare_reset(sc); 873 874 if (sc->rx.frag) { 875 dev_kfree_skb_any(sc->rx.frag); 876 sc->rx.frag = NULL; 877 } 878 879 if (!ah->curchan) 880 ah->curchan = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef); 881 882 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false); 883 ath9k_hw_phy_disable(ah); 884 885 ath9k_hw_configpcipowersave(ah, true); 886 887 spin_unlock_bh(&sc->sc_pcu_lock); 888 889 ath9k_ps_restore(sc); 890 891 set_bit(SC_OP_INVALID, &sc->sc_flags); 892 sc->ps_idle = prev_idle; 893 894 mutex_unlock(&sc->mutex); 895 896 ath_dbg(common, CONFIG, "Driver halt\n"); 897 } 898 899 static bool ath9k_uses_beacons(int type) 900 { 901 switch (type) { 902 case NL80211_IFTYPE_AP: 903 case NL80211_IFTYPE_ADHOC: 904 case NL80211_IFTYPE_MESH_POINT: 905 return true; 906 default: 907 return false; 908 } 909 } 910 911 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 912 { 913 struct ath9k_vif_iter_data *iter_data = data; 914 int i; 915 916 if (iter_data->has_hw_macaddr) { 917 for (i = 0; i < ETH_ALEN; i++) 918 iter_data->mask[i] &= 919 ~(iter_data->hw_macaddr[i] ^ mac[i]); 920 } else { 921 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN); 922 iter_data->has_hw_macaddr = true; 923 } 924 925 switch (vif->type) { 926 case NL80211_IFTYPE_AP: 927 iter_data->naps++; 928 break; 929 case NL80211_IFTYPE_STATION: 930 iter_data->nstations++; 931 break; 932 case NL80211_IFTYPE_ADHOC: 933 iter_data->nadhocs++; 934 break; 935 case NL80211_IFTYPE_MESH_POINT: 936 iter_data->nmeshes++; 937 break; 938 case NL80211_IFTYPE_WDS: 939 iter_data->nwds++; 940 break; 941 default: 942 break; 943 } 944 } 945 946 static void ath9k_sta_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 947 { 948 struct ath_softc *sc = data; 949 struct ath_vif *avp = (void *)vif->drv_priv; 950 951 if (vif->type != NL80211_IFTYPE_STATION) 952 return; 953 954 if (avp->primary_sta_vif) 955 ath9k_set_assoc_state(sc, vif); 956 } 957 958 /* Called with sc->mutex held. */ 959 void ath9k_calculate_iter_data(struct ieee80211_hw *hw, 960 struct ieee80211_vif *vif, 961 struct ath9k_vif_iter_data *iter_data) 962 { 963 struct ath_softc *sc = hw->priv; 964 struct ath_hw *ah = sc->sc_ah; 965 struct ath_common *common = ath9k_hw_common(ah); 966 967 /* 968 * Use the hardware MAC address as reference, the hardware uses it 969 * together with the BSSID mask when matching addresses. 970 */ 971 memset(iter_data, 0, sizeof(*iter_data)); 972 memset(&iter_data->mask, 0xff, ETH_ALEN); 973 974 if (vif) 975 ath9k_vif_iter(iter_data, vif->addr, vif); 976 977 /* Get list of all active MAC addresses */ 978 ieee80211_iterate_active_interfaces_atomic( 979 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL, 980 ath9k_vif_iter, iter_data); 981 982 memcpy(common->macaddr, iter_data->hw_macaddr, ETH_ALEN); 983 } 984 985 /* Called with sc->mutex held. */ 986 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw, 987 struct ieee80211_vif *vif) 988 { 989 struct ath_softc *sc = hw->priv; 990 struct ath_hw *ah = sc->sc_ah; 991 struct ath_common *common = ath9k_hw_common(ah); 992 struct ath9k_vif_iter_data iter_data; 993 enum nl80211_iftype old_opmode = ah->opmode; 994 995 ath9k_calculate_iter_data(hw, vif, &iter_data); 996 997 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN); 998 ath_hw_setbssidmask(common); 999 1000 if (iter_data.naps > 0) { 1001 ath9k_hw_set_tsfadjust(ah, true); 1002 ah->opmode = NL80211_IFTYPE_AP; 1003 } else { 1004 ath9k_hw_set_tsfadjust(ah, false); 1005 1006 if (iter_data.nmeshes) 1007 ah->opmode = NL80211_IFTYPE_MESH_POINT; 1008 else if (iter_data.nwds) 1009 ah->opmode = NL80211_IFTYPE_AP; 1010 else if (iter_data.nadhocs) 1011 ah->opmode = NL80211_IFTYPE_ADHOC; 1012 else 1013 ah->opmode = NL80211_IFTYPE_STATION; 1014 } 1015 1016 ath9k_hw_setopmode(ah); 1017 1018 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) 1019 ah->imask |= ATH9K_INT_TSFOOR; 1020 else 1021 ah->imask &= ~ATH9K_INT_TSFOOR; 1022 1023 ath9k_hw_set_interrupts(ah); 1024 1025 /* 1026 * If we are changing the opmode to STATION, 1027 * a beacon sync needs to be done. 1028 */ 1029 if (ah->opmode == NL80211_IFTYPE_STATION && 1030 old_opmode == NL80211_IFTYPE_AP && 1031 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) { 1032 ieee80211_iterate_active_interfaces_atomic( 1033 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL, 1034 ath9k_sta_vif_iter, sc); 1035 } 1036 } 1037 1038 static int ath9k_add_interface(struct ieee80211_hw *hw, 1039 struct ieee80211_vif *vif) 1040 { 1041 struct ath_softc *sc = hw->priv; 1042 struct ath_hw *ah = sc->sc_ah; 1043 struct ath_common *common = ath9k_hw_common(ah); 1044 struct ath_vif *avp = (void *)vif->drv_priv; 1045 struct ath_node *an = &avp->mcast_node; 1046 1047 mutex_lock(&sc->mutex); 1048 1049 if (config_enabled(CONFIG_ATH9K_TX99)) { 1050 if (sc->nvifs >= 1) { 1051 mutex_unlock(&sc->mutex); 1052 return -EOPNOTSUPP; 1053 } 1054 sc->tx99_vif = vif; 1055 } 1056 1057 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type); 1058 sc->nvifs++; 1059 1060 ath9k_ps_wakeup(sc); 1061 ath9k_calculate_summary_state(hw, vif); 1062 ath9k_ps_restore(sc); 1063 1064 if (ath9k_uses_beacons(vif->type)) 1065 ath9k_beacon_assign_slot(sc, vif); 1066 1067 an->sc = sc; 1068 an->sta = NULL; 1069 an->vif = vif; 1070 an->no_ps_filter = true; 1071 ath_tx_node_init(sc, an); 1072 1073 mutex_unlock(&sc->mutex); 1074 return 0; 1075 } 1076 1077 static int ath9k_change_interface(struct ieee80211_hw *hw, 1078 struct ieee80211_vif *vif, 1079 enum nl80211_iftype new_type, 1080 bool p2p) 1081 { 1082 struct ath_softc *sc = hw->priv; 1083 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1084 1085 mutex_lock(&sc->mutex); 1086 1087 if (config_enabled(CONFIG_ATH9K_TX99)) { 1088 mutex_unlock(&sc->mutex); 1089 return -EOPNOTSUPP; 1090 } 1091 1092 ath_dbg(common, CONFIG, "Change Interface\n"); 1093 1094 if (ath9k_uses_beacons(vif->type)) 1095 ath9k_beacon_remove_slot(sc, vif); 1096 1097 vif->type = new_type; 1098 vif->p2p = p2p; 1099 1100 ath9k_ps_wakeup(sc); 1101 ath9k_calculate_summary_state(hw, vif); 1102 ath9k_ps_restore(sc); 1103 1104 if (ath9k_uses_beacons(vif->type)) 1105 ath9k_beacon_assign_slot(sc, vif); 1106 1107 mutex_unlock(&sc->mutex); 1108 return 0; 1109 } 1110 1111 static void ath9k_remove_interface(struct ieee80211_hw *hw, 1112 struct ieee80211_vif *vif) 1113 { 1114 struct ath_softc *sc = hw->priv; 1115 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1116 struct ath_vif *avp = (void *)vif->drv_priv; 1117 1118 ath_dbg(common, CONFIG, "Detach Interface\n"); 1119 1120 mutex_lock(&sc->mutex); 1121 1122 sc->nvifs--; 1123 sc->tx99_vif = NULL; 1124 1125 if (ath9k_uses_beacons(vif->type)) 1126 ath9k_beacon_remove_slot(sc, vif); 1127 1128 if (sc->csa_vif == vif) 1129 sc->csa_vif = NULL; 1130 1131 ath9k_ps_wakeup(sc); 1132 ath9k_calculate_summary_state(hw, NULL); 1133 ath9k_ps_restore(sc); 1134 1135 ath_tx_node_cleanup(sc, &avp->mcast_node); 1136 1137 mutex_unlock(&sc->mutex); 1138 } 1139 1140 static void ath9k_enable_ps(struct ath_softc *sc) 1141 { 1142 struct ath_hw *ah = sc->sc_ah; 1143 struct ath_common *common = ath9k_hw_common(ah); 1144 1145 if (config_enabled(CONFIG_ATH9K_TX99)) 1146 return; 1147 1148 sc->ps_enabled = true; 1149 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1150 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) { 1151 ah->imask |= ATH9K_INT_TIM_TIMER; 1152 ath9k_hw_set_interrupts(ah); 1153 } 1154 ath9k_hw_setrxabort(ah, 1); 1155 } 1156 ath_dbg(common, PS, "PowerSave enabled\n"); 1157 } 1158 1159 static void ath9k_disable_ps(struct ath_softc *sc) 1160 { 1161 struct ath_hw *ah = sc->sc_ah; 1162 struct ath_common *common = ath9k_hw_common(ah); 1163 1164 if (config_enabled(CONFIG_ATH9K_TX99)) 1165 return; 1166 1167 sc->ps_enabled = false; 1168 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE); 1169 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1170 ath9k_hw_setrxabort(ah, 0); 1171 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON | 1172 PS_WAIT_FOR_CAB | 1173 PS_WAIT_FOR_PSPOLL_DATA | 1174 PS_WAIT_FOR_TX_ACK); 1175 if (ah->imask & ATH9K_INT_TIM_TIMER) { 1176 ah->imask &= ~ATH9K_INT_TIM_TIMER; 1177 ath9k_hw_set_interrupts(ah); 1178 } 1179 } 1180 ath_dbg(common, PS, "PowerSave disabled\n"); 1181 } 1182 1183 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw) 1184 { 1185 struct ath_softc *sc = hw->priv; 1186 struct ath_hw *ah = sc->sc_ah; 1187 struct ath_common *common = ath9k_hw_common(ah); 1188 u32 rxfilter; 1189 1190 if (config_enabled(CONFIG_ATH9K_TX99)) 1191 return; 1192 1193 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) { 1194 ath_err(common, "spectrum analyzer not implemented on this hardware\n"); 1195 return; 1196 } 1197 1198 ath9k_ps_wakeup(sc); 1199 rxfilter = ath9k_hw_getrxfilter(ah); 1200 ath9k_hw_setrxfilter(ah, rxfilter | 1201 ATH9K_RX_FILTER_PHYRADAR | 1202 ATH9K_RX_FILTER_PHYERR); 1203 1204 /* TODO: usually this should not be neccesary, but for some reason 1205 * (or in some mode?) the trigger must be called after the 1206 * configuration, otherwise the register will have its values reset 1207 * (on my ar9220 to value 0x01002310) 1208 */ 1209 ath9k_spectral_scan_config(hw, sc->spectral_mode); 1210 ath9k_hw_ops(ah)->spectral_scan_trigger(ah); 1211 ath9k_ps_restore(sc); 1212 } 1213 1214 int ath9k_spectral_scan_config(struct ieee80211_hw *hw, 1215 enum spectral_mode spectral_mode) 1216 { 1217 struct ath_softc *sc = hw->priv; 1218 struct ath_hw *ah = sc->sc_ah; 1219 struct ath_common *common = ath9k_hw_common(ah); 1220 1221 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) { 1222 ath_err(common, "spectrum analyzer not implemented on this hardware\n"); 1223 return -1; 1224 } 1225 1226 switch (spectral_mode) { 1227 case SPECTRAL_DISABLED: 1228 sc->spec_config.enabled = 0; 1229 break; 1230 case SPECTRAL_BACKGROUND: 1231 /* send endless samples. 1232 * TODO: is this really useful for "background"? 1233 */ 1234 sc->spec_config.endless = 1; 1235 sc->spec_config.enabled = 1; 1236 break; 1237 case SPECTRAL_CHANSCAN: 1238 case SPECTRAL_MANUAL: 1239 sc->spec_config.endless = 0; 1240 sc->spec_config.enabled = 1; 1241 break; 1242 default: 1243 return -1; 1244 } 1245 1246 ath9k_ps_wakeup(sc); 1247 ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config); 1248 ath9k_ps_restore(sc); 1249 1250 sc->spectral_mode = spectral_mode; 1251 1252 return 0; 1253 } 1254 1255 static int ath9k_config(struct ieee80211_hw *hw, u32 changed) 1256 { 1257 struct ath_softc *sc = hw->priv; 1258 struct ath_hw *ah = sc->sc_ah; 1259 struct ath_common *common = ath9k_hw_common(ah); 1260 struct ieee80211_conf *conf = &hw->conf; 1261 bool reset_channel = false; 1262 1263 ath9k_ps_wakeup(sc); 1264 mutex_lock(&sc->mutex); 1265 1266 if (changed & IEEE80211_CONF_CHANGE_IDLE) { 1267 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE); 1268 if (sc->ps_idle) { 1269 ath_cancel_work(sc); 1270 ath9k_stop_btcoex(sc); 1271 } else { 1272 ath9k_start_btcoex(sc); 1273 /* 1274 * The chip needs a reset to properly wake up from 1275 * full sleep 1276 */ 1277 reset_channel = ah->chip_fullsleep; 1278 } 1279 } 1280 1281 /* 1282 * We just prepare to enable PS. We have to wait until our AP has 1283 * ACK'd our null data frame to disable RX otherwise we'll ignore 1284 * those ACKs and end up retransmitting the same null data frames. 1285 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode. 1286 */ 1287 if (changed & IEEE80211_CONF_CHANGE_PS) { 1288 unsigned long flags; 1289 spin_lock_irqsave(&sc->sc_pm_lock, flags); 1290 if (conf->flags & IEEE80211_CONF_PS) 1291 ath9k_enable_ps(sc); 1292 else 1293 ath9k_disable_ps(sc); 1294 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1295 } 1296 1297 if (changed & IEEE80211_CONF_CHANGE_MONITOR) { 1298 if (conf->flags & IEEE80211_CONF_MONITOR) { 1299 ath_dbg(common, CONFIG, "Monitor mode is enabled\n"); 1300 sc->sc_ah->is_monitoring = true; 1301 } else { 1302 ath_dbg(common, CONFIG, "Monitor mode is disabled\n"); 1303 sc->sc_ah->is_monitoring = false; 1304 } 1305 } 1306 1307 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) { 1308 if (ath_set_channel(sc, &hw->conf.chandef) < 0) { 1309 ath_err(common, "Unable to set channel\n"); 1310 mutex_unlock(&sc->mutex); 1311 ath9k_ps_restore(sc); 1312 return -EINVAL; 1313 } 1314 } 1315 1316 if (changed & IEEE80211_CONF_CHANGE_POWER) { 1317 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level); 1318 sc->config.txpowlimit = 2 * conf->power_level; 1319 ath9k_cmn_update_txpow(ah, sc->curtxpow, 1320 sc->config.txpowlimit, &sc->curtxpow); 1321 } 1322 1323 mutex_unlock(&sc->mutex); 1324 ath9k_ps_restore(sc); 1325 1326 return 0; 1327 } 1328 1329 #define SUPPORTED_FILTERS \ 1330 (FIF_PROMISC_IN_BSS | \ 1331 FIF_ALLMULTI | \ 1332 FIF_CONTROL | \ 1333 FIF_PSPOLL | \ 1334 FIF_OTHER_BSS | \ 1335 FIF_BCN_PRBRESP_PROMISC | \ 1336 FIF_PROBE_REQ | \ 1337 FIF_FCSFAIL) 1338 1339 /* FIXME: sc->sc_full_reset ? */ 1340 static void ath9k_configure_filter(struct ieee80211_hw *hw, 1341 unsigned int changed_flags, 1342 unsigned int *total_flags, 1343 u64 multicast) 1344 { 1345 struct ath_softc *sc = hw->priv; 1346 u32 rfilt; 1347 1348 changed_flags &= SUPPORTED_FILTERS; 1349 *total_flags &= SUPPORTED_FILTERS; 1350 1351 sc->rx.rxfilter = *total_flags; 1352 ath9k_ps_wakeup(sc); 1353 rfilt = ath_calcrxfilter(sc); 1354 ath9k_hw_setrxfilter(sc->sc_ah, rfilt); 1355 ath9k_ps_restore(sc); 1356 1357 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n", 1358 rfilt); 1359 } 1360 1361 static int ath9k_sta_add(struct ieee80211_hw *hw, 1362 struct ieee80211_vif *vif, 1363 struct ieee80211_sta *sta) 1364 { 1365 struct ath_softc *sc = hw->priv; 1366 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1367 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1368 struct ieee80211_key_conf ps_key = { }; 1369 int key; 1370 1371 ath_node_attach(sc, sta, vif); 1372 1373 if (vif->type != NL80211_IFTYPE_AP && 1374 vif->type != NL80211_IFTYPE_AP_VLAN) 1375 return 0; 1376 1377 key = ath_key_config(common, vif, sta, &ps_key); 1378 if (key > 0) 1379 an->ps_key = key; 1380 1381 return 0; 1382 } 1383 1384 static void ath9k_del_ps_key(struct ath_softc *sc, 1385 struct ieee80211_vif *vif, 1386 struct ieee80211_sta *sta) 1387 { 1388 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1389 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1390 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key }; 1391 1392 if (!an->ps_key) 1393 return; 1394 1395 ath_key_delete(common, &ps_key); 1396 an->ps_key = 0; 1397 } 1398 1399 static int ath9k_sta_remove(struct ieee80211_hw *hw, 1400 struct ieee80211_vif *vif, 1401 struct ieee80211_sta *sta) 1402 { 1403 struct ath_softc *sc = hw->priv; 1404 1405 ath9k_del_ps_key(sc, vif, sta); 1406 ath_node_detach(sc, sta); 1407 1408 return 0; 1409 } 1410 1411 static void ath9k_sta_notify(struct ieee80211_hw *hw, 1412 struct ieee80211_vif *vif, 1413 enum sta_notify_cmd cmd, 1414 struct ieee80211_sta *sta) 1415 { 1416 struct ath_softc *sc = hw->priv; 1417 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1418 1419 switch (cmd) { 1420 case STA_NOTIFY_SLEEP: 1421 an->sleeping = true; 1422 ath_tx_aggr_sleep(sta, sc, an); 1423 break; 1424 case STA_NOTIFY_AWAKE: 1425 an->sleeping = false; 1426 ath_tx_aggr_wakeup(sc, an); 1427 break; 1428 } 1429 } 1430 1431 static int ath9k_conf_tx(struct ieee80211_hw *hw, 1432 struct ieee80211_vif *vif, u16 queue, 1433 const struct ieee80211_tx_queue_params *params) 1434 { 1435 struct ath_softc *sc = hw->priv; 1436 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1437 struct ath_txq *txq; 1438 struct ath9k_tx_queue_info qi; 1439 int ret = 0; 1440 1441 if (queue >= IEEE80211_NUM_ACS) 1442 return 0; 1443 1444 txq = sc->tx.txq_map[queue]; 1445 1446 ath9k_ps_wakeup(sc); 1447 mutex_lock(&sc->mutex); 1448 1449 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); 1450 1451 qi.tqi_aifs = params->aifs; 1452 qi.tqi_cwmin = params->cw_min; 1453 qi.tqi_cwmax = params->cw_max; 1454 qi.tqi_burstTime = params->txop * 32; 1455 1456 ath_dbg(common, CONFIG, 1457 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", 1458 queue, txq->axq_qnum, params->aifs, params->cw_min, 1459 params->cw_max, params->txop); 1460 1461 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime); 1462 ret = ath_txq_update(sc, txq->axq_qnum, &qi); 1463 if (ret) 1464 ath_err(common, "TXQ Update failed\n"); 1465 1466 mutex_unlock(&sc->mutex); 1467 ath9k_ps_restore(sc); 1468 1469 return ret; 1470 } 1471 1472 static int ath9k_set_key(struct ieee80211_hw *hw, 1473 enum set_key_cmd cmd, 1474 struct ieee80211_vif *vif, 1475 struct ieee80211_sta *sta, 1476 struct ieee80211_key_conf *key) 1477 { 1478 struct ath_softc *sc = hw->priv; 1479 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1480 int ret = 0; 1481 1482 if (ath9k_modparam_nohwcrypt) 1483 return -ENOSPC; 1484 1485 if ((vif->type == NL80211_IFTYPE_ADHOC || 1486 vif->type == NL80211_IFTYPE_MESH_POINT) && 1487 (key->cipher == WLAN_CIPHER_SUITE_TKIP || 1488 key->cipher == WLAN_CIPHER_SUITE_CCMP) && 1489 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { 1490 /* 1491 * For now, disable hw crypto for the RSN IBSS group keys. This 1492 * could be optimized in the future to use a modified key cache 1493 * design to support per-STA RX GTK, but until that gets 1494 * implemented, use of software crypto for group addressed 1495 * frames is a acceptable to allow RSN IBSS to be used. 1496 */ 1497 return -EOPNOTSUPP; 1498 } 1499 1500 mutex_lock(&sc->mutex); 1501 ath9k_ps_wakeup(sc); 1502 ath_dbg(common, CONFIG, "Set HW Key\n"); 1503 1504 switch (cmd) { 1505 case SET_KEY: 1506 if (sta) 1507 ath9k_del_ps_key(sc, vif, sta); 1508 1509 ret = ath_key_config(common, vif, sta, key); 1510 if (ret >= 0) { 1511 key->hw_key_idx = ret; 1512 /* push IV and Michael MIC generation to stack */ 1513 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 1514 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) 1515 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; 1516 if (sc->sc_ah->sw_mgmt_crypto && 1517 key->cipher == WLAN_CIPHER_SUITE_CCMP) 1518 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX; 1519 ret = 0; 1520 } 1521 break; 1522 case DISABLE_KEY: 1523 ath_key_delete(common, key); 1524 break; 1525 default: 1526 ret = -EINVAL; 1527 } 1528 1529 ath9k_ps_restore(sc); 1530 mutex_unlock(&sc->mutex); 1531 1532 return ret; 1533 } 1534 1535 static void ath9k_set_assoc_state(struct ath_softc *sc, 1536 struct ieee80211_vif *vif) 1537 { 1538 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1539 struct ath_vif *avp = (void *)vif->drv_priv; 1540 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; 1541 unsigned long flags; 1542 1543 set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags); 1544 avp->primary_sta_vif = true; 1545 1546 /* 1547 * Set the AID, BSSID and do beacon-sync only when 1548 * the HW opmode is STATION. 1549 * 1550 * But the primary bit is set above in any case. 1551 */ 1552 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION) 1553 return; 1554 1555 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); 1556 common->curaid = bss_conf->aid; 1557 ath9k_hw_write_associd(sc->sc_ah); 1558 1559 sc->last_rssi = ATH_RSSI_DUMMY_MARKER; 1560 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER; 1561 1562 spin_lock_irqsave(&sc->sc_pm_lock, flags); 1563 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON; 1564 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1565 1566 if (ath9k_hw_mci_is_enabled(sc->sc_ah)) 1567 ath9k_mci_update_wlan_channels(sc, false); 1568 1569 ath_dbg(common, CONFIG, 1570 "Primary Station interface: %pM, BSSID: %pM\n", 1571 vif->addr, common->curbssid); 1572 } 1573 1574 static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 1575 { 1576 struct ath_softc *sc = data; 1577 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; 1578 1579 if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) 1580 return; 1581 1582 if (bss_conf->assoc) 1583 ath9k_set_assoc_state(sc, vif); 1584 } 1585 1586 static void ath9k_bss_info_changed(struct ieee80211_hw *hw, 1587 struct ieee80211_vif *vif, 1588 struct ieee80211_bss_conf *bss_conf, 1589 u32 changed) 1590 { 1591 #define CHECK_ANI \ 1592 (BSS_CHANGED_ASSOC | \ 1593 BSS_CHANGED_IBSS | \ 1594 BSS_CHANGED_BEACON_ENABLED) 1595 1596 struct ath_softc *sc = hw->priv; 1597 struct ath_hw *ah = sc->sc_ah; 1598 struct ath_common *common = ath9k_hw_common(ah); 1599 struct ath_vif *avp = (void *)vif->drv_priv; 1600 int slottime; 1601 1602 ath9k_ps_wakeup(sc); 1603 mutex_lock(&sc->mutex); 1604 1605 if (changed & BSS_CHANGED_ASSOC) { 1606 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n", 1607 bss_conf->bssid, bss_conf->assoc); 1608 1609 if (avp->primary_sta_vif && !bss_conf->assoc) { 1610 clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags); 1611 avp->primary_sta_vif = false; 1612 1613 if (ah->opmode == NL80211_IFTYPE_STATION) 1614 clear_bit(SC_OP_BEACONS, &sc->sc_flags); 1615 } 1616 1617 ieee80211_iterate_active_interfaces_atomic( 1618 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL, 1619 ath9k_bss_assoc_iter, sc); 1620 1621 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags) && 1622 ah->opmode == NL80211_IFTYPE_STATION) { 1623 memset(common->curbssid, 0, ETH_ALEN); 1624 common->curaid = 0; 1625 ath9k_hw_write_associd(sc->sc_ah); 1626 if (ath9k_hw_mci_is_enabled(sc->sc_ah)) 1627 ath9k_mci_update_wlan_channels(sc, true); 1628 } 1629 } 1630 1631 if (changed & BSS_CHANGED_IBSS) { 1632 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); 1633 common->curaid = bss_conf->aid; 1634 ath9k_hw_write_associd(sc->sc_ah); 1635 } 1636 1637 if ((changed & BSS_CHANGED_BEACON_ENABLED) || 1638 (changed & BSS_CHANGED_BEACON_INT)) { 1639 if (ah->opmode == NL80211_IFTYPE_AP && 1640 bss_conf->enable_beacon) 1641 ath9k_set_tsfadjust(sc, vif); 1642 if (ath9k_allow_beacon_config(sc, vif)) 1643 ath9k_beacon_config(sc, vif, changed); 1644 } 1645 1646 if (changed & BSS_CHANGED_ERP_SLOT) { 1647 if (bss_conf->use_short_slot) 1648 slottime = 9; 1649 else 1650 slottime = 20; 1651 if (vif->type == NL80211_IFTYPE_AP) { 1652 /* 1653 * Defer update, so that connected stations can adjust 1654 * their settings at the same time. 1655 * See beacon.c for more details 1656 */ 1657 sc->beacon.slottime = slottime; 1658 sc->beacon.updateslot = UPDATE; 1659 } else { 1660 ah->slottime = slottime; 1661 ath9k_hw_init_global_settings(ah); 1662 } 1663 } 1664 1665 if (changed & CHECK_ANI) 1666 ath_check_ani(sc); 1667 1668 mutex_unlock(&sc->mutex); 1669 ath9k_ps_restore(sc); 1670 1671 #undef CHECK_ANI 1672 } 1673 1674 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1675 { 1676 struct ath_softc *sc = hw->priv; 1677 u64 tsf; 1678 1679 mutex_lock(&sc->mutex); 1680 ath9k_ps_wakeup(sc); 1681 tsf = ath9k_hw_gettsf64(sc->sc_ah); 1682 ath9k_ps_restore(sc); 1683 mutex_unlock(&sc->mutex); 1684 1685 return tsf; 1686 } 1687 1688 static void ath9k_set_tsf(struct ieee80211_hw *hw, 1689 struct ieee80211_vif *vif, 1690 u64 tsf) 1691 { 1692 struct ath_softc *sc = hw->priv; 1693 1694 mutex_lock(&sc->mutex); 1695 ath9k_ps_wakeup(sc); 1696 ath9k_hw_settsf64(sc->sc_ah, tsf); 1697 ath9k_ps_restore(sc); 1698 mutex_unlock(&sc->mutex); 1699 } 1700 1701 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1702 { 1703 struct ath_softc *sc = hw->priv; 1704 1705 mutex_lock(&sc->mutex); 1706 1707 ath9k_ps_wakeup(sc); 1708 ath9k_hw_reset_tsf(sc->sc_ah); 1709 ath9k_ps_restore(sc); 1710 1711 mutex_unlock(&sc->mutex); 1712 } 1713 1714 static int ath9k_ampdu_action(struct ieee80211_hw *hw, 1715 struct ieee80211_vif *vif, 1716 enum ieee80211_ampdu_mlme_action action, 1717 struct ieee80211_sta *sta, 1718 u16 tid, u16 *ssn, u8 buf_size) 1719 { 1720 struct ath_softc *sc = hw->priv; 1721 bool flush = false; 1722 int ret = 0; 1723 1724 mutex_lock(&sc->mutex); 1725 1726 switch (action) { 1727 case IEEE80211_AMPDU_RX_START: 1728 break; 1729 case IEEE80211_AMPDU_RX_STOP: 1730 break; 1731 case IEEE80211_AMPDU_TX_START: 1732 ath9k_ps_wakeup(sc); 1733 ret = ath_tx_aggr_start(sc, sta, tid, ssn); 1734 if (!ret) 1735 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1736 ath9k_ps_restore(sc); 1737 break; 1738 case IEEE80211_AMPDU_TX_STOP_FLUSH: 1739 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: 1740 flush = true; 1741 case IEEE80211_AMPDU_TX_STOP_CONT: 1742 ath9k_ps_wakeup(sc); 1743 ath_tx_aggr_stop(sc, sta, tid); 1744 if (!flush) 1745 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1746 ath9k_ps_restore(sc); 1747 break; 1748 case IEEE80211_AMPDU_TX_OPERATIONAL: 1749 ath9k_ps_wakeup(sc); 1750 ath_tx_aggr_resume(sc, sta, tid); 1751 ath9k_ps_restore(sc); 1752 break; 1753 default: 1754 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n"); 1755 } 1756 1757 mutex_unlock(&sc->mutex); 1758 1759 return ret; 1760 } 1761 1762 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx, 1763 struct survey_info *survey) 1764 { 1765 struct ath_softc *sc = hw->priv; 1766 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1767 struct ieee80211_supported_band *sband; 1768 struct ieee80211_channel *chan; 1769 unsigned long flags; 1770 int pos; 1771 1772 if (config_enabled(CONFIG_ATH9K_TX99)) 1773 return -EOPNOTSUPP; 1774 1775 spin_lock_irqsave(&common->cc_lock, flags); 1776 if (idx == 0) 1777 ath_update_survey_stats(sc); 1778 1779 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ]; 1780 if (sband && idx >= sband->n_channels) { 1781 idx -= sband->n_channels; 1782 sband = NULL; 1783 } 1784 1785 if (!sband) 1786 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ]; 1787 1788 if (!sband || idx >= sband->n_channels) { 1789 spin_unlock_irqrestore(&common->cc_lock, flags); 1790 return -ENOENT; 1791 } 1792 1793 chan = &sband->channels[idx]; 1794 pos = chan->hw_value; 1795 memcpy(survey, &sc->survey[pos], sizeof(*survey)); 1796 survey->channel = chan; 1797 spin_unlock_irqrestore(&common->cc_lock, flags); 1798 1799 return 0; 1800 } 1801 1802 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class) 1803 { 1804 struct ath_softc *sc = hw->priv; 1805 struct ath_hw *ah = sc->sc_ah; 1806 1807 if (config_enabled(CONFIG_ATH9K_TX99)) 1808 return; 1809 1810 mutex_lock(&sc->mutex); 1811 ah->coverage_class = coverage_class; 1812 1813 ath9k_ps_wakeup(sc); 1814 ath9k_hw_init_global_settings(ah); 1815 ath9k_ps_restore(sc); 1816 1817 mutex_unlock(&sc->mutex); 1818 } 1819 1820 static void ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop) 1821 { 1822 struct ath_softc *sc = hw->priv; 1823 struct ath_hw *ah = sc->sc_ah; 1824 struct ath_common *common = ath9k_hw_common(ah); 1825 int timeout = 200; /* ms */ 1826 int i, j; 1827 bool drain_txq; 1828 1829 mutex_lock(&sc->mutex); 1830 cancel_delayed_work_sync(&sc->tx_complete_work); 1831 1832 if (ah->ah_flags & AH_UNPLUGGED) { 1833 ath_dbg(common, ANY, "Device has been unplugged!\n"); 1834 mutex_unlock(&sc->mutex); 1835 return; 1836 } 1837 1838 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) { 1839 ath_dbg(common, ANY, "Device not present\n"); 1840 mutex_unlock(&sc->mutex); 1841 return; 1842 } 1843 1844 for (j = 0; j < timeout; j++) { 1845 bool npend = false; 1846 1847 if (j) 1848 usleep_range(1000, 2000); 1849 1850 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 1851 if (!ATH_TXQ_SETUP(sc, i)) 1852 continue; 1853 1854 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]); 1855 1856 if (npend) 1857 break; 1858 } 1859 1860 if (!npend) 1861 break; 1862 } 1863 1864 if (drop) { 1865 ath9k_ps_wakeup(sc); 1866 spin_lock_bh(&sc->sc_pcu_lock); 1867 drain_txq = ath_drain_all_txq(sc); 1868 spin_unlock_bh(&sc->sc_pcu_lock); 1869 1870 if (!drain_txq) 1871 ath_reset(sc); 1872 1873 ath9k_ps_restore(sc); 1874 ieee80211_wake_queues(hw); 1875 } 1876 1877 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0); 1878 mutex_unlock(&sc->mutex); 1879 } 1880 1881 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw) 1882 { 1883 struct ath_softc *sc = hw->priv; 1884 int i; 1885 1886 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 1887 if (!ATH_TXQ_SETUP(sc, i)) 1888 continue; 1889 1890 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i])) 1891 return true; 1892 } 1893 return false; 1894 } 1895 1896 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw) 1897 { 1898 struct ath_softc *sc = hw->priv; 1899 struct ath_hw *ah = sc->sc_ah; 1900 struct ieee80211_vif *vif; 1901 struct ath_vif *avp; 1902 struct ath_buf *bf; 1903 struct ath_tx_status ts; 1904 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); 1905 int status; 1906 1907 vif = sc->beacon.bslot[0]; 1908 if (!vif) 1909 return 0; 1910 1911 if (!vif->bss_conf.enable_beacon) 1912 return 0; 1913 1914 avp = (void *)vif->drv_priv; 1915 1916 if (!sc->beacon.tx_processed && !edma) { 1917 tasklet_disable(&sc->bcon_tasklet); 1918 1919 bf = avp->av_bcbuf; 1920 if (!bf || !bf->bf_mpdu) 1921 goto skip; 1922 1923 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts); 1924 if (status == -EINPROGRESS) 1925 goto skip; 1926 1927 sc->beacon.tx_processed = true; 1928 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK); 1929 1930 skip: 1931 tasklet_enable(&sc->bcon_tasklet); 1932 } 1933 1934 return sc->beacon.tx_last; 1935 } 1936 1937 static int ath9k_get_stats(struct ieee80211_hw *hw, 1938 struct ieee80211_low_level_stats *stats) 1939 { 1940 struct ath_softc *sc = hw->priv; 1941 struct ath_hw *ah = sc->sc_ah; 1942 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats; 1943 1944 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad; 1945 stats->dot11RTSFailureCount = mib_stats->rts_bad; 1946 stats->dot11FCSErrorCount = mib_stats->fcs_bad; 1947 stats->dot11RTSSuccessCount = mib_stats->rts_good; 1948 return 0; 1949 } 1950 1951 static u32 fill_chainmask(u32 cap, u32 new) 1952 { 1953 u32 filled = 0; 1954 int i; 1955 1956 for (i = 0; cap && new; i++, cap >>= 1) { 1957 if (!(cap & BIT(0))) 1958 continue; 1959 1960 if (new & BIT(0)) 1961 filled |= BIT(i); 1962 1963 new >>= 1; 1964 } 1965 1966 return filled; 1967 } 1968 1969 static bool validate_antenna_mask(struct ath_hw *ah, u32 val) 1970 { 1971 if (AR_SREV_9300_20_OR_LATER(ah)) 1972 return true; 1973 1974 switch (val & 0x7) { 1975 case 0x1: 1976 case 0x3: 1977 case 0x7: 1978 return true; 1979 case 0x2: 1980 return (ah->caps.rx_chainmask == 1); 1981 default: 1982 return false; 1983 } 1984 } 1985 1986 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) 1987 { 1988 struct ath_softc *sc = hw->priv; 1989 struct ath_hw *ah = sc->sc_ah; 1990 1991 if (ah->caps.rx_chainmask != 1) 1992 rx_ant |= tx_ant; 1993 1994 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant) 1995 return -EINVAL; 1996 1997 sc->ant_rx = rx_ant; 1998 sc->ant_tx = tx_ant; 1999 2000 if (ah->caps.rx_chainmask == 1) 2001 return 0; 2002 2003 /* AR9100 runs into calibration issues if not all rx chains are enabled */ 2004 if (AR_SREV_9100(ah)) 2005 ah->rxchainmask = 0x7; 2006 else 2007 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant); 2008 2009 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant); 2010 ath9k_reload_chainmask_settings(sc); 2011 2012 return 0; 2013 } 2014 2015 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant) 2016 { 2017 struct ath_softc *sc = hw->priv; 2018 2019 *tx_ant = sc->ant_tx; 2020 *rx_ant = sc->ant_rx; 2021 return 0; 2022 } 2023 2024 #ifdef CONFIG_PM_SLEEP 2025 2026 static void ath9k_wow_map_triggers(struct ath_softc *sc, 2027 struct cfg80211_wowlan *wowlan, 2028 u32 *wow_triggers) 2029 { 2030 if (wowlan->disconnect) 2031 *wow_triggers |= AH_WOW_LINK_CHANGE | 2032 AH_WOW_BEACON_MISS; 2033 if (wowlan->magic_pkt) 2034 *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN; 2035 2036 if (wowlan->n_patterns) 2037 *wow_triggers |= AH_WOW_USER_PATTERN_EN; 2038 2039 sc->wow_enabled = *wow_triggers; 2040 2041 } 2042 2043 static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc) 2044 { 2045 struct ath_hw *ah = sc->sc_ah; 2046 struct ath_common *common = ath9k_hw_common(ah); 2047 int pattern_count = 0; 2048 int i, byte_cnt; 2049 u8 dis_deauth_pattern[MAX_PATTERN_SIZE]; 2050 u8 dis_deauth_mask[MAX_PATTERN_SIZE]; 2051 2052 memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE); 2053 memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE); 2054 2055 /* 2056 * Create Dissassociate / Deauthenticate packet filter 2057 * 2058 * 2 bytes 2 byte 6 bytes 6 bytes 6 bytes 2059 * +--------------+----------+---------+--------+--------+---- 2060 * + Frame Control+ Duration + DA + SA + BSSID + 2061 * +--------------+----------+---------+--------+--------+---- 2062 * 2063 * The above is the management frame format for disassociate/ 2064 * deauthenticate pattern, from this we need to match the first byte 2065 * of 'Frame Control' and DA, SA, and BSSID fields 2066 * (skipping 2nd byte of FC and Duration feild. 2067 * 2068 * Disassociate pattern 2069 * -------------------- 2070 * Frame control = 00 00 1010 2071 * DA, SA, BSSID = x:x:x:x:x:x 2072 * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x 2073 * | x:x:x:x:x:x -- 22 bytes 2074 * 2075 * Deauthenticate pattern 2076 * ---------------------- 2077 * Frame control = 00 00 1100 2078 * DA, SA, BSSID = x:x:x:x:x:x 2079 * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x 2080 * | x:x:x:x:x:x -- 22 bytes 2081 */ 2082 2083 /* Create Disassociate Pattern first */ 2084 2085 byte_cnt = 0; 2086 2087 /* Fill out the mask with all FF's */ 2088 2089 for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++) 2090 dis_deauth_mask[i] = 0xff; 2091 2092 /* copy the first byte of frame control field */ 2093 dis_deauth_pattern[byte_cnt] = 0xa0; 2094 byte_cnt++; 2095 2096 /* skip 2nd byte of frame control and Duration field */ 2097 byte_cnt += 3; 2098 2099 /* 2100 * need not match the destination mac address, it can be a broadcast 2101 * mac address or an unicast to this station 2102 */ 2103 byte_cnt += 6; 2104 2105 /* copy the source mac address */ 2106 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN); 2107 2108 byte_cnt += 6; 2109 2110 /* copy the bssid, its same as the source mac address */ 2111 2112 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN); 2113 2114 /* Create Disassociate pattern mask */ 2115 2116 dis_deauth_mask[0] = 0xfe; 2117 dis_deauth_mask[1] = 0x03; 2118 dis_deauth_mask[2] = 0xc0; 2119 2120 ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n"); 2121 2122 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask, 2123 pattern_count, byte_cnt); 2124 2125 pattern_count++; 2126 /* 2127 * for de-authenticate pattern, only the first byte of the frame 2128 * control field gets changed from 0xA0 to 0xC0 2129 */ 2130 dis_deauth_pattern[0] = 0xC0; 2131 2132 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask, 2133 pattern_count, byte_cnt); 2134 2135 } 2136 2137 static void ath9k_wow_add_pattern(struct ath_softc *sc, 2138 struct cfg80211_wowlan *wowlan) 2139 { 2140 struct ath_hw *ah = sc->sc_ah; 2141 struct ath9k_wow_pattern *wow_pattern = NULL; 2142 struct cfg80211_pkt_pattern *patterns = wowlan->patterns; 2143 int mask_len; 2144 s8 i = 0; 2145 2146 if (!wowlan->n_patterns) 2147 return; 2148 2149 /* 2150 * Add the new user configured patterns 2151 */ 2152 for (i = 0; i < wowlan->n_patterns; i++) { 2153 2154 wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL); 2155 2156 if (!wow_pattern) 2157 return; 2158 2159 /* 2160 * TODO: convert the generic user space pattern to 2161 * appropriate chip specific/802.11 pattern. 2162 */ 2163 2164 mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8); 2165 memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE); 2166 memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE); 2167 memcpy(wow_pattern->pattern_bytes, patterns[i].pattern, 2168 patterns[i].pattern_len); 2169 memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len); 2170 wow_pattern->pattern_len = patterns[i].pattern_len; 2171 2172 /* 2173 * just need to take care of deauth and disssoc pattern, 2174 * make sure we don't overwrite them. 2175 */ 2176 2177 ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes, 2178 wow_pattern->mask_bytes, 2179 i + 2, 2180 wow_pattern->pattern_len); 2181 kfree(wow_pattern); 2182 2183 } 2184 2185 } 2186 2187 static int ath9k_suspend(struct ieee80211_hw *hw, 2188 struct cfg80211_wowlan *wowlan) 2189 { 2190 struct ath_softc *sc = hw->priv; 2191 struct ath_hw *ah = sc->sc_ah; 2192 struct ath_common *common = ath9k_hw_common(ah); 2193 u32 wow_triggers_enabled = 0; 2194 int ret = 0; 2195 2196 mutex_lock(&sc->mutex); 2197 2198 ath_cancel_work(sc); 2199 ath_stop_ani(sc); 2200 del_timer_sync(&sc->rx_poll_timer); 2201 2202 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) { 2203 ath_dbg(common, ANY, "Device not present\n"); 2204 ret = -EINVAL; 2205 goto fail_wow; 2206 } 2207 2208 if (WARN_ON(!wowlan)) { 2209 ath_dbg(common, WOW, "None of the WoW triggers enabled\n"); 2210 ret = -EINVAL; 2211 goto fail_wow; 2212 } 2213 2214 if (!device_can_wakeup(sc->dev)) { 2215 ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n"); 2216 ret = 1; 2217 goto fail_wow; 2218 } 2219 2220 /* 2221 * none of the sta vifs are associated 2222 * and we are not currently handling multivif 2223 * cases, for instance we have to seperately 2224 * configure 'keep alive frame' for each 2225 * STA. 2226 */ 2227 2228 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) { 2229 ath_dbg(common, WOW, "None of the STA vifs are associated\n"); 2230 ret = 1; 2231 goto fail_wow; 2232 } 2233 2234 if (sc->nvifs > 1) { 2235 ath_dbg(common, WOW, "WoW for multivif is not yet supported\n"); 2236 ret = 1; 2237 goto fail_wow; 2238 } 2239 2240 ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled); 2241 2242 ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n", 2243 wow_triggers_enabled); 2244 2245 ath9k_ps_wakeup(sc); 2246 2247 ath9k_stop_btcoex(sc); 2248 2249 /* 2250 * Enable wake up on recieving disassoc/deauth 2251 * frame by default. 2252 */ 2253 ath9k_wow_add_disassoc_deauth_pattern(sc); 2254 2255 if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN) 2256 ath9k_wow_add_pattern(sc, wowlan); 2257 2258 spin_lock_bh(&sc->sc_pcu_lock); 2259 /* 2260 * To avoid false wake, we enable beacon miss interrupt only 2261 * when we go to sleep. We save the current interrupt mask 2262 * so we can restore it after the system wakes up 2263 */ 2264 sc->wow_intr_before_sleep = ah->imask; 2265 ah->imask &= ~ATH9K_INT_GLOBAL; 2266 ath9k_hw_disable_interrupts(ah); 2267 ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL; 2268 ath9k_hw_set_interrupts(ah); 2269 ath9k_hw_enable_interrupts(ah); 2270 2271 spin_unlock_bh(&sc->sc_pcu_lock); 2272 2273 /* 2274 * we can now sync irq and kill any running tasklets, since we already 2275 * disabled interrupts and not holding a spin lock 2276 */ 2277 synchronize_irq(sc->irq); 2278 tasklet_kill(&sc->intr_tq); 2279 2280 ath9k_hw_wow_enable(ah, wow_triggers_enabled); 2281 2282 ath9k_ps_restore(sc); 2283 ath_dbg(common, ANY, "WoW enabled in ath9k\n"); 2284 atomic_inc(&sc->wow_sleep_proc_intr); 2285 2286 fail_wow: 2287 mutex_unlock(&sc->mutex); 2288 return ret; 2289 } 2290 2291 static int ath9k_resume(struct ieee80211_hw *hw) 2292 { 2293 struct ath_softc *sc = hw->priv; 2294 struct ath_hw *ah = sc->sc_ah; 2295 struct ath_common *common = ath9k_hw_common(ah); 2296 u32 wow_status; 2297 2298 mutex_lock(&sc->mutex); 2299 2300 ath9k_ps_wakeup(sc); 2301 2302 spin_lock_bh(&sc->sc_pcu_lock); 2303 2304 ath9k_hw_disable_interrupts(ah); 2305 ah->imask = sc->wow_intr_before_sleep; 2306 ath9k_hw_set_interrupts(ah); 2307 ath9k_hw_enable_interrupts(ah); 2308 2309 spin_unlock_bh(&sc->sc_pcu_lock); 2310 2311 wow_status = ath9k_hw_wow_wakeup(ah); 2312 2313 if (atomic_read(&sc->wow_got_bmiss_intr) == 0) { 2314 /* 2315 * some devices may not pick beacon miss 2316 * as the reason they woke up so we add 2317 * that here for that shortcoming. 2318 */ 2319 wow_status |= AH_WOW_BEACON_MISS; 2320 atomic_dec(&sc->wow_got_bmiss_intr); 2321 ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n"); 2322 } 2323 2324 atomic_dec(&sc->wow_sleep_proc_intr); 2325 2326 if (wow_status) { 2327 ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n", 2328 ath9k_hw_wow_event_to_string(wow_status), wow_status); 2329 } 2330 2331 ath_restart_work(sc); 2332 ath9k_start_btcoex(sc); 2333 2334 ath9k_ps_restore(sc); 2335 mutex_unlock(&sc->mutex); 2336 2337 return 0; 2338 } 2339 2340 static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled) 2341 { 2342 struct ath_softc *sc = hw->priv; 2343 2344 mutex_lock(&sc->mutex); 2345 device_init_wakeup(sc->dev, 1); 2346 device_set_wakeup_enable(sc->dev, enabled); 2347 mutex_unlock(&sc->mutex); 2348 } 2349 2350 #endif 2351 static void ath9k_sw_scan_start(struct ieee80211_hw *hw) 2352 { 2353 struct ath_softc *sc = hw->priv; 2354 set_bit(SC_OP_SCANNING, &sc->sc_flags); 2355 } 2356 2357 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw) 2358 { 2359 struct ath_softc *sc = hw->priv; 2360 clear_bit(SC_OP_SCANNING, &sc->sc_flags); 2361 } 2362 2363 static void ath9k_channel_switch_beacon(struct ieee80211_hw *hw, 2364 struct ieee80211_vif *vif, 2365 struct cfg80211_chan_def *chandef) 2366 { 2367 struct ath_softc *sc = hw->priv; 2368 2369 /* mac80211 does not support CSA in multi-if cases (yet) */ 2370 if (WARN_ON(sc->csa_vif)) 2371 return; 2372 2373 sc->csa_vif = vif; 2374 } 2375 2376 static void ath9k_tx99_stop(struct ath_softc *sc) 2377 { 2378 struct ath_hw *ah = sc->sc_ah; 2379 struct ath_common *common = ath9k_hw_common(ah); 2380 2381 ath_drain_all_txq(sc); 2382 ath_startrecv(sc); 2383 2384 ath9k_hw_set_interrupts(ah); 2385 ath9k_hw_enable_interrupts(ah); 2386 2387 ieee80211_wake_queues(sc->hw); 2388 2389 kfree_skb(sc->tx99_skb); 2390 sc->tx99_skb = NULL; 2391 sc->tx99_state = false; 2392 2393 ath9k_hw_tx99_stop(sc->sc_ah); 2394 ath_dbg(common, XMIT, "TX99 stopped\n"); 2395 } 2396 2397 static struct sk_buff *ath9k_build_tx99_skb(struct ath_softc *sc) 2398 { 2399 static u8 PN9Data[] = {0xff, 0x87, 0xb8, 0x59, 0xb7, 0xa1, 0xcc, 0x24, 2400 0x57, 0x5e, 0x4b, 0x9c, 0x0e, 0xe9, 0xea, 0x50, 2401 0x2a, 0xbe, 0xb4, 0x1b, 0xb6, 0xb0, 0x5d, 0xf1, 2402 0xe6, 0x9a, 0xe3, 0x45, 0xfd, 0x2c, 0x53, 0x18, 2403 0x0c, 0xca, 0xc9, 0xfb, 0x49, 0x37, 0xe5, 0xa8, 2404 0x51, 0x3b, 0x2f, 0x61, 0xaa, 0x72, 0x18, 0x84, 2405 0x02, 0x23, 0x23, 0xab, 0x63, 0x89, 0x51, 0xb3, 2406 0xe7, 0x8b, 0x72, 0x90, 0x4c, 0xe8, 0xfb, 0xc0}; 2407 u32 len = 1200; 2408 struct ieee80211_hw *hw = sc->hw; 2409 struct ieee80211_hdr *hdr; 2410 struct ieee80211_tx_info *tx_info; 2411 struct sk_buff *skb; 2412 2413 skb = alloc_skb(len, GFP_KERNEL); 2414 if (!skb) 2415 return NULL; 2416 2417 skb_put(skb, len); 2418 2419 memset(skb->data, 0, len); 2420 2421 hdr = (struct ieee80211_hdr *)skb->data; 2422 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA); 2423 hdr->duration_id = 0; 2424 2425 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN); 2426 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN); 2427 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN); 2428 2429 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no); 2430 2431 tx_info = IEEE80211_SKB_CB(skb); 2432 memset(tx_info, 0, sizeof(*tx_info)); 2433 tx_info->band = hw->conf.chandef.chan->band; 2434 tx_info->flags = IEEE80211_TX_CTL_NO_ACK; 2435 tx_info->control.vif = sc->tx99_vif; 2436 2437 memcpy(skb->data + sizeof(*hdr), PN9Data, sizeof(PN9Data)); 2438 2439 return skb; 2440 } 2441 2442 void ath9k_tx99_deinit(struct ath_softc *sc) 2443 { 2444 ath_reset(sc); 2445 2446 ath9k_ps_wakeup(sc); 2447 ath9k_tx99_stop(sc); 2448 ath9k_ps_restore(sc); 2449 } 2450 2451 int ath9k_tx99_init(struct ath_softc *sc) 2452 { 2453 struct ieee80211_hw *hw = sc->hw; 2454 struct ath_hw *ah = sc->sc_ah; 2455 struct ath_common *common = ath9k_hw_common(ah); 2456 struct ath_tx_control txctl; 2457 int r; 2458 2459 if (sc->sc_flags & SC_OP_INVALID) { 2460 ath_err(common, 2461 "driver is in invalid state unable to use TX99"); 2462 return -EINVAL; 2463 } 2464 2465 sc->tx99_skb = ath9k_build_tx99_skb(sc); 2466 if (!sc->tx99_skb) 2467 return -ENOMEM; 2468 2469 memset(&txctl, 0, sizeof(txctl)); 2470 txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO]; 2471 2472 ath_reset(sc); 2473 2474 ath9k_ps_wakeup(sc); 2475 2476 ath9k_hw_disable_interrupts(ah); 2477 atomic_set(&ah->intr_ref_cnt, -1); 2478 ath_drain_all_txq(sc); 2479 ath_stoprecv(sc); 2480 2481 sc->tx99_state = true; 2482 2483 ieee80211_stop_queues(hw); 2484 2485 if (sc->tx99_power == MAX_RATE_POWER + 1) 2486 sc->tx99_power = MAX_RATE_POWER; 2487 2488 ath9k_hw_tx99_set_txpower(ah, sc->tx99_power); 2489 r = ath9k_tx99_send(sc, sc->tx99_skb, &txctl); 2490 if (r) { 2491 ath_dbg(common, XMIT, "Failed to xmit TX99 skb\n"); 2492 return r; 2493 } 2494 2495 ath_dbg(common, XMIT, "TX99 xmit started using %d ( %ddBm)\n", 2496 sc->tx99_power, 2497 sc->tx99_power / 2); 2498 2499 /* We leave the harware awake as it will be chugging on */ 2500 2501 return 0; 2502 } 2503 2504 struct ieee80211_ops ath9k_ops = { 2505 .tx = ath9k_tx, 2506 .start = ath9k_start, 2507 .stop = ath9k_stop, 2508 .add_interface = ath9k_add_interface, 2509 .change_interface = ath9k_change_interface, 2510 .remove_interface = ath9k_remove_interface, 2511 .config = ath9k_config, 2512 .configure_filter = ath9k_configure_filter, 2513 .sta_add = ath9k_sta_add, 2514 .sta_remove = ath9k_sta_remove, 2515 .sta_notify = ath9k_sta_notify, 2516 .conf_tx = ath9k_conf_tx, 2517 .bss_info_changed = ath9k_bss_info_changed, 2518 .set_key = ath9k_set_key, 2519 .get_tsf = ath9k_get_tsf, 2520 .set_tsf = ath9k_set_tsf, 2521 .reset_tsf = ath9k_reset_tsf, 2522 .ampdu_action = ath9k_ampdu_action, 2523 .get_survey = ath9k_get_survey, 2524 .rfkill_poll = ath9k_rfkill_poll_state, 2525 .set_coverage_class = ath9k_set_coverage_class, 2526 .flush = ath9k_flush, 2527 .tx_frames_pending = ath9k_tx_frames_pending, 2528 .tx_last_beacon = ath9k_tx_last_beacon, 2529 .release_buffered_frames = ath9k_release_buffered_frames, 2530 .get_stats = ath9k_get_stats, 2531 .set_antenna = ath9k_set_antenna, 2532 .get_antenna = ath9k_get_antenna, 2533 2534 #ifdef CONFIG_PM_SLEEP 2535 .suspend = ath9k_suspend, 2536 .resume = ath9k_resume, 2537 .set_wakeup = ath9k_set_wakeup, 2538 #endif 2539 2540 #ifdef CONFIG_ATH9K_DEBUGFS 2541 .get_et_sset_count = ath9k_get_et_sset_count, 2542 .get_et_stats = ath9k_get_et_stats, 2543 .get_et_strings = ath9k_get_et_strings, 2544 #endif 2545 2546 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS) 2547 .sta_add_debugfs = ath9k_sta_add_debugfs, 2548 #endif 2549 .sw_scan_start = ath9k_sw_scan_start, 2550 .sw_scan_complete = ath9k_sw_scan_complete, 2551 .channel_switch_beacon = ath9k_channel_switch_beacon, 2552 }; 2553