1 /* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/nl80211.h> 18 #include <linux/delay.h> 19 #include "ath9k.h" 20 #include "btcoex.h" 21 22 static void ath9k_set_assoc_state(struct ath_softc *sc, 23 struct ieee80211_vif *vif); 24 25 u8 ath9k_parse_mpdudensity(u8 mpdudensity) 26 { 27 /* 28 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing": 29 * 0 for no restriction 30 * 1 for 1/4 us 31 * 2 for 1/2 us 32 * 3 for 1 us 33 * 4 for 2 us 34 * 5 for 4 us 35 * 6 for 8 us 36 * 7 for 16 us 37 */ 38 switch (mpdudensity) { 39 case 0: 40 return 0; 41 case 1: 42 case 2: 43 case 3: 44 /* Our lower layer calculations limit our precision to 45 1 microsecond */ 46 return 1; 47 case 4: 48 return 2; 49 case 5: 50 return 4; 51 case 6: 52 return 8; 53 case 7: 54 return 16; 55 default: 56 return 0; 57 } 58 } 59 60 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq) 61 { 62 bool pending = false; 63 64 spin_lock_bh(&txq->axq_lock); 65 66 if (txq->axq_depth || !list_empty(&txq->axq_acq)) 67 pending = true; 68 69 spin_unlock_bh(&txq->axq_lock); 70 return pending; 71 } 72 73 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode) 74 { 75 unsigned long flags; 76 bool ret; 77 78 spin_lock_irqsave(&sc->sc_pm_lock, flags); 79 ret = ath9k_hw_setpower(sc->sc_ah, mode); 80 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 81 82 return ret; 83 } 84 85 void ath9k_ps_wakeup(struct ath_softc *sc) 86 { 87 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 88 unsigned long flags; 89 enum ath9k_power_mode power_mode; 90 91 spin_lock_irqsave(&sc->sc_pm_lock, flags); 92 if (++sc->ps_usecount != 1) 93 goto unlock; 94 95 power_mode = sc->sc_ah->power_mode; 96 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); 97 98 /* 99 * While the hardware is asleep, the cycle counters contain no 100 * useful data. Better clear them now so that they don't mess up 101 * survey data results. 102 */ 103 if (power_mode != ATH9K_PM_AWAKE) { 104 spin_lock(&common->cc_lock); 105 ath_hw_cycle_counters_update(common); 106 memset(&common->cc_survey, 0, sizeof(common->cc_survey)); 107 memset(&common->cc_ani, 0, sizeof(common->cc_ani)); 108 spin_unlock(&common->cc_lock); 109 } 110 111 unlock: 112 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 113 } 114 115 void ath9k_ps_restore(struct ath_softc *sc) 116 { 117 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 118 enum ath9k_power_mode mode; 119 unsigned long flags; 120 bool reset; 121 122 spin_lock_irqsave(&sc->sc_pm_lock, flags); 123 if (--sc->ps_usecount != 0) 124 goto unlock; 125 126 if (sc->ps_idle) { 127 ath9k_hw_setrxabort(sc->sc_ah, 1); 128 ath9k_hw_stopdmarecv(sc->sc_ah, &reset); 129 mode = ATH9K_PM_FULL_SLEEP; 130 } else if (sc->ps_enabled && 131 !(sc->ps_flags & (PS_WAIT_FOR_BEACON | 132 PS_WAIT_FOR_CAB | 133 PS_WAIT_FOR_PSPOLL_DATA | 134 PS_WAIT_FOR_TX_ACK | 135 PS_WAIT_FOR_ANI))) { 136 mode = ATH9K_PM_NETWORK_SLEEP; 137 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah)) 138 ath9k_btcoex_stop_gen_timer(sc); 139 } else { 140 goto unlock; 141 } 142 143 spin_lock(&common->cc_lock); 144 ath_hw_cycle_counters_update(common); 145 spin_unlock(&common->cc_lock); 146 147 ath9k_hw_setpower(sc->sc_ah, mode); 148 149 unlock: 150 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 151 } 152 153 static void __ath_cancel_work(struct ath_softc *sc) 154 { 155 cancel_work_sync(&sc->paprd_work); 156 cancel_work_sync(&sc->hw_check_work); 157 cancel_delayed_work_sync(&sc->tx_complete_work); 158 cancel_delayed_work_sync(&sc->hw_pll_work); 159 160 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 161 if (ath9k_hw_mci_is_enabled(sc->sc_ah)) 162 cancel_work_sync(&sc->mci_work); 163 #endif 164 } 165 166 static void ath_cancel_work(struct ath_softc *sc) 167 { 168 __ath_cancel_work(sc); 169 cancel_work_sync(&sc->hw_reset_work); 170 } 171 172 static void ath_restart_work(struct ath_softc *sc) 173 { 174 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); 175 176 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9485(sc->sc_ah) || 177 AR_SREV_9550(sc->sc_ah)) 178 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, 179 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL)); 180 181 ath_start_rx_poll(sc, 3); 182 ath_start_ani(sc); 183 } 184 185 static bool ath_prepare_reset(struct ath_softc *sc) 186 { 187 struct ath_hw *ah = sc->sc_ah; 188 bool ret = true; 189 190 ieee80211_stop_queues(sc->hw); 191 192 sc->hw_busy_count = 0; 193 ath_stop_ani(sc); 194 del_timer_sync(&sc->rx_poll_timer); 195 196 ath9k_debug_samp_bb_mac(sc); 197 ath9k_hw_disable_interrupts(ah); 198 199 if (!ath_drain_all_txq(sc)) 200 ret = false; 201 202 if (!ath_stoprecv(sc)) 203 ret = false; 204 205 return ret; 206 } 207 208 static bool ath_complete_reset(struct ath_softc *sc, bool start) 209 { 210 struct ath_hw *ah = sc->sc_ah; 211 struct ath_common *common = ath9k_hw_common(ah); 212 unsigned long flags; 213 214 if (ath_startrecv(sc) != 0) { 215 ath_err(common, "Unable to restart recv logic\n"); 216 return false; 217 } 218 219 ath9k_cmn_update_txpow(ah, sc->curtxpow, 220 sc->config.txpowlimit, &sc->curtxpow); 221 222 clear_bit(SC_OP_HW_RESET, &sc->sc_flags); 223 ath9k_hw_set_interrupts(ah); 224 ath9k_hw_enable_interrupts(ah); 225 226 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) { 227 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags)) 228 goto work; 229 230 if (ah->opmode == NL80211_IFTYPE_STATION && 231 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) { 232 spin_lock_irqsave(&sc->sc_pm_lock, flags); 233 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON; 234 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 235 } else { 236 ath9k_set_beacon(sc); 237 } 238 work: 239 ath_restart_work(sc); 240 } 241 242 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) 243 ath_ant_comb_update(sc); 244 245 ieee80211_wake_queues(sc->hw); 246 247 return true; 248 } 249 250 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan) 251 { 252 struct ath_hw *ah = sc->sc_ah; 253 struct ath_common *common = ath9k_hw_common(ah); 254 struct ath9k_hw_cal_data *caldata = NULL; 255 bool fastcc = true; 256 int r; 257 258 __ath_cancel_work(sc); 259 260 tasklet_disable(&sc->intr_tq); 261 spin_lock_bh(&sc->sc_pcu_lock); 262 263 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) { 264 fastcc = false; 265 caldata = &sc->caldata; 266 } 267 268 if (!hchan) { 269 fastcc = false; 270 hchan = ah->curchan; 271 } 272 273 if (!ath_prepare_reset(sc)) 274 fastcc = false; 275 276 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n", 277 hchan->channel, IS_CHAN_HT40(hchan), fastcc); 278 279 r = ath9k_hw_reset(ah, hchan, caldata, fastcc); 280 if (r) { 281 ath_err(common, 282 "Unable to reset channel, reset status %d\n", r); 283 284 ath9k_hw_enable_interrupts(ah); 285 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG); 286 287 goto out; 288 } 289 290 if (ath9k_hw_mci_is_enabled(sc->sc_ah) && 291 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) 292 ath9k_mci_set_txpower(sc, true, false); 293 294 if (!ath_complete_reset(sc, true)) 295 r = -EIO; 296 297 out: 298 spin_unlock_bh(&sc->sc_pcu_lock); 299 tasklet_enable(&sc->intr_tq); 300 301 return r; 302 } 303 304 305 /* 306 * Set/change channels. If the channel is really being changed, it's done 307 * by reseting the chip. To accomplish this we must first cleanup any pending 308 * DMA, then restart stuff. 309 */ 310 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, 311 struct ath9k_channel *hchan) 312 { 313 int r; 314 315 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) 316 return -EIO; 317 318 r = ath_reset_internal(sc, hchan); 319 320 return r; 321 } 322 323 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta, 324 struct ieee80211_vif *vif) 325 { 326 struct ath_node *an; 327 an = (struct ath_node *)sta->drv_priv; 328 329 an->sc = sc; 330 an->sta = sta; 331 an->vif = vif; 332 333 ath_tx_node_init(sc, an); 334 335 if (sta->ht_cap.ht_supported) { 336 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + 337 sta->ht_cap.ampdu_factor); 338 an->mpdudensity = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density); 339 } 340 } 341 342 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta) 343 { 344 struct ath_node *an = (struct ath_node *)sta->drv_priv; 345 ath_tx_node_cleanup(sc, an); 346 } 347 348 void ath9k_tasklet(unsigned long data) 349 { 350 struct ath_softc *sc = (struct ath_softc *)data; 351 struct ath_hw *ah = sc->sc_ah; 352 struct ath_common *common = ath9k_hw_common(ah); 353 enum ath_reset_type type; 354 unsigned long flags; 355 u32 status = sc->intrstatus; 356 u32 rxmask; 357 358 ath9k_ps_wakeup(sc); 359 spin_lock(&sc->sc_pcu_lock); 360 361 if ((status & ATH9K_INT_FATAL) || 362 (status & ATH9K_INT_BB_WATCHDOG)) { 363 364 if (status & ATH9K_INT_FATAL) 365 type = RESET_TYPE_FATAL_INT; 366 else 367 type = RESET_TYPE_BB_WATCHDOG; 368 369 ath9k_queue_reset(sc, type); 370 goto out; 371 } 372 373 spin_lock_irqsave(&sc->sc_pm_lock, flags); 374 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) { 375 /* 376 * TSF sync does not look correct; remain awake to sync with 377 * the next Beacon. 378 */ 379 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n"); 380 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC; 381 } 382 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 383 384 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 385 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL | 386 ATH9K_INT_RXORN); 387 else 388 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 389 390 if (status & rxmask) { 391 /* Check for high priority Rx first */ 392 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 393 (status & ATH9K_INT_RXHP)) 394 ath_rx_tasklet(sc, 0, true); 395 396 ath_rx_tasklet(sc, 0, false); 397 } 398 399 if (status & ATH9K_INT_TX) { 400 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 401 ath_tx_edma_tasklet(sc); 402 else 403 ath_tx_tasklet(sc); 404 } 405 406 ath9k_btcoex_handle_interrupt(sc, status); 407 408 out: 409 /* re-enable hardware interrupt */ 410 ath9k_hw_enable_interrupts(ah); 411 412 spin_unlock(&sc->sc_pcu_lock); 413 ath9k_ps_restore(sc); 414 } 415 416 irqreturn_t ath_isr(int irq, void *dev) 417 { 418 #define SCHED_INTR ( \ 419 ATH9K_INT_FATAL | \ 420 ATH9K_INT_BB_WATCHDOG | \ 421 ATH9K_INT_RXORN | \ 422 ATH9K_INT_RXEOL | \ 423 ATH9K_INT_RX | \ 424 ATH9K_INT_RXLP | \ 425 ATH9K_INT_RXHP | \ 426 ATH9K_INT_TX | \ 427 ATH9K_INT_BMISS | \ 428 ATH9K_INT_CST | \ 429 ATH9K_INT_TSFOOR | \ 430 ATH9K_INT_GENTIMER | \ 431 ATH9K_INT_MCI) 432 433 struct ath_softc *sc = dev; 434 struct ath_hw *ah = sc->sc_ah; 435 struct ath_common *common = ath9k_hw_common(ah); 436 enum ath9k_int status; 437 bool sched = false; 438 439 /* 440 * The hardware is not ready/present, don't 441 * touch anything. Note this can happen early 442 * on if the IRQ is shared. 443 */ 444 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) 445 return IRQ_NONE; 446 447 /* shared irq, not for us */ 448 449 if (!ath9k_hw_intrpend(ah)) 450 return IRQ_NONE; 451 452 if (test_bit(SC_OP_HW_RESET, &sc->sc_flags)) { 453 ath9k_hw_kill_interrupts(ah); 454 return IRQ_HANDLED; 455 } 456 457 /* 458 * Figure out the reason(s) for the interrupt. Note 459 * that the hal returns a pseudo-ISR that may include 460 * bits we haven't explicitly enabled so we mask the 461 * value to insure we only process bits we requested. 462 */ 463 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */ 464 status &= ah->imask; /* discard unasked-for bits */ 465 466 /* 467 * If there are no status bits set, then this interrupt was not 468 * for me (should have been caught above). 469 */ 470 if (!status) 471 return IRQ_NONE; 472 473 /* Cache the status */ 474 sc->intrstatus = status; 475 476 if (status & SCHED_INTR) 477 sched = true; 478 479 /* 480 * If a FATAL or RXORN interrupt is received, we have to reset the 481 * chip immediately. 482 */ 483 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) && 484 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA))) 485 goto chip_reset; 486 487 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 488 (status & ATH9K_INT_BB_WATCHDOG)) { 489 490 spin_lock(&common->cc_lock); 491 ath_hw_cycle_counters_update(common); 492 ar9003_hw_bb_watchdog_dbg_info(ah); 493 spin_unlock(&common->cc_lock); 494 495 goto chip_reset; 496 } 497 #ifdef CONFIG_PM_SLEEP 498 if (status & ATH9K_INT_BMISS) { 499 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) { 500 ath_dbg(common, ANY, "during WoW we got a BMISS\n"); 501 atomic_inc(&sc->wow_got_bmiss_intr); 502 atomic_dec(&sc->wow_sleep_proc_intr); 503 } 504 } 505 #endif 506 if (status & ATH9K_INT_SWBA) 507 tasklet_schedule(&sc->bcon_tasklet); 508 509 if (status & ATH9K_INT_TXURN) 510 ath9k_hw_updatetxtriglevel(ah, true); 511 512 if (status & ATH9K_INT_RXEOL) { 513 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 514 ath9k_hw_set_interrupts(ah); 515 } 516 517 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 518 if (status & ATH9K_INT_TIM_TIMER) { 519 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle)) 520 goto chip_reset; 521 /* Clear RxAbort bit so that we can 522 * receive frames */ 523 ath9k_setpower(sc, ATH9K_PM_AWAKE); 524 spin_lock(&sc->sc_pm_lock); 525 ath9k_hw_setrxabort(sc->sc_ah, 0); 526 sc->ps_flags |= PS_WAIT_FOR_BEACON; 527 spin_unlock(&sc->sc_pm_lock); 528 } 529 530 chip_reset: 531 532 ath_debug_stat_interrupt(sc, status); 533 534 if (sched) { 535 /* turn off every interrupt */ 536 ath9k_hw_disable_interrupts(ah); 537 tasklet_schedule(&sc->intr_tq); 538 } 539 540 return IRQ_HANDLED; 541 542 #undef SCHED_INTR 543 } 544 545 static int ath_reset(struct ath_softc *sc) 546 { 547 int i, r; 548 549 ath9k_ps_wakeup(sc); 550 551 r = ath_reset_internal(sc, NULL); 552 553 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 554 if (!ATH_TXQ_SETUP(sc, i)) 555 continue; 556 557 spin_lock_bh(&sc->tx.txq[i].axq_lock); 558 ath_txq_schedule(sc, &sc->tx.txq[i]); 559 spin_unlock_bh(&sc->tx.txq[i].axq_lock); 560 } 561 562 ath9k_ps_restore(sc); 563 564 return r; 565 } 566 567 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type) 568 { 569 #ifdef CONFIG_ATH9K_DEBUGFS 570 RESET_STAT_INC(sc, type); 571 #endif 572 set_bit(SC_OP_HW_RESET, &sc->sc_flags); 573 ieee80211_queue_work(sc->hw, &sc->hw_reset_work); 574 } 575 576 void ath_reset_work(struct work_struct *work) 577 { 578 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work); 579 580 ath_reset(sc); 581 } 582 583 /**********************/ 584 /* mac80211 callbacks */ 585 /**********************/ 586 587 static int ath9k_start(struct ieee80211_hw *hw) 588 { 589 struct ath_softc *sc = hw->priv; 590 struct ath_hw *ah = sc->sc_ah; 591 struct ath_common *common = ath9k_hw_common(ah); 592 struct ieee80211_channel *curchan = hw->conf.chandef.chan; 593 struct ath9k_channel *init_channel; 594 int r; 595 596 ath_dbg(common, CONFIG, 597 "Starting driver with initial channel: %d MHz\n", 598 curchan->center_freq); 599 600 ath9k_ps_wakeup(sc); 601 mutex_lock(&sc->mutex); 602 603 init_channel = ath9k_cmn_get_curchannel(hw, ah); 604 605 /* Reset SERDES registers */ 606 ath9k_hw_configpcipowersave(ah, false); 607 608 /* 609 * The basic interface to setting the hardware in a good 610 * state is ``reset''. On return the hardware is known to 611 * be powered up and with interrupts disabled. This must 612 * be followed by initialization of the appropriate bits 613 * and then setup of the interrupt mask. 614 */ 615 spin_lock_bh(&sc->sc_pcu_lock); 616 617 atomic_set(&ah->intr_ref_cnt, -1); 618 619 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false); 620 if (r) { 621 ath_err(common, 622 "Unable to reset hardware; reset status %d (freq %u MHz)\n", 623 r, curchan->center_freq); 624 ah->reset_power_on = false; 625 } 626 627 /* Setup our intr mask. */ 628 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL | 629 ATH9K_INT_RXORN | ATH9K_INT_FATAL | 630 ATH9K_INT_GLOBAL; 631 632 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 633 ah->imask |= ATH9K_INT_RXHP | 634 ATH9K_INT_RXLP | 635 ATH9K_INT_BB_WATCHDOG; 636 else 637 ah->imask |= ATH9K_INT_RX; 638 639 ah->imask |= ATH9K_INT_GTT; 640 641 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) 642 ah->imask |= ATH9K_INT_CST; 643 644 ath_mci_enable(sc); 645 646 clear_bit(SC_OP_INVALID, &sc->sc_flags); 647 sc->sc_ah->is_monitoring = false; 648 649 if (!ath_complete_reset(sc, false)) 650 ah->reset_power_on = false; 651 652 if (ah->led_pin >= 0) { 653 ath9k_hw_cfg_output(ah, ah->led_pin, 654 AR_GPIO_OUTPUT_MUX_AS_OUTPUT); 655 ath9k_hw_set_gpio(ah, ah->led_pin, 0); 656 } 657 658 /* 659 * Reset key cache to sane defaults (all entries cleared) instead of 660 * semi-random values after suspend/resume. 661 */ 662 ath9k_cmn_init_crypto(sc->sc_ah); 663 664 spin_unlock_bh(&sc->sc_pcu_lock); 665 666 mutex_unlock(&sc->mutex); 667 668 ath9k_ps_restore(sc); 669 670 return 0; 671 } 672 673 static void ath9k_tx(struct ieee80211_hw *hw, 674 struct ieee80211_tx_control *control, 675 struct sk_buff *skb) 676 { 677 struct ath_softc *sc = hw->priv; 678 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 679 struct ath_tx_control txctl; 680 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; 681 unsigned long flags; 682 683 if (sc->ps_enabled) { 684 /* 685 * mac80211 does not set PM field for normal data frames, so we 686 * need to update that based on the current PS mode. 687 */ 688 if (ieee80211_is_data(hdr->frame_control) && 689 !ieee80211_is_nullfunc(hdr->frame_control) && 690 !ieee80211_has_pm(hdr->frame_control)) { 691 ath_dbg(common, PS, 692 "Add PM=1 for a TX frame while in PS mode\n"); 693 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM); 694 } 695 } 696 697 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) { 698 /* 699 * We are using PS-Poll and mac80211 can request TX while in 700 * power save mode. Need to wake up hardware for the TX to be 701 * completed and if needed, also for RX of buffered frames. 702 */ 703 ath9k_ps_wakeup(sc); 704 spin_lock_irqsave(&sc->sc_pm_lock, flags); 705 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 706 ath9k_hw_setrxabort(sc->sc_ah, 0); 707 if (ieee80211_is_pspoll(hdr->frame_control)) { 708 ath_dbg(common, PS, 709 "Sending PS-Poll to pick a buffered frame\n"); 710 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA; 711 } else { 712 ath_dbg(common, PS, "Wake up to complete TX\n"); 713 sc->ps_flags |= PS_WAIT_FOR_TX_ACK; 714 } 715 /* 716 * The actual restore operation will happen only after 717 * the ps_flags bit is cleared. We are just dropping 718 * the ps_usecount here. 719 */ 720 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 721 ath9k_ps_restore(sc); 722 } 723 724 /* 725 * Cannot tx while the hardware is in full sleep, it first needs a full 726 * chip reset to recover from that 727 */ 728 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) { 729 ath_err(common, "TX while HW is in FULL_SLEEP mode\n"); 730 goto exit; 731 } 732 733 memset(&txctl, 0, sizeof(struct ath_tx_control)); 734 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)]; 735 txctl.sta = control->sta; 736 737 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb); 738 739 if (ath_tx_start(hw, skb, &txctl) != 0) { 740 ath_dbg(common, XMIT, "TX failed\n"); 741 TX_STAT_INC(txctl.txq->axq_qnum, txfailed); 742 goto exit; 743 } 744 745 return; 746 exit: 747 ieee80211_free_txskb(hw, skb); 748 } 749 750 static void ath9k_stop(struct ieee80211_hw *hw) 751 { 752 struct ath_softc *sc = hw->priv; 753 struct ath_hw *ah = sc->sc_ah; 754 struct ath_common *common = ath9k_hw_common(ah); 755 bool prev_idle; 756 757 mutex_lock(&sc->mutex); 758 759 ath_cancel_work(sc); 760 del_timer_sync(&sc->rx_poll_timer); 761 762 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) { 763 ath_dbg(common, ANY, "Device not present\n"); 764 mutex_unlock(&sc->mutex); 765 return; 766 } 767 768 /* Ensure HW is awake when we try to shut it down. */ 769 ath9k_ps_wakeup(sc); 770 771 spin_lock_bh(&sc->sc_pcu_lock); 772 773 /* prevent tasklets to enable interrupts once we disable them */ 774 ah->imask &= ~ATH9K_INT_GLOBAL; 775 776 /* make sure h/w will not generate any interrupt 777 * before setting the invalid flag. */ 778 ath9k_hw_disable_interrupts(ah); 779 780 spin_unlock_bh(&sc->sc_pcu_lock); 781 782 /* we can now sync irq and kill any running tasklets, since we already 783 * disabled interrupts and not holding a spin lock */ 784 synchronize_irq(sc->irq); 785 tasklet_kill(&sc->intr_tq); 786 tasklet_kill(&sc->bcon_tasklet); 787 788 prev_idle = sc->ps_idle; 789 sc->ps_idle = true; 790 791 spin_lock_bh(&sc->sc_pcu_lock); 792 793 if (ah->led_pin >= 0) { 794 ath9k_hw_set_gpio(ah, ah->led_pin, 1); 795 ath9k_hw_cfg_gpio_input(ah, ah->led_pin); 796 } 797 798 ath_prepare_reset(sc); 799 800 if (sc->rx.frag) { 801 dev_kfree_skb_any(sc->rx.frag); 802 sc->rx.frag = NULL; 803 } 804 805 if (!ah->curchan) 806 ah->curchan = ath9k_cmn_get_curchannel(hw, ah); 807 808 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false); 809 ath9k_hw_phy_disable(ah); 810 811 ath9k_hw_configpcipowersave(ah, true); 812 813 spin_unlock_bh(&sc->sc_pcu_lock); 814 815 ath9k_ps_restore(sc); 816 817 set_bit(SC_OP_INVALID, &sc->sc_flags); 818 sc->ps_idle = prev_idle; 819 820 mutex_unlock(&sc->mutex); 821 822 ath_dbg(common, CONFIG, "Driver halt\n"); 823 } 824 825 bool ath9k_uses_beacons(int type) 826 { 827 switch (type) { 828 case NL80211_IFTYPE_AP: 829 case NL80211_IFTYPE_ADHOC: 830 case NL80211_IFTYPE_MESH_POINT: 831 return true; 832 default: 833 return false; 834 } 835 } 836 837 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 838 { 839 struct ath9k_vif_iter_data *iter_data = data; 840 int i; 841 842 if (iter_data->has_hw_macaddr) { 843 for (i = 0; i < ETH_ALEN; i++) 844 iter_data->mask[i] &= 845 ~(iter_data->hw_macaddr[i] ^ mac[i]); 846 } else { 847 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN); 848 iter_data->has_hw_macaddr = true; 849 } 850 851 switch (vif->type) { 852 case NL80211_IFTYPE_AP: 853 iter_data->naps++; 854 break; 855 case NL80211_IFTYPE_STATION: 856 iter_data->nstations++; 857 break; 858 case NL80211_IFTYPE_ADHOC: 859 iter_data->nadhocs++; 860 break; 861 case NL80211_IFTYPE_MESH_POINT: 862 iter_data->nmeshes++; 863 break; 864 case NL80211_IFTYPE_WDS: 865 iter_data->nwds++; 866 break; 867 default: 868 break; 869 } 870 } 871 872 static void ath9k_sta_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 873 { 874 struct ath_softc *sc = data; 875 struct ath_vif *avp = (void *)vif->drv_priv; 876 877 if (vif->type != NL80211_IFTYPE_STATION) 878 return; 879 880 if (avp->primary_sta_vif) 881 ath9k_set_assoc_state(sc, vif); 882 } 883 884 /* Called with sc->mutex held. */ 885 void ath9k_calculate_iter_data(struct ieee80211_hw *hw, 886 struct ieee80211_vif *vif, 887 struct ath9k_vif_iter_data *iter_data) 888 { 889 struct ath_softc *sc = hw->priv; 890 struct ath_hw *ah = sc->sc_ah; 891 struct ath_common *common = ath9k_hw_common(ah); 892 893 /* 894 * Use the hardware MAC address as reference, the hardware uses it 895 * together with the BSSID mask when matching addresses. 896 */ 897 memset(iter_data, 0, sizeof(*iter_data)); 898 memset(&iter_data->mask, 0xff, ETH_ALEN); 899 900 if (vif) 901 ath9k_vif_iter(iter_data, vif->addr, vif); 902 903 /* Get list of all active MAC addresses */ 904 ieee80211_iterate_active_interfaces_atomic( 905 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL, 906 ath9k_vif_iter, iter_data); 907 908 memcpy(common->macaddr, iter_data->hw_macaddr, ETH_ALEN); 909 } 910 911 /* Called with sc->mutex held. */ 912 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw, 913 struct ieee80211_vif *vif) 914 { 915 struct ath_softc *sc = hw->priv; 916 struct ath_hw *ah = sc->sc_ah; 917 struct ath_common *common = ath9k_hw_common(ah); 918 struct ath9k_vif_iter_data iter_data; 919 enum nl80211_iftype old_opmode = ah->opmode; 920 921 ath9k_calculate_iter_data(hw, vif, &iter_data); 922 923 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN); 924 ath_hw_setbssidmask(common); 925 926 if (iter_data.naps > 0) { 927 ath9k_hw_set_tsfadjust(ah, true); 928 ah->opmode = NL80211_IFTYPE_AP; 929 } else { 930 ath9k_hw_set_tsfadjust(ah, false); 931 932 if (iter_data.nmeshes) 933 ah->opmode = NL80211_IFTYPE_MESH_POINT; 934 else if (iter_data.nwds) 935 ah->opmode = NL80211_IFTYPE_AP; 936 else if (iter_data.nadhocs) 937 ah->opmode = NL80211_IFTYPE_ADHOC; 938 else 939 ah->opmode = NL80211_IFTYPE_STATION; 940 } 941 942 ath9k_hw_setopmode(ah); 943 944 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) 945 ah->imask |= ATH9K_INT_TSFOOR; 946 else 947 ah->imask &= ~ATH9K_INT_TSFOOR; 948 949 ath9k_hw_set_interrupts(ah); 950 951 /* 952 * If we are changing the opmode to STATION, 953 * a beacon sync needs to be done. 954 */ 955 if (ah->opmode == NL80211_IFTYPE_STATION && 956 old_opmode == NL80211_IFTYPE_AP && 957 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) { 958 ieee80211_iterate_active_interfaces_atomic( 959 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL, 960 ath9k_sta_vif_iter, sc); 961 } 962 } 963 964 static int ath9k_add_interface(struct ieee80211_hw *hw, 965 struct ieee80211_vif *vif) 966 { 967 struct ath_softc *sc = hw->priv; 968 struct ath_hw *ah = sc->sc_ah; 969 struct ath_common *common = ath9k_hw_common(ah); 970 971 mutex_lock(&sc->mutex); 972 973 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type); 974 sc->nvifs++; 975 976 ath9k_ps_wakeup(sc); 977 ath9k_calculate_summary_state(hw, vif); 978 ath9k_ps_restore(sc); 979 980 if (ath9k_uses_beacons(vif->type)) 981 ath9k_beacon_assign_slot(sc, vif); 982 983 mutex_unlock(&sc->mutex); 984 return 0; 985 } 986 987 static int ath9k_change_interface(struct ieee80211_hw *hw, 988 struct ieee80211_vif *vif, 989 enum nl80211_iftype new_type, 990 bool p2p) 991 { 992 struct ath_softc *sc = hw->priv; 993 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 994 995 ath_dbg(common, CONFIG, "Change Interface\n"); 996 mutex_lock(&sc->mutex); 997 998 if (ath9k_uses_beacons(vif->type)) 999 ath9k_beacon_remove_slot(sc, vif); 1000 1001 vif->type = new_type; 1002 vif->p2p = p2p; 1003 1004 ath9k_ps_wakeup(sc); 1005 ath9k_calculate_summary_state(hw, vif); 1006 ath9k_ps_restore(sc); 1007 1008 if (ath9k_uses_beacons(vif->type)) 1009 ath9k_beacon_assign_slot(sc, vif); 1010 1011 mutex_unlock(&sc->mutex); 1012 return 0; 1013 } 1014 1015 static void ath9k_remove_interface(struct ieee80211_hw *hw, 1016 struct ieee80211_vif *vif) 1017 { 1018 struct ath_softc *sc = hw->priv; 1019 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1020 1021 ath_dbg(common, CONFIG, "Detach Interface\n"); 1022 1023 mutex_lock(&sc->mutex); 1024 1025 sc->nvifs--; 1026 1027 if (ath9k_uses_beacons(vif->type)) 1028 ath9k_beacon_remove_slot(sc, vif); 1029 1030 ath9k_ps_wakeup(sc); 1031 ath9k_calculate_summary_state(hw, NULL); 1032 ath9k_ps_restore(sc); 1033 1034 mutex_unlock(&sc->mutex); 1035 } 1036 1037 static void ath9k_enable_ps(struct ath_softc *sc) 1038 { 1039 struct ath_hw *ah = sc->sc_ah; 1040 struct ath_common *common = ath9k_hw_common(ah); 1041 1042 sc->ps_enabled = true; 1043 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1044 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) { 1045 ah->imask |= ATH9K_INT_TIM_TIMER; 1046 ath9k_hw_set_interrupts(ah); 1047 } 1048 ath9k_hw_setrxabort(ah, 1); 1049 } 1050 ath_dbg(common, PS, "PowerSave enabled\n"); 1051 } 1052 1053 static void ath9k_disable_ps(struct ath_softc *sc) 1054 { 1055 struct ath_hw *ah = sc->sc_ah; 1056 struct ath_common *common = ath9k_hw_common(ah); 1057 1058 sc->ps_enabled = false; 1059 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE); 1060 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1061 ath9k_hw_setrxabort(ah, 0); 1062 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON | 1063 PS_WAIT_FOR_CAB | 1064 PS_WAIT_FOR_PSPOLL_DATA | 1065 PS_WAIT_FOR_TX_ACK); 1066 if (ah->imask & ATH9K_INT_TIM_TIMER) { 1067 ah->imask &= ~ATH9K_INT_TIM_TIMER; 1068 ath9k_hw_set_interrupts(ah); 1069 } 1070 } 1071 ath_dbg(common, PS, "PowerSave disabled\n"); 1072 } 1073 1074 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw) 1075 { 1076 struct ath_softc *sc = hw->priv; 1077 struct ath_hw *ah = sc->sc_ah; 1078 struct ath_common *common = ath9k_hw_common(ah); 1079 u32 rxfilter; 1080 1081 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) { 1082 ath_err(common, "spectrum analyzer not implemented on this hardware\n"); 1083 return; 1084 } 1085 1086 ath9k_ps_wakeup(sc); 1087 rxfilter = ath9k_hw_getrxfilter(ah); 1088 ath9k_hw_setrxfilter(ah, rxfilter | 1089 ATH9K_RX_FILTER_PHYRADAR | 1090 ATH9K_RX_FILTER_PHYERR); 1091 1092 /* TODO: usually this should not be neccesary, but for some reason 1093 * (or in some mode?) the trigger must be called after the 1094 * configuration, otherwise the register will have its values reset 1095 * (on my ar9220 to value 0x01002310) 1096 */ 1097 ath9k_spectral_scan_config(hw, sc->spectral_mode); 1098 ath9k_hw_ops(ah)->spectral_scan_trigger(ah); 1099 ath9k_ps_restore(sc); 1100 } 1101 1102 int ath9k_spectral_scan_config(struct ieee80211_hw *hw, 1103 enum spectral_mode spectral_mode) 1104 { 1105 struct ath_softc *sc = hw->priv; 1106 struct ath_hw *ah = sc->sc_ah; 1107 struct ath_common *common = ath9k_hw_common(ah); 1108 1109 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) { 1110 ath_err(common, "spectrum analyzer not implemented on this hardware\n"); 1111 return -1; 1112 } 1113 1114 switch (spectral_mode) { 1115 case SPECTRAL_DISABLED: 1116 sc->spec_config.enabled = 0; 1117 break; 1118 case SPECTRAL_BACKGROUND: 1119 /* send endless samples. 1120 * TODO: is this really useful for "background"? 1121 */ 1122 sc->spec_config.endless = 1; 1123 sc->spec_config.enabled = 1; 1124 break; 1125 case SPECTRAL_CHANSCAN: 1126 case SPECTRAL_MANUAL: 1127 sc->spec_config.endless = 0; 1128 sc->spec_config.enabled = 1; 1129 break; 1130 default: 1131 return -1; 1132 } 1133 1134 ath9k_ps_wakeup(sc); 1135 ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config); 1136 ath9k_ps_restore(sc); 1137 1138 sc->spectral_mode = spectral_mode; 1139 1140 return 0; 1141 } 1142 1143 static int ath9k_config(struct ieee80211_hw *hw, u32 changed) 1144 { 1145 struct ath_softc *sc = hw->priv; 1146 struct ath_hw *ah = sc->sc_ah; 1147 struct ath_common *common = ath9k_hw_common(ah); 1148 struct ieee80211_conf *conf = &hw->conf; 1149 bool reset_channel = false; 1150 1151 ath9k_ps_wakeup(sc); 1152 mutex_lock(&sc->mutex); 1153 1154 if (changed & IEEE80211_CONF_CHANGE_IDLE) { 1155 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE); 1156 if (sc->ps_idle) { 1157 ath_cancel_work(sc); 1158 ath9k_stop_btcoex(sc); 1159 } else { 1160 ath9k_start_btcoex(sc); 1161 /* 1162 * The chip needs a reset to properly wake up from 1163 * full sleep 1164 */ 1165 reset_channel = ah->chip_fullsleep; 1166 } 1167 } 1168 1169 /* 1170 * We just prepare to enable PS. We have to wait until our AP has 1171 * ACK'd our null data frame to disable RX otherwise we'll ignore 1172 * those ACKs and end up retransmitting the same null data frames. 1173 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode. 1174 */ 1175 if (changed & IEEE80211_CONF_CHANGE_PS) { 1176 unsigned long flags; 1177 spin_lock_irqsave(&sc->sc_pm_lock, flags); 1178 if (conf->flags & IEEE80211_CONF_PS) 1179 ath9k_enable_ps(sc); 1180 else 1181 ath9k_disable_ps(sc); 1182 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1183 } 1184 1185 if (changed & IEEE80211_CONF_CHANGE_MONITOR) { 1186 if (conf->flags & IEEE80211_CONF_MONITOR) { 1187 ath_dbg(common, CONFIG, "Monitor mode is enabled\n"); 1188 sc->sc_ah->is_monitoring = true; 1189 } else { 1190 ath_dbg(common, CONFIG, "Monitor mode is disabled\n"); 1191 sc->sc_ah->is_monitoring = false; 1192 } 1193 } 1194 1195 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) { 1196 struct ieee80211_channel *curchan = hw->conf.chandef.chan; 1197 enum nl80211_channel_type channel_type = 1198 cfg80211_get_chandef_type(&conf->chandef); 1199 int pos = curchan->hw_value; 1200 int old_pos = -1; 1201 unsigned long flags; 1202 1203 if (ah->curchan) 1204 old_pos = ah->curchan - &ah->channels[0]; 1205 1206 ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n", 1207 curchan->center_freq, channel_type); 1208 1209 /* update survey stats for the old channel before switching */ 1210 spin_lock_irqsave(&common->cc_lock, flags); 1211 ath_update_survey_stats(sc); 1212 spin_unlock_irqrestore(&common->cc_lock, flags); 1213 1214 /* 1215 * Preserve the current channel values, before updating 1216 * the same channel 1217 */ 1218 if (ah->curchan && (old_pos == pos)) 1219 ath9k_hw_getnf(ah, ah->curchan); 1220 1221 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos], 1222 curchan, channel_type); 1223 1224 /* 1225 * If the operating channel changes, change the survey in-use flags 1226 * along with it. 1227 * Reset the survey data for the new channel, unless we're switching 1228 * back to the operating channel from an off-channel operation. 1229 */ 1230 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && 1231 sc->cur_survey != &sc->survey[pos]) { 1232 1233 if (sc->cur_survey) 1234 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE; 1235 1236 sc->cur_survey = &sc->survey[pos]; 1237 1238 memset(sc->cur_survey, 0, sizeof(struct survey_info)); 1239 sc->cur_survey->filled |= SURVEY_INFO_IN_USE; 1240 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) { 1241 memset(&sc->survey[pos], 0, sizeof(struct survey_info)); 1242 } 1243 1244 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) { 1245 ath_err(common, "Unable to set channel\n"); 1246 mutex_unlock(&sc->mutex); 1247 ath9k_ps_restore(sc); 1248 return -EINVAL; 1249 } 1250 1251 /* 1252 * The most recent snapshot of channel->noisefloor for the old 1253 * channel is only available after the hardware reset. Copy it to 1254 * the survey stats now. 1255 */ 1256 if (old_pos >= 0) 1257 ath_update_survey_nf(sc, old_pos); 1258 1259 /* 1260 * Enable radar pulse detection if on a DFS channel. Spectral 1261 * scanning and radar detection can not be used concurrently. 1262 */ 1263 if (hw->conf.radar_enabled) { 1264 u32 rxfilter; 1265 1266 /* set HW specific DFS configuration */ 1267 ath9k_hw_set_radar_params(ah); 1268 rxfilter = ath9k_hw_getrxfilter(ah); 1269 rxfilter |= ATH9K_RX_FILTER_PHYRADAR | 1270 ATH9K_RX_FILTER_PHYERR; 1271 ath9k_hw_setrxfilter(ah, rxfilter); 1272 ath_dbg(common, DFS, "DFS enabled at freq %d\n", 1273 curchan->center_freq); 1274 } else { 1275 /* perform spectral scan if requested. */ 1276 if (sc->scanning && 1277 sc->spectral_mode == SPECTRAL_CHANSCAN) 1278 ath9k_spectral_scan_trigger(hw); 1279 } 1280 } 1281 1282 if (changed & IEEE80211_CONF_CHANGE_POWER) { 1283 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level); 1284 sc->config.txpowlimit = 2 * conf->power_level; 1285 ath9k_cmn_update_txpow(ah, sc->curtxpow, 1286 sc->config.txpowlimit, &sc->curtxpow); 1287 } 1288 1289 mutex_unlock(&sc->mutex); 1290 ath9k_ps_restore(sc); 1291 1292 return 0; 1293 } 1294 1295 #define SUPPORTED_FILTERS \ 1296 (FIF_PROMISC_IN_BSS | \ 1297 FIF_ALLMULTI | \ 1298 FIF_CONTROL | \ 1299 FIF_PSPOLL | \ 1300 FIF_OTHER_BSS | \ 1301 FIF_BCN_PRBRESP_PROMISC | \ 1302 FIF_PROBE_REQ | \ 1303 FIF_FCSFAIL) 1304 1305 /* FIXME: sc->sc_full_reset ? */ 1306 static void ath9k_configure_filter(struct ieee80211_hw *hw, 1307 unsigned int changed_flags, 1308 unsigned int *total_flags, 1309 u64 multicast) 1310 { 1311 struct ath_softc *sc = hw->priv; 1312 u32 rfilt; 1313 1314 changed_flags &= SUPPORTED_FILTERS; 1315 *total_flags &= SUPPORTED_FILTERS; 1316 1317 sc->rx.rxfilter = *total_flags; 1318 ath9k_ps_wakeup(sc); 1319 rfilt = ath_calcrxfilter(sc); 1320 ath9k_hw_setrxfilter(sc->sc_ah, rfilt); 1321 ath9k_ps_restore(sc); 1322 1323 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n", 1324 rfilt); 1325 } 1326 1327 static int ath9k_sta_add(struct ieee80211_hw *hw, 1328 struct ieee80211_vif *vif, 1329 struct ieee80211_sta *sta) 1330 { 1331 struct ath_softc *sc = hw->priv; 1332 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1333 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1334 struct ieee80211_key_conf ps_key = { }; 1335 int key; 1336 1337 ath_node_attach(sc, sta, vif); 1338 1339 if (vif->type != NL80211_IFTYPE_AP && 1340 vif->type != NL80211_IFTYPE_AP_VLAN) 1341 return 0; 1342 1343 key = ath_key_config(common, vif, sta, &ps_key); 1344 if (key > 0) 1345 an->ps_key = key; 1346 1347 return 0; 1348 } 1349 1350 static void ath9k_del_ps_key(struct ath_softc *sc, 1351 struct ieee80211_vif *vif, 1352 struct ieee80211_sta *sta) 1353 { 1354 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1355 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1356 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key }; 1357 1358 if (!an->ps_key) 1359 return; 1360 1361 ath_key_delete(common, &ps_key); 1362 an->ps_key = 0; 1363 } 1364 1365 static int ath9k_sta_remove(struct ieee80211_hw *hw, 1366 struct ieee80211_vif *vif, 1367 struct ieee80211_sta *sta) 1368 { 1369 struct ath_softc *sc = hw->priv; 1370 1371 ath9k_del_ps_key(sc, vif, sta); 1372 ath_node_detach(sc, sta); 1373 1374 return 0; 1375 } 1376 1377 static void ath9k_sta_notify(struct ieee80211_hw *hw, 1378 struct ieee80211_vif *vif, 1379 enum sta_notify_cmd cmd, 1380 struct ieee80211_sta *sta) 1381 { 1382 struct ath_softc *sc = hw->priv; 1383 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1384 1385 if (!sta->ht_cap.ht_supported) 1386 return; 1387 1388 switch (cmd) { 1389 case STA_NOTIFY_SLEEP: 1390 an->sleeping = true; 1391 ath_tx_aggr_sleep(sta, sc, an); 1392 break; 1393 case STA_NOTIFY_AWAKE: 1394 an->sleeping = false; 1395 ath_tx_aggr_wakeup(sc, an); 1396 break; 1397 } 1398 } 1399 1400 static int ath9k_conf_tx(struct ieee80211_hw *hw, 1401 struct ieee80211_vif *vif, u16 queue, 1402 const struct ieee80211_tx_queue_params *params) 1403 { 1404 struct ath_softc *sc = hw->priv; 1405 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1406 struct ath_txq *txq; 1407 struct ath9k_tx_queue_info qi; 1408 int ret = 0; 1409 1410 if (queue >= IEEE80211_NUM_ACS) 1411 return 0; 1412 1413 txq = sc->tx.txq_map[queue]; 1414 1415 ath9k_ps_wakeup(sc); 1416 mutex_lock(&sc->mutex); 1417 1418 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); 1419 1420 qi.tqi_aifs = params->aifs; 1421 qi.tqi_cwmin = params->cw_min; 1422 qi.tqi_cwmax = params->cw_max; 1423 qi.tqi_burstTime = params->txop * 32; 1424 1425 ath_dbg(common, CONFIG, 1426 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", 1427 queue, txq->axq_qnum, params->aifs, params->cw_min, 1428 params->cw_max, params->txop); 1429 1430 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime); 1431 ret = ath_txq_update(sc, txq->axq_qnum, &qi); 1432 if (ret) 1433 ath_err(common, "TXQ Update failed\n"); 1434 1435 mutex_unlock(&sc->mutex); 1436 ath9k_ps_restore(sc); 1437 1438 return ret; 1439 } 1440 1441 static int ath9k_set_key(struct ieee80211_hw *hw, 1442 enum set_key_cmd cmd, 1443 struct ieee80211_vif *vif, 1444 struct ieee80211_sta *sta, 1445 struct ieee80211_key_conf *key) 1446 { 1447 struct ath_softc *sc = hw->priv; 1448 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1449 int ret = 0; 1450 1451 if (ath9k_modparam_nohwcrypt) 1452 return -ENOSPC; 1453 1454 if ((vif->type == NL80211_IFTYPE_ADHOC || 1455 vif->type == NL80211_IFTYPE_MESH_POINT) && 1456 (key->cipher == WLAN_CIPHER_SUITE_TKIP || 1457 key->cipher == WLAN_CIPHER_SUITE_CCMP) && 1458 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { 1459 /* 1460 * For now, disable hw crypto for the RSN IBSS group keys. This 1461 * could be optimized in the future to use a modified key cache 1462 * design to support per-STA RX GTK, but until that gets 1463 * implemented, use of software crypto for group addressed 1464 * frames is a acceptable to allow RSN IBSS to be used. 1465 */ 1466 return -EOPNOTSUPP; 1467 } 1468 1469 mutex_lock(&sc->mutex); 1470 ath9k_ps_wakeup(sc); 1471 ath_dbg(common, CONFIG, "Set HW Key\n"); 1472 1473 switch (cmd) { 1474 case SET_KEY: 1475 if (sta) 1476 ath9k_del_ps_key(sc, vif, sta); 1477 1478 ret = ath_key_config(common, vif, sta, key); 1479 if (ret >= 0) { 1480 key->hw_key_idx = ret; 1481 /* push IV and Michael MIC generation to stack */ 1482 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 1483 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) 1484 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; 1485 if (sc->sc_ah->sw_mgmt_crypto && 1486 key->cipher == WLAN_CIPHER_SUITE_CCMP) 1487 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX; 1488 ret = 0; 1489 } 1490 break; 1491 case DISABLE_KEY: 1492 ath_key_delete(common, key); 1493 break; 1494 default: 1495 ret = -EINVAL; 1496 } 1497 1498 ath9k_ps_restore(sc); 1499 mutex_unlock(&sc->mutex); 1500 1501 return ret; 1502 } 1503 1504 static void ath9k_set_assoc_state(struct ath_softc *sc, 1505 struct ieee80211_vif *vif) 1506 { 1507 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1508 struct ath_vif *avp = (void *)vif->drv_priv; 1509 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; 1510 unsigned long flags; 1511 1512 set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags); 1513 avp->primary_sta_vif = true; 1514 1515 /* 1516 * Set the AID, BSSID and do beacon-sync only when 1517 * the HW opmode is STATION. 1518 * 1519 * But the primary bit is set above in any case. 1520 */ 1521 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION) 1522 return; 1523 1524 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); 1525 common->curaid = bss_conf->aid; 1526 ath9k_hw_write_associd(sc->sc_ah); 1527 1528 sc->last_rssi = ATH_RSSI_DUMMY_MARKER; 1529 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER; 1530 1531 spin_lock_irqsave(&sc->sc_pm_lock, flags); 1532 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON; 1533 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1534 1535 if (ath9k_hw_mci_is_enabled(sc->sc_ah)) 1536 ath9k_mci_update_wlan_channels(sc, false); 1537 1538 ath_dbg(common, CONFIG, 1539 "Primary Station interface: %pM, BSSID: %pM\n", 1540 vif->addr, common->curbssid); 1541 } 1542 1543 static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 1544 { 1545 struct ath_softc *sc = data; 1546 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; 1547 1548 if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) 1549 return; 1550 1551 if (bss_conf->assoc) 1552 ath9k_set_assoc_state(sc, vif); 1553 } 1554 1555 static void ath9k_bss_info_changed(struct ieee80211_hw *hw, 1556 struct ieee80211_vif *vif, 1557 struct ieee80211_bss_conf *bss_conf, 1558 u32 changed) 1559 { 1560 #define CHECK_ANI \ 1561 (BSS_CHANGED_ASSOC | \ 1562 BSS_CHANGED_IBSS | \ 1563 BSS_CHANGED_BEACON_ENABLED) 1564 1565 struct ath_softc *sc = hw->priv; 1566 struct ath_hw *ah = sc->sc_ah; 1567 struct ath_common *common = ath9k_hw_common(ah); 1568 struct ath_vif *avp = (void *)vif->drv_priv; 1569 int slottime; 1570 1571 ath9k_ps_wakeup(sc); 1572 mutex_lock(&sc->mutex); 1573 1574 if (changed & BSS_CHANGED_ASSOC) { 1575 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n", 1576 bss_conf->bssid, bss_conf->assoc); 1577 1578 if (avp->primary_sta_vif && !bss_conf->assoc) { 1579 clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags); 1580 avp->primary_sta_vif = false; 1581 1582 if (ah->opmode == NL80211_IFTYPE_STATION) 1583 clear_bit(SC_OP_BEACONS, &sc->sc_flags); 1584 } 1585 1586 ieee80211_iterate_active_interfaces_atomic( 1587 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL, 1588 ath9k_bss_assoc_iter, sc); 1589 1590 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags) && 1591 ah->opmode == NL80211_IFTYPE_STATION) { 1592 memset(common->curbssid, 0, ETH_ALEN); 1593 common->curaid = 0; 1594 ath9k_hw_write_associd(sc->sc_ah); 1595 if (ath9k_hw_mci_is_enabled(sc->sc_ah)) 1596 ath9k_mci_update_wlan_channels(sc, true); 1597 } 1598 } 1599 1600 if (changed & BSS_CHANGED_IBSS) { 1601 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); 1602 common->curaid = bss_conf->aid; 1603 ath9k_hw_write_associd(sc->sc_ah); 1604 } 1605 1606 if ((changed & BSS_CHANGED_BEACON_ENABLED) || 1607 (changed & BSS_CHANGED_BEACON_INT)) { 1608 if (ah->opmode == NL80211_IFTYPE_AP && 1609 bss_conf->enable_beacon) 1610 ath9k_set_tsfadjust(sc, vif); 1611 if (ath9k_allow_beacon_config(sc, vif)) 1612 ath9k_beacon_config(sc, vif, changed); 1613 } 1614 1615 if (changed & BSS_CHANGED_ERP_SLOT) { 1616 if (bss_conf->use_short_slot) 1617 slottime = 9; 1618 else 1619 slottime = 20; 1620 if (vif->type == NL80211_IFTYPE_AP) { 1621 /* 1622 * Defer update, so that connected stations can adjust 1623 * their settings at the same time. 1624 * See beacon.c for more details 1625 */ 1626 sc->beacon.slottime = slottime; 1627 sc->beacon.updateslot = UPDATE; 1628 } else { 1629 ah->slottime = slottime; 1630 ath9k_hw_init_global_settings(ah); 1631 } 1632 } 1633 1634 if (changed & CHECK_ANI) 1635 ath_check_ani(sc); 1636 1637 mutex_unlock(&sc->mutex); 1638 ath9k_ps_restore(sc); 1639 1640 #undef CHECK_ANI 1641 } 1642 1643 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1644 { 1645 struct ath_softc *sc = hw->priv; 1646 u64 tsf; 1647 1648 mutex_lock(&sc->mutex); 1649 ath9k_ps_wakeup(sc); 1650 tsf = ath9k_hw_gettsf64(sc->sc_ah); 1651 ath9k_ps_restore(sc); 1652 mutex_unlock(&sc->mutex); 1653 1654 return tsf; 1655 } 1656 1657 static void ath9k_set_tsf(struct ieee80211_hw *hw, 1658 struct ieee80211_vif *vif, 1659 u64 tsf) 1660 { 1661 struct ath_softc *sc = hw->priv; 1662 1663 mutex_lock(&sc->mutex); 1664 ath9k_ps_wakeup(sc); 1665 ath9k_hw_settsf64(sc->sc_ah, tsf); 1666 ath9k_ps_restore(sc); 1667 mutex_unlock(&sc->mutex); 1668 } 1669 1670 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1671 { 1672 struct ath_softc *sc = hw->priv; 1673 1674 mutex_lock(&sc->mutex); 1675 1676 ath9k_ps_wakeup(sc); 1677 ath9k_hw_reset_tsf(sc->sc_ah); 1678 ath9k_ps_restore(sc); 1679 1680 mutex_unlock(&sc->mutex); 1681 } 1682 1683 static int ath9k_ampdu_action(struct ieee80211_hw *hw, 1684 struct ieee80211_vif *vif, 1685 enum ieee80211_ampdu_mlme_action action, 1686 struct ieee80211_sta *sta, 1687 u16 tid, u16 *ssn, u8 buf_size) 1688 { 1689 struct ath_softc *sc = hw->priv; 1690 bool flush = false; 1691 int ret = 0; 1692 1693 local_bh_disable(); 1694 1695 switch (action) { 1696 case IEEE80211_AMPDU_RX_START: 1697 break; 1698 case IEEE80211_AMPDU_RX_STOP: 1699 break; 1700 case IEEE80211_AMPDU_TX_START: 1701 ath9k_ps_wakeup(sc); 1702 ret = ath_tx_aggr_start(sc, sta, tid, ssn); 1703 if (!ret) 1704 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1705 ath9k_ps_restore(sc); 1706 break; 1707 case IEEE80211_AMPDU_TX_STOP_FLUSH: 1708 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: 1709 flush = true; 1710 case IEEE80211_AMPDU_TX_STOP_CONT: 1711 ath9k_ps_wakeup(sc); 1712 ath_tx_aggr_stop(sc, sta, tid); 1713 if (!flush) 1714 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1715 ath9k_ps_restore(sc); 1716 break; 1717 case IEEE80211_AMPDU_TX_OPERATIONAL: 1718 ath9k_ps_wakeup(sc); 1719 ath_tx_aggr_resume(sc, sta, tid); 1720 ath9k_ps_restore(sc); 1721 break; 1722 default: 1723 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n"); 1724 } 1725 1726 local_bh_enable(); 1727 1728 return ret; 1729 } 1730 1731 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx, 1732 struct survey_info *survey) 1733 { 1734 struct ath_softc *sc = hw->priv; 1735 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1736 struct ieee80211_supported_band *sband; 1737 struct ieee80211_channel *chan; 1738 unsigned long flags; 1739 int pos; 1740 1741 spin_lock_irqsave(&common->cc_lock, flags); 1742 if (idx == 0) 1743 ath_update_survey_stats(sc); 1744 1745 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ]; 1746 if (sband && idx >= sband->n_channels) { 1747 idx -= sband->n_channels; 1748 sband = NULL; 1749 } 1750 1751 if (!sband) 1752 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ]; 1753 1754 if (!sband || idx >= sband->n_channels) { 1755 spin_unlock_irqrestore(&common->cc_lock, flags); 1756 return -ENOENT; 1757 } 1758 1759 chan = &sband->channels[idx]; 1760 pos = chan->hw_value; 1761 memcpy(survey, &sc->survey[pos], sizeof(*survey)); 1762 survey->channel = chan; 1763 spin_unlock_irqrestore(&common->cc_lock, flags); 1764 1765 return 0; 1766 } 1767 1768 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class) 1769 { 1770 struct ath_softc *sc = hw->priv; 1771 struct ath_hw *ah = sc->sc_ah; 1772 1773 mutex_lock(&sc->mutex); 1774 ah->coverage_class = coverage_class; 1775 1776 ath9k_ps_wakeup(sc); 1777 ath9k_hw_init_global_settings(ah); 1778 ath9k_ps_restore(sc); 1779 1780 mutex_unlock(&sc->mutex); 1781 } 1782 1783 static void ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop) 1784 { 1785 struct ath_softc *sc = hw->priv; 1786 struct ath_hw *ah = sc->sc_ah; 1787 struct ath_common *common = ath9k_hw_common(ah); 1788 int timeout = 200; /* ms */ 1789 int i, j; 1790 bool drain_txq; 1791 1792 mutex_lock(&sc->mutex); 1793 cancel_delayed_work_sync(&sc->tx_complete_work); 1794 1795 if (ah->ah_flags & AH_UNPLUGGED) { 1796 ath_dbg(common, ANY, "Device has been unplugged!\n"); 1797 mutex_unlock(&sc->mutex); 1798 return; 1799 } 1800 1801 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) { 1802 ath_dbg(common, ANY, "Device not present\n"); 1803 mutex_unlock(&sc->mutex); 1804 return; 1805 } 1806 1807 for (j = 0; j < timeout; j++) { 1808 bool npend = false; 1809 1810 if (j) 1811 usleep_range(1000, 2000); 1812 1813 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 1814 if (!ATH_TXQ_SETUP(sc, i)) 1815 continue; 1816 1817 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]); 1818 1819 if (npend) 1820 break; 1821 } 1822 1823 if (!npend) 1824 break; 1825 } 1826 1827 if (drop) { 1828 ath9k_ps_wakeup(sc); 1829 spin_lock_bh(&sc->sc_pcu_lock); 1830 drain_txq = ath_drain_all_txq(sc); 1831 spin_unlock_bh(&sc->sc_pcu_lock); 1832 1833 if (!drain_txq) 1834 ath_reset(sc); 1835 1836 ath9k_ps_restore(sc); 1837 ieee80211_wake_queues(hw); 1838 } 1839 1840 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0); 1841 mutex_unlock(&sc->mutex); 1842 } 1843 1844 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw) 1845 { 1846 struct ath_softc *sc = hw->priv; 1847 int i; 1848 1849 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 1850 if (!ATH_TXQ_SETUP(sc, i)) 1851 continue; 1852 1853 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i])) 1854 return true; 1855 } 1856 return false; 1857 } 1858 1859 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw) 1860 { 1861 struct ath_softc *sc = hw->priv; 1862 struct ath_hw *ah = sc->sc_ah; 1863 struct ieee80211_vif *vif; 1864 struct ath_vif *avp; 1865 struct ath_buf *bf; 1866 struct ath_tx_status ts; 1867 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); 1868 int status; 1869 1870 vif = sc->beacon.bslot[0]; 1871 if (!vif) 1872 return 0; 1873 1874 if (!vif->bss_conf.enable_beacon) 1875 return 0; 1876 1877 avp = (void *)vif->drv_priv; 1878 1879 if (!sc->beacon.tx_processed && !edma) { 1880 tasklet_disable(&sc->bcon_tasklet); 1881 1882 bf = avp->av_bcbuf; 1883 if (!bf || !bf->bf_mpdu) 1884 goto skip; 1885 1886 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts); 1887 if (status == -EINPROGRESS) 1888 goto skip; 1889 1890 sc->beacon.tx_processed = true; 1891 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK); 1892 1893 skip: 1894 tasklet_enable(&sc->bcon_tasklet); 1895 } 1896 1897 return sc->beacon.tx_last; 1898 } 1899 1900 static int ath9k_get_stats(struct ieee80211_hw *hw, 1901 struct ieee80211_low_level_stats *stats) 1902 { 1903 struct ath_softc *sc = hw->priv; 1904 struct ath_hw *ah = sc->sc_ah; 1905 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats; 1906 1907 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad; 1908 stats->dot11RTSFailureCount = mib_stats->rts_bad; 1909 stats->dot11FCSErrorCount = mib_stats->fcs_bad; 1910 stats->dot11RTSSuccessCount = mib_stats->rts_good; 1911 return 0; 1912 } 1913 1914 static u32 fill_chainmask(u32 cap, u32 new) 1915 { 1916 u32 filled = 0; 1917 int i; 1918 1919 for (i = 0; cap && new; i++, cap >>= 1) { 1920 if (!(cap & BIT(0))) 1921 continue; 1922 1923 if (new & BIT(0)) 1924 filled |= BIT(i); 1925 1926 new >>= 1; 1927 } 1928 1929 return filled; 1930 } 1931 1932 static bool validate_antenna_mask(struct ath_hw *ah, u32 val) 1933 { 1934 if (AR_SREV_9300_20_OR_LATER(ah)) 1935 return true; 1936 1937 switch (val & 0x7) { 1938 case 0x1: 1939 case 0x3: 1940 case 0x7: 1941 return true; 1942 case 0x2: 1943 return (ah->caps.rx_chainmask == 1); 1944 default: 1945 return false; 1946 } 1947 } 1948 1949 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) 1950 { 1951 struct ath_softc *sc = hw->priv; 1952 struct ath_hw *ah = sc->sc_ah; 1953 1954 if (ah->caps.rx_chainmask != 1) 1955 rx_ant |= tx_ant; 1956 1957 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant) 1958 return -EINVAL; 1959 1960 sc->ant_rx = rx_ant; 1961 sc->ant_tx = tx_ant; 1962 1963 if (ah->caps.rx_chainmask == 1) 1964 return 0; 1965 1966 /* AR9100 runs into calibration issues if not all rx chains are enabled */ 1967 if (AR_SREV_9100(ah)) 1968 ah->rxchainmask = 0x7; 1969 else 1970 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant); 1971 1972 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant); 1973 ath9k_reload_chainmask_settings(sc); 1974 1975 return 0; 1976 } 1977 1978 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant) 1979 { 1980 struct ath_softc *sc = hw->priv; 1981 1982 *tx_ant = sc->ant_tx; 1983 *rx_ant = sc->ant_rx; 1984 return 0; 1985 } 1986 1987 #ifdef CONFIG_PM_SLEEP 1988 1989 static void ath9k_wow_map_triggers(struct ath_softc *sc, 1990 struct cfg80211_wowlan *wowlan, 1991 u32 *wow_triggers) 1992 { 1993 if (wowlan->disconnect) 1994 *wow_triggers |= AH_WOW_LINK_CHANGE | 1995 AH_WOW_BEACON_MISS; 1996 if (wowlan->magic_pkt) 1997 *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN; 1998 1999 if (wowlan->n_patterns) 2000 *wow_triggers |= AH_WOW_USER_PATTERN_EN; 2001 2002 sc->wow_enabled = *wow_triggers; 2003 2004 } 2005 2006 static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc) 2007 { 2008 struct ath_hw *ah = sc->sc_ah; 2009 struct ath_common *common = ath9k_hw_common(ah); 2010 struct ath9k_hw_capabilities *pcaps = &ah->caps; 2011 int pattern_count = 0; 2012 int i, byte_cnt; 2013 u8 dis_deauth_pattern[MAX_PATTERN_SIZE]; 2014 u8 dis_deauth_mask[MAX_PATTERN_SIZE]; 2015 2016 memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE); 2017 memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE); 2018 2019 /* 2020 * Create Dissassociate / Deauthenticate packet filter 2021 * 2022 * 2 bytes 2 byte 6 bytes 6 bytes 6 bytes 2023 * +--------------+----------+---------+--------+--------+---- 2024 * + Frame Control+ Duration + DA + SA + BSSID + 2025 * +--------------+----------+---------+--------+--------+---- 2026 * 2027 * The above is the management frame format for disassociate/ 2028 * deauthenticate pattern, from this we need to match the first byte 2029 * of 'Frame Control' and DA, SA, and BSSID fields 2030 * (skipping 2nd byte of FC and Duration feild. 2031 * 2032 * Disassociate pattern 2033 * -------------------- 2034 * Frame control = 00 00 1010 2035 * DA, SA, BSSID = x:x:x:x:x:x 2036 * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x 2037 * | x:x:x:x:x:x -- 22 bytes 2038 * 2039 * Deauthenticate pattern 2040 * ---------------------- 2041 * Frame control = 00 00 1100 2042 * DA, SA, BSSID = x:x:x:x:x:x 2043 * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x 2044 * | x:x:x:x:x:x -- 22 bytes 2045 */ 2046 2047 /* Create Disassociate Pattern first */ 2048 2049 byte_cnt = 0; 2050 2051 /* Fill out the mask with all FF's */ 2052 2053 for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++) 2054 dis_deauth_mask[i] = 0xff; 2055 2056 /* copy the first byte of frame control field */ 2057 dis_deauth_pattern[byte_cnt] = 0xa0; 2058 byte_cnt++; 2059 2060 /* skip 2nd byte of frame control and Duration field */ 2061 byte_cnt += 3; 2062 2063 /* 2064 * need not match the destination mac address, it can be a broadcast 2065 * mac address or an unicast to this station 2066 */ 2067 byte_cnt += 6; 2068 2069 /* copy the source mac address */ 2070 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN); 2071 2072 byte_cnt += 6; 2073 2074 /* copy the bssid, its same as the source mac address */ 2075 2076 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN); 2077 2078 /* Create Disassociate pattern mask */ 2079 2080 if (pcaps->hw_caps & ATH9K_HW_WOW_PATTERN_MATCH_EXACT) { 2081 2082 if (pcaps->hw_caps & ATH9K_HW_WOW_PATTERN_MATCH_DWORD) { 2083 /* 2084 * for AR9280, because of hardware limitation, the 2085 * first 4 bytes have to be matched for all patterns. 2086 * the mask for disassociation and de-auth pattern 2087 * matching need to enable the first 4 bytes. 2088 * also the duration field needs to be filled. 2089 */ 2090 dis_deauth_mask[0] = 0xf0; 2091 2092 /* 2093 * fill in duration field 2094 FIXME: what is the exact value ? 2095 */ 2096 dis_deauth_pattern[2] = 0xff; 2097 dis_deauth_pattern[3] = 0xff; 2098 } else { 2099 dis_deauth_mask[0] = 0xfe; 2100 } 2101 2102 dis_deauth_mask[1] = 0x03; 2103 dis_deauth_mask[2] = 0xc0; 2104 } else { 2105 dis_deauth_mask[0] = 0xef; 2106 dis_deauth_mask[1] = 0x3f; 2107 dis_deauth_mask[2] = 0x00; 2108 dis_deauth_mask[3] = 0xfc; 2109 } 2110 2111 ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n"); 2112 2113 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask, 2114 pattern_count, byte_cnt); 2115 2116 pattern_count++; 2117 /* 2118 * for de-authenticate pattern, only the first byte of the frame 2119 * control field gets changed from 0xA0 to 0xC0 2120 */ 2121 dis_deauth_pattern[0] = 0xC0; 2122 2123 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask, 2124 pattern_count, byte_cnt); 2125 2126 } 2127 2128 static void ath9k_wow_add_pattern(struct ath_softc *sc, 2129 struct cfg80211_wowlan *wowlan) 2130 { 2131 struct ath_hw *ah = sc->sc_ah; 2132 struct ath9k_wow_pattern *wow_pattern = NULL; 2133 struct cfg80211_wowlan_trig_pkt_pattern *patterns = wowlan->patterns; 2134 int mask_len; 2135 s8 i = 0; 2136 2137 if (!wowlan->n_patterns) 2138 return; 2139 2140 /* 2141 * Add the new user configured patterns 2142 */ 2143 for (i = 0; i < wowlan->n_patterns; i++) { 2144 2145 wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL); 2146 2147 if (!wow_pattern) 2148 return; 2149 2150 /* 2151 * TODO: convert the generic user space pattern to 2152 * appropriate chip specific/802.11 pattern. 2153 */ 2154 2155 mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8); 2156 memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE); 2157 memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE); 2158 memcpy(wow_pattern->pattern_bytes, patterns[i].pattern, 2159 patterns[i].pattern_len); 2160 memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len); 2161 wow_pattern->pattern_len = patterns[i].pattern_len; 2162 2163 /* 2164 * just need to take care of deauth and disssoc pattern, 2165 * make sure we don't overwrite them. 2166 */ 2167 2168 ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes, 2169 wow_pattern->mask_bytes, 2170 i + 2, 2171 wow_pattern->pattern_len); 2172 kfree(wow_pattern); 2173 2174 } 2175 2176 } 2177 2178 static int ath9k_suspend(struct ieee80211_hw *hw, 2179 struct cfg80211_wowlan *wowlan) 2180 { 2181 struct ath_softc *sc = hw->priv; 2182 struct ath_hw *ah = sc->sc_ah; 2183 struct ath_common *common = ath9k_hw_common(ah); 2184 u32 wow_triggers_enabled = 0; 2185 int ret = 0; 2186 2187 mutex_lock(&sc->mutex); 2188 2189 ath_cancel_work(sc); 2190 ath_stop_ani(sc); 2191 del_timer_sync(&sc->rx_poll_timer); 2192 2193 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) { 2194 ath_dbg(common, ANY, "Device not present\n"); 2195 ret = -EINVAL; 2196 goto fail_wow; 2197 } 2198 2199 if (WARN_ON(!wowlan)) { 2200 ath_dbg(common, WOW, "None of the WoW triggers enabled\n"); 2201 ret = -EINVAL; 2202 goto fail_wow; 2203 } 2204 2205 if (!device_can_wakeup(sc->dev)) { 2206 ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n"); 2207 ret = 1; 2208 goto fail_wow; 2209 } 2210 2211 /* 2212 * none of the sta vifs are associated 2213 * and we are not currently handling multivif 2214 * cases, for instance we have to seperately 2215 * configure 'keep alive frame' for each 2216 * STA. 2217 */ 2218 2219 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) { 2220 ath_dbg(common, WOW, "None of the STA vifs are associated\n"); 2221 ret = 1; 2222 goto fail_wow; 2223 } 2224 2225 if (sc->nvifs > 1) { 2226 ath_dbg(common, WOW, "WoW for multivif is not yet supported\n"); 2227 ret = 1; 2228 goto fail_wow; 2229 } 2230 2231 ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled); 2232 2233 ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n", 2234 wow_triggers_enabled); 2235 2236 ath9k_ps_wakeup(sc); 2237 2238 ath9k_stop_btcoex(sc); 2239 2240 /* 2241 * Enable wake up on recieving disassoc/deauth 2242 * frame by default. 2243 */ 2244 ath9k_wow_add_disassoc_deauth_pattern(sc); 2245 2246 if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN) 2247 ath9k_wow_add_pattern(sc, wowlan); 2248 2249 spin_lock_bh(&sc->sc_pcu_lock); 2250 /* 2251 * To avoid false wake, we enable beacon miss interrupt only 2252 * when we go to sleep. We save the current interrupt mask 2253 * so we can restore it after the system wakes up 2254 */ 2255 sc->wow_intr_before_sleep = ah->imask; 2256 ah->imask &= ~ATH9K_INT_GLOBAL; 2257 ath9k_hw_disable_interrupts(ah); 2258 ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL; 2259 ath9k_hw_set_interrupts(ah); 2260 ath9k_hw_enable_interrupts(ah); 2261 2262 spin_unlock_bh(&sc->sc_pcu_lock); 2263 2264 /* 2265 * we can now sync irq and kill any running tasklets, since we already 2266 * disabled interrupts and not holding a spin lock 2267 */ 2268 synchronize_irq(sc->irq); 2269 tasklet_kill(&sc->intr_tq); 2270 2271 ath9k_hw_wow_enable(ah, wow_triggers_enabled); 2272 2273 ath9k_ps_restore(sc); 2274 ath_dbg(common, ANY, "WoW enabled in ath9k\n"); 2275 atomic_inc(&sc->wow_sleep_proc_intr); 2276 2277 fail_wow: 2278 mutex_unlock(&sc->mutex); 2279 return ret; 2280 } 2281 2282 static int ath9k_resume(struct ieee80211_hw *hw) 2283 { 2284 struct ath_softc *sc = hw->priv; 2285 struct ath_hw *ah = sc->sc_ah; 2286 struct ath_common *common = ath9k_hw_common(ah); 2287 u32 wow_status; 2288 2289 mutex_lock(&sc->mutex); 2290 2291 ath9k_ps_wakeup(sc); 2292 2293 spin_lock_bh(&sc->sc_pcu_lock); 2294 2295 ath9k_hw_disable_interrupts(ah); 2296 ah->imask = sc->wow_intr_before_sleep; 2297 ath9k_hw_set_interrupts(ah); 2298 ath9k_hw_enable_interrupts(ah); 2299 2300 spin_unlock_bh(&sc->sc_pcu_lock); 2301 2302 wow_status = ath9k_hw_wow_wakeup(ah); 2303 2304 if (atomic_read(&sc->wow_got_bmiss_intr) == 0) { 2305 /* 2306 * some devices may not pick beacon miss 2307 * as the reason they woke up so we add 2308 * that here for that shortcoming. 2309 */ 2310 wow_status |= AH_WOW_BEACON_MISS; 2311 atomic_dec(&sc->wow_got_bmiss_intr); 2312 ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n"); 2313 } 2314 2315 atomic_dec(&sc->wow_sleep_proc_intr); 2316 2317 if (wow_status) { 2318 ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n", 2319 ath9k_hw_wow_event_to_string(wow_status), wow_status); 2320 } 2321 2322 ath_restart_work(sc); 2323 ath9k_start_btcoex(sc); 2324 2325 ath9k_ps_restore(sc); 2326 mutex_unlock(&sc->mutex); 2327 2328 return 0; 2329 } 2330 2331 static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled) 2332 { 2333 struct ath_softc *sc = hw->priv; 2334 2335 mutex_lock(&sc->mutex); 2336 device_init_wakeup(sc->dev, 1); 2337 device_set_wakeup_enable(sc->dev, enabled); 2338 mutex_unlock(&sc->mutex); 2339 } 2340 2341 #endif 2342 static void ath9k_sw_scan_start(struct ieee80211_hw *hw) 2343 { 2344 struct ath_softc *sc = hw->priv; 2345 2346 sc->scanning = 1; 2347 } 2348 2349 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw) 2350 { 2351 struct ath_softc *sc = hw->priv; 2352 2353 sc->scanning = 0; 2354 } 2355 2356 struct ieee80211_ops ath9k_ops = { 2357 .tx = ath9k_tx, 2358 .start = ath9k_start, 2359 .stop = ath9k_stop, 2360 .add_interface = ath9k_add_interface, 2361 .change_interface = ath9k_change_interface, 2362 .remove_interface = ath9k_remove_interface, 2363 .config = ath9k_config, 2364 .configure_filter = ath9k_configure_filter, 2365 .sta_add = ath9k_sta_add, 2366 .sta_remove = ath9k_sta_remove, 2367 .sta_notify = ath9k_sta_notify, 2368 .conf_tx = ath9k_conf_tx, 2369 .bss_info_changed = ath9k_bss_info_changed, 2370 .set_key = ath9k_set_key, 2371 .get_tsf = ath9k_get_tsf, 2372 .set_tsf = ath9k_set_tsf, 2373 .reset_tsf = ath9k_reset_tsf, 2374 .ampdu_action = ath9k_ampdu_action, 2375 .get_survey = ath9k_get_survey, 2376 .rfkill_poll = ath9k_rfkill_poll_state, 2377 .set_coverage_class = ath9k_set_coverage_class, 2378 .flush = ath9k_flush, 2379 .tx_frames_pending = ath9k_tx_frames_pending, 2380 .tx_last_beacon = ath9k_tx_last_beacon, 2381 .get_stats = ath9k_get_stats, 2382 .set_antenna = ath9k_set_antenna, 2383 .get_antenna = ath9k_get_antenna, 2384 2385 #ifdef CONFIG_PM_SLEEP 2386 .suspend = ath9k_suspend, 2387 .resume = ath9k_resume, 2388 .set_wakeup = ath9k_set_wakeup, 2389 #endif 2390 2391 #ifdef CONFIG_ATH9K_DEBUGFS 2392 .get_et_sset_count = ath9k_get_et_sset_count, 2393 .get_et_stats = ath9k_get_et_stats, 2394 .get_et_strings = ath9k_get_et_strings, 2395 #endif 2396 2397 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS) 2398 .sta_add_debugfs = ath9k_sta_add_debugfs, 2399 .sta_remove_debugfs = ath9k_sta_remove_debugfs, 2400 #endif 2401 .sw_scan_start = ath9k_sw_scan_start, 2402 .sw_scan_complete = ath9k_sw_scan_complete, 2403 }; 2404