1 /* 2 * Copyright (c) 2012 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include "ath9k.h" 18 19 /* 20 * TX polling - checks if the TX engine is stuck somewhere 21 * and issues a chip reset if so. 22 */ 23 void ath_tx_complete_poll_work(struct work_struct *work) 24 { 25 struct ath_softc *sc = container_of(work, struct ath_softc, 26 tx_complete_work.work); 27 struct ath_txq *txq; 28 int i; 29 bool needreset = false; 30 31 32 if (sc->tx99_state) { 33 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET, 34 "skip tx hung detection on tx99\n"); 35 return; 36 } 37 38 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 39 txq = sc->tx.txq_map[i]; 40 41 ath_txq_lock(sc, txq); 42 if (txq->axq_depth) { 43 if (txq->axq_tx_inprogress) { 44 needreset = true; 45 ath_txq_unlock(sc, txq); 46 break; 47 } else { 48 txq->axq_tx_inprogress = true; 49 } 50 } 51 ath_txq_unlock(sc, txq); 52 } 53 54 if (needreset) { 55 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET, 56 "tx hung, resetting the chip\n"); 57 ath9k_queue_reset(sc, RESET_TYPE_TX_HANG); 58 return; 59 } 60 61 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 62 msecs_to_jiffies(ATH_TX_COMPLETE_POLL_INT)); 63 } 64 65 /* 66 * Checks if the BB/MAC is hung. 67 */ 68 bool ath_hw_check(struct ath_softc *sc) 69 { 70 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 71 enum ath_reset_type type; 72 bool is_alive; 73 74 ath9k_ps_wakeup(sc); 75 76 is_alive = ath9k_hw_check_alive(sc->sc_ah); 77 78 if (!is_alive) { 79 ath_dbg(common, RESET, 80 "HW hang detected, schedule chip reset\n"); 81 type = RESET_TYPE_MAC_HANG; 82 ath9k_queue_reset(sc, type); 83 } 84 85 ath9k_ps_restore(sc); 86 87 return is_alive; 88 } 89 90 /* 91 * PLL-WAR for AR9485/AR9340 92 */ 93 static bool ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum) 94 { 95 static int count; 96 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 97 98 if (pll_sqsum >= 0x40000) { 99 count++; 100 if (count == 3) { 101 ath_dbg(common, RESET, "PLL WAR, resetting the chip\n"); 102 ath9k_queue_reset(sc, RESET_TYPE_PLL_HANG); 103 count = 0; 104 return true; 105 } 106 } else { 107 count = 0; 108 } 109 110 return false; 111 } 112 113 void ath_hw_pll_work(struct work_struct *work) 114 { 115 u32 pll_sqsum; 116 struct ath_softc *sc = container_of(work, struct ath_softc, 117 hw_pll_work.work); 118 /* 119 * ensure that the PLL WAR is executed only 120 * after the STA is associated (or) if the 121 * beaconing had started in interfaces that 122 * uses beacons. 123 */ 124 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags)) 125 return; 126 127 if (sc->tx99_state) 128 return; 129 130 ath9k_ps_wakeup(sc); 131 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah); 132 ath9k_ps_restore(sc); 133 if (ath_hw_pll_rx_hang_check(sc, pll_sqsum)) 134 return; 135 136 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, 137 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL)); 138 } 139 140 /* 141 * PA Pre-distortion. 142 */ 143 static void ath_paprd_activate(struct ath_softc *sc) 144 { 145 struct ath_hw *ah = sc->sc_ah; 146 struct ath_common *common = ath9k_hw_common(ah); 147 struct ath9k_hw_cal_data *caldata = ah->caldata; 148 int chain; 149 150 if (!caldata || !test_bit(PAPRD_DONE, &caldata->cal_flags)) { 151 ath_dbg(common, CALIBRATE, "Failed to activate PAPRD\n"); 152 return; 153 } 154 155 ar9003_paprd_enable(ah, false); 156 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 157 if (!(ah->txchainmask & BIT(chain))) 158 continue; 159 160 ar9003_paprd_populate_single_table(ah, caldata, chain); 161 } 162 163 ath_dbg(common, CALIBRATE, "Activating PAPRD\n"); 164 ar9003_paprd_enable(ah, true); 165 } 166 167 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain) 168 { 169 struct ieee80211_hw *hw = sc->hw; 170 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 171 struct ath_hw *ah = sc->sc_ah; 172 struct ath_common *common = ath9k_hw_common(ah); 173 struct ath_tx_control txctl; 174 int time_left; 175 176 memset(&txctl, 0, sizeof(txctl)); 177 txctl.txq = sc->tx.txq_map[IEEE80211_AC_BE]; 178 179 memset(tx_info, 0, sizeof(*tx_info)); 180 tx_info->band = hw->conf.chandef.chan->band; 181 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK; 182 tx_info->control.rates[0].idx = 0; 183 tx_info->control.rates[0].count = 1; 184 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS; 185 tx_info->control.rates[1].idx = -1; 186 187 init_completion(&sc->paprd_complete); 188 txctl.paprd = BIT(chain); 189 190 if (ath_tx_start(hw, skb, &txctl) != 0) { 191 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n"); 192 dev_kfree_skb_any(skb); 193 return false; 194 } 195 196 time_left = wait_for_completion_timeout(&sc->paprd_complete, 197 msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); 198 199 if (!time_left) 200 ath_dbg(common, CALIBRATE, 201 "Timeout waiting for paprd training on TX chain %d\n", 202 chain); 203 204 return !!time_left; 205 } 206 207 void ath_paprd_calibrate(struct work_struct *work) 208 { 209 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work); 210 struct ieee80211_hw *hw = sc->hw; 211 struct ath_hw *ah = sc->sc_ah; 212 struct ieee80211_hdr *hdr; 213 struct sk_buff *skb = NULL; 214 struct ath9k_hw_cal_data *caldata = ah->caldata; 215 struct ath_common *common = ath9k_hw_common(ah); 216 int ftype; 217 int chain_ok = 0; 218 int chain; 219 int len = 1800; 220 int ret; 221 222 if (!caldata || 223 !test_bit(PAPRD_PACKET_SENT, &caldata->cal_flags) || 224 test_bit(PAPRD_DONE, &caldata->cal_flags)) { 225 ath_dbg(common, CALIBRATE, "Skipping PAPRD calibration\n"); 226 return; 227 } 228 229 ath9k_ps_wakeup(sc); 230 231 if (ar9003_paprd_init_table(ah) < 0) 232 goto fail_paprd; 233 234 skb = alloc_skb(len, GFP_KERNEL); 235 if (!skb) 236 goto fail_paprd; 237 238 skb_put(skb, len); 239 memset(skb->data, 0, len); 240 hdr = (struct ieee80211_hdr *)skb->data; 241 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC; 242 hdr->frame_control = cpu_to_le16(ftype); 243 hdr->duration_id = cpu_to_le16(10); 244 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN); 245 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN); 246 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN); 247 248 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 249 if (!(ah->txchainmask & BIT(chain))) 250 continue; 251 252 chain_ok = 0; 253 ar9003_paprd_setup_gain_table(ah, chain); 254 255 ath_dbg(common, CALIBRATE, 256 "Sending PAPRD training frame on chain %d\n", chain); 257 if (!ath_paprd_send_frame(sc, skb, chain)) 258 goto fail_paprd; 259 260 if (!ar9003_paprd_is_done(ah)) { 261 ath_dbg(common, CALIBRATE, 262 "PAPRD not yet done on chain %d\n", chain); 263 break; 264 } 265 266 ret = ar9003_paprd_create_curve(ah, caldata, chain); 267 if (ret == -EINPROGRESS) { 268 ath_dbg(common, CALIBRATE, 269 "PAPRD curve on chain %d needs to be re-trained\n", 270 chain); 271 break; 272 } else if (ret) { 273 ath_dbg(common, CALIBRATE, 274 "PAPRD create curve failed on chain %d\n", 275 chain); 276 break; 277 } 278 279 chain_ok = 1; 280 } 281 kfree_skb(skb); 282 283 if (chain_ok) { 284 set_bit(PAPRD_DONE, &caldata->cal_flags); 285 ath_paprd_activate(sc); 286 } 287 288 fail_paprd: 289 ath9k_ps_restore(sc); 290 } 291 292 /* 293 * ANI performs periodic noise floor calibration 294 * that is used to adjust and optimize the chip performance. This 295 * takes environmental changes (location, temperature) into account. 296 * When the task is complete, it reschedules itself depending on the 297 * appropriate interval that was calculated. 298 */ 299 void ath_ani_calibrate(unsigned long data) 300 { 301 struct ath_softc *sc = (struct ath_softc *)data; 302 struct ath_hw *ah = sc->sc_ah; 303 struct ath_common *common = ath9k_hw_common(ah); 304 bool longcal = false; 305 bool shortcal = false; 306 bool aniflag = false; 307 unsigned int timestamp = jiffies_to_msecs(jiffies); 308 u32 cal_interval, short_cal_interval, long_cal_interval; 309 unsigned long flags; 310 311 if (ah->caldata && test_bit(NFCAL_INTF, &ah->caldata->cal_flags)) 312 long_cal_interval = ATH_LONG_CALINTERVAL_INT; 313 else 314 long_cal_interval = ATH_LONG_CALINTERVAL; 315 316 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ? 317 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL; 318 319 /* Only calibrate if awake */ 320 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE) { 321 if (++ah->ani_skip_count >= ATH_ANI_MAX_SKIP_COUNT) { 322 spin_lock_irqsave(&sc->sc_pm_lock, flags); 323 sc->ps_flags |= PS_WAIT_FOR_ANI; 324 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 325 } 326 goto set_timer; 327 } 328 ah->ani_skip_count = 0; 329 spin_lock_irqsave(&sc->sc_pm_lock, flags); 330 sc->ps_flags &= ~PS_WAIT_FOR_ANI; 331 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 332 333 ath9k_ps_wakeup(sc); 334 335 /* Long calibration runs independently of short calibration. */ 336 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) { 337 longcal = true; 338 common->ani.longcal_timer = timestamp; 339 } 340 341 /* Short calibration applies only while caldone is false */ 342 if (!common->ani.caldone) { 343 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) { 344 shortcal = true; 345 common->ani.shortcal_timer = timestamp; 346 common->ani.resetcal_timer = timestamp; 347 } 348 } else { 349 if ((timestamp - common->ani.resetcal_timer) >= 350 ATH_RESTART_CALINTERVAL) { 351 common->ani.caldone = ath9k_hw_reset_calvalid(ah); 352 if (common->ani.caldone) 353 common->ani.resetcal_timer = timestamp; 354 } 355 } 356 357 /* Verify whether we must check ANI */ 358 if ((timestamp - common->ani.checkani_timer) >= ah->config.ani_poll_interval) { 359 aniflag = true; 360 common->ani.checkani_timer = timestamp; 361 } 362 363 /* Call ANI routine if necessary */ 364 if (aniflag) { 365 spin_lock(&common->cc_lock); 366 ath9k_hw_ani_monitor(ah, ah->curchan); 367 ath_update_survey_stats(sc); 368 spin_unlock(&common->cc_lock); 369 } 370 371 /* Perform calibration if necessary */ 372 if (longcal || shortcal) { 373 common->ani.caldone = 374 ath9k_hw_calibrate(ah, ah->curchan, 375 ah->rxchainmask, longcal); 376 } 377 378 ath_dbg(common, ANI, 379 "Calibration @%lu finished: %s %s %s, caldone: %s\n", 380 jiffies, 381 longcal ? "long" : "", shortcal ? "short" : "", 382 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false"); 383 384 ath9k_ps_restore(sc); 385 386 set_timer: 387 /* 388 * Set timer interval based on previous results. 389 * The interval must be the shortest necessary to satisfy ANI, 390 * short calibration and long calibration. 391 */ 392 cal_interval = ATH_LONG_CALINTERVAL; 393 cal_interval = min(cal_interval, (u32)ah->config.ani_poll_interval); 394 if (!common->ani.caldone) 395 cal_interval = min(cal_interval, (u32)short_cal_interval); 396 397 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval)); 398 399 if (ar9003_is_paprd_enabled(ah) && ah->caldata) { 400 if (!test_bit(PAPRD_DONE, &ah->caldata->cal_flags)) { 401 ieee80211_queue_work(sc->hw, &sc->paprd_work); 402 } else if (!ah->paprd_table_write_done) { 403 ath9k_ps_wakeup(sc); 404 ath_paprd_activate(sc); 405 ath9k_ps_restore(sc); 406 } 407 } 408 } 409 410 void ath_start_ani(struct ath_softc *sc) 411 { 412 struct ath_hw *ah = sc->sc_ah; 413 struct ath_common *common = ath9k_hw_common(ah); 414 unsigned long timestamp = jiffies_to_msecs(jiffies); 415 416 if (common->disable_ani || 417 !test_bit(SC_OP_ANI_RUN, &sc->sc_flags) || 418 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) 419 return; 420 421 common->ani.longcal_timer = timestamp; 422 common->ani.shortcal_timer = timestamp; 423 common->ani.checkani_timer = timestamp; 424 425 ath_dbg(common, ANI, "Starting ANI\n"); 426 mod_timer(&common->ani.timer, 427 jiffies + msecs_to_jiffies((u32)ah->config.ani_poll_interval)); 428 } 429 430 void ath_stop_ani(struct ath_softc *sc) 431 { 432 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 433 434 ath_dbg(common, ANI, "Stopping ANI\n"); 435 del_timer_sync(&common->ani.timer); 436 } 437 438 void ath_check_ani(struct ath_softc *sc) 439 { 440 struct ath_hw *ah = sc->sc_ah; 441 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf; 442 443 /* 444 * Check for the various conditions in which ANI has to 445 * be stopped. 446 */ 447 if (ah->opmode == NL80211_IFTYPE_ADHOC) { 448 if (!cur_conf->enable_beacon) 449 goto stop_ani; 450 } else if (ah->opmode == NL80211_IFTYPE_AP) { 451 if (!cur_conf->enable_beacon) { 452 /* 453 * Disable ANI only when there are no 454 * associated stations. 455 */ 456 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) 457 goto stop_ani; 458 } 459 } else if (ah->opmode == NL80211_IFTYPE_STATION) { 460 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) 461 goto stop_ani; 462 } 463 464 if (!test_bit(SC_OP_ANI_RUN, &sc->sc_flags)) { 465 set_bit(SC_OP_ANI_RUN, &sc->sc_flags); 466 ath_start_ani(sc); 467 } 468 469 return; 470 471 stop_ani: 472 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags); 473 ath_stop_ani(sc); 474 } 475 476 void ath_update_survey_nf(struct ath_softc *sc, int channel) 477 { 478 struct ath_hw *ah = sc->sc_ah; 479 struct ath9k_channel *chan = &ah->channels[channel]; 480 struct survey_info *survey = &sc->survey[channel]; 481 482 if (chan->noisefloor) { 483 survey->filled |= SURVEY_INFO_NOISE_DBM; 484 survey->noise = ath9k_hw_getchan_noise(ah, chan, 485 chan->noisefloor); 486 } 487 } 488 489 /* 490 * Updates the survey statistics and returns the busy time since last 491 * update in %, if the measurement duration was long enough for the 492 * result to be useful, -1 otherwise. 493 */ 494 int ath_update_survey_stats(struct ath_softc *sc) 495 { 496 struct ath_hw *ah = sc->sc_ah; 497 struct ath_common *common = ath9k_hw_common(ah); 498 int pos = ah->curchan - &ah->channels[0]; 499 struct survey_info *survey = &sc->survey[pos]; 500 struct ath_cycle_counters *cc = &common->cc_survey; 501 unsigned int div = common->clockrate * 1000; 502 int ret = 0; 503 504 if (!ah->curchan) 505 return -1; 506 507 if (ah->power_mode == ATH9K_PM_AWAKE) 508 ath_hw_cycle_counters_update(common); 509 510 if (cc->cycles > 0) { 511 survey->filled |= SURVEY_INFO_CHANNEL_TIME | 512 SURVEY_INFO_CHANNEL_TIME_BUSY | 513 SURVEY_INFO_CHANNEL_TIME_RX | 514 SURVEY_INFO_CHANNEL_TIME_TX; 515 survey->channel_time += cc->cycles / div; 516 survey->channel_time_busy += cc->rx_busy / div; 517 survey->channel_time_rx += cc->rx_frame / div; 518 survey->channel_time_tx += cc->tx_frame / div; 519 } 520 521 if (cc->cycles < div) 522 return -1; 523 524 if (cc->cycles > 0) 525 ret = cc->rx_busy * 100 / cc->cycles; 526 527 memset(cc, 0, sizeof(*cc)); 528 529 ath_update_survey_nf(sc, pos); 530 531 return ret; 532 } 533