1 /* 2 * Copyright (c) 2012 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include "ath9k.h" 18 19 /* 20 * TX polling - checks if the TX engine is stuck somewhere 21 * and issues a chip reset if so. 22 */ 23 void ath_tx_complete_poll_work(struct work_struct *work) 24 { 25 struct ath_softc *sc = container_of(work, struct ath_softc, 26 tx_complete_work.work); 27 struct ath_txq *txq; 28 int i; 29 bool needreset = false; 30 31 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) 32 if (ATH_TXQ_SETUP(sc, i)) { 33 txq = &sc->tx.txq[i]; 34 ath_txq_lock(sc, txq); 35 if (txq->axq_depth) { 36 if (txq->axq_tx_inprogress) { 37 needreset = true; 38 ath_txq_unlock(sc, txq); 39 break; 40 } else { 41 txq->axq_tx_inprogress = true; 42 } 43 } 44 ath_txq_unlock_complete(sc, txq); 45 } 46 47 if (needreset) { 48 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET, 49 "tx hung, resetting the chip\n"); 50 ath9k_queue_reset(sc, RESET_TYPE_TX_HANG); 51 return; 52 } 53 54 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 55 msecs_to_jiffies(ATH_TX_COMPLETE_POLL_INT)); 56 } 57 58 /* 59 * Checks if the BB/MAC is hung. 60 */ 61 void ath_hw_check(struct work_struct *work) 62 { 63 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work); 64 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 65 unsigned long flags; 66 int busy; 67 u8 is_alive, nbeacon = 1; 68 enum ath_reset_type type; 69 70 ath9k_ps_wakeup(sc); 71 is_alive = ath9k_hw_check_alive(sc->sc_ah); 72 73 if (is_alive && !AR_SREV_9300(sc->sc_ah)) 74 goto out; 75 else if (!is_alive && AR_SREV_9300(sc->sc_ah)) { 76 ath_dbg(common, RESET, 77 "DCU stuck is detected. Schedule chip reset\n"); 78 type = RESET_TYPE_MAC_HANG; 79 goto sched_reset; 80 } 81 82 spin_lock_irqsave(&common->cc_lock, flags); 83 busy = ath_update_survey_stats(sc); 84 spin_unlock_irqrestore(&common->cc_lock, flags); 85 86 ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n", 87 busy, sc->hw_busy_count + 1); 88 if (busy >= 99) { 89 if (++sc->hw_busy_count >= 3) { 90 type = RESET_TYPE_BB_HANG; 91 goto sched_reset; 92 } 93 } else if (busy >= 0) { 94 sc->hw_busy_count = 0; 95 nbeacon = 3; 96 } 97 98 ath_start_rx_poll(sc, nbeacon); 99 goto out; 100 101 sched_reset: 102 ath9k_queue_reset(sc, type); 103 out: 104 ath9k_ps_restore(sc); 105 } 106 107 /* 108 * PLL-WAR for AR9485/AR9340 109 */ 110 static bool ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum) 111 { 112 static int count; 113 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 114 115 if (pll_sqsum >= 0x40000) { 116 count++; 117 if (count == 3) { 118 ath_dbg(common, RESET, "PLL WAR, resetting the chip\n"); 119 ath9k_queue_reset(sc, RESET_TYPE_PLL_HANG); 120 count = 0; 121 return true; 122 } 123 } else { 124 count = 0; 125 } 126 127 return false; 128 } 129 130 void ath_hw_pll_work(struct work_struct *work) 131 { 132 u32 pll_sqsum; 133 struct ath_softc *sc = container_of(work, struct ath_softc, 134 hw_pll_work.work); 135 /* 136 * ensure that the PLL WAR is executed only 137 * after the STA is associated (or) if the 138 * beaconing had started in interfaces that 139 * uses beacons. 140 */ 141 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags)) 142 return; 143 144 ath9k_ps_wakeup(sc); 145 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah); 146 ath9k_ps_restore(sc); 147 if (ath_hw_pll_rx_hang_check(sc, pll_sqsum)) 148 return; 149 150 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, 151 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL)); 152 } 153 154 /* 155 * RX Polling - monitors baseband hangs. 156 */ 157 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon) 158 { 159 if (!AR_SREV_9300(sc->sc_ah)) 160 return; 161 162 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) 163 return; 164 165 mod_timer(&sc->rx_poll_timer, jiffies + msecs_to_jiffies 166 (nbeacon * sc->cur_beacon_conf.beacon_interval)); 167 } 168 169 void ath_rx_poll(unsigned long data) 170 { 171 struct ath_softc *sc = (struct ath_softc *)data; 172 173 ieee80211_queue_work(sc->hw, &sc->hw_check_work); 174 } 175 176 /* 177 * PA Pre-distortion. 178 */ 179 static void ath_paprd_activate(struct ath_softc *sc) 180 { 181 struct ath_hw *ah = sc->sc_ah; 182 struct ath_common *common = ath9k_hw_common(ah); 183 struct ath9k_hw_cal_data *caldata = ah->caldata; 184 int chain; 185 186 if (!caldata || !caldata->paprd_done) { 187 ath_dbg(common, CALIBRATE, "Failed to activate PAPRD\n"); 188 return; 189 } 190 191 ar9003_paprd_enable(ah, false); 192 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 193 if (!(ah->txchainmask & BIT(chain))) 194 continue; 195 196 ar9003_paprd_populate_single_table(ah, caldata, chain); 197 } 198 199 ath_dbg(common, CALIBRATE, "Activating PAPRD\n"); 200 ar9003_paprd_enable(ah, true); 201 } 202 203 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain) 204 { 205 struct ieee80211_hw *hw = sc->hw; 206 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 207 struct ath_hw *ah = sc->sc_ah; 208 struct ath_common *common = ath9k_hw_common(ah); 209 struct ath_tx_control txctl; 210 int time_left; 211 212 memset(&txctl, 0, sizeof(txctl)); 213 txctl.txq = sc->tx.txq_map[IEEE80211_AC_BE]; 214 215 memset(tx_info, 0, sizeof(*tx_info)); 216 tx_info->band = hw->conf.channel->band; 217 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK; 218 tx_info->control.rates[0].idx = 0; 219 tx_info->control.rates[0].count = 1; 220 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS; 221 tx_info->control.rates[1].idx = -1; 222 223 init_completion(&sc->paprd_complete); 224 txctl.paprd = BIT(chain); 225 226 if (ath_tx_start(hw, skb, &txctl) != 0) { 227 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n"); 228 dev_kfree_skb_any(skb); 229 return false; 230 } 231 232 time_left = wait_for_completion_timeout(&sc->paprd_complete, 233 msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); 234 235 if (!time_left) 236 ath_dbg(common, CALIBRATE, 237 "Timeout waiting for paprd training on TX chain %d\n", 238 chain); 239 240 return !!time_left; 241 } 242 243 void ath_paprd_calibrate(struct work_struct *work) 244 { 245 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work); 246 struct ieee80211_hw *hw = sc->hw; 247 struct ath_hw *ah = sc->sc_ah; 248 struct ieee80211_hdr *hdr; 249 struct sk_buff *skb = NULL; 250 struct ath9k_hw_cal_data *caldata = ah->caldata; 251 struct ath_common *common = ath9k_hw_common(ah); 252 int ftype; 253 int chain_ok = 0; 254 int chain; 255 int len = 1800; 256 int ret; 257 258 if (!caldata || !caldata->paprd_packet_sent || caldata->paprd_done) { 259 ath_dbg(common, CALIBRATE, "Skipping PAPRD calibration\n"); 260 return; 261 } 262 263 ath9k_ps_wakeup(sc); 264 265 if (ar9003_paprd_init_table(ah) < 0) 266 goto fail_paprd; 267 268 skb = alloc_skb(len, GFP_KERNEL); 269 if (!skb) 270 goto fail_paprd; 271 272 skb_put(skb, len); 273 memset(skb->data, 0, len); 274 hdr = (struct ieee80211_hdr *)skb->data; 275 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC; 276 hdr->frame_control = cpu_to_le16(ftype); 277 hdr->duration_id = cpu_to_le16(10); 278 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN); 279 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN); 280 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN); 281 282 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 283 if (!(ah->txchainmask & BIT(chain))) 284 continue; 285 286 chain_ok = 0; 287 ar9003_paprd_setup_gain_table(ah, chain); 288 289 ath_dbg(common, CALIBRATE, 290 "Sending PAPRD training frame on chain %d\n", chain); 291 if (!ath_paprd_send_frame(sc, skb, chain)) 292 goto fail_paprd; 293 294 if (!ar9003_paprd_is_done(ah)) { 295 ath_dbg(common, CALIBRATE, 296 "PAPRD not yet done on chain %d\n", chain); 297 break; 298 } 299 300 ret = ar9003_paprd_create_curve(ah, caldata, chain); 301 if (ret == -EINPROGRESS) { 302 ath_dbg(common, CALIBRATE, 303 "PAPRD curve on chain %d needs to be re-trained\n", 304 chain); 305 break; 306 } else if (ret) { 307 ath_dbg(common, CALIBRATE, 308 "PAPRD create curve failed on chain %d\n", 309 chain); 310 break; 311 } 312 313 chain_ok = 1; 314 } 315 kfree_skb(skb); 316 317 if (chain_ok) { 318 caldata->paprd_done = true; 319 ath_paprd_activate(sc); 320 } 321 322 fail_paprd: 323 ath9k_ps_restore(sc); 324 } 325 326 /* 327 * ANI performs periodic noise floor calibration 328 * that is used to adjust and optimize the chip performance. This 329 * takes environmental changes (location, temperature) into account. 330 * When the task is complete, it reschedules itself depending on the 331 * appropriate interval that was calculated. 332 */ 333 void ath_ani_calibrate(unsigned long data) 334 { 335 struct ath_softc *sc = (struct ath_softc *)data; 336 struct ath_hw *ah = sc->sc_ah; 337 struct ath_common *common = ath9k_hw_common(ah); 338 bool longcal = false; 339 bool shortcal = false; 340 bool aniflag = false; 341 unsigned int timestamp = jiffies_to_msecs(jiffies); 342 u32 cal_interval, short_cal_interval, long_cal_interval; 343 unsigned long flags; 344 345 if (ah->caldata && ah->caldata->nfcal_interference) 346 long_cal_interval = ATH_LONG_CALINTERVAL_INT; 347 else 348 long_cal_interval = ATH_LONG_CALINTERVAL; 349 350 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ? 351 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL; 352 353 /* Only calibrate if awake */ 354 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE) { 355 if (++ah->ani_skip_count >= ATH_ANI_MAX_SKIP_COUNT) { 356 spin_lock_irqsave(&sc->sc_pm_lock, flags); 357 sc->ps_flags |= PS_WAIT_FOR_ANI; 358 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 359 } 360 goto set_timer; 361 } 362 ah->ani_skip_count = 0; 363 spin_lock_irqsave(&sc->sc_pm_lock, flags); 364 sc->ps_flags &= ~PS_WAIT_FOR_ANI; 365 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 366 367 ath9k_ps_wakeup(sc); 368 369 /* Long calibration runs independently of short calibration. */ 370 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) { 371 longcal = true; 372 common->ani.longcal_timer = timestamp; 373 } 374 375 /* Short calibration applies only while caldone is false */ 376 if (!common->ani.caldone) { 377 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) { 378 shortcal = true; 379 common->ani.shortcal_timer = timestamp; 380 common->ani.resetcal_timer = timestamp; 381 } 382 } else { 383 if ((timestamp - common->ani.resetcal_timer) >= 384 ATH_RESTART_CALINTERVAL) { 385 common->ani.caldone = ath9k_hw_reset_calvalid(ah); 386 if (common->ani.caldone) 387 common->ani.resetcal_timer = timestamp; 388 } 389 } 390 391 /* Verify whether we must check ANI */ 392 if (sc->sc_ah->config.enable_ani 393 && (timestamp - common->ani.checkani_timer) >= 394 ah->config.ani_poll_interval) { 395 aniflag = true; 396 common->ani.checkani_timer = timestamp; 397 } 398 399 /* Call ANI routine if necessary */ 400 if (aniflag) { 401 spin_lock_irqsave(&common->cc_lock, flags); 402 ath9k_hw_ani_monitor(ah, ah->curchan); 403 ath_update_survey_stats(sc); 404 spin_unlock_irqrestore(&common->cc_lock, flags); 405 } 406 407 /* Perform calibration if necessary */ 408 if (longcal || shortcal) { 409 common->ani.caldone = 410 ath9k_hw_calibrate(ah, ah->curchan, 411 ah->rxchainmask, longcal); 412 } 413 414 ath_dbg(common, ANI, 415 "Calibration @%lu finished: %s %s %s, caldone: %s\n", 416 jiffies, 417 longcal ? "long" : "", shortcal ? "short" : "", 418 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false"); 419 420 ath9k_debug_samp_bb_mac(sc); 421 ath9k_ps_restore(sc); 422 423 set_timer: 424 /* 425 * Set timer interval based on previous results. 426 * The interval must be the shortest necessary to satisfy ANI, 427 * short calibration and long calibration. 428 */ 429 cal_interval = ATH_LONG_CALINTERVAL; 430 if (sc->sc_ah->config.enable_ani) 431 cal_interval = min(cal_interval, 432 (u32)ah->config.ani_poll_interval); 433 if (!common->ani.caldone) 434 cal_interval = min(cal_interval, (u32)short_cal_interval); 435 436 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval)); 437 438 if (ar9003_is_paprd_enabled(ah) && ah->caldata) { 439 if (!ah->caldata->paprd_done) { 440 ieee80211_queue_work(sc->hw, &sc->paprd_work); 441 } else if (!ah->paprd_table_write_done) { 442 ath9k_ps_wakeup(sc); 443 ath_paprd_activate(sc); 444 ath9k_ps_restore(sc); 445 } 446 } 447 } 448 449 void ath_start_ani(struct ath_softc *sc) 450 { 451 struct ath_hw *ah = sc->sc_ah; 452 struct ath_common *common = ath9k_hw_common(ah); 453 unsigned long timestamp = jiffies_to_msecs(jiffies); 454 455 if (common->disable_ani || 456 !test_bit(SC_OP_ANI_RUN, &sc->sc_flags) || 457 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) 458 return; 459 460 common->ani.longcal_timer = timestamp; 461 common->ani.shortcal_timer = timestamp; 462 common->ani.checkani_timer = timestamp; 463 464 ath_dbg(common, ANI, "Starting ANI\n"); 465 mod_timer(&common->ani.timer, 466 jiffies + msecs_to_jiffies((u32)ah->config.ani_poll_interval)); 467 } 468 469 void ath_stop_ani(struct ath_softc *sc) 470 { 471 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 472 473 ath_dbg(common, ANI, "Stopping ANI\n"); 474 del_timer_sync(&common->ani.timer); 475 } 476 477 void ath_check_ani(struct ath_softc *sc) 478 { 479 struct ath_hw *ah = sc->sc_ah; 480 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf; 481 482 /* 483 * Check for the various conditions in which ANI has to 484 * be stopped. 485 */ 486 if (ah->opmode == NL80211_IFTYPE_ADHOC) { 487 if (!cur_conf->enable_beacon) 488 goto stop_ani; 489 } else if (ah->opmode == NL80211_IFTYPE_AP) { 490 if (!cur_conf->enable_beacon) { 491 /* 492 * Disable ANI only when there are no 493 * associated stations. 494 */ 495 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) 496 goto stop_ani; 497 } 498 } else if (ah->opmode == NL80211_IFTYPE_STATION) { 499 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) 500 goto stop_ani; 501 } 502 503 if (!test_bit(SC_OP_ANI_RUN, &sc->sc_flags)) { 504 set_bit(SC_OP_ANI_RUN, &sc->sc_flags); 505 ath_start_ani(sc); 506 } 507 508 return; 509 510 stop_ani: 511 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags); 512 ath_stop_ani(sc); 513 } 514 515 void ath_update_survey_nf(struct ath_softc *sc, int channel) 516 { 517 struct ath_hw *ah = sc->sc_ah; 518 struct ath9k_channel *chan = &ah->channels[channel]; 519 struct survey_info *survey = &sc->survey[channel]; 520 521 if (chan->noisefloor) { 522 survey->filled |= SURVEY_INFO_NOISE_DBM; 523 survey->noise = ath9k_hw_getchan_noise(ah, chan); 524 } 525 } 526 527 /* 528 * Updates the survey statistics and returns the busy time since last 529 * update in %, if the measurement duration was long enough for the 530 * result to be useful, -1 otherwise. 531 */ 532 int ath_update_survey_stats(struct ath_softc *sc) 533 { 534 struct ath_hw *ah = sc->sc_ah; 535 struct ath_common *common = ath9k_hw_common(ah); 536 int pos = ah->curchan - &ah->channels[0]; 537 struct survey_info *survey = &sc->survey[pos]; 538 struct ath_cycle_counters *cc = &common->cc_survey; 539 unsigned int div = common->clockrate * 1000; 540 int ret = 0; 541 542 if (!ah->curchan) 543 return -1; 544 545 if (ah->power_mode == ATH9K_PM_AWAKE) 546 ath_hw_cycle_counters_update(common); 547 548 if (cc->cycles > 0) { 549 survey->filled |= SURVEY_INFO_CHANNEL_TIME | 550 SURVEY_INFO_CHANNEL_TIME_BUSY | 551 SURVEY_INFO_CHANNEL_TIME_RX | 552 SURVEY_INFO_CHANNEL_TIME_TX; 553 survey->channel_time += cc->cycles / div; 554 survey->channel_time_busy += cc->rx_busy / div; 555 survey->channel_time_rx += cc->rx_frame / div; 556 survey->channel_time_tx += cc->tx_frame / div; 557 } 558 559 if (cc->cycles < div) 560 return -1; 561 562 if (cc->cycles > 0) 563 ret = cc->rx_busy * 100 / cc->cycles; 564 565 memset(cc, 0, sizeof(*cc)); 566 567 ath_update_survey_nf(sc, pos); 568 569 return ret; 570 } 571