1 /* 2 * Copyright (c) 2010-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef ATH9K_HW_OPS_H 18 #define ATH9K_HW_OPS_H 19 20 #include "hw.h" 21 22 /* Hardware core and driver accessible callbacks */ 23 24 static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah, 25 bool power_off) 26 { 27 if (!ah->aspm_enabled) 28 return; 29 30 ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off); 31 } 32 33 static inline void ath9k_hw_rxena(struct ath_hw *ah) 34 { 35 ath9k_hw_ops(ah)->rx_enable(ah); 36 } 37 38 static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds, 39 u32 link) 40 { 41 ath9k_hw_ops(ah)->set_desc_link(ds, link); 42 } 43 44 static inline bool ath9k_hw_calibrate(struct ath_hw *ah, 45 struct ath9k_channel *chan, 46 u8 rxchainmask, 47 bool longcal) 48 { 49 return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal); 50 } 51 52 static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked) 53 { 54 return ath9k_hw_ops(ah)->get_isr(ah, masked); 55 } 56 57 static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds, 58 struct ath_tx_info *i) 59 { 60 return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i); 61 } 62 63 static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds, 64 struct ath_tx_status *ts) 65 { 66 return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts); 67 } 68 69 static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah, 70 struct ath_hw_antcomb_conf *antconf) 71 { 72 ath9k_hw_ops(ah)->antdiv_comb_conf_get(ah, antconf); 73 } 74 75 static inline void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah, 76 struct ath_hw_antcomb_conf *antconf) 77 { 78 ath9k_hw_ops(ah)->antdiv_comb_conf_set(ah, antconf); 79 } 80 81 static inline void ath9k_hw_antctrl_shared_chain_lnadiv(struct ath_hw *ah, 82 bool enable) 83 { 84 if (ath9k_hw_ops(ah)->antctrl_shared_chain_lnadiv) 85 ath9k_hw_ops(ah)->antctrl_shared_chain_lnadiv(ah, enable); 86 } 87 88 /* Private hardware call ops */ 89 90 /* PHY ops */ 91 92 static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah, 93 struct ath9k_channel *chan) 94 { 95 return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan); 96 } 97 98 static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah, 99 struct ath9k_channel *chan) 100 { 101 ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan); 102 } 103 104 static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah, 105 struct ath9k_channel *chan, 106 u16 modesIndex) 107 { 108 if (!ath9k_hw_private_ops(ah)->set_rf_regs) 109 return true; 110 111 return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex); 112 } 113 114 static inline void ath9k_hw_init_bb(struct ath_hw *ah, 115 struct ath9k_channel *chan) 116 { 117 return ath9k_hw_private_ops(ah)->init_bb(ah, chan); 118 } 119 120 static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah, 121 struct ath9k_channel *chan) 122 { 123 return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan); 124 } 125 126 static inline int ath9k_hw_process_ini(struct ath_hw *ah, 127 struct ath9k_channel *chan) 128 { 129 return ath9k_hw_private_ops(ah)->process_ini(ah, chan); 130 } 131 132 static inline void ath9k_olc_init(struct ath_hw *ah) 133 { 134 if (!ath9k_hw_private_ops(ah)->olc_init) 135 return; 136 137 return ath9k_hw_private_ops(ah)->olc_init(ah); 138 } 139 140 static inline void ath9k_hw_set_rfmode(struct ath_hw *ah, 141 struct ath9k_channel *chan) 142 { 143 return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan); 144 } 145 146 static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah) 147 { 148 return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah); 149 } 150 151 static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah, 152 struct ath9k_channel *chan) 153 { 154 return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan); 155 } 156 157 static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah) 158 { 159 return ath9k_hw_private_ops(ah)->rfbus_req(ah); 160 } 161 162 static inline void ath9k_hw_rfbus_done(struct ath_hw *ah) 163 { 164 return ath9k_hw_private_ops(ah)->rfbus_done(ah); 165 } 166 167 static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah) 168 { 169 if (!ath9k_hw_private_ops(ah)->restore_chainmask) 170 return; 171 172 return ath9k_hw_private_ops(ah)->restore_chainmask(ah); 173 } 174 175 static inline bool ath9k_hw_ani_control(struct ath_hw *ah, 176 enum ath9k_ani_cmd cmd, int param) 177 { 178 return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param); 179 } 180 181 static inline void ath9k_hw_do_getnf(struct ath_hw *ah, 182 int16_t nfarray[NUM_NF_READINGS]) 183 { 184 ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray); 185 } 186 187 static inline bool ath9k_hw_init_cal(struct ath_hw *ah, 188 struct ath9k_channel *chan) 189 { 190 return ath9k_hw_private_ops(ah)->init_cal(ah, chan); 191 } 192 193 static inline void ath9k_hw_setup_calibration(struct ath_hw *ah, 194 struct ath9k_cal_list *currCal) 195 { 196 ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal); 197 } 198 199 static inline int ath9k_hw_fast_chan_change(struct ath_hw *ah, 200 struct ath9k_channel *chan, 201 u8 *ini_reloaded) 202 { 203 return ath9k_hw_private_ops(ah)->fast_chan_change(ah, chan, 204 ini_reloaded); 205 } 206 207 static inline void ath9k_hw_set_radar_params(struct ath_hw *ah) 208 { 209 if (!ath9k_hw_private_ops(ah)->set_radar_params) 210 return; 211 212 ath9k_hw_private_ops(ah)->set_radar_params(ah, &ah->radar_conf); 213 } 214 215 #endif /* ATH9K_HW_OPS_H */ 216