1 /* 2 * Copyright (c) 2010 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include "htc.h" 18 19 MODULE_AUTHOR("Atheros Communications"); 20 MODULE_LICENSE("Dual BSD/GPL"); 21 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices"); 22 23 static unsigned int ath9k_debug = ATH_DBG_DEFAULT; 24 module_param_named(debug, ath9k_debug, uint, 0); 25 MODULE_PARM_DESC(debug, "Debugging mask"); 26 27 int htc_modparam_nohwcrypt; 28 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444); 29 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption"); 30 31 #define CHAN2G(_freq, _idx) { \ 32 .center_freq = (_freq), \ 33 .hw_value = (_idx), \ 34 .max_power = 20, \ 35 } 36 37 #define CHAN5G(_freq, _idx) { \ 38 .band = IEEE80211_BAND_5GHZ, \ 39 .center_freq = (_freq), \ 40 .hw_value = (_idx), \ 41 .max_power = 20, \ 42 } 43 44 #define ATH_HTC_BTCOEX_PRODUCT_ID "wb193" 45 46 static struct ieee80211_channel ath9k_2ghz_channels[] = { 47 CHAN2G(2412, 0), /* Channel 1 */ 48 CHAN2G(2417, 1), /* Channel 2 */ 49 CHAN2G(2422, 2), /* Channel 3 */ 50 CHAN2G(2427, 3), /* Channel 4 */ 51 CHAN2G(2432, 4), /* Channel 5 */ 52 CHAN2G(2437, 5), /* Channel 6 */ 53 CHAN2G(2442, 6), /* Channel 7 */ 54 CHAN2G(2447, 7), /* Channel 8 */ 55 CHAN2G(2452, 8), /* Channel 9 */ 56 CHAN2G(2457, 9), /* Channel 10 */ 57 CHAN2G(2462, 10), /* Channel 11 */ 58 CHAN2G(2467, 11), /* Channel 12 */ 59 CHAN2G(2472, 12), /* Channel 13 */ 60 CHAN2G(2484, 13), /* Channel 14 */ 61 }; 62 63 static struct ieee80211_channel ath9k_5ghz_channels[] = { 64 /* _We_ call this UNII 1 */ 65 CHAN5G(5180, 14), /* Channel 36 */ 66 CHAN5G(5200, 15), /* Channel 40 */ 67 CHAN5G(5220, 16), /* Channel 44 */ 68 CHAN5G(5240, 17), /* Channel 48 */ 69 /* _We_ call this UNII 2 */ 70 CHAN5G(5260, 18), /* Channel 52 */ 71 CHAN5G(5280, 19), /* Channel 56 */ 72 CHAN5G(5300, 20), /* Channel 60 */ 73 CHAN5G(5320, 21), /* Channel 64 */ 74 /* _We_ call this "Middle band" */ 75 CHAN5G(5500, 22), /* Channel 100 */ 76 CHAN5G(5520, 23), /* Channel 104 */ 77 CHAN5G(5540, 24), /* Channel 108 */ 78 CHAN5G(5560, 25), /* Channel 112 */ 79 CHAN5G(5580, 26), /* Channel 116 */ 80 CHAN5G(5600, 27), /* Channel 120 */ 81 CHAN5G(5620, 28), /* Channel 124 */ 82 CHAN5G(5640, 29), /* Channel 128 */ 83 CHAN5G(5660, 30), /* Channel 132 */ 84 CHAN5G(5680, 31), /* Channel 136 */ 85 CHAN5G(5700, 32), /* Channel 140 */ 86 /* _We_ call this UNII 3 */ 87 CHAN5G(5745, 33), /* Channel 149 */ 88 CHAN5G(5765, 34), /* Channel 153 */ 89 CHAN5G(5785, 35), /* Channel 157 */ 90 CHAN5G(5805, 36), /* Channel 161 */ 91 CHAN5G(5825, 37), /* Channel 165 */ 92 }; 93 94 /* Atheros hardware rate code addition for short premble */ 95 #define SHPCHECK(__hw_rate, __flags) \ 96 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0) 97 98 #define RATE(_bitrate, _hw_rate, _flags) { \ 99 .bitrate = (_bitrate), \ 100 .flags = (_flags), \ 101 .hw_value = (_hw_rate), \ 102 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \ 103 } 104 105 static struct ieee80211_rate ath9k_legacy_rates[] = { 106 RATE(10, 0x1b, 0), 107 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */ 108 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */ 109 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */ 110 RATE(60, 0x0b, 0), 111 RATE(90, 0x0f, 0), 112 RATE(120, 0x0a, 0), 113 RATE(180, 0x0e, 0), 114 RATE(240, 0x09, 0), 115 RATE(360, 0x0d, 0), 116 RATE(480, 0x08, 0), 117 RATE(540, 0x0c, 0), 118 }; 119 120 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv) 121 { 122 int time_left; 123 124 if (atomic_read(&priv->htc->tgt_ready) > 0) { 125 atomic_dec(&priv->htc->tgt_ready); 126 return 0; 127 } 128 129 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */ 130 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ); 131 if (!time_left) { 132 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n"); 133 return -ETIMEDOUT; 134 } 135 136 atomic_dec(&priv->htc->tgt_ready); 137 138 return 0; 139 } 140 141 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv) 142 { 143 ath9k_htc_exit_debug(priv->ah); 144 ath9k_hw_deinit(priv->ah); 145 tasklet_kill(&priv->wmi_tasklet); 146 tasklet_kill(&priv->rx_tasklet); 147 tasklet_kill(&priv->tx_tasklet); 148 kfree(priv->ah); 149 priv->ah = NULL; 150 } 151 152 static void ath9k_deinit_device(struct ath9k_htc_priv *priv) 153 { 154 struct ieee80211_hw *hw = priv->hw; 155 156 wiphy_rfkill_stop_polling(hw->wiphy); 157 ath9k_deinit_leds(priv); 158 ieee80211_unregister_hw(hw); 159 ath9k_rx_cleanup(priv); 160 ath9k_tx_cleanup(priv); 161 ath9k_deinit_priv(priv); 162 } 163 164 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv, 165 u16 service_id, 166 void (*tx) (void *, 167 struct sk_buff *, 168 enum htc_endpoint_id, 169 bool txok), 170 enum htc_endpoint_id *ep_id) 171 { 172 struct htc_service_connreq req; 173 174 memset(&req, 0, sizeof(struct htc_service_connreq)); 175 176 req.service_id = service_id; 177 req.ep_callbacks.priv = priv; 178 req.ep_callbacks.rx = ath9k_htc_rxep; 179 req.ep_callbacks.tx = tx; 180 181 return htc_connect_service(priv->htc, &req, ep_id); 182 } 183 184 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid) 185 { 186 int ret; 187 188 /* WMI CMD*/ 189 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep); 190 if (ret) 191 goto err; 192 193 /* Beacon */ 194 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep, 195 &priv->beacon_ep); 196 if (ret) 197 goto err; 198 199 /* CAB */ 200 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep, 201 &priv->cab_ep); 202 if (ret) 203 goto err; 204 205 206 /* UAPSD */ 207 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep, 208 &priv->uapsd_ep); 209 if (ret) 210 goto err; 211 212 /* MGMT */ 213 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep, 214 &priv->mgmt_ep); 215 if (ret) 216 goto err; 217 218 /* DATA BE */ 219 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep, 220 &priv->data_be_ep); 221 if (ret) 222 goto err; 223 224 /* DATA BK */ 225 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep, 226 &priv->data_bk_ep); 227 if (ret) 228 goto err; 229 230 /* DATA VI */ 231 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep, 232 &priv->data_vi_ep); 233 if (ret) 234 goto err; 235 236 /* DATA VO */ 237 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep, 238 &priv->data_vo_ep); 239 if (ret) 240 goto err; 241 242 /* 243 * Setup required credits before initializing HTC. 244 * This is a bit hacky, but, since queuing is done in 245 * the HIF layer, shouldn't matter much. 246 */ 247 248 switch(devid) { 249 case 0x7010: 250 case 0x7015: 251 case 0x9018: 252 priv->htc->credits = 45; 253 break; 254 default: 255 priv->htc->credits = 33; 256 } 257 258 ret = htc_init(priv->htc); 259 if (ret) 260 goto err; 261 262 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n", 263 priv->htc->credits); 264 265 return 0; 266 267 err: 268 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n"); 269 return ret; 270 } 271 272 static int ath9k_reg_notifier(struct wiphy *wiphy, 273 struct regulatory_request *request) 274 { 275 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 276 struct ath9k_htc_priv *priv = hw->priv; 277 278 return ath_reg_notifier_apply(wiphy, request, 279 ath9k_hw_regulatory(priv->ah)); 280 } 281 282 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset) 283 { 284 struct ath_hw *ah = (struct ath_hw *) hw_priv; 285 struct ath_common *common = ath9k_hw_common(ah); 286 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 287 __be32 val, reg = cpu_to_be32(reg_offset); 288 int r; 289 290 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID, 291 (u8 *) ®, sizeof(reg), 292 (u8 *) &val, sizeof(val), 293 100); 294 if (unlikely(r)) { 295 ath_print(common, ATH_DBG_WMI, 296 "REGISTER READ FAILED: (0x%04x, %d)\n", 297 reg_offset, r); 298 return -EIO; 299 } 300 301 return be32_to_cpu(val); 302 } 303 304 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset) 305 { 306 struct ath_hw *ah = (struct ath_hw *) hw_priv; 307 struct ath_common *common = ath9k_hw_common(ah); 308 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 309 __be32 buf[2] = { 310 cpu_to_be32(reg_offset), 311 cpu_to_be32(val), 312 }; 313 int r; 314 315 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 316 (u8 *) &buf, sizeof(buf), 317 (u8 *) &val, sizeof(val), 318 100); 319 if (unlikely(r)) { 320 ath_print(common, ATH_DBG_WMI, 321 "REGISTER WRITE FAILED:(0x%04x, %d)\n", 322 reg_offset, r); 323 } 324 } 325 326 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset) 327 { 328 struct ath_hw *ah = (struct ath_hw *) hw_priv; 329 struct ath_common *common = ath9k_hw_common(ah); 330 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 331 u32 rsp_status; 332 int r; 333 334 mutex_lock(&priv->wmi->multi_write_mutex); 335 336 /* Store the register/value */ 337 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg = 338 cpu_to_be32(reg_offset); 339 priv->wmi->multi_write[priv->wmi->multi_write_idx].val = 340 cpu_to_be32(val); 341 342 priv->wmi->multi_write_idx++; 343 344 /* If the buffer is full, send it out. */ 345 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) { 346 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 347 (u8 *) &priv->wmi->multi_write, 348 sizeof(struct register_write) * priv->wmi->multi_write_idx, 349 (u8 *) &rsp_status, sizeof(rsp_status), 350 100); 351 if (unlikely(r)) { 352 ath_print(common, ATH_DBG_WMI, 353 "REGISTER WRITE FAILED, multi len: %d\n", 354 priv->wmi->multi_write_idx); 355 } 356 priv->wmi->multi_write_idx = 0; 357 } 358 359 mutex_unlock(&priv->wmi->multi_write_mutex); 360 } 361 362 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset) 363 { 364 struct ath_hw *ah = (struct ath_hw *) hw_priv; 365 struct ath_common *common = ath9k_hw_common(ah); 366 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 367 368 if (atomic_read(&priv->wmi->mwrite_cnt)) 369 ath9k_regwrite_buffer(hw_priv, val, reg_offset); 370 else 371 ath9k_regwrite_single(hw_priv, val, reg_offset); 372 } 373 374 static void ath9k_enable_regwrite_buffer(void *hw_priv) 375 { 376 struct ath_hw *ah = (struct ath_hw *) hw_priv; 377 struct ath_common *common = ath9k_hw_common(ah); 378 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 379 380 atomic_inc(&priv->wmi->mwrite_cnt); 381 } 382 383 static void ath9k_disable_regwrite_buffer(void *hw_priv) 384 { 385 struct ath_hw *ah = (struct ath_hw *) hw_priv; 386 struct ath_common *common = ath9k_hw_common(ah); 387 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 388 389 atomic_dec(&priv->wmi->mwrite_cnt); 390 } 391 392 static void ath9k_regwrite_flush(void *hw_priv) 393 { 394 struct ath_hw *ah = (struct ath_hw *) hw_priv; 395 struct ath_common *common = ath9k_hw_common(ah); 396 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 397 u32 rsp_status; 398 int r; 399 400 mutex_lock(&priv->wmi->multi_write_mutex); 401 402 if (priv->wmi->multi_write_idx) { 403 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 404 (u8 *) &priv->wmi->multi_write, 405 sizeof(struct register_write) * priv->wmi->multi_write_idx, 406 (u8 *) &rsp_status, sizeof(rsp_status), 407 100); 408 if (unlikely(r)) { 409 ath_print(common, ATH_DBG_WMI, 410 "REGISTER WRITE FAILED, multi len: %d\n", 411 priv->wmi->multi_write_idx); 412 } 413 priv->wmi->multi_write_idx = 0; 414 } 415 416 mutex_unlock(&priv->wmi->multi_write_mutex); 417 } 418 419 static const struct ath_ops ath9k_common_ops = { 420 .read = ath9k_regread, 421 .write = ath9k_regwrite, 422 .enable_write_buffer = ath9k_enable_regwrite_buffer, 423 .disable_write_buffer = ath9k_disable_regwrite_buffer, 424 .write_flush = ath9k_regwrite_flush, 425 }; 426 427 static void ath_usb_read_cachesize(struct ath_common *common, int *csz) 428 { 429 *csz = L1_CACHE_BYTES >> 2; 430 } 431 432 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data) 433 { 434 struct ath_hw *ah = (struct ath_hw *) common->ah; 435 436 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S)); 437 438 if (!ath9k_hw_wait(ah, 439 AR_EEPROM_STATUS_DATA, 440 AR_EEPROM_STATUS_DATA_BUSY | 441 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0, 442 AH_WAIT_TIMEOUT)) 443 return false; 444 445 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA), 446 AR_EEPROM_STATUS_DATA_VAL); 447 448 return true; 449 } 450 451 static const struct ath_bus_ops ath9k_usb_bus_ops = { 452 .ath_bus_type = ATH_USB, 453 .read_cachesize = ath_usb_read_cachesize, 454 .eeprom_read = ath_usb_eeprom_read, 455 }; 456 457 static void setup_ht_cap(struct ath9k_htc_priv *priv, 458 struct ieee80211_sta_ht_cap *ht_info) 459 { 460 struct ath_common *common = ath9k_hw_common(priv->ah); 461 u8 tx_streams, rx_streams; 462 int i; 463 464 ht_info->ht_supported = true; 465 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 466 IEEE80211_HT_CAP_SM_PS | 467 IEEE80211_HT_CAP_SGI_40 | 468 IEEE80211_HT_CAP_DSSSCCK40; 469 470 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) 471 ht_info->cap |= IEEE80211_HT_CAP_SGI_20; 472 473 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 474 475 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 476 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; 477 478 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); 479 480 /* ath9k_htc supports only 1 or 2 stream devices */ 481 tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2); 482 rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2); 483 484 ath_print(common, ATH_DBG_CONFIG, 485 "TX streams %d, RX streams: %d\n", 486 tx_streams, rx_streams); 487 488 if (tx_streams != rx_streams) { 489 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; 490 ht_info->mcs.tx_params |= ((tx_streams - 1) << 491 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT); 492 } 493 494 for (i = 0; i < rx_streams; i++) 495 ht_info->mcs.rx_mask[i] = 0xff; 496 497 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED; 498 } 499 500 static int ath9k_init_queues(struct ath9k_htc_priv *priv) 501 { 502 struct ath_common *common = ath9k_hw_common(priv->ah); 503 int i; 504 505 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++) 506 priv->hwq_map[i] = -1; 507 508 priv->beaconq = ath9k_hw_beaconq_setup(priv->ah); 509 if (priv->beaconq == -1) { 510 ath_print(common, ATH_DBG_FATAL, 511 "Unable to setup BEACON xmit queue\n"); 512 goto err; 513 } 514 515 priv->cabq = ath9k_htc_cabq_setup(priv); 516 if (priv->cabq == -1) { 517 ath_print(common, ATH_DBG_FATAL, 518 "Unable to setup CAB xmit queue\n"); 519 goto err; 520 } 521 522 if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) { 523 ath_print(common, ATH_DBG_FATAL, 524 "Unable to setup xmit queue for BE traffic\n"); 525 goto err; 526 } 527 528 if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) { 529 ath_print(common, ATH_DBG_FATAL, 530 "Unable to setup xmit queue for BK traffic\n"); 531 goto err; 532 } 533 if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) { 534 ath_print(common, ATH_DBG_FATAL, 535 "Unable to setup xmit queue for VI traffic\n"); 536 goto err; 537 } 538 if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) { 539 ath_print(common, ATH_DBG_FATAL, 540 "Unable to setup xmit queue for VO traffic\n"); 541 goto err; 542 } 543 544 return 0; 545 546 err: 547 return -EINVAL; 548 } 549 550 static void ath9k_init_crypto(struct ath9k_htc_priv *priv) 551 { 552 struct ath_common *common = ath9k_hw_common(priv->ah); 553 int i = 0; 554 555 /* Get the hardware key cache size. */ 556 common->keymax = priv->ah->caps.keycache_size; 557 if (common->keymax > ATH_KEYMAX) { 558 ath_print(common, ATH_DBG_ANY, 559 "Warning, using only %u entries in %u key cache\n", 560 ATH_KEYMAX, common->keymax); 561 common->keymax = ATH_KEYMAX; 562 } 563 564 /* 565 * Reset the key cache since some parts do not 566 * reset the contents on initial power up. 567 */ 568 for (i = 0; i < common->keymax; i++) 569 ath9k_hw_keyreset(priv->ah, (u16) i); 570 } 571 572 static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv) 573 { 574 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) { 575 priv->sbands[IEEE80211_BAND_2GHZ].channels = 576 ath9k_2ghz_channels; 577 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ; 578 priv->sbands[IEEE80211_BAND_2GHZ].n_channels = 579 ARRAY_SIZE(ath9k_2ghz_channels); 580 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates; 581 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates = 582 ARRAY_SIZE(ath9k_legacy_rates); 583 } 584 585 if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) { 586 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels; 587 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ; 588 priv->sbands[IEEE80211_BAND_5GHZ].n_channels = 589 ARRAY_SIZE(ath9k_5ghz_channels); 590 priv->sbands[IEEE80211_BAND_5GHZ].bitrates = 591 ath9k_legacy_rates + 4; 592 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates = 593 ARRAY_SIZE(ath9k_legacy_rates) - 4; 594 } 595 } 596 597 static void ath9k_init_misc(struct ath9k_htc_priv *priv) 598 { 599 struct ath_common *common = ath9k_hw_common(priv->ah); 600 601 common->tx_chainmask = priv->ah->caps.tx_chainmask; 602 common->rx_chainmask = priv->ah->caps.rx_chainmask; 603 604 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN); 605 606 priv->ah->opmode = NL80211_IFTYPE_STATION; 607 } 608 609 static void ath9k_init_btcoex(struct ath9k_htc_priv *priv) 610 { 611 int qnum; 612 613 switch (priv->ah->btcoex_hw.scheme) { 614 case ATH_BTCOEX_CFG_NONE: 615 break; 616 case ATH_BTCOEX_CFG_3WIRE: 617 priv->ah->btcoex_hw.btactive_gpio = 7; 618 priv->ah->btcoex_hw.btpriority_gpio = 6; 619 priv->ah->btcoex_hw.wlanactive_gpio = 8; 620 priv->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW; 621 ath9k_hw_btcoex_init_3wire(priv->ah); 622 ath_htc_init_btcoex_work(priv); 623 qnum = priv->hwq_map[WME_AC_BE]; 624 ath9k_hw_init_btcoex_hw(priv->ah, qnum); 625 break; 626 default: 627 WARN_ON(1); 628 break; 629 } 630 } 631 632 static int ath9k_init_priv(struct ath9k_htc_priv *priv, 633 u16 devid, char *product) 634 { 635 struct ath_hw *ah = NULL; 636 struct ath_common *common; 637 int ret = 0, csz = 0; 638 639 priv->op_flags |= OP_INVALID; 640 641 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL); 642 if (!ah) 643 return -ENOMEM; 644 645 ah->hw_version.devid = devid; 646 ah->hw_version.subsysid = 0; /* FIXME */ 647 priv->ah = ah; 648 649 common = ath9k_hw_common(ah); 650 common->ops = &ath9k_common_ops; 651 common->bus_ops = &ath9k_usb_bus_ops; 652 common->ah = ah; 653 common->hw = priv->hw; 654 common->priv = priv; 655 common->debug_mask = ath9k_debug; 656 657 spin_lock_init(&priv->wmi->wmi_lock); 658 spin_lock_init(&priv->beacon_lock); 659 spin_lock_init(&priv->tx_lock); 660 mutex_init(&priv->mutex); 661 mutex_init(&priv->htc_pm_lock); 662 tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet, 663 (unsigned long)priv); 664 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet, 665 (unsigned long)priv); 666 tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv); 667 INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work); 668 INIT_WORK(&priv->ps_work, ath9k_ps_work); 669 670 /* 671 * Cache line size is used to size and align various 672 * structures used to communicate with the hardware. 673 */ 674 ath_read_cachesize(common, &csz); 675 common->cachelsz = csz << 2; /* convert to bytes */ 676 677 ret = ath9k_hw_init(ah); 678 if (ret) { 679 ath_print(common, ATH_DBG_FATAL, 680 "Unable to initialize hardware; " 681 "initialization status: %d\n", ret); 682 goto err_hw; 683 } 684 685 ret = ath9k_htc_init_debug(ah); 686 if (ret) { 687 ath_print(common, ATH_DBG_FATAL, 688 "Unable to create debugfs files\n"); 689 goto err_debug; 690 } 691 692 ret = ath9k_init_queues(priv); 693 if (ret) 694 goto err_queues; 695 696 ath9k_init_crypto(priv); 697 ath9k_init_channels_rates(priv); 698 ath9k_init_misc(priv); 699 700 if (product && strncmp(product, ATH_HTC_BTCOEX_PRODUCT_ID, 5) == 0) { 701 ah->btcoex_hw.scheme = ATH_BTCOEX_CFG_3WIRE; 702 ath9k_init_btcoex(priv); 703 } 704 705 return 0; 706 707 err_queues: 708 ath9k_htc_exit_debug(ah); 709 err_debug: 710 ath9k_hw_deinit(ah); 711 err_hw: 712 713 kfree(ah); 714 priv->ah = NULL; 715 716 return ret; 717 } 718 719 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv, 720 struct ieee80211_hw *hw) 721 { 722 struct ath_common *common = ath9k_hw_common(priv->ah); 723 724 hw->flags = IEEE80211_HW_SIGNAL_DBM | 725 IEEE80211_HW_AMPDU_AGGREGATION | 726 IEEE80211_HW_SPECTRUM_MGMT | 727 IEEE80211_HW_HAS_RATE_CONTROL | 728 IEEE80211_HW_RX_INCLUDES_FCS | 729 IEEE80211_HW_SUPPORTS_PS | 730 IEEE80211_HW_PS_NULLFUNC_STACK; 731 732 hw->wiphy->interface_modes = 733 BIT(NL80211_IFTYPE_STATION) | 734 BIT(NL80211_IFTYPE_ADHOC); 735 736 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 737 738 hw->queues = 4; 739 hw->channel_change_time = 5000; 740 hw->max_listen_interval = 10; 741 hw->vif_data_size = sizeof(struct ath9k_htc_vif); 742 hw->sta_data_size = sizeof(struct ath9k_htc_sta); 743 744 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */ 745 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) + 746 sizeof(struct htc_frame_hdr) + 4; 747 748 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) 749 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 750 &priv->sbands[IEEE80211_BAND_2GHZ]; 751 if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) 752 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = 753 &priv->sbands[IEEE80211_BAND_5GHZ]; 754 755 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) { 756 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) 757 setup_ht_cap(priv, 758 &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap); 759 if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) 760 setup_ht_cap(priv, 761 &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap); 762 } 763 764 SET_IEEE80211_PERM_ADDR(hw, common->macaddr); 765 } 766 767 static int ath9k_init_device(struct ath9k_htc_priv *priv, 768 u16 devid, char *product) 769 { 770 struct ieee80211_hw *hw = priv->hw; 771 struct ath_common *common; 772 struct ath_hw *ah; 773 int error = 0; 774 struct ath_regulatory *reg; 775 776 /* Bring up device */ 777 error = ath9k_init_priv(priv, devid, product); 778 if (error != 0) 779 goto err_init; 780 781 ah = priv->ah; 782 common = ath9k_hw_common(ah); 783 ath9k_set_hw_capab(priv, hw); 784 785 /* Initialize regulatory */ 786 error = ath_regd_init(&common->regulatory, priv->hw->wiphy, 787 ath9k_reg_notifier); 788 if (error) 789 goto err_regd; 790 791 reg = &common->regulatory; 792 793 /* Setup TX */ 794 error = ath9k_tx_init(priv); 795 if (error != 0) 796 goto err_tx; 797 798 /* Setup RX */ 799 error = ath9k_rx_init(priv); 800 if (error != 0) 801 goto err_rx; 802 803 /* Register with mac80211 */ 804 error = ieee80211_register_hw(hw); 805 if (error) 806 goto err_register; 807 808 /* Handle world regulatory */ 809 if (!ath_is_world_regd(reg)) { 810 error = regulatory_hint(hw->wiphy, reg->alpha2); 811 if (error) 812 goto err_world; 813 } 814 815 ath9k_init_leds(priv); 816 ath9k_start_rfkill_poll(priv); 817 818 return 0; 819 820 err_world: 821 ieee80211_unregister_hw(hw); 822 err_register: 823 ath9k_rx_cleanup(priv); 824 err_rx: 825 ath9k_tx_cleanup(priv); 826 err_tx: 827 /* Nothing */ 828 err_regd: 829 ath9k_deinit_priv(priv); 830 err_init: 831 return error; 832 } 833 834 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, 835 u16 devid, char *product) 836 { 837 struct ieee80211_hw *hw; 838 struct ath9k_htc_priv *priv; 839 int ret; 840 841 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops); 842 if (!hw) 843 return -ENOMEM; 844 845 priv = hw->priv; 846 priv->hw = hw; 847 priv->htc = htc_handle; 848 priv->dev = dev; 849 htc_handle->drv_priv = priv; 850 SET_IEEE80211_DEV(hw, priv->dev); 851 852 ret = ath9k_htc_wait_for_target(priv); 853 if (ret) 854 goto err_free; 855 856 priv->wmi = ath9k_init_wmi(priv); 857 if (!priv->wmi) { 858 ret = -EINVAL; 859 goto err_free; 860 } 861 862 ret = ath9k_init_htc_services(priv, devid); 863 if (ret) 864 goto err_init; 865 866 /* The device may have been unplugged earlier. */ 867 priv->op_flags &= ~OP_UNPLUGGED; 868 869 ret = ath9k_init_device(priv, devid, product); 870 if (ret) 871 goto err_init; 872 873 return 0; 874 875 err_init: 876 ath9k_deinit_wmi(priv); 877 err_free: 878 ieee80211_free_hw(hw); 879 return ret; 880 } 881 882 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug) 883 { 884 if (htc_handle->drv_priv) { 885 886 /* Check if the device has been yanked out. */ 887 if (hotunplug) 888 htc_handle->drv_priv->op_flags |= OP_UNPLUGGED; 889 890 ath9k_deinit_device(htc_handle->drv_priv); 891 ath9k_deinit_wmi(htc_handle->drv_priv); 892 ieee80211_free_hw(htc_handle->drv_priv->hw); 893 } 894 } 895 896 #ifdef CONFIG_PM 897 int ath9k_htc_resume(struct htc_target *htc_handle) 898 { 899 int ret; 900 901 ret = ath9k_htc_wait_for_target(htc_handle->drv_priv); 902 if (ret) 903 return ret; 904 905 ret = ath9k_init_htc_services(htc_handle->drv_priv, 906 htc_handle->drv_priv->ah->hw_version.devid); 907 return ret; 908 } 909 #endif 910 911 static int __init ath9k_htc_init(void) 912 { 913 int error; 914 915 error = ath9k_htc_debug_create_root(); 916 if (error < 0) { 917 printk(KERN_ERR 918 "ath9k_htc: Unable to create debugfs root: %d\n", 919 error); 920 goto err_dbg; 921 } 922 923 error = ath9k_hif_usb_init(); 924 if (error < 0) { 925 printk(KERN_ERR 926 "ath9k_htc: No USB devices found," 927 " driver not installed.\n"); 928 error = -ENODEV; 929 goto err_usb; 930 } 931 932 return 0; 933 934 err_usb: 935 ath9k_htc_debug_remove_root(); 936 err_dbg: 937 return error; 938 } 939 module_init(ath9k_htc_init); 940 941 static void __exit ath9k_htc_exit(void) 942 { 943 ath9k_hif_usb_exit(); 944 ath9k_htc_debug_remove_root(); 945 printk(KERN_INFO "ath9k_htc: Driver unloaded\n"); 946 } 947 module_exit(ath9k_htc_exit); 948