1 /* 2 * Copyright (c) 2010 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include "htc.h" 18 19 MODULE_AUTHOR("Atheros Communications"); 20 MODULE_LICENSE("Dual BSD/GPL"); 21 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices"); 22 23 static unsigned int ath9k_debug = ATH_DBG_DEFAULT; 24 module_param_named(debug, ath9k_debug, uint, 0); 25 MODULE_PARM_DESC(debug, "Debugging mask"); 26 27 int htc_modparam_nohwcrypt; 28 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444); 29 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption"); 30 31 #define CHAN2G(_freq, _idx) { \ 32 .center_freq = (_freq), \ 33 .hw_value = (_idx), \ 34 .max_power = 20, \ 35 } 36 37 static struct ieee80211_channel ath9k_2ghz_channels[] = { 38 CHAN2G(2412, 0), /* Channel 1 */ 39 CHAN2G(2417, 1), /* Channel 2 */ 40 CHAN2G(2422, 2), /* Channel 3 */ 41 CHAN2G(2427, 3), /* Channel 4 */ 42 CHAN2G(2432, 4), /* Channel 5 */ 43 CHAN2G(2437, 5), /* Channel 6 */ 44 CHAN2G(2442, 6), /* Channel 7 */ 45 CHAN2G(2447, 7), /* Channel 8 */ 46 CHAN2G(2452, 8), /* Channel 9 */ 47 CHAN2G(2457, 9), /* Channel 10 */ 48 CHAN2G(2462, 10), /* Channel 11 */ 49 CHAN2G(2467, 11), /* Channel 12 */ 50 CHAN2G(2472, 12), /* Channel 13 */ 51 CHAN2G(2484, 13), /* Channel 14 */ 52 }; 53 54 /* Atheros hardware rate code addition for short premble */ 55 #define SHPCHECK(__hw_rate, __flags) \ 56 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0) 57 58 #define RATE(_bitrate, _hw_rate, _flags) { \ 59 .bitrate = (_bitrate), \ 60 .flags = (_flags), \ 61 .hw_value = (_hw_rate), \ 62 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \ 63 } 64 65 static struct ieee80211_rate ath9k_legacy_rates[] = { 66 RATE(10, 0x1b, 0), 67 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */ 68 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */ 69 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */ 70 RATE(60, 0x0b, 0), 71 RATE(90, 0x0f, 0), 72 RATE(120, 0x0a, 0), 73 RATE(180, 0x0e, 0), 74 RATE(240, 0x09, 0), 75 RATE(360, 0x0d, 0), 76 RATE(480, 0x08, 0), 77 RATE(540, 0x0c, 0), 78 }; 79 80 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv) 81 { 82 int time_left; 83 84 if (atomic_read(&priv->htc->tgt_ready) > 0) { 85 atomic_dec(&priv->htc->tgt_ready); 86 return 0; 87 } 88 89 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */ 90 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ); 91 if (!time_left) { 92 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n"); 93 return -ETIMEDOUT; 94 } 95 96 atomic_dec(&priv->htc->tgt_ready); 97 98 return 0; 99 } 100 101 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv) 102 { 103 ath9k_htc_exit_debug(priv->ah); 104 ath9k_hw_deinit(priv->ah); 105 tasklet_kill(&priv->wmi_tasklet); 106 tasklet_kill(&priv->rx_tasklet); 107 tasklet_kill(&priv->tx_tasklet); 108 kfree(priv->ah); 109 priv->ah = NULL; 110 } 111 112 static void ath9k_deinit_device(struct ath9k_htc_priv *priv) 113 { 114 struct ieee80211_hw *hw = priv->hw; 115 116 wiphy_rfkill_stop_polling(hw->wiphy); 117 ath9k_deinit_leds(priv); 118 ieee80211_unregister_hw(hw); 119 ath9k_rx_cleanup(priv); 120 ath9k_tx_cleanup(priv); 121 ath9k_deinit_priv(priv); 122 } 123 124 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv, 125 u16 service_id, 126 void (*tx) (void *, 127 struct sk_buff *, 128 enum htc_endpoint_id, 129 bool txok), 130 enum htc_endpoint_id *ep_id) 131 { 132 struct htc_service_connreq req; 133 134 memset(&req, 0, sizeof(struct htc_service_connreq)); 135 136 req.service_id = service_id; 137 req.ep_callbacks.priv = priv; 138 req.ep_callbacks.rx = ath9k_htc_rxep; 139 req.ep_callbacks.tx = tx; 140 141 return htc_connect_service(priv->htc, &req, ep_id); 142 } 143 144 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv) 145 { 146 int ret; 147 148 /* WMI CMD*/ 149 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep); 150 if (ret) 151 goto err; 152 153 /* Beacon */ 154 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep, 155 &priv->beacon_ep); 156 if (ret) 157 goto err; 158 159 /* CAB */ 160 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep, 161 &priv->cab_ep); 162 if (ret) 163 goto err; 164 165 166 /* UAPSD */ 167 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep, 168 &priv->uapsd_ep); 169 if (ret) 170 goto err; 171 172 /* MGMT */ 173 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep, 174 &priv->mgmt_ep); 175 if (ret) 176 goto err; 177 178 /* DATA BE */ 179 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep, 180 &priv->data_be_ep); 181 if (ret) 182 goto err; 183 184 /* DATA BK */ 185 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep, 186 &priv->data_bk_ep); 187 if (ret) 188 goto err; 189 190 /* DATA VI */ 191 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep, 192 &priv->data_vi_ep); 193 if (ret) 194 goto err; 195 196 /* DATA VO */ 197 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep, 198 &priv->data_vo_ep); 199 if (ret) 200 goto err; 201 202 ret = htc_init(priv->htc); 203 if (ret) 204 goto err; 205 206 return 0; 207 208 err: 209 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n"); 210 return ret; 211 } 212 213 static int ath9k_reg_notifier(struct wiphy *wiphy, 214 struct regulatory_request *request) 215 { 216 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 217 struct ath9k_htc_priv *priv = hw->priv; 218 219 return ath_reg_notifier_apply(wiphy, request, 220 ath9k_hw_regulatory(priv->ah)); 221 } 222 223 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset) 224 { 225 struct ath_hw *ah = (struct ath_hw *) hw_priv; 226 struct ath_common *common = ath9k_hw_common(ah); 227 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 228 __be32 val, reg = cpu_to_be32(reg_offset); 229 int r; 230 231 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID, 232 (u8 *) ®, sizeof(reg), 233 (u8 *) &val, sizeof(val), 234 100); 235 if (unlikely(r)) { 236 ath_print(common, ATH_DBG_WMI, 237 "REGISTER READ FAILED: (0x%04x, %d)\n", 238 reg_offset, r); 239 return -EIO; 240 } 241 242 return be32_to_cpu(val); 243 } 244 245 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset) 246 { 247 struct ath_hw *ah = (struct ath_hw *) hw_priv; 248 struct ath_common *common = ath9k_hw_common(ah); 249 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 250 __be32 buf[2] = { 251 cpu_to_be32(reg_offset), 252 cpu_to_be32(val), 253 }; 254 int r; 255 256 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 257 (u8 *) &buf, sizeof(buf), 258 (u8 *) &val, sizeof(val), 259 100); 260 if (unlikely(r)) { 261 ath_print(common, ATH_DBG_WMI, 262 "REGISTER WRITE FAILED:(0x%04x, %d)\n", 263 reg_offset, r); 264 } 265 } 266 267 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset) 268 { 269 struct ath_hw *ah = (struct ath_hw *) hw_priv; 270 struct ath_common *common = ath9k_hw_common(ah); 271 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 272 u32 rsp_status; 273 int r; 274 275 mutex_lock(&priv->wmi->multi_write_mutex); 276 277 /* Store the register/value */ 278 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg = 279 cpu_to_be32(reg_offset); 280 priv->wmi->multi_write[priv->wmi->multi_write_idx].val = 281 cpu_to_be32(val); 282 283 priv->wmi->multi_write_idx++; 284 285 /* If the buffer is full, send it out. */ 286 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) { 287 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 288 (u8 *) &priv->wmi->multi_write, 289 sizeof(struct register_write) * priv->wmi->multi_write_idx, 290 (u8 *) &rsp_status, sizeof(rsp_status), 291 100); 292 if (unlikely(r)) { 293 ath_print(common, ATH_DBG_WMI, 294 "REGISTER WRITE FAILED, multi len: %d\n", 295 priv->wmi->multi_write_idx); 296 } 297 priv->wmi->multi_write_idx = 0; 298 } 299 300 mutex_unlock(&priv->wmi->multi_write_mutex); 301 } 302 303 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset) 304 { 305 struct ath_hw *ah = (struct ath_hw *) hw_priv; 306 struct ath_common *common = ath9k_hw_common(ah); 307 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 308 309 if (atomic_read(&priv->wmi->mwrite_cnt)) 310 ath9k_regwrite_buffer(hw_priv, val, reg_offset); 311 else 312 ath9k_regwrite_single(hw_priv, val, reg_offset); 313 } 314 315 static void ath9k_enable_regwrite_buffer(void *hw_priv) 316 { 317 struct ath_hw *ah = (struct ath_hw *) hw_priv; 318 struct ath_common *common = ath9k_hw_common(ah); 319 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 320 321 atomic_inc(&priv->wmi->mwrite_cnt); 322 } 323 324 static void ath9k_disable_regwrite_buffer(void *hw_priv) 325 { 326 struct ath_hw *ah = (struct ath_hw *) hw_priv; 327 struct ath_common *common = ath9k_hw_common(ah); 328 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 329 330 atomic_dec(&priv->wmi->mwrite_cnt); 331 } 332 333 static void ath9k_regwrite_flush(void *hw_priv) 334 { 335 struct ath_hw *ah = (struct ath_hw *) hw_priv; 336 struct ath_common *common = ath9k_hw_common(ah); 337 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 338 u32 rsp_status; 339 int r; 340 341 mutex_lock(&priv->wmi->multi_write_mutex); 342 343 if (priv->wmi->multi_write_idx) { 344 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 345 (u8 *) &priv->wmi->multi_write, 346 sizeof(struct register_write) * priv->wmi->multi_write_idx, 347 (u8 *) &rsp_status, sizeof(rsp_status), 348 100); 349 if (unlikely(r)) { 350 ath_print(common, ATH_DBG_WMI, 351 "REGISTER WRITE FAILED, multi len: %d\n", 352 priv->wmi->multi_write_idx); 353 } 354 priv->wmi->multi_write_idx = 0; 355 } 356 357 mutex_unlock(&priv->wmi->multi_write_mutex); 358 } 359 360 static const struct ath_ops ath9k_common_ops = { 361 .read = ath9k_regread, 362 .write = ath9k_regwrite, 363 .enable_write_buffer = ath9k_enable_regwrite_buffer, 364 .disable_write_buffer = ath9k_disable_regwrite_buffer, 365 .write_flush = ath9k_regwrite_flush, 366 }; 367 368 static void ath_usb_read_cachesize(struct ath_common *common, int *csz) 369 { 370 *csz = L1_CACHE_BYTES >> 2; 371 } 372 373 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data) 374 { 375 struct ath_hw *ah = (struct ath_hw *) common->ah; 376 377 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S)); 378 379 if (!ath9k_hw_wait(ah, 380 AR_EEPROM_STATUS_DATA, 381 AR_EEPROM_STATUS_DATA_BUSY | 382 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0, 383 AH_WAIT_TIMEOUT)) 384 return false; 385 386 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA), 387 AR_EEPROM_STATUS_DATA_VAL); 388 389 return true; 390 } 391 392 static const struct ath_bus_ops ath9k_usb_bus_ops = { 393 .ath_bus_type = ATH_USB, 394 .read_cachesize = ath_usb_read_cachesize, 395 .eeprom_read = ath_usb_eeprom_read, 396 }; 397 398 static void setup_ht_cap(struct ath9k_htc_priv *priv, 399 struct ieee80211_sta_ht_cap *ht_info) 400 { 401 ht_info->ht_supported = true; 402 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 403 IEEE80211_HT_CAP_SM_PS | 404 IEEE80211_HT_CAP_SGI_40 | 405 IEEE80211_HT_CAP_DSSSCCK40; 406 407 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 408 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; 409 410 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); 411 ht_info->mcs.rx_mask[0] = 0xff; 412 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED; 413 } 414 415 static int ath9k_init_queues(struct ath9k_htc_priv *priv) 416 { 417 struct ath_common *common = ath9k_hw_common(priv->ah); 418 int i; 419 420 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++) 421 priv->hwq_map[i] = -1; 422 423 if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_BE)) { 424 ath_print(common, ATH_DBG_FATAL, 425 "Unable to setup xmit queue for BE traffic\n"); 426 goto err; 427 } 428 429 if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_BK)) { 430 ath_print(common, ATH_DBG_FATAL, 431 "Unable to setup xmit queue for BK traffic\n"); 432 goto err; 433 } 434 if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_VI)) { 435 ath_print(common, ATH_DBG_FATAL, 436 "Unable to setup xmit queue for VI traffic\n"); 437 goto err; 438 } 439 if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_VO)) { 440 ath_print(common, ATH_DBG_FATAL, 441 "Unable to setup xmit queue for VO traffic\n"); 442 goto err; 443 } 444 445 return 0; 446 447 err: 448 return -EINVAL; 449 } 450 451 static void ath9k_init_crypto(struct ath9k_htc_priv *priv) 452 { 453 struct ath_common *common = ath9k_hw_common(priv->ah); 454 int i = 0; 455 456 /* Get the hardware key cache size. */ 457 common->keymax = priv->ah->caps.keycache_size; 458 if (common->keymax > ATH_KEYMAX) { 459 ath_print(common, ATH_DBG_ANY, 460 "Warning, using only %u entries in %u key cache\n", 461 ATH_KEYMAX, common->keymax); 462 common->keymax = ATH_KEYMAX; 463 } 464 465 /* 466 * Reset the key cache since some parts do not 467 * reset the contents on initial power up. 468 */ 469 for (i = 0; i < common->keymax; i++) 470 ath9k_hw_keyreset(priv->ah, (u16) i); 471 472 if (ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER, 473 ATH9K_CIPHER_TKIP, NULL)) { 474 /* 475 * Whether we should enable h/w TKIP MIC. 476 * XXX: if we don't support WME TKIP MIC, then we wouldn't 477 * report WMM capable, so it's always safe to turn on 478 * TKIP MIC in this case. 479 */ 480 ath9k_hw_setcapability(priv->ah, ATH9K_CAP_TKIP_MIC, 0, 1, NULL); 481 } 482 483 /* 484 * Check whether the separate key cache entries 485 * are required to handle both tx+rx MIC keys. 486 * With split mic keys the number of stations is limited 487 * to 27 otherwise 59. 488 */ 489 if (ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER, 490 ATH9K_CIPHER_TKIP, NULL) 491 && ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER, 492 ATH9K_CIPHER_MIC, NULL) 493 && ath9k_hw_getcapability(priv->ah, ATH9K_CAP_TKIP_SPLIT, 494 0, NULL)) 495 common->splitmic = 1; 496 497 /* turn on mcast key search if possible */ 498 if (!ath9k_hw_getcapability(priv->ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL)) 499 (void)ath9k_hw_setcapability(priv->ah, ATH9K_CAP_MCAST_KEYSRCH, 500 1, 1, NULL); 501 } 502 503 static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv) 504 { 505 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) { 506 priv->sbands[IEEE80211_BAND_2GHZ].channels = 507 ath9k_2ghz_channels; 508 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ; 509 priv->sbands[IEEE80211_BAND_2GHZ].n_channels = 510 ARRAY_SIZE(ath9k_2ghz_channels); 511 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates; 512 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates = 513 ARRAY_SIZE(ath9k_legacy_rates); 514 } 515 } 516 517 static void ath9k_init_misc(struct ath9k_htc_priv *priv) 518 { 519 struct ath_common *common = ath9k_hw_common(priv->ah); 520 521 common->tx_chainmask = priv->ah->caps.tx_chainmask; 522 common->rx_chainmask = priv->ah->caps.rx_chainmask; 523 524 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) 525 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN); 526 527 priv->op_flags |= OP_TXAGGR; 528 priv->ah->opmode = NL80211_IFTYPE_STATION; 529 } 530 531 static int ath9k_init_priv(struct ath9k_htc_priv *priv, u16 devid) 532 { 533 struct ath_hw *ah = NULL; 534 struct ath_common *common; 535 int ret = 0, csz = 0; 536 537 priv->op_flags |= OP_INVALID; 538 539 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL); 540 if (!ah) 541 return -ENOMEM; 542 543 ah->hw_version.devid = devid; 544 ah->hw_version.subsysid = 0; /* FIXME */ 545 priv->ah = ah; 546 547 common = ath9k_hw_common(ah); 548 common->ops = &ath9k_common_ops; 549 common->bus_ops = &ath9k_usb_bus_ops; 550 common->ah = ah; 551 common->hw = priv->hw; 552 common->priv = priv; 553 common->debug_mask = ath9k_debug; 554 555 spin_lock_init(&priv->wmi->wmi_lock); 556 spin_lock_init(&priv->beacon_lock); 557 spin_lock_init(&priv->tx_lock); 558 mutex_init(&priv->mutex); 559 mutex_init(&priv->aggr_work.mutex); 560 mutex_init(&priv->htc_pm_lock); 561 tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet, 562 (unsigned long)priv); 563 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet, 564 (unsigned long)priv); 565 tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv); 566 INIT_DELAYED_WORK(&priv->ath9k_aggr_work, ath9k_htc_aggr_work); 567 INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work); 568 INIT_WORK(&priv->ps_work, ath9k_ps_work); 569 570 /* 571 * Cache line size is used to size and align various 572 * structures used to communicate with the hardware. 573 */ 574 ath_read_cachesize(common, &csz); 575 common->cachelsz = csz << 2; /* convert to bytes */ 576 577 ret = ath9k_hw_init(ah); 578 if (ret) { 579 ath_print(common, ATH_DBG_FATAL, 580 "Unable to initialize hardware; " 581 "initialization status: %d\n", ret); 582 goto err_hw; 583 } 584 585 ret = ath9k_htc_init_debug(ah); 586 if (ret) { 587 ath_print(common, ATH_DBG_FATAL, 588 "Unable to create debugfs files\n"); 589 goto err_debug; 590 } 591 592 ret = ath9k_init_queues(priv); 593 if (ret) 594 goto err_queues; 595 596 ath9k_init_crypto(priv); 597 ath9k_init_channels_rates(priv); 598 ath9k_init_misc(priv); 599 600 return 0; 601 602 err_queues: 603 ath9k_htc_exit_debug(ah); 604 err_debug: 605 ath9k_hw_deinit(ah); 606 err_hw: 607 608 kfree(ah); 609 priv->ah = NULL; 610 611 return ret; 612 } 613 614 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv, 615 struct ieee80211_hw *hw) 616 { 617 struct ath_common *common = ath9k_hw_common(priv->ah); 618 619 hw->flags = IEEE80211_HW_SIGNAL_DBM | 620 IEEE80211_HW_AMPDU_AGGREGATION | 621 IEEE80211_HW_SPECTRUM_MGMT | 622 IEEE80211_HW_HAS_RATE_CONTROL | 623 IEEE80211_HW_RX_INCLUDES_FCS | 624 IEEE80211_HW_SUPPORTS_PS | 625 IEEE80211_HW_PS_NULLFUNC_STACK; 626 627 hw->wiphy->interface_modes = 628 BIT(NL80211_IFTYPE_STATION) | 629 BIT(NL80211_IFTYPE_ADHOC); 630 631 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 632 633 hw->queues = 4; 634 hw->channel_change_time = 5000; 635 hw->max_listen_interval = 10; 636 hw->vif_data_size = sizeof(struct ath9k_htc_vif); 637 hw->sta_data_size = sizeof(struct ath9k_htc_sta); 638 639 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */ 640 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) + 641 sizeof(struct htc_frame_hdr) + 4; 642 643 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) 644 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 645 &priv->sbands[IEEE80211_BAND_2GHZ]; 646 647 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) { 648 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) 649 setup_ht_cap(priv, 650 &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap); 651 } 652 653 SET_IEEE80211_PERM_ADDR(hw, common->macaddr); 654 } 655 656 static int ath9k_init_device(struct ath9k_htc_priv *priv, u16 devid) 657 { 658 struct ieee80211_hw *hw = priv->hw; 659 struct ath_common *common; 660 struct ath_hw *ah; 661 int error = 0; 662 struct ath_regulatory *reg; 663 664 /* Bring up device */ 665 error = ath9k_init_priv(priv, devid); 666 if (error != 0) 667 goto err_init; 668 669 ah = priv->ah; 670 common = ath9k_hw_common(ah); 671 ath9k_set_hw_capab(priv, hw); 672 673 /* Initialize regulatory */ 674 error = ath_regd_init(&common->regulatory, priv->hw->wiphy, 675 ath9k_reg_notifier); 676 if (error) 677 goto err_regd; 678 679 reg = &common->regulatory; 680 681 /* Setup TX */ 682 error = ath9k_tx_init(priv); 683 if (error != 0) 684 goto err_tx; 685 686 /* Setup RX */ 687 error = ath9k_rx_init(priv); 688 if (error != 0) 689 goto err_rx; 690 691 /* Register with mac80211 */ 692 error = ieee80211_register_hw(hw); 693 if (error) 694 goto err_register; 695 696 /* Handle world regulatory */ 697 if (!ath_is_world_regd(reg)) { 698 error = regulatory_hint(hw->wiphy, reg->alpha2); 699 if (error) 700 goto err_world; 701 } 702 703 ath9k_init_leds(priv); 704 ath9k_start_rfkill_poll(priv); 705 706 return 0; 707 708 err_world: 709 ieee80211_unregister_hw(hw); 710 err_register: 711 ath9k_rx_cleanup(priv); 712 err_rx: 713 ath9k_tx_cleanup(priv); 714 err_tx: 715 /* Nothing */ 716 err_regd: 717 ath9k_deinit_priv(priv); 718 err_init: 719 return error; 720 } 721 722 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, 723 u16 devid) 724 { 725 struct ieee80211_hw *hw; 726 struct ath9k_htc_priv *priv; 727 int ret; 728 729 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops); 730 if (!hw) 731 return -ENOMEM; 732 733 priv = hw->priv; 734 priv->hw = hw; 735 priv->htc = htc_handle; 736 priv->dev = dev; 737 htc_handle->drv_priv = priv; 738 SET_IEEE80211_DEV(hw, priv->dev); 739 740 ret = ath9k_htc_wait_for_target(priv); 741 if (ret) 742 goto err_free; 743 744 priv->wmi = ath9k_init_wmi(priv); 745 if (!priv->wmi) { 746 ret = -EINVAL; 747 goto err_free; 748 } 749 750 ret = ath9k_init_htc_services(priv); 751 if (ret) 752 goto err_init; 753 754 /* The device may have been unplugged earlier. */ 755 priv->op_flags &= ~OP_UNPLUGGED; 756 757 ret = ath9k_init_device(priv, devid); 758 if (ret) 759 goto err_init; 760 761 return 0; 762 763 err_init: 764 ath9k_deinit_wmi(priv); 765 err_free: 766 ieee80211_free_hw(hw); 767 return ret; 768 } 769 770 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug) 771 { 772 if (htc_handle->drv_priv) { 773 774 /* Check if the device has been yanked out. */ 775 if (hotunplug) 776 htc_handle->drv_priv->op_flags |= OP_UNPLUGGED; 777 778 ath9k_deinit_device(htc_handle->drv_priv); 779 ath9k_deinit_wmi(htc_handle->drv_priv); 780 ieee80211_free_hw(htc_handle->drv_priv->hw); 781 } 782 } 783 784 #ifdef CONFIG_PM 785 int ath9k_htc_resume(struct htc_target *htc_handle) 786 { 787 int ret; 788 789 ret = ath9k_htc_wait_for_target(htc_handle->drv_priv); 790 if (ret) 791 return ret; 792 793 ret = ath9k_init_htc_services(htc_handle->drv_priv); 794 return ret; 795 } 796 #endif 797 798 static int __init ath9k_htc_init(void) 799 { 800 int error; 801 802 error = ath9k_htc_debug_create_root(); 803 if (error < 0) { 804 printk(KERN_ERR 805 "ath9k_htc: Unable to create debugfs root: %d\n", 806 error); 807 goto err_dbg; 808 } 809 810 error = ath9k_hif_usb_init(); 811 if (error < 0) { 812 printk(KERN_ERR 813 "ath9k_htc: No USB devices found," 814 " driver not installed.\n"); 815 error = -ENODEV; 816 goto err_usb; 817 } 818 819 return 0; 820 821 err_usb: 822 ath9k_htc_debug_remove_root(); 823 err_dbg: 824 return error; 825 } 826 module_init(ath9k_htc_init); 827 828 static void __exit ath9k_htc_exit(void) 829 { 830 ath9k_hif_usb_exit(); 831 ath9k_htc_debug_remove_root(); 832 printk(KERN_INFO "ath9k_htc: Driver unloaded\n"); 833 } 834 module_exit(ath9k_htc_exit); 835