1fb9987d0SSujith /* 25b68138eSSujith Manoharan * Copyright (c) 2010-2011 Atheros Communications Inc. 3fb9987d0SSujith * 4fb9987d0SSujith * Permission to use, copy, modify, and/or distribute this software for any 5fb9987d0SSujith * purpose with or without fee is hereby granted, provided that the above 6fb9987d0SSujith * copyright notice and this permission notice appear in all copies. 7fb9987d0SSujith * 8fb9987d0SSujith * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9fb9987d0SSujith * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10fb9987d0SSujith * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11fb9987d0SSujith * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12fb9987d0SSujith * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13fb9987d0SSujith * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14fb9987d0SSujith * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15fb9987d0SSujith */ 16fb9987d0SSujith 17516304b0SJoe Perches #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 18516304b0SJoe Perches 19fb9987d0SSujith #include "htc.h" 20fb9987d0SSujith 21fb9987d0SSujith MODULE_AUTHOR("Atheros Communications"); 22fb9987d0SSujith MODULE_LICENSE("Dual BSD/GPL"); 23fb9987d0SSujith MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices"); 24fb9987d0SSujith 25fb9987d0SSujith static unsigned int ath9k_debug = ATH_DBG_DEFAULT; 26fb9987d0SSujith module_param_named(debug, ath9k_debug, uint, 0); 27fb9987d0SSujith MODULE_PARM_DESC(debug, "Debugging mask"); 28fb9987d0SSujith 29e1572c5eSSujith int htc_modparam_nohwcrypt; 30e1572c5eSSujith module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444); 31fb9987d0SSujith MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption"); 32fb9987d0SSujith 337f34778eSMohammed Shafi Shajakhan static int ath9k_htc_btcoex_enable; 347f34778eSMohammed Shafi Shajakhan module_param_named(btcoex_enable, ath9k_htc_btcoex_enable, int, 0444); 357f34778eSMohammed Shafi Shajakhan MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence"); 367f34778eSMohammed Shafi Shajakhan 376bca610dSOleksij Rempel static int ath9k_ps_enable; 386bca610dSOleksij Rempel module_param_named(ps_enable, ath9k_ps_enable, int, 0444); 396bca610dSOleksij Rempel MODULE_PARM_DESC(ps_enable, "Enable WLAN PowerSave"); 406bca610dSOleksij Rempel 41d244f21eSSujith Manoharan #ifdef CONFIG_MAC80211_LEDS 42d244f21eSSujith Manoharan static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = { 43d244f21eSSujith Manoharan { .throughput = 0 * 1024, .blink_time = 334 }, 44d244f21eSSujith Manoharan { .throughput = 1 * 1024, .blink_time = 260 }, 45d244f21eSSujith Manoharan { .throughput = 5 * 1024, .blink_time = 220 }, 46d244f21eSSujith Manoharan { .throughput = 10 * 1024, .blink_time = 190 }, 47d244f21eSSujith Manoharan { .throughput = 20 * 1024, .blink_time = 170 }, 48d244f21eSSujith Manoharan { .throughput = 50 * 1024, .blink_time = 150 }, 49d244f21eSSujith Manoharan { .throughput = 70 * 1024, .blink_time = 130 }, 50d244f21eSSujith Manoharan { .throughput = 100 * 1024, .blink_time = 110 }, 51d244f21eSSujith Manoharan { .throughput = 200 * 1024, .blink_time = 80 }, 52d244f21eSSujith Manoharan { .throughput = 300 * 1024, .blink_time = 50 }, 53d244f21eSSujith Manoharan }; 54d244f21eSSujith Manoharan #endif 55d244f21eSSujith Manoharan 56fb9987d0SSujith static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv) 57fb9987d0SSujith { 58fb9987d0SSujith int time_left; 59fb9987d0SSujith 60d8c49ffbSSujith.Manoharan@atheros.com if (atomic_read(&priv->htc->tgt_ready) > 0) { 61d8c49ffbSSujith.Manoharan@atheros.com atomic_dec(&priv->htc->tgt_ready); 62d8c49ffbSSujith.Manoharan@atheros.com return 0; 63d8c49ffbSSujith.Manoharan@atheros.com } 64d8c49ffbSSujith.Manoharan@atheros.com 65fb9987d0SSujith /* Firmware can take up to 50ms to get ready, to be safe use 1 second */ 66fb9987d0SSujith time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ); 67fb9987d0SSujith if (!time_left) { 68fb9987d0SSujith dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n"); 69fb9987d0SSujith return -ETIMEDOUT; 70fb9987d0SSujith } 71fb9987d0SSujith 72d8c49ffbSSujith.Manoharan@atheros.com atomic_dec(&priv->htc->tgt_ready); 73d8c49ffbSSujith.Manoharan@atheros.com 74fb9987d0SSujith return 0; 75fb9987d0SSujith } 76fb9987d0SSujith 77fb9987d0SSujith static void ath9k_deinit_priv(struct ath9k_htc_priv *priv) 78fb9987d0SSujith { 79fb9987d0SSujith ath9k_hw_deinit(priv->ah); 80fb9987d0SSujith kfree(priv->ah); 81fb9987d0SSujith priv->ah = NULL; 82fb9987d0SSujith } 83fb9987d0SSujith 84fb9987d0SSujith static void ath9k_deinit_device(struct ath9k_htc_priv *priv) 85fb9987d0SSujith { 86fb9987d0SSujith struct ieee80211_hw *hw = priv->hw; 87fb9987d0SSujith 88fb9987d0SSujith wiphy_rfkill_stop_polling(hw->wiphy); 89fb9987d0SSujith ath9k_deinit_leds(priv); 90fb9987d0SSujith ieee80211_unregister_hw(hw); 91fb9987d0SSujith ath9k_rx_cleanup(priv); 92fb9987d0SSujith ath9k_tx_cleanup(priv); 93fb9987d0SSujith ath9k_deinit_priv(priv); 94fb9987d0SSujith } 95fb9987d0SSujith 96fb9987d0SSujith static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv, 97fb9987d0SSujith u16 service_id, 98fb9987d0SSujith void (*tx) (void *, 99fb9987d0SSujith struct sk_buff *, 100fb9987d0SSujith enum htc_endpoint_id, 101fb9987d0SSujith bool txok), 102fb9987d0SSujith enum htc_endpoint_id *ep_id) 103fb9987d0SSujith { 104fb9987d0SSujith struct htc_service_connreq req; 105fb9987d0SSujith 106fb9987d0SSujith memset(&req, 0, sizeof(struct htc_service_connreq)); 107fb9987d0SSujith 108fb9987d0SSujith req.service_id = service_id; 109fb9987d0SSujith req.ep_callbacks.priv = priv; 110fb9987d0SSujith req.ep_callbacks.rx = ath9k_htc_rxep; 111fb9987d0SSujith req.ep_callbacks.tx = tx; 112fb9987d0SSujith 113fb9987d0SSujith return htc_connect_service(priv->htc, &req, ep_id); 114fb9987d0SSujith } 115fb9987d0SSujith 116fa6e15e0SRajkumar Manoharan static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid, 117fa6e15e0SRajkumar Manoharan u32 drv_info) 118fb9987d0SSujith { 119fb9987d0SSujith int ret; 120fb9987d0SSujith 121fb9987d0SSujith /* WMI CMD*/ 122fb9987d0SSujith ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep); 123fb9987d0SSujith if (ret) 124fb9987d0SSujith goto err; 125fb9987d0SSujith 126fb9987d0SSujith /* Beacon */ 1279c6dda4eSSujith ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep, 128fb9987d0SSujith &priv->beacon_ep); 129fb9987d0SSujith if (ret) 130fb9987d0SSujith goto err; 131fb9987d0SSujith 132fb9987d0SSujith /* CAB */ 133fb9987d0SSujith ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep, 134fb9987d0SSujith &priv->cab_ep); 135fb9987d0SSujith if (ret) 136fb9987d0SSujith goto err; 137fb9987d0SSujith 138fb9987d0SSujith 139fb9987d0SSujith /* UAPSD */ 140fb9987d0SSujith ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep, 141fb9987d0SSujith &priv->uapsd_ep); 142fb9987d0SSujith if (ret) 143fb9987d0SSujith goto err; 144fb9987d0SSujith 145fb9987d0SSujith /* MGMT */ 146fb9987d0SSujith ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep, 147fb9987d0SSujith &priv->mgmt_ep); 148fb9987d0SSujith if (ret) 149fb9987d0SSujith goto err; 150fb9987d0SSujith 151fb9987d0SSujith /* DATA BE */ 152fb9987d0SSujith ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep, 153fb9987d0SSujith &priv->data_be_ep); 154fb9987d0SSujith if (ret) 155fb9987d0SSujith goto err; 156fb9987d0SSujith 157fb9987d0SSujith /* DATA BK */ 158fb9987d0SSujith ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep, 159fb9987d0SSujith &priv->data_bk_ep); 160fb9987d0SSujith if (ret) 161fb9987d0SSujith goto err; 162fb9987d0SSujith 163fb9987d0SSujith /* DATA VI */ 164fb9987d0SSujith ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep, 165fb9987d0SSujith &priv->data_vi_ep); 166fb9987d0SSujith if (ret) 167fb9987d0SSujith goto err; 168fb9987d0SSujith 169fb9987d0SSujith /* DATA VO */ 170fb9987d0SSujith ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep, 171fb9987d0SSujith &priv->data_vo_ep); 172fb9987d0SSujith if (ret) 173fb9987d0SSujith goto err; 174fb9987d0SSujith 1756267dc70SSujith /* 1766267dc70SSujith * Setup required credits before initializing HTC. 1776267dc70SSujith * This is a bit hacky, but, since queuing is done in 1786267dc70SSujith * the HIF layer, shouldn't matter much. 1796267dc70SSujith */ 1806267dc70SSujith 1810b5ead91SSujith Manoharan if (IS_AR7010_DEVICE(drv_info)) 182d108e8b9SSujith Manoharan priv->htc->credits = 45; 183fa6e15e0SRajkumar Manoharan else 1844e63f768SSujith priv->htc->credits = 33; 1856267dc70SSujith 186fb9987d0SSujith ret = htc_init(priv->htc); 187fb9987d0SSujith if (ret) 188fb9987d0SSujith goto err; 189fb9987d0SSujith 1906267dc70SSujith dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n", 1916267dc70SSujith priv->htc->credits); 1926267dc70SSujith 193fb9987d0SSujith return 0; 194fb9987d0SSujith 195fb9987d0SSujith err: 196fb9987d0SSujith dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n"); 197fb9987d0SSujith return ret; 198fb9987d0SSujith } 199fb9987d0SSujith 2000c0280bdSLuis R. Rodriguez static void ath9k_reg_notifier(struct wiphy *wiphy, 201fb9987d0SSujith struct regulatory_request *request) 202fb9987d0SSujith { 203fb9987d0SSujith struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 204fb9987d0SSujith struct ath9k_htc_priv *priv = hw->priv; 205fb9987d0SSujith 2060c0280bdSLuis R. Rodriguez ath_reg_notifier_apply(wiphy, request, 207fb9987d0SSujith ath9k_hw_regulatory(priv->ah)); 208fb9987d0SSujith } 209fb9987d0SSujith 2104a22fe10SSujith static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset) 211fb9987d0SSujith { 212fb9987d0SSujith struct ath_hw *ah = (struct ath_hw *) hw_priv; 213fb9987d0SSujith struct ath_common *common = ath9k_hw_common(ah); 214fb9987d0SSujith struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 215fb9987d0SSujith __be32 val, reg = cpu_to_be32(reg_offset); 216fb9987d0SSujith int r; 217fb9987d0SSujith 218fb9987d0SSujith r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID, 219fb9987d0SSujith (u8 *) ®, sizeof(reg), 220fb9987d0SSujith (u8 *) &val, sizeof(val), 221fb9987d0SSujith 100); 222fb9987d0SSujith if (unlikely(r)) { 223d2182b69SJoe Perches ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n", 224fb9987d0SSujith reg_offset, r); 225fb9987d0SSujith return -EIO; 226fb9987d0SSujith } 227fb9987d0SSujith 228fb9987d0SSujith return be32_to_cpu(val); 229fb9987d0SSujith } 230fb9987d0SSujith 23109a525d3SSujith Manoharan static void ath9k_multi_regread(void *hw_priv, u32 *addr, 23209a525d3SSujith Manoharan u32 *val, u16 count) 23309a525d3SSujith Manoharan { 23409a525d3SSujith Manoharan struct ath_hw *ah = (struct ath_hw *) hw_priv; 23509a525d3SSujith Manoharan struct ath_common *common = ath9k_hw_common(ah); 23609a525d3SSujith Manoharan struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 23709a525d3SSujith Manoharan __be32 tmpaddr[8]; 23809a525d3SSujith Manoharan __be32 tmpval[8]; 23909a525d3SSujith Manoharan int i, ret; 24009a525d3SSujith Manoharan 24109a525d3SSujith Manoharan for (i = 0; i < count; i++) { 24209a525d3SSujith Manoharan tmpaddr[i] = cpu_to_be32(addr[i]); 24309a525d3SSujith Manoharan } 24409a525d3SSujith Manoharan 24509a525d3SSujith Manoharan ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID, 24609a525d3SSujith Manoharan (u8 *)tmpaddr , sizeof(u32) * count, 24709a525d3SSujith Manoharan (u8 *)tmpval, sizeof(u32) * count, 24809a525d3SSujith Manoharan 100); 24909a525d3SSujith Manoharan if (unlikely(ret)) { 250d2182b69SJoe Perches ath_dbg(common, WMI, 25109a525d3SSujith Manoharan "Multiple REGISTER READ FAILED (count: %d)\n", count); 25209a525d3SSujith Manoharan } 25309a525d3SSujith Manoharan 25409a525d3SSujith Manoharan for (i = 0; i < count; i++) { 25509a525d3SSujith Manoharan val[i] = be32_to_cpu(tmpval[i]); 25609a525d3SSujith Manoharan } 25709a525d3SSujith Manoharan } 25809a525d3SSujith Manoharan 2594a22fe10SSujith static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset) 260fb9987d0SSujith { 261fb9987d0SSujith struct ath_hw *ah = (struct ath_hw *) hw_priv; 262fb9987d0SSujith struct ath_common *common = ath9k_hw_common(ah); 263fb9987d0SSujith struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 26407b2fa5aSJoe Perches const __be32 buf[2] = { 265fb9987d0SSujith cpu_to_be32(reg_offset), 266fb9987d0SSujith cpu_to_be32(val), 267fb9987d0SSujith }; 268fb9987d0SSujith int r; 269fb9987d0SSujith 270fb9987d0SSujith r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 271fb9987d0SSujith (u8 *) &buf, sizeof(buf), 272fb9987d0SSujith (u8 *) &val, sizeof(val), 273fb9987d0SSujith 100); 274fb9987d0SSujith if (unlikely(r)) { 275d2182b69SJoe Perches ath_dbg(common, WMI, "REGISTER WRITE FAILED:(0x%04x, %d)\n", 276fb9987d0SSujith reg_offset, r); 277fb9987d0SSujith } 278fb9987d0SSujith } 279fb9987d0SSujith 2804a22fe10SSujith static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset) 2814a22fe10SSujith { 2824a22fe10SSujith struct ath_hw *ah = (struct ath_hw *) hw_priv; 2834a22fe10SSujith struct ath_common *common = ath9k_hw_common(ah); 2844a22fe10SSujith struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 2854a22fe10SSujith u32 rsp_status; 2864a22fe10SSujith int r; 2874a22fe10SSujith 2884a22fe10SSujith mutex_lock(&priv->wmi->multi_write_mutex); 2894a22fe10SSujith 2904a22fe10SSujith /* Store the register/value */ 2914a22fe10SSujith priv->wmi->multi_write[priv->wmi->multi_write_idx].reg = 2924a22fe10SSujith cpu_to_be32(reg_offset); 2934a22fe10SSujith priv->wmi->multi_write[priv->wmi->multi_write_idx].val = 2944a22fe10SSujith cpu_to_be32(val); 2954a22fe10SSujith 2964a22fe10SSujith priv->wmi->multi_write_idx++; 2974a22fe10SSujith 2984a22fe10SSujith /* If the buffer is full, send it out. */ 2994a22fe10SSujith if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) { 3004a22fe10SSujith r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 3014a22fe10SSujith (u8 *) &priv->wmi->multi_write, 3024a22fe10SSujith sizeof(struct register_write) * priv->wmi->multi_write_idx, 3034a22fe10SSujith (u8 *) &rsp_status, sizeof(rsp_status), 3044a22fe10SSujith 100); 3054a22fe10SSujith if (unlikely(r)) { 306d2182b69SJoe Perches ath_dbg(common, WMI, 3074a22fe10SSujith "REGISTER WRITE FAILED, multi len: %d\n", 3084a22fe10SSujith priv->wmi->multi_write_idx); 3094a22fe10SSujith } 3104a22fe10SSujith priv->wmi->multi_write_idx = 0; 3114a22fe10SSujith } 3124a22fe10SSujith 3134a22fe10SSujith mutex_unlock(&priv->wmi->multi_write_mutex); 3144a22fe10SSujith } 3154a22fe10SSujith 3164a22fe10SSujith static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset) 3174a22fe10SSujith { 3184a22fe10SSujith struct ath_hw *ah = (struct ath_hw *) hw_priv; 3194a22fe10SSujith struct ath_common *common = ath9k_hw_common(ah); 3204a22fe10SSujith struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 3214a22fe10SSujith 3224a22fe10SSujith if (atomic_read(&priv->wmi->mwrite_cnt)) 3234a22fe10SSujith ath9k_regwrite_buffer(hw_priv, val, reg_offset); 3244a22fe10SSujith else 3254a22fe10SSujith ath9k_regwrite_single(hw_priv, val, reg_offset); 3264a22fe10SSujith } 3274a22fe10SSujith 3284a22fe10SSujith static void ath9k_enable_regwrite_buffer(void *hw_priv) 3294a22fe10SSujith { 3304a22fe10SSujith struct ath_hw *ah = (struct ath_hw *) hw_priv; 3314a22fe10SSujith struct ath_common *common = ath9k_hw_common(ah); 3324a22fe10SSujith struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 3334a22fe10SSujith 3344a22fe10SSujith atomic_inc(&priv->wmi->mwrite_cnt); 3354a22fe10SSujith } 3364a22fe10SSujith 3374a22fe10SSujith static void ath9k_regwrite_flush(void *hw_priv) 3384a22fe10SSujith { 3394a22fe10SSujith struct ath_hw *ah = (struct ath_hw *) hw_priv; 3404a22fe10SSujith struct ath_common *common = ath9k_hw_common(ah); 3414a22fe10SSujith struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 3424a22fe10SSujith u32 rsp_status; 3434a22fe10SSujith int r; 3444a22fe10SSujith 345435c1610SFelix Fietkau atomic_dec(&priv->wmi->mwrite_cnt); 346435c1610SFelix Fietkau 3474a22fe10SSujith mutex_lock(&priv->wmi->multi_write_mutex); 3484a22fe10SSujith 3494a22fe10SSujith if (priv->wmi->multi_write_idx) { 3504a22fe10SSujith r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 3514a22fe10SSujith (u8 *) &priv->wmi->multi_write, 3524a22fe10SSujith sizeof(struct register_write) * priv->wmi->multi_write_idx, 3534a22fe10SSujith (u8 *) &rsp_status, sizeof(rsp_status), 3544a22fe10SSujith 100); 3554a22fe10SSujith if (unlikely(r)) { 356d2182b69SJoe Perches ath_dbg(common, WMI, 3574a22fe10SSujith "REGISTER WRITE FAILED, multi len: %d\n", 3584a22fe10SSujith priv->wmi->multi_write_idx); 3594a22fe10SSujith } 3604a22fe10SSujith priv->wmi->multi_write_idx = 0; 3614a22fe10SSujith } 3624a22fe10SSujith 3634a22fe10SSujith mutex_unlock(&priv->wmi->multi_write_mutex); 3644a22fe10SSujith } 3654a22fe10SSujith 366845e03c9SFelix Fietkau static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) 367845e03c9SFelix Fietkau { 368845e03c9SFelix Fietkau u32 val; 369845e03c9SFelix Fietkau 370845e03c9SFelix Fietkau val = ath9k_regread(hw_priv, reg_offset); 371845e03c9SFelix Fietkau val &= ~clr; 372845e03c9SFelix Fietkau val |= set; 373845e03c9SFelix Fietkau ath9k_regwrite(hw_priv, val, reg_offset); 374845e03c9SFelix Fietkau return val; 375845e03c9SFelix Fietkau } 376845e03c9SFelix Fietkau 377fb9987d0SSujith static void ath_usb_read_cachesize(struct ath_common *common, int *csz) 378fb9987d0SSujith { 379fb9987d0SSujith *csz = L1_CACHE_BYTES >> 2; 380fb9987d0SSujith } 381fb9987d0SSujith 382fb9987d0SSujith static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data) 383fb9987d0SSujith { 384fb9987d0SSujith struct ath_hw *ah = (struct ath_hw *) common->ah; 385fb9987d0SSujith 386fb9987d0SSujith (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S)); 387fb9987d0SSujith 388fb9987d0SSujith if (!ath9k_hw_wait(ah, 389fb9987d0SSujith AR_EEPROM_STATUS_DATA, 390fb9987d0SSujith AR_EEPROM_STATUS_DATA_BUSY | 391fb9987d0SSujith AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0, 392fb9987d0SSujith AH_WAIT_TIMEOUT)) 393fb9987d0SSujith return false; 394fb9987d0SSujith 395fb9987d0SSujith *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA), 396fb9987d0SSujith AR_EEPROM_STATUS_DATA_VAL); 397fb9987d0SSujith 398fb9987d0SSujith return true; 399fb9987d0SSujith } 400fb9987d0SSujith 401fb9987d0SSujith static const struct ath_bus_ops ath9k_usb_bus_ops = { 402497ad9adSSujith .ath_bus_type = ATH_USB, 403fb9987d0SSujith .read_cachesize = ath_usb_read_cachesize, 404fb9987d0SSujith .eeprom_read = ath_usb_eeprom_read, 405fb9987d0SSujith }; 406fb9987d0SSujith 407fb9987d0SSujith static void setup_ht_cap(struct ath9k_htc_priv *priv, 408fb9987d0SSujith struct ieee80211_sta_ht_cap *ht_info) 409fb9987d0SSujith { 4106debecadSSujith struct ath_common *common = ath9k_hw_common(priv->ah); 4116debecadSSujith u8 tx_streams, rx_streams; 4126debecadSSujith int i; 4136debecadSSujith 414fb9987d0SSujith ht_info->ht_supported = true; 415fb9987d0SSujith ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 416fb9987d0SSujith IEEE80211_HT_CAP_SM_PS | 417fb9987d0SSujith IEEE80211_HT_CAP_SGI_40 | 418fb9987d0SSujith IEEE80211_HT_CAP_DSSSCCK40; 419fb9987d0SSujith 420b4dec5e8SSujith if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) 421b4dec5e8SSujith ht_info->cap |= IEEE80211_HT_CAP_SGI_20; 422b4dec5e8SSujith 42317525f96SSujith ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 42417525f96SSujith 425fb9987d0SSujith ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 426fb9987d0SSujith ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; 427fb9987d0SSujith 428fb9987d0SSujith memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); 4296debecadSSujith 4306debecadSSujith /* ath9k_htc supports only 1 or 2 stream devices */ 43182b2d334SFelix Fietkau tx_streams = ath9k_cmn_count_streams(priv->ah->txchainmask, 2); 43282b2d334SFelix Fietkau rx_streams = ath9k_cmn_count_streams(priv->ah->rxchainmask, 2); 4336debecadSSujith 434d2182b69SJoe Perches ath_dbg(common, CONFIG, "TX streams %d, RX streams: %d\n", 4356debecadSSujith tx_streams, rx_streams); 4366debecadSSujith 437a226c3d9SOleksij Rempel if (tx_streams >= 2) 438a226c3d9SOleksij Rempel ht_info->cap |= IEEE80211_HT_CAP_TX_STBC; 439a226c3d9SOleksij Rempel 4406debecadSSujith if (tx_streams != rx_streams) { 4416debecadSSujith ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; 4426debecadSSujith ht_info->mcs.tx_params |= ((tx_streams - 1) << 4436debecadSSujith IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT); 4446debecadSSujith } 4456debecadSSujith 4466debecadSSujith for (i = 0; i < rx_streams; i++) 4476debecadSSujith ht_info->mcs.rx_mask[i] = 0xff; 4486debecadSSujith 449fb9987d0SSujith ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED; 450fb9987d0SSujith } 451fb9987d0SSujith 452fb9987d0SSujith static int ath9k_init_queues(struct ath9k_htc_priv *priv) 453fb9987d0SSujith { 454fb9987d0SSujith struct ath_common *common = ath9k_hw_common(priv->ah); 455fb9987d0SSujith int i; 456fb9987d0SSujith 457fb9987d0SSujith for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++) 458fb9987d0SSujith priv->hwq_map[i] = -1; 459fb9987d0SSujith 460ca74b83bSSujith priv->beaconq = ath9k_hw_beaconq_setup(priv->ah); 461ca74b83bSSujith if (priv->beaconq == -1) { 4623800276aSJoe Perches ath_err(common, "Unable to setup BEACON xmit queue\n"); 463ca74b83bSSujith goto err; 464ca74b83bSSujith } 465ca74b83bSSujith 466ca74b83bSSujith priv->cabq = ath9k_htc_cabq_setup(priv); 467ca74b83bSSujith if (priv->cabq == -1) { 4683800276aSJoe Perches ath_err(common, "Unable to setup CAB xmit queue\n"); 469ca74b83bSSujith goto err; 470ca74b83bSSujith } 471ca74b83bSSujith 472bea843c7SSujith Manoharan if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BE)) { 4733800276aSJoe Perches ath_err(common, "Unable to setup xmit queue for BE traffic\n"); 474fb9987d0SSujith goto err; 475fb9987d0SSujith } 476fb9987d0SSujith 477bea843c7SSujith Manoharan if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BK)) { 4783800276aSJoe Perches ath_err(common, "Unable to setup xmit queue for BK traffic\n"); 479fb9987d0SSujith goto err; 480fb9987d0SSujith } 481bea843c7SSujith Manoharan if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VI)) { 4823800276aSJoe Perches ath_err(common, "Unable to setup xmit queue for VI traffic\n"); 483fb9987d0SSujith goto err; 484fb9987d0SSujith } 485bea843c7SSujith Manoharan if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VO)) { 4863800276aSJoe Perches ath_err(common, "Unable to setup xmit queue for VO traffic\n"); 487fb9987d0SSujith goto err; 488fb9987d0SSujith } 489fb9987d0SSujith 490fb9987d0SSujith return 0; 491fb9987d0SSujith 492fb9987d0SSujith err: 493fb9987d0SSujith return -EINVAL; 494fb9987d0SSujith } 495fb9987d0SSujith 496fb9987d0SSujith static void ath9k_init_misc(struct ath9k_htc_priv *priv) 497fb9987d0SSujith { 498fb9987d0SSujith struct ath_common *common = ath9k_hw_common(priv->ah); 499fb9987d0SSujith 500fb9987d0SSujith memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN); 501fb9987d0SSujith 502e5ba18c6SOleksij Rempel common->last_rssi = ATH_RSSI_DUMMY_MARKER; 5039f01a84eSSujith priv->ah->opmode = NL80211_IFTYPE_STATION; 504fb9987d0SSujith } 505fb9987d0SSujith 50621cb9879SVivek Natarajan static int ath9k_init_priv(struct ath9k_htc_priv *priv, 507fa6e15e0SRajkumar Manoharan u16 devid, char *product, 508fa6e15e0SRajkumar Manoharan u32 drv_info) 509fb9987d0SSujith { 510fb9987d0SSujith struct ath_hw *ah = NULL; 511fb9987d0SSujith struct ath_common *common; 512832f6a18SSujith Manoharan int i, ret = 0, csz = 0; 513fb9987d0SSujith 514d8a2c51cSSujith Manoharan set_bit(OP_INVALID, &priv->op_flags); 515fb9987d0SSujith 516fb9987d0SSujith ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL); 517fb9987d0SSujith if (!ah) 518fb9987d0SSujith return -ENOMEM; 519fb9987d0SSujith 52031f023a1SOleksij Rempel ah->dev = priv->dev; 521fb9987d0SSujith ah->hw_version.devid = devid; 5220b5ead91SSujith Manoharan ah->hw_version.usbdev = drv_info; 523f8afa42bSFelix Fietkau ah->ah_flags |= AH_USE_EEPROM; 524f9f84e96SFelix Fietkau ah->reg_ops.read = ath9k_regread; 525f9f84e96SFelix Fietkau ah->reg_ops.multi_read = ath9k_multi_regread; 526f9f84e96SFelix Fietkau ah->reg_ops.write = ath9k_regwrite; 527f9f84e96SFelix Fietkau ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer; 528f9f84e96SFelix Fietkau ah->reg_ops.write_flush = ath9k_regwrite_flush; 529845e03c9SFelix Fietkau ah->reg_ops.rmw = ath9k_reg_rmw; 530fb9987d0SSujith priv->ah = ah; 531fb9987d0SSujith 532fb9987d0SSujith common = ath9k_hw_common(ah); 533f9f84e96SFelix Fietkau common->ops = &ah->reg_ops; 534fb9987d0SSujith common->bus_ops = &ath9k_usb_bus_ops; 535fb9987d0SSujith common->ah = ah; 536fb9987d0SSujith common->hw = priv->hw; 537fb9987d0SSujith common->priv = priv; 538fb9987d0SSujith common->debug_mask = ath9k_debug; 5397f34778eSMohammed Shafi Shajakhan common->btcoex_enabled = ath9k_htc_btcoex_enable == 1; 540fb9987d0SSujith 541fb9987d0SSujith spin_lock_init(&priv->beacon_lock); 542658ef04fSSujith Manoharan spin_lock_init(&priv->tx.tx_lock); 543fb9987d0SSujith mutex_init(&priv->mutex); 544bde748a4SVivek Natarajan mutex_init(&priv->htc_pm_lock); 545fb9987d0SSujith tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet, 546fb9987d0SSujith (unsigned long)priv); 54727876a29SSujith Manoharan tasklet_init(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet, 54873908674SSujith Manoharan (unsigned long)priv); 549a236254cSSujith Manoharan INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work); 550bde748a4SVivek Natarajan INIT_WORK(&priv->ps_work, ath9k_ps_work); 55173908674SSujith Manoharan INIT_WORK(&priv->fatal_work, ath9k_fatal_work); 552859c3ca1SSujith Manoharan setup_timer(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer, 553859c3ca1SSujith Manoharan (unsigned long)priv); 554fb9987d0SSujith 555fb9987d0SSujith /* 556fb9987d0SSujith * Cache line size is used to size and align various 557fb9987d0SSujith * structures used to communicate with the hardware. 558fb9987d0SSujith */ 559fb9987d0SSujith ath_read_cachesize(common, &csz); 560fb9987d0SSujith common->cachelsz = csz << 2; /* convert to bytes */ 561fb9987d0SSujith 562fb9987d0SSujith ret = ath9k_hw_init(ah); 563fb9987d0SSujith if (ret) { 5643800276aSJoe Perches ath_err(common, 5653800276aSJoe Perches "Unable to initialize hardware; initialization status: %d\n", 5663800276aSJoe Perches ret); 567fb9987d0SSujith goto err_hw; 568fb9987d0SSujith } 569fb9987d0SSujith 570fb9987d0SSujith ret = ath9k_init_queues(priv); 571fb9987d0SSujith if (ret) 572fb9987d0SSujith goto err_queues; 573fb9987d0SSujith 574832f6a18SSujith Manoharan for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++) 575832f6a18SSujith Manoharan priv->cur_beacon_conf.bslot[i] = NULL; 576832f6a18SSujith Manoharan 57731f023a1SOleksij Rempel ath9k_cmn_init_channels_rates(common); 578f82b4bdeSRajkumar Manoharan ath9k_cmn_init_crypto(ah); 579fb9987d0SSujith ath9k_init_misc(priv); 580cee5341dSSujith Manoharan ath9k_htc_init_btcoex(priv, product); 58121cb9879SVivek Natarajan 582fb9987d0SSujith return 0; 583fb9987d0SSujith 584fb9987d0SSujith err_queues: 585fb9987d0SSujith ath9k_hw_deinit(ah); 586fb9987d0SSujith err_hw: 587fb9987d0SSujith 588fb9987d0SSujith kfree(ah); 589fb9987d0SSujith priv->ah = NULL; 590fb9987d0SSujith 591fb9987d0SSujith return ret; 592fb9987d0SSujith } 593fb9987d0SSujith 5948b0b6be5SMohammed Shafi Shajakhan static const struct ieee80211_iface_limit if_limits[] = { 5958b0b6be5SMohammed Shafi Shajakhan { .max = 2, .types = BIT(NL80211_IFTYPE_STATION) | 5968b0b6be5SMohammed Shafi Shajakhan BIT(NL80211_IFTYPE_P2P_CLIENT) }, 5978b0b6be5SMohammed Shafi Shajakhan { .max = 2, .types = BIT(NL80211_IFTYPE_AP) | 5980c9acaa8SThomas Pedersen #ifdef CONFIG_MAC80211_MESH 5990c9acaa8SThomas Pedersen BIT(NL80211_IFTYPE_MESH_POINT) | 6000c9acaa8SThomas Pedersen #endif 6010c9acaa8SThomas Pedersen BIT(NL80211_IFTYPE_P2P_GO) }, 6028b0b6be5SMohammed Shafi Shajakhan }; 6038b0b6be5SMohammed Shafi Shajakhan 6048b0b6be5SMohammed Shafi Shajakhan static const struct ieee80211_iface_combination if_comb = { 6058b0b6be5SMohammed Shafi Shajakhan .limits = if_limits, 6068b0b6be5SMohammed Shafi Shajakhan .n_limits = ARRAY_SIZE(if_limits), 6078b0b6be5SMohammed Shafi Shajakhan .max_interfaces = 2, 6088b0b6be5SMohammed Shafi Shajakhan .num_different_channels = 1, 6098b0b6be5SMohammed Shafi Shajakhan }; 6108b0b6be5SMohammed Shafi Shajakhan 611fb9987d0SSujith static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv, 612fb9987d0SSujith struct ieee80211_hw *hw) 613fb9987d0SSujith { 614fb9987d0SSujith struct ath_common *common = ath9k_hw_common(priv->ah); 615156652bbSBen Greear struct base_eep_header *pBase; 616fb9987d0SSujith 617fb9987d0SSujith hw->flags = IEEE80211_HW_SIGNAL_DBM | 618fb9987d0SSujith IEEE80211_HW_AMPDU_AGGREGATION | 619fb9987d0SSujith IEEE80211_HW_SPECTRUM_MGMT | 62032fbccafSSujith IEEE80211_HW_HAS_RATE_CONTROL | 621bde748a4SVivek Natarajan IEEE80211_HW_RX_INCLUDES_FCS | 6227d547eb4SSujith Manoharan IEEE80211_HW_PS_NULLFUNC_STACK | 6238ae2e12fSRajkumar Manoharan IEEE80211_HW_REPORTS_TX_ACK_STATUS | 624bd4a85eeSJavier Cardona IEEE80211_HW_MFP_CAPABLE | 6257d547eb4SSujith Manoharan IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING; 626fb9987d0SSujith 6276bca610dSOleksij Rempel if (ath9k_ps_enable) 6286bca610dSOleksij Rempel hw->flags |= IEEE80211_HW_SUPPORTS_PS; 6296bca610dSOleksij Rempel 630fb9987d0SSujith hw->wiphy->interface_modes = 631fb9987d0SSujith BIT(NL80211_IFTYPE_STATION) | 63209d5b94dSSujith Manoharan BIT(NL80211_IFTYPE_ADHOC) | 63309d5b94dSSujith Manoharan BIT(NL80211_IFTYPE_AP) | 63409d5b94dSSujith Manoharan BIT(NL80211_IFTYPE_P2P_GO) | 635594e65b6SJavier Cardona BIT(NL80211_IFTYPE_P2P_CLIENT) | 636594e65b6SJavier Cardona BIT(NL80211_IFTYPE_MESH_POINT); 637fb9987d0SSujith 6388b0b6be5SMohammed Shafi Shajakhan hw->wiphy->iface_combinations = &if_comb; 6398b0b6be5SMohammed Shafi Shajakhan hw->wiphy->n_iface_combinations = 1; 6408b0b6be5SMohammed Shafi Shajakhan 641bde748a4SVivek Natarajan hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 642bde748a4SVivek Natarajan 64381ddbb5cSJohannes Berg hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN | 64481ddbb5cSJohannes Berg WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; 645d7d312caSAntonio Quartulli 646fb9987d0SSujith hw->queues = 4; 647fb1c078eSSujith Manoharan hw->max_listen_interval = 1; 6483a0593efSSujith Manoharan 649fb9987d0SSujith hw->vif_data_size = sizeof(struct ath9k_htc_vif); 650fb9987d0SSujith hw->sta_data_size = sizeof(struct ath9k_htc_sta); 651fb9987d0SSujith 652fb9987d0SSujith /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */ 653fb9987d0SSujith hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) + 654fb9987d0SSujith sizeof(struct htc_frame_hdr) + 4; 655fb9987d0SSujith 656d4659912SFelix Fietkau if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) 657fb9987d0SSujith hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 65831f023a1SOleksij Rempel &common->sbands[IEEE80211_BAND_2GHZ]; 659d4659912SFelix Fietkau if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) 660ea46e644SSujith hw->wiphy->bands[IEEE80211_BAND_5GHZ] = 66131f023a1SOleksij Rempel &common->sbands[IEEE80211_BAND_5GHZ]; 662fb9987d0SSujith 663fb9987d0SSujith if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) { 664d4659912SFelix Fietkau if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) 665fb9987d0SSujith setup_ht_cap(priv, 66631f023a1SOleksij Rempel &common->sbands[IEEE80211_BAND_2GHZ].ht_cap); 667d4659912SFelix Fietkau if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) 668ea46e644SSujith setup_ht_cap(priv, 66931f023a1SOleksij Rempel &common->sbands[IEEE80211_BAND_5GHZ].ht_cap); 670fb9987d0SSujith } 671fb9987d0SSujith 672156652bbSBen Greear pBase = ath9k_htc_get_eeprom_base(priv); 673156652bbSBen Greear if (pBase) { 674156652bbSBen Greear hw->wiphy->available_antennas_rx = pBase->rxMask; 675156652bbSBen Greear hw->wiphy->available_antennas_tx = pBase->txMask; 676156652bbSBen Greear } 677156652bbSBen Greear 678fb9987d0SSujith SET_IEEE80211_PERM_ADDR(hw, common->macaddr); 679fb9987d0SSujith } 680fb9987d0SSujith 68129bbfb24SSujith Manoharan static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv) 68229bbfb24SSujith Manoharan { 68329bbfb24SSujith Manoharan struct ieee80211_hw *hw = priv->hw; 68429bbfb24SSujith Manoharan struct wmi_fw_version cmd_rsp; 68529bbfb24SSujith Manoharan int ret; 68629bbfb24SSujith Manoharan 68729bbfb24SSujith Manoharan memset(&cmd_rsp, 0, sizeof(cmd_rsp)); 68829bbfb24SSujith Manoharan 68929bbfb24SSujith Manoharan WMI_CMD(WMI_GET_FW_VERSION); 69029bbfb24SSujith Manoharan if (ret) 69129bbfb24SSujith Manoharan return -EINVAL; 69229bbfb24SSujith Manoharan 69329bbfb24SSujith Manoharan priv->fw_version_major = be16_to_cpu(cmd_rsp.major); 69429bbfb24SSujith Manoharan priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor); 69529bbfb24SSujith Manoharan 69681135548SJiri Pirko snprintf(hw->wiphy->fw_version, sizeof(hw->wiphy->fw_version), "%d.%d", 69729bbfb24SSujith Manoharan priv->fw_version_major, 69829bbfb24SSujith Manoharan priv->fw_version_minor); 69929bbfb24SSujith Manoharan 70029bbfb24SSujith Manoharan dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n", 70129bbfb24SSujith Manoharan priv->fw_version_major, 70229bbfb24SSujith Manoharan priv->fw_version_minor); 70329bbfb24SSujith Manoharan 7043a0593efSSujith Manoharan /* 7053a0593efSSujith Manoharan * Check if the available FW matches the driver's 7063a0593efSSujith Manoharan * required version. 7073a0593efSSujith Manoharan */ 7083a0593efSSujith Manoharan if (priv->fw_version_major != MAJOR_VERSION_REQ || 709319e7bd9SFelix Fietkau priv->fw_version_minor < MINOR_VERSION_REQ) { 7103a0593efSSujith Manoharan dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n", 7113a0593efSSujith Manoharan MAJOR_VERSION_REQ, MINOR_VERSION_REQ); 7123a0593efSSujith Manoharan return -EINVAL; 7133a0593efSSujith Manoharan } 7143a0593efSSujith Manoharan 71529bbfb24SSujith Manoharan return 0; 71629bbfb24SSujith Manoharan } 71729bbfb24SSujith Manoharan 71821cb9879SVivek Natarajan static int ath9k_init_device(struct ath9k_htc_priv *priv, 719fa6e15e0SRajkumar Manoharan u16 devid, char *product, u32 drv_info) 720fb9987d0SSujith { 721fb9987d0SSujith struct ieee80211_hw *hw = priv->hw; 722fb9987d0SSujith struct ath_common *common; 723fb9987d0SSujith struct ath_hw *ah; 724fb9987d0SSujith int error = 0; 725fb9987d0SSujith struct ath_regulatory *reg; 7263e3f1d19SSujith Manoharan char hw_name[64]; 727fb9987d0SSujith 728fb9987d0SSujith /* Bring up device */ 729fa6e15e0SRajkumar Manoharan error = ath9k_init_priv(priv, devid, product, drv_info); 730fb9987d0SSujith if (error != 0) 731fb9987d0SSujith goto err_init; 732fb9987d0SSujith 733fb9987d0SSujith ah = priv->ah; 734fb9987d0SSujith common = ath9k_hw_common(ah); 735fb9987d0SSujith ath9k_set_hw_capab(priv, hw); 736fb9987d0SSujith 73729bbfb24SSujith Manoharan error = ath9k_init_firmware_version(priv); 73829bbfb24SSujith Manoharan if (error != 0) 73929bbfb24SSujith Manoharan goto err_fw; 74029bbfb24SSujith Manoharan 741fb9987d0SSujith /* Initialize regulatory */ 742fb9987d0SSujith error = ath_regd_init(&common->regulatory, priv->hw->wiphy, 743fb9987d0SSujith ath9k_reg_notifier); 744fb9987d0SSujith if (error) 745fb9987d0SSujith goto err_regd; 746fb9987d0SSujith 747fb9987d0SSujith reg = &common->regulatory; 748fb9987d0SSujith 749fb9987d0SSujith /* Setup TX */ 750fb9987d0SSujith error = ath9k_tx_init(priv); 751fb9987d0SSujith if (error != 0) 752fb9987d0SSujith goto err_tx; 753fb9987d0SSujith 754fb9987d0SSujith /* Setup RX */ 755fb9987d0SSujith error = ath9k_rx_init(priv); 756fb9987d0SSujith if (error != 0) 757fb9987d0SSujith goto err_rx; 758fb9987d0SSujith 759dc2a87f5SOleksij Rempel ath9k_hw_disable(priv->ah); 760d244f21eSSujith Manoharan #ifdef CONFIG_MAC80211_LEDS 761d244f21eSSujith Manoharan /* must be initialized before ieee80211_register_hw */ 762d244f21eSSujith Manoharan priv->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(priv->hw, 763d244f21eSSujith Manoharan IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_htc_tpt_blink, 764d244f21eSSujith Manoharan ARRAY_SIZE(ath9k_htc_tpt_blink)); 765d244f21eSSujith Manoharan #endif 766d244f21eSSujith Manoharan 767fb9987d0SSujith /* Register with mac80211 */ 768fb9987d0SSujith error = ieee80211_register_hw(hw); 769fb9987d0SSujith if (error) 770fb9987d0SSujith goto err_register; 771fb9987d0SSujith 772fb9987d0SSujith /* Handle world regulatory */ 773fb9987d0SSujith if (!ath_is_world_regd(reg)) { 774fb9987d0SSujith error = regulatory_hint(hw->wiphy, reg->alpha2); 775fb9987d0SSujith if (error) 776fb9987d0SSujith goto err_world; 777fb9987d0SSujith } 778fb9987d0SSujith 779e5facc75SRajkumar Manoharan error = ath9k_htc_init_debug(priv->ah); 780e5facc75SRajkumar Manoharan if (error) { 781e5facc75SRajkumar Manoharan ath_err(common, "Unable to create debugfs files\n"); 782e5facc75SRajkumar Manoharan goto err_world; 783e5facc75SRajkumar Manoharan } 784e5facc75SRajkumar Manoharan 785d2182b69SJoe Perches ath_dbg(common, CONFIG, 786d2182b69SJoe Perches "WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, BE:%d, BK:%d, VI:%d, VO:%d\n", 7873e3f1d19SSujith Manoharan priv->wmi_cmd_ep, 7883e3f1d19SSujith Manoharan priv->beacon_ep, 7893e3f1d19SSujith Manoharan priv->cab_ep, 7903e3f1d19SSujith Manoharan priv->uapsd_ep, 7913e3f1d19SSujith Manoharan priv->mgmt_ep, 7923e3f1d19SSujith Manoharan priv->data_be_ep, 7933e3f1d19SSujith Manoharan priv->data_bk_ep, 7943e3f1d19SSujith Manoharan priv->data_vi_ep, 7953e3f1d19SSujith Manoharan priv->data_vo_ep); 7963e3f1d19SSujith Manoharan 7973e3f1d19SSujith Manoharan ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name)); 7983e3f1d19SSujith Manoharan wiphy_info(hw->wiphy, "%s\n", hw_name); 7993e3f1d19SSujith Manoharan 800fb9987d0SSujith ath9k_init_leds(priv); 801fb9987d0SSujith ath9k_start_rfkill_poll(priv); 802fb9987d0SSujith 803fb9987d0SSujith return 0; 804fb9987d0SSujith 805fb9987d0SSujith err_world: 806fb9987d0SSujith ieee80211_unregister_hw(hw); 807fb9987d0SSujith err_register: 808fb9987d0SSujith ath9k_rx_cleanup(priv); 809fb9987d0SSujith err_rx: 810fb9987d0SSujith ath9k_tx_cleanup(priv); 811fb9987d0SSujith err_tx: 812fb9987d0SSujith /* Nothing */ 813fb9987d0SSujith err_regd: 81429bbfb24SSujith Manoharan /* Nothing */ 81529bbfb24SSujith Manoharan err_fw: 816fb9987d0SSujith ath9k_deinit_priv(priv); 817fb9987d0SSujith err_init: 818fb9987d0SSujith return error; 819fb9987d0SSujith } 820fb9987d0SSujith 821fb9987d0SSujith int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, 822fa6e15e0SRajkumar Manoharan u16 devid, char *product, u32 drv_info) 823fb9987d0SSujith { 824fb9987d0SSujith struct ieee80211_hw *hw; 825fb9987d0SSujith struct ath9k_htc_priv *priv; 826fb9987d0SSujith int ret; 827fb9987d0SSujith 828fb9987d0SSujith hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops); 829fb9987d0SSujith if (!hw) 830fb9987d0SSujith return -ENOMEM; 831fb9987d0SSujith 832fb9987d0SSujith priv = hw->priv; 833fb9987d0SSujith priv->hw = hw; 834fb9987d0SSujith priv->htc = htc_handle; 835fb9987d0SSujith priv->dev = dev; 836fb9987d0SSujith htc_handle->drv_priv = priv; 837fb9987d0SSujith SET_IEEE80211_DEV(hw, priv->dev); 838fb9987d0SSujith 839fb9987d0SSujith ret = ath9k_htc_wait_for_target(priv); 840fb9987d0SSujith if (ret) 841fb9987d0SSujith goto err_free; 842fb9987d0SSujith 843fb9987d0SSujith priv->wmi = ath9k_init_wmi(priv); 844fb9987d0SSujith if (!priv->wmi) { 845fb9987d0SSujith ret = -EINVAL; 846fb9987d0SSujith goto err_free; 847fb9987d0SSujith } 848fb9987d0SSujith 849fa6e15e0SRajkumar Manoharan ret = ath9k_init_htc_services(priv, devid, drv_info); 850fb9987d0SSujith if (ret) 851fb9987d0SSujith goto err_init; 852fb9987d0SSujith 853fa6e15e0SRajkumar Manoharan ret = ath9k_init_device(priv, devid, product, drv_info); 854fb9987d0SSujith if (ret) 855fb9987d0SSujith goto err_init; 856fb9987d0SSujith 857fb9987d0SSujith return 0; 858fb9987d0SSujith 859fb9987d0SSujith err_init: 860fb9987d0SSujith ath9k_deinit_wmi(priv); 861fb9987d0SSujith err_free: 862fb9987d0SSujith ieee80211_free_hw(hw); 863fb9987d0SSujith return ret; 864fb9987d0SSujith } 865fb9987d0SSujith 866fb9987d0SSujith void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug) 867fb9987d0SSujith { 868fb9987d0SSujith if (htc_handle->drv_priv) { 869a3be14b7SSujith 870a3be14b7SSujith /* Check if the device has been yanked out. */ 871a3be14b7SSujith if (hotunplug) 87297dcec57SSujith Manoharan htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED; 873a3be14b7SSujith 874fb9987d0SSujith ath9k_deinit_device(htc_handle->drv_priv); 875fb9987d0SSujith ath9k_deinit_wmi(htc_handle->drv_priv); 876fb9987d0SSujith ieee80211_free_hw(htc_handle->drv_priv->hw); 877fb9987d0SSujith } 878fb9987d0SSujith } 879fb9987d0SSujith 880fb9987d0SSujith #ifdef CONFIG_PM 881f933ebedSSujith Manoharan 882f933ebedSSujith Manoharan void ath9k_htc_suspend(struct htc_target *htc_handle) 883f933ebedSSujith Manoharan { 884f933ebedSSujith Manoharan ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP); 885f933ebedSSujith Manoharan } 886f933ebedSSujith Manoharan 887fb9987d0SSujith int ath9k_htc_resume(struct htc_target *htc_handle) 888fb9987d0SSujith { 889fa6e15e0SRajkumar Manoharan struct ath9k_htc_priv *priv = htc_handle->drv_priv; 890fb9987d0SSujith int ret; 891fb9987d0SSujith 892fa6e15e0SRajkumar Manoharan ret = ath9k_htc_wait_for_target(priv); 893fb9987d0SSujith if (ret) 894fb9987d0SSujith return ret; 895fb9987d0SSujith 896fa6e15e0SRajkumar Manoharan ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid, 8970b5ead91SSujith Manoharan priv->ah->hw_version.usbdev); 8981e51acaaSOleksij Rempel ath9k_configure_leds(priv); 8991e51acaaSOleksij Rempel 900fb9987d0SSujith return ret; 901fb9987d0SSujith } 902fb9987d0SSujith #endif 903fb9987d0SSujith 904fb9987d0SSujith static int __init ath9k_htc_init(void) 905fb9987d0SSujith { 906e5facc75SRajkumar Manoharan if (ath9k_hif_usb_init() < 0) { 907516304b0SJoe Perches pr_err("No USB devices found, driver not installed\n"); 908e5facc75SRajkumar Manoharan return -ENODEV; 909fb9987d0SSujith } 910fb9987d0SSujith 911fb9987d0SSujith return 0; 912fb9987d0SSujith } 913fb9987d0SSujith module_init(ath9k_htc_init); 914fb9987d0SSujith 915fb9987d0SSujith static void __exit ath9k_htc_exit(void) 916fb9987d0SSujith { 917fb9987d0SSujith ath9k_hif_usb_exit(); 918516304b0SJoe Perches pr_info("Driver unloaded\n"); 919fb9987d0SSujith } 920fb9987d0SSujith module_exit(ath9k_htc_exit); 921