1 /* 2 * Copyright (c) 2008-2009 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef DEBUG_H 18 #define DEBUG_H 19 20 enum ATH_DEBUG { 21 ATH_DBG_RESET = 0x00000001, 22 ATH_DBG_QUEUE = 0x00000002, 23 ATH_DBG_EEPROM = 0x00000004, 24 ATH_DBG_CALIBRATE = 0x00000008, 25 ATH_DBG_INTERRUPT = 0x00000010, 26 ATH_DBG_REGULATORY = 0x00000020, 27 ATH_DBG_ANI = 0x00000040, 28 ATH_DBG_XMIT = 0x00000080, 29 ATH_DBG_BEACON = 0x00000100, 30 ATH_DBG_CONFIG = 0x00000200, 31 ATH_DBG_FATAL = 0x00000400, 32 ATH_DBG_PS = 0x00000800, 33 ATH_DBG_HWTIMER = 0x00001000, 34 ATH_DBG_BTCOEX = 0x00002000, 35 ATH_DBG_ANY = 0xffffffff 36 }; 37 38 #define DBG_DEFAULT (ATH_DBG_FATAL) 39 40 struct ath_txq; 41 struct ath_buf; 42 43 #ifdef CONFIG_ATH9K_DEBUG 44 #define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++ 45 #else 46 #define TX_STAT_INC(q, c) do { } while (0) 47 #endif 48 49 #ifdef CONFIG_ATH9K_DEBUG 50 51 /** 52 * struct ath_interrupt_stats - Contains statistics about interrupts 53 * @total: Total no. of interrupts generated so far 54 * @rxok: RX with no errors 55 * @rxeol: RX with no more RXDESC available 56 * @rxorn: RX FIFO overrun 57 * @txok: TX completed at the requested rate 58 * @txurn: TX FIFO underrun 59 * @mib: MIB regs reaching its threshold 60 * @rxphyerr: RX with phy errors 61 * @rx_keycache_miss: RX with key cache misses 62 * @swba: Software Beacon Alert 63 * @bmiss: Beacon Miss 64 * @bnr: Beacon Not Ready 65 * @cst: Carrier Sense TImeout 66 * @gtt: Global TX Timeout 67 * @tim: RX beacon TIM occurrence 68 * @cabend: RX End of CAB traffic 69 * @dtimsync: DTIM sync lossage 70 * @dtim: RX Beacon with DTIM 71 */ 72 struct ath_interrupt_stats { 73 u32 total; 74 u32 rxok; 75 u32 rxeol; 76 u32 rxorn; 77 u32 txok; 78 u32 txeol; 79 u32 txurn; 80 u32 mib; 81 u32 rxphyerr; 82 u32 rx_keycache_miss; 83 u32 swba; 84 u32 bmiss; 85 u32 bnr; 86 u32 cst; 87 u32 gtt; 88 u32 tim; 89 u32 cabend; 90 u32 dtimsync; 91 u32 dtim; 92 }; 93 94 struct ath_rc_stats { 95 u32 success; 96 u32 retries; 97 u32 xretries; 98 u8 per; 99 }; 100 101 /** 102 * struct ath_tx_stats - Statistics about TX 103 * @queued: Total MPDUs (non-aggr) queued 104 * @completed: Total MPDUs (non-aggr) completed 105 * @a_aggr: Total no. of aggregates queued 106 * @a_queued: Total AMPDUs queued 107 * @a_completed: Total AMPDUs completed 108 * @a_retries: No. of AMPDUs retried (SW) 109 * @a_xretries: No. of AMPDUs dropped due to xretries 110 * @fifo_underrun: FIFO underrun occurrences 111 Valid only for: 112 - non-aggregate condition. 113 - first packet of aggregate. 114 * @xtxop: No. of frames filtered because of TXOP limit 115 * @timer_exp: Transmit timer expiry 116 * @desc_cfg_err: Descriptor configuration errors 117 * @data_urn: TX data underrun errors 118 * @delim_urn: TX delimiter underrun errors 119 */ 120 struct ath_tx_stats { 121 u32 queued; 122 u32 completed; 123 u32 a_aggr; 124 u32 a_queued; 125 u32 a_completed; 126 u32 a_retries; 127 u32 a_xretries; 128 u32 fifo_underrun; 129 u32 xtxop; 130 u32 timer_exp; 131 u32 desc_cfg_err; 132 u32 data_underrun; 133 u32 delim_underrun; 134 }; 135 136 struct ath_stats { 137 struct ath_interrupt_stats istats; 138 struct ath_rc_stats rcstats[RATE_TABLE_SIZE]; 139 struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES]; 140 }; 141 142 struct ath9k_debug { 143 int debug_mask; 144 struct dentry *debugfs_phy; 145 struct dentry *debugfs_debug; 146 struct dentry *debugfs_dma; 147 struct dentry *debugfs_interrupt; 148 struct dentry *debugfs_rcstat; 149 struct dentry *debugfs_wiphy; 150 struct dentry *debugfs_xmit; 151 struct ath_stats stats; 152 }; 153 154 void DPRINTF(struct ath_softc *sc, int dbg_mask, const char *fmt, ...); 155 int ath9k_init_debug(struct ath_softc *sc); 156 void ath9k_exit_debug(struct ath_softc *sc); 157 int ath9k_debug_create_root(void); 158 void ath9k_debug_remove_root(void); 159 void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status); 160 void ath_debug_stat_rc(struct ath_softc *sc, struct sk_buff *skb); 161 void ath_debug_stat_tx(struct ath_softc *sc, struct ath_txq *txq, 162 struct ath_buf *bf); 163 void ath_debug_stat_retries(struct ath_softc *sc, int rix, 164 int xretries, int retries, u8 per); 165 166 #else 167 168 static inline void DPRINTF(struct ath_softc *sc, int dbg_mask, 169 const char *fmt, ...) 170 { 171 } 172 173 static inline int ath9k_init_debug(struct ath_softc *sc) 174 { 175 return 0; 176 } 177 178 static inline void ath9k_exit_debug(struct ath_softc *sc) 179 { 180 } 181 182 static inline int ath9k_debug_create_root(void) 183 { 184 return 0; 185 } 186 187 static inline void ath9k_debug_remove_root(void) 188 { 189 } 190 191 static inline void ath_debug_stat_interrupt(struct ath_softc *sc, 192 enum ath9k_int status) 193 { 194 } 195 196 static inline void ath_debug_stat_rc(struct ath_softc *sc, 197 struct sk_buff *skb) 198 { 199 } 200 201 static inline void ath_debug_stat_tx(struct ath_softc *sc, 202 struct ath_txq *txq, 203 struct ath_buf *bf) 204 { 205 } 206 207 static inline void ath_debug_stat_retries(struct ath_softc *sc, int rix, 208 int xretries, int retries, u8 per) 209 { 210 } 211 212 #endif /* CONFIG_ATH9K_DEBUG */ 213 214 #endif /* DEBUG_H */ 215