1 /* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef ATH9K_H 18 #define ATH9K_H 19 20 #include <linux/etherdevice.h> 21 #include <linux/device.h> 22 #include <linux/interrupt.h> 23 #include <linux/leds.h> 24 #include <linux/completion.h> 25 #include <linux/time.h> 26 #include <linux/hw_random.h> 27 28 #include "common.h" 29 #include "debug.h" 30 #include "mci.h" 31 #include "dfs.h" 32 33 struct ath_node; 34 struct ath_vif; 35 36 extern struct ieee80211_ops ath9k_ops; 37 extern int ath9k_modparam_nohwcrypt; 38 extern int ath9k_led_blink; 39 extern bool is_ath9k_unloaded; 40 extern int ath9k_use_chanctx; 41 42 /*************************/ 43 /* Descriptor Management */ 44 /*************************/ 45 46 #define ATH_TXSTATUS_RING_SIZE 512 47 48 /* Macro to expand scalars to 64-bit objects */ 49 #define ito64(x) (sizeof(x) == 1) ? \ 50 (((unsigned long long int)(x)) & (0xff)) : \ 51 (sizeof(x) == 2) ? \ 52 (((unsigned long long int)(x)) & 0xffff) : \ 53 ((sizeof(x) == 4) ? \ 54 (((unsigned long long int)(x)) & 0xffffffff) : \ 55 (unsigned long long int)(x)) 56 57 #define ATH_TXBUF_RESET(_bf) do { \ 58 (_bf)->bf_lastbf = NULL; \ 59 (_bf)->bf_next = NULL; \ 60 memset(&((_bf)->bf_state), 0, \ 61 sizeof(struct ath_buf_state)); \ 62 } while (0) 63 64 #define DS2PHYS(_dd, _ds) \ 65 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 66 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0) 67 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096) 68 69 struct ath_descdma { 70 void *dd_desc; 71 dma_addr_t dd_desc_paddr; 72 u32 dd_desc_len; 73 }; 74 75 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, 76 struct list_head *head, const char *name, 77 int nbuf, int ndesc, bool is_tx); 78 79 /***********/ 80 /* RX / TX */ 81 /***********/ 82 83 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) 84 85 /* increment with wrap-around */ 86 #define INCR(_l, _sz) do { \ 87 (_l)++; \ 88 (_l) &= ((_sz) - 1); \ 89 } while (0) 90 91 #define ATH_RXBUF 512 92 #define ATH_TXBUF 512 93 #define ATH_TXBUF_RESERVE 5 94 #define ATH_TXMAXTRY 13 95 #define ATH_MAX_SW_RETRIES 30 96 97 #define TID_TO_WME_AC(_tid) \ 98 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \ 99 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \ 100 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \ 101 IEEE80211_AC_VO) 102 103 #define ATH_AGGR_DELIM_SZ 4 104 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ 105 /* number of delimiters for encryption padding */ 106 #define ATH_AGGR_ENCRYPTDELIM 10 107 /* minimum h/w qdepth to be sustained to maximize aggregation */ 108 #define ATH_AGGR_MIN_QDEPTH 2 109 /* minimum h/w qdepth for non-aggregated traffic */ 110 #define ATH_NON_AGGR_MIN_QDEPTH 8 111 #define ATH_HW_CHECK_POLL_INT 1000 112 #define ATH_TXFIFO_DEPTH 8 113 #define ATH_TX_ERROR 0x01 114 115 /* Stop tx traffic 1ms before the GO goes away */ 116 #define ATH_P2P_PS_STOP_TIME 1000 117 118 #define IEEE80211_SEQ_SEQ_SHIFT 4 119 #define IEEE80211_SEQ_MAX 4096 120 #define IEEE80211_WEP_IVLEN 3 121 #define IEEE80211_WEP_KIDLEN 1 122 #define IEEE80211_WEP_CRCLEN 4 123 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \ 124 (IEEE80211_WEP_IVLEN + \ 125 IEEE80211_WEP_KIDLEN + \ 126 IEEE80211_WEP_CRCLEN)) 127 128 /* return whether a bit at index _n in bitmap _bm is set 129 * _sz is the size of the bitmap */ 130 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \ 131 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31)))) 132 133 /* return block-ack bitmap index given sequence and starting sequence */ 134 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1)) 135 136 /* return the seqno for _start + _offset */ 137 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1)) 138 139 /* returns delimiter padding required given the packet length */ 140 #define ATH_AGGR_GET_NDELIM(_len) \ 141 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \ 142 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ)) 143 144 #define BAW_WITHIN(_start, _bawsz, _seqno) \ 145 ((((_seqno) - (_start)) & 4095) < (_bawsz)) 146 147 #define ATH_AN_2_TID(_an, _tidno) ath_node_to_tid(_an, _tidno) 148 149 #define IS_HT_RATE(rate) (rate & 0x80) 150 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e)) 151 #define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf)) 152 153 enum { 154 WLAN_RC_PHY_OFDM, 155 WLAN_RC_PHY_CCK, 156 }; 157 158 struct ath_txq { 159 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */ 160 u32 axq_qnum; /* ath9k hardware queue number */ 161 void *axq_link; 162 struct list_head axq_q; 163 spinlock_t axq_lock; 164 u32 axq_depth; 165 u32 axq_ampdu_depth; 166 bool axq_tx_inprogress; 167 struct list_head txq_fifo[ATH_TXFIFO_DEPTH]; 168 u8 txq_headidx; 169 u8 txq_tailidx; 170 int pending_frames; 171 struct sk_buff_head complete_q; 172 }; 173 174 struct ath_frame_info { 175 struct ath_buf *bf; 176 u16 framelen; 177 s8 txq; 178 u8 keyix; 179 u8 rtscts_rate; 180 u8 retries : 7; 181 u8 baw_tracked : 1; 182 u8 tx_power; 183 enum ath9k_key_type keytype:2; 184 }; 185 186 struct ath_rxbuf { 187 struct list_head list; 188 struct sk_buff *bf_mpdu; 189 void *bf_desc; 190 dma_addr_t bf_daddr; 191 dma_addr_t bf_buf_addr; 192 }; 193 194 /** 195 * enum buffer_type - Buffer type flags 196 * 197 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) 198 * @BUF_AGGR: Indicates whether the buffer can be aggregated 199 * (used in aggregation scheduling) 200 */ 201 enum buffer_type { 202 BUF_AMPDU = BIT(0), 203 BUF_AGGR = BIT(1), 204 }; 205 206 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) 207 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) 208 209 struct ath_buf_state { 210 u8 bf_type; 211 u8 bfs_paprd; 212 u8 ndelim; 213 bool stale; 214 u16 seqno; 215 unsigned long bfs_paprd_timestamp; 216 }; 217 218 struct ath_buf { 219 struct list_head list; 220 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or 221 an aggregate) */ 222 struct ath_buf *bf_next; /* next subframe in the aggregate */ 223 struct sk_buff *bf_mpdu; /* enclosing frame structure */ 224 void *bf_desc; /* virtual addr of desc */ 225 dma_addr_t bf_daddr; /* physical addr of desc */ 226 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */ 227 struct ieee80211_tx_rate rates[4]; 228 struct ath_buf_state bf_state; 229 }; 230 231 struct ath_atx_tid { 232 struct list_head list; 233 struct sk_buff_head retry_q; 234 struct ath_node *an; 235 struct ath_txq *txq; 236 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)]; 237 u16 seq_start; 238 u16 seq_next; 239 u16 baw_size; 240 u8 tidno; 241 int baw_head; /* first un-acked tx buffer */ 242 int baw_tail; /* next unused tx buffer slot */ 243 244 s8 bar_index; 245 bool active; 246 bool clear_ps_filter; 247 }; 248 249 void ath_tx_queue_tid(struct ath_softc *sc, struct ath_atx_tid *tid); 250 251 struct ath_node { 252 struct ath_softc *sc; 253 struct ieee80211_sta *sta; /* station struct we're part of */ 254 struct ieee80211_vif *vif; /* interface with which we're associated */ 255 256 u16 maxampdu; 257 u8 mpdudensity; 258 s8 ps_key; 259 260 bool sleeping; 261 bool no_ps_filter; 262 263 #ifdef CONFIG_ATH9K_STATION_STATISTICS 264 struct ath_rx_rate_stats rx_rate_stats; 265 #endif 266 u8 key_idx[4]; 267 268 int ackto; 269 struct list_head list; 270 }; 271 272 struct ath_tx_control { 273 struct ath_txq *txq; 274 struct ath_node *an; 275 struct ieee80211_sta *sta; 276 u8 paprd; 277 }; 278 279 280 /** 281 * @txq_map: Index is mac80211 queue number. This is 282 * not necessarily the same as the hardware queue number 283 * (axq_qnum). 284 */ 285 struct ath_tx { 286 u32 txqsetup; 287 spinlock_t txbuflock; 288 struct list_head txbuf; 289 struct ath_txq txq[ATH9K_NUM_TX_QUEUES]; 290 struct ath_descdma txdma; 291 struct ath_txq *txq_map[IEEE80211_NUM_ACS]; 292 struct ath_txq *uapsdq; 293 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32]; 294 }; 295 296 struct ath_rx_edma { 297 struct sk_buff_head rx_fifo; 298 u32 rx_fifo_hwsize; 299 }; 300 301 struct ath_rx { 302 u8 defant; 303 u8 rxotherant; 304 bool discard_next; 305 u32 *rxlink; 306 u32 num_pkts; 307 struct list_head rxbuf; 308 struct ath_descdma rxdma; 309 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX]; 310 311 struct ath_rxbuf *buf_hold; 312 struct sk_buff *frag; 313 314 u32 ampdu_ref; 315 }; 316 317 /*******************/ 318 /* Channel Context */ 319 /*******************/ 320 321 struct ath_acq { 322 struct list_head acq_new; 323 struct list_head acq_old; 324 spinlock_t lock; 325 }; 326 327 struct ath_chanctx { 328 struct cfg80211_chan_def chandef; 329 struct list_head vifs; 330 struct ath_acq acq[IEEE80211_NUM_ACS]; 331 int hw_queue_base; 332 333 /* do not dereference, use for comparison only */ 334 struct ieee80211_vif *primary_sta; 335 336 struct ath_beacon_config beacon; 337 struct ath9k_hw_cal_data caldata; 338 struct timespec64 tsf_ts; 339 u64 tsf_val; 340 u32 last_beacon; 341 342 int flush_timeout; 343 u16 txpower; 344 u16 cur_txpower; 345 bool offchannel; 346 bool stopped; 347 bool active; 348 bool assigned; 349 bool switch_after_beacon; 350 351 short nvifs; 352 short nvifs_assigned; 353 unsigned int rxfilter; 354 }; 355 356 enum ath_chanctx_event { 357 ATH_CHANCTX_EVENT_BEACON_PREPARE, 358 ATH_CHANCTX_EVENT_BEACON_SENT, 359 ATH_CHANCTX_EVENT_TSF_TIMER, 360 ATH_CHANCTX_EVENT_BEACON_RECEIVED, 361 ATH_CHANCTX_EVENT_AUTHORIZED, 362 ATH_CHANCTX_EVENT_SWITCH, 363 ATH_CHANCTX_EVENT_ASSIGN, 364 ATH_CHANCTX_EVENT_UNASSIGN, 365 ATH_CHANCTX_EVENT_CHANGE, 366 ATH_CHANCTX_EVENT_ENABLE_MULTICHANNEL, 367 }; 368 369 enum ath_chanctx_state { 370 ATH_CHANCTX_STATE_IDLE, 371 ATH_CHANCTX_STATE_WAIT_FOR_BEACON, 372 ATH_CHANCTX_STATE_WAIT_FOR_TIMER, 373 ATH_CHANCTX_STATE_SWITCH, 374 ATH_CHANCTX_STATE_FORCE_ACTIVE, 375 }; 376 377 struct ath_chanctx_sched { 378 bool beacon_pending; 379 bool beacon_adjust; 380 bool offchannel_pending; 381 bool wait_switch; 382 bool force_noa_update; 383 bool extend_absence; 384 bool mgd_prepare_tx; 385 enum ath_chanctx_state state; 386 u8 beacon_miss; 387 388 u32 next_tbtt; 389 u32 switch_start_time; 390 unsigned int offchannel_duration; 391 unsigned int channel_switch_time; 392 393 /* backup, in case the hardware timer fails */ 394 struct timer_list timer; 395 }; 396 397 enum ath_offchannel_state { 398 ATH_OFFCHANNEL_IDLE, 399 ATH_OFFCHANNEL_PROBE_SEND, 400 ATH_OFFCHANNEL_PROBE_WAIT, 401 ATH_OFFCHANNEL_SUSPEND, 402 ATH_OFFCHANNEL_ROC_START, 403 ATH_OFFCHANNEL_ROC_WAIT, 404 ATH_OFFCHANNEL_ROC_DONE, 405 }; 406 407 enum ath_roc_complete_reason { 408 ATH_ROC_COMPLETE_EXPIRE, 409 ATH_ROC_COMPLETE_ABORT, 410 ATH_ROC_COMPLETE_CANCEL, 411 }; 412 413 struct ath_offchannel { 414 struct ath_chanctx chan; 415 struct timer_list timer; 416 struct cfg80211_scan_request *scan_req; 417 struct ieee80211_vif *scan_vif; 418 int scan_idx; 419 enum ath_offchannel_state state; 420 struct ieee80211_channel *roc_chan; 421 struct ieee80211_vif *roc_vif; 422 int roc_duration; 423 int duration; 424 }; 425 426 static inline struct ath_atx_tid * 427 ath_node_to_tid(struct ath_node *an, u8 tidno) 428 { 429 struct ieee80211_sta *sta = an->sta; 430 struct ieee80211_vif *vif = an->vif; 431 struct ieee80211_txq *txq; 432 433 BUG_ON(!vif); 434 if (sta) 435 txq = sta->txq[tidno % ARRAY_SIZE(sta->txq)]; 436 else 437 txq = vif->txq; 438 439 return (struct ath_atx_tid *) txq->drv_priv; 440 } 441 442 #define case_rtn_string(val) case val: return #val 443 444 #define ath_for_each_chanctx(_sc, _ctx) \ 445 for (ctx = &sc->chanctx[0]; \ 446 ctx <= &sc->chanctx[ARRAY_SIZE(sc->chanctx) - 1]; \ 447 ctx++) 448 449 void ath_chanctx_init(struct ath_softc *sc); 450 void ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx, 451 struct cfg80211_chan_def *chandef); 452 453 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT 454 455 static inline struct ath_chanctx * 456 ath_chanctx_get(struct ieee80211_chanctx_conf *ctx) 457 { 458 struct ath_chanctx **ptr = (void *) ctx->drv_priv; 459 return *ptr; 460 } 461 462 bool ath9k_is_chanctx_enabled(void); 463 void ath9k_fill_chanctx_ops(void); 464 void ath9k_init_channel_context(struct ath_softc *sc); 465 void ath9k_offchannel_init(struct ath_softc *sc); 466 void ath9k_deinit_channel_context(struct ath_softc *sc); 467 int ath9k_init_p2p(struct ath_softc *sc); 468 void ath9k_deinit_p2p(struct ath_softc *sc); 469 void ath9k_p2p_remove_vif(struct ath_softc *sc, 470 struct ieee80211_vif *vif); 471 void ath9k_p2p_beacon_sync(struct ath_softc *sc); 472 void ath9k_p2p_bss_info_changed(struct ath_softc *sc, 473 struct ieee80211_vif *vif); 474 void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp, 475 struct sk_buff *skb); 476 void ath9k_p2p_ps_timer(void *priv); 477 void ath9k_chanctx_wake_queues(struct ath_softc *sc, struct ath_chanctx *ctx); 478 void ath9k_chanctx_stop_queues(struct ath_softc *sc, struct ath_chanctx *ctx); 479 void ath_chanctx_check_active(struct ath_softc *sc, struct ath_chanctx *ctx); 480 481 void ath_chanctx_beacon_recv_ev(struct ath_softc *sc, 482 enum ath_chanctx_event ev); 483 void ath_chanctx_beacon_sent_ev(struct ath_softc *sc, 484 enum ath_chanctx_event ev); 485 void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif, 486 enum ath_chanctx_event ev); 487 void ath_chanctx_set_next(struct ath_softc *sc, bool force); 488 void ath_offchannel_next(struct ath_softc *sc); 489 void ath_scan_complete(struct ath_softc *sc, bool abort); 490 void ath_roc_complete(struct ath_softc *sc, 491 enum ath_roc_complete_reason reason); 492 struct ath_chanctx* ath_is_go_chanctx_present(struct ath_softc *sc); 493 494 #else 495 496 static inline bool ath9k_is_chanctx_enabled(void) 497 { 498 return false; 499 } 500 static inline void ath9k_fill_chanctx_ops(void) 501 { 502 } 503 static inline void ath9k_init_channel_context(struct ath_softc *sc) 504 { 505 } 506 static inline void ath9k_offchannel_init(struct ath_softc *sc) 507 { 508 } 509 static inline void ath9k_deinit_channel_context(struct ath_softc *sc) 510 { 511 } 512 static inline void ath_chanctx_beacon_recv_ev(struct ath_softc *sc, 513 enum ath_chanctx_event ev) 514 { 515 } 516 static inline void ath_chanctx_beacon_sent_ev(struct ath_softc *sc, 517 enum ath_chanctx_event ev) 518 { 519 } 520 static inline void ath_chanctx_event(struct ath_softc *sc, 521 struct ieee80211_vif *vif, 522 enum ath_chanctx_event ev) 523 { 524 } 525 static inline int ath9k_init_p2p(struct ath_softc *sc) 526 { 527 return 0; 528 } 529 static inline void ath9k_deinit_p2p(struct ath_softc *sc) 530 { 531 } 532 static inline void ath9k_p2p_remove_vif(struct ath_softc *sc, 533 struct ieee80211_vif *vif) 534 { 535 } 536 static inline void ath9k_p2p_beacon_sync(struct ath_softc *sc) 537 { 538 } 539 static inline void ath9k_p2p_bss_info_changed(struct ath_softc *sc, 540 struct ieee80211_vif *vif) 541 { 542 } 543 static inline void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp, 544 struct sk_buff *skb) 545 { 546 } 547 static inline void ath9k_p2p_ps_timer(struct ath_softc *sc) 548 { 549 } 550 static inline void ath9k_chanctx_wake_queues(struct ath_softc *sc, 551 struct ath_chanctx *ctx) 552 { 553 } 554 static inline void ath9k_chanctx_stop_queues(struct ath_softc *sc, 555 struct ath_chanctx *ctx) 556 { 557 } 558 static inline void ath_chanctx_check_active(struct ath_softc *sc, 559 struct ath_chanctx *ctx) 560 { 561 } 562 563 #endif /* CONFIG_ATH9K_CHANNEL_CONTEXT */ 564 565 static inline void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq) 566 { 567 spin_lock_bh(&txq->axq_lock); 568 } 569 static inline void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq) 570 { 571 spin_unlock_bh(&txq->axq_lock); 572 } 573 574 void ath_startrecv(struct ath_softc *sc); 575 bool ath_stoprecv(struct ath_softc *sc); 576 u32 ath_calcrxfilter(struct ath_softc *sc); 577 int ath_rx_init(struct ath_softc *sc, int nbufs); 578 void ath_rx_cleanup(struct ath_softc *sc); 579 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp); 580 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype); 581 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq); 582 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); 583 bool ath_drain_all_txq(struct ath_softc *sc); 584 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq); 585 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an); 586 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an); 587 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); 588 void ath_txq_schedule_all(struct ath_softc *sc); 589 int ath_tx_init(struct ath_softc *sc, int nbufs); 590 int ath_txq_update(struct ath_softc *sc, int qnum, 591 struct ath9k_tx_queue_info *q); 592 u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen, 593 int width, int half_gi, bool shortPreamble); 594 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop); 595 void ath_assign_seq(struct ath_common *common, struct sk_buff *skb); 596 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, 597 struct ath_tx_control *txctl); 598 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 599 struct sk_buff *skb); 600 void ath_tx_tasklet(struct ath_softc *sc); 601 void ath_tx_edma_tasklet(struct ath_softc *sc); 602 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, 603 u16 tid, u16 *ssn); 604 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 605 606 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an); 607 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc, 608 struct ath_node *an); 609 void ath9k_release_buffered_frames(struct ieee80211_hw *hw, 610 struct ieee80211_sta *sta, 611 u16 tids, int nframes, 612 enum ieee80211_frame_release_type reason, 613 bool more_data); 614 void ath9k_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *queue); 615 616 /********/ 617 /* VIFs */ 618 /********/ 619 620 #define P2P_DEFAULT_CTWIN 10 621 622 struct ath_vif { 623 struct list_head list; 624 625 u16 seq_no; 626 627 /* BSS info */ 628 u8 bssid[ETH_ALEN] __aligned(2); 629 u16 aid; 630 bool assoc; 631 632 struct ieee80211_vif *vif; 633 struct ath_node mcast_node; 634 int av_bslot; 635 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */ 636 struct ath_buf *av_bcbuf; 637 struct ath_chanctx *chanctx; 638 639 /* P2P Client */ 640 struct ieee80211_noa_data noa; 641 642 /* P2P GO */ 643 u8 noa_index; 644 u32 offchannel_start; 645 u32 offchannel_duration; 646 647 /* These are used for both periodic and one-shot */ 648 u32 noa_start; 649 u32 noa_duration; 650 bool periodic_noa; 651 bool oneshot_noa; 652 }; 653 654 struct ath9k_vif_iter_data { 655 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */ 656 u8 mask[ETH_ALEN]; /* bssid mask */ 657 bool has_hw_macaddr; 658 u8 slottime; 659 bool beacons; 660 661 int naps; /* number of AP vifs */ 662 int nmeshes; /* number of mesh vifs */ 663 int nstations; /* number of station vifs */ 664 int nadhocs; /* number of adhoc vifs */ 665 int nocbs; /* number of OCB vifs */ 666 int nbcnvifs; /* number of beaconing vifs */ 667 struct ieee80211_vif *primary_beacon_vif; 668 struct ieee80211_vif *primary_sta; 669 }; 670 671 void ath9k_calculate_iter_data(struct ath_softc *sc, 672 struct ath_chanctx *ctx, 673 struct ath9k_vif_iter_data *iter_data); 674 void ath9k_calculate_summary_state(struct ath_softc *sc, 675 struct ath_chanctx *ctx); 676 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif); 677 678 /*******************/ 679 /* Beacon Handling */ 680 /*******************/ 681 682 /* 683 * Regardless of the number of beacons we stagger, (i.e. regardless of the 684 * number of BSSIDs) if a given beacon does not go out even after waiting this 685 * number of beacon intervals, the game's up. 686 */ 687 #define BSTUCK_THRESH 9 688 #define ATH_BCBUF 8 689 #define ATH_DEFAULT_BINTVAL 100 /* TU */ 690 #define ATH_DEFAULT_BMISS_LIMIT 10 691 692 #define TSF_TO_TU(_h,_l) \ 693 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) 694 695 struct ath_beacon { 696 enum { 697 OK, /* no change needed */ 698 UPDATE, /* update pending */ 699 COMMIT /* beacon sent, commit change */ 700 } updateslot; /* slot time update fsm */ 701 702 u32 beaconq; 703 u32 bmisscnt; 704 struct ieee80211_vif *bslot[ATH_BCBUF]; 705 int slottime; 706 int slotupdate; 707 struct ath_descdma bdma; 708 struct ath_txq *cabq; 709 struct list_head bbuf; 710 711 bool tx_processed; 712 bool tx_last; 713 }; 714 715 void ath9k_beacon_tasklet(struct tasklet_struct *t); 716 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *main_vif, 717 bool beacons); 718 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 719 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 720 void ath9k_beacon_ensure_primary_slot(struct ath_softc *sc); 721 void ath9k_set_beacon(struct ath_softc *sc); 722 bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif); 723 void ath9k_csa_update(struct ath_softc *sc); 724 725 /*******************/ 726 /* Link Monitoring */ 727 /*******************/ 728 729 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */ 730 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */ 731 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */ 732 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */ 733 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */ 734 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ 735 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ 736 #define ATH_ANI_MAX_SKIP_COUNT 10 737 #define ATH_PAPRD_TIMEOUT 100 /* msecs */ 738 #define ATH_PLL_WORK_INTERVAL 100 739 740 void ath_hw_check_work(struct work_struct *work); 741 void ath_reset_work(struct work_struct *work); 742 bool ath_hw_check(struct ath_softc *sc); 743 void ath_hw_pll_work(struct work_struct *work); 744 void ath_paprd_calibrate(struct work_struct *work); 745 void ath_ani_calibrate(struct timer_list *t); 746 void ath_start_ani(struct ath_softc *sc); 747 void ath_stop_ani(struct ath_softc *sc); 748 void ath_check_ani(struct ath_softc *sc); 749 int ath_update_survey_stats(struct ath_softc *sc); 750 void ath_update_survey_nf(struct ath_softc *sc, int channel); 751 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type); 752 void ath_ps_full_sleep(struct timer_list *t); 753 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop, 754 bool sw_pending, bool timeout_override); 755 756 /**********/ 757 /* BTCOEX */ 758 /**********/ 759 760 #define ATH_DUMP_BTCOEX(_s, _val) \ 761 do { \ 762 len += scnprintf(buf + len, size - len, \ 763 "%20s : %10d\n", _s, (_val)); \ 764 } while (0) 765 766 enum bt_op_flags { 767 BT_OP_PRIORITY_DETECTED, 768 BT_OP_SCAN, 769 }; 770 771 struct ath_btcoex { 772 spinlock_t btcoex_lock; 773 struct timer_list period_timer; /* Timer for BT period */ 774 struct timer_list no_stomp_timer; 775 u32 bt_priority_cnt; 776 unsigned long bt_priority_time; 777 unsigned long op_flags; 778 int bt_stomp_type; /* Types of BT stomping */ 779 u32 btcoex_no_stomp; /* in msec */ 780 u32 btcoex_period; /* in msec */ 781 u32 btscan_no_stomp; /* in msec */ 782 u32 duty_cycle; 783 u32 bt_wait_time; 784 int rssi_count; 785 struct ath_mci_profile mci; 786 u8 stomp_audio; 787 }; 788 789 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 790 int ath9k_init_btcoex(struct ath_softc *sc); 791 void ath9k_deinit_btcoex(struct ath_softc *sc); 792 void ath9k_start_btcoex(struct ath_softc *sc); 793 void ath9k_stop_btcoex(struct ath_softc *sc); 794 void ath9k_btcoex_timer_resume(struct ath_softc *sc); 795 void ath9k_btcoex_timer_pause(struct ath_softc *sc); 796 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status); 797 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen); 798 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc); 799 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size); 800 #else 801 static inline int ath9k_init_btcoex(struct ath_softc *sc) 802 { 803 return 0; 804 } 805 static inline void ath9k_deinit_btcoex(struct ath_softc *sc) 806 { 807 } 808 static inline void ath9k_start_btcoex(struct ath_softc *sc) 809 { 810 } 811 static inline void ath9k_stop_btcoex(struct ath_softc *sc) 812 { 813 } 814 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, 815 u32 status) 816 { 817 } 818 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, 819 u32 max_4ms_framelen) 820 { 821 return 0; 822 } 823 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc) 824 { 825 } 826 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size) 827 { 828 return 0; 829 } 830 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ 831 832 /********************/ 833 /* LED Control */ 834 /********************/ 835 836 #define ATH_LED_PIN_DEF 1 837 #define ATH_LED_PIN_9287 8 838 #define ATH_LED_PIN_9300 10 839 #define ATH_LED_PIN_9485 6 840 #define ATH_LED_PIN_9462 4 841 842 #ifdef CONFIG_MAC80211_LEDS 843 void ath_init_leds(struct ath_softc *sc); 844 void ath_deinit_leds(struct ath_softc *sc); 845 #else 846 static inline void ath_init_leds(struct ath_softc *sc) 847 { 848 } 849 850 static inline void ath_deinit_leds(struct ath_softc *sc) 851 { 852 } 853 #endif 854 855 /************************/ 856 /* Wake on Wireless LAN */ 857 /************************/ 858 859 #ifdef CONFIG_ATH9K_WOW 860 void ath9k_init_wow(struct ieee80211_hw *hw); 861 void ath9k_deinit_wow(struct ieee80211_hw *hw); 862 int ath9k_suspend(struct ieee80211_hw *hw, 863 struct cfg80211_wowlan *wowlan); 864 int ath9k_resume(struct ieee80211_hw *hw); 865 void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled); 866 #else 867 static inline void ath9k_init_wow(struct ieee80211_hw *hw) 868 { 869 } 870 static inline void ath9k_deinit_wow(struct ieee80211_hw *hw) 871 { 872 } 873 static inline int ath9k_suspend(struct ieee80211_hw *hw, 874 struct cfg80211_wowlan *wowlan) 875 { 876 return 0; 877 } 878 static inline int ath9k_resume(struct ieee80211_hw *hw) 879 { 880 return 0; 881 } 882 static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled) 883 { 884 } 885 #endif /* CONFIG_ATH9K_WOW */ 886 887 /*******************************/ 888 /* Antenna diversity/combining */ 889 /*******************************/ 890 891 #define ATH_ANT_RX_CURRENT_SHIFT 4 892 #define ATH_ANT_RX_MAIN_SHIFT 2 893 #define ATH_ANT_RX_MASK 0x3 894 895 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50 896 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100 897 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200 898 #define ATH_ANT_DIV_COMB_INIT_COUNT 95 899 #define ATH_ANT_DIV_COMB_MAX_COUNT 100 900 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30 901 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20 902 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50 903 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50 904 905 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4 906 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2 907 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2 908 909 struct ath_ant_comb { 910 u16 count; 911 u16 total_pkt_count; 912 bool scan; 913 bool scan_not_start; 914 int main_total_rssi; 915 int alt_total_rssi; 916 int alt_recv_cnt; 917 int main_recv_cnt; 918 int rssi_lna1; 919 int rssi_lna2; 920 int rssi_add; 921 int rssi_sub; 922 int rssi_first; 923 int rssi_second; 924 int rssi_third; 925 int ant_ratio; 926 int ant_ratio2; 927 bool alt_good; 928 int quick_scan_cnt; 929 enum ath9k_ant_div_comb_lna_conf main_conf; 930 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf; 931 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf; 932 bool first_ratio; 933 bool second_ratio; 934 unsigned long scan_start_time; 935 936 /* 937 * Card-specific config values. 938 */ 939 int low_rssi_thresh; 940 int fast_div_bias; 941 }; 942 943 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs); 944 945 /********************/ 946 /* Main driver core */ 947 /********************/ 948 949 #define ATH9K_PCI_CUS198 0x0001 950 #define ATH9K_PCI_CUS230 0x0002 951 #define ATH9K_PCI_CUS217 0x0004 952 #define ATH9K_PCI_CUS252 0x0008 953 #define ATH9K_PCI_WOW 0x0010 954 #define ATH9K_PCI_BT_ANT_DIV 0x0020 955 #define ATH9K_PCI_D3_L1_WAR 0x0040 956 #define ATH9K_PCI_AR9565_1ANT 0x0080 957 #define ATH9K_PCI_AR9565_2ANT 0x0100 958 #define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200 959 #define ATH9K_PCI_KILLER 0x0400 960 #define ATH9K_PCI_LED_ACT_HI 0x0800 961 962 /* 963 * Default cache line size, in bytes. 964 * Used when PCI device not fully initialized by bootrom/BIOS 965 */ 966 #define DEFAULT_CACHELINE 32 967 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ 968 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */ 969 #define MAX_GTT_CNT 5 970 971 /* Powersave flags */ 972 #define PS_WAIT_FOR_BEACON BIT(0) 973 #define PS_WAIT_FOR_CAB BIT(1) 974 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2) 975 #define PS_WAIT_FOR_TX_ACK BIT(3) 976 #define PS_BEACON_SYNC BIT(4) 977 #define PS_WAIT_FOR_ANI BIT(5) 978 979 #define ATH9K_NUM_CHANCTX 2 /* supports 2 operating channels */ 980 981 struct ath_softc { 982 struct ieee80211_hw *hw; 983 struct device *dev; 984 985 struct survey_info *cur_survey; 986 struct survey_info survey[ATH9K_NUM_CHANNELS]; 987 988 spinlock_t intr_lock; 989 struct tasklet_struct intr_tq; 990 struct tasklet_struct bcon_tasklet; 991 struct ath_hw *sc_ah; 992 void __iomem *mem; 993 int irq; 994 spinlock_t sc_serial_rw; 995 spinlock_t sc_pm_lock; 996 spinlock_t sc_pcu_lock; 997 struct mutex mutex; 998 struct work_struct paprd_work; 999 struct work_struct hw_reset_work; 1000 struct completion paprd_complete; 1001 wait_queue_head_t tx_wait; 1002 1003 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT 1004 struct work_struct chanctx_work; 1005 struct ath_gen_timer *p2p_ps_timer; 1006 struct ath_vif *p2p_ps_vif; 1007 struct ath_chanctx_sched sched; 1008 struct ath_offchannel offchannel; 1009 struct ath_chanctx *next_chan; 1010 struct completion go_beacon; 1011 struct timespec64 last_event_time; 1012 #endif 1013 1014 unsigned long driver_data; 1015 1016 u8 gtt_cnt; 1017 u32 intrstatus; 1018 u16 ps_flags; /* PS_* */ 1019 bool ps_enabled; 1020 bool ps_idle; 1021 short nbcnvifs; 1022 unsigned long ps_usecount; 1023 1024 struct ath_rx rx; 1025 struct ath_tx tx; 1026 struct ath_beacon beacon; 1027 1028 struct cfg80211_chan_def cur_chandef; 1029 struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX]; 1030 struct ath_chanctx *cur_chan; 1031 spinlock_t chan_lock; 1032 1033 #ifdef CONFIG_MAC80211_LEDS 1034 bool led_registered; 1035 char led_name[32]; 1036 struct led_classdev led_cdev; 1037 #endif 1038 1039 #ifdef CONFIG_ATH9K_DEBUGFS 1040 struct ath9k_debug debug; 1041 #endif 1042 struct delayed_work hw_check_work; 1043 struct delayed_work hw_pll_work; 1044 struct timer_list sleep_timer; 1045 1046 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 1047 struct ath_btcoex btcoex; 1048 struct ath_mci_coex mci_coex; 1049 struct work_struct mci_work; 1050 #endif 1051 1052 struct ath_descdma txsdma; 1053 1054 struct ath_ant_comb ant_comb; 1055 u8 ant_tx, ant_rx; 1056 struct dfs_pattern_detector *dfs_detector; 1057 u64 dfs_prev_pulse_ts; 1058 u32 wow_enabled; 1059 1060 struct ath_spec_scan_priv spec_priv; 1061 1062 struct ieee80211_vif *tx99_vif; 1063 struct sk_buff *tx99_skb; 1064 bool tx99_state; 1065 s16 tx99_power; 1066 1067 #ifdef CONFIG_ATH9K_WOW 1068 u32 wow_intr_before_sleep; 1069 bool force_wow; 1070 #endif 1071 1072 #ifdef CONFIG_ATH9K_HWRNG 1073 u32 rng_last; 1074 struct task_struct *rng_task; 1075 #endif 1076 }; 1077 1078 /********/ 1079 /* TX99 */ 1080 /********/ 1081 1082 #ifdef CONFIG_ATH9K_TX99 1083 void ath9k_tx99_init_debug(struct ath_softc *sc); 1084 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb, 1085 struct ath_tx_control *txctl); 1086 #else 1087 static inline void ath9k_tx99_init_debug(struct ath_softc *sc) 1088 { 1089 } 1090 static inline int ath9k_tx99_send(struct ath_softc *sc, 1091 struct sk_buff *skb, 1092 struct ath_tx_control *txctl) 1093 { 1094 return 0; 1095 } 1096 #endif /* CONFIG_ATH9K_TX99 */ 1097 1098 /***************************/ 1099 /* Random Number Generator */ 1100 /***************************/ 1101 #ifdef CONFIG_ATH9K_HWRNG 1102 void ath9k_rng_start(struct ath_softc *sc); 1103 void ath9k_rng_stop(struct ath_softc *sc); 1104 #else 1105 static inline void ath9k_rng_start(struct ath_softc *sc) 1106 { 1107 } 1108 1109 static inline void ath9k_rng_stop(struct ath_softc *sc) 1110 { 1111 } 1112 #endif 1113 1114 static inline void ath_read_cachesize(struct ath_common *common, int *csz) 1115 { 1116 common->bus_ops->read_cachesize(common, csz); 1117 } 1118 1119 void ath9k_tasklet(struct tasklet_struct *t); 1120 int ath_cabq_update(struct ath_softc *); 1121 u8 ath9k_parse_mpdudensity(u8 mpdudensity); 1122 irqreturn_t ath_isr(int irq, void *dev); 1123 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan); 1124 void ath_cancel_work(struct ath_softc *sc); 1125 void ath_restart_work(struct ath_softc *sc); 1126 int ath9k_init_device(u16 devid, struct ath_softc *sc, 1127 const struct ath_bus_ops *bus_ops); 1128 void ath9k_deinit_device(struct ath_softc *sc); 1129 void ath9k_reload_chainmask_settings(struct ath_softc *sc); 1130 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate); 1131 void ath_start_rfkill_poll(struct ath_softc *sc); 1132 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw); 1133 void ath9k_ps_wakeup(struct ath_softc *sc); 1134 void ath9k_ps_restore(struct ath_softc *sc); 1135 1136 #ifdef CONFIG_ATH9K_PCI 1137 int ath_pci_init(void); 1138 void ath_pci_exit(void); 1139 #else 1140 static inline int ath_pci_init(void) { return 0; }; 1141 static inline void ath_pci_exit(void) {}; 1142 #endif 1143 1144 #ifdef CONFIG_ATH9K_AHB 1145 int ath_ahb_init(void); 1146 void ath_ahb_exit(void); 1147 #else 1148 static inline int ath_ahb_init(void) { return 0; }; 1149 static inline void ath_ahb_exit(void) {}; 1150 #endif 1151 1152 #endif /* ATH9K_H */ 1153