1 /* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef ATH9K_H 18 #define ATH9K_H 19 20 #include <linux/etherdevice.h> 21 #include <linux/device.h> 22 #include <linux/interrupt.h> 23 #include <linux/leds.h> 24 #include <linux/completion.h> 25 26 #include "debug.h" 27 #include "common.h" 28 #include "mci.h" 29 #include "dfs.h" 30 31 /* 32 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver 33 * should rely on this file or its contents. 34 */ 35 36 struct ath_node; 37 38 /* Macro to expand scalars to 64-bit objects */ 39 40 #define ito64(x) (sizeof(x) == 1) ? \ 41 (((unsigned long long int)(x)) & (0xff)) : \ 42 (sizeof(x) == 2) ? \ 43 (((unsigned long long int)(x)) & 0xffff) : \ 44 ((sizeof(x) == 4) ? \ 45 (((unsigned long long int)(x)) & 0xffffffff) : \ 46 (unsigned long long int)(x)) 47 48 /* increment with wrap-around */ 49 #define INCR(_l, _sz) do { \ 50 (_l)++; \ 51 (_l) &= ((_sz) - 1); \ 52 } while (0) 53 54 /* decrement with wrap-around */ 55 #define DECR(_l, _sz) do { \ 56 (_l)--; \ 57 (_l) &= ((_sz) - 1); \ 58 } while (0) 59 60 #define TSF_TO_TU(_h,_l) \ 61 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) 62 63 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) 64 65 struct ath_config { 66 u16 txpowlimit; 67 u8 cabqReadytime; 68 }; 69 70 /*************************/ 71 /* Descriptor Management */ 72 /*************************/ 73 74 #define ATH_TXBUF_RESET(_bf) do { \ 75 (_bf)->bf_lastbf = NULL; \ 76 (_bf)->bf_next = NULL; \ 77 memset(&((_bf)->bf_state), 0, \ 78 sizeof(struct ath_buf_state)); \ 79 } while (0) 80 81 /** 82 * enum buffer_type - Buffer type flags 83 * 84 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) 85 * @BUF_AGGR: Indicates whether the buffer can be aggregated 86 * (used in aggregation scheduling) 87 */ 88 enum buffer_type { 89 BUF_AMPDU = BIT(0), 90 BUF_AGGR = BIT(1), 91 }; 92 93 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) 94 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) 95 96 #define ATH_TXSTATUS_RING_SIZE 512 97 98 #define DS2PHYS(_dd, _ds) \ 99 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 100 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0) 101 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096) 102 103 struct ath_descdma { 104 void *dd_desc; 105 dma_addr_t dd_desc_paddr; 106 u32 dd_desc_len; 107 }; 108 109 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, 110 struct list_head *head, const char *name, 111 int nbuf, int ndesc, bool is_tx); 112 113 /***********/ 114 /* RX / TX */ 115 /***********/ 116 117 #define ATH_RXBUF 512 118 #define ATH_TXBUF 512 119 #define ATH_TXBUF_RESERVE 5 120 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE) 121 #define ATH_TXMAXTRY 13 122 123 #define TID_TO_WME_AC(_tid) \ 124 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \ 125 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \ 126 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \ 127 IEEE80211_AC_VO) 128 129 #define ATH_AGGR_DELIM_SZ 4 130 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ 131 /* number of delimiters for encryption padding */ 132 #define ATH_AGGR_ENCRYPTDELIM 10 133 /* minimum h/w qdepth to be sustained to maximize aggregation */ 134 #define ATH_AGGR_MIN_QDEPTH 2 135 /* minimum h/w qdepth for non-aggregated traffic */ 136 #define ATH_NON_AGGR_MIN_QDEPTH 8 137 138 #define IEEE80211_SEQ_SEQ_SHIFT 4 139 #define IEEE80211_SEQ_MAX 4096 140 #define IEEE80211_WEP_IVLEN 3 141 #define IEEE80211_WEP_KIDLEN 1 142 #define IEEE80211_WEP_CRCLEN 4 143 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \ 144 (IEEE80211_WEP_IVLEN + \ 145 IEEE80211_WEP_KIDLEN + \ 146 IEEE80211_WEP_CRCLEN)) 147 148 /* return whether a bit at index _n in bitmap _bm is set 149 * _sz is the size of the bitmap */ 150 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \ 151 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31)))) 152 153 /* return block-ack bitmap index given sequence and starting sequence */ 154 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1)) 155 156 /* return the seqno for _start + _offset */ 157 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1)) 158 159 /* returns delimiter padding required given the packet length */ 160 #define ATH_AGGR_GET_NDELIM(_len) \ 161 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \ 162 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ)) 163 164 #define BAW_WITHIN(_start, _bawsz, _seqno) \ 165 ((((_seqno) - (_start)) & 4095) < (_bawsz)) 166 167 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)]) 168 169 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e)) 170 171 #define ATH_TX_COMPLETE_POLL_INT 1000 172 173 #define ATH_TXFIFO_DEPTH 8 174 struct ath_txq { 175 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */ 176 u32 axq_qnum; /* ath9k hardware queue number */ 177 void *axq_link; 178 struct list_head axq_q; 179 spinlock_t axq_lock; 180 u32 axq_depth; 181 u32 axq_ampdu_depth; 182 bool stopped; 183 bool axq_tx_inprogress; 184 struct list_head axq_acq; 185 struct list_head txq_fifo[ATH_TXFIFO_DEPTH]; 186 u8 txq_headidx; 187 u8 txq_tailidx; 188 int pending_frames; 189 struct sk_buff_head complete_q; 190 }; 191 192 struct ath_atx_ac { 193 struct ath_txq *txq; 194 struct list_head list; 195 struct list_head tid_q; 196 bool clear_ps_filter; 197 bool sched; 198 }; 199 200 struct ath_frame_info { 201 struct ath_buf *bf; 202 int framelen; 203 enum ath9k_key_type keytype; 204 u8 keyix; 205 u8 rtscts_rate; 206 u8 retries : 7; 207 u8 baw_tracked : 1; 208 }; 209 210 struct ath_buf_state { 211 u8 bf_type; 212 u8 bfs_paprd; 213 u8 ndelim; 214 bool stale; 215 u16 seqno; 216 unsigned long bfs_paprd_timestamp; 217 }; 218 219 struct ath_buf { 220 struct list_head list; 221 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or 222 an aggregate) */ 223 struct ath_buf *bf_next; /* next subframe in the aggregate */ 224 struct sk_buff *bf_mpdu; /* enclosing frame structure */ 225 void *bf_desc; /* virtual addr of desc */ 226 dma_addr_t bf_daddr; /* physical addr of desc */ 227 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */ 228 struct ieee80211_tx_rate rates[4]; 229 struct ath_buf_state bf_state; 230 }; 231 232 struct ath_atx_tid { 233 struct list_head list; 234 struct sk_buff_head buf_q; 235 struct sk_buff_head retry_q; 236 struct ath_node *an; 237 struct ath_atx_ac *ac; 238 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)]; 239 u16 seq_start; 240 u16 seq_next; 241 u16 baw_size; 242 u8 tidno; 243 int baw_head; /* first un-acked tx buffer */ 244 int baw_tail; /* next unused tx buffer slot */ 245 246 s8 bar_index; 247 bool sched; 248 bool paused; 249 bool active; 250 }; 251 252 struct ath_node { 253 struct ath_softc *sc; 254 struct ieee80211_sta *sta; /* station struct we're part of */ 255 struct ieee80211_vif *vif; /* interface with which we're associated */ 256 struct ath_atx_tid tid[IEEE80211_NUM_TIDS]; 257 struct ath_atx_ac ac[IEEE80211_NUM_ACS]; 258 259 u16 maxampdu; 260 u8 mpdudensity; 261 s8 ps_key; 262 263 bool sleeping; 264 bool no_ps_filter; 265 }; 266 267 struct ath_tx_control { 268 struct ath_txq *txq; 269 struct ath_node *an; 270 u8 paprd; 271 struct ieee80211_sta *sta; 272 }; 273 274 #define ATH_TX_ERROR 0x01 275 276 /** 277 * @txq_map: Index is mac80211 queue number. This is 278 * not necessarily the same as the hardware queue number 279 * (axq_qnum). 280 */ 281 struct ath_tx { 282 u16 seq_no; 283 u32 txqsetup; 284 spinlock_t txbuflock; 285 struct list_head txbuf; 286 struct ath_txq txq[ATH9K_NUM_TX_QUEUES]; 287 struct ath_descdma txdma; 288 struct ath_txq *txq_map[IEEE80211_NUM_ACS]; 289 struct ath_txq *uapsdq; 290 u32 txq_max_pending[IEEE80211_NUM_ACS]; 291 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32]; 292 }; 293 294 struct ath_rx_edma { 295 struct sk_buff_head rx_fifo; 296 u32 rx_fifo_hwsize; 297 }; 298 299 struct ath_rx { 300 u8 defant; 301 u8 rxotherant; 302 bool discard_next; 303 u32 *rxlink; 304 u32 num_pkts; 305 unsigned int rxfilter; 306 struct list_head rxbuf; 307 struct ath_descdma rxdma; 308 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX]; 309 310 struct ath_buf *buf_hold; 311 struct sk_buff *frag; 312 313 u32 ampdu_ref; 314 }; 315 316 int ath_startrecv(struct ath_softc *sc); 317 bool ath_stoprecv(struct ath_softc *sc); 318 u32 ath_calcrxfilter(struct ath_softc *sc); 319 int ath_rx_init(struct ath_softc *sc, int nbufs); 320 void ath_rx_cleanup(struct ath_softc *sc); 321 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp); 322 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype); 323 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq); 324 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq); 325 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq); 326 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); 327 bool ath_drain_all_txq(struct ath_softc *sc); 328 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq); 329 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an); 330 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an); 331 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); 332 int ath_tx_init(struct ath_softc *sc, int nbufs); 333 int ath_txq_update(struct ath_softc *sc, int qnum, 334 struct ath9k_tx_queue_info *q); 335 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop); 336 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, 337 struct ath_tx_control *txctl); 338 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 339 struct sk_buff *skb); 340 void ath_tx_tasklet(struct ath_softc *sc); 341 void ath_tx_edma_tasklet(struct ath_softc *sc); 342 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, 343 u16 tid, u16 *ssn); 344 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 345 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 346 347 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an); 348 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc, 349 struct ath_node *an); 350 void ath9k_release_buffered_frames(struct ieee80211_hw *hw, 351 struct ieee80211_sta *sta, 352 u16 tids, int nframes, 353 enum ieee80211_frame_release_type reason, 354 bool more_data); 355 356 /********/ 357 /* VIFs */ 358 /********/ 359 360 struct ath_vif { 361 struct ath_node mcast_node; 362 int av_bslot; 363 bool primary_sta_vif; 364 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */ 365 struct ath_buf *av_bcbuf; 366 }; 367 368 /*******************/ 369 /* Beacon Handling */ 370 /*******************/ 371 372 /* 373 * Regardless of the number of beacons we stagger, (i.e. regardless of the 374 * number of BSSIDs) if a given beacon does not go out even after waiting this 375 * number of beacon intervals, the game's up. 376 */ 377 #define BSTUCK_THRESH 9 378 #define ATH_BCBUF 8 379 #define ATH_DEFAULT_BINTVAL 100 /* TU */ 380 #define ATH_DEFAULT_BMISS_LIMIT 10 381 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024) 382 383 struct ath_beacon_config { 384 int beacon_interval; 385 u16 listen_interval; 386 u16 dtim_period; 387 u16 bmiss_timeout; 388 u8 dtim_count; 389 bool enable_beacon; 390 bool ibss_creator; 391 }; 392 393 struct ath_beacon { 394 enum { 395 OK, /* no change needed */ 396 UPDATE, /* update pending */ 397 COMMIT /* beacon sent, commit change */ 398 } updateslot; /* slot time update fsm */ 399 400 u32 beaconq; 401 u32 bmisscnt; 402 u32 bc_tstamp; 403 struct ieee80211_vif *bslot[ATH_BCBUF]; 404 int slottime; 405 int slotupdate; 406 struct ath9k_tx_queue_info beacon_qi; 407 struct ath_descdma bdma; 408 struct ath_txq *cabq; 409 struct list_head bbuf; 410 411 bool tx_processed; 412 bool tx_last; 413 }; 414 415 void ath9k_beacon_tasklet(unsigned long data); 416 bool ath9k_allow_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif); 417 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif, 418 u32 changed); 419 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 420 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 421 void ath9k_set_tsfadjust(struct ath_softc *sc, struct ieee80211_vif *vif); 422 void ath9k_set_beacon(struct ath_softc *sc); 423 bool ath9k_csa_is_finished(struct ath_softc *sc); 424 425 /*******************/ 426 /* Link Monitoring */ 427 /*******************/ 428 429 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */ 430 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */ 431 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */ 432 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */ 433 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */ 434 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ 435 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ 436 #define ATH_ANI_MAX_SKIP_COUNT 10 437 438 #define ATH_PAPRD_TIMEOUT 100 /* msecs */ 439 #define ATH_PLL_WORK_INTERVAL 100 440 441 void ath_tx_complete_poll_work(struct work_struct *work); 442 void ath_reset_work(struct work_struct *work); 443 void ath_hw_check(struct work_struct *work); 444 void ath_hw_pll_work(struct work_struct *work); 445 void ath_rx_poll(unsigned long data); 446 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon); 447 void ath_paprd_calibrate(struct work_struct *work); 448 void ath_ani_calibrate(unsigned long data); 449 void ath_start_ani(struct ath_softc *sc); 450 void ath_stop_ani(struct ath_softc *sc); 451 void ath_check_ani(struct ath_softc *sc); 452 int ath_update_survey_stats(struct ath_softc *sc); 453 void ath_update_survey_nf(struct ath_softc *sc, int channel); 454 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type); 455 456 /**********/ 457 /* BTCOEX */ 458 /**********/ 459 460 #define ATH_DUMP_BTCOEX(_s, _val) \ 461 do { \ 462 len += snprintf(buf + len, size - len, \ 463 "%20s : %10d\n", _s, (_val)); \ 464 } while (0) 465 466 enum bt_op_flags { 467 BT_OP_PRIORITY_DETECTED, 468 BT_OP_SCAN, 469 }; 470 471 struct ath_btcoex { 472 bool hw_timer_enabled; 473 spinlock_t btcoex_lock; 474 struct timer_list period_timer; /* Timer for BT period */ 475 u32 bt_priority_cnt; 476 unsigned long bt_priority_time; 477 unsigned long op_flags; 478 int bt_stomp_type; /* Types of BT stomping */ 479 u32 btcoex_no_stomp; /* in usec */ 480 u32 btcoex_period; /* in msec */ 481 u32 btscan_no_stomp; /* in usec */ 482 u32 duty_cycle; 483 u32 bt_wait_time; 484 int rssi_count; 485 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */ 486 struct ath_mci_profile mci; 487 u8 stomp_audio; 488 }; 489 490 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 491 int ath9k_init_btcoex(struct ath_softc *sc); 492 void ath9k_deinit_btcoex(struct ath_softc *sc); 493 void ath9k_start_btcoex(struct ath_softc *sc); 494 void ath9k_stop_btcoex(struct ath_softc *sc); 495 void ath9k_btcoex_timer_resume(struct ath_softc *sc); 496 void ath9k_btcoex_timer_pause(struct ath_softc *sc); 497 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status); 498 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen); 499 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc); 500 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size); 501 #else 502 static inline int ath9k_init_btcoex(struct ath_softc *sc) 503 { 504 return 0; 505 } 506 static inline void ath9k_deinit_btcoex(struct ath_softc *sc) 507 { 508 } 509 static inline void ath9k_start_btcoex(struct ath_softc *sc) 510 { 511 } 512 static inline void ath9k_stop_btcoex(struct ath_softc *sc) 513 { 514 } 515 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, 516 u32 status) 517 { 518 } 519 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, 520 u32 max_4ms_framelen) 521 { 522 return 0; 523 } 524 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc) 525 { 526 } 527 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size) 528 { 529 return 0; 530 } 531 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ 532 533 struct ath9k_wow_pattern { 534 u8 pattern_bytes[MAX_PATTERN_SIZE]; 535 u8 mask_bytes[MAX_PATTERN_SIZE]; 536 u32 pattern_len; 537 }; 538 539 /********************/ 540 /* LED Control */ 541 /********************/ 542 543 #define ATH_LED_PIN_DEF 1 544 #define ATH_LED_PIN_9287 8 545 #define ATH_LED_PIN_9300 10 546 #define ATH_LED_PIN_9485 6 547 #define ATH_LED_PIN_9462 4 548 549 #ifdef CONFIG_MAC80211_LEDS 550 void ath_init_leds(struct ath_softc *sc); 551 void ath_deinit_leds(struct ath_softc *sc); 552 void ath_fill_led_pin(struct ath_softc *sc); 553 #else 554 static inline void ath_init_leds(struct ath_softc *sc) 555 { 556 } 557 558 static inline void ath_deinit_leds(struct ath_softc *sc) 559 { 560 } 561 static inline void ath_fill_led_pin(struct ath_softc *sc) 562 { 563 } 564 #endif 565 566 /*******************************/ 567 /* Antenna diversity/combining */ 568 /*******************************/ 569 570 #define ATH_ANT_RX_CURRENT_SHIFT 4 571 #define ATH_ANT_RX_MAIN_SHIFT 2 572 #define ATH_ANT_RX_MASK 0x3 573 574 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50 575 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100 576 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200 577 #define ATH_ANT_DIV_COMB_INIT_COUNT 95 578 #define ATH_ANT_DIV_COMB_MAX_COUNT 100 579 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30 580 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20 581 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50 582 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50 583 584 #define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1 585 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4 586 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2 587 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2 588 589 struct ath_ant_comb { 590 u16 count; 591 u16 total_pkt_count; 592 bool scan; 593 bool scan_not_start; 594 int main_total_rssi; 595 int alt_total_rssi; 596 int alt_recv_cnt; 597 int main_recv_cnt; 598 int rssi_lna1; 599 int rssi_lna2; 600 int rssi_add; 601 int rssi_sub; 602 int rssi_first; 603 int rssi_second; 604 int rssi_third; 605 int ant_ratio; 606 int ant_ratio2; 607 bool alt_good; 608 int quick_scan_cnt; 609 enum ath9k_ant_div_comb_lna_conf main_conf; 610 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf; 611 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf; 612 bool first_ratio; 613 bool second_ratio; 614 unsigned long scan_start_time; 615 616 /* 617 * Card-specific config values. 618 */ 619 int low_rssi_thresh; 620 int fast_div_bias; 621 }; 622 623 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs); 624 625 /********************/ 626 /* Main driver core */ 627 /********************/ 628 629 #define ATH9K_PCI_CUS198 0x0001 630 #define ATH9K_PCI_CUS230 0x0002 631 #define ATH9K_PCI_CUS217 0x0004 632 #define ATH9K_PCI_WOW 0x0008 633 #define ATH9K_PCI_BT_ANT_DIV 0x0010 634 #define ATH9K_PCI_D3_L1_WAR 0x0020 635 636 /* 637 * Default cache line size, in bytes. 638 * Used when PCI device not fully initialized by bootrom/BIOS 639 */ 640 #define DEFAULT_CACHELINE 32 641 #define ATH_REGCLASSIDS_MAX 10 642 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ 643 #define ATH_MAX_SW_RETRIES 30 644 #define ATH_CHAN_MAX 255 645 646 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */ 647 #define ATH_RATE_DUMMY_MARKER 0 648 649 enum sc_op_flags { 650 SC_OP_INVALID, 651 SC_OP_BEACONS, 652 SC_OP_ANI_RUN, 653 SC_OP_PRIM_STA_VIF, 654 SC_OP_HW_RESET, 655 SC_OP_SCANNING, 656 }; 657 658 /* Powersave flags */ 659 #define PS_WAIT_FOR_BEACON BIT(0) 660 #define PS_WAIT_FOR_CAB BIT(1) 661 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2) 662 #define PS_WAIT_FOR_TX_ACK BIT(3) 663 #define PS_BEACON_SYNC BIT(4) 664 #define PS_WAIT_FOR_ANI BIT(5) 665 666 struct ath_rate_table; 667 668 struct ath9k_vif_iter_data { 669 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */ 670 u8 mask[ETH_ALEN]; /* bssid mask */ 671 bool has_hw_macaddr; 672 673 int naps; /* number of AP vifs */ 674 int nmeshes; /* number of mesh vifs */ 675 int nstations; /* number of station vifs */ 676 int nwds; /* number of WDS vifs */ 677 int nadhocs; /* number of adhoc vifs */ 678 }; 679 680 /* enum spectral_mode: 681 * 682 * @SPECTRAL_DISABLED: spectral mode is disabled 683 * @SPECTRAL_BACKGROUND: hardware sends samples when it is not busy with 684 * something else. 685 * @SPECTRAL_MANUAL: spectral scan is enabled, triggering for samples 686 * is performed manually. 687 * @SPECTRAL_CHANSCAN: Like manual, but also triggered when changing channels 688 * during a channel scan. 689 */ 690 enum spectral_mode { 691 SPECTRAL_DISABLED = 0, 692 SPECTRAL_BACKGROUND, 693 SPECTRAL_MANUAL, 694 SPECTRAL_CHANSCAN, 695 }; 696 697 struct ath_softc { 698 struct ieee80211_hw *hw; 699 struct device *dev; 700 701 struct survey_info *cur_survey; 702 struct survey_info survey[ATH9K_NUM_CHANNELS]; 703 704 struct tasklet_struct intr_tq; 705 struct tasklet_struct bcon_tasklet; 706 struct ath_hw *sc_ah; 707 void __iomem *mem; 708 int irq; 709 spinlock_t sc_serial_rw; 710 spinlock_t sc_pm_lock; 711 spinlock_t sc_pcu_lock; 712 struct mutex mutex; 713 struct work_struct paprd_work; 714 struct work_struct hw_check_work; 715 struct work_struct hw_reset_work; 716 struct completion paprd_complete; 717 718 unsigned int hw_busy_count; 719 unsigned long sc_flags; 720 unsigned long driver_data; 721 722 u32 intrstatus; 723 u16 ps_flags; /* PS_* */ 724 u16 curtxpow; 725 bool ps_enabled; 726 bool ps_idle; 727 short nbcnvifs; 728 short nvifs; 729 unsigned long ps_usecount; 730 731 struct ath_config config; 732 struct ath_rx rx; 733 struct ath_tx tx; 734 struct ath_beacon beacon; 735 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 736 737 #ifdef CONFIG_MAC80211_LEDS 738 bool led_registered; 739 char led_name[32]; 740 struct led_classdev led_cdev; 741 #endif 742 743 struct ath9k_hw_cal_data caldata; 744 int last_rssi; 745 746 #ifdef CONFIG_ATH9K_DEBUGFS 747 struct ath9k_debug debug; 748 #endif 749 struct ath_beacon_config cur_beacon_conf; 750 struct delayed_work tx_complete_work; 751 struct delayed_work hw_pll_work; 752 struct timer_list rx_poll_timer; 753 754 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 755 struct ath_btcoex btcoex; 756 struct ath_mci_coex mci_coex; 757 struct work_struct mci_work; 758 #endif 759 760 struct ath_descdma txsdma; 761 struct ieee80211_vif *csa_vif; 762 763 struct ath_ant_comb ant_comb; 764 u8 ant_tx, ant_rx; 765 struct dfs_pattern_detector *dfs_detector; 766 u32 wow_enabled; 767 /* relay(fs) channel for spectral scan */ 768 struct rchan *rfs_chan_spec_scan; 769 enum spectral_mode spectral_mode; 770 struct ath_spec_scan spec_config; 771 772 #ifdef CONFIG_PM_SLEEP 773 atomic_t wow_got_bmiss_intr; 774 atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */ 775 u32 wow_intr_before_sleep; 776 #endif 777 }; 778 779 #define SPECTRAL_SCAN_BITMASK 0x10 780 /* Radar info packet format, used for DFS and spectral formats. */ 781 struct ath_radar_info { 782 u8 pulse_length_pri; 783 u8 pulse_length_ext; 784 u8 pulse_bw_info; 785 } __packed; 786 787 /* The HT20 spectral data has 4 bytes of additional information at it's end. 788 * 789 * [7:0]: all bins {max_magnitude[1:0], bitmap_weight[5:0]} 790 * [7:0]: all bins max_magnitude[9:2] 791 * [7:0]: all bins {max_index[5:0], max_magnitude[11:10]} 792 * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned) 793 */ 794 struct ath_ht20_mag_info { 795 u8 all_bins[3]; 796 u8 max_exp; 797 } __packed; 798 799 #define SPECTRAL_HT20_NUM_BINS 56 800 801 /* WARNING: don't actually use this struct! MAC may vary the amount of 802 * data by -1/+2. This struct is for reference only. 803 */ 804 struct ath_ht20_fft_packet { 805 u8 data[SPECTRAL_HT20_NUM_BINS]; 806 struct ath_ht20_mag_info mag_info; 807 struct ath_radar_info radar_info; 808 } __packed; 809 810 #define SPECTRAL_HT20_TOTAL_DATA_LEN (sizeof(struct ath_ht20_fft_packet)) 811 812 /* Dynamic 20/40 mode: 813 * 814 * [7:0]: lower bins {max_magnitude[1:0], bitmap_weight[5:0]} 815 * [7:0]: lower bins max_magnitude[9:2] 816 * [7:0]: lower bins {max_index[5:0], max_magnitude[11:10]} 817 * [7:0]: upper bins {max_magnitude[1:0], bitmap_weight[5:0]} 818 * [7:0]: upper bins max_magnitude[9:2] 819 * [7:0]: upper bins {max_index[5:0], max_magnitude[11:10]} 820 * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned) 821 */ 822 struct ath_ht20_40_mag_info { 823 u8 lower_bins[3]; 824 u8 upper_bins[3]; 825 u8 max_exp; 826 } __packed; 827 828 #define SPECTRAL_HT20_40_NUM_BINS 128 829 830 /* WARNING: don't actually use this struct! MAC may vary the amount of 831 * data. This struct is for reference only. 832 */ 833 struct ath_ht20_40_fft_packet { 834 u8 data[SPECTRAL_HT20_40_NUM_BINS]; 835 struct ath_ht20_40_mag_info mag_info; 836 struct ath_radar_info radar_info; 837 } __packed; 838 839 840 #define SPECTRAL_HT20_40_TOTAL_DATA_LEN (sizeof(struct ath_ht20_40_fft_packet)) 841 842 /* grabs the max magnitude from the all/upper/lower bins */ 843 static inline u16 spectral_max_magnitude(u8 *bins) 844 { 845 return (bins[0] & 0xc0) >> 6 | 846 (bins[1] & 0xff) << 2 | 847 (bins[2] & 0x03) << 10; 848 } 849 850 /* return the max magnitude from the all/upper/lower bins */ 851 static inline u8 spectral_max_index(u8 *bins) 852 { 853 s8 m = (bins[2] & 0xfc) >> 2; 854 855 /* TODO: this still doesn't always report the right values ... */ 856 if (m > 32) 857 m |= 0xe0; 858 else 859 m &= ~0xe0; 860 861 return m + 29; 862 } 863 864 /* return the bitmap weight from the all/upper/lower bins */ 865 static inline u8 spectral_bitmap_weight(u8 *bins) 866 { 867 return bins[0] & 0x3f; 868 } 869 870 /* FFT sample format given to userspace via debugfs. 871 * 872 * Please keep the type/length at the front position and change 873 * other fields after adding another sample type 874 * 875 * TODO: this might need rework when switching to nl80211-based 876 * interface. 877 */ 878 enum ath_fft_sample_type { 879 ATH_FFT_SAMPLE_HT20 = 1, 880 }; 881 882 struct fft_sample_tlv { 883 u8 type; /* see ath_fft_sample */ 884 __be16 length; 885 /* type dependent data follows */ 886 } __packed; 887 888 struct fft_sample_ht20 { 889 struct fft_sample_tlv tlv; 890 891 u8 max_exp; 892 893 __be16 freq; 894 s8 rssi; 895 s8 noise; 896 897 __be16 max_magnitude; 898 u8 max_index; 899 u8 bitmap_weight; 900 901 __be64 tsf; 902 903 u8 data[SPECTRAL_HT20_NUM_BINS]; 904 } __packed; 905 906 void ath9k_tasklet(unsigned long data); 907 int ath_cabq_update(struct ath_softc *); 908 909 static inline void ath_read_cachesize(struct ath_common *common, int *csz) 910 { 911 common->bus_ops->read_cachesize(common, csz); 912 } 913 914 extern struct ieee80211_ops ath9k_ops; 915 extern int ath9k_modparam_nohwcrypt; 916 extern int led_blink; 917 extern bool is_ath9k_unloaded; 918 919 u8 ath9k_parse_mpdudensity(u8 mpdudensity); 920 irqreturn_t ath_isr(int irq, void *dev); 921 int ath9k_init_device(u16 devid, struct ath_softc *sc, 922 const struct ath_bus_ops *bus_ops); 923 void ath9k_deinit_device(struct ath_softc *sc); 924 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw); 925 void ath9k_reload_chainmask_settings(struct ath_softc *sc); 926 927 bool ath9k_uses_beacons(int type); 928 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw); 929 int ath9k_spectral_scan_config(struct ieee80211_hw *hw, 930 enum spectral_mode spectral_mode); 931 932 933 #ifdef CONFIG_ATH9K_PCI 934 int ath_pci_init(void); 935 void ath_pci_exit(void); 936 #else 937 static inline int ath_pci_init(void) { return 0; }; 938 static inline void ath_pci_exit(void) {}; 939 #endif 940 941 #ifdef CONFIG_ATH9K_AHB 942 int ath_ahb_init(void); 943 void ath_ahb_exit(void); 944 #else 945 static inline int ath_ahb_init(void) { return 0; }; 946 static inline void ath_ahb_exit(void) {}; 947 #endif 948 949 void ath9k_ps_wakeup(struct ath_softc *sc); 950 void ath9k_ps_restore(struct ath_softc *sc); 951 952 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate); 953 954 void ath_start_rfkill_poll(struct ath_softc *sc); 955 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw); 956 void ath9k_calculate_iter_data(struct ieee80211_hw *hw, 957 struct ieee80211_vif *vif, 958 struct ath9k_vif_iter_data *iter_data); 959 960 #endif /* ATH9K_H */ 961