1 /* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef ATH9K_H 18 #define ATH9K_H 19 20 #include <linux/etherdevice.h> 21 #include <linux/device.h> 22 #include <linux/interrupt.h> 23 #include <linux/leds.h> 24 #include <linux/completion.h> 25 #include <linux/time.h> 26 #include <linux/hw_random.h> 27 28 #include "common.h" 29 #include "debug.h" 30 #include "mci.h" 31 #include "dfs.h" 32 33 struct ath_node; 34 struct ath_vif; 35 36 extern struct ieee80211_ops ath9k_ops; 37 extern int ath9k_modparam_nohwcrypt; 38 extern int ath9k_led_blink; 39 extern bool is_ath9k_unloaded; 40 extern int ath9k_use_chanctx; 41 42 /*************************/ 43 /* Descriptor Management */ 44 /*************************/ 45 46 #define ATH_TXSTATUS_RING_SIZE 512 47 48 /* Macro to expand scalars to 64-bit objects */ 49 #define ito64(x) (sizeof(x) == 1) ? \ 50 (((unsigned long long int)(x)) & (0xff)) : \ 51 (sizeof(x) == 2) ? \ 52 (((unsigned long long int)(x)) & 0xffff) : \ 53 ((sizeof(x) == 4) ? \ 54 (((unsigned long long int)(x)) & 0xffffffff) : \ 55 (unsigned long long int)(x)) 56 57 #define ATH_TXBUF_RESET(_bf) do { \ 58 (_bf)->bf_lastbf = NULL; \ 59 (_bf)->bf_next = NULL; \ 60 memset(&((_bf)->bf_state), 0, \ 61 sizeof(struct ath_buf_state)); \ 62 } while (0) 63 64 #define DS2PHYS(_dd, _ds) \ 65 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 66 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0) 67 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096) 68 69 struct ath_descdma { 70 void *dd_desc; 71 dma_addr_t dd_desc_paddr; 72 u32 dd_desc_len; 73 }; 74 75 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, 76 struct list_head *head, const char *name, 77 int nbuf, int ndesc, bool is_tx); 78 79 /***********/ 80 /* RX / TX */ 81 /***********/ 82 83 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) 84 85 /* increment with wrap-around */ 86 #define INCR(_l, _sz) do { \ 87 (_l)++; \ 88 (_l) &= ((_sz) - 1); \ 89 } while (0) 90 91 #define ATH_RXBUF 512 92 #define ATH_TXBUF 512 93 #define ATH_TXBUF_RESERVE 5 94 #define ATH_TXMAXTRY 13 95 #define ATH_MAX_SW_RETRIES 30 96 97 #define TID_TO_WME_AC(_tid) \ 98 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \ 99 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \ 100 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \ 101 IEEE80211_AC_VO) 102 103 #define ATH_AGGR_DELIM_SZ 4 104 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ 105 /* number of delimiters for encryption padding */ 106 #define ATH_AGGR_ENCRYPTDELIM 10 107 /* minimum h/w qdepth to be sustained to maximize aggregation */ 108 #define ATH_AGGR_MIN_QDEPTH 2 109 /* minimum h/w qdepth for non-aggregated traffic */ 110 #define ATH_NON_AGGR_MIN_QDEPTH 8 111 #define ATH_TX_COMPLETE_POLL_INT 1000 112 #define ATH_TXFIFO_DEPTH 8 113 #define ATH_TX_ERROR 0x01 114 115 /* Stop tx traffic 1ms before the GO goes away */ 116 #define ATH_P2P_PS_STOP_TIME 1000 117 118 #define IEEE80211_SEQ_SEQ_SHIFT 4 119 #define IEEE80211_SEQ_MAX 4096 120 #define IEEE80211_WEP_IVLEN 3 121 #define IEEE80211_WEP_KIDLEN 1 122 #define IEEE80211_WEP_CRCLEN 4 123 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \ 124 (IEEE80211_WEP_IVLEN + \ 125 IEEE80211_WEP_KIDLEN + \ 126 IEEE80211_WEP_CRCLEN)) 127 128 /* return whether a bit at index _n in bitmap _bm is set 129 * _sz is the size of the bitmap */ 130 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \ 131 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31)))) 132 133 /* return block-ack bitmap index given sequence and starting sequence */ 134 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1)) 135 136 /* return the seqno for _start + _offset */ 137 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1)) 138 139 /* returns delimiter padding required given the packet length */ 140 #define ATH_AGGR_GET_NDELIM(_len) \ 141 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \ 142 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ)) 143 144 #define BAW_WITHIN(_start, _bawsz, _seqno) \ 145 ((((_seqno) - (_start)) & 4095) < (_bawsz)) 146 147 #define ATH_AN_2_TID(_an, _tidno) ath_node_to_tid(_an, _tidno) 148 149 #define IS_HT_RATE(rate) (rate & 0x80) 150 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e)) 151 #define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf)) 152 153 enum { 154 WLAN_RC_PHY_OFDM, 155 WLAN_RC_PHY_CCK, 156 }; 157 158 struct ath_txq { 159 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */ 160 u32 axq_qnum; /* ath9k hardware queue number */ 161 void *axq_link; 162 struct list_head axq_q; 163 spinlock_t axq_lock; 164 u32 axq_depth; 165 u32 axq_ampdu_depth; 166 bool axq_tx_inprogress; 167 struct list_head txq_fifo[ATH_TXFIFO_DEPTH]; 168 u8 txq_headidx; 169 u8 txq_tailidx; 170 int pending_frames; 171 struct sk_buff_head complete_q; 172 }; 173 174 struct ath_frame_info { 175 struct ath_buf *bf; 176 u16 framelen; 177 s8 txq; 178 u8 keyix; 179 u8 rtscts_rate; 180 u8 retries : 7; 181 u8 baw_tracked : 1; 182 u8 tx_power; 183 enum ath9k_key_type keytype:2; 184 }; 185 186 struct ath_rxbuf { 187 struct list_head list; 188 struct sk_buff *bf_mpdu; 189 void *bf_desc; 190 dma_addr_t bf_daddr; 191 dma_addr_t bf_buf_addr; 192 }; 193 194 /** 195 * enum buffer_type - Buffer type flags 196 * 197 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) 198 * @BUF_AGGR: Indicates whether the buffer can be aggregated 199 * (used in aggregation scheduling) 200 */ 201 enum buffer_type { 202 BUF_AMPDU = BIT(0), 203 BUF_AGGR = BIT(1), 204 }; 205 206 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) 207 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) 208 209 struct ath_buf_state { 210 u8 bf_type; 211 u8 bfs_paprd; 212 u8 ndelim; 213 bool stale; 214 u16 seqno; 215 unsigned long bfs_paprd_timestamp; 216 }; 217 218 struct ath_buf { 219 struct list_head list; 220 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or 221 an aggregate) */ 222 struct ath_buf *bf_next; /* next subframe in the aggregate */ 223 struct sk_buff *bf_mpdu; /* enclosing frame structure */ 224 void *bf_desc; /* virtual addr of desc */ 225 dma_addr_t bf_daddr; /* physical addr of desc */ 226 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */ 227 struct ieee80211_tx_rate rates[4]; 228 struct ath_buf_state bf_state; 229 }; 230 231 struct ath_atx_tid { 232 struct list_head list; 233 struct sk_buff_head retry_q; 234 struct ath_node *an; 235 struct ath_txq *txq; 236 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)]; 237 u16 seq_start; 238 u16 seq_next; 239 u16 baw_size; 240 u8 tidno; 241 int baw_head; /* first un-acked tx buffer */ 242 int baw_tail; /* next unused tx buffer slot */ 243 244 s8 bar_index; 245 bool active; 246 bool clear_ps_filter; 247 bool has_queued; 248 }; 249 250 struct ath_node { 251 struct ath_softc *sc; 252 struct ieee80211_sta *sta; /* station struct we're part of */ 253 struct ieee80211_vif *vif; /* interface with which we're associated */ 254 255 u16 maxampdu; 256 u8 mpdudensity; 257 s8 ps_key; 258 259 bool sleeping; 260 bool no_ps_filter; 261 262 #ifdef CONFIG_ATH9K_STATION_STATISTICS 263 struct ath_rx_rate_stats rx_rate_stats; 264 #endif 265 u8 key_idx[4]; 266 267 u32 ackto; 268 struct list_head list; 269 }; 270 271 struct ath_tx_control { 272 struct ath_txq *txq; 273 struct ath_node *an; 274 struct ieee80211_sta *sta; 275 u8 paprd; 276 }; 277 278 279 /** 280 * @txq_map: Index is mac80211 queue number. This is 281 * not necessarily the same as the hardware queue number 282 * (axq_qnum). 283 */ 284 struct ath_tx { 285 u32 txqsetup; 286 spinlock_t txbuflock; 287 struct list_head txbuf; 288 struct ath_txq txq[ATH9K_NUM_TX_QUEUES]; 289 struct ath_descdma txdma; 290 struct ath_txq *txq_map[IEEE80211_NUM_ACS]; 291 struct ath_txq *uapsdq; 292 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32]; 293 }; 294 295 struct ath_rx_edma { 296 struct sk_buff_head rx_fifo; 297 u32 rx_fifo_hwsize; 298 }; 299 300 struct ath_rx { 301 u8 defant; 302 u8 rxotherant; 303 bool discard_next; 304 u32 *rxlink; 305 u32 num_pkts; 306 struct list_head rxbuf; 307 struct ath_descdma rxdma; 308 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX]; 309 310 struct ath_rxbuf *buf_hold; 311 struct sk_buff *frag; 312 313 u32 ampdu_ref; 314 }; 315 316 /*******************/ 317 /* Channel Context */ 318 /*******************/ 319 320 struct ath_chanctx { 321 struct cfg80211_chan_def chandef; 322 struct list_head vifs; 323 struct list_head acq[IEEE80211_NUM_ACS]; 324 int hw_queue_base; 325 326 /* do not dereference, use for comparison only */ 327 struct ieee80211_vif *primary_sta; 328 329 struct ath_beacon_config beacon; 330 struct ath9k_hw_cal_data caldata; 331 struct timespec tsf_ts; 332 u64 tsf_val; 333 u32 last_beacon; 334 335 int flush_timeout; 336 u16 txpower; 337 u16 cur_txpower; 338 bool offchannel; 339 bool stopped; 340 bool active; 341 bool assigned; 342 bool switch_after_beacon; 343 344 short nvifs; 345 short nvifs_assigned; 346 unsigned int rxfilter; 347 }; 348 349 enum ath_chanctx_event { 350 ATH_CHANCTX_EVENT_BEACON_PREPARE, 351 ATH_CHANCTX_EVENT_BEACON_SENT, 352 ATH_CHANCTX_EVENT_TSF_TIMER, 353 ATH_CHANCTX_EVENT_BEACON_RECEIVED, 354 ATH_CHANCTX_EVENT_AUTHORIZED, 355 ATH_CHANCTX_EVENT_SWITCH, 356 ATH_CHANCTX_EVENT_ASSIGN, 357 ATH_CHANCTX_EVENT_UNASSIGN, 358 ATH_CHANCTX_EVENT_CHANGE, 359 ATH_CHANCTX_EVENT_ENABLE_MULTICHANNEL, 360 }; 361 362 enum ath_chanctx_state { 363 ATH_CHANCTX_STATE_IDLE, 364 ATH_CHANCTX_STATE_WAIT_FOR_BEACON, 365 ATH_CHANCTX_STATE_WAIT_FOR_TIMER, 366 ATH_CHANCTX_STATE_SWITCH, 367 ATH_CHANCTX_STATE_FORCE_ACTIVE, 368 }; 369 370 struct ath_chanctx_sched { 371 bool beacon_pending; 372 bool beacon_adjust; 373 bool offchannel_pending; 374 bool wait_switch; 375 bool force_noa_update; 376 bool extend_absence; 377 bool mgd_prepare_tx; 378 enum ath_chanctx_state state; 379 u8 beacon_miss; 380 381 u32 next_tbtt; 382 u32 switch_start_time; 383 unsigned int offchannel_duration; 384 unsigned int channel_switch_time; 385 386 /* backup, in case the hardware timer fails */ 387 struct timer_list timer; 388 }; 389 390 enum ath_offchannel_state { 391 ATH_OFFCHANNEL_IDLE, 392 ATH_OFFCHANNEL_PROBE_SEND, 393 ATH_OFFCHANNEL_PROBE_WAIT, 394 ATH_OFFCHANNEL_SUSPEND, 395 ATH_OFFCHANNEL_ROC_START, 396 ATH_OFFCHANNEL_ROC_WAIT, 397 ATH_OFFCHANNEL_ROC_DONE, 398 }; 399 400 enum ath_roc_complete_reason { 401 ATH_ROC_COMPLETE_EXPIRE, 402 ATH_ROC_COMPLETE_ABORT, 403 ATH_ROC_COMPLETE_CANCEL, 404 }; 405 406 struct ath_offchannel { 407 struct ath_chanctx chan; 408 struct timer_list timer; 409 struct cfg80211_scan_request *scan_req; 410 struct ieee80211_vif *scan_vif; 411 int scan_idx; 412 enum ath_offchannel_state state; 413 struct ieee80211_channel *roc_chan; 414 struct ieee80211_vif *roc_vif; 415 int roc_duration; 416 int duration; 417 }; 418 419 static inline struct ath_atx_tid * 420 ath_node_to_tid(struct ath_node *an, u8 tidno) 421 { 422 struct ieee80211_sta *sta = an->sta; 423 struct ieee80211_vif *vif = an->vif; 424 struct ieee80211_txq *txq; 425 426 BUG_ON(!vif); 427 if (sta) 428 txq = sta->txq[tidno % ARRAY_SIZE(sta->txq)]; 429 else 430 txq = vif->txq; 431 432 return (struct ath_atx_tid *) txq->drv_priv; 433 } 434 435 #define case_rtn_string(val) case val: return #val 436 437 #define ath_for_each_chanctx(_sc, _ctx) \ 438 for (ctx = &sc->chanctx[0]; \ 439 ctx <= &sc->chanctx[ARRAY_SIZE(sc->chanctx) - 1]; \ 440 ctx++) 441 442 void ath_chanctx_init(struct ath_softc *sc); 443 void ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx, 444 struct cfg80211_chan_def *chandef); 445 446 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT 447 448 static inline struct ath_chanctx * 449 ath_chanctx_get(struct ieee80211_chanctx_conf *ctx) 450 { 451 struct ath_chanctx **ptr = (void *) ctx->drv_priv; 452 return *ptr; 453 } 454 455 bool ath9k_is_chanctx_enabled(void); 456 void ath9k_fill_chanctx_ops(void); 457 void ath9k_init_channel_context(struct ath_softc *sc); 458 void ath9k_offchannel_init(struct ath_softc *sc); 459 void ath9k_deinit_channel_context(struct ath_softc *sc); 460 int ath9k_init_p2p(struct ath_softc *sc); 461 void ath9k_deinit_p2p(struct ath_softc *sc); 462 void ath9k_p2p_remove_vif(struct ath_softc *sc, 463 struct ieee80211_vif *vif); 464 void ath9k_p2p_beacon_sync(struct ath_softc *sc); 465 void ath9k_p2p_bss_info_changed(struct ath_softc *sc, 466 struct ieee80211_vif *vif); 467 void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp, 468 struct sk_buff *skb); 469 void ath9k_p2p_ps_timer(void *priv); 470 void ath9k_chanctx_wake_queues(struct ath_softc *sc, struct ath_chanctx *ctx); 471 void ath9k_chanctx_stop_queues(struct ath_softc *sc, struct ath_chanctx *ctx); 472 void ath_chanctx_check_active(struct ath_softc *sc, struct ath_chanctx *ctx); 473 474 void ath_chanctx_beacon_recv_ev(struct ath_softc *sc, 475 enum ath_chanctx_event ev); 476 void ath_chanctx_beacon_sent_ev(struct ath_softc *sc, 477 enum ath_chanctx_event ev); 478 void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif, 479 enum ath_chanctx_event ev); 480 void ath_chanctx_set_next(struct ath_softc *sc, bool force); 481 void ath_offchannel_next(struct ath_softc *sc); 482 void ath_scan_complete(struct ath_softc *sc, bool abort); 483 void ath_roc_complete(struct ath_softc *sc, 484 enum ath_roc_complete_reason reason); 485 struct ath_chanctx* ath_is_go_chanctx_present(struct ath_softc *sc); 486 487 #else 488 489 static inline bool ath9k_is_chanctx_enabled(void) 490 { 491 return false; 492 } 493 static inline void ath9k_fill_chanctx_ops(void) 494 { 495 } 496 static inline void ath9k_init_channel_context(struct ath_softc *sc) 497 { 498 } 499 static inline void ath9k_offchannel_init(struct ath_softc *sc) 500 { 501 } 502 static inline void ath9k_deinit_channel_context(struct ath_softc *sc) 503 { 504 } 505 static inline void ath_chanctx_beacon_recv_ev(struct ath_softc *sc, 506 enum ath_chanctx_event ev) 507 { 508 } 509 static inline void ath_chanctx_beacon_sent_ev(struct ath_softc *sc, 510 enum ath_chanctx_event ev) 511 { 512 } 513 static inline void ath_chanctx_event(struct ath_softc *sc, 514 struct ieee80211_vif *vif, 515 enum ath_chanctx_event ev) 516 { 517 } 518 static inline int ath9k_init_p2p(struct ath_softc *sc) 519 { 520 return 0; 521 } 522 static inline void ath9k_deinit_p2p(struct ath_softc *sc) 523 { 524 } 525 static inline void ath9k_p2p_remove_vif(struct ath_softc *sc, 526 struct ieee80211_vif *vif) 527 { 528 } 529 static inline void ath9k_p2p_beacon_sync(struct ath_softc *sc) 530 { 531 } 532 static inline void ath9k_p2p_bss_info_changed(struct ath_softc *sc, 533 struct ieee80211_vif *vif) 534 { 535 } 536 static inline void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp, 537 struct sk_buff *skb) 538 { 539 } 540 static inline void ath9k_p2p_ps_timer(struct ath_softc *sc) 541 { 542 } 543 static inline void ath9k_chanctx_wake_queues(struct ath_softc *sc, 544 struct ath_chanctx *ctx) 545 { 546 } 547 static inline void ath9k_chanctx_stop_queues(struct ath_softc *sc, 548 struct ath_chanctx *ctx) 549 { 550 } 551 static inline void ath_chanctx_check_active(struct ath_softc *sc, 552 struct ath_chanctx *ctx) 553 { 554 } 555 556 #endif /* CONFIG_ATH9K_CHANNEL_CONTEXT */ 557 558 void ath_startrecv(struct ath_softc *sc); 559 bool ath_stoprecv(struct ath_softc *sc); 560 u32 ath_calcrxfilter(struct ath_softc *sc); 561 int ath_rx_init(struct ath_softc *sc, int nbufs); 562 void ath_rx_cleanup(struct ath_softc *sc); 563 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp); 564 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype); 565 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq); 566 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq); 567 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq); 568 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); 569 bool ath_drain_all_txq(struct ath_softc *sc); 570 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq); 571 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an); 572 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an); 573 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); 574 void ath_txq_schedule_all(struct ath_softc *sc); 575 int ath_tx_init(struct ath_softc *sc, int nbufs); 576 int ath_txq_update(struct ath_softc *sc, int qnum, 577 struct ath9k_tx_queue_info *q); 578 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop); 579 void ath_assign_seq(struct ath_common *common, struct sk_buff *skb); 580 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, 581 struct ath_tx_control *txctl); 582 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 583 struct sk_buff *skb); 584 void ath_tx_tasklet(struct ath_softc *sc); 585 void ath_tx_edma_tasklet(struct ath_softc *sc); 586 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, 587 u16 tid, u16 *ssn); 588 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 589 590 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an); 591 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc, 592 struct ath_node *an); 593 void ath9k_release_buffered_frames(struct ieee80211_hw *hw, 594 struct ieee80211_sta *sta, 595 u16 tids, int nframes, 596 enum ieee80211_frame_release_type reason, 597 bool more_data); 598 void ath9k_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *queue); 599 600 /********/ 601 /* VIFs */ 602 /********/ 603 604 #define P2P_DEFAULT_CTWIN 10 605 606 struct ath_vif { 607 struct list_head list; 608 609 u16 seq_no; 610 611 /* BSS info */ 612 u8 bssid[ETH_ALEN] __aligned(2); 613 u16 aid; 614 bool assoc; 615 616 struct ieee80211_vif *vif; 617 struct ath_node mcast_node; 618 int av_bslot; 619 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */ 620 struct ath_buf *av_bcbuf; 621 struct ath_chanctx *chanctx; 622 623 /* P2P Client */ 624 struct ieee80211_noa_data noa; 625 626 /* P2P GO */ 627 u8 noa_index; 628 u32 offchannel_start; 629 u32 offchannel_duration; 630 631 /* These are used for both periodic and one-shot */ 632 u32 noa_start; 633 u32 noa_duration; 634 bool periodic_noa; 635 bool oneshot_noa; 636 }; 637 638 struct ath9k_vif_iter_data { 639 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */ 640 u8 mask[ETH_ALEN]; /* bssid mask */ 641 bool has_hw_macaddr; 642 u8 slottime; 643 bool beacons; 644 645 int naps; /* number of AP vifs */ 646 int nmeshes; /* number of mesh vifs */ 647 int nstations; /* number of station vifs */ 648 int nwds; /* number of WDS vifs */ 649 int nadhocs; /* number of adhoc vifs */ 650 int nocbs; /* number of OCB vifs */ 651 int nbcnvifs; /* number of beaconing vifs */ 652 struct ieee80211_vif *primary_beacon_vif; 653 struct ieee80211_vif *primary_sta; 654 }; 655 656 void ath9k_calculate_iter_data(struct ath_softc *sc, 657 struct ath_chanctx *ctx, 658 struct ath9k_vif_iter_data *iter_data); 659 void ath9k_calculate_summary_state(struct ath_softc *sc, 660 struct ath_chanctx *ctx); 661 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif); 662 663 /*******************/ 664 /* Beacon Handling */ 665 /*******************/ 666 667 /* 668 * Regardless of the number of beacons we stagger, (i.e. regardless of the 669 * number of BSSIDs) if a given beacon does not go out even after waiting this 670 * number of beacon intervals, the game's up. 671 */ 672 #define BSTUCK_THRESH 9 673 #define ATH_BCBUF 8 674 #define ATH_DEFAULT_BINTVAL 100 /* TU */ 675 #define ATH_DEFAULT_BMISS_LIMIT 10 676 677 #define TSF_TO_TU(_h,_l) \ 678 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) 679 680 struct ath_beacon { 681 enum { 682 OK, /* no change needed */ 683 UPDATE, /* update pending */ 684 COMMIT /* beacon sent, commit change */ 685 } updateslot; /* slot time update fsm */ 686 687 u32 beaconq; 688 u32 bmisscnt; 689 struct ieee80211_vif *bslot[ATH_BCBUF]; 690 int slottime; 691 int slotupdate; 692 struct ath_descdma bdma; 693 struct ath_txq *cabq; 694 struct list_head bbuf; 695 696 bool tx_processed; 697 bool tx_last; 698 }; 699 700 void ath9k_beacon_tasklet(unsigned long data); 701 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *main_vif, 702 bool beacons); 703 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 704 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 705 void ath9k_beacon_ensure_primary_slot(struct ath_softc *sc); 706 void ath9k_set_beacon(struct ath_softc *sc); 707 bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif); 708 void ath9k_csa_update(struct ath_softc *sc); 709 710 /*******************/ 711 /* Link Monitoring */ 712 /*******************/ 713 714 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */ 715 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */ 716 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */ 717 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */ 718 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */ 719 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ 720 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ 721 #define ATH_ANI_MAX_SKIP_COUNT 10 722 #define ATH_PAPRD_TIMEOUT 100 /* msecs */ 723 #define ATH_PLL_WORK_INTERVAL 100 724 725 void ath_tx_complete_poll_work(struct work_struct *work); 726 void ath_reset_work(struct work_struct *work); 727 bool ath_hw_check(struct ath_softc *sc); 728 void ath_hw_pll_work(struct work_struct *work); 729 void ath_paprd_calibrate(struct work_struct *work); 730 void ath_ani_calibrate(unsigned long data); 731 void ath_start_ani(struct ath_softc *sc); 732 void ath_stop_ani(struct ath_softc *sc); 733 void ath_check_ani(struct ath_softc *sc); 734 int ath_update_survey_stats(struct ath_softc *sc); 735 void ath_update_survey_nf(struct ath_softc *sc, int channel); 736 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type); 737 void ath_ps_full_sleep(unsigned long data); 738 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop, 739 bool sw_pending, bool timeout_override); 740 741 /**********/ 742 /* BTCOEX */ 743 /**********/ 744 745 #define ATH_DUMP_BTCOEX(_s, _val) \ 746 do { \ 747 len += scnprintf(buf + len, size - len, \ 748 "%20s : %10d\n", _s, (_val)); \ 749 } while (0) 750 751 enum bt_op_flags { 752 BT_OP_PRIORITY_DETECTED, 753 BT_OP_SCAN, 754 }; 755 756 struct ath_btcoex { 757 spinlock_t btcoex_lock; 758 struct timer_list period_timer; /* Timer for BT period */ 759 struct timer_list no_stomp_timer; 760 u32 bt_priority_cnt; 761 unsigned long bt_priority_time; 762 unsigned long op_flags; 763 int bt_stomp_type; /* Types of BT stomping */ 764 u32 btcoex_no_stomp; /* in msec */ 765 u32 btcoex_period; /* in msec */ 766 u32 btscan_no_stomp; /* in msec */ 767 u32 duty_cycle; 768 u32 bt_wait_time; 769 int rssi_count; 770 struct ath_mci_profile mci; 771 u8 stomp_audio; 772 }; 773 774 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 775 int ath9k_init_btcoex(struct ath_softc *sc); 776 void ath9k_deinit_btcoex(struct ath_softc *sc); 777 void ath9k_start_btcoex(struct ath_softc *sc); 778 void ath9k_stop_btcoex(struct ath_softc *sc); 779 void ath9k_btcoex_timer_resume(struct ath_softc *sc); 780 void ath9k_btcoex_timer_pause(struct ath_softc *sc); 781 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status); 782 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen); 783 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc); 784 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size); 785 #else 786 static inline int ath9k_init_btcoex(struct ath_softc *sc) 787 { 788 return 0; 789 } 790 static inline void ath9k_deinit_btcoex(struct ath_softc *sc) 791 { 792 } 793 static inline void ath9k_start_btcoex(struct ath_softc *sc) 794 { 795 } 796 static inline void ath9k_stop_btcoex(struct ath_softc *sc) 797 { 798 } 799 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, 800 u32 status) 801 { 802 } 803 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, 804 u32 max_4ms_framelen) 805 { 806 return 0; 807 } 808 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc) 809 { 810 } 811 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size) 812 { 813 return 0; 814 } 815 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ 816 817 /********************/ 818 /* LED Control */ 819 /********************/ 820 821 #define ATH_LED_PIN_DEF 1 822 #define ATH_LED_PIN_9287 8 823 #define ATH_LED_PIN_9300 10 824 #define ATH_LED_PIN_9485 6 825 #define ATH_LED_PIN_9462 4 826 827 #ifdef CONFIG_MAC80211_LEDS 828 void ath_init_leds(struct ath_softc *sc); 829 void ath_deinit_leds(struct ath_softc *sc); 830 #else 831 static inline void ath_init_leds(struct ath_softc *sc) 832 { 833 } 834 835 static inline void ath_deinit_leds(struct ath_softc *sc) 836 { 837 } 838 #endif 839 840 /************************/ 841 /* Wake on Wireless LAN */ 842 /************************/ 843 844 #ifdef CONFIG_ATH9K_WOW 845 void ath9k_init_wow(struct ieee80211_hw *hw); 846 void ath9k_deinit_wow(struct ieee80211_hw *hw); 847 int ath9k_suspend(struct ieee80211_hw *hw, 848 struct cfg80211_wowlan *wowlan); 849 int ath9k_resume(struct ieee80211_hw *hw); 850 void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled); 851 #else 852 static inline void ath9k_init_wow(struct ieee80211_hw *hw) 853 { 854 } 855 static inline void ath9k_deinit_wow(struct ieee80211_hw *hw) 856 { 857 } 858 static inline int ath9k_suspend(struct ieee80211_hw *hw, 859 struct cfg80211_wowlan *wowlan) 860 { 861 return 0; 862 } 863 static inline int ath9k_resume(struct ieee80211_hw *hw) 864 { 865 return 0; 866 } 867 static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled) 868 { 869 } 870 #endif /* CONFIG_ATH9K_WOW */ 871 872 /*******************************/ 873 /* Antenna diversity/combining */ 874 /*******************************/ 875 876 #define ATH_ANT_RX_CURRENT_SHIFT 4 877 #define ATH_ANT_RX_MAIN_SHIFT 2 878 #define ATH_ANT_RX_MASK 0x3 879 880 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50 881 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100 882 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200 883 #define ATH_ANT_DIV_COMB_INIT_COUNT 95 884 #define ATH_ANT_DIV_COMB_MAX_COUNT 100 885 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30 886 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20 887 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50 888 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50 889 890 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4 891 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2 892 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2 893 894 struct ath_ant_comb { 895 u16 count; 896 u16 total_pkt_count; 897 bool scan; 898 bool scan_not_start; 899 int main_total_rssi; 900 int alt_total_rssi; 901 int alt_recv_cnt; 902 int main_recv_cnt; 903 int rssi_lna1; 904 int rssi_lna2; 905 int rssi_add; 906 int rssi_sub; 907 int rssi_first; 908 int rssi_second; 909 int rssi_third; 910 int ant_ratio; 911 int ant_ratio2; 912 bool alt_good; 913 int quick_scan_cnt; 914 enum ath9k_ant_div_comb_lna_conf main_conf; 915 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf; 916 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf; 917 bool first_ratio; 918 bool second_ratio; 919 unsigned long scan_start_time; 920 921 /* 922 * Card-specific config values. 923 */ 924 int low_rssi_thresh; 925 int fast_div_bias; 926 }; 927 928 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs); 929 930 /********************/ 931 /* Main driver core */ 932 /********************/ 933 934 #define ATH9K_PCI_CUS198 0x0001 935 #define ATH9K_PCI_CUS230 0x0002 936 #define ATH9K_PCI_CUS217 0x0004 937 #define ATH9K_PCI_CUS252 0x0008 938 #define ATH9K_PCI_WOW 0x0010 939 #define ATH9K_PCI_BT_ANT_DIV 0x0020 940 #define ATH9K_PCI_D3_L1_WAR 0x0040 941 #define ATH9K_PCI_AR9565_1ANT 0x0080 942 #define ATH9K_PCI_AR9565_2ANT 0x0100 943 #define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200 944 #define ATH9K_PCI_KILLER 0x0400 945 #define ATH9K_PCI_LED_ACT_HI 0x0800 946 947 /* 948 * Default cache line size, in bytes. 949 * Used when PCI device not fully initialized by bootrom/BIOS 950 */ 951 #define DEFAULT_CACHELINE 32 952 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ 953 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */ 954 #define MAX_GTT_CNT 5 955 956 /* Powersave flags */ 957 #define PS_WAIT_FOR_BEACON BIT(0) 958 #define PS_WAIT_FOR_CAB BIT(1) 959 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2) 960 #define PS_WAIT_FOR_TX_ACK BIT(3) 961 #define PS_BEACON_SYNC BIT(4) 962 #define PS_WAIT_FOR_ANI BIT(5) 963 964 #define ATH9K_NUM_CHANCTX 2 /* supports 2 operating channels */ 965 966 struct ath_softc { 967 struct ieee80211_hw *hw; 968 struct device *dev; 969 970 struct survey_info *cur_survey; 971 struct survey_info survey[ATH9K_NUM_CHANNELS]; 972 973 struct tasklet_struct intr_tq; 974 struct tasklet_struct bcon_tasklet; 975 struct ath_hw *sc_ah; 976 void __iomem *mem; 977 int irq; 978 spinlock_t sc_serial_rw; 979 spinlock_t sc_pm_lock; 980 spinlock_t sc_pcu_lock; 981 struct mutex mutex; 982 struct work_struct paprd_work; 983 struct work_struct hw_reset_work; 984 struct completion paprd_complete; 985 wait_queue_head_t tx_wait; 986 987 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT 988 struct work_struct chanctx_work; 989 struct ath_gen_timer *p2p_ps_timer; 990 struct ath_vif *p2p_ps_vif; 991 struct ath_chanctx_sched sched; 992 struct ath_offchannel offchannel; 993 struct ath_chanctx *next_chan; 994 struct completion go_beacon; 995 struct timespec last_event_time; 996 #endif 997 998 unsigned long driver_data; 999 1000 u8 gtt_cnt; 1001 u32 intrstatus; 1002 u16 ps_flags; /* PS_* */ 1003 bool ps_enabled; 1004 bool ps_idle; 1005 short nbcnvifs; 1006 unsigned long ps_usecount; 1007 1008 struct ath_rx rx; 1009 struct ath_tx tx; 1010 struct ath_beacon beacon; 1011 1012 struct cfg80211_chan_def cur_chandef; 1013 struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX]; 1014 struct ath_chanctx *cur_chan; 1015 spinlock_t chan_lock; 1016 1017 #ifdef CONFIG_MAC80211_LEDS 1018 bool led_registered; 1019 char led_name[32]; 1020 struct led_classdev led_cdev; 1021 #endif 1022 1023 #ifdef CONFIG_ATH9K_DEBUGFS 1024 struct ath9k_debug debug; 1025 #endif 1026 struct delayed_work tx_complete_work; 1027 struct delayed_work hw_pll_work; 1028 struct timer_list sleep_timer; 1029 1030 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 1031 struct ath_btcoex btcoex; 1032 struct ath_mci_coex mci_coex; 1033 struct work_struct mci_work; 1034 #endif 1035 1036 struct ath_descdma txsdma; 1037 1038 struct ath_ant_comb ant_comb; 1039 u8 ant_tx, ant_rx; 1040 struct dfs_pattern_detector *dfs_detector; 1041 u64 dfs_prev_pulse_ts; 1042 u32 wow_enabled; 1043 1044 struct ath_spec_scan_priv spec_priv; 1045 1046 struct ieee80211_vif *tx99_vif; 1047 struct sk_buff *tx99_skb; 1048 bool tx99_state; 1049 s16 tx99_power; 1050 1051 #ifdef CONFIG_ATH9K_WOW 1052 u32 wow_intr_before_sleep; 1053 bool force_wow; 1054 #endif 1055 1056 #ifdef CONFIG_ATH9K_HWRNG 1057 u32 rng_last; 1058 struct task_struct *rng_task; 1059 #endif 1060 }; 1061 1062 /********/ 1063 /* TX99 */ 1064 /********/ 1065 1066 #ifdef CONFIG_ATH9K_TX99 1067 void ath9k_tx99_init_debug(struct ath_softc *sc); 1068 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb, 1069 struct ath_tx_control *txctl); 1070 #else 1071 static inline void ath9k_tx99_init_debug(struct ath_softc *sc) 1072 { 1073 } 1074 static inline int ath9k_tx99_send(struct ath_softc *sc, 1075 struct sk_buff *skb, 1076 struct ath_tx_control *txctl) 1077 { 1078 return 0; 1079 } 1080 #endif /* CONFIG_ATH9K_TX99 */ 1081 1082 /***************************/ 1083 /* Random Number Generator */ 1084 /***************************/ 1085 #ifdef CONFIG_ATH9K_HWRNG 1086 void ath9k_rng_start(struct ath_softc *sc); 1087 void ath9k_rng_stop(struct ath_softc *sc); 1088 #else 1089 static inline void ath9k_rng_start(struct ath_softc *sc) 1090 { 1091 } 1092 1093 static inline void ath9k_rng_stop(struct ath_softc *sc) 1094 { 1095 } 1096 #endif 1097 1098 static inline void ath_read_cachesize(struct ath_common *common, int *csz) 1099 { 1100 common->bus_ops->read_cachesize(common, csz); 1101 } 1102 1103 void ath9k_tasklet(unsigned long data); 1104 int ath_cabq_update(struct ath_softc *); 1105 u8 ath9k_parse_mpdudensity(u8 mpdudensity); 1106 irqreturn_t ath_isr(int irq, void *dev); 1107 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan); 1108 void ath_cancel_work(struct ath_softc *sc); 1109 void ath_restart_work(struct ath_softc *sc); 1110 int ath9k_init_device(u16 devid, struct ath_softc *sc, 1111 const struct ath_bus_ops *bus_ops); 1112 void ath9k_deinit_device(struct ath_softc *sc); 1113 void ath9k_reload_chainmask_settings(struct ath_softc *sc); 1114 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate); 1115 void ath_start_rfkill_poll(struct ath_softc *sc); 1116 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw); 1117 void ath9k_ps_wakeup(struct ath_softc *sc); 1118 void ath9k_ps_restore(struct ath_softc *sc); 1119 1120 #ifdef CONFIG_ATH9K_PCI 1121 int ath_pci_init(void); 1122 void ath_pci_exit(void); 1123 #else 1124 static inline int ath_pci_init(void) { return 0; }; 1125 static inline void ath_pci_exit(void) {}; 1126 #endif 1127 1128 #ifdef CONFIG_ATH9K_AHB 1129 int ath_ahb_init(void); 1130 void ath_ahb_exit(void); 1131 #else 1132 static inline int ath_ahb_init(void) { return 0; }; 1133 static inline void ath_ahb_exit(void) {}; 1134 #endif 1135 1136 #endif /* ATH9K_H */ 1137