1 /* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef ATH9K_H 18 #define ATH9K_H 19 20 #include <linux/etherdevice.h> 21 #include <linux/device.h> 22 #include <linux/interrupt.h> 23 #include <linux/leds.h> 24 #include <linux/completion.h> 25 #include <linux/time.h> 26 27 #include "common.h" 28 #include "debug.h" 29 #include "mci.h" 30 #include "dfs.h" 31 #include "spectral.h" 32 33 struct ath_node; 34 struct ath_vif; 35 36 extern struct ieee80211_ops ath9k_ops; 37 extern int ath9k_modparam_nohwcrypt; 38 extern int led_blink; 39 extern bool is_ath9k_unloaded; 40 extern int ath9k_use_chanctx; 41 42 /*************************/ 43 /* Descriptor Management */ 44 /*************************/ 45 46 #define ATH_TXSTATUS_RING_SIZE 512 47 48 /* Macro to expand scalars to 64-bit objects */ 49 #define ito64(x) (sizeof(x) == 1) ? \ 50 (((unsigned long long int)(x)) & (0xff)) : \ 51 (sizeof(x) == 2) ? \ 52 (((unsigned long long int)(x)) & 0xffff) : \ 53 ((sizeof(x) == 4) ? \ 54 (((unsigned long long int)(x)) & 0xffffffff) : \ 55 (unsigned long long int)(x)) 56 57 #define ATH_TXBUF_RESET(_bf) do { \ 58 (_bf)->bf_lastbf = NULL; \ 59 (_bf)->bf_next = NULL; \ 60 memset(&((_bf)->bf_state), 0, \ 61 sizeof(struct ath_buf_state)); \ 62 } while (0) 63 64 #define DS2PHYS(_dd, _ds) \ 65 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 66 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0) 67 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096) 68 69 struct ath_descdma { 70 void *dd_desc; 71 dma_addr_t dd_desc_paddr; 72 u32 dd_desc_len; 73 }; 74 75 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, 76 struct list_head *head, const char *name, 77 int nbuf, int ndesc, bool is_tx); 78 79 /***********/ 80 /* RX / TX */ 81 /***********/ 82 83 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) 84 85 /* increment with wrap-around */ 86 #define INCR(_l, _sz) do { \ 87 (_l)++; \ 88 (_l) &= ((_sz) - 1); \ 89 } while (0) 90 91 #define ATH_RXBUF 512 92 #define ATH_TXBUF 512 93 #define ATH_TXBUF_RESERVE 5 94 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE) 95 #define ATH_TXMAXTRY 13 96 #define ATH_MAX_SW_RETRIES 30 97 98 #define TID_TO_WME_AC(_tid) \ 99 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \ 100 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \ 101 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \ 102 IEEE80211_AC_VO) 103 104 #define ATH_AGGR_DELIM_SZ 4 105 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ 106 /* number of delimiters for encryption padding */ 107 #define ATH_AGGR_ENCRYPTDELIM 10 108 /* minimum h/w qdepth to be sustained to maximize aggregation */ 109 #define ATH_AGGR_MIN_QDEPTH 2 110 /* minimum h/w qdepth for non-aggregated traffic */ 111 #define ATH_NON_AGGR_MIN_QDEPTH 8 112 #define ATH_TX_COMPLETE_POLL_INT 1000 113 #define ATH_TXFIFO_DEPTH 8 114 #define ATH_TX_ERROR 0x01 115 116 /* Stop tx traffic 1ms before the GO goes away */ 117 #define ATH_P2P_PS_STOP_TIME 1000 118 119 #define IEEE80211_SEQ_SEQ_SHIFT 4 120 #define IEEE80211_SEQ_MAX 4096 121 #define IEEE80211_WEP_IVLEN 3 122 #define IEEE80211_WEP_KIDLEN 1 123 #define IEEE80211_WEP_CRCLEN 4 124 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \ 125 (IEEE80211_WEP_IVLEN + \ 126 IEEE80211_WEP_KIDLEN + \ 127 IEEE80211_WEP_CRCLEN)) 128 129 /* return whether a bit at index _n in bitmap _bm is set 130 * _sz is the size of the bitmap */ 131 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \ 132 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31)))) 133 134 /* return block-ack bitmap index given sequence and starting sequence */ 135 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1)) 136 137 /* return the seqno for _start + _offset */ 138 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1)) 139 140 /* returns delimiter padding required given the packet length */ 141 #define ATH_AGGR_GET_NDELIM(_len) \ 142 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \ 143 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ)) 144 145 #define BAW_WITHIN(_start, _bawsz, _seqno) \ 146 ((((_seqno) - (_start)) & 4095) < (_bawsz)) 147 148 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)]) 149 150 #define IS_HT_RATE(rate) (rate & 0x80) 151 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e)) 152 #define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf)) 153 154 enum { 155 WLAN_RC_PHY_OFDM, 156 WLAN_RC_PHY_CCK, 157 }; 158 159 struct ath_txq { 160 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */ 161 u32 axq_qnum; /* ath9k hardware queue number */ 162 void *axq_link; 163 struct list_head axq_q; 164 spinlock_t axq_lock; 165 u32 axq_depth; 166 u32 axq_ampdu_depth; 167 bool stopped; 168 bool axq_tx_inprogress; 169 struct list_head txq_fifo[ATH_TXFIFO_DEPTH]; 170 u8 txq_headidx; 171 u8 txq_tailidx; 172 int pending_frames; 173 struct sk_buff_head complete_q; 174 }; 175 176 struct ath_atx_ac { 177 struct ath_txq *txq; 178 struct list_head list; 179 struct list_head tid_q; 180 bool clear_ps_filter; 181 bool sched; 182 }; 183 184 struct ath_frame_info { 185 struct ath_buf *bf; 186 u16 framelen; 187 s8 txq; 188 enum ath9k_key_type keytype; 189 u8 keyix; 190 u8 rtscts_rate; 191 u8 retries : 7; 192 u8 baw_tracked : 1; 193 }; 194 195 struct ath_rxbuf { 196 struct list_head list; 197 struct sk_buff *bf_mpdu; 198 void *bf_desc; 199 dma_addr_t bf_daddr; 200 dma_addr_t bf_buf_addr; 201 }; 202 203 /** 204 * enum buffer_type - Buffer type flags 205 * 206 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) 207 * @BUF_AGGR: Indicates whether the buffer can be aggregated 208 * (used in aggregation scheduling) 209 */ 210 enum buffer_type { 211 BUF_AMPDU = BIT(0), 212 BUF_AGGR = BIT(1), 213 }; 214 215 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) 216 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) 217 218 struct ath_buf_state { 219 u8 bf_type; 220 u8 bfs_paprd; 221 u8 ndelim; 222 bool stale; 223 u16 seqno; 224 unsigned long bfs_paprd_timestamp; 225 }; 226 227 struct ath_buf { 228 struct list_head list; 229 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or 230 an aggregate) */ 231 struct ath_buf *bf_next; /* next subframe in the aggregate */ 232 struct sk_buff *bf_mpdu; /* enclosing frame structure */ 233 void *bf_desc; /* virtual addr of desc */ 234 dma_addr_t bf_daddr; /* physical addr of desc */ 235 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */ 236 struct ieee80211_tx_rate rates[4]; 237 struct ath_buf_state bf_state; 238 }; 239 240 struct ath_atx_tid { 241 struct list_head list; 242 struct sk_buff_head buf_q; 243 struct sk_buff_head retry_q; 244 struct ath_node *an; 245 struct ath_atx_ac *ac; 246 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)]; 247 u16 seq_start; 248 u16 seq_next; 249 u16 baw_size; 250 u8 tidno; 251 int baw_head; /* first un-acked tx buffer */ 252 int baw_tail; /* next unused tx buffer slot */ 253 254 s8 bar_index; 255 bool sched; 256 bool active; 257 }; 258 259 struct ath_node { 260 struct ath_softc *sc; 261 struct ieee80211_sta *sta; /* station struct we're part of */ 262 struct ieee80211_vif *vif; /* interface with which we're associated */ 263 struct ath_atx_tid tid[IEEE80211_NUM_TIDS]; 264 struct ath_atx_ac ac[IEEE80211_NUM_ACS]; 265 266 u16 maxampdu; 267 u8 mpdudensity; 268 s8 ps_key; 269 270 bool sleeping; 271 bool no_ps_filter; 272 273 #ifdef CONFIG_ATH9K_STATION_STATISTICS 274 struct ath_rx_rate_stats rx_rate_stats; 275 #endif 276 u8 key_idx[4]; 277 278 u32 ackto; 279 struct list_head list; 280 }; 281 282 struct ath_tx_control { 283 struct ath_txq *txq; 284 struct ath_node *an; 285 struct ieee80211_sta *sta; 286 u8 paprd; 287 bool force_channel; 288 }; 289 290 291 /** 292 * @txq_map: Index is mac80211 queue number. This is 293 * not necessarily the same as the hardware queue number 294 * (axq_qnum). 295 */ 296 struct ath_tx { 297 u32 txqsetup; 298 spinlock_t txbuflock; 299 struct list_head txbuf; 300 struct ath_txq txq[ATH9K_NUM_TX_QUEUES]; 301 struct ath_descdma txdma; 302 struct ath_txq *txq_map[IEEE80211_NUM_ACS]; 303 struct ath_txq *uapsdq; 304 u32 txq_max_pending[IEEE80211_NUM_ACS]; 305 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32]; 306 }; 307 308 struct ath_rx_edma { 309 struct sk_buff_head rx_fifo; 310 u32 rx_fifo_hwsize; 311 }; 312 313 struct ath_rx { 314 u8 defant; 315 u8 rxotherant; 316 bool discard_next; 317 u32 *rxlink; 318 u32 num_pkts; 319 struct list_head rxbuf; 320 struct ath_descdma rxdma; 321 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX]; 322 323 struct ath_rxbuf *buf_hold; 324 struct sk_buff *frag; 325 326 u32 ampdu_ref; 327 }; 328 329 /*******************/ 330 /* Channel Context */ 331 /*******************/ 332 333 struct ath_chanctx { 334 struct cfg80211_chan_def chandef; 335 struct list_head vifs; 336 struct list_head acq[IEEE80211_NUM_ACS]; 337 int hw_queue_base; 338 339 /* do not dereference, use for comparison only */ 340 struct ieee80211_vif *primary_sta; 341 342 struct ath_beacon_config beacon; 343 struct ath9k_hw_cal_data caldata; 344 struct timespec tsf_ts; 345 u64 tsf_val; 346 u32 last_beacon; 347 348 u16 txpower; 349 bool offchannel; 350 bool stopped; 351 bool active; 352 bool assigned; 353 bool switch_after_beacon; 354 355 short nvifs; 356 short nvifs_assigned; 357 unsigned int rxfilter; 358 }; 359 360 enum ath_chanctx_event { 361 ATH_CHANCTX_EVENT_BEACON_PREPARE, 362 ATH_CHANCTX_EVENT_BEACON_SENT, 363 ATH_CHANCTX_EVENT_TSF_TIMER, 364 ATH_CHANCTX_EVENT_BEACON_RECEIVED, 365 ATH_CHANCTX_EVENT_ASSOC, 366 ATH_CHANCTX_EVENT_SWITCH, 367 ATH_CHANCTX_EVENT_ASSIGN, 368 ATH_CHANCTX_EVENT_UNASSIGN, 369 ATH_CHANCTX_EVENT_CHANGE, 370 ATH_CHANCTX_EVENT_ENABLE_MULTICHANNEL, 371 }; 372 373 enum ath_chanctx_state { 374 ATH_CHANCTX_STATE_IDLE, 375 ATH_CHANCTX_STATE_WAIT_FOR_BEACON, 376 ATH_CHANCTX_STATE_WAIT_FOR_TIMER, 377 ATH_CHANCTX_STATE_SWITCH, 378 ATH_CHANCTX_STATE_FORCE_ACTIVE, 379 }; 380 381 struct ath_chanctx_sched { 382 bool beacon_pending; 383 bool offchannel_pending; 384 bool wait_switch; 385 bool force_noa_update; 386 bool extend_absence; 387 enum ath_chanctx_state state; 388 u8 beacon_miss; 389 390 u32 next_tbtt; 391 u32 switch_start_time; 392 unsigned int offchannel_duration; 393 unsigned int channel_switch_time; 394 395 /* backup, in case the hardware timer fails */ 396 struct timer_list timer; 397 }; 398 399 enum ath_offchannel_state { 400 ATH_OFFCHANNEL_IDLE, 401 ATH_OFFCHANNEL_PROBE_SEND, 402 ATH_OFFCHANNEL_PROBE_WAIT, 403 ATH_OFFCHANNEL_SUSPEND, 404 ATH_OFFCHANNEL_ROC_START, 405 ATH_OFFCHANNEL_ROC_WAIT, 406 ATH_OFFCHANNEL_ROC_DONE, 407 }; 408 409 struct ath_offchannel { 410 struct ath_chanctx chan; 411 struct timer_list timer; 412 struct cfg80211_scan_request *scan_req; 413 struct ieee80211_vif *scan_vif; 414 int scan_idx; 415 enum ath_offchannel_state state; 416 struct ieee80211_channel *roc_chan; 417 struct ieee80211_vif *roc_vif; 418 int roc_duration; 419 int duration; 420 }; 421 422 #define case_rtn_string(val) case val: return #val 423 424 #define ath_for_each_chanctx(_sc, _ctx) \ 425 for (ctx = &sc->chanctx[0]; \ 426 ctx <= &sc->chanctx[ARRAY_SIZE(sc->chanctx) - 1]; \ 427 ctx++) 428 429 void ath_chanctx_init(struct ath_softc *sc); 430 void ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx, 431 struct cfg80211_chan_def *chandef); 432 433 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT 434 435 static inline struct ath_chanctx * 436 ath_chanctx_get(struct ieee80211_chanctx_conf *ctx) 437 { 438 struct ath_chanctx **ptr = (void *) ctx->drv_priv; 439 return *ptr; 440 } 441 442 bool ath9k_is_chanctx_enabled(void); 443 void ath9k_fill_chanctx_ops(void); 444 void ath9k_init_channel_context(struct ath_softc *sc); 445 void ath9k_offchannel_init(struct ath_softc *sc); 446 void ath9k_deinit_channel_context(struct ath_softc *sc); 447 int ath9k_init_p2p(struct ath_softc *sc); 448 void ath9k_deinit_p2p(struct ath_softc *sc); 449 void ath9k_p2p_remove_vif(struct ath_softc *sc, 450 struct ieee80211_vif *vif); 451 void ath9k_p2p_beacon_sync(struct ath_softc *sc); 452 void ath9k_p2p_bss_info_changed(struct ath_softc *sc, 453 struct ieee80211_vif *vif); 454 void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp, 455 struct sk_buff *skb); 456 void ath9k_p2p_ps_timer(void *priv); 457 void ath9k_chanctx_wake_queues(struct ath_softc *sc, struct ath_chanctx *ctx); 458 void ath9k_chanctx_stop_queues(struct ath_softc *sc, struct ath_chanctx *ctx); 459 void ath_chanctx_check_active(struct ath_softc *sc, struct ath_chanctx *ctx); 460 461 void ath_chanctx_beacon_recv_ev(struct ath_softc *sc, 462 enum ath_chanctx_event ev); 463 void ath_chanctx_beacon_sent_ev(struct ath_softc *sc, 464 enum ath_chanctx_event ev); 465 void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif, 466 enum ath_chanctx_event ev); 467 void ath_chanctx_set_next(struct ath_softc *sc, bool force); 468 void ath_offchannel_next(struct ath_softc *sc); 469 void ath_scan_complete(struct ath_softc *sc, bool abort); 470 void ath_roc_complete(struct ath_softc *sc, bool abort); 471 472 #else 473 474 static inline bool ath9k_is_chanctx_enabled(void) 475 { 476 return false; 477 } 478 static inline void ath9k_fill_chanctx_ops(void) 479 { 480 } 481 static inline void ath9k_init_channel_context(struct ath_softc *sc) 482 { 483 } 484 static inline void ath9k_offchannel_init(struct ath_softc *sc) 485 { 486 } 487 static inline void ath9k_deinit_channel_context(struct ath_softc *sc) 488 { 489 } 490 static inline void ath_chanctx_beacon_recv_ev(struct ath_softc *sc, 491 enum ath_chanctx_event ev) 492 { 493 } 494 static inline void ath_chanctx_beacon_sent_ev(struct ath_softc *sc, 495 enum ath_chanctx_event ev) 496 { 497 } 498 static inline void ath_chanctx_event(struct ath_softc *sc, 499 struct ieee80211_vif *vif, 500 enum ath_chanctx_event ev) 501 { 502 } 503 static inline int ath9k_init_p2p(struct ath_softc *sc) 504 { 505 return 0; 506 } 507 static inline void ath9k_deinit_p2p(struct ath_softc *sc) 508 { 509 } 510 static inline void ath9k_p2p_remove_vif(struct ath_softc *sc, 511 struct ieee80211_vif *vif) 512 { 513 } 514 static inline void ath9k_p2p_beacon_sync(struct ath_softc *sc) 515 { 516 } 517 static inline void ath9k_p2p_bss_info_changed(struct ath_softc *sc, 518 struct ieee80211_vif *vif) 519 { 520 } 521 static inline void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp, 522 struct sk_buff *skb) 523 { 524 } 525 static inline void ath9k_p2p_ps_timer(struct ath_softc *sc) 526 { 527 } 528 static inline void ath9k_chanctx_wake_queues(struct ath_softc *sc, 529 struct ath_chanctx *ctx) 530 { 531 } 532 static inline void ath9k_chanctx_stop_queues(struct ath_softc *sc, 533 struct ath_chanctx *ctx) 534 { 535 } 536 static inline void ath_chanctx_check_active(struct ath_softc *sc, 537 struct ath_chanctx *ctx) 538 { 539 } 540 541 #endif /* CONFIG_ATH9K_CHANNEL_CONTEXT */ 542 543 int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan); 544 void ath_startrecv(struct ath_softc *sc); 545 bool ath_stoprecv(struct ath_softc *sc); 546 u32 ath_calcrxfilter(struct ath_softc *sc); 547 int ath_rx_init(struct ath_softc *sc, int nbufs); 548 void ath_rx_cleanup(struct ath_softc *sc); 549 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp); 550 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype); 551 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq); 552 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq); 553 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq); 554 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); 555 bool ath_drain_all_txq(struct ath_softc *sc); 556 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq); 557 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an); 558 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an); 559 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); 560 void ath_txq_schedule_all(struct ath_softc *sc); 561 int ath_tx_init(struct ath_softc *sc, int nbufs); 562 int ath_txq_update(struct ath_softc *sc, int qnum, 563 struct ath9k_tx_queue_info *q); 564 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop); 565 void ath_assign_seq(struct ath_common *common, struct sk_buff *skb); 566 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, 567 struct ath_tx_control *txctl); 568 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 569 struct sk_buff *skb); 570 void ath_tx_tasklet(struct ath_softc *sc); 571 void ath_tx_edma_tasklet(struct ath_softc *sc); 572 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, 573 u16 tid, u16 *ssn); 574 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 575 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 576 577 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an); 578 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc, 579 struct ath_node *an); 580 void ath9k_release_buffered_frames(struct ieee80211_hw *hw, 581 struct ieee80211_sta *sta, 582 u16 tids, int nframes, 583 enum ieee80211_frame_release_type reason, 584 bool more_data); 585 586 /********/ 587 /* VIFs */ 588 /********/ 589 590 #define P2P_DEFAULT_CTWIN 10 591 592 struct ath_vif { 593 struct list_head list; 594 595 u16 seq_no; 596 597 /* BSS info */ 598 u8 bssid[ETH_ALEN]; 599 u16 aid; 600 bool assoc; 601 602 struct ieee80211_vif *vif; 603 struct ath_node mcast_node; 604 int av_bslot; 605 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */ 606 struct ath_buf *av_bcbuf; 607 struct ath_chanctx *chanctx; 608 609 /* P2P Client */ 610 struct ieee80211_noa_data noa; 611 612 /* P2P GO */ 613 u8 noa_index; 614 u32 offchannel_start; 615 u32 offchannel_duration; 616 617 /* These are used for both periodic and one-shot */ 618 u32 noa_start; 619 u32 noa_duration; 620 bool periodic_noa; 621 }; 622 623 struct ath9k_vif_iter_data { 624 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */ 625 u8 mask[ETH_ALEN]; /* bssid mask */ 626 bool has_hw_macaddr; 627 u8 slottime; 628 bool beacons; 629 630 int naps; /* number of AP vifs */ 631 int nmeshes; /* number of mesh vifs */ 632 int nstations; /* number of station vifs */ 633 int nwds; /* number of WDS vifs */ 634 int nadhocs; /* number of adhoc vifs */ 635 struct ieee80211_vif *primary_sta; 636 }; 637 638 void ath9k_calculate_iter_data(struct ath_softc *sc, 639 struct ath_chanctx *ctx, 640 struct ath9k_vif_iter_data *iter_data); 641 void ath9k_calculate_summary_state(struct ath_softc *sc, 642 struct ath_chanctx *ctx); 643 644 /*******************/ 645 /* Beacon Handling */ 646 /*******************/ 647 648 /* 649 * Regardless of the number of beacons we stagger, (i.e. regardless of the 650 * number of BSSIDs) if a given beacon does not go out even after waiting this 651 * number of beacon intervals, the game's up. 652 */ 653 #define BSTUCK_THRESH 9 654 #define ATH_BCBUF 8 655 #define ATH_DEFAULT_BINTVAL 100 /* TU */ 656 #define ATH_DEFAULT_BMISS_LIMIT 10 657 658 #define TSF_TO_TU(_h,_l) \ 659 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) 660 661 struct ath_beacon { 662 enum { 663 OK, /* no change needed */ 664 UPDATE, /* update pending */ 665 COMMIT /* beacon sent, commit change */ 666 } updateslot; /* slot time update fsm */ 667 668 u32 beaconq; 669 u32 bmisscnt; 670 struct ieee80211_vif *bslot[ATH_BCBUF]; 671 int slottime; 672 int slotupdate; 673 struct ath_descdma bdma; 674 struct ath_txq *cabq; 675 struct list_head bbuf; 676 677 bool tx_processed; 678 bool tx_last; 679 }; 680 681 void ath9k_beacon_tasklet(unsigned long data); 682 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif, 683 u32 changed); 684 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 685 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 686 void ath9k_set_beacon(struct ath_softc *sc); 687 bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif); 688 void ath9k_csa_update(struct ath_softc *sc); 689 690 /*******************/ 691 /* Link Monitoring */ 692 /*******************/ 693 694 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */ 695 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */ 696 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */ 697 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */ 698 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */ 699 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ 700 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ 701 #define ATH_ANI_MAX_SKIP_COUNT 10 702 #define ATH_PAPRD_TIMEOUT 100 /* msecs */ 703 #define ATH_PLL_WORK_INTERVAL 100 704 705 void ath_tx_complete_poll_work(struct work_struct *work); 706 void ath_reset_work(struct work_struct *work); 707 bool ath_hw_check(struct ath_softc *sc); 708 void ath_hw_pll_work(struct work_struct *work); 709 void ath_paprd_calibrate(struct work_struct *work); 710 void ath_ani_calibrate(unsigned long data); 711 void ath_start_ani(struct ath_softc *sc); 712 void ath_stop_ani(struct ath_softc *sc); 713 void ath_check_ani(struct ath_softc *sc); 714 int ath_update_survey_stats(struct ath_softc *sc); 715 void ath_update_survey_nf(struct ath_softc *sc, int channel); 716 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type); 717 void ath_ps_full_sleep(unsigned long data); 718 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop); 719 720 /**********/ 721 /* BTCOEX */ 722 /**********/ 723 724 #define ATH_DUMP_BTCOEX(_s, _val) \ 725 do { \ 726 len += scnprintf(buf + len, size - len, \ 727 "%20s : %10d\n", _s, (_val)); \ 728 } while (0) 729 730 enum bt_op_flags { 731 BT_OP_PRIORITY_DETECTED, 732 BT_OP_SCAN, 733 }; 734 735 struct ath_btcoex { 736 spinlock_t btcoex_lock; 737 struct timer_list period_timer; /* Timer for BT period */ 738 struct timer_list no_stomp_timer; 739 u32 bt_priority_cnt; 740 unsigned long bt_priority_time; 741 unsigned long op_flags; 742 int bt_stomp_type; /* Types of BT stomping */ 743 u32 btcoex_no_stomp; /* in msec */ 744 u32 btcoex_period; /* in msec */ 745 u32 btscan_no_stomp; /* in msec */ 746 u32 duty_cycle; 747 u32 bt_wait_time; 748 int rssi_count; 749 struct ath_mci_profile mci; 750 u8 stomp_audio; 751 }; 752 753 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 754 int ath9k_init_btcoex(struct ath_softc *sc); 755 void ath9k_deinit_btcoex(struct ath_softc *sc); 756 void ath9k_start_btcoex(struct ath_softc *sc); 757 void ath9k_stop_btcoex(struct ath_softc *sc); 758 void ath9k_btcoex_timer_resume(struct ath_softc *sc); 759 void ath9k_btcoex_timer_pause(struct ath_softc *sc); 760 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status); 761 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen); 762 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc); 763 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size); 764 #else 765 static inline int ath9k_init_btcoex(struct ath_softc *sc) 766 { 767 return 0; 768 } 769 static inline void ath9k_deinit_btcoex(struct ath_softc *sc) 770 { 771 } 772 static inline void ath9k_start_btcoex(struct ath_softc *sc) 773 { 774 } 775 static inline void ath9k_stop_btcoex(struct ath_softc *sc) 776 { 777 } 778 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, 779 u32 status) 780 { 781 } 782 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, 783 u32 max_4ms_framelen) 784 { 785 return 0; 786 } 787 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc) 788 { 789 } 790 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size) 791 { 792 return 0; 793 } 794 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ 795 796 /********************/ 797 /* LED Control */ 798 /********************/ 799 800 #define ATH_LED_PIN_DEF 1 801 #define ATH_LED_PIN_9287 8 802 #define ATH_LED_PIN_9300 10 803 #define ATH_LED_PIN_9485 6 804 #define ATH_LED_PIN_9462 4 805 806 #ifdef CONFIG_MAC80211_LEDS 807 void ath_init_leds(struct ath_softc *sc); 808 void ath_deinit_leds(struct ath_softc *sc); 809 void ath_fill_led_pin(struct ath_softc *sc); 810 #else 811 static inline void ath_init_leds(struct ath_softc *sc) 812 { 813 } 814 815 static inline void ath_deinit_leds(struct ath_softc *sc) 816 { 817 } 818 static inline void ath_fill_led_pin(struct ath_softc *sc) 819 { 820 } 821 #endif 822 823 /************************/ 824 /* Wake on Wireless LAN */ 825 /************************/ 826 827 struct ath9k_wow_pattern { 828 u8 pattern_bytes[MAX_PATTERN_SIZE]; 829 u8 mask_bytes[MAX_PATTERN_SIZE]; 830 u32 pattern_len; 831 }; 832 833 #ifdef CONFIG_ATH9K_WOW 834 void ath9k_init_wow(struct ieee80211_hw *hw); 835 int ath9k_suspend(struct ieee80211_hw *hw, 836 struct cfg80211_wowlan *wowlan); 837 int ath9k_resume(struct ieee80211_hw *hw); 838 void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled); 839 #else 840 static inline void ath9k_init_wow(struct ieee80211_hw *hw) 841 { 842 } 843 static inline int ath9k_suspend(struct ieee80211_hw *hw, 844 struct cfg80211_wowlan *wowlan) 845 { 846 return 0; 847 } 848 static inline int ath9k_resume(struct ieee80211_hw *hw) 849 { 850 return 0; 851 } 852 static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled) 853 { 854 } 855 #endif /* CONFIG_ATH9K_WOW */ 856 857 /*******************************/ 858 /* Antenna diversity/combining */ 859 /*******************************/ 860 861 #define ATH_ANT_RX_CURRENT_SHIFT 4 862 #define ATH_ANT_RX_MAIN_SHIFT 2 863 #define ATH_ANT_RX_MASK 0x3 864 865 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50 866 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100 867 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200 868 #define ATH_ANT_DIV_COMB_INIT_COUNT 95 869 #define ATH_ANT_DIV_COMB_MAX_COUNT 100 870 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30 871 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20 872 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50 873 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50 874 875 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4 876 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2 877 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2 878 879 struct ath_ant_comb { 880 u16 count; 881 u16 total_pkt_count; 882 bool scan; 883 bool scan_not_start; 884 int main_total_rssi; 885 int alt_total_rssi; 886 int alt_recv_cnt; 887 int main_recv_cnt; 888 int rssi_lna1; 889 int rssi_lna2; 890 int rssi_add; 891 int rssi_sub; 892 int rssi_first; 893 int rssi_second; 894 int rssi_third; 895 int ant_ratio; 896 int ant_ratio2; 897 bool alt_good; 898 int quick_scan_cnt; 899 enum ath9k_ant_div_comb_lna_conf main_conf; 900 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf; 901 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf; 902 bool first_ratio; 903 bool second_ratio; 904 unsigned long scan_start_time; 905 906 /* 907 * Card-specific config values. 908 */ 909 int low_rssi_thresh; 910 int fast_div_bias; 911 }; 912 913 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs); 914 915 /********************/ 916 /* Main driver core */ 917 /********************/ 918 919 #define ATH9K_PCI_CUS198 0x0001 920 #define ATH9K_PCI_CUS230 0x0002 921 #define ATH9K_PCI_CUS217 0x0004 922 #define ATH9K_PCI_CUS252 0x0008 923 #define ATH9K_PCI_WOW 0x0010 924 #define ATH9K_PCI_BT_ANT_DIV 0x0020 925 #define ATH9K_PCI_D3_L1_WAR 0x0040 926 #define ATH9K_PCI_AR9565_1ANT 0x0080 927 #define ATH9K_PCI_AR9565_2ANT 0x0100 928 #define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200 929 #define ATH9K_PCI_KILLER 0x0400 930 931 /* 932 * Default cache line size, in bytes. 933 * Used when PCI device not fully initialized by bootrom/BIOS 934 */ 935 #define DEFAULT_CACHELINE 32 936 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ 937 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */ 938 #define MAX_GTT_CNT 5 939 940 /* Powersave flags */ 941 #define PS_WAIT_FOR_BEACON BIT(0) 942 #define PS_WAIT_FOR_CAB BIT(1) 943 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2) 944 #define PS_WAIT_FOR_TX_ACK BIT(3) 945 #define PS_BEACON_SYNC BIT(4) 946 #define PS_WAIT_FOR_ANI BIT(5) 947 948 #define ATH9K_NUM_CHANCTX 2 /* supports 2 operating channels */ 949 950 struct ath_softc { 951 struct ieee80211_hw *hw; 952 struct device *dev; 953 954 struct survey_info *cur_survey; 955 struct survey_info survey[ATH9K_NUM_CHANNELS]; 956 957 struct tasklet_struct intr_tq; 958 struct tasklet_struct bcon_tasklet; 959 struct ath_hw *sc_ah; 960 void __iomem *mem; 961 int irq; 962 spinlock_t sc_serial_rw; 963 spinlock_t sc_pm_lock; 964 spinlock_t sc_pcu_lock; 965 struct mutex mutex; 966 struct work_struct paprd_work; 967 struct work_struct hw_reset_work; 968 struct completion paprd_complete; 969 wait_queue_head_t tx_wait; 970 971 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT 972 struct work_struct chanctx_work; 973 struct ath_gen_timer *p2p_ps_timer; 974 struct ath_vif *p2p_ps_vif; 975 struct ath_chanctx_sched sched; 976 struct ath_offchannel offchannel; 977 struct ath_chanctx *next_chan; 978 #endif 979 980 unsigned long driver_data; 981 982 u8 gtt_cnt; 983 u32 intrstatus; 984 u16 ps_flags; /* PS_* */ 985 u16 curtxpow; 986 bool ps_enabled; 987 bool ps_idle; 988 short nbcnvifs; 989 unsigned long ps_usecount; 990 991 struct ath_rx rx; 992 struct ath_tx tx; 993 struct ath_beacon beacon; 994 995 struct cfg80211_chan_def cur_chandef; 996 struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX]; 997 struct ath_chanctx *cur_chan; 998 spinlock_t chan_lock; 999 1000 #ifdef CONFIG_MAC80211_LEDS 1001 bool led_registered; 1002 char led_name[32]; 1003 struct led_classdev led_cdev; 1004 #endif 1005 1006 #ifdef CONFIG_ATH9K_DEBUGFS 1007 struct ath9k_debug debug; 1008 #endif 1009 struct delayed_work tx_complete_work; 1010 struct delayed_work hw_pll_work; 1011 struct timer_list sleep_timer; 1012 1013 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 1014 struct ath_btcoex btcoex; 1015 struct ath_mci_coex mci_coex; 1016 struct work_struct mci_work; 1017 #endif 1018 1019 struct ath_descdma txsdma; 1020 1021 struct ath_ant_comb ant_comb; 1022 u8 ant_tx, ant_rx; 1023 struct dfs_pattern_detector *dfs_detector; 1024 u64 dfs_prev_pulse_ts; 1025 u32 wow_enabled; 1026 /* relay(fs) channel for spectral scan */ 1027 struct rchan *rfs_chan_spec_scan; 1028 enum spectral_mode spectral_mode; 1029 struct ath_spec_scan spec_config; 1030 1031 struct ieee80211_vif *tx99_vif; 1032 struct sk_buff *tx99_skb; 1033 bool tx99_state; 1034 s16 tx99_power; 1035 1036 #ifdef CONFIG_ATH9K_WOW 1037 atomic_t wow_got_bmiss_intr; 1038 atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */ 1039 u32 wow_intr_before_sleep; 1040 #endif 1041 }; 1042 1043 /********/ 1044 /* TX99 */ 1045 /********/ 1046 1047 #ifdef CONFIG_ATH9K_TX99 1048 void ath9k_tx99_init_debug(struct ath_softc *sc); 1049 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb, 1050 struct ath_tx_control *txctl); 1051 #else 1052 static inline void ath9k_tx99_init_debug(struct ath_softc *sc) 1053 { 1054 } 1055 static inline int ath9k_tx99_send(struct ath_softc *sc, 1056 struct sk_buff *skb, 1057 struct ath_tx_control *txctl) 1058 { 1059 return 0; 1060 } 1061 #endif /* CONFIG_ATH9K_TX99 */ 1062 1063 static inline void ath_read_cachesize(struct ath_common *common, int *csz) 1064 { 1065 common->bus_ops->read_cachesize(common, csz); 1066 } 1067 1068 void ath9k_tasklet(unsigned long data); 1069 int ath_cabq_update(struct ath_softc *); 1070 u8 ath9k_parse_mpdudensity(u8 mpdudensity); 1071 irqreturn_t ath_isr(int irq, void *dev); 1072 int ath_reset(struct ath_softc *sc); 1073 void ath_cancel_work(struct ath_softc *sc); 1074 void ath_restart_work(struct ath_softc *sc); 1075 int ath9k_init_device(u16 devid, struct ath_softc *sc, 1076 const struct ath_bus_ops *bus_ops); 1077 void ath9k_deinit_device(struct ath_softc *sc); 1078 void ath9k_reload_chainmask_settings(struct ath_softc *sc); 1079 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate); 1080 void ath_start_rfkill_poll(struct ath_softc *sc); 1081 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw); 1082 void ath9k_ps_wakeup(struct ath_softc *sc); 1083 void ath9k_ps_restore(struct ath_softc *sc); 1084 1085 #ifdef CONFIG_ATH9K_PCI 1086 int ath_pci_init(void); 1087 void ath_pci_exit(void); 1088 #else 1089 static inline int ath_pci_init(void) { return 0; }; 1090 static inline void ath_pci_exit(void) {}; 1091 #endif 1092 1093 #ifdef CONFIG_ATH9K_AHB 1094 int ath_ahb_init(void); 1095 void ath_ahb_exit(void); 1096 #else 1097 static inline int ath_ahb_init(void) { return 0; }; 1098 static inline void ath_ahb_exit(void) {}; 1099 #endif 1100 1101 #endif /* ATH9K_H */ 1102