1 /* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef ATH9K_H 18 #define ATH9K_H 19 20 #include <linux/etherdevice.h> 21 #include <linux/device.h> 22 #include <linux/interrupt.h> 23 #include <linux/leds.h> 24 #include <linux/completion.h> 25 26 #include "debug.h" 27 #include "common.h" 28 #include "mci.h" 29 #include "dfs.h" 30 31 /* 32 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver 33 * should rely on this file or its contents. 34 */ 35 36 struct ath_node; 37 38 /* Macro to expand scalars to 64-bit objects */ 39 40 #define ito64(x) (sizeof(x) == 1) ? \ 41 (((unsigned long long int)(x)) & (0xff)) : \ 42 (sizeof(x) == 2) ? \ 43 (((unsigned long long int)(x)) & 0xffff) : \ 44 ((sizeof(x) == 4) ? \ 45 (((unsigned long long int)(x)) & 0xffffffff) : \ 46 (unsigned long long int)(x)) 47 48 /* increment with wrap-around */ 49 #define INCR(_l, _sz) do { \ 50 (_l)++; \ 51 (_l) &= ((_sz) - 1); \ 52 } while (0) 53 54 /* decrement with wrap-around */ 55 #define DECR(_l, _sz) do { \ 56 (_l)--; \ 57 (_l) &= ((_sz) - 1); \ 58 } while (0) 59 60 #define TSF_TO_TU(_h,_l) \ 61 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) 62 63 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) 64 65 struct ath_config { 66 u16 txpowlimit; 67 u8 cabqReadytime; 68 }; 69 70 /*************************/ 71 /* Descriptor Management */ 72 /*************************/ 73 74 #define ATH_TXBUF_RESET(_bf) do { \ 75 (_bf)->bf_stale = false; \ 76 (_bf)->bf_lastbf = NULL; \ 77 (_bf)->bf_next = NULL; \ 78 memset(&((_bf)->bf_state), 0, \ 79 sizeof(struct ath_buf_state)); \ 80 } while (0) 81 82 #define ATH_RXBUF_RESET(_bf) do { \ 83 (_bf)->bf_stale = false; \ 84 } while (0) 85 86 /** 87 * enum buffer_type - Buffer type flags 88 * 89 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) 90 * @BUF_AGGR: Indicates whether the buffer can be aggregated 91 * (used in aggregation scheduling) 92 */ 93 enum buffer_type { 94 BUF_AMPDU = BIT(0), 95 BUF_AGGR = BIT(1), 96 }; 97 98 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) 99 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) 100 101 #define ATH_TXSTATUS_RING_SIZE 512 102 103 #define DS2PHYS(_dd, _ds) \ 104 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 105 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0) 106 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096) 107 108 struct ath_descdma { 109 void *dd_desc; 110 dma_addr_t dd_desc_paddr; 111 u32 dd_desc_len; 112 }; 113 114 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, 115 struct list_head *head, const char *name, 116 int nbuf, int ndesc, bool is_tx); 117 118 /***********/ 119 /* RX / TX */ 120 /***********/ 121 122 #define ATH_RXBUF 512 123 #define ATH_TXBUF 512 124 #define ATH_TXBUF_RESERVE 5 125 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE) 126 #define ATH_TXMAXTRY 13 127 128 #define TID_TO_WME_AC(_tid) \ 129 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \ 130 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \ 131 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \ 132 IEEE80211_AC_VO) 133 134 #define ATH_AGGR_DELIM_SZ 4 135 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ 136 /* number of delimiters for encryption padding */ 137 #define ATH_AGGR_ENCRYPTDELIM 10 138 /* minimum h/w qdepth to be sustained to maximize aggregation */ 139 #define ATH_AGGR_MIN_QDEPTH 2 140 /* minimum h/w qdepth for non-aggregated traffic */ 141 #define ATH_NON_AGGR_MIN_QDEPTH 8 142 143 #define IEEE80211_SEQ_SEQ_SHIFT 4 144 #define IEEE80211_SEQ_MAX 4096 145 #define IEEE80211_WEP_IVLEN 3 146 #define IEEE80211_WEP_KIDLEN 1 147 #define IEEE80211_WEP_CRCLEN 4 148 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \ 149 (IEEE80211_WEP_IVLEN + \ 150 IEEE80211_WEP_KIDLEN + \ 151 IEEE80211_WEP_CRCLEN)) 152 153 /* return whether a bit at index _n in bitmap _bm is set 154 * _sz is the size of the bitmap */ 155 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \ 156 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31)))) 157 158 /* return block-ack bitmap index given sequence and starting sequence */ 159 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1)) 160 161 /* return the seqno for _start + _offset */ 162 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1)) 163 164 /* returns delimiter padding required given the packet length */ 165 #define ATH_AGGR_GET_NDELIM(_len) \ 166 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \ 167 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ)) 168 169 #define BAW_WITHIN(_start, _bawsz, _seqno) \ 170 ((((_seqno) - (_start)) & 4095) < (_bawsz)) 171 172 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)]) 173 174 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e)) 175 176 #define ATH_TX_COMPLETE_POLL_INT 1000 177 178 #define ATH_TXFIFO_DEPTH 8 179 struct ath_txq { 180 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */ 181 u32 axq_qnum; /* ath9k hardware queue number */ 182 void *axq_link; 183 struct list_head axq_q; 184 spinlock_t axq_lock; 185 u32 axq_depth; 186 u32 axq_ampdu_depth; 187 bool stopped; 188 bool axq_tx_inprogress; 189 struct list_head axq_acq; 190 struct list_head txq_fifo[ATH_TXFIFO_DEPTH]; 191 u8 txq_headidx; 192 u8 txq_tailidx; 193 int pending_frames; 194 struct sk_buff_head complete_q; 195 }; 196 197 struct ath_atx_ac { 198 struct ath_txq *txq; 199 int sched; 200 struct list_head list; 201 struct list_head tid_q; 202 bool clear_ps_filter; 203 }; 204 205 struct ath_frame_info { 206 struct ath_buf *bf; 207 int framelen; 208 enum ath9k_key_type keytype; 209 u8 keyix; 210 u8 rtscts_rate; 211 u8 retries : 7; 212 u8 baw_tracked : 1; 213 }; 214 215 struct ath_buf_state { 216 u8 bf_type; 217 u8 bfs_paprd; 218 u8 ndelim; 219 u16 seqno; 220 unsigned long bfs_paprd_timestamp; 221 }; 222 223 struct ath_buf { 224 struct list_head list; 225 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or 226 an aggregate) */ 227 struct ath_buf *bf_next; /* next subframe in the aggregate */ 228 struct sk_buff *bf_mpdu; /* enclosing frame structure */ 229 void *bf_desc; /* virtual addr of desc */ 230 dma_addr_t bf_daddr; /* physical addr of desc */ 231 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */ 232 bool bf_stale; 233 struct ieee80211_tx_rate rates[4]; 234 struct ath_buf_state bf_state; 235 }; 236 237 struct ath_atx_tid { 238 struct list_head list; 239 struct sk_buff_head buf_q; 240 struct sk_buff_head retry_q; 241 struct ath_node *an; 242 struct ath_atx_ac *ac; 243 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)]; 244 int bar_index; 245 u16 seq_start; 246 u16 seq_next; 247 u16 baw_size; 248 int tidno; 249 int baw_head; /* first un-acked tx buffer */ 250 int baw_tail; /* next unused tx buffer slot */ 251 bool sched; 252 bool paused; 253 bool active; 254 }; 255 256 struct ath_node { 257 struct ath_softc *sc; 258 struct ieee80211_sta *sta; /* station struct we're part of */ 259 struct ieee80211_vif *vif; /* interface with which we're associated */ 260 struct ath_atx_tid tid[IEEE80211_NUM_TIDS]; 261 struct ath_atx_ac ac[IEEE80211_NUM_ACS]; 262 int ps_key; 263 264 u16 maxampdu; 265 u8 mpdudensity; 266 267 bool sleeping; 268 269 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS) 270 struct dentry *node_stat; 271 #endif 272 }; 273 274 struct ath_tx_control { 275 struct ath_txq *txq; 276 struct ath_node *an; 277 u8 paprd; 278 struct ieee80211_sta *sta; 279 }; 280 281 #define ATH_TX_ERROR 0x01 282 283 /** 284 * @txq_map: Index is mac80211 queue number. This is 285 * not necessarily the same as the hardware queue number 286 * (axq_qnum). 287 */ 288 struct ath_tx { 289 u16 seq_no; 290 u32 txqsetup; 291 spinlock_t txbuflock; 292 struct list_head txbuf; 293 struct ath_txq txq[ATH9K_NUM_TX_QUEUES]; 294 struct ath_descdma txdma; 295 struct ath_txq *txq_map[IEEE80211_NUM_ACS]; 296 struct ath_txq *uapsdq; 297 u32 txq_max_pending[IEEE80211_NUM_ACS]; 298 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32]; 299 }; 300 301 struct ath_rx_edma { 302 struct sk_buff_head rx_fifo; 303 u32 rx_fifo_hwsize; 304 }; 305 306 struct ath_rx { 307 u8 defant; 308 u8 rxotherant; 309 bool discard_next; 310 u32 *rxlink; 311 u32 num_pkts; 312 unsigned int rxfilter; 313 struct list_head rxbuf; 314 struct ath_descdma rxdma; 315 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX]; 316 317 struct sk_buff *frag; 318 319 u32 ampdu_ref; 320 }; 321 322 int ath_startrecv(struct ath_softc *sc); 323 bool ath_stoprecv(struct ath_softc *sc); 324 u32 ath_calcrxfilter(struct ath_softc *sc); 325 int ath_rx_init(struct ath_softc *sc, int nbufs); 326 void ath_rx_cleanup(struct ath_softc *sc); 327 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp); 328 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype); 329 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq); 330 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq); 331 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq); 332 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); 333 bool ath_drain_all_txq(struct ath_softc *sc); 334 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq); 335 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an); 336 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an); 337 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); 338 int ath_tx_init(struct ath_softc *sc, int nbufs); 339 int ath_txq_update(struct ath_softc *sc, int qnum, 340 struct ath9k_tx_queue_info *q); 341 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop); 342 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, 343 struct ath_tx_control *txctl); 344 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 345 struct sk_buff *skb); 346 void ath_tx_tasklet(struct ath_softc *sc); 347 void ath_tx_edma_tasklet(struct ath_softc *sc); 348 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, 349 u16 tid, u16 *ssn); 350 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 351 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 352 353 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an); 354 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc, 355 struct ath_node *an); 356 void ath9k_release_buffered_frames(struct ieee80211_hw *hw, 357 struct ieee80211_sta *sta, 358 u16 tids, int nframes, 359 enum ieee80211_frame_release_type reason, 360 bool more_data); 361 362 /********/ 363 /* VIFs */ 364 /********/ 365 366 struct ath_vif { 367 int av_bslot; 368 bool primary_sta_vif; 369 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */ 370 struct ath_buf *av_bcbuf; 371 }; 372 373 /*******************/ 374 /* Beacon Handling */ 375 /*******************/ 376 377 /* 378 * Regardless of the number of beacons we stagger, (i.e. regardless of the 379 * number of BSSIDs) if a given beacon does not go out even after waiting this 380 * number of beacon intervals, the game's up. 381 */ 382 #define BSTUCK_THRESH 9 383 #define ATH_BCBUF 8 384 #define ATH_DEFAULT_BINTVAL 100 /* TU */ 385 #define ATH_DEFAULT_BMISS_LIMIT 10 386 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024) 387 388 struct ath_beacon_config { 389 int beacon_interval; 390 u16 listen_interval; 391 u16 dtim_period; 392 u16 bmiss_timeout; 393 u8 dtim_count; 394 bool enable_beacon; 395 bool ibss_creator; 396 }; 397 398 struct ath_beacon { 399 enum { 400 OK, /* no change needed */ 401 UPDATE, /* update pending */ 402 COMMIT /* beacon sent, commit change */ 403 } updateslot; /* slot time update fsm */ 404 405 u32 beaconq; 406 u32 bmisscnt; 407 u32 bc_tstamp; 408 struct ieee80211_vif *bslot[ATH_BCBUF]; 409 int slottime; 410 int slotupdate; 411 struct ath9k_tx_queue_info beacon_qi; 412 struct ath_descdma bdma; 413 struct ath_txq *cabq; 414 struct list_head bbuf; 415 416 bool tx_processed; 417 bool tx_last; 418 }; 419 420 void ath9k_beacon_tasklet(unsigned long data); 421 bool ath9k_allow_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif); 422 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif, 423 u32 changed); 424 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 425 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 426 void ath9k_set_tsfadjust(struct ath_softc *sc, struct ieee80211_vif *vif); 427 void ath9k_set_beacon(struct ath_softc *sc); 428 429 /*******************/ 430 /* Link Monitoring */ 431 /*******************/ 432 433 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */ 434 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */ 435 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */ 436 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */ 437 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */ 438 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ 439 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ 440 #define ATH_ANI_MAX_SKIP_COUNT 10 441 442 #define ATH_PAPRD_TIMEOUT 100 /* msecs */ 443 #define ATH_PLL_WORK_INTERVAL 100 444 445 void ath_tx_complete_poll_work(struct work_struct *work); 446 void ath_reset_work(struct work_struct *work); 447 void ath_hw_check(struct work_struct *work); 448 void ath_hw_pll_work(struct work_struct *work); 449 void ath_rx_poll(unsigned long data); 450 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon); 451 void ath_paprd_calibrate(struct work_struct *work); 452 void ath_ani_calibrate(unsigned long data); 453 void ath_start_ani(struct ath_softc *sc); 454 void ath_stop_ani(struct ath_softc *sc); 455 void ath_check_ani(struct ath_softc *sc); 456 int ath_update_survey_stats(struct ath_softc *sc); 457 void ath_update_survey_nf(struct ath_softc *sc, int channel); 458 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type); 459 460 /**********/ 461 /* BTCOEX */ 462 /**********/ 463 464 #define ATH_DUMP_BTCOEX(_s, _val) \ 465 do { \ 466 len += snprintf(buf + len, size - len, \ 467 "%20s : %10d\n", _s, (_val)); \ 468 } while (0) 469 470 enum bt_op_flags { 471 BT_OP_PRIORITY_DETECTED, 472 BT_OP_SCAN, 473 }; 474 475 struct ath_btcoex { 476 bool hw_timer_enabled; 477 spinlock_t btcoex_lock; 478 struct timer_list period_timer; /* Timer for BT period */ 479 u32 bt_priority_cnt; 480 unsigned long bt_priority_time; 481 unsigned long op_flags; 482 int bt_stomp_type; /* Types of BT stomping */ 483 u32 btcoex_no_stomp; /* in usec */ 484 u32 btcoex_period; /* in msec */ 485 u32 btscan_no_stomp; /* in usec */ 486 u32 duty_cycle; 487 u32 bt_wait_time; 488 int rssi_count; 489 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */ 490 struct ath_mci_profile mci; 491 u8 stomp_audio; 492 }; 493 494 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 495 int ath9k_init_btcoex(struct ath_softc *sc); 496 void ath9k_deinit_btcoex(struct ath_softc *sc); 497 void ath9k_start_btcoex(struct ath_softc *sc); 498 void ath9k_stop_btcoex(struct ath_softc *sc); 499 void ath9k_btcoex_timer_resume(struct ath_softc *sc); 500 void ath9k_btcoex_timer_pause(struct ath_softc *sc); 501 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status); 502 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen); 503 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc); 504 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size); 505 #else 506 static inline int ath9k_init_btcoex(struct ath_softc *sc) 507 { 508 return 0; 509 } 510 static inline void ath9k_deinit_btcoex(struct ath_softc *sc) 511 { 512 } 513 static inline void ath9k_start_btcoex(struct ath_softc *sc) 514 { 515 } 516 static inline void ath9k_stop_btcoex(struct ath_softc *sc) 517 { 518 } 519 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, 520 u32 status) 521 { 522 } 523 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, 524 u32 max_4ms_framelen) 525 { 526 return 0; 527 } 528 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc) 529 { 530 } 531 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size) 532 { 533 return 0; 534 } 535 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ 536 537 struct ath9k_wow_pattern { 538 u8 pattern_bytes[MAX_PATTERN_SIZE]; 539 u8 mask_bytes[MAX_PATTERN_SIZE]; 540 u32 pattern_len; 541 }; 542 543 /********************/ 544 /* LED Control */ 545 /********************/ 546 547 #define ATH_LED_PIN_DEF 1 548 #define ATH_LED_PIN_9287 8 549 #define ATH_LED_PIN_9300 10 550 #define ATH_LED_PIN_9485 6 551 #define ATH_LED_PIN_9462 4 552 553 #ifdef CONFIG_MAC80211_LEDS 554 void ath_init_leds(struct ath_softc *sc); 555 void ath_deinit_leds(struct ath_softc *sc); 556 void ath_fill_led_pin(struct ath_softc *sc); 557 #else 558 static inline void ath_init_leds(struct ath_softc *sc) 559 { 560 } 561 562 static inline void ath_deinit_leds(struct ath_softc *sc) 563 { 564 } 565 static inline void ath_fill_led_pin(struct ath_softc *sc) 566 { 567 } 568 #endif 569 570 /*******************************/ 571 /* Antenna diversity/combining */ 572 /*******************************/ 573 574 #define ATH_ANT_RX_CURRENT_SHIFT 4 575 #define ATH_ANT_RX_MAIN_SHIFT 2 576 #define ATH_ANT_RX_MASK 0x3 577 578 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50 579 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100 580 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200 581 #define ATH_ANT_DIV_COMB_INIT_COUNT 95 582 #define ATH_ANT_DIV_COMB_MAX_COUNT 100 583 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30 584 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20 585 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50 586 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50 587 588 #define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1 589 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4 590 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2 591 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2 592 593 struct ath_ant_comb { 594 u16 count; 595 u16 total_pkt_count; 596 bool scan; 597 bool scan_not_start; 598 int main_total_rssi; 599 int alt_total_rssi; 600 int alt_recv_cnt; 601 int main_recv_cnt; 602 int rssi_lna1; 603 int rssi_lna2; 604 int rssi_add; 605 int rssi_sub; 606 int rssi_first; 607 int rssi_second; 608 int rssi_third; 609 int ant_ratio; 610 int ant_ratio2; 611 bool alt_good; 612 int quick_scan_cnt; 613 enum ath9k_ant_div_comb_lna_conf main_conf; 614 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf; 615 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf; 616 bool first_ratio; 617 bool second_ratio; 618 unsigned long scan_start_time; 619 620 /* 621 * Card-specific config values. 622 */ 623 int low_rssi_thresh; 624 int fast_div_bias; 625 }; 626 627 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs); 628 629 /********************/ 630 /* Main driver core */ 631 /********************/ 632 633 #define ATH9K_PCI_CUS198 0x0001 634 #define ATH9K_PCI_CUS230 0x0002 635 #define ATH9K_PCI_CUS217 0x0004 636 #define ATH9K_PCI_WOW 0x0008 637 #define ATH9K_PCI_BT_ANT_DIV 0x0010 638 639 /* 640 * Default cache line size, in bytes. 641 * Used when PCI device not fully initialized by bootrom/BIOS 642 */ 643 #define DEFAULT_CACHELINE 32 644 #define ATH_REGCLASSIDS_MAX 10 645 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ 646 #define ATH_MAX_SW_RETRIES 30 647 #define ATH_CHAN_MAX 255 648 649 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */ 650 #define ATH_RATE_DUMMY_MARKER 0 651 652 enum sc_op_flags { 653 SC_OP_INVALID, 654 SC_OP_BEACONS, 655 SC_OP_ANI_RUN, 656 SC_OP_PRIM_STA_VIF, 657 SC_OP_HW_RESET, 658 SC_OP_SCANNING, 659 }; 660 661 /* Powersave flags */ 662 #define PS_WAIT_FOR_BEACON BIT(0) 663 #define PS_WAIT_FOR_CAB BIT(1) 664 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2) 665 #define PS_WAIT_FOR_TX_ACK BIT(3) 666 #define PS_BEACON_SYNC BIT(4) 667 #define PS_WAIT_FOR_ANI BIT(5) 668 669 struct ath_rate_table; 670 671 struct ath9k_vif_iter_data { 672 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */ 673 u8 mask[ETH_ALEN]; /* bssid mask */ 674 bool has_hw_macaddr; 675 676 int naps; /* number of AP vifs */ 677 int nmeshes; /* number of mesh vifs */ 678 int nstations; /* number of station vifs */ 679 int nwds; /* number of WDS vifs */ 680 int nadhocs; /* number of adhoc vifs */ 681 }; 682 683 /* enum spectral_mode: 684 * 685 * @SPECTRAL_DISABLED: spectral mode is disabled 686 * @SPECTRAL_BACKGROUND: hardware sends samples when it is not busy with 687 * something else. 688 * @SPECTRAL_MANUAL: spectral scan is enabled, triggering for samples 689 * is performed manually. 690 * @SPECTRAL_CHANSCAN: Like manual, but also triggered when changing channels 691 * during a channel scan. 692 */ 693 enum spectral_mode { 694 SPECTRAL_DISABLED = 0, 695 SPECTRAL_BACKGROUND, 696 SPECTRAL_MANUAL, 697 SPECTRAL_CHANSCAN, 698 }; 699 700 struct ath_softc { 701 struct ieee80211_hw *hw; 702 struct device *dev; 703 704 struct survey_info *cur_survey; 705 struct survey_info survey[ATH9K_NUM_CHANNELS]; 706 707 struct tasklet_struct intr_tq; 708 struct tasklet_struct bcon_tasklet; 709 struct ath_hw *sc_ah; 710 void __iomem *mem; 711 int irq; 712 spinlock_t sc_serial_rw; 713 spinlock_t sc_pm_lock; 714 spinlock_t sc_pcu_lock; 715 struct mutex mutex; 716 struct work_struct paprd_work; 717 struct work_struct hw_check_work; 718 struct work_struct hw_reset_work; 719 struct completion paprd_complete; 720 721 unsigned int hw_busy_count; 722 unsigned long sc_flags; 723 unsigned long driver_data; 724 725 u32 intrstatus; 726 u16 ps_flags; /* PS_* */ 727 u16 curtxpow; 728 bool ps_enabled; 729 bool ps_idle; 730 short nbcnvifs; 731 short nvifs; 732 unsigned long ps_usecount; 733 734 struct ath_config config; 735 struct ath_rx rx; 736 struct ath_tx tx; 737 struct ath_beacon beacon; 738 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 739 740 #ifdef CONFIG_MAC80211_LEDS 741 bool led_registered; 742 char led_name[32]; 743 struct led_classdev led_cdev; 744 #endif 745 746 struct ath9k_hw_cal_data caldata; 747 int last_rssi; 748 749 #ifdef CONFIG_ATH9K_DEBUGFS 750 struct ath9k_debug debug; 751 #endif 752 struct ath_beacon_config cur_beacon_conf; 753 struct delayed_work tx_complete_work; 754 struct delayed_work hw_pll_work; 755 struct timer_list rx_poll_timer; 756 757 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 758 struct ath_btcoex btcoex; 759 struct ath_mci_coex mci_coex; 760 struct work_struct mci_work; 761 #endif 762 763 struct ath_descdma txsdma; 764 765 struct ath_ant_comb ant_comb; 766 u8 ant_tx, ant_rx; 767 struct dfs_pattern_detector *dfs_detector; 768 u32 wow_enabled; 769 /* relay(fs) channel for spectral scan */ 770 struct rchan *rfs_chan_spec_scan; 771 enum spectral_mode spectral_mode; 772 struct ath_spec_scan spec_config; 773 774 #ifdef CONFIG_PM_SLEEP 775 atomic_t wow_got_bmiss_intr; 776 atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */ 777 u32 wow_intr_before_sleep; 778 #endif 779 }; 780 781 #define SPECTRAL_SCAN_BITMASK 0x10 782 /* Radar info packet format, used for DFS and spectral formats. */ 783 struct ath_radar_info { 784 u8 pulse_length_pri; 785 u8 pulse_length_ext; 786 u8 pulse_bw_info; 787 } __packed; 788 789 /* The HT20 spectral data has 4 bytes of additional information at it's end. 790 * 791 * [7:0]: all bins {max_magnitude[1:0], bitmap_weight[5:0]} 792 * [7:0]: all bins max_magnitude[9:2] 793 * [7:0]: all bins {max_index[5:0], max_magnitude[11:10]} 794 * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned) 795 */ 796 struct ath_ht20_mag_info { 797 u8 all_bins[3]; 798 u8 max_exp; 799 } __packed; 800 801 #define SPECTRAL_HT20_NUM_BINS 56 802 803 /* WARNING: don't actually use this struct! MAC may vary the amount of 804 * data by -1/+2. This struct is for reference only. 805 */ 806 struct ath_ht20_fft_packet { 807 u8 data[SPECTRAL_HT20_NUM_BINS]; 808 struct ath_ht20_mag_info mag_info; 809 struct ath_radar_info radar_info; 810 } __packed; 811 812 #define SPECTRAL_HT20_TOTAL_DATA_LEN (sizeof(struct ath_ht20_fft_packet)) 813 814 /* Dynamic 20/40 mode: 815 * 816 * [7:0]: lower bins {max_magnitude[1:0], bitmap_weight[5:0]} 817 * [7:0]: lower bins max_magnitude[9:2] 818 * [7:0]: lower bins {max_index[5:0], max_magnitude[11:10]} 819 * [7:0]: upper bins {max_magnitude[1:0], bitmap_weight[5:0]} 820 * [7:0]: upper bins max_magnitude[9:2] 821 * [7:0]: upper bins {max_index[5:0], max_magnitude[11:10]} 822 * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned) 823 */ 824 struct ath_ht20_40_mag_info { 825 u8 lower_bins[3]; 826 u8 upper_bins[3]; 827 u8 max_exp; 828 } __packed; 829 830 #define SPECTRAL_HT20_40_NUM_BINS 128 831 832 /* WARNING: don't actually use this struct! MAC may vary the amount of 833 * data. This struct is for reference only. 834 */ 835 struct ath_ht20_40_fft_packet { 836 u8 data[SPECTRAL_HT20_40_NUM_BINS]; 837 struct ath_ht20_40_mag_info mag_info; 838 struct ath_radar_info radar_info; 839 } __packed; 840 841 842 #define SPECTRAL_HT20_40_TOTAL_DATA_LEN (sizeof(struct ath_ht20_40_fft_packet)) 843 844 /* grabs the max magnitude from the all/upper/lower bins */ 845 static inline u16 spectral_max_magnitude(u8 *bins) 846 { 847 return (bins[0] & 0xc0) >> 6 | 848 (bins[1] & 0xff) << 2 | 849 (bins[2] & 0x03) << 10; 850 } 851 852 /* return the max magnitude from the all/upper/lower bins */ 853 static inline u8 spectral_max_index(u8 *bins) 854 { 855 s8 m = (bins[2] & 0xfc) >> 2; 856 857 /* TODO: this still doesn't always report the right values ... */ 858 if (m > 32) 859 m |= 0xe0; 860 else 861 m &= ~0xe0; 862 863 return m + 29; 864 } 865 866 /* return the bitmap weight from the all/upper/lower bins */ 867 static inline u8 spectral_bitmap_weight(u8 *bins) 868 { 869 return bins[0] & 0x3f; 870 } 871 872 /* FFT sample format given to userspace via debugfs. 873 * 874 * Please keep the type/length at the front position and change 875 * other fields after adding another sample type 876 * 877 * TODO: this might need rework when switching to nl80211-based 878 * interface. 879 */ 880 enum ath_fft_sample_type { 881 ATH_FFT_SAMPLE_HT20 = 1, 882 }; 883 884 struct fft_sample_tlv { 885 u8 type; /* see ath_fft_sample */ 886 __be16 length; 887 /* type dependent data follows */ 888 } __packed; 889 890 struct fft_sample_ht20 { 891 struct fft_sample_tlv tlv; 892 893 u8 max_exp; 894 895 __be16 freq; 896 s8 rssi; 897 s8 noise; 898 899 __be16 max_magnitude; 900 u8 max_index; 901 u8 bitmap_weight; 902 903 __be64 tsf; 904 905 u8 data[SPECTRAL_HT20_NUM_BINS]; 906 } __packed; 907 908 void ath9k_tasklet(unsigned long data); 909 int ath_cabq_update(struct ath_softc *); 910 911 static inline void ath_read_cachesize(struct ath_common *common, int *csz) 912 { 913 common->bus_ops->read_cachesize(common, csz); 914 } 915 916 extern struct ieee80211_ops ath9k_ops; 917 extern int ath9k_modparam_nohwcrypt; 918 extern int led_blink; 919 extern bool is_ath9k_unloaded; 920 921 u8 ath9k_parse_mpdudensity(u8 mpdudensity); 922 irqreturn_t ath_isr(int irq, void *dev); 923 int ath9k_init_device(u16 devid, struct ath_softc *sc, 924 const struct ath_bus_ops *bus_ops); 925 void ath9k_deinit_device(struct ath_softc *sc); 926 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw); 927 void ath9k_reload_chainmask_settings(struct ath_softc *sc); 928 929 bool ath9k_uses_beacons(int type); 930 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw); 931 int ath9k_spectral_scan_config(struct ieee80211_hw *hw, 932 enum spectral_mode spectral_mode); 933 934 935 #ifdef CONFIG_ATH9K_PCI 936 int ath_pci_init(void); 937 void ath_pci_exit(void); 938 #else 939 static inline int ath_pci_init(void) { return 0; }; 940 static inline void ath_pci_exit(void) {}; 941 #endif 942 943 #ifdef CONFIG_ATH9K_AHB 944 int ath_ahb_init(void); 945 void ath_ahb_exit(void); 946 #else 947 static inline int ath_ahb_init(void) { return 0; }; 948 static inline void ath_ahb_exit(void) {}; 949 #endif 950 951 void ath9k_ps_wakeup(struct ath_softc *sc); 952 void ath9k_ps_restore(struct ath_softc *sc); 953 954 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate); 955 956 void ath_start_rfkill_poll(struct ath_softc *sc); 957 extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw); 958 void ath9k_calculate_iter_data(struct ieee80211_hw *hw, 959 struct ieee80211_vif *vif, 960 struct ath9k_vif_iter_data *iter_data); 961 962 #endif /* ATH9K_H */ 963