1 /* 2 * Copyright (c) 2010-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef AR9003_MCI_H 18 #define AR9003_MCI_H 19 20 #define MCI_FLAG_DISABLE_TIMESTAMP 0x00000001 /* Disable time stamp */ 21 #define MCI_RECOVERY_DUR_TSF (100 * 1000) /* 100 ms */ 22 23 /* Default remote BT device MCI COEX version */ 24 #define MCI_GPM_COEX_MAJOR_VERSION_DEFAULT 3 25 #define MCI_GPM_COEX_MINOR_VERSION_DEFAULT 0 26 27 /* Local WLAN MCI COEX version */ 28 #define MCI_GPM_COEX_MAJOR_VERSION_WLAN 3 29 #define MCI_GPM_COEX_MINOR_VERSION_WLAN 0 30 31 enum mci_gpm_coex_query_type { 32 MCI_GPM_COEX_QUERY_BT_ALL_INFO = BIT(0), 33 MCI_GPM_COEX_QUERY_BT_TOPOLOGY = BIT(1), 34 MCI_GPM_COEX_QUERY_BT_DEBUG = BIT(2), 35 }; 36 37 enum mci_gpm_coex_halt_bt_gpm { 38 MCI_GPM_COEX_BT_GPM_UNHALT, 39 MCI_GPM_COEX_BT_GPM_HALT 40 }; 41 42 enum mci_gpm_coex_bt_update_flags_op { 43 MCI_GPM_COEX_BT_FLAGS_READ, 44 MCI_GPM_COEX_BT_FLAGS_SET, 45 MCI_GPM_COEX_BT_FLAGS_CLEAR 46 }; 47 48 #define MCI_NUM_BT_CHANNELS 79 49 50 #define MCI_BT_MCI_FLAGS_UPDATE_CORR 0x00000002 51 #define MCI_BT_MCI_FLAGS_UPDATE_HDR 0x00000004 52 #define MCI_BT_MCI_FLAGS_UPDATE_PLD 0x00000008 53 #define MCI_BT_MCI_FLAGS_LNA_CTRL 0x00000010 54 #define MCI_BT_MCI_FLAGS_DEBUG 0x00000020 55 #define MCI_BT_MCI_FLAGS_SCHED_MSG 0x00000040 56 #define MCI_BT_MCI_FLAGS_CONT_MSG 0x00000080 57 #define MCI_BT_MCI_FLAGS_COEX_GPM 0x00000100 58 #define MCI_BT_MCI_FLAGS_CPU_INT_MSG 0x00000200 59 #define MCI_BT_MCI_FLAGS_MCI_MODE 0x00000400 60 #define MCI_BT_MCI_FLAGS_AR9462_MODE 0x00001000 61 #define MCI_BT_MCI_FLAGS_OTHER 0x00010000 62 63 #define MCI_DEFAULT_BT_MCI_FLAGS 0x00011dde 64 65 #define MCI_TOGGLE_BT_MCI_FLAGS (MCI_BT_MCI_FLAGS_UPDATE_CORR | \ 66 MCI_BT_MCI_FLAGS_UPDATE_HDR | \ 67 MCI_BT_MCI_FLAGS_UPDATE_PLD | \ 68 MCI_BT_MCI_FLAGS_MCI_MODE) 69 70 #define MCI_2G_FLAGS_CLEAR_MASK 0x00000000 71 #define MCI_2G_FLAGS_SET_MASK MCI_TOGGLE_BT_MCI_FLAGS 72 #define MCI_2G_FLAGS MCI_DEFAULT_BT_MCI_FLAGS 73 74 #define MCI_5G_FLAGS_CLEAR_MASK MCI_TOGGLE_BT_MCI_FLAGS 75 #define MCI_5G_FLAGS_SET_MASK 0x00000000 76 #define MCI_5G_FLAGS (MCI_DEFAULT_BT_MCI_FLAGS & \ 77 ~MCI_TOGGLE_BT_MCI_FLAGS) 78 79 /* 80 * Default value for AR9462 is 0x00002201 81 */ 82 #define ATH_MCI_CONFIG_CONCUR_TX 0x00000003 83 #define ATH_MCI_CONFIG_MCI_OBS_MCI 0x00000004 84 #define ATH_MCI_CONFIG_MCI_OBS_TXRX 0x00000008 85 #define ATH_MCI_CONFIG_MCI_OBS_BT 0x00000010 86 #define ATH_MCI_CONFIG_DISABLE_MCI_CAL 0x00000020 87 #define ATH_MCI_CONFIG_DISABLE_OSLA 0x00000040 88 #define ATH_MCI_CONFIG_DISABLE_FTP_STOMP 0x00000080 89 #define ATH_MCI_CONFIG_AGGR_THRESH 0x00000700 90 #define ATH_MCI_CONFIG_AGGR_THRESH_S 8 91 #define ATH_MCI_CONFIG_DISABLE_AGGR_THRESH 0x00000800 92 #define ATH_MCI_CONFIG_CLK_DIV 0x00003000 93 #define ATH_MCI_CONFIG_CLK_DIV_S 12 94 #define ATH_MCI_CONFIG_DISABLE_TUNING 0x00004000 95 #define ATH_MCI_CONFIG_MCI_WEIGHT_DBG 0x40000000 96 #define ATH_MCI_CONFIG_DISABLE_MCI 0x80000000 97 98 #define ATH_MCI_CONFIG_MCI_OBS_MASK (ATH_MCI_CONFIG_MCI_OBS_MCI | \ 99 ATH_MCI_CONFIG_MCI_OBS_TXRX | \ 100 ATH_MCI_CONFIG_MCI_OBS_BT) 101 #define ATH_MCI_CONFIG_MCI_OBS_GPIO 0x0000002F 102 103 enum mci_message_header { /* length of payload */ 104 MCI_LNA_CTRL = 0x10, /* len = 0 */ 105 MCI_CONT_NACK = 0x20, /* len = 0 */ 106 MCI_CONT_INFO = 0x30, /* len = 4 */ 107 MCI_CONT_RST = 0x40, /* len = 0 */ 108 MCI_SCHD_INFO = 0x50, /* len = 16 */ 109 MCI_CPU_INT = 0x60, /* len = 4 */ 110 MCI_SYS_WAKING = 0x70, /* len = 0 */ 111 MCI_GPM = 0x80, /* len = 16 */ 112 MCI_LNA_INFO = 0x90, /* len = 1 */ 113 MCI_LNA_STATE = 0x94, 114 MCI_LNA_TAKE = 0x98, 115 MCI_LNA_TRANS = 0x9c, 116 MCI_SYS_SLEEPING = 0xa0, /* len = 0 */ 117 MCI_REQ_WAKE = 0xc0, /* len = 0 */ 118 MCI_DEBUG_16 = 0xfe, /* len = 2 */ 119 MCI_REMOTE_RESET = 0xff /* len = 16 */ 120 }; 121 122 enum ath_mci_gpm_coex_profile_type { 123 MCI_GPM_COEX_PROFILE_UNKNOWN, 124 MCI_GPM_COEX_PROFILE_RFCOMM, 125 MCI_GPM_COEX_PROFILE_A2DP, 126 MCI_GPM_COEX_PROFILE_HID, 127 MCI_GPM_COEX_PROFILE_BNEP, 128 MCI_GPM_COEX_PROFILE_VOICE, 129 MCI_GPM_COEX_PROFILE_A2DPVO, 130 MCI_GPM_COEX_PROFILE_MAX 131 }; 132 133 /* MCI GPM/Coex opcode/type definitions */ 134 enum { 135 MCI_GPM_COEX_W_GPM_PAYLOAD = 1, 136 MCI_GPM_COEX_B_GPM_TYPE = 4, 137 MCI_GPM_COEX_B_GPM_OPCODE = 5, 138 /* MCI_GPM_WLAN_CAL_REQ, MCI_GPM_WLAN_CAL_DONE */ 139 MCI_GPM_WLAN_CAL_W_SEQUENCE = 2, 140 141 /* MCI_GPM_COEX_VERSION_QUERY */ 142 /* MCI_GPM_COEX_VERSION_RESPONSE */ 143 MCI_GPM_COEX_B_MAJOR_VERSION = 6, 144 MCI_GPM_COEX_B_MINOR_VERSION = 7, 145 /* MCI_GPM_COEX_STATUS_QUERY */ 146 MCI_GPM_COEX_B_BT_BITMAP = 6, 147 MCI_GPM_COEX_B_WLAN_BITMAP = 7, 148 /* MCI_GPM_COEX_HALT_BT_GPM */ 149 MCI_GPM_COEX_B_HALT_STATE = 6, 150 /* MCI_GPM_COEX_WLAN_CHANNELS */ 151 MCI_GPM_COEX_B_CHANNEL_MAP = 6, 152 /* MCI_GPM_COEX_BT_PROFILE_INFO */ 153 MCI_GPM_COEX_B_PROFILE_TYPE = 6, 154 MCI_GPM_COEX_B_PROFILE_LINKID = 7, 155 MCI_GPM_COEX_B_PROFILE_STATE = 8, 156 MCI_GPM_COEX_B_PROFILE_ROLE = 9, 157 MCI_GPM_COEX_B_PROFILE_RATE = 10, 158 MCI_GPM_COEX_B_PROFILE_VOTYPE = 11, 159 MCI_GPM_COEX_H_PROFILE_T = 12, 160 MCI_GPM_COEX_B_PROFILE_W = 14, 161 MCI_GPM_COEX_B_PROFILE_A = 15, 162 /* MCI_GPM_COEX_BT_STATUS_UPDATE */ 163 MCI_GPM_COEX_B_STATUS_TYPE = 6, 164 MCI_GPM_COEX_B_STATUS_LINKID = 7, 165 MCI_GPM_COEX_B_STATUS_STATE = 8, 166 /* MCI_GPM_COEX_BT_UPDATE_FLAGS */ 167 MCI_GPM_COEX_W_BT_FLAGS = 6, 168 MCI_GPM_COEX_B_BT_FLAGS_OP = 10 169 }; 170 171 enum mci_gpm_subtype { 172 MCI_GPM_BT_CAL_REQ = 0, 173 MCI_GPM_BT_CAL_GRANT = 1, 174 MCI_GPM_BT_CAL_DONE = 2, 175 MCI_GPM_WLAN_CAL_REQ = 3, 176 MCI_GPM_WLAN_CAL_GRANT = 4, 177 MCI_GPM_WLAN_CAL_DONE = 5, 178 MCI_GPM_COEX_AGENT = 0x0c, 179 MCI_GPM_RSVD_PATTERN = 0xfe, 180 MCI_GPM_RSVD_PATTERN32 = 0xfefefefe, 181 MCI_GPM_BT_DEBUG = 0xff 182 }; 183 184 enum mci_bt_state { 185 MCI_BT_SLEEP, 186 MCI_BT_AWAKE, 187 MCI_BT_CAL_START, 188 MCI_BT_CAL 189 }; 190 191 /* Type of state query */ 192 enum mci_state_type { 193 MCI_STATE_ENABLE, 194 MCI_STATE_SET_BT_AWAKE, 195 MCI_STATE_LAST_SCHD_MSG_OFFSET, 196 MCI_STATE_REMOTE_SLEEP, 197 MCI_STATE_RESET_REQ_WAKE, 198 MCI_STATE_SEND_WLAN_COEX_VERSION, 199 MCI_STATE_SEND_VERSION_QUERY, 200 MCI_STATE_SEND_STATUS_QUERY, 201 MCI_STATE_RECOVER_RX, 202 MCI_STATE_NEED_FTP_STOMP, 203 MCI_STATE_DEBUG, 204 MCI_STATE_NEED_FLUSH_BT_INFO, 205 MCI_STATE_MAX 206 }; 207 208 enum mci_gpm_coex_opcode { 209 MCI_GPM_COEX_VERSION_QUERY, 210 MCI_GPM_COEX_VERSION_RESPONSE, 211 MCI_GPM_COEX_STATUS_QUERY, 212 MCI_GPM_COEX_HALT_BT_GPM, 213 MCI_GPM_COEX_WLAN_CHANNELS, 214 MCI_GPM_COEX_BT_PROFILE_INFO, 215 MCI_GPM_COEX_BT_STATUS_UPDATE, 216 MCI_GPM_COEX_BT_UPDATE_FLAGS, 217 MCI_GPM_COEX_NOOP, 218 }; 219 220 #define MCI_GPM_NOMORE 0 221 #define MCI_GPM_MORE 1 222 #define MCI_GPM_INVALID 0xffffffff 223 224 #define MCI_GPM_RECYCLE(_p_gpm) do { \ 225 *(((u32 *)_p_gpm) + MCI_GPM_COEX_W_GPM_PAYLOAD) = \ 226 MCI_GPM_RSVD_PATTERN32; \ 227 } while (0) 228 229 #define MCI_GPM_TYPE(_p_gpm) \ 230 (*(((u8 *)(_p_gpm)) + MCI_GPM_COEX_B_GPM_TYPE) & 0xff) 231 232 #define MCI_GPM_OPCODE(_p_gpm) \ 233 (*(((u8 *)(_p_gpm)) + MCI_GPM_COEX_B_GPM_OPCODE) & 0xff) 234 235 #define MCI_GPM_SET_CAL_TYPE(_p_gpm, _cal_type) do { \ 236 *(((u8 *)(_p_gpm)) + MCI_GPM_COEX_B_GPM_TYPE) = (_cal_type) & 0xff;\ 237 } while (0) 238 239 #define MCI_GPM_SET_TYPE_OPCODE(_p_gpm, _type, _opcode) do { \ 240 *(((u8 *)(_p_gpm)) + MCI_GPM_COEX_B_GPM_TYPE) = (_type) & 0xff; \ 241 *(((u8 *)(_p_gpm)) + MCI_GPM_COEX_B_GPM_OPCODE) = (_opcode) & 0xff;\ 242 } while (0) 243 244 #define MCI_GPM_IS_CAL_TYPE(_type) ((_type) <= MCI_GPM_WLAN_CAL_DONE) 245 246 /* 247 * Functions that are available to the MCI driver core. 248 */ 249 bool ar9003_mci_send_message(struct ath_hw *ah, u8 header, u32 flag, 250 u32 *payload, u8 len, bool wait_done, 251 bool check_bt); 252 u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type); 253 int ar9003_mci_setup(struct ath_hw *ah, u32 gpm_addr, void *gpm_buf, 254 u16 len, u32 sched_addr); 255 void ar9003_mci_cleanup(struct ath_hw *ah); 256 void ar9003_mci_get_interrupt(struct ath_hw *ah, u32 *raw_intr, 257 u32 *rx_msg_intr); 258 u32 ar9003_mci_get_next_gpm_offset(struct ath_hw *ah, bool first, u32 *more); 259 void ar9003_mci_set_bt_version(struct ath_hw *ah, u8 major, u8 minor); 260 void ar9003_mci_send_wlan_channels(struct ath_hw *ah); 261 /* 262 * These functions are used by ath9k_hw. 263 */ 264 265 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 266 267 void ar9003_mci_stop_bt(struct ath_hw *ah, bool save_fullsleep); 268 void ar9003_mci_init_cal_req(struct ath_hw *ah, bool *is_reusable); 269 void ar9003_mci_init_cal_done(struct ath_hw *ah); 270 void ar9003_mci_set_full_sleep(struct ath_hw *ah); 271 void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool force); 272 void ar9003_mci_check_bt(struct ath_hw *ah); 273 bool ar9003_mci_start_reset(struct ath_hw *ah, struct ath9k_channel *chan); 274 int ar9003_mci_end_reset(struct ath_hw *ah, struct ath9k_channel *chan, 275 struct ath9k_hw_cal_data *caldata); 276 int ar9003_mci_reset(struct ath_hw *ah, bool en_int, bool is_2g, 277 bool is_full_sleep); 278 void ar9003_mci_get_isr(struct ath_hw *ah, enum ath9k_int *masked); 279 void ar9003_mci_bt_gain_ctrl(struct ath_hw *ah); 280 void ar9003_mci_set_power_awake(struct ath_hw *ah); 281 void ar9003_mci_check_gpm_offset(struct ath_hw *ah); 282 u16 ar9003_mci_get_max_txpower(struct ath_hw *ah, u8 ctlmode); 283 284 #else 285 286 static inline void ar9003_mci_stop_bt(struct ath_hw *ah, bool save_fullsleep) 287 { 288 } 289 static inline void ar9003_mci_init_cal_req(struct ath_hw *ah, bool *is_reusable) 290 { 291 } 292 static inline void ar9003_mci_init_cal_done(struct ath_hw *ah) 293 { 294 } 295 static inline void ar9003_mci_set_full_sleep(struct ath_hw *ah) 296 { 297 } 298 static inline void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool wait_done) 299 { 300 } 301 static inline void ar9003_mci_check_bt(struct ath_hw *ah) 302 { 303 } 304 static inline bool ar9003_mci_start_reset(struct ath_hw *ah, struct ath9k_channel *chan) 305 { 306 return false; 307 } 308 static inline int ar9003_mci_end_reset(struct ath_hw *ah, struct ath9k_channel *chan, 309 struct ath9k_hw_cal_data *caldata) 310 { 311 return 0; 312 } 313 static inline void ar9003_mci_reset(struct ath_hw *ah, bool en_int, bool is_2g, 314 bool is_full_sleep) 315 { 316 } 317 static inline void ar9003_mci_get_isr(struct ath_hw *ah, enum ath9k_int *masked) 318 { 319 } 320 static inline void ar9003_mci_bt_gain_ctrl(struct ath_hw *ah) 321 { 322 } 323 static inline void ar9003_mci_set_power_awake(struct ath_hw *ah) 324 { 325 } 326 static inline void ar9003_mci_check_gpm_offset(struct ath_hw *ah) 327 { 328 } 329 static inline u16 ar9003_mci_get_max_txpower(struct ath_hw *ah, u8 ctlmode) 330 { 331 return -1; 332 } 333 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ 334 335 #endif 336