1 /*
2  * Copyright (c) 2010-2011 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #include "hw.h"
18 #include "hw-ops.h"
19 #include "ar9003_phy.h"
20 #include "ar9003_rtt.h"
21 #include "ar9003_mci.h"
22 
23 #define MAX_MEASUREMENT	MAX_IQCAL_MEASUREMENT
24 #define MAX_MAG_DELTA	11
25 #define MAX_PHS_DELTA	10
26 
27 struct coeff {
28 	int mag_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT];
29 	int phs_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT];
30 	int iqc_coeff[2];
31 };
32 
33 enum ar9003_cal_types {
34 	IQ_MISMATCH_CAL = BIT(0),
35 	TEMP_COMP_CAL = BIT(1),
36 };
37 
38 static void ar9003_hw_setup_calibration(struct ath_hw *ah,
39 					struct ath9k_cal_list *currCal)
40 {
41 	struct ath_common *common = ath9k_hw_common(ah);
42 
43 	/* Select calibration to run */
44 	switch (currCal->calData->calType) {
45 	case IQ_MISMATCH_CAL:
46 		/*
47 		 * Start calibration with
48 		 * 2^(INIT_IQCAL_LOG_COUNT_MAX+1) samples
49 		 */
50 		REG_RMW_FIELD(ah, AR_PHY_TIMING4,
51 			      AR_PHY_TIMING4_IQCAL_LOG_COUNT_MAX,
52 		currCal->calData->calCountMax);
53 		REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
54 
55 		ath_dbg(common, CALIBRATE,
56 			"starting IQ Mismatch Calibration\n");
57 
58 		/* Kick-off cal */
59 		REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL);
60 		break;
61 	case TEMP_COMP_CAL:
62 		REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
63 			      AR_PHY_65NM_CH0_THERM_LOCAL, 1);
64 		REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
65 			      AR_PHY_65NM_CH0_THERM_START, 1);
66 
67 		ath_dbg(common, CALIBRATE,
68 			"starting Temperature Compensation Calibration\n");
69 		break;
70 	}
71 }
72 
73 /*
74  * Generic calibration routine.
75  * Recalibrate the lower PHY chips to account for temperature/environment
76  * changes.
77  */
78 static bool ar9003_hw_per_calibration(struct ath_hw *ah,
79 				      struct ath9k_channel *ichan,
80 				      u8 rxchainmask,
81 				      struct ath9k_cal_list *currCal)
82 {
83 	struct ath9k_hw_cal_data *caldata = ah->caldata;
84 	/* Cal is assumed not done until explicitly set below */
85 	bool iscaldone = false;
86 
87 	/* Calibration in progress. */
88 	if (currCal->calState == CAL_RUNNING) {
89 		/* Check to see if it has finished. */
90 		if (!(REG_READ(ah, AR_PHY_TIMING4) & AR_PHY_TIMING4_DO_CAL)) {
91 			/*
92 			* Accumulate cal measures for active chains
93 			*/
94 			currCal->calData->calCollect(ah);
95 			ah->cal_samples++;
96 
97 			if (ah->cal_samples >=
98 			    currCal->calData->calNumSamples) {
99 				unsigned int i, numChains = 0;
100 				for (i = 0; i < AR9300_MAX_CHAINS; i++) {
101 					if (rxchainmask & (1 << i))
102 						numChains++;
103 				}
104 
105 				/*
106 				* Process accumulated data
107 				*/
108 				currCal->calData->calPostProc(ah, numChains);
109 
110 				/* Calibration has finished. */
111 				caldata->CalValid |= currCal->calData->calType;
112 				currCal->calState = CAL_DONE;
113 				iscaldone = true;
114 			} else {
115 			/*
116 			 * Set-up collection of another sub-sample until we
117 			 * get desired number
118 			 */
119 			ar9003_hw_setup_calibration(ah, currCal);
120 			}
121 		}
122 	} else if (!(caldata->CalValid & currCal->calData->calType)) {
123 		/* If current cal is marked invalid in channel, kick it off */
124 		ath9k_hw_reset_calibration(ah, currCal);
125 	}
126 
127 	return iscaldone;
128 }
129 
130 static bool ar9003_hw_calibrate(struct ath_hw *ah,
131 				struct ath9k_channel *chan,
132 				u8 rxchainmask,
133 				bool longcal)
134 {
135 	bool iscaldone = true;
136 	struct ath9k_cal_list *currCal = ah->cal_list_curr;
137 
138 	/*
139 	 * For given calibration:
140 	 * 1. Call generic cal routine
141 	 * 2. When this cal is done (isCalDone) if we have more cals waiting
142 	 *    (eg after reset), mask this to upper layers by not propagating
143 	 *    isCalDone if it is set to TRUE.
144 	 *    Instead, change isCalDone to FALSE and setup the waiting cal(s)
145 	 *    to be run.
146 	 */
147 	if (currCal &&
148 	    (currCal->calState == CAL_RUNNING ||
149 	     currCal->calState == CAL_WAITING)) {
150 		iscaldone = ar9003_hw_per_calibration(ah, chan,
151 						      rxchainmask, currCal);
152 		if (iscaldone) {
153 			ah->cal_list_curr = currCal = currCal->calNext;
154 
155 			if (currCal->calState == CAL_WAITING) {
156 				iscaldone = false;
157 				ath9k_hw_reset_calibration(ah, currCal);
158 			}
159 		}
160 	}
161 
162 	/*
163 	 * Do NF cal only at longer intervals. Get the value from
164 	 * the previous NF cal and update history buffer.
165 	 */
166 	if (longcal && ath9k_hw_getnf(ah, chan)) {
167 		/*
168 		 * Load the NF from history buffer of the current channel.
169 		 * NF is slow time-variant, so it is OK to use a historical
170 		 * value.
171 		 */
172 		ath9k_hw_loadnf(ah, ah->curchan);
173 
174 		/* start NF calibration, without updating BB NF register */
175 		ath9k_hw_start_nfcal(ah, false);
176 	}
177 
178 	return iscaldone;
179 }
180 
181 static void ar9003_hw_iqcal_collect(struct ath_hw *ah)
182 {
183 	int i;
184 
185 	/* Accumulate IQ cal measures for active chains */
186 	for (i = 0; i < AR5416_MAX_CHAINS; i++) {
187 		if (ah->txchainmask & BIT(i)) {
188 			ah->totalPowerMeasI[i] +=
189 				REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
190 			ah->totalPowerMeasQ[i] +=
191 				REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
192 			ah->totalIqCorrMeas[i] +=
193 				(int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
194 			ath_dbg(ath9k_hw_common(ah), CALIBRATE,
195 				"%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n",
196 				ah->cal_samples, i, ah->totalPowerMeasI[i],
197 				ah->totalPowerMeasQ[i],
198 				ah->totalIqCorrMeas[i]);
199 		}
200 	}
201 }
202 
203 static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
204 {
205 	struct ath_common *common = ath9k_hw_common(ah);
206 	u32 powerMeasQ, powerMeasI, iqCorrMeas;
207 	u32 qCoffDenom, iCoffDenom;
208 	int32_t qCoff, iCoff;
209 	int iqCorrNeg, i;
210 	static const u_int32_t offset_array[3] = {
211 		AR_PHY_RX_IQCAL_CORR_B0,
212 		AR_PHY_RX_IQCAL_CORR_B1,
213 		AR_PHY_RX_IQCAL_CORR_B2,
214 	};
215 
216 	for (i = 0; i < numChains; i++) {
217 		powerMeasI = ah->totalPowerMeasI[i];
218 		powerMeasQ = ah->totalPowerMeasQ[i];
219 		iqCorrMeas = ah->totalIqCorrMeas[i];
220 
221 		ath_dbg(common, CALIBRATE,
222 			"Starting IQ Cal and Correction for Chain %d\n", i);
223 
224 		ath_dbg(common, CALIBRATE,
225 			"Original: Chn %d iq_corr_meas = 0x%08x\n",
226 			i, ah->totalIqCorrMeas[i]);
227 
228 		iqCorrNeg = 0;
229 
230 		if (iqCorrMeas > 0x80000000) {
231 			iqCorrMeas = (0xffffffff - iqCorrMeas) + 1;
232 			iqCorrNeg = 1;
233 		}
234 
235 		ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_i = 0x%08x\n",
236 			i, powerMeasI);
237 		ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_q = 0x%08x\n",
238 			i, powerMeasQ);
239 		ath_dbg(common, CALIBRATE, "iqCorrNeg is 0x%08x\n", iqCorrNeg);
240 
241 		iCoffDenom = (powerMeasI / 2 + powerMeasQ / 2) / 256;
242 		qCoffDenom = powerMeasQ / 64;
243 
244 		if ((iCoffDenom != 0) && (qCoffDenom != 0)) {
245 			iCoff = iqCorrMeas / iCoffDenom;
246 			qCoff = powerMeasI / qCoffDenom - 64;
247 			ath_dbg(common, CALIBRATE, "Chn %d iCoff = 0x%08x\n",
248 				i, iCoff);
249 			ath_dbg(common, CALIBRATE, "Chn %d qCoff = 0x%08x\n",
250 				i, qCoff);
251 
252 			/* Force bounds on iCoff */
253 			if (iCoff >= 63)
254 				iCoff = 63;
255 			else if (iCoff <= -63)
256 				iCoff = -63;
257 
258 			/* Negate iCoff if iqCorrNeg == 0 */
259 			if (iqCorrNeg == 0x0)
260 				iCoff = -iCoff;
261 
262 			/* Force bounds on qCoff */
263 			if (qCoff >= 63)
264 				qCoff = 63;
265 			else if (qCoff <= -63)
266 				qCoff = -63;
267 
268 			iCoff = iCoff & 0x7f;
269 			qCoff = qCoff & 0x7f;
270 
271 			ath_dbg(common, CALIBRATE,
272 				"Chn %d : iCoff = 0x%x  qCoff = 0x%x\n",
273 				i, iCoff, qCoff);
274 			ath_dbg(common, CALIBRATE,
275 				"Register offset (0x%04x) before update = 0x%x\n",
276 				offset_array[i],
277 				REG_READ(ah, offset_array[i]));
278 
279 			REG_RMW_FIELD(ah, offset_array[i],
280 				      AR_PHY_RX_IQCAL_CORR_IQCORR_Q_I_COFF,
281 				      iCoff);
282 			REG_RMW_FIELD(ah, offset_array[i],
283 				      AR_PHY_RX_IQCAL_CORR_IQCORR_Q_Q_COFF,
284 				      qCoff);
285 			ath_dbg(common, CALIBRATE,
286 				"Register offset (0x%04x) QI COFF (bitfields 0x%08x) after update = 0x%x\n",
287 				offset_array[i],
288 				AR_PHY_RX_IQCAL_CORR_IQCORR_Q_I_COFF,
289 				REG_READ(ah, offset_array[i]));
290 			ath_dbg(common, CALIBRATE,
291 				"Register offset (0x%04x) QQ COFF (bitfields 0x%08x) after update = 0x%x\n",
292 				offset_array[i],
293 				AR_PHY_RX_IQCAL_CORR_IQCORR_Q_Q_COFF,
294 				REG_READ(ah, offset_array[i]));
295 
296 			ath_dbg(common, CALIBRATE,
297 				"IQ Cal and Correction done for Chain %d\n", i);
298 		}
299 	}
300 
301 	REG_SET_BIT(ah, AR_PHY_RX_IQCAL_CORR_B0,
302 		    AR_PHY_RX_IQCAL_CORR_IQCORR_ENABLE);
303 	ath_dbg(common, CALIBRATE,
304 		"IQ Cal and Correction (offset 0x%04x) enabled (bit position 0x%08x). New Value 0x%08x\n",
305 		(unsigned) (AR_PHY_RX_IQCAL_CORR_B0),
306 		AR_PHY_RX_IQCAL_CORR_IQCORR_ENABLE,
307 		REG_READ(ah, AR_PHY_RX_IQCAL_CORR_B0));
308 }
309 
310 static const struct ath9k_percal_data iq_cal_single_sample = {
311 	IQ_MISMATCH_CAL,
312 	MIN_CAL_SAMPLES,
313 	PER_MAX_LOG_COUNT,
314 	ar9003_hw_iqcal_collect,
315 	ar9003_hw_iqcalibrate
316 };
317 
318 static void ar9003_hw_init_cal_settings(struct ath_hw *ah)
319 {
320 	ah->iq_caldata.calData = &iq_cal_single_sample;
321 }
322 
323 /*
324  * solve 4x4 linear equation used in loopback iq cal.
325  */
326 static bool ar9003_hw_solve_iq_cal(struct ath_hw *ah,
327 				   s32 sin_2phi_1,
328 				   s32 cos_2phi_1,
329 				   s32 sin_2phi_2,
330 				   s32 cos_2phi_2,
331 				   s32 mag_a0_d0,
332 				   s32 phs_a0_d0,
333 				   s32 mag_a1_d0,
334 				   s32 phs_a1_d0,
335 				   s32 solved_eq[])
336 {
337 	s32 f1 = cos_2phi_1 - cos_2phi_2,
338 	    f3 = sin_2phi_1 - sin_2phi_2,
339 	    f2;
340 	s32 mag_tx, phs_tx, mag_rx, phs_rx;
341 	const s32 result_shift = 1 << 15;
342 	struct ath_common *common = ath9k_hw_common(ah);
343 
344 	f2 = (f1 * f1 + f3 * f3) / result_shift;
345 
346 	if (!f2) {
347 		ath_dbg(common, CALIBRATE, "Divide by 0\n");
348 		return false;
349 	}
350 
351 	/* mag mismatch, tx */
352 	mag_tx = f1 * (mag_a0_d0  - mag_a1_d0) + f3 * (phs_a0_d0 - phs_a1_d0);
353 	/* phs mismatch, tx */
354 	phs_tx = f3 * (-mag_a0_d0 + mag_a1_d0) + f1 * (phs_a0_d0 - phs_a1_d0);
355 
356 	mag_tx = (mag_tx / f2);
357 	phs_tx = (phs_tx / f2);
358 
359 	/* mag mismatch, rx */
360 	mag_rx = mag_a0_d0 - (cos_2phi_1 * mag_tx + sin_2phi_1 * phs_tx) /
361 		 result_shift;
362 	/* phs mismatch, rx */
363 	phs_rx = phs_a0_d0 + (sin_2phi_1 * mag_tx - cos_2phi_1 * phs_tx) /
364 		 result_shift;
365 
366 	solved_eq[0] = mag_tx;
367 	solved_eq[1] = phs_tx;
368 	solved_eq[2] = mag_rx;
369 	solved_eq[3] = phs_rx;
370 
371 	return true;
372 }
373 
374 static s32 ar9003_hw_find_mag_approx(struct ath_hw *ah, s32 in_re, s32 in_im)
375 {
376 	s32 abs_i = abs(in_re),
377 	    abs_q = abs(in_im),
378 	    max_abs, min_abs;
379 
380 	if (abs_i > abs_q) {
381 		max_abs = abs_i;
382 		min_abs = abs_q;
383 	} else {
384 		max_abs = abs_q;
385 		min_abs = abs_i;
386 	}
387 
388 	return max_abs - (max_abs / 32) + (min_abs / 8) + (min_abs / 4);
389 }
390 
391 #define DELPT 32
392 
393 static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
394 				   s32 chain_idx,
395 				   const s32 iq_res[],
396 				   s32 iqc_coeff[])
397 {
398 	s32 i2_m_q2_a0_d0, i2_p_q2_a0_d0, iq_corr_a0_d0,
399 	    i2_m_q2_a0_d1, i2_p_q2_a0_d1, iq_corr_a0_d1,
400 	    i2_m_q2_a1_d0, i2_p_q2_a1_d0, iq_corr_a1_d0,
401 	    i2_m_q2_a1_d1, i2_p_q2_a1_d1, iq_corr_a1_d1;
402 	s32 mag_a0_d0, mag_a1_d0, mag_a0_d1, mag_a1_d1,
403 	    phs_a0_d0, phs_a1_d0, phs_a0_d1, phs_a1_d1,
404 	    sin_2phi_1, cos_2phi_1,
405 	    sin_2phi_2, cos_2phi_2;
406 	s32 mag_tx, phs_tx, mag_rx, phs_rx;
407 	s32 solved_eq[4], mag_corr_tx, phs_corr_tx, mag_corr_rx, phs_corr_rx,
408 	    q_q_coff, q_i_coff;
409 	const s32 res_scale = 1 << 15;
410 	const s32 delpt_shift = 1 << 8;
411 	s32 mag1, mag2;
412 	struct ath_common *common = ath9k_hw_common(ah);
413 
414 	i2_m_q2_a0_d0 = iq_res[0] & 0xfff;
415 	i2_p_q2_a0_d0 = (iq_res[0] >> 12) & 0xfff;
416 	iq_corr_a0_d0 = ((iq_res[0] >> 24) & 0xff) + ((iq_res[1] & 0xf) << 8);
417 
418 	if (i2_m_q2_a0_d0 > 0x800)
419 		i2_m_q2_a0_d0 = -((0xfff - i2_m_q2_a0_d0) + 1);
420 
421 	if (i2_p_q2_a0_d0 > 0x800)
422 		i2_p_q2_a0_d0 = -((0xfff - i2_p_q2_a0_d0) + 1);
423 
424 	if (iq_corr_a0_d0 > 0x800)
425 		iq_corr_a0_d0 = -((0xfff - iq_corr_a0_d0) + 1);
426 
427 	i2_m_q2_a0_d1 = (iq_res[1] >> 4) & 0xfff;
428 	i2_p_q2_a0_d1 = (iq_res[2] & 0xfff);
429 	iq_corr_a0_d1 = (iq_res[2] >> 12) & 0xfff;
430 
431 	if (i2_m_q2_a0_d1 > 0x800)
432 		i2_m_q2_a0_d1 = -((0xfff - i2_m_q2_a0_d1) + 1);
433 
434 	if (i2_p_q2_a0_d1 > 0x800)
435 		i2_p_q2_a0_d1 = -((0xfff - i2_p_q2_a0_d1) + 1);
436 
437 	if (iq_corr_a0_d1 > 0x800)
438 		iq_corr_a0_d1 = -((0xfff - iq_corr_a0_d1) + 1);
439 
440 	i2_m_q2_a1_d0 = ((iq_res[2] >> 24) & 0xff) + ((iq_res[3] & 0xf) << 8);
441 	i2_p_q2_a1_d0 = (iq_res[3] >> 4) & 0xfff;
442 	iq_corr_a1_d0 = iq_res[4] & 0xfff;
443 
444 	if (i2_m_q2_a1_d0 > 0x800)
445 		i2_m_q2_a1_d0 = -((0xfff - i2_m_q2_a1_d0) + 1);
446 
447 	if (i2_p_q2_a1_d0 > 0x800)
448 		i2_p_q2_a1_d0 = -((0xfff - i2_p_q2_a1_d0) + 1);
449 
450 	if (iq_corr_a1_d0 > 0x800)
451 		iq_corr_a1_d0 = -((0xfff - iq_corr_a1_d0) + 1);
452 
453 	i2_m_q2_a1_d1 = (iq_res[4] >> 12) & 0xfff;
454 	i2_p_q2_a1_d1 = ((iq_res[4] >> 24) & 0xff) + ((iq_res[5] & 0xf) << 8);
455 	iq_corr_a1_d1 = (iq_res[5] >> 4) & 0xfff;
456 
457 	if (i2_m_q2_a1_d1 > 0x800)
458 		i2_m_q2_a1_d1 = -((0xfff - i2_m_q2_a1_d1) + 1);
459 
460 	if (i2_p_q2_a1_d1 > 0x800)
461 		i2_p_q2_a1_d1 = -((0xfff - i2_p_q2_a1_d1) + 1);
462 
463 	if (iq_corr_a1_d1 > 0x800)
464 		iq_corr_a1_d1 = -((0xfff - iq_corr_a1_d1) + 1);
465 
466 	if ((i2_p_q2_a0_d0 == 0) || (i2_p_q2_a0_d1 == 0) ||
467 	    (i2_p_q2_a1_d0 == 0) || (i2_p_q2_a1_d1 == 0)) {
468 		ath_dbg(common, CALIBRATE,
469 			"Divide by 0:\n"
470 			"a0_d0=%d\n"
471 			"a0_d1=%d\n"
472 			"a2_d0=%d\n"
473 			"a1_d1=%d\n",
474 			i2_p_q2_a0_d0, i2_p_q2_a0_d1,
475 			i2_p_q2_a1_d0, i2_p_q2_a1_d1);
476 		return false;
477 	}
478 
479 	mag_a0_d0 = (i2_m_q2_a0_d0 * res_scale) / i2_p_q2_a0_d0;
480 	phs_a0_d0 = (iq_corr_a0_d0 * res_scale) / i2_p_q2_a0_d0;
481 
482 	mag_a0_d1 = (i2_m_q2_a0_d1 * res_scale) / i2_p_q2_a0_d1;
483 	phs_a0_d1 = (iq_corr_a0_d1 * res_scale) / i2_p_q2_a0_d1;
484 
485 	mag_a1_d0 = (i2_m_q2_a1_d0 * res_scale) / i2_p_q2_a1_d0;
486 	phs_a1_d0 = (iq_corr_a1_d0 * res_scale) / i2_p_q2_a1_d0;
487 
488 	mag_a1_d1 = (i2_m_q2_a1_d1 * res_scale) / i2_p_q2_a1_d1;
489 	phs_a1_d1 = (iq_corr_a1_d1 * res_scale) / i2_p_q2_a1_d1;
490 
491 	/* w/o analog phase shift */
492 	sin_2phi_1 = (((mag_a0_d0 - mag_a0_d1) * delpt_shift) / DELPT);
493 	/* w/o analog phase shift */
494 	cos_2phi_1 = (((phs_a0_d1 - phs_a0_d0) * delpt_shift) / DELPT);
495 	/* w/  analog phase shift */
496 	sin_2phi_2 = (((mag_a1_d0 - mag_a1_d1) * delpt_shift) / DELPT);
497 	/* w/  analog phase shift */
498 	cos_2phi_2 = (((phs_a1_d1 - phs_a1_d0) * delpt_shift) / DELPT);
499 
500 	/*
501 	 * force sin^2 + cos^2 = 1;
502 	 * find magnitude by approximation
503 	 */
504 	mag1 = ar9003_hw_find_mag_approx(ah, cos_2phi_1, sin_2phi_1);
505 	mag2 = ar9003_hw_find_mag_approx(ah, cos_2phi_2, sin_2phi_2);
506 
507 	if ((mag1 == 0) || (mag2 == 0)) {
508 		ath_dbg(common, CALIBRATE, "Divide by 0: mag1=%d, mag2=%d\n",
509 			mag1, mag2);
510 		return false;
511 	}
512 
513 	/* normalization sin and cos by mag */
514 	sin_2phi_1 = (sin_2phi_1 * res_scale / mag1);
515 	cos_2phi_1 = (cos_2phi_1 * res_scale / mag1);
516 	sin_2phi_2 = (sin_2phi_2 * res_scale / mag2);
517 	cos_2phi_2 = (cos_2phi_2 * res_scale / mag2);
518 
519 	/* calculate IQ mismatch */
520 	if (!ar9003_hw_solve_iq_cal(ah,
521 			     sin_2phi_1, cos_2phi_1,
522 			     sin_2phi_2, cos_2phi_2,
523 			     mag_a0_d0, phs_a0_d0,
524 			     mag_a1_d0,
525 			     phs_a1_d0, solved_eq)) {
526 		ath_dbg(common, CALIBRATE,
527 			"Call to ar9003_hw_solve_iq_cal() failed\n");
528 		return false;
529 	}
530 
531 	mag_tx = solved_eq[0];
532 	phs_tx = solved_eq[1];
533 	mag_rx = solved_eq[2];
534 	phs_rx = solved_eq[3];
535 
536 	ath_dbg(common, CALIBRATE,
537 		"chain %d: mag mismatch=%d phase mismatch=%d\n",
538 		chain_idx, mag_tx/res_scale, phs_tx/res_scale);
539 
540 	if (res_scale == mag_tx) {
541 		ath_dbg(common, CALIBRATE,
542 			"Divide by 0: mag_tx=%d, res_scale=%d\n",
543 			mag_tx, res_scale);
544 		return false;
545 	}
546 
547 	/* calculate and quantize Tx IQ correction factor */
548 	mag_corr_tx = (mag_tx * res_scale) / (res_scale - mag_tx);
549 	phs_corr_tx = -phs_tx;
550 
551 	q_q_coff = (mag_corr_tx * 128 / res_scale);
552 	q_i_coff = (phs_corr_tx * 256 / res_scale);
553 
554 	ath_dbg(common, CALIBRATE, "tx chain %d: mag corr=%d  phase corr=%d\n",
555 		chain_idx, q_q_coff, q_i_coff);
556 
557 	if (q_i_coff < -63)
558 		q_i_coff = -63;
559 	if (q_i_coff > 63)
560 		q_i_coff = 63;
561 	if (q_q_coff < -63)
562 		q_q_coff = -63;
563 	if (q_q_coff > 63)
564 		q_q_coff = 63;
565 
566 	iqc_coeff[0] = (q_q_coff * 128) + q_i_coff;
567 
568 	ath_dbg(common, CALIBRATE, "tx chain %d: iq corr coeff=%x\n",
569 		chain_idx, iqc_coeff[0]);
570 
571 	if (-mag_rx == res_scale) {
572 		ath_dbg(common, CALIBRATE,
573 			"Divide by 0: mag_rx=%d, res_scale=%d\n",
574 			mag_rx, res_scale);
575 		return false;
576 	}
577 
578 	/* calculate and quantize Rx IQ correction factors */
579 	mag_corr_rx = (-mag_rx * res_scale) / (res_scale + mag_rx);
580 	phs_corr_rx = -phs_rx;
581 
582 	q_q_coff = (mag_corr_rx * 128 / res_scale);
583 	q_i_coff = (phs_corr_rx * 256 / res_scale);
584 
585 	ath_dbg(common, CALIBRATE, "rx chain %d: mag corr=%d  phase corr=%d\n",
586 		chain_idx, q_q_coff, q_i_coff);
587 
588 	if (q_i_coff < -63)
589 		q_i_coff = -63;
590 	if (q_i_coff > 63)
591 		q_i_coff = 63;
592 	if (q_q_coff < -63)
593 		q_q_coff = -63;
594 	if (q_q_coff > 63)
595 		q_q_coff = 63;
596 
597 	iqc_coeff[1] = (q_q_coff * 128) + q_i_coff;
598 
599 	ath_dbg(common, CALIBRATE, "rx chain %d: iq corr coeff=%x\n",
600 		chain_idx, iqc_coeff[1]);
601 
602 	return true;
603 }
604 
605 static void ar9003_hw_detect_outlier(int *mp_coeff, int nmeasurement,
606 				     int max_delta)
607 {
608 	int mp_max = -64, max_idx = 0;
609 	int mp_min = 63, min_idx = 0;
610 	int mp_avg = 0, i, outlier_idx = 0, mp_count = 0;
611 
612 	/* find min/max mismatch across all calibrated gains */
613 	for (i = 0; i < nmeasurement; i++) {
614 		if (mp_coeff[i] > mp_max) {
615 			mp_max = mp_coeff[i];
616 			max_idx = i;
617 		} else if (mp_coeff[i] < mp_min) {
618 			mp_min = mp_coeff[i];
619 			min_idx = i;
620 		}
621 	}
622 
623 	/* find average (exclude max abs value) */
624 	for (i = 0; i < nmeasurement; i++) {
625 		if ((abs(mp_coeff[i]) < abs(mp_max)) ||
626 		    (abs(mp_coeff[i]) < abs(mp_min))) {
627 			mp_avg += mp_coeff[i];
628 			mp_count++;
629 		}
630 	}
631 
632 	/*
633 	 * finding mean magnitude/phase if possible, otherwise
634 	 * just use the last value as the mean
635 	 */
636 	if (mp_count)
637 		mp_avg /= mp_count;
638 	else
639 		mp_avg = mp_coeff[nmeasurement - 1];
640 
641 	/* detect outlier */
642 	if (abs(mp_max - mp_min) > max_delta) {
643 		if (abs(mp_max - mp_avg) > abs(mp_min - mp_avg))
644 			outlier_idx = max_idx;
645 		else
646 			outlier_idx = min_idx;
647 
648 		mp_coeff[outlier_idx] = mp_avg;
649 	}
650 }
651 
652 static void ar9003_hw_tx_iqcal_load_avg_2_passes(struct ath_hw *ah,
653 						 struct coeff *coeff,
654 						 bool is_reusable)
655 {
656 	int i, im, nmeasurement;
657 	u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS];
658 	struct ath9k_hw_cal_data *caldata = ah->caldata;
659 
660 	memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff));
661 	for (i = 0; i < MAX_MEASUREMENT / 2; i++) {
662 		tx_corr_coeff[i * 2][0] = tx_corr_coeff[(i * 2) + 1][0] =
663 					AR_PHY_TX_IQCAL_CORR_COEFF_B0(i);
664 		if (!AR_SREV_9485(ah)) {
665 			tx_corr_coeff[i * 2][1] =
666 			tx_corr_coeff[(i * 2) + 1][1] =
667 					AR_PHY_TX_IQCAL_CORR_COEFF_B1(i);
668 
669 			tx_corr_coeff[i * 2][2] =
670 			tx_corr_coeff[(i * 2) + 1][2] =
671 					AR_PHY_TX_IQCAL_CORR_COEFF_B2(i);
672 		}
673 	}
674 
675 	/* Load the average of 2 passes */
676 	for (i = 0; i < AR9300_MAX_CHAINS; i++) {
677 		if (!(ah->txchainmask & (1 << i)))
678 			continue;
679 		nmeasurement = REG_READ_FIELD(ah,
680 				AR_PHY_TX_IQCAL_STATUS_B0,
681 				AR_PHY_CALIBRATED_GAINS_0);
682 
683 		if (nmeasurement > MAX_MEASUREMENT)
684 			nmeasurement = MAX_MEASUREMENT;
685 
686 		/* detect outlier only if nmeasurement > 1 */
687 		if (nmeasurement > 1) {
688 			/* Detect magnitude outlier */
689 			ar9003_hw_detect_outlier(coeff->mag_coeff[i],
690 					nmeasurement, MAX_MAG_DELTA);
691 
692 			/* Detect phase outlier */
693 			ar9003_hw_detect_outlier(coeff->phs_coeff[i],
694 					nmeasurement, MAX_PHS_DELTA);
695 		}
696 
697 		for (im = 0; im < nmeasurement; im++) {
698 
699 			coeff->iqc_coeff[0] = (coeff->mag_coeff[i][im] & 0x7f) |
700 				((coeff->phs_coeff[i][im] & 0x7f) << 7);
701 
702 			if ((im % 2) == 0)
703 				REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
704 					AR_PHY_TX_IQCAL_CORR_COEFF_00_COEFF_TABLE,
705 					coeff->iqc_coeff[0]);
706 			else
707 				REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
708 					AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE,
709 					coeff->iqc_coeff[0]);
710 
711 			if (caldata)
712 				caldata->tx_corr_coeff[im][i] =
713 					coeff->iqc_coeff[0];
714 		}
715 		if (caldata)
716 			caldata->num_measures[i] = nmeasurement;
717 	}
718 
719 	REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
720 		      AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x1);
721 	REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
722 		      AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);
723 
724 	if (caldata)
725 		caldata->done_txiqcal_once = is_reusable;
726 
727 	return;
728 }
729 
730 static bool ar9003_hw_tx_iq_cal_run(struct ath_hw *ah)
731 {
732 	struct ath_common *common = ath9k_hw_common(ah);
733 	u8 tx_gain_forced;
734 
735 	tx_gain_forced = REG_READ_FIELD(ah, AR_PHY_TX_FORCED_GAIN,
736 					AR_PHY_TXGAIN_FORCE);
737 	if (tx_gain_forced)
738 		REG_RMW_FIELD(ah, AR_PHY_TX_FORCED_GAIN,
739 			      AR_PHY_TXGAIN_FORCE, 0);
740 
741 	REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START,
742 		      AR_PHY_TX_IQCAL_START_DO_CAL, 1);
743 
744 	if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
745 			AR_PHY_TX_IQCAL_START_DO_CAL, 0,
746 			AH_WAIT_TIMEOUT)) {
747 		ath_dbg(common, CALIBRATE, "Tx IQ Cal is not completed\n");
748 		return false;
749 	}
750 	return true;
751 }
752 
753 static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah, bool is_reusable)
754 {
755 	struct ath_common *common = ath9k_hw_common(ah);
756 	const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
757 		AR_PHY_TX_IQCAL_STATUS_B0,
758 		AR_PHY_TX_IQCAL_STATUS_B1,
759 		AR_PHY_TX_IQCAL_STATUS_B2,
760 	};
761 	const u_int32_t chan_info_tab[] = {
762 		AR_PHY_CHAN_INFO_TAB_0,
763 		AR_PHY_CHAN_INFO_TAB_1,
764 		AR_PHY_CHAN_INFO_TAB_2,
765 	};
766 	struct coeff coeff;
767 	s32 iq_res[6];
768 	int i, im, j;
769 	int nmeasurement;
770 
771 	for (i = 0; i < AR9300_MAX_CHAINS; i++) {
772 		if (!(ah->txchainmask & (1 << i)))
773 			continue;
774 
775 		nmeasurement = REG_READ_FIELD(ah,
776 				AR_PHY_TX_IQCAL_STATUS_B0,
777 				AR_PHY_CALIBRATED_GAINS_0);
778 		if (nmeasurement > MAX_MEASUREMENT)
779 			nmeasurement = MAX_MEASUREMENT;
780 
781 		for (im = 0; im < nmeasurement; im++) {
782 			ath_dbg(common, CALIBRATE,
783 				"Doing Tx IQ Cal for chain %d\n", i);
784 
785 			if (REG_READ(ah, txiqcal_status[i]) &
786 					AR_PHY_TX_IQCAL_STATUS_FAILED) {
787 				ath_dbg(common, CALIBRATE,
788 					"Tx IQ Cal failed for chain %d\n", i);
789 				goto tx_iqcal_fail;
790 			}
791 
792 			for (j = 0; j < 3; j++) {
793 				u32 idx = 2 * j, offset = 4 * (3 * im + j);
794 
795 				REG_RMW_FIELD(ah,
796 						AR_PHY_CHAN_INFO_MEMORY,
797 						AR_PHY_CHAN_INFO_TAB_S2_READ,
798 						0);
799 
800 				/* 32 bits */
801 				iq_res[idx] = REG_READ(ah,
802 						chan_info_tab[i] +
803 						offset);
804 
805 				REG_RMW_FIELD(ah,
806 						AR_PHY_CHAN_INFO_MEMORY,
807 						AR_PHY_CHAN_INFO_TAB_S2_READ,
808 						1);
809 
810 				/* 16 bits */
811 				iq_res[idx + 1] = 0xffff & REG_READ(ah,
812 						chan_info_tab[i] + offset);
813 
814 				ath_dbg(common, CALIBRATE,
815 					"IQ_RES[%d]=0x%x IQ_RES[%d]=0x%x\n",
816 					idx, iq_res[idx], idx + 1,
817 					iq_res[idx + 1]);
818 			}
819 
820 			if (!ar9003_hw_calc_iq_corr(ah, i, iq_res,
821 						coeff.iqc_coeff)) {
822 				ath_dbg(common, CALIBRATE,
823 					"Failed in calculation of IQ correction\n");
824 				goto tx_iqcal_fail;
825 			}
826 
827 			coeff.mag_coeff[i][im] = coeff.iqc_coeff[0] & 0x7f;
828 			coeff.phs_coeff[i][im] =
829 				(coeff.iqc_coeff[0] >> 7) & 0x7f;
830 
831 			if (coeff.mag_coeff[i][im] > 63)
832 				coeff.mag_coeff[i][im] -= 128;
833 			if (coeff.phs_coeff[i][im] > 63)
834 				coeff.phs_coeff[i][im] -= 128;
835 		}
836 	}
837 	ar9003_hw_tx_iqcal_load_avg_2_passes(ah, &coeff, is_reusable);
838 
839 	return;
840 
841 tx_iqcal_fail:
842 	ath_dbg(common, CALIBRATE, "Tx IQ Cal failed\n");
843 	return;
844 }
845 
846 static void ar9003_hw_tx_iq_cal_reload(struct ath_hw *ah)
847 {
848 	struct ath9k_hw_cal_data *caldata = ah->caldata;
849 	u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS];
850 	int i, im;
851 
852 	memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff));
853 	for (i = 0; i < MAX_MEASUREMENT / 2; i++) {
854 		tx_corr_coeff[i * 2][0] = tx_corr_coeff[(i * 2) + 1][0] =
855 					AR_PHY_TX_IQCAL_CORR_COEFF_B0(i);
856 		if (!AR_SREV_9485(ah)) {
857 			tx_corr_coeff[i * 2][1] =
858 			tx_corr_coeff[(i * 2) + 1][1] =
859 					AR_PHY_TX_IQCAL_CORR_COEFF_B1(i);
860 
861 			tx_corr_coeff[i * 2][2] =
862 			tx_corr_coeff[(i * 2) + 1][2] =
863 					AR_PHY_TX_IQCAL_CORR_COEFF_B2(i);
864 		}
865 	}
866 
867 	for (i = 0; i < AR9300_MAX_CHAINS; i++) {
868 		if (!(ah->txchainmask & (1 << i)))
869 			continue;
870 
871 		for (im = 0; im < caldata->num_measures[i]; im++) {
872 			if ((im % 2) == 0)
873 				REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
874 				     AR_PHY_TX_IQCAL_CORR_COEFF_00_COEFF_TABLE,
875 				     caldata->tx_corr_coeff[im][i]);
876 			else
877 				REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
878 				     AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE,
879 				     caldata->tx_corr_coeff[im][i]);
880 		}
881 	}
882 
883 	REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
884 		      AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x1);
885 	REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
886 		      AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);
887 }
888 
889 static bool ar9003_hw_init_cal(struct ath_hw *ah,
890 			       struct ath9k_channel *chan)
891 {
892 	struct ath_common *common = ath9k_hw_common(ah);
893 	struct ath9k_hw_cal_data *caldata = ah->caldata;
894 	bool txiqcal_done = false, txclcal_done = false;
895 	bool is_reusable = true, status = true;
896 	bool run_rtt_cal = false, run_agc_cal;
897 	bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
898 	u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
899 					  AR_PHY_AGC_CONTROL_FLTR_CAL   |
900 					  AR_PHY_AGC_CONTROL_PKDET_CAL;
901 	int i, j;
902 	u32 cl_idx[AR9300_MAX_CHAINS] = { AR_PHY_CL_TAB_0,
903 					  AR_PHY_CL_TAB_1,
904 					  AR_PHY_CL_TAB_2 };
905 
906 	if (rtt) {
907 		if (!ar9003_hw_rtt_restore(ah, chan))
908 			run_rtt_cal = true;
909 
910 		if (run_rtt_cal)
911 			ath_dbg(common, CALIBRATE, "RTT calibration to be done\n");
912 	}
913 
914 	run_agc_cal = run_rtt_cal;
915 
916 	if (run_rtt_cal) {
917 		ar9003_hw_rtt_enable(ah);
918 		ar9003_hw_rtt_set_mask(ah, 0x00);
919 		ar9003_hw_rtt_clear_hist(ah);
920 	}
921 
922 	if (rtt && !run_rtt_cal) {
923 		agc_ctrl = REG_READ(ah, AR_PHY_AGC_CONTROL);
924 		agc_supp_cals &= agc_ctrl;
925 		agc_ctrl &= ~(AR_PHY_AGC_CONTROL_OFFSET_CAL |
926 			     AR_PHY_AGC_CONTROL_FLTR_CAL |
927 			     AR_PHY_AGC_CONTROL_PKDET_CAL);
928 		REG_WRITE(ah, AR_PHY_AGC_CONTROL, agc_ctrl);
929 	}
930 
931 	if (ah->enabled_cals & TX_CL_CAL) {
932 		if (caldata && caldata->done_txclcal_once)
933 			REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL,
934 				    AR_PHY_CL_CAL_ENABLE);
935 		else {
936 			REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL,
937 				    AR_PHY_CL_CAL_ENABLE);
938 			run_agc_cal = true;
939 		}
940 	}
941 
942 	if (!(ah->enabled_cals & TX_IQ_CAL))
943 		goto skip_tx_iqcal;
944 
945 	/* Do Tx IQ Calibration */
946 	REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
947 		      AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
948 		      DELPT);
949 
950 	/*
951 	 * For AR9485 or later chips, TxIQ cal runs as part of
952 	 * AGC calibration
953 	 */
954 	if (ah->enabled_cals & TX_IQ_ON_AGC_CAL) {
955 		if (caldata && !caldata->done_txiqcal_once)
956 			REG_SET_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
957 				    AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
958 		else
959 			REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
960 				    AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
961 		txiqcal_done = run_agc_cal = true;
962 		goto skip_tx_iqcal;
963 	} else if (caldata && !caldata->done_txiqcal_once)
964 		run_agc_cal = true;
965 
966 	if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
967 		ar9003_mci_init_cal_req(ah, &is_reusable);
968 
969 	if (!(IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))) {
970 		txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
971 		REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
972 		udelay(5);
973 		REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
974 	}
975 
976 skip_tx_iqcal:
977 	if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
978 		/* Calibrate the AGC */
979 		REG_WRITE(ah, AR_PHY_AGC_CONTROL,
980 			  REG_READ(ah, AR_PHY_AGC_CONTROL) |
981 			  AR_PHY_AGC_CONTROL_CAL);
982 
983 		/* Poll for offset calibration complete */
984 		status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
985 				       AR_PHY_AGC_CONTROL_CAL,
986 				       0, AH_WAIT_TIMEOUT);
987 	}
988 
989 	if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
990 		ar9003_mci_init_cal_done(ah);
991 
992 	if (rtt && !run_rtt_cal) {
993 		agc_ctrl |= agc_supp_cals;
994 		REG_WRITE(ah, AR_PHY_AGC_CONTROL, agc_ctrl);
995 	}
996 
997 	if (!status) {
998 		if (run_rtt_cal)
999 			ar9003_hw_rtt_disable(ah);
1000 
1001 		ath_dbg(common, CALIBRATE,
1002 			"offset calibration failed to complete in 1ms; noisy environment?\n");
1003 		return false;
1004 	}
1005 
1006 	if (txiqcal_done)
1007 		ar9003_hw_tx_iq_cal_post_proc(ah, is_reusable);
1008 	else if (caldata && caldata->done_txiqcal_once)
1009 		ar9003_hw_tx_iq_cal_reload(ah);
1010 
1011 #define CL_TAB_ENTRY(reg_base)	(reg_base + (4 * j))
1012 	if (caldata && (ah->enabled_cals & TX_CL_CAL)) {
1013 		txclcal_done = !!(REG_READ(ah, AR_PHY_AGC_CONTROL) &
1014 					   AR_PHY_AGC_CONTROL_CLC_SUCCESS);
1015 		if (caldata->done_txclcal_once) {
1016 			for (i = 0; i < AR9300_MAX_CHAINS; i++) {
1017 				if (!(ah->txchainmask & (1 << i)))
1018 					continue;
1019 				for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
1020 					REG_WRITE(ah, CL_TAB_ENTRY(cl_idx[i]),
1021 						  caldata->tx_clcal[i][j]);
1022 			}
1023 		} else if (is_reusable && txclcal_done) {
1024 			for (i = 0; i < AR9300_MAX_CHAINS; i++) {
1025 				if (!(ah->txchainmask & (1 << i)))
1026 					continue;
1027 				for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
1028 					caldata->tx_clcal[i][j] =
1029 						REG_READ(ah,
1030 						  CL_TAB_ENTRY(cl_idx[i]));
1031 			}
1032 			caldata->done_txclcal_once = true;
1033 		}
1034 	}
1035 #undef CL_TAB_ENTRY
1036 
1037 	if (run_rtt_cal && caldata) {
1038 		if (is_reusable) {
1039 			if (!ath9k_hw_rfbus_req(ah))
1040 				ath_err(ath9k_hw_common(ah),
1041 					"Could not stop baseband\n");
1042 			else
1043 				ar9003_hw_rtt_fill_hist(ah);
1044 
1045 			ath9k_hw_rfbus_done(ah);
1046 		}
1047 
1048 		ar9003_hw_rtt_disable(ah);
1049 	}
1050 
1051 	/* Initialize list pointers */
1052 	ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
1053 	ah->supp_cals = IQ_MISMATCH_CAL;
1054 
1055 	if (ah->supp_cals & IQ_MISMATCH_CAL) {
1056 		INIT_CAL(&ah->iq_caldata);
1057 		INSERT_CAL(ah, &ah->iq_caldata);
1058 		ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n");
1059 	}
1060 
1061 	if (ah->supp_cals & TEMP_COMP_CAL) {
1062 		INIT_CAL(&ah->tempCompCalData);
1063 		INSERT_CAL(ah, &ah->tempCompCalData);
1064 		ath_dbg(common, CALIBRATE,
1065 			"enabling Temperature Compensation Calibration\n");
1066 	}
1067 
1068 	/* Initialize current pointer to first element in list */
1069 	ah->cal_list_curr = ah->cal_list;
1070 
1071 	if (ah->cal_list_curr)
1072 		ath9k_hw_reset_calibration(ah, ah->cal_list_curr);
1073 
1074 	if (caldata)
1075 		caldata->CalValid = 0;
1076 
1077 	return true;
1078 }
1079 
1080 void ar9003_hw_attach_calib_ops(struct ath_hw *ah)
1081 {
1082 	struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
1083 	struct ath_hw_ops *ops = ath9k_hw_ops(ah);
1084 
1085 	priv_ops->init_cal_settings = ar9003_hw_init_cal_settings;
1086 	priv_ops->init_cal = ar9003_hw_init_cal;
1087 	priv_ops->setup_calibration = ar9003_hw_setup_calibration;
1088 
1089 	ops->calibrate = ar9003_hw_calibrate;
1090 }
1091