1795f5e2cSLuis R. Rodriguez /* 2795f5e2cSLuis R. Rodriguez * Copyright (c) 2008-2010 Atheros Communications Inc. 3795f5e2cSLuis R. Rodriguez * 4795f5e2cSLuis R. Rodriguez * Permission to use, copy, modify, and/or distribute this software for any 5795f5e2cSLuis R. Rodriguez * purpose with or without fee is hereby granted, provided that the above 6795f5e2cSLuis R. Rodriguez * copyright notice and this permission notice appear in all copies. 7795f5e2cSLuis R. Rodriguez * 8795f5e2cSLuis R. Rodriguez * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9795f5e2cSLuis R. Rodriguez * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10795f5e2cSLuis R. Rodriguez * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11795f5e2cSLuis R. Rodriguez * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12795f5e2cSLuis R. Rodriguez * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13795f5e2cSLuis R. Rodriguez * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14795f5e2cSLuis R. Rodriguez * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15795f5e2cSLuis R. Rodriguez */ 16795f5e2cSLuis R. Rodriguez 17795f5e2cSLuis R. Rodriguez #include "hw.h" 18795f5e2cSLuis R. Rodriguez #include "hw-ops.h" 19795f5e2cSLuis R. Rodriguez #include "ar9002_phy.h" 20795f5e2cSLuis R. Rodriguez 21795f5e2cSLuis R. Rodriguez #define AR9285_CLCAL_REDO_THRESH 1 22795f5e2cSLuis R. Rodriguez 23795f5e2cSLuis R. Rodriguez static void ar9002_hw_setup_calibration(struct ath_hw *ah, 24795f5e2cSLuis R. Rodriguez struct ath9k_cal_list *currCal) 25795f5e2cSLuis R. Rodriguez { 26795f5e2cSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 27795f5e2cSLuis R. Rodriguez 28795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0), 29795f5e2cSLuis R. Rodriguez AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX, 30795f5e2cSLuis R. Rodriguez currCal->calData->calCountMax); 31795f5e2cSLuis R. Rodriguez 32795f5e2cSLuis R. Rodriguez switch (currCal->calData->calType) { 33795f5e2cSLuis R. Rodriguez case IQ_MISMATCH_CAL: 34795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ); 35795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 36795f5e2cSLuis R. Rodriguez "starting IQ Mismatch Calibration\n"); 37795f5e2cSLuis R. Rodriguez break; 38795f5e2cSLuis R. Rodriguez case ADC_GAIN_CAL: 39795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN); 40795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 41795f5e2cSLuis R. Rodriguez "starting ADC Gain Calibration\n"); 42795f5e2cSLuis R. Rodriguez break; 43795f5e2cSLuis R. Rodriguez case ADC_DC_CAL: 44795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER); 45795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 46795f5e2cSLuis R. Rodriguez "starting ADC DC Calibration\n"); 47795f5e2cSLuis R. Rodriguez break; 48795f5e2cSLuis R. Rodriguez case ADC_DC_INIT_CAL: 49795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_INIT); 50795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 51795f5e2cSLuis R. Rodriguez "starting Init ADC DC Calibration\n"); 52795f5e2cSLuis R. Rodriguez break; 534b01931eSLuis R. Rodriguez case TEMP_COMP_CAL: 544b01931eSLuis R. Rodriguez break; /* Not supported */ 55795f5e2cSLuis R. Rodriguez } 56795f5e2cSLuis R. Rodriguez 57795f5e2cSLuis R. Rodriguez REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0), 58795f5e2cSLuis R. Rodriguez AR_PHY_TIMING_CTRL4_DO_CAL); 59795f5e2cSLuis R. Rodriguez } 60795f5e2cSLuis R. Rodriguez 61795f5e2cSLuis R. Rodriguez static bool ar9002_hw_per_calibration(struct ath_hw *ah, 62795f5e2cSLuis R. Rodriguez struct ath9k_channel *ichan, 63795f5e2cSLuis R. Rodriguez u8 rxchainmask, 64795f5e2cSLuis R. Rodriguez struct ath9k_cal_list *currCal) 65795f5e2cSLuis R. Rodriguez { 6620bd2a09SFelix Fietkau struct ath9k_hw_cal_data *caldata = ah->caldata; 67795f5e2cSLuis R. Rodriguez bool iscaldone = false; 68795f5e2cSLuis R. Rodriguez 69795f5e2cSLuis R. Rodriguez if (currCal->calState == CAL_RUNNING) { 70795f5e2cSLuis R. Rodriguez if (!(REG_READ(ah, AR_PHY_TIMING_CTRL4(0)) & 71795f5e2cSLuis R. Rodriguez AR_PHY_TIMING_CTRL4_DO_CAL)) { 72795f5e2cSLuis R. Rodriguez 73795f5e2cSLuis R. Rodriguez currCal->calData->calCollect(ah); 74795f5e2cSLuis R. Rodriguez ah->cal_samples++; 75795f5e2cSLuis R. Rodriguez 76795f5e2cSLuis R. Rodriguez if (ah->cal_samples >= 77795f5e2cSLuis R. Rodriguez currCal->calData->calNumSamples) { 78795f5e2cSLuis R. Rodriguez int i, numChains = 0; 79795f5e2cSLuis R. Rodriguez for (i = 0; i < AR5416_MAX_CHAINS; i++) { 80795f5e2cSLuis R. Rodriguez if (rxchainmask & (1 << i)) 81795f5e2cSLuis R. Rodriguez numChains++; 82795f5e2cSLuis R. Rodriguez } 83795f5e2cSLuis R. Rodriguez 84795f5e2cSLuis R. Rodriguez currCal->calData->calPostProc(ah, numChains); 8520bd2a09SFelix Fietkau caldata->CalValid |= currCal->calData->calType; 86795f5e2cSLuis R. Rodriguez currCal->calState = CAL_DONE; 87795f5e2cSLuis R. Rodriguez iscaldone = true; 88795f5e2cSLuis R. Rodriguez } else { 89795f5e2cSLuis R. Rodriguez ar9002_hw_setup_calibration(ah, currCal); 90795f5e2cSLuis R. Rodriguez } 91795f5e2cSLuis R. Rodriguez } 9220bd2a09SFelix Fietkau } else if (!(caldata->CalValid & currCal->calData->calType)) { 93795f5e2cSLuis R. Rodriguez ath9k_hw_reset_calibration(ah, currCal); 94795f5e2cSLuis R. Rodriguez } 95795f5e2cSLuis R. Rodriguez 96795f5e2cSLuis R. Rodriguez return iscaldone; 97795f5e2cSLuis R. Rodriguez } 98795f5e2cSLuis R. Rodriguez 99795f5e2cSLuis R. Rodriguez /* Assumes you are talking about the currently configured channel */ 100795f5e2cSLuis R. Rodriguez static bool ar9002_hw_iscal_supported(struct ath_hw *ah, 101795f5e2cSLuis R. Rodriguez enum ath9k_cal_types calType) 102795f5e2cSLuis R. Rodriguez { 103795f5e2cSLuis R. Rodriguez struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf; 104795f5e2cSLuis R. Rodriguez 105795f5e2cSLuis R. Rodriguez switch (calType & ah->supp_cals) { 106795f5e2cSLuis R. Rodriguez case IQ_MISMATCH_CAL: /* Both 2 GHz and 5 GHz support OFDM */ 107795f5e2cSLuis R. Rodriguez return true; 108795f5e2cSLuis R. Rodriguez case ADC_GAIN_CAL: 109795f5e2cSLuis R. Rodriguez case ADC_DC_CAL: 110795f5e2cSLuis R. Rodriguez if (!(conf->channel->band == IEEE80211_BAND_2GHZ && 111795f5e2cSLuis R. Rodriguez conf_is_ht20(conf))) 112795f5e2cSLuis R. Rodriguez return true; 113795f5e2cSLuis R. Rodriguez break; 114795f5e2cSLuis R. Rodriguez } 115795f5e2cSLuis R. Rodriguez return false; 116795f5e2cSLuis R. Rodriguez } 117795f5e2cSLuis R. Rodriguez 118795f5e2cSLuis R. Rodriguez static void ar9002_hw_iqcal_collect(struct ath_hw *ah) 119795f5e2cSLuis R. Rodriguez { 120795f5e2cSLuis R. Rodriguez int i; 121795f5e2cSLuis R. Rodriguez 122795f5e2cSLuis R. Rodriguez for (i = 0; i < AR5416_MAX_CHAINS; i++) { 123795f5e2cSLuis R. Rodriguez ah->totalPowerMeasI[i] += 124795f5e2cSLuis R. Rodriguez REG_READ(ah, AR_PHY_CAL_MEAS_0(i)); 125795f5e2cSLuis R. Rodriguez ah->totalPowerMeasQ[i] += 126795f5e2cSLuis R. Rodriguez REG_READ(ah, AR_PHY_CAL_MEAS_1(i)); 127795f5e2cSLuis R. Rodriguez ah->totalIqCorrMeas[i] += 128795f5e2cSLuis R. Rodriguez (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i)); 129795f5e2cSLuis R. Rodriguez ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE, 130795f5e2cSLuis R. Rodriguez "%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n", 131795f5e2cSLuis R. Rodriguez ah->cal_samples, i, ah->totalPowerMeasI[i], 132795f5e2cSLuis R. Rodriguez ah->totalPowerMeasQ[i], 133795f5e2cSLuis R. Rodriguez ah->totalIqCorrMeas[i]); 134795f5e2cSLuis R. Rodriguez } 135795f5e2cSLuis R. Rodriguez } 136795f5e2cSLuis R. Rodriguez 137795f5e2cSLuis R. Rodriguez static void ar9002_hw_adc_gaincal_collect(struct ath_hw *ah) 138795f5e2cSLuis R. Rodriguez { 139795f5e2cSLuis R. Rodriguez int i; 140795f5e2cSLuis R. Rodriguez 141795f5e2cSLuis R. Rodriguez for (i = 0; i < AR5416_MAX_CHAINS; i++) { 142795f5e2cSLuis R. Rodriguez ah->totalAdcIOddPhase[i] += 143795f5e2cSLuis R. Rodriguez REG_READ(ah, AR_PHY_CAL_MEAS_0(i)); 144795f5e2cSLuis R. Rodriguez ah->totalAdcIEvenPhase[i] += 145795f5e2cSLuis R. Rodriguez REG_READ(ah, AR_PHY_CAL_MEAS_1(i)); 146795f5e2cSLuis R. Rodriguez ah->totalAdcQOddPhase[i] += 147795f5e2cSLuis R. Rodriguez REG_READ(ah, AR_PHY_CAL_MEAS_2(i)); 148795f5e2cSLuis R. Rodriguez ah->totalAdcQEvenPhase[i] += 149795f5e2cSLuis R. Rodriguez REG_READ(ah, AR_PHY_CAL_MEAS_3(i)); 150795f5e2cSLuis R. Rodriguez 151795f5e2cSLuis R. Rodriguez ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE, 152795f5e2cSLuis R. Rodriguez "%d: Chn %d oddi=0x%08x; eveni=0x%08x; " 153795f5e2cSLuis R. Rodriguez "oddq=0x%08x; evenq=0x%08x;\n", 154795f5e2cSLuis R. Rodriguez ah->cal_samples, i, 155795f5e2cSLuis R. Rodriguez ah->totalAdcIOddPhase[i], 156795f5e2cSLuis R. Rodriguez ah->totalAdcIEvenPhase[i], 157795f5e2cSLuis R. Rodriguez ah->totalAdcQOddPhase[i], 158795f5e2cSLuis R. Rodriguez ah->totalAdcQEvenPhase[i]); 159795f5e2cSLuis R. Rodriguez } 160795f5e2cSLuis R. Rodriguez } 161795f5e2cSLuis R. Rodriguez 162795f5e2cSLuis R. Rodriguez static void ar9002_hw_adc_dccal_collect(struct ath_hw *ah) 163795f5e2cSLuis R. Rodriguez { 164795f5e2cSLuis R. Rodriguez int i; 165795f5e2cSLuis R. Rodriguez 166795f5e2cSLuis R. Rodriguez for (i = 0; i < AR5416_MAX_CHAINS; i++) { 167795f5e2cSLuis R. Rodriguez ah->totalAdcDcOffsetIOddPhase[i] += 168795f5e2cSLuis R. Rodriguez (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_0(i)); 169795f5e2cSLuis R. Rodriguez ah->totalAdcDcOffsetIEvenPhase[i] += 170795f5e2cSLuis R. Rodriguez (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_1(i)); 171795f5e2cSLuis R. Rodriguez ah->totalAdcDcOffsetQOddPhase[i] += 172795f5e2cSLuis R. Rodriguez (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i)); 173795f5e2cSLuis R. Rodriguez ah->totalAdcDcOffsetQEvenPhase[i] += 174795f5e2cSLuis R. Rodriguez (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_3(i)); 175795f5e2cSLuis R. Rodriguez 176795f5e2cSLuis R. Rodriguez ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE, 177795f5e2cSLuis R. Rodriguez "%d: Chn %d oddi=0x%08x; eveni=0x%08x; " 178795f5e2cSLuis R. Rodriguez "oddq=0x%08x; evenq=0x%08x;\n", 179795f5e2cSLuis R. Rodriguez ah->cal_samples, i, 180795f5e2cSLuis R. Rodriguez ah->totalAdcDcOffsetIOddPhase[i], 181795f5e2cSLuis R. Rodriguez ah->totalAdcDcOffsetIEvenPhase[i], 182795f5e2cSLuis R. Rodriguez ah->totalAdcDcOffsetQOddPhase[i], 183795f5e2cSLuis R. Rodriguez ah->totalAdcDcOffsetQEvenPhase[i]); 184795f5e2cSLuis R. Rodriguez } 185795f5e2cSLuis R. Rodriguez } 186795f5e2cSLuis R. Rodriguez 187795f5e2cSLuis R. Rodriguez static void ar9002_hw_iqcalibrate(struct ath_hw *ah, u8 numChains) 188795f5e2cSLuis R. Rodriguez { 189795f5e2cSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 190795f5e2cSLuis R. Rodriguez u32 powerMeasQ, powerMeasI, iqCorrMeas; 191795f5e2cSLuis R. Rodriguez u32 qCoffDenom, iCoffDenom; 192795f5e2cSLuis R. Rodriguez int32_t qCoff, iCoff; 193795f5e2cSLuis R. Rodriguez int iqCorrNeg, i; 194795f5e2cSLuis R. Rodriguez 195795f5e2cSLuis R. Rodriguez for (i = 0; i < numChains; i++) { 196795f5e2cSLuis R. Rodriguez powerMeasI = ah->totalPowerMeasI[i]; 197795f5e2cSLuis R. Rodriguez powerMeasQ = ah->totalPowerMeasQ[i]; 198795f5e2cSLuis R. Rodriguez iqCorrMeas = ah->totalIqCorrMeas[i]; 199795f5e2cSLuis R. Rodriguez 200795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 201795f5e2cSLuis R. Rodriguez "Starting IQ Cal and Correction for Chain %d\n", 202795f5e2cSLuis R. Rodriguez i); 203795f5e2cSLuis R. Rodriguez 204795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 205795f5e2cSLuis R. Rodriguez "Orignal: Chn %diq_corr_meas = 0x%08x\n", 206795f5e2cSLuis R. Rodriguez i, ah->totalIqCorrMeas[i]); 207795f5e2cSLuis R. Rodriguez 208795f5e2cSLuis R. Rodriguez iqCorrNeg = 0; 209795f5e2cSLuis R. Rodriguez 210795f5e2cSLuis R. Rodriguez if (iqCorrMeas > 0x80000000) { 211795f5e2cSLuis R. Rodriguez iqCorrMeas = (0xffffffff - iqCorrMeas) + 1; 212795f5e2cSLuis R. Rodriguez iqCorrNeg = 1; 213795f5e2cSLuis R. Rodriguez } 214795f5e2cSLuis R. Rodriguez 215795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 216795f5e2cSLuis R. Rodriguez "Chn %d pwr_meas_i = 0x%08x\n", i, powerMeasI); 217795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 218795f5e2cSLuis R. Rodriguez "Chn %d pwr_meas_q = 0x%08x\n", i, powerMeasQ); 219795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, "iqCorrNeg is 0x%08x\n", 220795f5e2cSLuis R. Rodriguez iqCorrNeg); 221795f5e2cSLuis R. Rodriguez 222795f5e2cSLuis R. Rodriguez iCoffDenom = (powerMeasI / 2 + powerMeasQ / 2) / 128; 223795f5e2cSLuis R. Rodriguez qCoffDenom = powerMeasQ / 64; 224795f5e2cSLuis R. Rodriguez 225795f5e2cSLuis R. Rodriguez if ((powerMeasQ != 0) && (iCoffDenom != 0) && 226795f5e2cSLuis R. Rodriguez (qCoffDenom != 0)) { 227795f5e2cSLuis R. Rodriguez iCoff = iqCorrMeas / iCoffDenom; 228795f5e2cSLuis R. Rodriguez qCoff = powerMeasI / qCoffDenom - 64; 229795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 230795f5e2cSLuis R. Rodriguez "Chn %d iCoff = 0x%08x\n", i, iCoff); 231795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 232795f5e2cSLuis R. Rodriguez "Chn %d qCoff = 0x%08x\n", i, qCoff); 233795f5e2cSLuis R. Rodriguez 234795f5e2cSLuis R. Rodriguez iCoff = iCoff & 0x3f; 235795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 236795f5e2cSLuis R. Rodriguez "New: Chn %d iCoff = 0x%08x\n", i, iCoff); 237795f5e2cSLuis R. Rodriguez if (iqCorrNeg == 0x0) 238795f5e2cSLuis R. Rodriguez iCoff = 0x40 - iCoff; 239795f5e2cSLuis R. Rodriguez 240795f5e2cSLuis R. Rodriguez if (qCoff > 15) 241795f5e2cSLuis R. Rodriguez qCoff = 15; 242795f5e2cSLuis R. Rodriguez else if (qCoff <= -16) 24323399016SFelix Fietkau qCoff = -16; 244795f5e2cSLuis R. Rodriguez 245795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 246795f5e2cSLuis R. Rodriguez "Chn %d : iCoff = 0x%x qCoff = 0x%x\n", 247795f5e2cSLuis R. Rodriguez i, iCoff, qCoff); 248795f5e2cSLuis R. Rodriguez 249795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i), 250795f5e2cSLuis R. Rodriguez AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF, 251795f5e2cSLuis R. Rodriguez iCoff); 252795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i), 253795f5e2cSLuis R. Rodriguez AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF, 254795f5e2cSLuis R. Rodriguez qCoff); 255795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 256795f5e2cSLuis R. Rodriguez "IQ Cal and Correction done for Chain %d\n", 257795f5e2cSLuis R. Rodriguez i); 258795f5e2cSLuis R. Rodriguez } 259795f5e2cSLuis R. Rodriguez } 260795f5e2cSLuis R. Rodriguez 261795f5e2cSLuis R. Rodriguez REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0), 262795f5e2cSLuis R. Rodriguez AR_PHY_TIMING_CTRL4_IQCORR_ENABLE); 263795f5e2cSLuis R. Rodriguez } 264795f5e2cSLuis R. Rodriguez 265795f5e2cSLuis R. Rodriguez static void ar9002_hw_adc_gaincal_calibrate(struct ath_hw *ah, u8 numChains) 266795f5e2cSLuis R. Rodriguez { 267795f5e2cSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 268795f5e2cSLuis R. Rodriguez u32 iOddMeasOffset, iEvenMeasOffset, qOddMeasOffset, qEvenMeasOffset; 269795f5e2cSLuis R. Rodriguez u32 qGainMismatch, iGainMismatch, val, i; 270795f5e2cSLuis R. Rodriguez 271795f5e2cSLuis R. Rodriguez for (i = 0; i < numChains; i++) { 272795f5e2cSLuis R. Rodriguez iOddMeasOffset = ah->totalAdcIOddPhase[i]; 273795f5e2cSLuis R. Rodriguez iEvenMeasOffset = ah->totalAdcIEvenPhase[i]; 274795f5e2cSLuis R. Rodriguez qOddMeasOffset = ah->totalAdcQOddPhase[i]; 275795f5e2cSLuis R. Rodriguez qEvenMeasOffset = ah->totalAdcQEvenPhase[i]; 276795f5e2cSLuis R. Rodriguez 277795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 278795f5e2cSLuis R. Rodriguez "Starting ADC Gain Cal for Chain %d\n", i); 279795f5e2cSLuis R. Rodriguez 280795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 281795f5e2cSLuis R. Rodriguez "Chn %d pwr_meas_odd_i = 0x%08x\n", i, 282795f5e2cSLuis R. Rodriguez iOddMeasOffset); 283795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 284795f5e2cSLuis R. Rodriguez "Chn %d pwr_meas_even_i = 0x%08x\n", i, 285795f5e2cSLuis R. Rodriguez iEvenMeasOffset); 286795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 287795f5e2cSLuis R. Rodriguez "Chn %d pwr_meas_odd_q = 0x%08x\n", i, 288795f5e2cSLuis R. Rodriguez qOddMeasOffset); 289795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 290795f5e2cSLuis R. Rodriguez "Chn %d pwr_meas_even_q = 0x%08x\n", i, 291795f5e2cSLuis R. Rodriguez qEvenMeasOffset); 292795f5e2cSLuis R. Rodriguez 293795f5e2cSLuis R. Rodriguez if (iOddMeasOffset != 0 && qEvenMeasOffset != 0) { 294795f5e2cSLuis R. Rodriguez iGainMismatch = 295795f5e2cSLuis R. Rodriguez ((iEvenMeasOffset * 32) / 296795f5e2cSLuis R. Rodriguez iOddMeasOffset) & 0x3f; 297795f5e2cSLuis R. Rodriguez qGainMismatch = 298795f5e2cSLuis R. Rodriguez ((qOddMeasOffset * 32) / 299795f5e2cSLuis R. Rodriguez qEvenMeasOffset) & 0x3f; 300795f5e2cSLuis R. Rodriguez 301795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 302795f5e2cSLuis R. Rodriguez "Chn %d gain_mismatch_i = 0x%08x\n", i, 303795f5e2cSLuis R. Rodriguez iGainMismatch); 304795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 305795f5e2cSLuis R. Rodriguez "Chn %d gain_mismatch_q = 0x%08x\n", i, 306795f5e2cSLuis R. Rodriguez qGainMismatch); 307795f5e2cSLuis R. Rodriguez 308795f5e2cSLuis R. Rodriguez val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i)); 309795f5e2cSLuis R. Rodriguez val &= 0xfffff000; 310795f5e2cSLuis R. Rodriguez val |= (qGainMismatch) | (iGainMismatch << 6); 311795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val); 312795f5e2cSLuis R. Rodriguez 313795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 314795f5e2cSLuis R. Rodriguez "ADC Gain Cal done for Chain %d\n", i); 315795f5e2cSLuis R. Rodriguez } 316795f5e2cSLuis R. Rodriguez } 317795f5e2cSLuis R. Rodriguez 318795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0), 319795f5e2cSLuis R. Rodriguez REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0)) | 320795f5e2cSLuis R. Rodriguez AR_PHY_NEW_ADC_GAIN_CORR_ENABLE); 321795f5e2cSLuis R. Rodriguez } 322795f5e2cSLuis R. Rodriguez 323795f5e2cSLuis R. Rodriguez static void ar9002_hw_adc_dccal_calibrate(struct ath_hw *ah, u8 numChains) 324795f5e2cSLuis R. Rodriguez { 325795f5e2cSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 326795f5e2cSLuis R. Rodriguez u32 iOddMeasOffset, iEvenMeasOffset, val, i; 327795f5e2cSLuis R. Rodriguez int32_t qOddMeasOffset, qEvenMeasOffset, qDcMismatch, iDcMismatch; 328795f5e2cSLuis R. Rodriguez const struct ath9k_percal_data *calData = 329795f5e2cSLuis R. Rodriguez ah->cal_list_curr->calData; 330795f5e2cSLuis R. Rodriguez u32 numSamples = 331795f5e2cSLuis R. Rodriguez (1 << (calData->calCountMax + 5)) * calData->calNumSamples; 332795f5e2cSLuis R. Rodriguez 333795f5e2cSLuis R. Rodriguez for (i = 0; i < numChains; i++) { 334795f5e2cSLuis R. Rodriguez iOddMeasOffset = ah->totalAdcDcOffsetIOddPhase[i]; 335795f5e2cSLuis R. Rodriguez iEvenMeasOffset = ah->totalAdcDcOffsetIEvenPhase[i]; 336795f5e2cSLuis R. Rodriguez qOddMeasOffset = ah->totalAdcDcOffsetQOddPhase[i]; 337795f5e2cSLuis R. Rodriguez qEvenMeasOffset = ah->totalAdcDcOffsetQEvenPhase[i]; 338795f5e2cSLuis R. Rodriguez 339795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 340795f5e2cSLuis R. Rodriguez "Starting ADC DC Offset Cal for Chain %d\n", i); 341795f5e2cSLuis R. Rodriguez 342795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 343795f5e2cSLuis R. Rodriguez "Chn %d pwr_meas_odd_i = %d\n", i, 344795f5e2cSLuis R. Rodriguez iOddMeasOffset); 345795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 346795f5e2cSLuis R. Rodriguez "Chn %d pwr_meas_even_i = %d\n", i, 347795f5e2cSLuis R. Rodriguez iEvenMeasOffset); 348795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 349795f5e2cSLuis R. Rodriguez "Chn %d pwr_meas_odd_q = %d\n", i, 350795f5e2cSLuis R. Rodriguez qOddMeasOffset); 351795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 352795f5e2cSLuis R. Rodriguez "Chn %d pwr_meas_even_q = %d\n", i, 353795f5e2cSLuis R. Rodriguez qEvenMeasOffset); 354795f5e2cSLuis R. Rodriguez 355795f5e2cSLuis R. Rodriguez iDcMismatch = (((iEvenMeasOffset - iOddMeasOffset) * 2) / 356795f5e2cSLuis R. Rodriguez numSamples) & 0x1ff; 357795f5e2cSLuis R. Rodriguez qDcMismatch = (((qOddMeasOffset - qEvenMeasOffset) * 2) / 358795f5e2cSLuis R. Rodriguez numSamples) & 0x1ff; 359795f5e2cSLuis R. Rodriguez 360795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 361795f5e2cSLuis R. Rodriguez "Chn %d dc_offset_mismatch_i = 0x%08x\n", i, 362795f5e2cSLuis R. Rodriguez iDcMismatch); 363795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 364795f5e2cSLuis R. Rodriguez "Chn %d dc_offset_mismatch_q = 0x%08x\n", i, 365795f5e2cSLuis R. Rodriguez qDcMismatch); 366795f5e2cSLuis R. Rodriguez 367795f5e2cSLuis R. Rodriguez val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i)); 368795f5e2cSLuis R. Rodriguez val &= 0xc0000fff; 369795f5e2cSLuis R. Rodriguez val |= (qDcMismatch << 12) | (iDcMismatch << 21); 370795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val); 371795f5e2cSLuis R. Rodriguez 372795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 373795f5e2cSLuis R. Rodriguez "ADC DC Offset Cal done for Chain %d\n", i); 374795f5e2cSLuis R. Rodriguez } 375795f5e2cSLuis R. Rodriguez 376795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0), 377795f5e2cSLuis R. Rodriguez REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0)) | 378795f5e2cSLuis R. Rodriguez AR_PHY_NEW_ADC_DC_OFFSET_CORR_ENABLE); 379795f5e2cSLuis R. Rodriguez } 380795f5e2cSLuis R. Rodriguez 381795f5e2cSLuis R. Rodriguez static void ar9287_hw_olc_temp_compensation(struct ath_hw *ah) 382795f5e2cSLuis R. Rodriguez { 383795f5e2cSLuis R. Rodriguez u32 rddata; 384795f5e2cSLuis R. Rodriguez int32_t delta, currPDADC, slope; 385795f5e2cSLuis R. Rodriguez 386795f5e2cSLuis R. Rodriguez rddata = REG_READ(ah, AR_PHY_TX_PWRCTRL4); 387795f5e2cSLuis R. Rodriguez currPDADC = MS(rddata, AR_PHY_TX_PWRCTRL_PD_AVG_OUT); 388795f5e2cSLuis R. Rodriguez 389795f5e2cSLuis R. Rodriguez if (ah->initPDADC == 0 || currPDADC == 0) { 390795f5e2cSLuis R. Rodriguez /* 391795f5e2cSLuis R. Rodriguez * Zero value indicates that no frames have been transmitted 392795f5e2cSLuis R. Rodriguez * yet, can't do temperature compensation until frames are 393795f5e2cSLuis R. Rodriguez * transmitted. 394795f5e2cSLuis R. Rodriguez */ 395795f5e2cSLuis R. Rodriguez return; 396795f5e2cSLuis R. Rodriguez } else { 397795f5e2cSLuis R. Rodriguez slope = ah->eep_ops->get_eeprom(ah, EEP_TEMPSENSE_SLOPE); 398795f5e2cSLuis R. Rodriguez 399795f5e2cSLuis R. Rodriguez if (slope == 0) { /* to avoid divide by zero case */ 400795f5e2cSLuis R. Rodriguez delta = 0; 401795f5e2cSLuis R. Rodriguez } else { 402795f5e2cSLuis R. Rodriguez delta = ((currPDADC - ah->initPDADC)*4) / slope; 403795f5e2cSLuis R. Rodriguez } 404795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR_PHY_CH0_TX_PWRCTRL11, 405795f5e2cSLuis R. Rodriguez AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP, delta); 406795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR_PHY_CH1_TX_PWRCTRL11, 407795f5e2cSLuis R. Rodriguez AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP, delta); 408795f5e2cSLuis R. Rodriguez } 409795f5e2cSLuis R. Rodriguez } 410795f5e2cSLuis R. Rodriguez 411795f5e2cSLuis R. Rodriguez static void ar9280_hw_olc_temp_compensation(struct ath_hw *ah) 412795f5e2cSLuis R. Rodriguez { 413795f5e2cSLuis R. Rodriguez u32 rddata, i; 414795f5e2cSLuis R. Rodriguez int delta, currPDADC, regval; 415795f5e2cSLuis R. Rodriguez 416795f5e2cSLuis R. Rodriguez rddata = REG_READ(ah, AR_PHY_TX_PWRCTRL4); 417795f5e2cSLuis R. Rodriguez currPDADC = MS(rddata, AR_PHY_TX_PWRCTRL_PD_AVG_OUT); 418795f5e2cSLuis R. Rodriguez 419795f5e2cSLuis R. Rodriguez if (ah->initPDADC == 0 || currPDADC == 0) 420795f5e2cSLuis R. Rodriguez return; 421795f5e2cSLuis R. Rodriguez 422795f5e2cSLuis R. Rodriguez if (ah->eep_ops->get_eeprom(ah, EEP_DAC_HPWR_5G)) 423795f5e2cSLuis R. Rodriguez delta = (currPDADC - ah->initPDADC + 4) / 8; 424795f5e2cSLuis R. Rodriguez else 425795f5e2cSLuis R. Rodriguez delta = (currPDADC - ah->initPDADC + 5) / 10; 426795f5e2cSLuis R. Rodriguez 427795f5e2cSLuis R. Rodriguez if (delta != ah->PDADCdelta) { 428795f5e2cSLuis R. Rodriguez ah->PDADCdelta = delta; 429795f5e2cSLuis R. Rodriguez for (i = 1; i < AR9280_TX_GAIN_TABLE_SIZE; i++) { 430795f5e2cSLuis R. Rodriguez regval = ah->originalGain[i] - delta; 431795f5e2cSLuis R. Rodriguez if (regval < 0) 432795f5e2cSLuis R. Rodriguez regval = 0; 433795f5e2cSLuis R. Rodriguez 434795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, 435795f5e2cSLuis R. Rodriguez AR_PHY_TX_GAIN_TBL1 + i * 4, 436795f5e2cSLuis R. Rodriguez AR_PHY_TX_GAIN, regval); 437795f5e2cSLuis R. Rodriguez } 438795f5e2cSLuis R. Rodriguez } 439795f5e2cSLuis R. Rodriguez } 440795f5e2cSLuis R. Rodriguez 441795f5e2cSLuis R. Rodriguez static void ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset) 442795f5e2cSLuis R. Rodriguez { 443795f5e2cSLuis R. Rodriguez u32 regVal; 444795f5e2cSLuis R. Rodriguez unsigned int i; 445795f5e2cSLuis R. Rodriguez u32 regList[][2] = { 446795f5e2cSLuis R. Rodriguez { 0x786c, 0 }, 447795f5e2cSLuis R. Rodriguez { 0x7854, 0 }, 448795f5e2cSLuis R. Rodriguez { 0x7820, 0 }, 449795f5e2cSLuis R. Rodriguez { 0x7824, 0 }, 450795f5e2cSLuis R. Rodriguez { 0x7868, 0 }, 451795f5e2cSLuis R. Rodriguez { 0x783c, 0 }, 452795f5e2cSLuis R. Rodriguez { 0x7838, 0 } , 453795f5e2cSLuis R. Rodriguez { 0x7828, 0 } , 454795f5e2cSLuis R. Rodriguez }; 455795f5e2cSLuis R. Rodriguez 456795f5e2cSLuis R. Rodriguez for (i = 0; i < ARRAY_SIZE(regList); i++) 457795f5e2cSLuis R. Rodriguez regList[i][1] = REG_READ(ah, regList[i][0]); 458795f5e2cSLuis R. Rodriguez 459795f5e2cSLuis R. Rodriguez regVal = REG_READ(ah, 0x7834); 460795f5e2cSLuis R. Rodriguez regVal &= (~(0x1)); 461795f5e2cSLuis R. Rodriguez REG_WRITE(ah, 0x7834, regVal); 462795f5e2cSLuis R. Rodriguez regVal = REG_READ(ah, 0x9808); 463795f5e2cSLuis R. Rodriguez regVal |= (0x1 << 27); 464795f5e2cSLuis R. Rodriguez REG_WRITE(ah, 0x9808, regVal); 465795f5e2cSLuis R. Rodriguez 466795f5e2cSLuis R. Rodriguez /* 786c,b23,1, pwddac=1 */ 467795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1); 468795f5e2cSLuis R. Rodriguez /* 7854, b5,1, pdrxtxbb=1 */ 469795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1); 470795f5e2cSLuis R. Rodriguez /* 7854, b7,1, pdv2i=1 */ 471795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1); 472795f5e2cSLuis R. Rodriguez /* 7854, b8,1, pddacinterface=1 */ 473795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF, 1); 474795f5e2cSLuis R. Rodriguez /* 7824,b12,0, offcal=0 */ 475795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL, 0); 476795f5e2cSLuis R. Rodriguez /* 7838, b1,0, pwddb=0 */ 477795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB, 0); 478795f5e2cSLuis R. Rodriguez /* 7820,b11,0, enpacal=0 */ 479795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL, 0); 480795f5e2cSLuis R. Rodriguez /* 7820,b25,1, pdpadrv1=0 */ 481795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1, 0); 482795f5e2cSLuis R. Rodriguez /* 7820,b24,0, pdpadrv2=0 */ 483795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV2, 0); 484795f5e2cSLuis R. Rodriguez /* 7820,b23,0, pdpaout=0 */ 485795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT, 0); 486795f5e2cSLuis R. Rodriguez /* 783c,b14-16,7, padrvgn2tab_0=7 */ 487795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G8, AR9285_AN_RF2G8_PADRVGN2TAB0, 7); 488795f5e2cSLuis R. Rodriguez /* 489795f5e2cSLuis R. Rodriguez * 7838,b29-31,0, padrvgn1tab_0=0 490795f5e2cSLuis R. Rodriguez * does not matter since we turn it off 491795f5e2cSLuis R. Rodriguez */ 492795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PADRVGN2TAB0, 0); 493795f5e2cSLuis R. Rodriguez 494795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9271_AN_RF2G3_CCOMP, 0xfff); 495795f5e2cSLuis R. Rodriguez 496795f5e2cSLuis R. Rodriguez /* Set: 497795f5e2cSLuis R. Rodriguez * localmode=1,bmode=1,bmoderxtx=1,synthon=1, 498795f5e2cSLuis R. Rodriguez * txon=1,paon=1,oscon=1,synthon_force=1 499795f5e2cSLuis R. Rodriguez */ 500795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR9285_AN_TOP2, 0xca0358a0); 501795f5e2cSLuis R. Rodriguez udelay(30); 502795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9271_AN_RF2G6_OFFS, 0); 503795f5e2cSLuis R. Rodriguez 504795f5e2cSLuis R. Rodriguez /* find off_6_1; */ 505795f5e2cSLuis R. Rodriguez for (i = 6; i > 0; i--) { 506795f5e2cSLuis R. Rodriguez regVal = REG_READ(ah, 0x7834); 507795f5e2cSLuis R. Rodriguez regVal |= (1 << (20 + i)); 508795f5e2cSLuis R. Rodriguez REG_WRITE(ah, 0x7834, regVal); 509795f5e2cSLuis R. Rodriguez udelay(1); 510795f5e2cSLuis R. Rodriguez /* regVal = REG_READ(ah, 0x7834); */ 511795f5e2cSLuis R. Rodriguez regVal &= (~(0x1 << (20 + i))); 512795f5e2cSLuis R. Rodriguez regVal |= (MS(REG_READ(ah, 0x7840), AR9285_AN_RXTXBB1_SPARE9) 513795f5e2cSLuis R. Rodriguez << (20 + i)); 514795f5e2cSLuis R. Rodriguez REG_WRITE(ah, 0x7834, regVal); 515795f5e2cSLuis R. Rodriguez } 516795f5e2cSLuis R. Rodriguez 517795f5e2cSLuis R. Rodriguez regVal = (regVal >> 20) & 0x7f; 518795f5e2cSLuis R. Rodriguez 519795f5e2cSLuis R. Rodriguez /* Update PA cal info */ 520795f5e2cSLuis R. Rodriguez if ((!is_reset) && (ah->pacal_info.prev_offset == regVal)) { 521795f5e2cSLuis R. Rodriguez if (ah->pacal_info.max_skipcount < MAX_PACAL_SKIPCOUNT) 522795f5e2cSLuis R. Rodriguez ah->pacal_info.max_skipcount = 523795f5e2cSLuis R. Rodriguez 2 * ah->pacal_info.max_skipcount; 524795f5e2cSLuis R. Rodriguez ah->pacal_info.skipcount = ah->pacal_info.max_skipcount; 525795f5e2cSLuis R. Rodriguez } else { 526795f5e2cSLuis R. Rodriguez ah->pacal_info.max_skipcount = 1; 527795f5e2cSLuis R. Rodriguez ah->pacal_info.skipcount = 0; 528795f5e2cSLuis R. Rodriguez ah->pacal_info.prev_offset = regVal; 529795f5e2cSLuis R. Rodriguez } 530795f5e2cSLuis R. Rodriguez 5317d0d0df0SSujith ENABLE_REGWRITE_BUFFER(ah); 5327d0d0df0SSujith 533795f5e2cSLuis R. Rodriguez regVal = REG_READ(ah, 0x7834); 534795f5e2cSLuis R. Rodriguez regVal |= 0x1; 535795f5e2cSLuis R. Rodriguez REG_WRITE(ah, 0x7834, regVal); 536795f5e2cSLuis R. Rodriguez regVal = REG_READ(ah, 0x9808); 537795f5e2cSLuis R. Rodriguez regVal &= (~(0x1 << 27)); 538795f5e2cSLuis R. Rodriguez REG_WRITE(ah, 0x9808, regVal); 539795f5e2cSLuis R. Rodriguez 540795f5e2cSLuis R. Rodriguez for (i = 0; i < ARRAY_SIZE(regList); i++) 541795f5e2cSLuis R. Rodriguez REG_WRITE(ah, regList[i][0], regList[i][1]); 5427d0d0df0SSujith 5437d0d0df0SSujith REGWRITE_BUFFER_FLUSH(ah); 5447d0d0df0SSujith DISABLE_REGWRITE_BUFFER(ah); 545795f5e2cSLuis R. Rodriguez } 546795f5e2cSLuis R. Rodriguez 547795f5e2cSLuis R. Rodriguez static inline void ar9285_hw_pa_cal(struct ath_hw *ah, bool is_reset) 548795f5e2cSLuis R. Rodriguez { 549795f5e2cSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 550795f5e2cSLuis R. Rodriguez u32 regVal; 551795f5e2cSLuis R. Rodriguez int i, offset, offs_6_1, offs_0; 552795f5e2cSLuis R. Rodriguez u32 ccomp_org, reg_field; 553795f5e2cSLuis R. Rodriguez u32 regList[][2] = { 554795f5e2cSLuis R. Rodriguez { 0x786c, 0 }, 555795f5e2cSLuis R. Rodriguez { 0x7854, 0 }, 556795f5e2cSLuis R. Rodriguez { 0x7820, 0 }, 557795f5e2cSLuis R. Rodriguez { 0x7824, 0 }, 558795f5e2cSLuis R. Rodriguez { 0x7868, 0 }, 559795f5e2cSLuis R. Rodriguez { 0x783c, 0 }, 560795f5e2cSLuis R. Rodriguez { 0x7838, 0 }, 561795f5e2cSLuis R. Rodriguez }; 562795f5e2cSLuis R. Rodriguez 563795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, "Running PA Calibration\n"); 564795f5e2cSLuis R. Rodriguez 565795f5e2cSLuis R. Rodriguez /* PA CAL is not needed for high power solution */ 566795f5e2cSLuis R. Rodriguez if (ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE) == 567795f5e2cSLuis R. Rodriguez AR5416_EEP_TXGAIN_HIGH_POWER) 568795f5e2cSLuis R. Rodriguez return; 569795f5e2cSLuis R. Rodriguez 570795f5e2cSLuis R. Rodriguez if (AR_SREV_9285_11(ah)) { 571795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR9285_AN_TOP4, (AR9285_AN_TOP4_DEFAULT | 0x14)); 572795f5e2cSLuis R. Rodriguez udelay(10); 573795f5e2cSLuis R. Rodriguez } 574795f5e2cSLuis R. Rodriguez 575795f5e2cSLuis R. Rodriguez for (i = 0; i < ARRAY_SIZE(regList); i++) 576795f5e2cSLuis R. Rodriguez regList[i][1] = REG_READ(ah, regList[i][0]); 577795f5e2cSLuis R. Rodriguez 578795f5e2cSLuis R. Rodriguez regVal = REG_READ(ah, 0x7834); 579795f5e2cSLuis R. Rodriguez regVal &= (~(0x1)); 580795f5e2cSLuis R. Rodriguez REG_WRITE(ah, 0x7834, regVal); 581795f5e2cSLuis R. Rodriguez regVal = REG_READ(ah, 0x9808); 582795f5e2cSLuis R. Rodriguez regVal |= (0x1 << 27); 583795f5e2cSLuis R. Rodriguez REG_WRITE(ah, 0x9808, regVal); 584795f5e2cSLuis R. Rodriguez 585795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1); 586795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1); 587795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1); 588795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF, 1); 589795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL, 0); 590795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB, 0); 591795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL, 0); 592795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1, 0); 593795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV2, 0); 594795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT, 0); 595795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G8, AR9285_AN_RF2G8_PADRVGN2TAB0, 7); 596795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PADRVGN2TAB0, 0); 597795f5e2cSLuis R. Rodriguez ccomp_org = MS(REG_READ(ah, AR9285_AN_RF2G6), AR9285_AN_RF2G6_CCOMP); 598795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_CCOMP, 0xf); 599795f5e2cSLuis R. Rodriguez 600795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR9285_AN_TOP2, 0xca0358a0); 601795f5e2cSLuis R. Rodriguez udelay(30); 602795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_OFFS, 0); 603795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, 0); 604795f5e2cSLuis R. Rodriguez 605795f5e2cSLuis R. Rodriguez for (i = 6; i > 0; i--) { 606795f5e2cSLuis R. Rodriguez regVal = REG_READ(ah, 0x7834); 607795f5e2cSLuis R. Rodriguez regVal |= (1 << (19 + i)); 608795f5e2cSLuis R. Rodriguez REG_WRITE(ah, 0x7834, regVal); 609795f5e2cSLuis R. Rodriguez udelay(1); 610795f5e2cSLuis R. Rodriguez regVal = REG_READ(ah, 0x7834); 611795f5e2cSLuis R. Rodriguez regVal &= (~(0x1 << (19 + i))); 612795f5e2cSLuis R. Rodriguez reg_field = MS(REG_READ(ah, 0x7840), AR9285_AN_RXTXBB1_SPARE9); 613795f5e2cSLuis R. Rodriguez regVal |= (reg_field << (19 + i)); 614795f5e2cSLuis R. Rodriguez REG_WRITE(ah, 0x7834, regVal); 615795f5e2cSLuis R. Rodriguez } 616795f5e2cSLuis R. Rodriguez 617795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, 1); 618795f5e2cSLuis R. Rodriguez udelay(1); 619795f5e2cSLuis R. Rodriguez reg_field = MS(REG_READ(ah, AR9285_AN_RF2G9), AR9285_AN_RXTXBB1_SPARE9); 620795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, reg_field); 621795f5e2cSLuis R. Rodriguez offs_6_1 = MS(REG_READ(ah, AR9285_AN_RF2G6), AR9285_AN_RF2G6_OFFS); 622795f5e2cSLuis R. Rodriguez offs_0 = MS(REG_READ(ah, AR9285_AN_RF2G3), AR9285_AN_RF2G3_PDVCCOMP); 623795f5e2cSLuis R. Rodriguez 624795f5e2cSLuis R. Rodriguez offset = (offs_6_1<<1) | offs_0; 625795f5e2cSLuis R. Rodriguez offset = offset - 0; 626795f5e2cSLuis R. Rodriguez offs_6_1 = offset>>1; 627795f5e2cSLuis R. Rodriguez offs_0 = offset & 1; 628795f5e2cSLuis R. Rodriguez 629795f5e2cSLuis R. Rodriguez if ((!is_reset) && (ah->pacal_info.prev_offset == offset)) { 630795f5e2cSLuis R. Rodriguez if (ah->pacal_info.max_skipcount < MAX_PACAL_SKIPCOUNT) 631795f5e2cSLuis R. Rodriguez ah->pacal_info.max_skipcount = 632795f5e2cSLuis R. Rodriguez 2 * ah->pacal_info.max_skipcount; 633795f5e2cSLuis R. Rodriguez ah->pacal_info.skipcount = ah->pacal_info.max_skipcount; 634795f5e2cSLuis R. Rodriguez } else { 635795f5e2cSLuis R. Rodriguez ah->pacal_info.max_skipcount = 1; 636795f5e2cSLuis R. Rodriguez ah->pacal_info.skipcount = 0; 637795f5e2cSLuis R. Rodriguez ah->pacal_info.prev_offset = offset; 638795f5e2cSLuis R. Rodriguez } 639795f5e2cSLuis R. Rodriguez 640795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_OFFS, offs_6_1); 641795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, offs_0); 642795f5e2cSLuis R. Rodriguez 643795f5e2cSLuis R. Rodriguez regVal = REG_READ(ah, 0x7834); 644795f5e2cSLuis R. Rodriguez regVal |= 0x1; 645795f5e2cSLuis R. Rodriguez REG_WRITE(ah, 0x7834, regVal); 646795f5e2cSLuis R. Rodriguez regVal = REG_READ(ah, 0x9808); 647795f5e2cSLuis R. Rodriguez regVal &= (~(0x1 << 27)); 648795f5e2cSLuis R. Rodriguez REG_WRITE(ah, 0x9808, regVal); 649795f5e2cSLuis R. Rodriguez 650795f5e2cSLuis R. Rodriguez for (i = 0; i < ARRAY_SIZE(regList); i++) 651795f5e2cSLuis R. Rodriguez REG_WRITE(ah, regList[i][0], regList[i][1]); 652795f5e2cSLuis R. Rodriguez 653795f5e2cSLuis R. Rodriguez REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_CCOMP, ccomp_org); 654795f5e2cSLuis R. Rodriguez 655795f5e2cSLuis R. Rodriguez if (AR_SREV_9285_11(ah)) 656795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR9285_AN_TOP4, AR9285_AN_TOP4_DEFAULT); 657795f5e2cSLuis R. Rodriguez 658795f5e2cSLuis R. Rodriguez } 659795f5e2cSLuis R. Rodriguez 660795f5e2cSLuis R. Rodriguez static void ar9002_hw_pa_cal(struct ath_hw *ah, bool is_reset) 661795f5e2cSLuis R. Rodriguez { 662795f5e2cSLuis R. Rodriguez if (AR_SREV_9271(ah)) { 663795f5e2cSLuis R. Rodriguez if (is_reset || !ah->pacal_info.skipcount) 664795f5e2cSLuis R. Rodriguez ar9271_hw_pa_cal(ah, is_reset); 665795f5e2cSLuis R. Rodriguez else 666795f5e2cSLuis R. Rodriguez ah->pacal_info.skipcount--; 667795f5e2cSLuis R. Rodriguez } else if (AR_SREV_9285_11_OR_LATER(ah)) { 668795f5e2cSLuis R. Rodriguez if (is_reset || !ah->pacal_info.skipcount) 669795f5e2cSLuis R. Rodriguez ar9285_hw_pa_cal(ah, is_reset); 670795f5e2cSLuis R. Rodriguez else 671795f5e2cSLuis R. Rodriguez ah->pacal_info.skipcount--; 672795f5e2cSLuis R. Rodriguez } 673795f5e2cSLuis R. Rodriguez } 674795f5e2cSLuis R. Rodriguez 675795f5e2cSLuis R. Rodriguez static void ar9002_hw_olc_temp_compensation(struct ath_hw *ah) 676795f5e2cSLuis R. Rodriguez { 677795f5e2cSLuis R. Rodriguez if (OLC_FOR_AR9287_10_LATER) 678795f5e2cSLuis R. Rodriguez ar9287_hw_olc_temp_compensation(ah); 679795f5e2cSLuis R. Rodriguez else if (OLC_FOR_AR9280_20_LATER) 680795f5e2cSLuis R. Rodriguez ar9280_hw_olc_temp_compensation(ah); 681795f5e2cSLuis R. Rodriguez } 682795f5e2cSLuis R. Rodriguez 683795f5e2cSLuis R. Rodriguez static bool ar9002_hw_calibrate(struct ath_hw *ah, 684795f5e2cSLuis R. Rodriguez struct ath9k_channel *chan, 685795f5e2cSLuis R. Rodriguez u8 rxchainmask, 686795f5e2cSLuis R. Rodriguez bool longcal) 687795f5e2cSLuis R. Rodriguez { 688795f5e2cSLuis R. Rodriguez bool iscaldone = true; 689795f5e2cSLuis R. Rodriguez struct ath9k_cal_list *currCal = ah->cal_list_curr; 690795f5e2cSLuis R. Rodriguez 691795f5e2cSLuis R. Rodriguez if (currCal && 692795f5e2cSLuis R. Rodriguez (currCal->calState == CAL_RUNNING || 693795f5e2cSLuis R. Rodriguez currCal->calState == CAL_WAITING)) { 694795f5e2cSLuis R. Rodriguez iscaldone = ar9002_hw_per_calibration(ah, chan, 695795f5e2cSLuis R. Rodriguez rxchainmask, currCal); 696795f5e2cSLuis R. Rodriguez if (iscaldone) { 697795f5e2cSLuis R. Rodriguez ah->cal_list_curr = currCal = currCal->calNext; 698795f5e2cSLuis R. Rodriguez 699795f5e2cSLuis R. Rodriguez if (currCal->calState == CAL_WAITING) { 700795f5e2cSLuis R. Rodriguez iscaldone = false; 701795f5e2cSLuis R. Rodriguez ath9k_hw_reset_calibration(ah, currCal); 702795f5e2cSLuis R. Rodriguez } 703795f5e2cSLuis R. Rodriguez } 704795f5e2cSLuis R. Rodriguez } 705795f5e2cSLuis R. Rodriguez 706795f5e2cSLuis R. Rodriguez /* Do NF cal only at longer intervals */ 707795f5e2cSLuis R. Rodriguez if (longcal) { 708795f5e2cSLuis R. Rodriguez /* Do periodic PAOffset Cal */ 709795f5e2cSLuis R. Rodriguez ar9002_hw_pa_cal(ah, false); 710795f5e2cSLuis R. Rodriguez ar9002_hw_olc_temp_compensation(ah); 711795f5e2cSLuis R. Rodriguez 712795f5e2cSLuis R. Rodriguez /* 713795f5e2cSLuis R. Rodriguez * Get the value from the previous NF cal and update 714795f5e2cSLuis R. Rodriguez * history buffer. 715795f5e2cSLuis R. Rodriguez */ 716795f5e2cSLuis R. Rodriguez ath9k_hw_getnf(ah, chan); 717795f5e2cSLuis R. Rodriguez 718795f5e2cSLuis R. Rodriguez /* 719795f5e2cSLuis R. Rodriguez * Load the NF from history buffer of the current channel. 720795f5e2cSLuis R. Rodriguez * NF is slow time-variant, so it is OK to use a historical 721795f5e2cSLuis R. Rodriguez * value. 722795f5e2cSLuis R. Rodriguez */ 723795f5e2cSLuis R. Rodriguez ath9k_hw_loadnf(ah, ah->curchan); 724795f5e2cSLuis R. Rodriguez 72500c86590SFelix Fietkau ath9k_hw_start_nfcal(ah, false); 726795f5e2cSLuis R. Rodriguez } 727795f5e2cSLuis R. Rodriguez 728795f5e2cSLuis R. Rodriguez return iscaldone; 729795f5e2cSLuis R. Rodriguez } 730795f5e2cSLuis R. Rodriguez 731795f5e2cSLuis R. Rodriguez /* Carrier leakage Calibration fix */ 732795f5e2cSLuis R. Rodriguez static bool ar9285_hw_cl_cal(struct ath_hw *ah, struct ath9k_channel *chan) 733795f5e2cSLuis R. Rodriguez { 734795f5e2cSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 735795f5e2cSLuis R. Rodriguez 736795f5e2cSLuis R. Rodriguez REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); 737795f5e2cSLuis R. Rodriguez if (IS_CHAN_HT20(chan)) { 738795f5e2cSLuis R. Rodriguez REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE); 739795f5e2cSLuis R. Rodriguez REG_SET_BIT(ah, AR_PHY_TURBO, AR_PHY_FC_DYN2040_EN); 740795f5e2cSLuis R. Rodriguez REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, 741795f5e2cSLuis R. Rodriguez AR_PHY_AGC_CONTROL_FLTR_CAL); 742795f5e2cSLuis R. Rodriguez REG_CLR_BIT(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_CAL_ENABLE); 743795f5e2cSLuis R. Rodriguez REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL); 744795f5e2cSLuis R. Rodriguez if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, 745795f5e2cSLuis R. Rodriguez AR_PHY_AGC_CONTROL_CAL, 0, AH_WAIT_TIMEOUT)) { 746795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, "offset " 747795f5e2cSLuis R. Rodriguez "calibration failed to complete in " 748795f5e2cSLuis R. Rodriguez "1ms; noisy ??\n"); 749795f5e2cSLuis R. Rodriguez return false; 750795f5e2cSLuis R. Rodriguez } 751795f5e2cSLuis R. Rodriguez REG_CLR_BIT(ah, AR_PHY_TURBO, AR_PHY_FC_DYN2040_EN); 752795f5e2cSLuis R. Rodriguez REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE); 753795f5e2cSLuis R. Rodriguez REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); 754795f5e2cSLuis R. Rodriguez } 755795f5e2cSLuis R. Rodriguez REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC); 756795f5e2cSLuis R. Rodriguez REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL); 757795f5e2cSLuis R. Rodriguez REG_SET_BIT(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_CAL_ENABLE); 758795f5e2cSLuis R. Rodriguez REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL); 759795f5e2cSLuis R. Rodriguez if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, 760795f5e2cSLuis R. Rodriguez 0, AH_WAIT_TIMEOUT)) { 761795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, "offset calibration " 762795f5e2cSLuis R. Rodriguez "failed to complete in 1ms; noisy ??\n"); 763795f5e2cSLuis R. Rodriguez return false; 764795f5e2cSLuis R. Rodriguez } 765795f5e2cSLuis R. Rodriguez 766795f5e2cSLuis R. Rodriguez REG_SET_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC); 767795f5e2cSLuis R. Rodriguez REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); 768795f5e2cSLuis R. Rodriguez REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL); 769795f5e2cSLuis R. Rodriguez 770795f5e2cSLuis R. Rodriguez return true; 771795f5e2cSLuis R. Rodriguez } 772795f5e2cSLuis R. Rodriguez 773795f5e2cSLuis R. Rodriguez static bool ar9285_hw_clc(struct ath_hw *ah, struct ath9k_channel *chan) 774795f5e2cSLuis R. Rodriguez { 775795f5e2cSLuis R. Rodriguez int i; 776795f5e2cSLuis R. Rodriguez u_int32_t txgain_max; 777795f5e2cSLuis R. Rodriguez u_int32_t clc_gain, gain_mask = 0, clc_num = 0; 778795f5e2cSLuis R. Rodriguez u_int32_t reg_clc_I0, reg_clc_Q0; 779795f5e2cSLuis R. Rodriguez u_int32_t i0_num = 0; 780795f5e2cSLuis R. Rodriguez u_int32_t q0_num = 0; 781795f5e2cSLuis R. Rodriguez u_int32_t total_num = 0; 782795f5e2cSLuis R. Rodriguez u_int32_t reg_rf2g5_org; 783795f5e2cSLuis R. Rodriguez bool retv = true; 784795f5e2cSLuis R. Rodriguez 785795f5e2cSLuis R. Rodriguez if (!(ar9285_hw_cl_cal(ah, chan))) 786795f5e2cSLuis R. Rodriguez return false; 787795f5e2cSLuis R. Rodriguez 788795f5e2cSLuis R. Rodriguez txgain_max = MS(REG_READ(ah, AR_PHY_TX_PWRCTRL7), 789795f5e2cSLuis R. Rodriguez AR_PHY_TX_PWRCTRL_TX_GAIN_TAB_MAX); 790795f5e2cSLuis R. Rodriguez 791795f5e2cSLuis R. Rodriguez for (i = 0; i < (txgain_max+1); i++) { 792795f5e2cSLuis R. Rodriguez clc_gain = (REG_READ(ah, (AR_PHY_TX_GAIN_TBL1+(i<<2))) & 793795f5e2cSLuis R. Rodriguez AR_PHY_TX_GAIN_CLC) >> AR_PHY_TX_GAIN_CLC_S; 794795f5e2cSLuis R. Rodriguez if (!(gain_mask & (1 << clc_gain))) { 795795f5e2cSLuis R. Rodriguez gain_mask |= (1 << clc_gain); 796795f5e2cSLuis R. Rodriguez clc_num++; 797795f5e2cSLuis R. Rodriguez } 798795f5e2cSLuis R. Rodriguez } 799795f5e2cSLuis R. Rodriguez 800795f5e2cSLuis R. Rodriguez for (i = 0; i < clc_num; i++) { 801795f5e2cSLuis R. Rodriguez reg_clc_I0 = (REG_READ(ah, (AR_PHY_CLC_TBL1 + (i << 2))) 802795f5e2cSLuis R. Rodriguez & AR_PHY_CLC_I0) >> AR_PHY_CLC_I0_S; 803795f5e2cSLuis R. Rodriguez reg_clc_Q0 = (REG_READ(ah, (AR_PHY_CLC_TBL1 + (i << 2))) 804795f5e2cSLuis R. Rodriguez & AR_PHY_CLC_Q0) >> AR_PHY_CLC_Q0_S; 805795f5e2cSLuis R. Rodriguez if (reg_clc_I0 == 0) 806795f5e2cSLuis R. Rodriguez i0_num++; 807795f5e2cSLuis R. Rodriguez 808795f5e2cSLuis R. Rodriguez if (reg_clc_Q0 == 0) 809795f5e2cSLuis R. Rodriguez q0_num++; 810795f5e2cSLuis R. Rodriguez } 811795f5e2cSLuis R. Rodriguez total_num = i0_num + q0_num; 812795f5e2cSLuis R. Rodriguez if (total_num > AR9285_CLCAL_REDO_THRESH) { 813795f5e2cSLuis R. Rodriguez reg_rf2g5_org = REG_READ(ah, AR9285_RF2G5); 814795f5e2cSLuis R. Rodriguez if (AR_SREV_9285E_20(ah)) { 815795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR9285_RF2G5, 816795f5e2cSLuis R. Rodriguez (reg_rf2g5_org & AR9285_RF2G5_IC50TX) | 817795f5e2cSLuis R. Rodriguez AR9285_RF2G5_IC50TX_XE_SET); 818795f5e2cSLuis R. Rodriguez } else { 819795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR9285_RF2G5, 820795f5e2cSLuis R. Rodriguez (reg_rf2g5_org & AR9285_RF2G5_IC50TX) | 821795f5e2cSLuis R. Rodriguez AR9285_RF2G5_IC50TX_SET); 822795f5e2cSLuis R. Rodriguez } 823795f5e2cSLuis R. Rodriguez retv = ar9285_hw_cl_cal(ah, chan); 824795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR9285_RF2G5, reg_rf2g5_org); 825795f5e2cSLuis R. Rodriguez } 826795f5e2cSLuis R. Rodriguez return retv; 827795f5e2cSLuis R. Rodriguez } 828795f5e2cSLuis R. Rodriguez 829795f5e2cSLuis R. Rodriguez static bool ar9002_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan) 830795f5e2cSLuis R. Rodriguez { 831795f5e2cSLuis R. Rodriguez struct ath_common *common = ath9k_hw_common(ah); 832795f5e2cSLuis R. Rodriguez 833795f5e2cSLuis R. Rodriguez if (AR_SREV_9271(ah) || AR_SREV_9285_12_OR_LATER(ah)) { 834795f5e2cSLuis R. Rodriguez if (!ar9285_hw_clc(ah, chan)) 835795f5e2cSLuis R. Rodriguez return false; 836795f5e2cSLuis R. Rodriguez } else { 837795f5e2cSLuis R. Rodriguez if (AR_SREV_9280_10_OR_LATER(ah)) { 838795f5e2cSLuis R. Rodriguez if (!AR_SREV_9287_10_OR_LATER(ah)) 839795f5e2cSLuis R. Rodriguez REG_CLR_BIT(ah, AR_PHY_ADC_CTL, 840795f5e2cSLuis R. Rodriguez AR_PHY_ADC_CTL_OFF_PWDADC); 841795f5e2cSLuis R. Rodriguez REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, 842795f5e2cSLuis R. Rodriguez AR_PHY_AGC_CONTROL_FLTR_CAL); 843795f5e2cSLuis R. Rodriguez } 844795f5e2cSLuis R. Rodriguez 845795f5e2cSLuis R. Rodriguez /* Calibrate the AGC */ 846795f5e2cSLuis R. Rodriguez REG_WRITE(ah, AR_PHY_AGC_CONTROL, 847795f5e2cSLuis R. Rodriguez REG_READ(ah, AR_PHY_AGC_CONTROL) | 848795f5e2cSLuis R. Rodriguez AR_PHY_AGC_CONTROL_CAL); 849795f5e2cSLuis R. Rodriguez 850795f5e2cSLuis R. Rodriguez /* Poll for offset calibration complete */ 851795f5e2cSLuis R. Rodriguez if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, 852795f5e2cSLuis R. Rodriguez AR_PHY_AGC_CONTROL_CAL, 853795f5e2cSLuis R. Rodriguez 0, AH_WAIT_TIMEOUT)) { 854795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 855795f5e2cSLuis R. Rodriguez "offset calibration failed to " 856795f5e2cSLuis R. Rodriguez "complete in 1ms; noisy environment?\n"); 857795f5e2cSLuis R. Rodriguez return false; 858795f5e2cSLuis R. Rodriguez } 859795f5e2cSLuis R. Rodriguez 860795f5e2cSLuis R. Rodriguez if (AR_SREV_9280_10_OR_LATER(ah)) { 861795f5e2cSLuis R. Rodriguez if (!AR_SREV_9287_10_OR_LATER(ah)) 862795f5e2cSLuis R. Rodriguez REG_SET_BIT(ah, AR_PHY_ADC_CTL, 863795f5e2cSLuis R. Rodriguez AR_PHY_ADC_CTL_OFF_PWDADC); 864795f5e2cSLuis R. Rodriguez REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, 865795f5e2cSLuis R. Rodriguez AR_PHY_AGC_CONTROL_FLTR_CAL); 866795f5e2cSLuis R. Rodriguez } 867795f5e2cSLuis R. Rodriguez } 868795f5e2cSLuis R. Rodriguez 869795f5e2cSLuis R. Rodriguez /* Do PA Calibration */ 870795f5e2cSLuis R. Rodriguez ar9002_hw_pa_cal(ah, true); 871795f5e2cSLuis R. Rodriguez 872795f5e2cSLuis R. Rodriguez /* Do NF Calibration after DC offset and other calibrations */ 87300c86590SFelix Fietkau ath9k_hw_start_nfcal(ah, true); 874795f5e2cSLuis R. Rodriguez 875795f5e2cSLuis R. Rodriguez ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL; 876795f5e2cSLuis R. Rodriguez 877795f5e2cSLuis R. Rodriguez /* Enable IQ, ADC Gain and ADC DC offset CALs */ 878795f5e2cSLuis R. Rodriguez if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah)) { 879795f5e2cSLuis R. Rodriguez if (ar9002_hw_iscal_supported(ah, ADC_GAIN_CAL)) { 880795f5e2cSLuis R. Rodriguez INIT_CAL(&ah->adcgain_caldata); 881795f5e2cSLuis R. Rodriguez INSERT_CAL(ah, &ah->adcgain_caldata); 882795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 883795f5e2cSLuis R. Rodriguez "enabling ADC Gain Calibration.\n"); 884795f5e2cSLuis R. Rodriguez } 885795f5e2cSLuis R. Rodriguez if (ar9002_hw_iscal_supported(ah, ADC_DC_CAL)) { 886795f5e2cSLuis R. Rodriguez INIT_CAL(&ah->adcdc_caldata); 887795f5e2cSLuis R. Rodriguez INSERT_CAL(ah, &ah->adcdc_caldata); 888795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 889795f5e2cSLuis R. Rodriguez "enabling ADC DC Calibration.\n"); 890795f5e2cSLuis R. Rodriguez } 891795f5e2cSLuis R. Rodriguez if (ar9002_hw_iscal_supported(ah, IQ_MISMATCH_CAL)) { 892795f5e2cSLuis R. Rodriguez INIT_CAL(&ah->iq_caldata); 893795f5e2cSLuis R. Rodriguez INSERT_CAL(ah, &ah->iq_caldata); 894795f5e2cSLuis R. Rodriguez ath_print(common, ATH_DBG_CALIBRATE, 895795f5e2cSLuis R. Rodriguez "enabling IQ Calibration.\n"); 896795f5e2cSLuis R. Rodriguez } 897795f5e2cSLuis R. Rodriguez 898795f5e2cSLuis R. Rodriguez ah->cal_list_curr = ah->cal_list; 899795f5e2cSLuis R. Rodriguez 900795f5e2cSLuis R. Rodriguez if (ah->cal_list_curr) 901795f5e2cSLuis R. Rodriguez ath9k_hw_reset_calibration(ah, ah->cal_list_curr); 902795f5e2cSLuis R. Rodriguez } 903795f5e2cSLuis R. Rodriguez 90420bd2a09SFelix Fietkau if (ah->caldata) 90520bd2a09SFelix Fietkau ah->caldata->CalValid = 0; 906795f5e2cSLuis R. Rodriguez 907795f5e2cSLuis R. Rodriguez return true; 908795f5e2cSLuis R. Rodriguez } 909795f5e2cSLuis R. Rodriguez 910795f5e2cSLuis R. Rodriguez static const struct ath9k_percal_data iq_cal_multi_sample = { 911795f5e2cSLuis R. Rodriguez IQ_MISMATCH_CAL, 912795f5e2cSLuis R. Rodriguez MAX_CAL_SAMPLES, 913795f5e2cSLuis R. Rodriguez PER_MIN_LOG_COUNT, 914795f5e2cSLuis R. Rodriguez ar9002_hw_iqcal_collect, 915795f5e2cSLuis R. Rodriguez ar9002_hw_iqcalibrate 916795f5e2cSLuis R. Rodriguez }; 917795f5e2cSLuis R. Rodriguez static const struct ath9k_percal_data iq_cal_single_sample = { 918795f5e2cSLuis R. Rodriguez IQ_MISMATCH_CAL, 919795f5e2cSLuis R. Rodriguez MIN_CAL_SAMPLES, 920795f5e2cSLuis R. Rodriguez PER_MAX_LOG_COUNT, 921795f5e2cSLuis R. Rodriguez ar9002_hw_iqcal_collect, 922795f5e2cSLuis R. Rodriguez ar9002_hw_iqcalibrate 923795f5e2cSLuis R. Rodriguez }; 924795f5e2cSLuis R. Rodriguez static const struct ath9k_percal_data adc_gain_cal_multi_sample = { 925795f5e2cSLuis R. Rodriguez ADC_GAIN_CAL, 926795f5e2cSLuis R. Rodriguez MAX_CAL_SAMPLES, 927795f5e2cSLuis R. Rodriguez PER_MIN_LOG_COUNT, 928795f5e2cSLuis R. Rodriguez ar9002_hw_adc_gaincal_collect, 929795f5e2cSLuis R. Rodriguez ar9002_hw_adc_gaincal_calibrate 930795f5e2cSLuis R. Rodriguez }; 931795f5e2cSLuis R. Rodriguez static const struct ath9k_percal_data adc_gain_cal_single_sample = { 932795f5e2cSLuis R. Rodriguez ADC_GAIN_CAL, 933795f5e2cSLuis R. Rodriguez MIN_CAL_SAMPLES, 934795f5e2cSLuis R. Rodriguez PER_MAX_LOG_COUNT, 935795f5e2cSLuis R. Rodriguez ar9002_hw_adc_gaincal_collect, 936795f5e2cSLuis R. Rodriguez ar9002_hw_adc_gaincal_calibrate 937795f5e2cSLuis R. Rodriguez }; 938795f5e2cSLuis R. Rodriguez static const struct ath9k_percal_data adc_dc_cal_multi_sample = { 939795f5e2cSLuis R. Rodriguez ADC_DC_CAL, 940795f5e2cSLuis R. Rodriguez MAX_CAL_SAMPLES, 941795f5e2cSLuis R. Rodriguez PER_MIN_LOG_COUNT, 942795f5e2cSLuis R. Rodriguez ar9002_hw_adc_dccal_collect, 943795f5e2cSLuis R. Rodriguez ar9002_hw_adc_dccal_calibrate 944795f5e2cSLuis R. Rodriguez }; 945795f5e2cSLuis R. Rodriguez static const struct ath9k_percal_data adc_dc_cal_single_sample = { 946795f5e2cSLuis R. Rodriguez ADC_DC_CAL, 947795f5e2cSLuis R. Rodriguez MIN_CAL_SAMPLES, 948795f5e2cSLuis R. Rodriguez PER_MAX_LOG_COUNT, 949795f5e2cSLuis R. Rodriguez ar9002_hw_adc_dccal_collect, 950795f5e2cSLuis R. Rodriguez ar9002_hw_adc_dccal_calibrate 951795f5e2cSLuis R. Rodriguez }; 952795f5e2cSLuis R. Rodriguez static const struct ath9k_percal_data adc_init_dc_cal = { 953795f5e2cSLuis R. Rodriguez ADC_DC_INIT_CAL, 954795f5e2cSLuis R. Rodriguez MIN_CAL_SAMPLES, 955795f5e2cSLuis R. Rodriguez INIT_LOG_COUNT, 956795f5e2cSLuis R. Rodriguez ar9002_hw_adc_dccal_collect, 957795f5e2cSLuis R. Rodriguez ar9002_hw_adc_dccal_calibrate 958795f5e2cSLuis R. Rodriguez }; 959795f5e2cSLuis R. Rodriguez 960795f5e2cSLuis R. Rodriguez static void ar9002_hw_init_cal_settings(struct ath_hw *ah) 961795f5e2cSLuis R. Rodriguez { 962795f5e2cSLuis R. Rodriguez if (AR_SREV_9100(ah)) { 963795f5e2cSLuis R. Rodriguez ah->iq_caldata.calData = &iq_cal_multi_sample; 964795f5e2cSLuis R. Rodriguez ah->supp_cals = IQ_MISMATCH_CAL; 965795f5e2cSLuis R. Rodriguez return; 966795f5e2cSLuis R. Rodriguez } 967795f5e2cSLuis R. Rodriguez 968795f5e2cSLuis R. Rodriguez if (AR_SREV_9160_10_OR_LATER(ah)) { 969795f5e2cSLuis R. Rodriguez if (AR_SREV_9280_10_OR_LATER(ah)) { 970795f5e2cSLuis R. Rodriguez ah->iq_caldata.calData = &iq_cal_single_sample; 971795f5e2cSLuis R. Rodriguez ah->adcgain_caldata.calData = 972795f5e2cSLuis R. Rodriguez &adc_gain_cal_single_sample; 973795f5e2cSLuis R. Rodriguez ah->adcdc_caldata.calData = 974795f5e2cSLuis R. Rodriguez &adc_dc_cal_single_sample; 975795f5e2cSLuis R. Rodriguez ah->adcdc_calinitdata.calData = 976795f5e2cSLuis R. Rodriguez &adc_init_dc_cal; 977795f5e2cSLuis R. Rodriguez } else { 978795f5e2cSLuis R. Rodriguez ah->iq_caldata.calData = &iq_cal_multi_sample; 979795f5e2cSLuis R. Rodriguez ah->adcgain_caldata.calData = 980795f5e2cSLuis R. Rodriguez &adc_gain_cal_multi_sample; 981795f5e2cSLuis R. Rodriguez ah->adcdc_caldata.calData = 982795f5e2cSLuis R. Rodriguez &adc_dc_cal_multi_sample; 983795f5e2cSLuis R. Rodriguez ah->adcdc_calinitdata.calData = 984795f5e2cSLuis R. Rodriguez &adc_init_dc_cal; 985795f5e2cSLuis R. Rodriguez } 986795f5e2cSLuis R. Rodriguez ah->supp_cals = ADC_GAIN_CAL | ADC_DC_CAL | IQ_MISMATCH_CAL; 987795f5e2cSLuis R. Rodriguez } 988795f5e2cSLuis R. Rodriguez } 989795f5e2cSLuis R. Rodriguez 990795f5e2cSLuis R. Rodriguez void ar9002_hw_attach_calib_ops(struct ath_hw *ah) 991795f5e2cSLuis R. Rodriguez { 992795f5e2cSLuis R. Rodriguez struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); 993795f5e2cSLuis R. Rodriguez struct ath_hw_ops *ops = ath9k_hw_ops(ah); 994795f5e2cSLuis R. Rodriguez 995795f5e2cSLuis R. Rodriguez priv_ops->init_cal_settings = ar9002_hw_init_cal_settings; 996795f5e2cSLuis R. Rodriguez priv_ops->init_cal = ar9002_hw_init_cal; 997795f5e2cSLuis R. Rodriguez priv_ops->setup_calibration = ar9002_hw_setup_calibration; 998795f5e2cSLuis R. Rodriguez priv_ops->iscal_supported = ar9002_hw_iscal_supported; 999795f5e2cSLuis R. Rodriguez 1000795f5e2cSLuis R. Rodriguez ops->calibrate = ar9002_hw_calibrate; 1001795f5e2cSLuis R. Rodriguez } 1002