1bdcd8170SKalle Valo /*
2bdcd8170SKalle Valo  * Copyright (c) 2004-2011 Atheros Communications Inc.
3bdcd8170SKalle Valo  *
4bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
5bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
6bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
7bdcd8170SKalle Valo  *
8bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15bdcd8170SKalle Valo  */
16bdcd8170SKalle Valo 
17bdcd8170SKalle Valo #include "core.h"
18bdcd8170SKalle Valo #include "debug.h"
19bdcd8170SKalle Valo 
20bdcd8170SKalle Valo static u8 ath6kl_ibss_map_epid(struct sk_buff *skb, struct net_device *dev,
21bdcd8170SKalle Valo 			       u32 *map_no)
22bdcd8170SKalle Valo {
23bdcd8170SKalle Valo 	struct ath6kl *ar = ath6kl_priv(dev);
24bdcd8170SKalle Valo 	struct ethhdr *eth_hdr;
25bdcd8170SKalle Valo 	u32 i, ep_map = -1;
26bdcd8170SKalle Valo 	u8 *datap;
27bdcd8170SKalle Valo 
28bdcd8170SKalle Valo 	*map_no = 0;
29bdcd8170SKalle Valo 	datap = skb->data;
30bdcd8170SKalle Valo 	eth_hdr = (struct ethhdr *) (datap + sizeof(struct wmi_data_hdr));
31bdcd8170SKalle Valo 
32bdcd8170SKalle Valo 	if (is_multicast_ether_addr(eth_hdr->h_dest))
33bdcd8170SKalle Valo 		return ENDPOINT_2;
34bdcd8170SKalle Valo 
35bdcd8170SKalle Valo 	for (i = 0; i < ar->node_num; i++) {
36bdcd8170SKalle Valo 		if (memcmp(eth_hdr->h_dest, ar->node_map[i].mac_addr,
37bdcd8170SKalle Valo 			   ETH_ALEN) == 0) {
38bdcd8170SKalle Valo 			*map_no = i + 1;
39bdcd8170SKalle Valo 			ar->node_map[i].tx_pend++;
40bdcd8170SKalle Valo 			return ar->node_map[i].ep_id;
41bdcd8170SKalle Valo 		}
42bdcd8170SKalle Valo 
43bdcd8170SKalle Valo 		if ((ep_map == -1) && !ar->node_map[i].tx_pend)
44bdcd8170SKalle Valo 			ep_map = i;
45bdcd8170SKalle Valo 	}
46bdcd8170SKalle Valo 
47bdcd8170SKalle Valo 	if (ep_map == -1) {
48bdcd8170SKalle Valo 		ep_map = ar->node_num;
49bdcd8170SKalle Valo 		ar->node_num++;
50bdcd8170SKalle Valo 		if (ar->node_num > MAX_NODE_NUM)
51bdcd8170SKalle Valo 			return ENDPOINT_UNUSED;
52bdcd8170SKalle Valo 	}
53bdcd8170SKalle Valo 
54bdcd8170SKalle Valo 	memcpy(ar->node_map[ep_map].mac_addr, eth_hdr->h_dest, ETH_ALEN);
55bdcd8170SKalle Valo 
56bdcd8170SKalle Valo 	for (i = ENDPOINT_2; i <= ENDPOINT_5; i++) {
57bdcd8170SKalle Valo 		if (!ar->tx_pending[i]) {
58bdcd8170SKalle Valo 			ar->node_map[ep_map].ep_id = i;
59bdcd8170SKalle Valo 			break;
60bdcd8170SKalle Valo 		}
61bdcd8170SKalle Valo 
62bdcd8170SKalle Valo 		/*
63bdcd8170SKalle Valo 		 * No free endpoint is available, start redistribution on
64bdcd8170SKalle Valo 		 * the inuse endpoints.
65bdcd8170SKalle Valo 		 */
66bdcd8170SKalle Valo 		if (i == ENDPOINT_5) {
67bdcd8170SKalle Valo 			ar->node_map[ep_map].ep_id = ar->next_ep_id;
68bdcd8170SKalle Valo 			ar->next_ep_id++;
69bdcd8170SKalle Valo 			if (ar->next_ep_id > ENDPOINT_5)
70bdcd8170SKalle Valo 				ar->next_ep_id = ENDPOINT_2;
71bdcd8170SKalle Valo 		}
72bdcd8170SKalle Valo 	}
73bdcd8170SKalle Valo 
74bdcd8170SKalle Valo 	*map_no = ep_map + 1;
75bdcd8170SKalle Valo 	ar->node_map[ep_map].tx_pend++;
76bdcd8170SKalle Valo 
77bdcd8170SKalle Valo 	return ar->node_map[ep_map].ep_id;
78bdcd8170SKalle Valo }
79bdcd8170SKalle Valo 
80bdcd8170SKalle Valo static bool ath6kl_powersave_ap(struct ath6kl *ar, struct sk_buff *skb,
81bdcd8170SKalle Valo 				bool *more_data)
82bdcd8170SKalle Valo {
83bdcd8170SKalle Valo 	struct ethhdr *datap = (struct ethhdr *) skb->data;
84bdcd8170SKalle Valo 	struct ath6kl_sta *conn = NULL;
85bdcd8170SKalle Valo 	bool ps_queued = false, is_psq_empty = false;
8659c98449SVasanthakumar Thiagarajan 	/* TODO: Findout vif */
8759c98449SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif = ar->vif;
88bdcd8170SKalle Valo 
89bdcd8170SKalle Valo 	if (is_multicast_ether_addr(datap->h_dest)) {
90bdcd8170SKalle Valo 		u8 ctr = 0;
91bdcd8170SKalle Valo 		bool q_mcast = false;
92bdcd8170SKalle Valo 
93bdcd8170SKalle Valo 		for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
94bdcd8170SKalle Valo 			if (ar->sta_list[ctr].sta_flags & STA_PS_SLEEP) {
95bdcd8170SKalle Valo 				q_mcast = true;
96bdcd8170SKalle Valo 				break;
97bdcd8170SKalle Valo 			}
98bdcd8170SKalle Valo 		}
99bdcd8170SKalle Valo 
100bdcd8170SKalle Valo 		if (q_mcast) {
101bdcd8170SKalle Valo 			/*
102bdcd8170SKalle Valo 			 * If this transmit is not because of a Dtim Expiry
103bdcd8170SKalle Valo 			 * q it.
104bdcd8170SKalle Valo 			 */
10559c98449SVasanthakumar Thiagarajan 			if (!test_bit(DTIM_EXPIRED, &vif->flags)) {
106bdcd8170SKalle Valo 				bool is_mcastq_empty = false;
107bdcd8170SKalle Valo 
108bdcd8170SKalle Valo 				spin_lock_bh(&ar->mcastpsq_lock);
109bdcd8170SKalle Valo 				is_mcastq_empty =
110bdcd8170SKalle Valo 					skb_queue_empty(&ar->mcastpsq);
111bdcd8170SKalle Valo 				skb_queue_tail(&ar->mcastpsq, skb);
112bdcd8170SKalle Valo 				spin_unlock_bh(&ar->mcastpsq_lock);
113bdcd8170SKalle Valo 
114bdcd8170SKalle Valo 				/*
115bdcd8170SKalle Valo 				 * If this is the first Mcast pkt getting
116bdcd8170SKalle Valo 				 * queued indicate to the target to set the
117bdcd8170SKalle Valo 				 * BitmapControl LSB of the TIM IE.
118bdcd8170SKalle Valo 				 */
119bdcd8170SKalle Valo 				if (is_mcastq_empty)
120bdcd8170SKalle Valo 					ath6kl_wmi_set_pvb_cmd(ar->wmi,
121bdcd8170SKalle Valo 							       MCAST_AID, 1);
122bdcd8170SKalle Valo 
123bdcd8170SKalle Valo 				ps_queued = true;
124bdcd8170SKalle Valo 			} else {
125bdcd8170SKalle Valo 				/*
126bdcd8170SKalle Valo 				 * This transmit is because of Dtim expiry.
127bdcd8170SKalle Valo 				 * Determine if MoreData bit has to be set.
128bdcd8170SKalle Valo 				 */
129bdcd8170SKalle Valo 				spin_lock_bh(&ar->mcastpsq_lock);
130bdcd8170SKalle Valo 				if (!skb_queue_empty(&ar->mcastpsq))
131bdcd8170SKalle Valo 					*more_data = true;
132bdcd8170SKalle Valo 				spin_unlock_bh(&ar->mcastpsq_lock);
133bdcd8170SKalle Valo 			}
134bdcd8170SKalle Valo 		}
135bdcd8170SKalle Valo 	} else {
136bdcd8170SKalle Valo 		conn = ath6kl_find_sta(ar, datap->h_dest);
137bdcd8170SKalle Valo 		if (!conn) {
138bdcd8170SKalle Valo 			dev_kfree_skb(skb);
139bdcd8170SKalle Valo 
140bdcd8170SKalle Valo 			/* Inform the caller that the skb is consumed */
141bdcd8170SKalle Valo 			return true;
142bdcd8170SKalle Valo 		}
143bdcd8170SKalle Valo 
144bdcd8170SKalle Valo 		if (conn->sta_flags & STA_PS_SLEEP) {
145bdcd8170SKalle Valo 			if (!(conn->sta_flags & STA_PS_POLLED)) {
146bdcd8170SKalle Valo 				/* Queue the frames if the STA is sleeping */
147bdcd8170SKalle Valo 				spin_lock_bh(&conn->psq_lock);
148bdcd8170SKalle Valo 				is_psq_empty = skb_queue_empty(&conn->psq);
149bdcd8170SKalle Valo 				skb_queue_tail(&conn->psq, skb);
150bdcd8170SKalle Valo 				spin_unlock_bh(&conn->psq_lock);
151bdcd8170SKalle Valo 
152bdcd8170SKalle Valo 				/*
153bdcd8170SKalle Valo 				 * If this is the first pkt getting queued
154bdcd8170SKalle Valo 				 * for this STA, update the PVB for this
155bdcd8170SKalle Valo 				 * STA.
156bdcd8170SKalle Valo 				 */
157bdcd8170SKalle Valo 				if (is_psq_empty)
158bdcd8170SKalle Valo 					ath6kl_wmi_set_pvb_cmd(ar->wmi,
159bdcd8170SKalle Valo 							       conn->aid, 1);
160bdcd8170SKalle Valo 
161bdcd8170SKalle Valo 				ps_queued = true;
162bdcd8170SKalle Valo 			} else {
163bdcd8170SKalle Valo 				/*
164bdcd8170SKalle Valo 				 * This tx is because of a PsPoll.
165bdcd8170SKalle Valo 				 * Determine if MoreData bit has to be set.
166bdcd8170SKalle Valo 				 */
167bdcd8170SKalle Valo 				spin_lock_bh(&conn->psq_lock);
168bdcd8170SKalle Valo 				if (!skb_queue_empty(&conn->psq))
169bdcd8170SKalle Valo 					*more_data = true;
170bdcd8170SKalle Valo 				spin_unlock_bh(&conn->psq_lock);
171bdcd8170SKalle Valo 			}
172bdcd8170SKalle Valo 		}
173bdcd8170SKalle Valo 	}
174bdcd8170SKalle Valo 
175bdcd8170SKalle Valo 	return ps_queued;
176bdcd8170SKalle Valo }
177bdcd8170SKalle Valo 
178bdcd8170SKalle Valo /* Tx functions */
179bdcd8170SKalle Valo 
180bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb,
181bdcd8170SKalle Valo 		      enum htc_endpoint_id eid)
182bdcd8170SKalle Valo {
183bdcd8170SKalle Valo 	struct ath6kl *ar = devt;
184bdcd8170SKalle Valo 	int status = 0;
185bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie = NULL;
186bdcd8170SKalle Valo 
187bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
188bdcd8170SKalle Valo 
189bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
190bdcd8170SKalle Valo 		   "%s: skb=0x%p, len=0x%x eid =%d\n", __func__,
191bdcd8170SKalle Valo 		   skb, skb->len, eid);
192bdcd8170SKalle Valo 
193bdcd8170SKalle Valo 	if (test_bit(WMI_CTRL_EP_FULL, &ar->flag) && (eid == ar->ctrl_ep)) {
194bdcd8170SKalle Valo 		/*
195bdcd8170SKalle Valo 		 * Control endpoint is full, don't allocate resources, we
196bdcd8170SKalle Valo 		 * are just going to drop this packet.
197bdcd8170SKalle Valo 		 */
198bdcd8170SKalle Valo 		cookie = NULL;
199bdcd8170SKalle Valo 		ath6kl_err("wmi ctrl ep full, dropping pkt : 0x%p, len:%d\n",
200bdcd8170SKalle Valo 			   skb, skb->len);
201bdcd8170SKalle Valo 	} else
202bdcd8170SKalle Valo 		cookie = ath6kl_alloc_cookie(ar);
203bdcd8170SKalle Valo 
204bdcd8170SKalle Valo 	if (cookie == NULL) {
205bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
206bdcd8170SKalle Valo 		status = -ENOMEM;
207bdcd8170SKalle Valo 		goto fail_ctrl_tx;
208bdcd8170SKalle Valo 	}
209bdcd8170SKalle Valo 
210bdcd8170SKalle Valo 	ar->tx_pending[eid]++;
211bdcd8170SKalle Valo 
212bdcd8170SKalle Valo 	if (eid != ar->ctrl_ep)
213bdcd8170SKalle Valo 		ar->total_tx_data_pend++;
214bdcd8170SKalle Valo 
215bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
216bdcd8170SKalle Valo 
217bdcd8170SKalle Valo 	cookie->skb = skb;
218bdcd8170SKalle Valo 	cookie->map_no = 0;
219bdcd8170SKalle Valo 	set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
220bdcd8170SKalle Valo 			 eid, ATH6KL_CONTROL_PKT_TAG);
221bdcd8170SKalle Valo 
222bdcd8170SKalle Valo 	/*
223bdcd8170SKalle Valo 	 * This interface is asynchronous, if there is an error, cleanup
224bdcd8170SKalle Valo 	 * will happen in the TX completion callback.
225bdcd8170SKalle Valo 	 */
226ad226ec2SKalle Valo 	ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
227bdcd8170SKalle Valo 
228bdcd8170SKalle Valo 	return 0;
229bdcd8170SKalle Valo 
230bdcd8170SKalle Valo fail_ctrl_tx:
231bdcd8170SKalle Valo 	dev_kfree_skb(skb);
232bdcd8170SKalle Valo 	return status;
233bdcd8170SKalle Valo }
234bdcd8170SKalle Valo 
235bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev)
236bdcd8170SKalle Valo {
237bdcd8170SKalle Valo 	struct ath6kl *ar = ath6kl_priv(dev);
238bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie = NULL;
239bdcd8170SKalle Valo 	enum htc_endpoint_id eid = ENDPOINT_UNUSED;
24059c98449SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif = netdev_priv(dev);
241bdcd8170SKalle Valo 	u32 map_no = 0;
242bdcd8170SKalle Valo 	u16 htc_tag = ATH6KL_DATA_PKT_TAG;
243bdcd8170SKalle Valo 	u8 ac = 99 ; /* initialize to unmapped ac */
244bdcd8170SKalle Valo 	bool chk_adhoc_ps_mapping = false, more_data = false;
245bdcd8170SKalle Valo 	int ret;
246bdcd8170SKalle Valo 
247bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
248bdcd8170SKalle Valo 		   "%s: skb=0x%p, data=0x%p, len=0x%x\n", __func__,
249bdcd8170SKalle Valo 		   skb, skb->data, skb->len);
250bdcd8170SKalle Valo 
251bdcd8170SKalle Valo 	/* If target is not associated */
25259c98449SVasanthakumar Thiagarajan 	if (!test_bit(CONNECTED, &vif->flags)) {
253bdcd8170SKalle Valo 		dev_kfree_skb(skb);
254bdcd8170SKalle Valo 		return 0;
255bdcd8170SKalle Valo 	}
256bdcd8170SKalle Valo 
257bdcd8170SKalle Valo 	if (!test_bit(WMI_READY, &ar->flag))
258bdcd8170SKalle Valo 		goto fail_tx;
259bdcd8170SKalle Valo 
260bdcd8170SKalle Valo 	/* AP mode Power saving processing */
261f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
262bdcd8170SKalle Valo 		if (ath6kl_powersave_ap(ar, skb, &more_data))
263bdcd8170SKalle Valo 			return 0;
264bdcd8170SKalle Valo 	}
265bdcd8170SKalle Valo 
266bdcd8170SKalle Valo 	if (test_bit(WMI_ENABLED, &ar->flag)) {
267bdcd8170SKalle Valo 		if (skb_headroom(skb) < dev->needed_headroom) {
268bdcd8170SKalle Valo 			WARN_ON(1);
269bdcd8170SKalle Valo 			goto fail_tx;
270bdcd8170SKalle Valo 		}
271bdcd8170SKalle Valo 
272bdcd8170SKalle Valo 		if (ath6kl_wmi_dix_2_dot3(ar->wmi, skb)) {
273bdcd8170SKalle Valo 			ath6kl_err("ath6kl_wmi_dix_2_dot3 failed\n");
274bdcd8170SKalle Valo 			goto fail_tx;
275bdcd8170SKalle Valo 		}
276bdcd8170SKalle Valo 
277bdcd8170SKalle Valo 		if (ath6kl_wmi_data_hdr_add(ar->wmi, skb, DATA_MSGTYPE,
278bdcd8170SKalle Valo 					    more_data, 0, 0, NULL)) {
279bdcd8170SKalle Valo 			ath6kl_err("wmi_data_hdr_add failed\n");
280bdcd8170SKalle Valo 			goto fail_tx;
281bdcd8170SKalle Valo 		}
282bdcd8170SKalle Valo 
283f5938f24SVasanthakumar Thiagarajan 		if ((vif->nw_type == ADHOC_NETWORK) &&
28459c98449SVasanthakumar Thiagarajan 		     ar->ibss_ps_enable && test_bit(CONNECTED, &vif->flags))
285bdcd8170SKalle Valo 			chk_adhoc_ps_mapping = true;
286bdcd8170SKalle Valo 		else {
287bdcd8170SKalle Valo 			/* get the stream mapping */
288bdcd8170SKalle Valo 			ret = ath6kl_wmi_implicit_create_pstream(ar->wmi, skb,
28959c98449SVasanthakumar Thiagarajan 				    0, test_bit(WMM_ENABLED, &vif->flags), &ac);
290bdcd8170SKalle Valo 			if (ret)
291bdcd8170SKalle Valo 				goto fail_tx;
292bdcd8170SKalle Valo 		}
293bdcd8170SKalle Valo 	} else
294bdcd8170SKalle Valo 		goto fail_tx;
295bdcd8170SKalle Valo 
296bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
297bdcd8170SKalle Valo 
298bdcd8170SKalle Valo 	if (chk_adhoc_ps_mapping)
299bdcd8170SKalle Valo 		eid = ath6kl_ibss_map_epid(skb, dev, &map_no);
300bdcd8170SKalle Valo 	else
301bdcd8170SKalle Valo 		eid = ar->ac2ep_map[ac];
302bdcd8170SKalle Valo 
303bdcd8170SKalle Valo 	if (eid == 0 || eid == ENDPOINT_UNUSED) {
304bdcd8170SKalle Valo 		ath6kl_err("eid %d is not mapped!\n", eid);
305bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
306bdcd8170SKalle Valo 		goto fail_tx;
307bdcd8170SKalle Valo 	}
308bdcd8170SKalle Valo 
309bdcd8170SKalle Valo 	/* allocate resource for this packet */
310bdcd8170SKalle Valo 	cookie = ath6kl_alloc_cookie(ar);
311bdcd8170SKalle Valo 
312bdcd8170SKalle Valo 	if (!cookie) {
313bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
314bdcd8170SKalle Valo 		goto fail_tx;
315bdcd8170SKalle Valo 	}
316bdcd8170SKalle Valo 
317bdcd8170SKalle Valo 	/* update counts while the lock is held */
318bdcd8170SKalle Valo 	ar->tx_pending[eid]++;
319bdcd8170SKalle Valo 	ar->total_tx_data_pend++;
320bdcd8170SKalle Valo 
321bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
322bdcd8170SKalle Valo 
32300b1edf1SJouni Malinen 	if (!IS_ALIGNED((unsigned long) skb->data - HTC_HDR_LENGTH, 4) &&
32400b1edf1SJouni Malinen 	    skb_cloned(skb)) {
32500b1edf1SJouni Malinen 		/*
32600b1edf1SJouni Malinen 		 * We will touch (move the buffer data to align it. Since the
32700b1edf1SJouni Malinen 		 * skb buffer is cloned and not only the header is changed, we
32800b1edf1SJouni Malinen 		 * have to copy it to allow the changes. Since we are copying
32900b1edf1SJouni Malinen 		 * the data here, we may as well align it by reserving suitable
33000b1edf1SJouni Malinen 		 * headroom to avoid the memmove in ath6kl_htc_tx_buf_align().
33100b1edf1SJouni Malinen 		 */
33200b1edf1SJouni Malinen 		struct sk_buff *nskb;
33300b1edf1SJouni Malinen 
33400b1edf1SJouni Malinen 		nskb = skb_copy_expand(skb, HTC_HDR_LENGTH, 0, GFP_ATOMIC);
33500b1edf1SJouni Malinen 		if (nskb == NULL)
33600b1edf1SJouni Malinen 			goto fail_tx;
33700b1edf1SJouni Malinen 		kfree_skb(skb);
33800b1edf1SJouni Malinen 		skb = nskb;
33900b1edf1SJouni Malinen 	}
34000b1edf1SJouni Malinen 
341bdcd8170SKalle Valo 	cookie->skb = skb;
342bdcd8170SKalle Valo 	cookie->map_no = map_no;
343bdcd8170SKalle Valo 	set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
344bdcd8170SKalle Valo 			 eid, htc_tag);
345bdcd8170SKalle Valo 
346ef094103SKalle Valo 	ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "tx ",
347ef094103SKalle Valo 			skb->data, skb->len);
348bdcd8170SKalle Valo 
349bdcd8170SKalle Valo 	/*
350bdcd8170SKalle Valo 	 * HTC interface is asynchronous, if this fails, cleanup will
351bdcd8170SKalle Valo 	 * happen in the ath6kl_tx_complete callback.
352bdcd8170SKalle Valo 	 */
353ad226ec2SKalle Valo 	ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
354bdcd8170SKalle Valo 
355bdcd8170SKalle Valo 	return 0;
356bdcd8170SKalle Valo 
357bdcd8170SKalle Valo fail_tx:
358bdcd8170SKalle Valo 	dev_kfree_skb(skb);
359bdcd8170SKalle Valo 
360bdcd8170SKalle Valo 	ar->net_stats.tx_dropped++;
361bdcd8170SKalle Valo 	ar->net_stats.tx_aborted_errors++;
362bdcd8170SKalle Valo 
363bdcd8170SKalle Valo 	return 0;
364bdcd8170SKalle Valo }
365bdcd8170SKalle Valo 
366bdcd8170SKalle Valo /* indicate tx activity or inactivity on a WMI stream */
367bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active)
368bdcd8170SKalle Valo {
369bdcd8170SKalle Valo 	struct ath6kl *ar = devt;
370bdcd8170SKalle Valo 	enum htc_endpoint_id eid;
371bdcd8170SKalle Valo 	int i;
372bdcd8170SKalle Valo 
373bdcd8170SKalle Valo 	eid = ar->ac2ep_map[traffic_class];
374bdcd8170SKalle Valo 
375bdcd8170SKalle Valo 	if (!test_bit(WMI_ENABLED, &ar->flag))
376bdcd8170SKalle Valo 		goto notify_htc;
377bdcd8170SKalle Valo 
378bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
379bdcd8170SKalle Valo 
380bdcd8170SKalle Valo 	ar->ac_stream_active[traffic_class] = active;
381bdcd8170SKalle Valo 
382bdcd8170SKalle Valo 	if (active) {
383bdcd8170SKalle Valo 		/*
384bdcd8170SKalle Valo 		 * Keep track of the active stream with the highest
385bdcd8170SKalle Valo 		 * priority.
386bdcd8170SKalle Valo 		 */
387bdcd8170SKalle Valo 		if (ar->ac_stream_pri_map[traffic_class] >
388bdcd8170SKalle Valo 		    ar->hiac_stream_active_pri)
389bdcd8170SKalle Valo 			/* set the new highest active priority */
390bdcd8170SKalle Valo 			ar->hiac_stream_active_pri =
391bdcd8170SKalle Valo 					ar->ac_stream_pri_map[traffic_class];
392bdcd8170SKalle Valo 
393bdcd8170SKalle Valo 	} else {
394bdcd8170SKalle Valo 		/*
395bdcd8170SKalle Valo 		 * We may have to search for the next active stream
396bdcd8170SKalle Valo 		 * that is the highest priority.
397bdcd8170SKalle Valo 		 */
398bdcd8170SKalle Valo 		if (ar->hiac_stream_active_pri ==
399bdcd8170SKalle Valo 			ar->ac_stream_pri_map[traffic_class]) {
400bdcd8170SKalle Valo 			/*
401bdcd8170SKalle Valo 			 * The highest priority stream just went inactive
402bdcd8170SKalle Valo 			 * reset and search for the "next" highest "active"
403bdcd8170SKalle Valo 			 * priority stream.
404bdcd8170SKalle Valo 			 */
405bdcd8170SKalle Valo 			ar->hiac_stream_active_pri = 0;
406bdcd8170SKalle Valo 
407bdcd8170SKalle Valo 			for (i = 0; i < WMM_NUM_AC; i++) {
408bdcd8170SKalle Valo 				if (ar->ac_stream_active[i] &&
409bdcd8170SKalle Valo 				    (ar->ac_stream_pri_map[i] >
410bdcd8170SKalle Valo 				     ar->hiac_stream_active_pri))
411bdcd8170SKalle Valo 					/*
412bdcd8170SKalle Valo 					 * Set the new highest active
413bdcd8170SKalle Valo 					 * priority.
414bdcd8170SKalle Valo 					 */
415bdcd8170SKalle Valo 					ar->hiac_stream_active_pri =
416bdcd8170SKalle Valo 						ar->ac_stream_pri_map[i];
417bdcd8170SKalle Valo 			}
418bdcd8170SKalle Valo 		}
419bdcd8170SKalle Valo 	}
420bdcd8170SKalle Valo 
421bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
422bdcd8170SKalle Valo 
423bdcd8170SKalle Valo notify_htc:
424bdcd8170SKalle Valo 	/* notify HTC, this may cause credit distribution changes */
425ad226ec2SKalle Valo 	ath6kl_htc_indicate_activity_change(ar->htc_target, eid, active);
426bdcd8170SKalle Valo }
427bdcd8170SKalle Valo 
428bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
429bdcd8170SKalle Valo 					       struct htc_packet *packet)
430bdcd8170SKalle Valo {
431bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
43259c98449SVasanthakumar Thiagarajan 	/* TODO: Findout vif properly */
43359c98449SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif = ar->vif;
434bdcd8170SKalle Valo 	enum htc_endpoint_id endpoint = packet->endpoint;
435bdcd8170SKalle Valo 
436bdcd8170SKalle Valo 	if (endpoint == ar->ctrl_ep) {
437bdcd8170SKalle Valo 		/*
438bdcd8170SKalle Valo 		 * Under normal WMI if this is getting full, then something
439bdcd8170SKalle Valo 		 * is running rampant the host should not be exhausting the
440bdcd8170SKalle Valo 		 * WMI queue with too many commands the only exception to
441bdcd8170SKalle Valo 		 * this is during testing using endpointping.
442bdcd8170SKalle Valo 		 */
443bdcd8170SKalle Valo 		spin_lock_bh(&ar->lock);
444bdcd8170SKalle Valo 		set_bit(WMI_CTRL_EP_FULL, &ar->flag);
445bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
446bdcd8170SKalle Valo 		ath6kl_err("wmi ctrl ep is full\n");
447bdcd8170SKalle Valo 		return HTC_SEND_FULL_KEEP;
448bdcd8170SKalle Valo 	}
449bdcd8170SKalle Valo 
450bdcd8170SKalle Valo 	if (packet->info.tx.tag == ATH6KL_CONTROL_PKT_TAG)
451bdcd8170SKalle Valo 		return HTC_SEND_FULL_KEEP;
452bdcd8170SKalle Valo 
453f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type == ADHOC_NETWORK)
454bdcd8170SKalle Valo 		/*
455bdcd8170SKalle Valo 		 * In adhoc mode, we cannot differentiate traffic
456bdcd8170SKalle Valo 		 * priorities so there is no need to continue, however we
457bdcd8170SKalle Valo 		 * should stop the network.
458bdcd8170SKalle Valo 		 */
459bdcd8170SKalle Valo 		goto stop_net_queues;
460bdcd8170SKalle Valo 
461bdcd8170SKalle Valo 	/*
462bdcd8170SKalle Valo 	 * The last MAX_HI_COOKIE_NUM "batch" of cookies are reserved for
463bdcd8170SKalle Valo 	 * the highest active stream.
464bdcd8170SKalle Valo 	 */
465bdcd8170SKalle Valo 	if (ar->ac_stream_pri_map[ar->ep2ac_map[endpoint]] <
466bdcd8170SKalle Valo 	    ar->hiac_stream_active_pri &&
467bdcd8170SKalle Valo 	    ar->cookie_count <= MAX_HI_COOKIE_NUM)
468bdcd8170SKalle Valo 		/*
469bdcd8170SKalle Valo 		 * Give preference to the highest priority stream by
470bdcd8170SKalle Valo 		 * dropping the packets which overflowed.
471bdcd8170SKalle Valo 		 */
472bdcd8170SKalle Valo 		return HTC_SEND_FULL_DROP;
473bdcd8170SKalle Valo 
474bdcd8170SKalle Valo stop_net_queues:
475bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
47659c98449SVasanthakumar Thiagarajan 	set_bit(NETQ_STOPPED, &vif->flags);
477bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
478bdcd8170SKalle Valo 	netif_stop_queue(ar->net_dev);
479bdcd8170SKalle Valo 
480bdcd8170SKalle Valo 	return HTC_SEND_FULL_KEEP;
481bdcd8170SKalle Valo }
482bdcd8170SKalle Valo 
483bdcd8170SKalle Valo /* TODO this needs to be looked at */
484bdcd8170SKalle Valo static void ath6kl_tx_clear_node_map(struct ath6kl *ar,
485bdcd8170SKalle Valo 				     enum htc_endpoint_id eid, u32 map_no)
486bdcd8170SKalle Valo {
487f5938f24SVasanthakumar Thiagarajan 	/* TODO: Findout vif */
488f5938f24SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif = ar->vif;
489bdcd8170SKalle Valo 	u32 i;
490bdcd8170SKalle Valo 
491f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type != ADHOC_NETWORK)
492bdcd8170SKalle Valo 		return;
493bdcd8170SKalle Valo 
494bdcd8170SKalle Valo 	if (!ar->ibss_ps_enable)
495bdcd8170SKalle Valo 		return;
496bdcd8170SKalle Valo 
497bdcd8170SKalle Valo 	if (eid == ar->ctrl_ep)
498bdcd8170SKalle Valo 		return;
499bdcd8170SKalle Valo 
500bdcd8170SKalle Valo 	if (map_no == 0)
501bdcd8170SKalle Valo 		return;
502bdcd8170SKalle Valo 
503bdcd8170SKalle Valo 	map_no--;
504bdcd8170SKalle Valo 	ar->node_map[map_no].tx_pend--;
505bdcd8170SKalle Valo 
506bdcd8170SKalle Valo 	if (ar->node_map[map_no].tx_pend)
507bdcd8170SKalle Valo 		return;
508bdcd8170SKalle Valo 
509bdcd8170SKalle Valo 	if (map_no != (ar->node_num - 1))
510bdcd8170SKalle Valo 		return;
511bdcd8170SKalle Valo 
512bdcd8170SKalle Valo 	for (i = ar->node_num; i > 0; i--) {
513bdcd8170SKalle Valo 		if (ar->node_map[i - 1].tx_pend)
514bdcd8170SKalle Valo 			break;
515bdcd8170SKalle Valo 
516bdcd8170SKalle Valo 		memset(&ar->node_map[i - 1], 0,
517bdcd8170SKalle Valo 		       sizeof(struct ath6kl_node_mapping));
518bdcd8170SKalle Valo 		ar->node_num--;
519bdcd8170SKalle Valo 	}
520bdcd8170SKalle Valo }
521bdcd8170SKalle Valo 
522bdcd8170SKalle Valo void ath6kl_tx_complete(void *context, struct list_head *packet_queue)
523bdcd8170SKalle Valo {
524bdcd8170SKalle Valo 	struct ath6kl *ar = context;
525bdcd8170SKalle Valo 	struct sk_buff_head skb_queue;
526bdcd8170SKalle Valo 	struct htc_packet *packet;
527bdcd8170SKalle Valo 	struct sk_buff *skb;
528bdcd8170SKalle Valo 	struct ath6kl_cookie *ath6kl_cookie;
529bdcd8170SKalle Valo 	u32 map_no = 0;
530bdcd8170SKalle Valo 	int status;
531bdcd8170SKalle Valo 	enum htc_endpoint_id eid;
532bdcd8170SKalle Valo 	bool wake_event = false;
533bdcd8170SKalle Valo 	bool flushing = false;
53459c98449SVasanthakumar Thiagarajan 	/* TODO: Findout vif */
53559c98449SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif = ar->vif;
536bdcd8170SKalle Valo 
537bdcd8170SKalle Valo 	skb_queue_head_init(&skb_queue);
538bdcd8170SKalle Valo 
539bdcd8170SKalle Valo 	/* lock the driver as we update internal state */
540bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
541bdcd8170SKalle Valo 
542bdcd8170SKalle Valo 	/* reap completed packets */
543bdcd8170SKalle Valo 	while (!list_empty(packet_queue)) {
544bdcd8170SKalle Valo 
545bdcd8170SKalle Valo 		packet = list_first_entry(packet_queue, struct htc_packet,
546bdcd8170SKalle Valo 					  list);
547bdcd8170SKalle Valo 		list_del(&packet->list);
548bdcd8170SKalle Valo 
549bdcd8170SKalle Valo 		ath6kl_cookie = (struct ath6kl_cookie *)packet->pkt_cntxt;
550bdcd8170SKalle Valo 		if (!ath6kl_cookie)
551bdcd8170SKalle Valo 			goto fatal;
552bdcd8170SKalle Valo 
553bdcd8170SKalle Valo 		status = packet->status;
554bdcd8170SKalle Valo 		skb = ath6kl_cookie->skb;
555bdcd8170SKalle Valo 		eid = packet->endpoint;
556bdcd8170SKalle Valo 		map_no = ath6kl_cookie->map_no;
557bdcd8170SKalle Valo 
558bdcd8170SKalle Valo 		if (!skb || !skb->data)
559bdcd8170SKalle Valo 			goto fatal;
560bdcd8170SKalle Valo 
561bdcd8170SKalle Valo 		packet->buf = skb->data;
562bdcd8170SKalle Valo 
563bdcd8170SKalle Valo 		__skb_queue_tail(&skb_queue, skb);
564bdcd8170SKalle Valo 
565bdcd8170SKalle Valo 		if (!status && (packet->act_len != skb->len))
566bdcd8170SKalle Valo 			goto fatal;
567bdcd8170SKalle Valo 
568bdcd8170SKalle Valo 		ar->tx_pending[eid]--;
569bdcd8170SKalle Valo 
570bdcd8170SKalle Valo 		if (eid != ar->ctrl_ep)
571bdcd8170SKalle Valo 			ar->total_tx_data_pend--;
572bdcd8170SKalle Valo 
573bdcd8170SKalle Valo 		if (eid == ar->ctrl_ep) {
574bdcd8170SKalle Valo 			if (test_bit(WMI_CTRL_EP_FULL, &ar->flag))
575bdcd8170SKalle Valo 				clear_bit(WMI_CTRL_EP_FULL, &ar->flag);
576bdcd8170SKalle Valo 
577bdcd8170SKalle Valo 			if (ar->tx_pending[eid] == 0)
578bdcd8170SKalle Valo 				wake_event = true;
579bdcd8170SKalle Valo 		}
580bdcd8170SKalle Valo 
581bdcd8170SKalle Valo 		if (status) {
582bdcd8170SKalle Valo 			if (status == -ECANCELED)
583bdcd8170SKalle Valo 				/* a packet was flushed  */
584bdcd8170SKalle Valo 				flushing = true;
585bdcd8170SKalle Valo 
586bdcd8170SKalle Valo 			ar->net_stats.tx_errors++;
587bdcd8170SKalle Valo 
588bdcd8170SKalle Valo 			if (status != -ENOSPC)
589bdcd8170SKalle Valo 				ath6kl_err("tx error, status: 0x%x\n", status);
590bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
591bdcd8170SKalle Valo 				   "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
592bdcd8170SKalle Valo 				   __func__, skb, packet->buf, packet->act_len,
593bdcd8170SKalle Valo 				   eid, "error!");
594bdcd8170SKalle Valo 		} else {
595bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
596bdcd8170SKalle Valo 				   "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
597bdcd8170SKalle Valo 				   __func__, skb, packet->buf, packet->act_len,
598bdcd8170SKalle Valo 				   eid, "OK");
599bdcd8170SKalle Valo 
600bdcd8170SKalle Valo 			flushing = false;
601bdcd8170SKalle Valo 			ar->net_stats.tx_packets++;
602bdcd8170SKalle Valo 			ar->net_stats.tx_bytes += skb->len;
603bdcd8170SKalle Valo 		}
604bdcd8170SKalle Valo 
605bdcd8170SKalle Valo 		ath6kl_tx_clear_node_map(ar, eid, map_no);
606bdcd8170SKalle Valo 
607bdcd8170SKalle Valo 		ath6kl_free_cookie(ar, ath6kl_cookie);
608bdcd8170SKalle Valo 
60959c98449SVasanthakumar Thiagarajan 		if (test_bit(NETQ_STOPPED, &vif->flags))
61059c98449SVasanthakumar Thiagarajan 			clear_bit(NETQ_STOPPED, &vif->flags);
611bdcd8170SKalle Valo 	}
612bdcd8170SKalle Valo 
613bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
614bdcd8170SKalle Valo 
615bdcd8170SKalle Valo 	__skb_queue_purge(&skb_queue);
616bdcd8170SKalle Valo 
61759c98449SVasanthakumar Thiagarajan 	if (test_bit(CONNECTED, &vif->flags)) {
618bdcd8170SKalle Valo 		if (!flushing)
619bdcd8170SKalle Valo 			netif_wake_queue(ar->net_dev);
620bdcd8170SKalle Valo 	}
621bdcd8170SKalle Valo 
622bdcd8170SKalle Valo 	if (wake_event)
623bdcd8170SKalle Valo 		wake_up(&ar->event_wq);
624bdcd8170SKalle Valo 
625bdcd8170SKalle Valo 	return;
626bdcd8170SKalle Valo 
627bdcd8170SKalle Valo fatal:
628bdcd8170SKalle Valo 	WARN_ON(1);
629bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
630bdcd8170SKalle Valo 	return;
631bdcd8170SKalle Valo }
632bdcd8170SKalle Valo 
633bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar)
634bdcd8170SKalle Valo {
635bdcd8170SKalle Valo 	int i;
636bdcd8170SKalle Valo 
637bdcd8170SKalle Valo 	/* flush all the data (non-control) streams */
638bdcd8170SKalle Valo 	for (i = 0; i < WMM_NUM_AC; i++)
639ad226ec2SKalle Valo 		ath6kl_htc_flush_txep(ar->htc_target, ar->ac2ep_map[i],
640bdcd8170SKalle Valo 				      ATH6KL_DATA_PKT_TAG);
641bdcd8170SKalle Valo }
642bdcd8170SKalle Valo 
643bdcd8170SKalle Valo /* Rx functions */
644bdcd8170SKalle Valo 
645bdcd8170SKalle Valo static void ath6kl_deliver_frames_to_nw_stack(struct net_device *dev,
646bdcd8170SKalle Valo 					      struct sk_buff *skb)
647bdcd8170SKalle Valo {
648bdcd8170SKalle Valo 	if (!skb)
649bdcd8170SKalle Valo 		return;
650bdcd8170SKalle Valo 
651bdcd8170SKalle Valo 	skb->dev = dev;
652bdcd8170SKalle Valo 
653bdcd8170SKalle Valo 	if (!(skb->dev->flags & IFF_UP)) {
654bdcd8170SKalle Valo 		dev_kfree_skb(skb);
655bdcd8170SKalle Valo 		return;
656bdcd8170SKalle Valo 	}
657bdcd8170SKalle Valo 
658bdcd8170SKalle Valo 	skb->protocol = eth_type_trans(skb, skb->dev);
659bdcd8170SKalle Valo 
660bdcd8170SKalle Valo 	netif_rx_ni(skb);
661bdcd8170SKalle Valo }
662bdcd8170SKalle Valo 
663bdcd8170SKalle Valo static void ath6kl_alloc_netbufs(struct sk_buff_head *q, u16 num)
664bdcd8170SKalle Valo {
665bdcd8170SKalle Valo 	struct sk_buff *skb;
666bdcd8170SKalle Valo 
667bdcd8170SKalle Valo 	while (num) {
668bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
669bdcd8170SKalle Valo 		if (!skb) {
670bdcd8170SKalle Valo 			ath6kl_err("netbuf allocation failed\n");
671bdcd8170SKalle Valo 			return;
672bdcd8170SKalle Valo 		}
673bdcd8170SKalle Valo 		skb_queue_tail(q, skb);
674bdcd8170SKalle Valo 		num--;
675bdcd8170SKalle Valo 	}
676bdcd8170SKalle Valo }
677bdcd8170SKalle Valo 
678bdcd8170SKalle Valo static struct sk_buff *aggr_get_free_skb(struct aggr_info *p_aggr)
679bdcd8170SKalle Valo {
680bdcd8170SKalle Valo 	struct sk_buff *skb = NULL;
681bdcd8170SKalle Valo 
682bdcd8170SKalle Valo 	if (skb_queue_len(&p_aggr->free_q) < (AGGR_NUM_OF_FREE_NETBUFS >> 2))
683bdcd8170SKalle Valo 		ath6kl_alloc_netbufs(&p_aggr->free_q, AGGR_NUM_OF_FREE_NETBUFS);
684bdcd8170SKalle Valo 
685bdcd8170SKalle Valo 	skb = skb_dequeue(&p_aggr->free_q);
686bdcd8170SKalle Valo 
687bdcd8170SKalle Valo 	return skb;
688bdcd8170SKalle Valo }
689bdcd8170SKalle Valo 
690bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target, enum htc_endpoint_id endpoint)
691bdcd8170SKalle Valo {
692bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
693bdcd8170SKalle Valo 	struct sk_buff *skb;
694bdcd8170SKalle Valo 	int rx_buf;
695bdcd8170SKalle Valo 	int n_buf_refill;
696bdcd8170SKalle Valo 	struct htc_packet *packet;
697bdcd8170SKalle Valo 	struct list_head queue;
698bdcd8170SKalle Valo 
699bdcd8170SKalle Valo 	n_buf_refill = ATH6KL_MAX_RX_BUFFERS -
700ad226ec2SKalle Valo 			  ath6kl_htc_get_rxbuf_num(ar->htc_target, endpoint);
701bdcd8170SKalle Valo 
702bdcd8170SKalle Valo 	if (n_buf_refill <= 0)
703bdcd8170SKalle Valo 		return;
704bdcd8170SKalle Valo 
705bdcd8170SKalle Valo 	INIT_LIST_HEAD(&queue);
706bdcd8170SKalle Valo 
707bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
708bdcd8170SKalle Valo 		   "%s: providing htc with %d buffers at eid=%d\n",
709bdcd8170SKalle Valo 		   __func__, n_buf_refill, endpoint);
710bdcd8170SKalle Valo 
711bdcd8170SKalle Valo 	for (rx_buf = 0; rx_buf < n_buf_refill; rx_buf++) {
712bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
713bdcd8170SKalle Valo 		if (!skb)
714bdcd8170SKalle Valo 			break;
715bdcd8170SKalle Valo 
716bdcd8170SKalle Valo 		packet = (struct htc_packet *) skb->head;
71794e532d1SVasanthakumar Thiagarajan 		if (!IS_ALIGNED((unsigned long) skb->data, 4))
7181df94a85SVasanthakumar Thiagarajan 			skb->data = PTR_ALIGN(skb->data - 4, 4);
719bdcd8170SKalle Valo 		set_htc_rxpkt_info(packet, skb, skb->data,
720bdcd8170SKalle Valo 				ATH6KL_BUFFER_SIZE, endpoint);
721bdcd8170SKalle Valo 		list_add_tail(&packet->list, &queue);
722bdcd8170SKalle Valo 	}
723bdcd8170SKalle Valo 
724bdcd8170SKalle Valo 	if (!list_empty(&queue))
725ad226ec2SKalle Valo 		ath6kl_htc_add_rxbuf_multiple(ar->htc_target, &queue);
726bdcd8170SKalle Valo }
727bdcd8170SKalle Valo 
728bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count)
729bdcd8170SKalle Valo {
730bdcd8170SKalle Valo 	struct htc_packet *packet;
731bdcd8170SKalle Valo 	struct sk_buff *skb;
732bdcd8170SKalle Valo 
733bdcd8170SKalle Valo 	while (count) {
734bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_AMSDU_BUFFER_SIZE);
735bdcd8170SKalle Valo 		if (!skb)
736bdcd8170SKalle Valo 			return;
737bdcd8170SKalle Valo 
738bdcd8170SKalle Valo 		packet = (struct htc_packet *) skb->head;
73994e532d1SVasanthakumar Thiagarajan 		if (!IS_ALIGNED((unsigned long) skb->data, 4))
7401df94a85SVasanthakumar Thiagarajan 			skb->data = PTR_ALIGN(skb->data - 4, 4);
741bdcd8170SKalle Valo 		set_htc_rxpkt_info(packet, skb, skb->data,
742bdcd8170SKalle Valo 				   ATH6KL_AMSDU_BUFFER_SIZE, 0);
743bdcd8170SKalle Valo 		spin_lock_bh(&ar->lock);
744bdcd8170SKalle Valo 		list_add_tail(&packet->list, &ar->amsdu_rx_buffer_queue);
745bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
746bdcd8170SKalle Valo 		count--;
747bdcd8170SKalle Valo 	}
748bdcd8170SKalle Valo }
749bdcd8170SKalle Valo 
750bdcd8170SKalle Valo /*
751bdcd8170SKalle Valo  * Callback to allocate a receive buffer for a pending packet. We use a
752bdcd8170SKalle Valo  * pre-allocated list of buffers of maximum AMSDU size (4K).
753bdcd8170SKalle Valo  */
754bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
755bdcd8170SKalle Valo 					    enum htc_endpoint_id endpoint,
756bdcd8170SKalle Valo 					    int len)
757bdcd8170SKalle Valo {
758bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
759bdcd8170SKalle Valo 	struct htc_packet *packet = NULL;
760bdcd8170SKalle Valo 	struct list_head *pkt_pos;
761bdcd8170SKalle Valo 	int refill_cnt = 0, depth = 0;
762bdcd8170SKalle Valo 
763bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: eid=%d, len:%d\n",
764bdcd8170SKalle Valo 		   __func__, endpoint, len);
765bdcd8170SKalle Valo 
766bdcd8170SKalle Valo 	if ((len <= ATH6KL_BUFFER_SIZE) ||
767bdcd8170SKalle Valo 	    (len > ATH6KL_AMSDU_BUFFER_SIZE))
768bdcd8170SKalle Valo 		return NULL;
769bdcd8170SKalle Valo 
770bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
771bdcd8170SKalle Valo 
772bdcd8170SKalle Valo 	if (list_empty(&ar->amsdu_rx_buffer_queue)) {
773bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
774bdcd8170SKalle Valo 		refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS;
775bdcd8170SKalle Valo 		goto refill_buf;
776bdcd8170SKalle Valo 	}
777bdcd8170SKalle Valo 
778bdcd8170SKalle Valo 	packet = list_first_entry(&ar->amsdu_rx_buffer_queue,
779bdcd8170SKalle Valo 				  struct htc_packet, list);
780bdcd8170SKalle Valo 	list_del(&packet->list);
781bdcd8170SKalle Valo 	list_for_each(pkt_pos, &ar->amsdu_rx_buffer_queue)
782bdcd8170SKalle Valo 		depth++;
783bdcd8170SKalle Valo 
784bdcd8170SKalle Valo 	refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS - depth;
785bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
786bdcd8170SKalle Valo 
787bdcd8170SKalle Valo 	/* set actual endpoint ID */
788bdcd8170SKalle Valo 	packet->endpoint = endpoint;
789bdcd8170SKalle Valo 
790bdcd8170SKalle Valo refill_buf:
791bdcd8170SKalle Valo 	if (refill_cnt >= ATH6KL_AMSDU_REFILL_THRESHOLD)
792bdcd8170SKalle Valo 		ath6kl_refill_amsdu_rxbufs(ar, refill_cnt);
793bdcd8170SKalle Valo 
794bdcd8170SKalle Valo 	return packet;
795bdcd8170SKalle Valo }
796bdcd8170SKalle Valo 
797bdcd8170SKalle Valo static void aggr_slice_amsdu(struct aggr_info *p_aggr,
798bdcd8170SKalle Valo 			     struct rxtid *rxtid, struct sk_buff *skb)
799bdcd8170SKalle Valo {
800bdcd8170SKalle Valo 	struct sk_buff *new_skb;
801bdcd8170SKalle Valo 	struct ethhdr *hdr;
802bdcd8170SKalle Valo 	u16 frame_8023_len, payload_8023_len, mac_hdr_len, amsdu_len;
803bdcd8170SKalle Valo 	u8 *framep;
804bdcd8170SKalle Valo 
805bdcd8170SKalle Valo 	mac_hdr_len = sizeof(struct ethhdr);
806bdcd8170SKalle Valo 	framep = skb->data + mac_hdr_len;
807bdcd8170SKalle Valo 	amsdu_len = skb->len - mac_hdr_len;
808bdcd8170SKalle Valo 
809bdcd8170SKalle Valo 	while (amsdu_len > mac_hdr_len) {
810bdcd8170SKalle Valo 		hdr = (struct ethhdr *) framep;
811bdcd8170SKalle Valo 		payload_8023_len = ntohs(hdr->h_proto);
812bdcd8170SKalle Valo 
813bdcd8170SKalle Valo 		if (payload_8023_len < MIN_MSDU_SUBFRAME_PAYLOAD_LEN ||
814bdcd8170SKalle Valo 		    payload_8023_len > MAX_MSDU_SUBFRAME_PAYLOAD_LEN) {
815bdcd8170SKalle Valo 			ath6kl_err("802.3 AMSDU frame bound check failed. len %d\n",
816bdcd8170SKalle Valo 				   payload_8023_len);
817bdcd8170SKalle Valo 			break;
818bdcd8170SKalle Valo 		}
819bdcd8170SKalle Valo 
820bdcd8170SKalle Valo 		frame_8023_len = payload_8023_len + mac_hdr_len;
821bdcd8170SKalle Valo 		new_skb = aggr_get_free_skb(p_aggr);
822bdcd8170SKalle Valo 		if (!new_skb) {
823bdcd8170SKalle Valo 			ath6kl_err("no buffer available\n");
824bdcd8170SKalle Valo 			break;
825bdcd8170SKalle Valo 		}
826bdcd8170SKalle Valo 
827bdcd8170SKalle Valo 		memcpy(new_skb->data, framep, frame_8023_len);
828bdcd8170SKalle Valo 		skb_put(new_skb, frame_8023_len);
829bdcd8170SKalle Valo 		if (ath6kl_wmi_dot3_2_dix(new_skb)) {
830bdcd8170SKalle Valo 			ath6kl_err("dot3_2_dix error\n");
831bdcd8170SKalle Valo 			dev_kfree_skb(new_skb);
832bdcd8170SKalle Valo 			break;
833bdcd8170SKalle Valo 		}
834bdcd8170SKalle Valo 
835bdcd8170SKalle Valo 		skb_queue_tail(&rxtid->q, new_skb);
836bdcd8170SKalle Valo 
837bdcd8170SKalle Valo 		/* Is this the last subframe within this aggregate ? */
838bdcd8170SKalle Valo 		if ((amsdu_len - frame_8023_len) == 0)
839bdcd8170SKalle Valo 			break;
840bdcd8170SKalle Valo 
841bdcd8170SKalle Valo 		/* Add the length of A-MSDU subframe padding bytes -
842bdcd8170SKalle Valo 		 * Round to nearest word.
843bdcd8170SKalle Valo 		 */
84413e34ea1SVasanthakumar Thiagarajan 		frame_8023_len = ALIGN(frame_8023_len, 4);
845bdcd8170SKalle Valo 
846bdcd8170SKalle Valo 		framep += frame_8023_len;
847bdcd8170SKalle Valo 		amsdu_len -= frame_8023_len;
848bdcd8170SKalle Valo 	}
849bdcd8170SKalle Valo 
850bdcd8170SKalle Valo 	dev_kfree_skb(skb);
851bdcd8170SKalle Valo }
852bdcd8170SKalle Valo 
853bdcd8170SKalle Valo static void aggr_deque_frms(struct aggr_info *p_aggr, u8 tid,
854bdcd8170SKalle Valo 			    u16 seq_no, u8 order)
855bdcd8170SKalle Valo {
856bdcd8170SKalle Valo 	struct sk_buff *skb;
857bdcd8170SKalle Valo 	struct rxtid *rxtid;
858bdcd8170SKalle Valo 	struct skb_hold_q *node;
859bdcd8170SKalle Valo 	u16 idx, idx_end, seq_end;
860bdcd8170SKalle Valo 	struct rxtid_stats *stats;
861bdcd8170SKalle Valo 
862bdcd8170SKalle Valo 	if (!p_aggr)
863bdcd8170SKalle Valo 		return;
864bdcd8170SKalle Valo 
865bdcd8170SKalle Valo 	rxtid = &p_aggr->rx_tid[tid];
866bdcd8170SKalle Valo 	stats = &p_aggr->stat[tid];
867bdcd8170SKalle Valo 
868bdcd8170SKalle Valo 	idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
869bdcd8170SKalle Valo 
870bdcd8170SKalle Valo 	/*
871bdcd8170SKalle Valo 	 * idx_end is typically the last possible frame in the window,
872bdcd8170SKalle Valo 	 * but changes to 'the' seq_no, when BAR comes. If seq_no
873bdcd8170SKalle Valo 	 * is non-zero, we will go up to that and stop.
874bdcd8170SKalle Valo 	 * Note: last seq no in current window will occupy the same
875bdcd8170SKalle Valo 	 * index position as index that is just previous to start.
876bdcd8170SKalle Valo 	 * An imp point : if win_sz is 7, for seq_no space of 4095,
877bdcd8170SKalle Valo 	 * then, there would be holes when sequence wrap around occurs.
878bdcd8170SKalle Valo 	 * Target should judiciously choose the win_sz, based on
879bdcd8170SKalle Valo 	 * this condition. For 4095, (TID_WINDOW_SZ = 2 x win_sz
880bdcd8170SKalle Valo 	 * 2, 4, 8, 16 win_sz works fine).
881bdcd8170SKalle Valo 	 * We must deque from "idx" to "idx_end", including both.
882bdcd8170SKalle Valo 	 */
883bdcd8170SKalle Valo 	seq_end = seq_no ? seq_no : rxtid->seq_next;
884bdcd8170SKalle Valo 	idx_end = AGGR_WIN_IDX(seq_end, rxtid->hold_q_sz);
885bdcd8170SKalle Valo 
886bdcd8170SKalle Valo 	spin_lock_bh(&rxtid->lock);
887bdcd8170SKalle Valo 
888bdcd8170SKalle Valo 	do {
889bdcd8170SKalle Valo 		node = &rxtid->hold_q[idx];
890bdcd8170SKalle Valo 		if ((order == 1) && (!node->skb))
891bdcd8170SKalle Valo 			break;
892bdcd8170SKalle Valo 
893bdcd8170SKalle Valo 		if (node->skb) {
894bdcd8170SKalle Valo 			if (node->is_amsdu)
895bdcd8170SKalle Valo 				aggr_slice_amsdu(p_aggr, rxtid, node->skb);
896bdcd8170SKalle Valo 			else
897bdcd8170SKalle Valo 				skb_queue_tail(&rxtid->q, node->skb);
898bdcd8170SKalle Valo 			node->skb = NULL;
899bdcd8170SKalle Valo 		} else
900bdcd8170SKalle Valo 			stats->num_hole++;
901bdcd8170SKalle Valo 
902bdcd8170SKalle Valo 		rxtid->seq_next = ATH6KL_NEXT_SEQ_NO(rxtid->seq_next);
903bdcd8170SKalle Valo 		idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
904bdcd8170SKalle Valo 	} while (idx != idx_end);
905bdcd8170SKalle Valo 
906bdcd8170SKalle Valo 	spin_unlock_bh(&rxtid->lock);
907bdcd8170SKalle Valo 
908bdcd8170SKalle Valo 	stats->num_delivered += skb_queue_len(&rxtid->q);
909bdcd8170SKalle Valo 
910bdcd8170SKalle Valo 	while ((skb = skb_dequeue(&rxtid->q)))
911bdcd8170SKalle Valo 		ath6kl_deliver_frames_to_nw_stack(p_aggr->dev, skb);
912bdcd8170SKalle Valo }
913bdcd8170SKalle Valo 
914bdcd8170SKalle Valo static bool aggr_process_recv_frm(struct aggr_info *agg_info, u8 tid,
915bdcd8170SKalle Valo 				  u16 seq_no,
916bdcd8170SKalle Valo 				  bool is_amsdu, struct sk_buff *frame)
917bdcd8170SKalle Valo {
918bdcd8170SKalle Valo 	struct rxtid *rxtid;
919bdcd8170SKalle Valo 	struct rxtid_stats *stats;
920bdcd8170SKalle Valo 	struct sk_buff *skb;
921bdcd8170SKalle Valo 	struct skb_hold_q *node;
922bdcd8170SKalle Valo 	u16 idx, st, cur, end;
923bdcd8170SKalle Valo 	bool is_queued = false;
924bdcd8170SKalle Valo 	u16 extended_end;
925bdcd8170SKalle Valo 
926bdcd8170SKalle Valo 	rxtid = &agg_info->rx_tid[tid];
927bdcd8170SKalle Valo 	stats = &agg_info->stat[tid];
928bdcd8170SKalle Valo 
929bdcd8170SKalle Valo 	stats->num_into_aggr++;
930bdcd8170SKalle Valo 
931bdcd8170SKalle Valo 	if (!rxtid->aggr) {
932bdcd8170SKalle Valo 		if (is_amsdu) {
933bdcd8170SKalle Valo 			aggr_slice_amsdu(agg_info, rxtid, frame);
934bdcd8170SKalle Valo 			is_queued = true;
935bdcd8170SKalle Valo 			stats->num_amsdu++;
936bdcd8170SKalle Valo 			while ((skb = skb_dequeue(&rxtid->q)))
937bdcd8170SKalle Valo 				ath6kl_deliver_frames_to_nw_stack(agg_info->dev,
938bdcd8170SKalle Valo 								  skb);
939bdcd8170SKalle Valo 		}
940bdcd8170SKalle Valo 		return is_queued;
941bdcd8170SKalle Valo 	}
942bdcd8170SKalle Valo 
943bdcd8170SKalle Valo 	/* Check the incoming sequence no, if it's in the window */
944bdcd8170SKalle Valo 	st = rxtid->seq_next;
945bdcd8170SKalle Valo 	cur = seq_no;
946bdcd8170SKalle Valo 	end = (st + rxtid->hold_q_sz-1) & ATH6KL_MAX_SEQ_NO;
947bdcd8170SKalle Valo 
948bdcd8170SKalle Valo 	if (((st < end) && (cur < st || cur > end)) ||
949bdcd8170SKalle Valo 	    ((st > end) && (cur > end) && (cur < st))) {
950bdcd8170SKalle Valo 		extended_end = (end + rxtid->hold_q_sz - 1) &
951bdcd8170SKalle Valo 			ATH6KL_MAX_SEQ_NO;
952bdcd8170SKalle Valo 
953bdcd8170SKalle Valo 		if (((end < extended_end) &&
954bdcd8170SKalle Valo 		     (cur < end || cur > extended_end)) ||
955bdcd8170SKalle Valo 		    ((end > extended_end) && (cur > extended_end) &&
956bdcd8170SKalle Valo 		     (cur < end))) {
957bdcd8170SKalle Valo 			aggr_deque_frms(agg_info, tid, 0, 0);
958bdcd8170SKalle Valo 			if (cur >= rxtid->hold_q_sz - 1)
959bdcd8170SKalle Valo 				rxtid->seq_next = cur - (rxtid->hold_q_sz - 1);
960bdcd8170SKalle Valo 			else
961bdcd8170SKalle Valo 				rxtid->seq_next = ATH6KL_MAX_SEQ_NO -
962bdcd8170SKalle Valo 						  (rxtid->hold_q_sz - 2 - cur);
963bdcd8170SKalle Valo 		} else {
964bdcd8170SKalle Valo 			/*
965bdcd8170SKalle Valo 			 * Dequeue only those frames that are outside the
966bdcd8170SKalle Valo 			 * new shifted window.
967bdcd8170SKalle Valo 			 */
968bdcd8170SKalle Valo 			if (cur >= rxtid->hold_q_sz - 1)
969bdcd8170SKalle Valo 				st = cur - (rxtid->hold_q_sz - 1);
970bdcd8170SKalle Valo 			else
971bdcd8170SKalle Valo 				st = ATH6KL_MAX_SEQ_NO -
972bdcd8170SKalle Valo 					(rxtid->hold_q_sz - 2 - cur);
973bdcd8170SKalle Valo 
974bdcd8170SKalle Valo 			aggr_deque_frms(agg_info, tid, st, 0);
975bdcd8170SKalle Valo 		}
976bdcd8170SKalle Valo 
977bdcd8170SKalle Valo 		stats->num_oow++;
978bdcd8170SKalle Valo 	}
979bdcd8170SKalle Valo 
980bdcd8170SKalle Valo 	idx = AGGR_WIN_IDX(seq_no, rxtid->hold_q_sz);
981bdcd8170SKalle Valo 
982bdcd8170SKalle Valo 	node = &rxtid->hold_q[idx];
983bdcd8170SKalle Valo 
984bdcd8170SKalle Valo 	spin_lock_bh(&rxtid->lock);
985bdcd8170SKalle Valo 
986bdcd8170SKalle Valo 	/*
987bdcd8170SKalle Valo 	 * Is the cur frame duplicate or something beyond our window(hold_q
988bdcd8170SKalle Valo 	 * -> which is 2x, already)?
989bdcd8170SKalle Valo 	 *
990bdcd8170SKalle Valo 	 * 1. Duplicate is easy - drop incoming frame.
991bdcd8170SKalle Valo 	 * 2. Not falling in current sliding window.
992bdcd8170SKalle Valo 	 *  2a. is the frame_seq_no preceding current tid_seq_no?
993bdcd8170SKalle Valo 	 *      -> drop the frame. perhaps sender did not get our ACK.
994bdcd8170SKalle Valo 	 *         this is taken care of above.
995bdcd8170SKalle Valo 	 *  2b. is the frame_seq_no beyond window(st, TID_WINDOW_SZ);
996bdcd8170SKalle Valo 	 *      -> Taken care of it above, by moving window forward.
997bdcd8170SKalle Valo 	 */
998bdcd8170SKalle Valo 	dev_kfree_skb(node->skb);
999bdcd8170SKalle Valo 	stats->num_dups++;
1000bdcd8170SKalle Valo 
1001bdcd8170SKalle Valo 	node->skb = frame;
1002bdcd8170SKalle Valo 	is_queued = true;
1003bdcd8170SKalle Valo 	node->is_amsdu = is_amsdu;
1004bdcd8170SKalle Valo 	node->seq_no = seq_no;
1005bdcd8170SKalle Valo 
1006bdcd8170SKalle Valo 	if (node->is_amsdu)
1007bdcd8170SKalle Valo 		stats->num_amsdu++;
1008bdcd8170SKalle Valo 	else
1009bdcd8170SKalle Valo 		stats->num_mpdu++;
1010bdcd8170SKalle Valo 
1011bdcd8170SKalle Valo 	spin_unlock_bh(&rxtid->lock);
1012bdcd8170SKalle Valo 
1013bdcd8170SKalle Valo 	aggr_deque_frms(agg_info, tid, 0, 1);
1014bdcd8170SKalle Valo 
1015bdcd8170SKalle Valo 	if (agg_info->timer_scheduled)
1016bdcd8170SKalle Valo 		rxtid->progress = true;
1017bdcd8170SKalle Valo 	else
1018bdcd8170SKalle Valo 		for (idx = 0 ; idx < rxtid->hold_q_sz; idx++) {
1019bdcd8170SKalle Valo 			if (rxtid->hold_q[idx].skb) {
1020bdcd8170SKalle Valo 				/*
1021bdcd8170SKalle Valo 				 * There is a frame in the queue and no
1022bdcd8170SKalle Valo 				 * timer so start a timer to ensure that
1023bdcd8170SKalle Valo 				 * the frame doesn't remain stuck
1024bdcd8170SKalle Valo 				 * forever.
1025bdcd8170SKalle Valo 				 */
1026bdcd8170SKalle Valo 				agg_info->timer_scheduled = true;
1027bdcd8170SKalle Valo 				mod_timer(&agg_info->timer,
1028bdcd8170SKalle Valo 					  (jiffies +
1029bdcd8170SKalle Valo 					   HZ * (AGGR_RX_TIMEOUT) / 1000));
1030bdcd8170SKalle Valo 				rxtid->progress = false;
1031bdcd8170SKalle Valo 				rxtid->timer_mon = true;
1032bdcd8170SKalle Valo 				break;
1033bdcd8170SKalle Valo 			}
1034bdcd8170SKalle Valo 		}
1035bdcd8170SKalle Valo 
1036bdcd8170SKalle Valo 	return is_queued;
1037bdcd8170SKalle Valo }
1038bdcd8170SKalle Valo 
1039bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet)
1040bdcd8170SKalle Valo {
1041bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
1042bdcd8170SKalle Valo 	struct sk_buff *skb = packet->pkt_cntxt;
1043bdcd8170SKalle Valo 	struct wmi_rx_meta_v2 *meta;
1044bdcd8170SKalle Valo 	struct wmi_data_hdr *dhdr;
1045bdcd8170SKalle Valo 	int min_hdr_len;
1046bdcd8170SKalle Valo 	u8 meta_type, dot11_hdr = 0;
1047bdcd8170SKalle Valo 	int status = packet->status;
1048bdcd8170SKalle Valo 	enum htc_endpoint_id ept = packet->endpoint;
1049bdcd8170SKalle Valo 	bool is_amsdu, prev_ps, ps_state = false;
1050bdcd8170SKalle Valo 	struct ath6kl_sta *conn = NULL;
1051bdcd8170SKalle Valo 	struct sk_buff *skb1 = NULL;
1052bdcd8170SKalle Valo 	struct ethhdr *datap = NULL;
1053f5938f24SVasanthakumar Thiagarajan 	/* TODO: Findout vif */
1054f5938f24SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif = ar->vif;
1055bdcd8170SKalle Valo 	u16 seq_no, offset;
1056bdcd8170SKalle Valo 	u8 tid;
1057bdcd8170SKalle Valo 
1058bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
1059bdcd8170SKalle Valo 		   "%s: ar=0x%p eid=%d, skb=0x%p, data=0x%p, len=0x%x status:%d",
1060bdcd8170SKalle Valo 		   __func__, ar, ept, skb, packet->buf,
1061bdcd8170SKalle Valo 		   packet->act_len, status);
1062bdcd8170SKalle Valo 
1063bdcd8170SKalle Valo 	if (status || !(skb->data + HTC_HDR_LENGTH)) {
1064bdcd8170SKalle Valo 		ar->net_stats.rx_errors++;
1065bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1066bdcd8170SKalle Valo 		return;
1067bdcd8170SKalle Valo 	}
1068bdcd8170SKalle Valo 
1069bdcd8170SKalle Valo 	/*
1070bdcd8170SKalle Valo 	 * Take lock to protect buffer counts and adaptive power throughput
1071bdcd8170SKalle Valo 	 * state.
1072bdcd8170SKalle Valo 	 */
1073bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
1074bdcd8170SKalle Valo 
1075bdcd8170SKalle Valo 	ar->net_stats.rx_packets++;
1076bdcd8170SKalle Valo 	ar->net_stats.rx_bytes += packet->act_len;
1077bdcd8170SKalle Valo 
107883dc5f2fSVasanthakumar Thiagarajan 	spin_unlock_bh(&ar->lock);
107983dc5f2fSVasanthakumar Thiagarajan 
1080bdcd8170SKalle Valo 	skb_put(skb, packet->act_len + HTC_HDR_LENGTH);
1081bdcd8170SKalle Valo 	skb_pull(skb, HTC_HDR_LENGTH);
1082bdcd8170SKalle Valo 
1083ef094103SKalle Valo 	ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "rx ",
1084ef094103SKalle Valo 			skb->data, skb->len);
1085bdcd8170SKalle Valo 
1086bdcd8170SKalle Valo 	skb->dev = ar->net_dev;
1087bdcd8170SKalle Valo 
1088bdcd8170SKalle Valo 	if (!test_bit(WMI_ENABLED, &ar->flag)) {
1089bdcd8170SKalle Valo 		if (EPPING_ALIGNMENT_PAD > 0)
1090bdcd8170SKalle Valo 			skb_pull(skb, EPPING_ALIGNMENT_PAD);
1091bdcd8170SKalle Valo 		ath6kl_deliver_frames_to_nw_stack(ar->net_dev, skb);
1092bdcd8170SKalle Valo 		return;
1093bdcd8170SKalle Valo 	}
1094bdcd8170SKalle Valo 
1095bdcd8170SKalle Valo 	if (ept == ar->ctrl_ep) {
1096bdcd8170SKalle Valo 		ath6kl_wmi_control_rx(ar->wmi, skb);
1097bdcd8170SKalle Valo 		return;
1098bdcd8170SKalle Valo 	}
1099bdcd8170SKalle Valo 
110067f9178fSVasanthakumar Thiagarajan 	min_hdr_len = sizeof(struct ethhdr) + sizeof(struct wmi_data_hdr) +
1101bdcd8170SKalle Valo 		      sizeof(struct ath6kl_llc_snap_hdr);
1102bdcd8170SKalle Valo 
1103bdcd8170SKalle Valo 	dhdr = (struct wmi_data_hdr *) skb->data;
1104bdcd8170SKalle Valo 
1105bdcd8170SKalle Valo 	/*
1106bdcd8170SKalle Valo 	 * In the case of AP mode we may receive NULL data frames
1107bdcd8170SKalle Valo 	 * that do not have LLC hdr. They are 16 bytes in size.
1108bdcd8170SKalle Valo 	 * Allow these frames in the AP mode.
1109bdcd8170SKalle Valo 	 */
1110f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type != AP_NETWORK &&
1111bdcd8170SKalle Valo 	    ((packet->act_len < min_hdr_len) ||
1112bdcd8170SKalle Valo 	     (packet->act_len > WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH))) {
1113bdcd8170SKalle Valo 		ath6kl_info("frame len is too short or too long\n");
1114bdcd8170SKalle Valo 		ar->net_stats.rx_errors++;
1115bdcd8170SKalle Valo 		ar->net_stats.rx_length_errors++;
1116bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1117bdcd8170SKalle Valo 		return;
1118bdcd8170SKalle Valo 	}
1119bdcd8170SKalle Valo 
1120bdcd8170SKalle Valo 	/* Get the Power save state of the STA */
1121f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
1122bdcd8170SKalle Valo 		meta_type = wmi_data_hdr_get_meta(dhdr);
1123bdcd8170SKalle Valo 
1124bdcd8170SKalle Valo 		ps_state = !!((dhdr->info >> WMI_DATA_HDR_PS_SHIFT) &
1125bdcd8170SKalle Valo 			      WMI_DATA_HDR_PS_MASK);
1126bdcd8170SKalle Valo 
1127bdcd8170SKalle Valo 		offset = sizeof(struct wmi_data_hdr);
1128bdcd8170SKalle Valo 
1129bdcd8170SKalle Valo 		switch (meta_type) {
1130bdcd8170SKalle Valo 		case 0:
1131bdcd8170SKalle Valo 			break;
1132bdcd8170SKalle Valo 		case WMI_META_VERSION_1:
1133bdcd8170SKalle Valo 			offset += sizeof(struct wmi_rx_meta_v1);
1134bdcd8170SKalle Valo 			break;
1135bdcd8170SKalle Valo 		case WMI_META_VERSION_2:
1136bdcd8170SKalle Valo 			offset += sizeof(struct wmi_rx_meta_v2);
1137bdcd8170SKalle Valo 			break;
1138bdcd8170SKalle Valo 		default:
1139bdcd8170SKalle Valo 			break;
1140bdcd8170SKalle Valo 		}
1141bdcd8170SKalle Valo 
1142bdcd8170SKalle Valo 		datap = (struct ethhdr *) (skb->data + offset);
1143bdcd8170SKalle Valo 		conn = ath6kl_find_sta(ar, datap->h_source);
1144bdcd8170SKalle Valo 
1145bdcd8170SKalle Valo 		if (!conn) {
1146bdcd8170SKalle Valo 			dev_kfree_skb(skb);
1147bdcd8170SKalle Valo 			return;
1148bdcd8170SKalle Valo 		}
1149bdcd8170SKalle Valo 
1150bdcd8170SKalle Valo 		/*
1151bdcd8170SKalle Valo 		 * If there is a change in PS state of the STA,
1152bdcd8170SKalle Valo 		 * take appropriate steps:
1153bdcd8170SKalle Valo 		 *
1154bdcd8170SKalle Valo 		 * 1. If Sleep-->Awake, flush the psq for the STA
1155bdcd8170SKalle Valo 		 *    Clear the PVB for the STA.
1156bdcd8170SKalle Valo 		 * 2. If Awake-->Sleep, Starting queueing frames
1157bdcd8170SKalle Valo 		 *    the STA.
1158bdcd8170SKalle Valo 		 */
1159bdcd8170SKalle Valo 		prev_ps = !!(conn->sta_flags & STA_PS_SLEEP);
1160bdcd8170SKalle Valo 
1161bdcd8170SKalle Valo 		if (ps_state)
1162bdcd8170SKalle Valo 			conn->sta_flags |= STA_PS_SLEEP;
1163bdcd8170SKalle Valo 		else
1164bdcd8170SKalle Valo 			conn->sta_flags &= ~STA_PS_SLEEP;
1165bdcd8170SKalle Valo 
1166bdcd8170SKalle Valo 		if (prev_ps ^ !!(conn->sta_flags & STA_PS_SLEEP)) {
1167bdcd8170SKalle Valo 			if (!(conn->sta_flags & STA_PS_SLEEP)) {
1168bdcd8170SKalle Valo 				struct sk_buff *skbuff = NULL;
1169bdcd8170SKalle Valo 
1170bdcd8170SKalle Valo 				spin_lock_bh(&conn->psq_lock);
1171bdcd8170SKalle Valo 				while ((skbuff = skb_dequeue(&conn->psq))
1172bdcd8170SKalle Valo 				       != NULL) {
1173bdcd8170SKalle Valo 					spin_unlock_bh(&conn->psq_lock);
1174bdcd8170SKalle Valo 					ath6kl_data_tx(skbuff, ar->net_dev);
1175bdcd8170SKalle Valo 					spin_lock_bh(&conn->psq_lock);
1176bdcd8170SKalle Valo 				}
1177bdcd8170SKalle Valo 				spin_unlock_bh(&conn->psq_lock);
1178bdcd8170SKalle Valo 				/* Clear the PVB for this STA */
1179bdcd8170SKalle Valo 				ath6kl_wmi_set_pvb_cmd(ar->wmi, conn->aid, 0);
1180bdcd8170SKalle Valo 			}
1181bdcd8170SKalle Valo 		}
1182bdcd8170SKalle Valo 
1183bdcd8170SKalle Valo 		/* drop NULL data frames here */
1184bdcd8170SKalle Valo 		if ((packet->act_len < min_hdr_len) ||
1185bdcd8170SKalle Valo 		    (packet->act_len >
1186bdcd8170SKalle Valo 		     WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH)) {
1187bdcd8170SKalle Valo 			dev_kfree_skb(skb);
1188bdcd8170SKalle Valo 			return;
1189bdcd8170SKalle Valo 		}
1190bdcd8170SKalle Valo 	}
1191bdcd8170SKalle Valo 
1192bdcd8170SKalle Valo 	is_amsdu = wmi_data_hdr_is_amsdu(dhdr) ? true : false;
1193bdcd8170SKalle Valo 	tid = wmi_data_hdr_get_up(dhdr);
1194bdcd8170SKalle Valo 	seq_no = wmi_data_hdr_get_seqno(dhdr);
1195bdcd8170SKalle Valo 	meta_type = wmi_data_hdr_get_meta(dhdr);
1196bdcd8170SKalle Valo 	dot11_hdr = wmi_data_hdr_get_dot11(dhdr);
1197594a0bc8SVasanthakumar Thiagarajan 	skb_pull(skb, sizeof(struct wmi_data_hdr));
1198bdcd8170SKalle Valo 
1199bdcd8170SKalle Valo 	switch (meta_type) {
1200bdcd8170SKalle Valo 	case WMI_META_VERSION_1:
1201bdcd8170SKalle Valo 		skb_pull(skb, sizeof(struct wmi_rx_meta_v1));
1202bdcd8170SKalle Valo 		break;
1203bdcd8170SKalle Valo 	case WMI_META_VERSION_2:
1204bdcd8170SKalle Valo 		meta = (struct wmi_rx_meta_v2 *) skb->data;
1205bdcd8170SKalle Valo 		if (meta->csum_flags & 0x1) {
1206bdcd8170SKalle Valo 			skb->ip_summed = CHECKSUM_COMPLETE;
1207bdcd8170SKalle Valo 			skb->csum = (__force __wsum) meta->csum;
1208bdcd8170SKalle Valo 		}
1209bdcd8170SKalle Valo 		skb_pull(skb, sizeof(struct wmi_rx_meta_v2));
1210bdcd8170SKalle Valo 		break;
1211bdcd8170SKalle Valo 	default:
1212bdcd8170SKalle Valo 		break;
1213bdcd8170SKalle Valo 	}
1214bdcd8170SKalle Valo 
1215bdcd8170SKalle Valo 	if (dot11_hdr)
1216bdcd8170SKalle Valo 		status = ath6kl_wmi_dot11_hdr_remove(ar->wmi, skb);
1217bdcd8170SKalle Valo 	else if (!is_amsdu)
1218bdcd8170SKalle Valo 		status = ath6kl_wmi_dot3_2_dix(skb);
1219bdcd8170SKalle Valo 
1220bdcd8170SKalle Valo 	if (status) {
1221bdcd8170SKalle Valo 		/*
1222bdcd8170SKalle Valo 		 * Drop frames that could not be processed (lack of
1223bdcd8170SKalle Valo 		 * memory, etc.)
1224bdcd8170SKalle Valo 		 */
1225bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1226bdcd8170SKalle Valo 		return;
1227bdcd8170SKalle Valo 	}
1228bdcd8170SKalle Valo 
1229bdcd8170SKalle Valo 	if (!(ar->net_dev->flags & IFF_UP)) {
1230bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1231bdcd8170SKalle Valo 		return;
1232bdcd8170SKalle Valo 	}
1233bdcd8170SKalle Valo 
1234f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
1235bdcd8170SKalle Valo 		datap = (struct ethhdr *) skb->data;
1236bdcd8170SKalle Valo 		if (is_multicast_ether_addr(datap->h_dest))
1237bdcd8170SKalle Valo 			/*
1238bdcd8170SKalle Valo 			 * Bcast/Mcast frames should be sent to the
1239bdcd8170SKalle Valo 			 * OS stack as well as on the air.
1240bdcd8170SKalle Valo 			 */
1241bdcd8170SKalle Valo 			skb1 = skb_copy(skb, GFP_ATOMIC);
1242bdcd8170SKalle Valo 		else {
1243bdcd8170SKalle Valo 			/*
1244bdcd8170SKalle Valo 			 * Search for a connected STA with dstMac
1245bdcd8170SKalle Valo 			 * as the Mac address. If found send the
1246bdcd8170SKalle Valo 			 * frame to it on the air else send the
1247bdcd8170SKalle Valo 			 * frame up the stack.
1248bdcd8170SKalle Valo 			 */
1249bdcd8170SKalle Valo 			conn = ath6kl_find_sta(ar, datap->h_dest);
1250bdcd8170SKalle Valo 
1251bdcd8170SKalle Valo 			if (conn && ar->intra_bss) {
1252bdcd8170SKalle Valo 				skb1 = skb;
1253bdcd8170SKalle Valo 				skb = NULL;
1254bdcd8170SKalle Valo 			} else if (conn && !ar->intra_bss) {
1255bdcd8170SKalle Valo 				dev_kfree_skb(skb);
1256bdcd8170SKalle Valo 				skb = NULL;
1257bdcd8170SKalle Valo 			}
1258bdcd8170SKalle Valo 		}
1259bdcd8170SKalle Valo 		if (skb1)
1260bdcd8170SKalle Valo 			ath6kl_data_tx(skb1, ar->net_dev);
1261ad3f78b9SKalle Valo 
1262ad3f78b9SKalle Valo 		if (skb == NULL) {
1263ad3f78b9SKalle Valo 			/* nothing to deliver up the stack */
1264ad3f78b9SKalle Valo 			return;
1265ad3f78b9SKalle Valo 		}
1266bdcd8170SKalle Valo 	}
1267bdcd8170SKalle Valo 
12685694f962SKalle Valo 	datap = (struct ethhdr *) skb->data;
12695694f962SKalle Valo 
12705694f962SKalle Valo 	if (is_unicast_ether_addr(datap->h_dest) &&
12715694f962SKalle Valo 	    aggr_process_recv_frm(ar->aggr_cntxt, tid, seq_no,
1272bdcd8170SKalle Valo 				  is_amsdu, skb))
12735694f962SKalle Valo 		/* aggregation code will handle the skb */
12745694f962SKalle Valo 		return;
12755694f962SKalle Valo 
1276bdcd8170SKalle Valo 	ath6kl_deliver_frames_to_nw_stack(ar->net_dev, skb);
1277bdcd8170SKalle Valo }
1278bdcd8170SKalle Valo 
1279bdcd8170SKalle Valo static void aggr_timeout(unsigned long arg)
1280bdcd8170SKalle Valo {
1281bdcd8170SKalle Valo 	u8 i, j;
1282bdcd8170SKalle Valo 	struct aggr_info *p_aggr = (struct aggr_info *) arg;
1283bdcd8170SKalle Valo 	struct rxtid *rxtid;
1284bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1285bdcd8170SKalle Valo 
1286bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
1287bdcd8170SKalle Valo 		rxtid = &p_aggr->rx_tid[i];
1288bdcd8170SKalle Valo 		stats = &p_aggr->stat[i];
1289bdcd8170SKalle Valo 
1290bdcd8170SKalle Valo 		if (!rxtid->aggr || !rxtid->timer_mon || rxtid->progress)
1291bdcd8170SKalle Valo 			continue;
1292bdcd8170SKalle Valo 
1293bdcd8170SKalle Valo 		stats->num_timeouts++;
129437ca6335SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_AGGR,
129537ca6335SKalle Valo 			   "aggr timeout (st %d end %d)\n",
1296bdcd8170SKalle Valo 			   rxtid->seq_next,
1297bdcd8170SKalle Valo 			   ((rxtid->seq_next + rxtid->hold_q_sz-1) &
1298bdcd8170SKalle Valo 			    ATH6KL_MAX_SEQ_NO));
1299bdcd8170SKalle Valo 		aggr_deque_frms(p_aggr, i, 0, 0);
1300bdcd8170SKalle Valo 	}
1301bdcd8170SKalle Valo 
1302bdcd8170SKalle Valo 	p_aggr->timer_scheduled = false;
1303bdcd8170SKalle Valo 
1304bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
1305bdcd8170SKalle Valo 		rxtid = &p_aggr->rx_tid[i];
1306bdcd8170SKalle Valo 
1307bdcd8170SKalle Valo 		if (rxtid->aggr && rxtid->hold_q) {
1308bdcd8170SKalle Valo 			for (j = 0; j < rxtid->hold_q_sz; j++) {
1309bdcd8170SKalle Valo 				if (rxtid->hold_q[j].skb) {
1310bdcd8170SKalle Valo 					p_aggr->timer_scheduled = true;
1311bdcd8170SKalle Valo 					rxtid->timer_mon = true;
1312bdcd8170SKalle Valo 					rxtid->progress = false;
1313bdcd8170SKalle Valo 					break;
1314bdcd8170SKalle Valo 				}
1315bdcd8170SKalle Valo 			}
1316bdcd8170SKalle Valo 
1317bdcd8170SKalle Valo 			if (j >= rxtid->hold_q_sz)
1318bdcd8170SKalle Valo 				rxtid->timer_mon = false;
1319bdcd8170SKalle Valo 		}
1320bdcd8170SKalle Valo 	}
1321bdcd8170SKalle Valo 
1322bdcd8170SKalle Valo 	if (p_aggr->timer_scheduled)
1323bdcd8170SKalle Valo 		mod_timer(&p_aggr->timer,
1324bdcd8170SKalle Valo 			  jiffies + msecs_to_jiffies(AGGR_RX_TIMEOUT));
1325bdcd8170SKalle Valo }
1326bdcd8170SKalle Valo 
1327bdcd8170SKalle Valo static void aggr_delete_tid_state(struct aggr_info *p_aggr, u8 tid)
1328bdcd8170SKalle Valo {
1329bdcd8170SKalle Valo 	struct rxtid *rxtid;
1330bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1331bdcd8170SKalle Valo 
1332bdcd8170SKalle Valo 	if (!p_aggr || tid >= NUM_OF_TIDS)
1333bdcd8170SKalle Valo 		return;
1334bdcd8170SKalle Valo 
1335bdcd8170SKalle Valo 	rxtid = &p_aggr->rx_tid[tid];
1336bdcd8170SKalle Valo 	stats = &p_aggr->stat[tid];
1337bdcd8170SKalle Valo 
1338bdcd8170SKalle Valo 	if (rxtid->aggr)
1339bdcd8170SKalle Valo 		aggr_deque_frms(p_aggr, tid, 0, 0);
1340bdcd8170SKalle Valo 
1341bdcd8170SKalle Valo 	rxtid->aggr = false;
1342bdcd8170SKalle Valo 	rxtid->progress = false;
1343bdcd8170SKalle Valo 	rxtid->timer_mon = false;
1344bdcd8170SKalle Valo 	rxtid->win_sz = 0;
1345bdcd8170SKalle Valo 	rxtid->seq_next = 0;
1346bdcd8170SKalle Valo 	rxtid->hold_q_sz = 0;
1347bdcd8170SKalle Valo 
1348bdcd8170SKalle Valo 	kfree(rxtid->hold_q);
1349bdcd8170SKalle Valo 	rxtid->hold_q = NULL;
1350bdcd8170SKalle Valo 
1351bdcd8170SKalle Valo 	memset(stats, 0, sizeof(struct rxtid_stats));
1352bdcd8170SKalle Valo }
1353bdcd8170SKalle Valo 
1354bdcd8170SKalle Valo void aggr_recv_addba_req_evt(struct ath6kl *ar, u8 tid, u16 seq_no, u8 win_sz)
1355bdcd8170SKalle Valo {
1356bdcd8170SKalle Valo 	struct aggr_info *p_aggr = ar->aggr_cntxt;
1357bdcd8170SKalle Valo 	struct rxtid *rxtid;
1358bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1359bdcd8170SKalle Valo 	u16 hold_q_size;
1360bdcd8170SKalle Valo 
1361bdcd8170SKalle Valo 	if (!p_aggr)
1362bdcd8170SKalle Valo 		return;
1363bdcd8170SKalle Valo 
1364bdcd8170SKalle Valo 	rxtid = &p_aggr->rx_tid[tid];
1365bdcd8170SKalle Valo 	stats = &p_aggr->stat[tid];
1366bdcd8170SKalle Valo 
1367bdcd8170SKalle Valo 	if (win_sz < AGGR_WIN_SZ_MIN || win_sz > AGGR_WIN_SZ_MAX)
1368bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: win_sz %d, tid %d\n",
1369bdcd8170SKalle Valo 			   __func__, win_sz, tid);
1370bdcd8170SKalle Valo 
1371bdcd8170SKalle Valo 	if (rxtid->aggr)
1372bdcd8170SKalle Valo 		aggr_delete_tid_state(p_aggr, tid);
1373bdcd8170SKalle Valo 
1374bdcd8170SKalle Valo 	rxtid->seq_next = seq_no;
1375bdcd8170SKalle Valo 	hold_q_size = TID_WINDOW_SZ(win_sz) * sizeof(struct skb_hold_q);
1376bdcd8170SKalle Valo 	rxtid->hold_q = kzalloc(hold_q_size, GFP_KERNEL);
1377bdcd8170SKalle Valo 	if (!rxtid->hold_q)
1378bdcd8170SKalle Valo 		return;
1379bdcd8170SKalle Valo 
1380bdcd8170SKalle Valo 	rxtid->win_sz = win_sz;
1381bdcd8170SKalle Valo 	rxtid->hold_q_sz = TID_WINDOW_SZ(win_sz);
1382bdcd8170SKalle Valo 	if (!skb_queue_empty(&rxtid->q))
1383bdcd8170SKalle Valo 		return;
1384bdcd8170SKalle Valo 
1385bdcd8170SKalle Valo 	rxtid->aggr = true;
1386bdcd8170SKalle Valo }
1387bdcd8170SKalle Valo 
1388bdcd8170SKalle Valo struct aggr_info *aggr_init(struct net_device *dev)
1389bdcd8170SKalle Valo {
1390bdcd8170SKalle Valo 	struct aggr_info *p_aggr = NULL;
1391bdcd8170SKalle Valo 	struct rxtid *rxtid;
1392bdcd8170SKalle Valo 	u8 i;
1393bdcd8170SKalle Valo 
1394bdcd8170SKalle Valo 	p_aggr = kzalloc(sizeof(struct aggr_info), GFP_KERNEL);
1395bdcd8170SKalle Valo 	if (!p_aggr) {
1396bdcd8170SKalle Valo 		ath6kl_err("failed to alloc memory for aggr_node\n");
1397bdcd8170SKalle Valo 		return NULL;
1398bdcd8170SKalle Valo 	}
1399bdcd8170SKalle Valo 
1400bdcd8170SKalle Valo 	p_aggr->aggr_sz = AGGR_SZ_DEFAULT;
1401bdcd8170SKalle Valo 	p_aggr->dev = dev;
1402bdcd8170SKalle Valo 	init_timer(&p_aggr->timer);
1403bdcd8170SKalle Valo 	p_aggr->timer.function = aggr_timeout;
1404bdcd8170SKalle Valo 	p_aggr->timer.data = (unsigned long) p_aggr;
1405bdcd8170SKalle Valo 
1406bdcd8170SKalle Valo 	p_aggr->timer_scheduled = false;
1407bdcd8170SKalle Valo 	skb_queue_head_init(&p_aggr->free_q);
1408bdcd8170SKalle Valo 
1409bdcd8170SKalle Valo 	ath6kl_alloc_netbufs(&p_aggr->free_q, AGGR_NUM_OF_FREE_NETBUFS);
1410bdcd8170SKalle Valo 
1411bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
1412bdcd8170SKalle Valo 		rxtid = &p_aggr->rx_tid[i];
1413bdcd8170SKalle Valo 		rxtid->aggr = false;
1414bdcd8170SKalle Valo 		rxtid->progress = false;
1415bdcd8170SKalle Valo 		rxtid->timer_mon = false;
1416bdcd8170SKalle Valo 		skb_queue_head_init(&rxtid->q);
1417bdcd8170SKalle Valo 		spin_lock_init(&rxtid->lock);
1418bdcd8170SKalle Valo 	}
1419bdcd8170SKalle Valo 
1420bdcd8170SKalle Valo 	return p_aggr;
1421bdcd8170SKalle Valo }
1422bdcd8170SKalle Valo 
1423bdcd8170SKalle Valo void aggr_recv_delba_req_evt(struct ath6kl *ar, u8 tid)
1424bdcd8170SKalle Valo {
1425bdcd8170SKalle Valo 	struct aggr_info *p_aggr = ar->aggr_cntxt;
1426bdcd8170SKalle Valo 	struct rxtid *rxtid;
1427bdcd8170SKalle Valo 
1428bdcd8170SKalle Valo 	if (!p_aggr)
1429bdcd8170SKalle Valo 		return;
1430bdcd8170SKalle Valo 
1431bdcd8170SKalle Valo 	rxtid = &p_aggr->rx_tid[tid];
1432bdcd8170SKalle Valo 
1433bdcd8170SKalle Valo 	if (rxtid->aggr)
1434bdcd8170SKalle Valo 		aggr_delete_tid_state(p_aggr, tid);
1435bdcd8170SKalle Valo }
1436bdcd8170SKalle Valo 
1437bdcd8170SKalle Valo void aggr_reset_state(struct aggr_info *aggr_info)
1438bdcd8170SKalle Valo {
1439bdcd8170SKalle Valo 	u8 tid;
1440bdcd8170SKalle Valo 
1441bdcd8170SKalle Valo 	for (tid = 0; tid < NUM_OF_TIDS; tid++)
1442bdcd8170SKalle Valo 		aggr_delete_tid_state(aggr_info, tid);
1443bdcd8170SKalle Valo }
1444bdcd8170SKalle Valo 
1445bdcd8170SKalle Valo /* clean up our amsdu buffer list */
1446bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar)
1447bdcd8170SKalle Valo {
1448bdcd8170SKalle Valo 	struct htc_packet *packet, *tmp_pkt;
1449bdcd8170SKalle Valo 
1450bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
1451bdcd8170SKalle Valo 	if (list_empty(&ar->amsdu_rx_buffer_queue)) {
1452bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
1453bdcd8170SKalle Valo 		return;
1454bdcd8170SKalle Valo 	}
1455bdcd8170SKalle Valo 
1456bdcd8170SKalle Valo 	list_for_each_entry_safe(packet, tmp_pkt, &ar->amsdu_rx_buffer_queue,
1457bdcd8170SKalle Valo 				 list) {
1458bdcd8170SKalle Valo 		list_del(&packet->list);
1459bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
1460bdcd8170SKalle Valo 		dev_kfree_skb(packet->pkt_cntxt);
1461bdcd8170SKalle Valo 		spin_lock_bh(&ar->lock);
1462bdcd8170SKalle Valo 	}
1463bdcd8170SKalle Valo 
1464bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
1465bdcd8170SKalle Valo }
1466bdcd8170SKalle Valo 
1467bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info)
1468bdcd8170SKalle Valo {
1469bdcd8170SKalle Valo 	struct rxtid *rxtid;
1470bdcd8170SKalle Valo 	u8 i, k;
1471bdcd8170SKalle Valo 
1472bdcd8170SKalle Valo 	if (!aggr_info)
1473bdcd8170SKalle Valo 		return;
1474bdcd8170SKalle Valo 
1475bdcd8170SKalle Valo 	if (aggr_info->timer_scheduled) {
1476bdcd8170SKalle Valo 		del_timer(&aggr_info->timer);
1477bdcd8170SKalle Valo 		aggr_info->timer_scheduled = false;
1478bdcd8170SKalle Valo 	}
1479bdcd8170SKalle Valo 
1480bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
1481bdcd8170SKalle Valo 		rxtid = &aggr_info->rx_tid[i];
1482bdcd8170SKalle Valo 		if (rxtid->hold_q) {
1483bdcd8170SKalle Valo 			for (k = 0; k < rxtid->hold_q_sz; k++)
1484bdcd8170SKalle Valo 				dev_kfree_skb(rxtid->hold_q[k].skb);
1485bdcd8170SKalle Valo 			kfree(rxtid->hold_q);
1486bdcd8170SKalle Valo 		}
1487bdcd8170SKalle Valo 
1488bdcd8170SKalle Valo 		skb_queue_purge(&rxtid->q);
1489bdcd8170SKalle Valo 	}
1490bdcd8170SKalle Valo 
1491bdcd8170SKalle Valo 	skb_queue_purge(&aggr_info->free_q);
1492bdcd8170SKalle Valo 	kfree(aggr_info);
1493bdcd8170SKalle Valo }
1494