1bdcd8170SKalle Valo /*
2bdcd8170SKalle Valo  * Copyright (c) 2004-2011 Atheros Communications Inc.
3bdcd8170SKalle Valo  *
4bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
5bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
6bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
7bdcd8170SKalle Valo  *
8bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15bdcd8170SKalle Valo  */
16bdcd8170SKalle Valo 
17bdcd8170SKalle Valo #include "core.h"
18bdcd8170SKalle Valo #include "debug.h"
19bdcd8170SKalle Valo 
20bdcd8170SKalle Valo static u8 ath6kl_ibss_map_epid(struct sk_buff *skb, struct net_device *dev,
21bdcd8170SKalle Valo 			       u32 *map_no)
22bdcd8170SKalle Valo {
23bdcd8170SKalle Valo 	struct ath6kl *ar = ath6kl_priv(dev);
24bdcd8170SKalle Valo 	struct ethhdr *eth_hdr;
25bdcd8170SKalle Valo 	u32 i, ep_map = -1;
26bdcd8170SKalle Valo 	u8 *datap;
27bdcd8170SKalle Valo 
28bdcd8170SKalle Valo 	*map_no = 0;
29bdcd8170SKalle Valo 	datap = skb->data;
30bdcd8170SKalle Valo 	eth_hdr = (struct ethhdr *) (datap + sizeof(struct wmi_data_hdr));
31bdcd8170SKalle Valo 
32bdcd8170SKalle Valo 	if (is_multicast_ether_addr(eth_hdr->h_dest))
33bdcd8170SKalle Valo 		return ENDPOINT_2;
34bdcd8170SKalle Valo 
35bdcd8170SKalle Valo 	for (i = 0; i < ar->node_num; i++) {
36bdcd8170SKalle Valo 		if (memcmp(eth_hdr->h_dest, ar->node_map[i].mac_addr,
37bdcd8170SKalle Valo 			   ETH_ALEN) == 0) {
38bdcd8170SKalle Valo 			*map_no = i + 1;
39bdcd8170SKalle Valo 			ar->node_map[i].tx_pend++;
40bdcd8170SKalle Valo 			return ar->node_map[i].ep_id;
41bdcd8170SKalle Valo 		}
42bdcd8170SKalle Valo 
43bdcd8170SKalle Valo 		if ((ep_map == -1) && !ar->node_map[i].tx_pend)
44bdcd8170SKalle Valo 			ep_map = i;
45bdcd8170SKalle Valo 	}
46bdcd8170SKalle Valo 
47bdcd8170SKalle Valo 	if (ep_map == -1) {
48bdcd8170SKalle Valo 		ep_map = ar->node_num;
49bdcd8170SKalle Valo 		ar->node_num++;
50bdcd8170SKalle Valo 		if (ar->node_num > MAX_NODE_NUM)
51bdcd8170SKalle Valo 			return ENDPOINT_UNUSED;
52bdcd8170SKalle Valo 	}
53bdcd8170SKalle Valo 
54bdcd8170SKalle Valo 	memcpy(ar->node_map[ep_map].mac_addr, eth_hdr->h_dest, ETH_ALEN);
55bdcd8170SKalle Valo 
56bdcd8170SKalle Valo 	for (i = ENDPOINT_2; i <= ENDPOINT_5; i++) {
57bdcd8170SKalle Valo 		if (!ar->tx_pending[i]) {
58bdcd8170SKalle Valo 			ar->node_map[ep_map].ep_id = i;
59bdcd8170SKalle Valo 			break;
60bdcd8170SKalle Valo 		}
61bdcd8170SKalle Valo 
62bdcd8170SKalle Valo 		/*
63bdcd8170SKalle Valo 		 * No free endpoint is available, start redistribution on
64bdcd8170SKalle Valo 		 * the inuse endpoints.
65bdcd8170SKalle Valo 		 */
66bdcd8170SKalle Valo 		if (i == ENDPOINT_5) {
67bdcd8170SKalle Valo 			ar->node_map[ep_map].ep_id = ar->next_ep_id;
68bdcd8170SKalle Valo 			ar->next_ep_id++;
69bdcd8170SKalle Valo 			if (ar->next_ep_id > ENDPOINT_5)
70bdcd8170SKalle Valo 				ar->next_ep_id = ENDPOINT_2;
71bdcd8170SKalle Valo 		}
72bdcd8170SKalle Valo 	}
73bdcd8170SKalle Valo 
74bdcd8170SKalle Valo 	*map_no = ep_map + 1;
75bdcd8170SKalle Valo 	ar->node_map[ep_map].tx_pend++;
76bdcd8170SKalle Valo 
77bdcd8170SKalle Valo 	return ar->node_map[ep_map].ep_id;
78bdcd8170SKalle Valo }
79bdcd8170SKalle Valo 
80bdcd8170SKalle Valo static bool ath6kl_powersave_ap(struct ath6kl *ar, struct sk_buff *skb,
81bdcd8170SKalle Valo 				bool *more_data)
82bdcd8170SKalle Valo {
83bdcd8170SKalle Valo 	struct ethhdr *datap = (struct ethhdr *) skb->data;
84bdcd8170SKalle Valo 	struct ath6kl_sta *conn = NULL;
85bdcd8170SKalle Valo 	bool ps_queued = false, is_psq_empty = false;
86bdcd8170SKalle Valo 
87bdcd8170SKalle Valo 	if (is_multicast_ether_addr(datap->h_dest)) {
88bdcd8170SKalle Valo 		u8 ctr = 0;
89bdcd8170SKalle Valo 		bool q_mcast = false;
90bdcd8170SKalle Valo 
91bdcd8170SKalle Valo 		for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
92bdcd8170SKalle Valo 			if (ar->sta_list[ctr].sta_flags & STA_PS_SLEEP) {
93bdcd8170SKalle Valo 				q_mcast = true;
94bdcd8170SKalle Valo 				break;
95bdcd8170SKalle Valo 			}
96bdcd8170SKalle Valo 		}
97bdcd8170SKalle Valo 
98bdcd8170SKalle Valo 		if (q_mcast) {
99bdcd8170SKalle Valo 			/*
100bdcd8170SKalle Valo 			 * If this transmit is not because of a Dtim Expiry
101bdcd8170SKalle Valo 			 * q it.
102bdcd8170SKalle Valo 			 */
103bdcd8170SKalle Valo 			if (!test_bit(DTIM_EXPIRED, &ar->flag)) {
104bdcd8170SKalle Valo 				bool is_mcastq_empty = false;
105bdcd8170SKalle Valo 
106bdcd8170SKalle Valo 				spin_lock_bh(&ar->mcastpsq_lock);
107bdcd8170SKalle Valo 				is_mcastq_empty =
108bdcd8170SKalle Valo 					skb_queue_empty(&ar->mcastpsq);
109bdcd8170SKalle Valo 				skb_queue_tail(&ar->mcastpsq, skb);
110bdcd8170SKalle Valo 				spin_unlock_bh(&ar->mcastpsq_lock);
111bdcd8170SKalle Valo 
112bdcd8170SKalle Valo 				/*
113bdcd8170SKalle Valo 				 * If this is the first Mcast pkt getting
114bdcd8170SKalle Valo 				 * queued indicate to the target to set the
115bdcd8170SKalle Valo 				 * BitmapControl LSB of the TIM IE.
116bdcd8170SKalle Valo 				 */
117bdcd8170SKalle Valo 				if (is_mcastq_empty)
118bdcd8170SKalle Valo 					ath6kl_wmi_set_pvb_cmd(ar->wmi,
119bdcd8170SKalle Valo 							       MCAST_AID, 1);
120bdcd8170SKalle Valo 
121bdcd8170SKalle Valo 				ps_queued = true;
122bdcd8170SKalle Valo 			} else {
123bdcd8170SKalle Valo 				/*
124bdcd8170SKalle Valo 				 * This transmit is because of Dtim expiry.
125bdcd8170SKalle Valo 				 * Determine if MoreData bit has to be set.
126bdcd8170SKalle Valo 				 */
127bdcd8170SKalle Valo 				spin_lock_bh(&ar->mcastpsq_lock);
128bdcd8170SKalle Valo 				if (!skb_queue_empty(&ar->mcastpsq))
129bdcd8170SKalle Valo 					*more_data = true;
130bdcd8170SKalle Valo 				spin_unlock_bh(&ar->mcastpsq_lock);
131bdcd8170SKalle Valo 			}
132bdcd8170SKalle Valo 		}
133bdcd8170SKalle Valo 	} else {
134bdcd8170SKalle Valo 		conn = ath6kl_find_sta(ar, datap->h_dest);
135bdcd8170SKalle Valo 		if (!conn) {
136bdcd8170SKalle Valo 			dev_kfree_skb(skb);
137bdcd8170SKalle Valo 
138bdcd8170SKalle Valo 			/* Inform the caller that the skb is consumed */
139bdcd8170SKalle Valo 			return true;
140bdcd8170SKalle Valo 		}
141bdcd8170SKalle Valo 
142bdcd8170SKalle Valo 		if (conn->sta_flags & STA_PS_SLEEP) {
143bdcd8170SKalle Valo 			if (!(conn->sta_flags & STA_PS_POLLED)) {
144bdcd8170SKalle Valo 				/* Queue the frames if the STA is sleeping */
145bdcd8170SKalle Valo 				spin_lock_bh(&conn->psq_lock);
146bdcd8170SKalle Valo 				is_psq_empty = skb_queue_empty(&conn->psq);
147bdcd8170SKalle Valo 				skb_queue_tail(&conn->psq, skb);
148bdcd8170SKalle Valo 				spin_unlock_bh(&conn->psq_lock);
149bdcd8170SKalle Valo 
150bdcd8170SKalle Valo 				/*
151bdcd8170SKalle Valo 				 * If this is the first pkt getting queued
152bdcd8170SKalle Valo 				 * for this STA, update the PVB for this
153bdcd8170SKalle Valo 				 * STA.
154bdcd8170SKalle Valo 				 */
155bdcd8170SKalle Valo 				if (is_psq_empty)
156bdcd8170SKalle Valo 					ath6kl_wmi_set_pvb_cmd(ar->wmi,
157bdcd8170SKalle Valo 							       conn->aid, 1);
158bdcd8170SKalle Valo 
159bdcd8170SKalle Valo 				ps_queued = true;
160bdcd8170SKalle Valo 			} else {
161bdcd8170SKalle Valo 				/*
162bdcd8170SKalle Valo 				 * This tx is because of a PsPoll.
163bdcd8170SKalle Valo 				 * Determine if MoreData bit has to be set.
164bdcd8170SKalle Valo 				 */
165bdcd8170SKalle Valo 				spin_lock_bh(&conn->psq_lock);
166bdcd8170SKalle Valo 				if (!skb_queue_empty(&conn->psq))
167bdcd8170SKalle Valo 					*more_data = true;
168bdcd8170SKalle Valo 				spin_unlock_bh(&conn->psq_lock);
169bdcd8170SKalle Valo 			}
170bdcd8170SKalle Valo 		}
171bdcd8170SKalle Valo 	}
172bdcd8170SKalle Valo 
173bdcd8170SKalle Valo 	return ps_queued;
174bdcd8170SKalle Valo }
175bdcd8170SKalle Valo 
176bdcd8170SKalle Valo /* Tx functions */
177bdcd8170SKalle Valo 
178bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb,
179bdcd8170SKalle Valo 		      enum htc_endpoint_id eid)
180bdcd8170SKalle Valo {
181bdcd8170SKalle Valo 	struct ath6kl *ar = devt;
182bdcd8170SKalle Valo 	int status = 0;
183bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie = NULL;
184bdcd8170SKalle Valo 
185bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
186bdcd8170SKalle Valo 
187bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
188bdcd8170SKalle Valo 		   "%s: skb=0x%p, len=0x%x eid =%d\n", __func__,
189bdcd8170SKalle Valo 		   skb, skb->len, eid);
190bdcd8170SKalle Valo 
191bdcd8170SKalle Valo 	if (test_bit(WMI_CTRL_EP_FULL, &ar->flag) && (eid == ar->ctrl_ep)) {
192bdcd8170SKalle Valo 		/*
193bdcd8170SKalle Valo 		 * Control endpoint is full, don't allocate resources, we
194bdcd8170SKalle Valo 		 * are just going to drop this packet.
195bdcd8170SKalle Valo 		 */
196bdcd8170SKalle Valo 		cookie = NULL;
197bdcd8170SKalle Valo 		ath6kl_err("wmi ctrl ep full, dropping pkt : 0x%p, len:%d\n",
198bdcd8170SKalle Valo 			   skb, skb->len);
199bdcd8170SKalle Valo 	} else
200bdcd8170SKalle Valo 		cookie = ath6kl_alloc_cookie(ar);
201bdcd8170SKalle Valo 
202bdcd8170SKalle Valo 	if (cookie == NULL) {
203bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
204bdcd8170SKalle Valo 		status = -ENOMEM;
205bdcd8170SKalle Valo 		goto fail_ctrl_tx;
206bdcd8170SKalle Valo 	}
207bdcd8170SKalle Valo 
208bdcd8170SKalle Valo 	ar->tx_pending[eid]++;
209bdcd8170SKalle Valo 
210bdcd8170SKalle Valo 	if (eid != ar->ctrl_ep)
211bdcd8170SKalle Valo 		ar->total_tx_data_pend++;
212bdcd8170SKalle Valo 
213bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
214bdcd8170SKalle Valo 
215bdcd8170SKalle Valo 	cookie->skb = skb;
216bdcd8170SKalle Valo 	cookie->map_no = 0;
217bdcd8170SKalle Valo 	set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
218bdcd8170SKalle Valo 			 eid, ATH6KL_CONTROL_PKT_TAG);
219bdcd8170SKalle Valo 
220bdcd8170SKalle Valo 	/*
221bdcd8170SKalle Valo 	 * This interface is asynchronous, if there is an error, cleanup
222bdcd8170SKalle Valo 	 * will happen in the TX completion callback.
223bdcd8170SKalle Valo 	 */
224ad226ec2SKalle Valo 	ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
225bdcd8170SKalle Valo 
226bdcd8170SKalle Valo 	return 0;
227bdcd8170SKalle Valo 
228bdcd8170SKalle Valo fail_ctrl_tx:
229bdcd8170SKalle Valo 	dev_kfree_skb(skb);
230bdcd8170SKalle Valo 	return status;
231bdcd8170SKalle Valo }
232bdcd8170SKalle Valo 
233bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev)
234bdcd8170SKalle Valo {
235bdcd8170SKalle Valo 	struct ath6kl *ar = ath6kl_priv(dev);
236bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie = NULL;
237bdcd8170SKalle Valo 	enum htc_endpoint_id eid = ENDPOINT_UNUSED;
238bdcd8170SKalle Valo 	u32 map_no = 0;
239bdcd8170SKalle Valo 	u16 htc_tag = ATH6KL_DATA_PKT_TAG;
240bdcd8170SKalle Valo 	u8 ac = 99 ; /* initialize to unmapped ac */
241bdcd8170SKalle Valo 	bool chk_adhoc_ps_mapping = false, more_data = false;
242bdcd8170SKalle Valo 	int ret;
243bdcd8170SKalle Valo 
244bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
245bdcd8170SKalle Valo 		   "%s: skb=0x%p, data=0x%p, len=0x%x\n", __func__,
246bdcd8170SKalle Valo 		   skb, skb->data, skb->len);
247bdcd8170SKalle Valo 
248bdcd8170SKalle Valo 	/* If target is not associated */
249bdcd8170SKalle Valo 	if (!test_bit(CONNECTED, &ar->flag)) {
250bdcd8170SKalle Valo 		dev_kfree_skb(skb);
251bdcd8170SKalle Valo 		return 0;
252bdcd8170SKalle Valo 	}
253bdcd8170SKalle Valo 
254bdcd8170SKalle Valo 	if (!test_bit(WMI_READY, &ar->flag))
255bdcd8170SKalle Valo 		goto fail_tx;
256bdcd8170SKalle Valo 
257bdcd8170SKalle Valo 	/* AP mode Power saving processing */
258bdcd8170SKalle Valo 	if (ar->nw_type == AP_NETWORK) {
259bdcd8170SKalle Valo 		if (ath6kl_powersave_ap(ar, skb, &more_data))
260bdcd8170SKalle Valo 			return 0;
261bdcd8170SKalle Valo 	}
262bdcd8170SKalle Valo 
263bdcd8170SKalle Valo 	if (test_bit(WMI_ENABLED, &ar->flag)) {
264bdcd8170SKalle Valo 		if (skb_headroom(skb) < dev->needed_headroom) {
265bdcd8170SKalle Valo 			WARN_ON(1);
266bdcd8170SKalle Valo 			goto fail_tx;
267bdcd8170SKalle Valo 		}
268bdcd8170SKalle Valo 
269bdcd8170SKalle Valo 		if (ath6kl_wmi_dix_2_dot3(ar->wmi, skb)) {
270bdcd8170SKalle Valo 			ath6kl_err("ath6kl_wmi_dix_2_dot3 failed\n");
271bdcd8170SKalle Valo 			goto fail_tx;
272bdcd8170SKalle Valo 		}
273bdcd8170SKalle Valo 
274bdcd8170SKalle Valo 		if (ath6kl_wmi_data_hdr_add(ar->wmi, skb, DATA_MSGTYPE,
275bdcd8170SKalle Valo 					    more_data, 0, 0, NULL)) {
276bdcd8170SKalle Valo 			ath6kl_err("wmi_data_hdr_add failed\n");
277bdcd8170SKalle Valo 			goto fail_tx;
278bdcd8170SKalle Valo 		}
279bdcd8170SKalle Valo 
280bdcd8170SKalle Valo 		if ((ar->nw_type == ADHOC_NETWORK) &&
281bdcd8170SKalle Valo 		     ar->ibss_ps_enable && test_bit(CONNECTED, &ar->flag))
282bdcd8170SKalle Valo 			chk_adhoc_ps_mapping = true;
283bdcd8170SKalle Valo 		else {
284bdcd8170SKalle Valo 			/* get the stream mapping */
285bdcd8170SKalle Valo 			ret = ath6kl_wmi_implicit_create_pstream(ar->wmi, skb,
286bdcd8170SKalle Valo 				    0, test_bit(WMM_ENABLED, &ar->flag), &ac);
287bdcd8170SKalle Valo 			if (ret)
288bdcd8170SKalle Valo 				goto fail_tx;
289bdcd8170SKalle Valo 		}
290bdcd8170SKalle Valo 	} else
291bdcd8170SKalle Valo 		goto fail_tx;
292bdcd8170SKalle Valo 
293bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
294bdcd8170SKalle Valo 
295bdcd8170SKalle Valo 	if (chk_adhoc_ps_mapping)
296bdcd8170SKalle Valo 		eid = ath6kl_ibss_map_epid(skb, dev, &map_no);
297bdcd8170SKalle Valo 	else
298bdcd8170SKalle Valo 		eid = ar->ac2ep_map[ac];
299bdcd8170SKalle Valo 
300bdcd8170SKalle Valo 	if (eid == 0 || eid == ENDPOINT_UNUSED) {
301bdcd8170SKalle Valo 		ath6kl_err("eid %d is not mapped!\n", eid);
302bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
303bdcd8170SKalle Valo 		goto fail_tx;
304bdcd8170SKalle Valo 	}
305bdcd8170SKalle Valo 
306bdcd8170SKalle Valo 	/* allocate resource for this packet */
307bdcd8170SKalle Valo 	cookie = ath6kl_alloc_cookie(ar);
308bdcd8170SKalle Valo 
309bdcd8170SKalle Valo 	if (!cookie) {
310bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
311bdcd8170SKalle Valo 		goto fail_tx;
312bdcd8170SKalle Valo 	}
313bdcd8170SKalle Valo 
314bdcd8170SKalle Valo 	/* update counts while the lock is held */
315bdcd8170SKalle Valo 	ar->tx_pending[eid]++;
316bdcd8170SKalle Valo 	ar->total_tx_data_pend++;
317bdcd8170SKalle Valo 
318bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
319bdcd8170SKalle Valo 
32000b1edf1SJouni Malinen 	if (!IS_ALIGNED((unsigned long) skb->data - HTC_HDR_LENGTH, 4) &&
32100b1edf1SJouni Malinen 	    skb_cloned(skb)) {
32200b1edf1SJouni Malinen 		/*
32300b1edf1SJouni Malinen 		 * We will touch (move the buffer data to align it. Since the
32400b1edf1SJouni Malinen 		 * skb buffer is cloned and not only the header is changed, we
32500b1edf1SJouni Malinen 		 * have to copy it to allow the changes. Since we are copying
32600b1edf1SJouni Malinen 		 * the data here, we may as well align it by reserving suitable
32700b1edf1SJouni Malinen 		 * headroom to avoid the memmove in ath6kl_htc_tx_buf_align().
32800b1edf1SJouni Malinen 		 */
32900b1edf1SJouni Malinen 		struct sk_buff *nskb;
33000b1edf1SJouni Malinen 
33100b1edf1SJouni Malinen 		nskb = skb_copy_expand(skb, HTC_HDR_LENGTH, 0, GFP_ATOMIC);
33200b1edf1SJouni Malinen 		if (nskb == NULL)
33300b1edf1SJouni Malinen 			goto fail_tx;
33400b1edf1SJouni Malinen 		kfree_skb(skb);
33500b1edf1SJouni Malinen 		skb = nskb;
33600b1edf1SJouni Malinen 	}
33700b1edf1SJouni Malinen 
338bdcd8170SKalle Valo 	cookie->skb = skb;
339bdcd8170SKalle Valo 	cookie->map_no = map_no;
340bdcd8170SKalle Valo 	set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
341bdcd8170SKalle Valo 			 eid, htc_tag);
342bdcd8170SKalle Valo 
343ef094103SKalle Valo 	ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "tx ",
344ef094103SKalle Valo 			skb->data, skb->len);
345bdcd8170SKalle Valo 
346bdcd8170SKalle Valo 	/*
347bdcd8170SKalle Valo 	 * HTC interface is asynchronous, if this fails, cleanup will
348bdcd8170SKalle Valo 	 * happen in the ath6kl_tx_complete callback.
349bdcd8170SKalle Valo 	 */
350ad226ec2SKalle Valo 	ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
351bdcd8170SKalle Valo 
352bdcd8170SKalle Valo 	return 0;
353bdcd8170SKalle Valo 
354bdcd8170SKalle Valo fail_tx:
355bdcd8170SKalle Valo 	dev_kfree_skb(skb);
356bdcd8170SKalle Valo 
357bdcd8170SKalle Valo 	ar->net_stats.tx_dropped++;
358bdcd8170SKalle Valo 	ar->net_stats.tx_aborted_errors++;
359bdcd8170SKalle Valo 
360bdcd8170SKalle Valo 	return 0;
361bdcd8170SKalle Valo }
362bdcd8170SKalle Valo 
363bdcd8170SKalle Valo /* indicate tx activity or inactivity on a WMI stream */
364bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active)
365bdcd8170SKalle Valo {
366bdcd8170SKalle Valo 	struct ath6kl *ar = devt;
367bdcd8170SKalle Valo 	enum htc_endpoint_id eid;
368bdcd8170SKalle Valo 	int i;
369bdcd8170SKalle Valo 
370bdcd8170SKalle Valo 	eid = ar->ac2ep_map[traffic_class];
371bdcd8170SKalle Valo 
372bdcd8170SKalle Valo 	if (!test_bit(WMI_ENABLED, &ar->flag))
373bdcd8170SKalle Valo 		goto notify_htc;
374bdcd8170SKalle Valo 
375bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
376bdcd8170SKalle Valo 
377bdcd8170SKalle Valo 	ar->ac_stream_active[traffic_class] = active;
378bdcd8170SKalle Valo 
379bdcd8170SKalle Valo 	if (active) {
380bdcd8170SKalle Valo 		/*
381bdcd8170SKalle Valo 		 * Keep track of the active stream with the highest
382bdcd8170SKalle Valo 		 * priority.
383bdcd8170SKalle Valo 		 */
384bdcd8170SKalle Valo 		if (ar->ac_stream_pri_map[traffic_class] >
385bdcd8170SKalle Valo 		    ar->hiac_stream_active_pri)
386bdcd8170SKalle Valo 			/* set the new highest active priority */
387bdcd8170SKalle Valo 			ar->hiac_stream_active_pri =
388bdcd8170SKalle Valo 					ar->ac_stream_pri_map[traffic_class];
389bdcd8170SKalle Valo 
390bdcd8170SKalle Valo 	} else {
391bdcd8170SKalle Valo 		/*
392bdcd8170SKalle Valo 		 * We may have to search for the next active stream
393bdcd8170SKalle Valo 		 * that is the highest priority.
394bdcd8170SKalle Valo 		 */
395bdcd8170SKalle Valo 		if (ar->hiac_stream_active_pri ==
396bdcd8170SKalle Valo 			ar->ac_stream_pri_map[traffic_class]) {
397bdcd8170SKalle Valo 			/*
398bdcd8170SKalle Valo 			 * The highest priority stream just went inactive
399bdcd8170SKalle Valo 			 * reset and search for the "next" highest "active"
400bdcd8170SKalle Valo 			 * priority stream.
401bdcd8170SKalle Valo 			 */
402bdcd8170SKalle Valo 			ar->hiac_stream_active_pri = 0;
403bdcd8170SKalle Valo 
404bdcd8170SKalle Valo 			for (i = 0; i < WMM_NUM_AC; i++) {
405bdcd8170SKalle Valo 				if (ar->ac_stream_active[i] &&
406bdcd8170SKalle Valo 				    (ar->ac_stream_pri_map[i] >
407bdcd8170SKalle Valo 				     ar->hiac_stream_active_pri))
408bdcd8170SKalle Valo 					/*
409bdcd8170SKalle Valo 					 * Set the new highest active
410bdcd8170SKalle Valo 					 * priority.
411bdcd8170SKalle Valo 					 */
412bdcd8170SKalle Valo 					ar->hiac_stream_active_pri =
413bdcd8170SKalle Valo 						ar->ac_stream_pri_map[i];
414bdcd8170SKalle Valo 			}
415bdcd8170SKalle Valo 		}
416bdcd8170SKalle Valo 	}
417bdcd8170SKalle Valo 
418bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
419bdcd8170SKalle Valo 
420bdcd8170SKalle Valo notify_htc:
421bdcd8170SKalle Valo 	/* notify HTC, this may cause credit distribution changes */
422ad226ec2SKalle Valo 	ath6kl_htc_indicate_activity_change(ar->htc_target, eid, active);
423bdcd8170SKalle Valo }
424bdcd8170SKalle Valo 
425bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
426bdcd8170SKalle Valo 					       struct htc_packet *packet)
427bdcd8170SKalle Valo {
428bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
429bdcd8170SKalle Valo 	enum htc_endpoint_id endpoint = packet->endpoint;
430bdcd8170SKalle Valo 
431bdcd8170SKalle Valo 	if (endpoint == ar->ctrl_ep) {
432bdcd8170SKalle Valo 		/*
433bdcd8170SKalle Valo 		 * Under normal WMI if this is getting full, then something
434bdcd8170SKalle Valo 		 * is running rampant the host should not be exhausting the
435bdcd8170SKalle Valo 		 * WMI queue with too many commands the only exception to
436bdcd8170SKalle Valo 		 * this is during testing using endpointping.
437bdcd8170SKalle Valo 		 */
438bdcd8170SKalle Valo 		spin_lock_bh(&ar->lock);
439bdcd8170SKalle Valo 		set_bit(WMI_CTRL_EP_FULL, &ar->flag);
440bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
441bdcd8170SKalle Valo 		ath6kl_err("wmi ctrl ep is full\n");
442bdcd8170SKalle Valo 		return HTC_SEND_FULL_KEEP;
443bdcd8170SKalle Valo 	}
444bdcd8170SKalle Valo 
445bdcd8170SKalle Valo 	if (packet->info.tx.tag == ATH6KL_CONTROL_PKT_TAG)
446bdcd8170SKalle Valo 		return HTC_SEND_FULL_KEEP;
447bdcd8170SKalle Valo 
448bdcd8170SKalle Valo 	if (ar->nw_type == ADHOC_NETWORK)
449bdcd8170SKalle Valo 		/*
450bdcd8170SKalle Valo 		 * In adhoc mode, we cannot differentiate traffic
451bdcd8170SKalle Valo 		 * priorities so there is no need to continue, however we
452bdcd8170SKalle Valo 		 * should stop the network.
453bdcd8170SKalle Valo 		 */
454bdcd8170SKalle Valo 		goto stop_net_queues;
455bdcd8170SKalle Valo 
456bdcd8170SKalle Valo 	/*
457bdcd8170SKalle Valo 	 * The last MAX_HI_COOKIE_NUM "batch" of cookies are reserved for
458bdcd8170SKalle Valo 	 * the highest active stream.
459bdcd8170SKalle Valo 	 */
460bdcd8170SKalle Valo 	if (ar->ac_stream_pri_map[ar->ep2ac_map[endpoint]] <
461bdcd8170SKalle Valo 	    ar->hiac_stream_active_pri &&
462bdcd8170SKalle Valo 	    ar->cookie_count <= MAX_HI_COOKIE_NUM)
463bdcd8170SKalle Valo 		/*
464bdcd8170SKalle Valo 		 * Give preference to the highest priority stream by
465bdcd8170SKalle Valo 		 * dropping the packets which overflowed.
466bdcd8170SKalle Valo 		 */
467bdcd8170SKalle Valo 		return HTC_SEND_FULL_DROP;
468bdcd8170SKalle Valo 
469bdcd8170SKalle Valo stop_net_queues:
470bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
471bdcd8170SKalle Valo 	set_bit(NETQ_STOPPED, &ar->flag);
472bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
473bdcd8170SKalle Valo 	netif_stop_queue(ar->net_dev);
474bdcd8170SKalle Valo 
475bdcd8170SKalle Valo 	return HTC_SEND_FULL_KEEP;
476bdcd8170SKalle Valo }
477bdcd8170SKalle Valo 
478bdcd8170SKalle Valo /* TODO this needs to be looked at */
479bdcd8170SKalle Valo static void ath6kl_tx_clear_node_map(struct ath6kl *ar,
480bdcd8170SKalle Valo 				     enum htc_endpoint_id eid, u32 map_no)
481bdcd8170SKalle Valo {
482bdcd8170SKalle Valo 	u32 i;
483bdcd8170SKalle Valo 
484bdcd8170SKalle Valo 	if (ar->nw_type != ADHOC_NETWORK)
485bdcd8170SKalle Valo 		return;
486bdcd8170SKalle Valo 
487bdcd8170SKalle Valo 	if (!ar->ibss_ps_enable)
488bdcd8170SKalle Valo 		return;
489bdcd8170SKalle Valo 
490bdcd8170SKalle Valo 	if (eid == ar->ctrl_ep)
491bdcd8170SKalle Valo 		return;
492bdcd8170SKalle Valo 
493bdcd8170SKalle Valo 	if (map_no == 0)
494bdcd8170SKalle Valo 		return;
495bdcd8170SKalle Valo 
496bdcd8170SKalle Valo 	map_no--;
497bdcd8170SKalle Valo 	ar->node_map[map_no].tx_pend--;
498bdcd8170SKalle Valo 
499bdcd8170SKalle Valo 	if (ar->node_map[map_no].tx_pend)
500bdcd8170SKalle Valo 		return;
501bdcd8170SKalle Valo 
502bdcd8170SKalle Valo 	if (map_no != (ar->node_num - 1))
503bdcd8170SKalle Valo 		return;
504bdcd8170SKalle Valo 
505bdcd8170SKalle Valo 	for (i = ar->node_num; i > 0; i--) {
506bdcd8170SKalle Valo 		if (ar->node_map[i - 1].tx_pend)
507bdcd8170SKalle Valo 			break;
508bdcd8170SKalle Valo 
509bdcd8170SKalle Valo 		memset(&ar->node_map[i - 1], 0,
510bdcd8170SKalle Valo 		       sizeof(struct ath6kl_node_mapping));
511bdcd8170SKalle Valo 		ar->node_num--;
512bdcd8170SKalle Valo 	}
513bdcd8170SKalle Valo }
514bdcd8170SKalle Valo 
515bdcd8170SKalle Valo void ath6kl_tx_complete(void *context, struct list_head *packet_queue)
516bdcd8170SKalle Valo {
517bdcd8170SKalle Valo 	struct ath6kl *ar = context;
518bdcd8170SKalle Valo 	struct sk_buff_head skb_queue;
519bdcd8170SKalle Valo 	struct htc_packet *packet;
520bdcd8170SKalle Valo 	struct sk_buff *skb;
521bdcd8170SKalle Valo 	struct ath6kl_cookie *ath6kl_cookie;
522bdcd8170SKalle Valo 	u32 map_no = 0;
523bdcd8170SKalle Valo 	int status;
524bdcd8170SKalle Valo 	enum htc_endpoint_id eid;
525bdcd8170SKalle Valo 	bool wake_event = false;
526bdcd8170SKalle Valo 	bool flushing = false;
527bdcd8170SKalle Valo 
528bdcd8170SKalle Valo 	skb_queue_head_init(&skb_queue);
529bdcd8170SKalle Valo 
530bdcd8170SKalle Valo 	/* lock the driver as we update internal state */
531bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
532bdcd8170SKalle Valo 
533bdcd8170SKalle Valo 	/* reap completed packets */
534bdcd8170SKalle Valo 	while (!list_empty(packet_queue)) {
535bdcd8170SKalle Valo 
536bdcd8170SKalle Valo 		packet = list_first_entry(packet_queue, struct htc_packet,
537bdcd8170SKalle Valo 					  list);
538bdcd8170SKalle Valo 		list_del(&packet->list);
539bdcd8170SKalle Valo 
540bdcd8170SKalle Valo 		ath6kl_cookie = (struct ath6kl_cookie *)packet->pkt_cntxt;
541bdcd8170SKalle Valo 		if (!ath6kl_cookie)
542bdcd8170SKalle Valo 			goto fatal;
543bdcd8170SKalle Valo 
544bdcd8170SKalle Valo 		status = packet->status;
545bdcd8170SKalle Valo 		skb = ath6kl_cookie->skb;
546bdcd8170SKalle Valo 		eid = packet->endpoint;
547bdcd8170SKalle Valo 		map_no = ath6kl_cookie->map_no;
548bdcd8170SKalle Valo 
549bdcd8170SKalle Valo 		if (!skb || !skb->data)
550bdcd8170SKalle Valo 			goto fatal;
551bdcd8170SKalle Valo 
552bdcd8170SKalle Valo 		packet->buf = skb->data;
553bdcd8170SKalle Valo 
554bdcd8170SKalle Valo 		__skb_queue_tail(&skb_queue, skb);
555bdcd8170SKalle Valo 
556bdcd8170SKalle Valo 		if (!status && (packet->act_len != skb->len))
557bdcd8170SKalle Valo 			goto fatal;
558bdcd8170SKalle Valo 
559bdcd8170SKalle Valo 		ar->tx_pending[eid]--;
560bdcd8170SKalle Valo 
561bdcd8170SKalle Valo 		if (eid != ar->ctrl_ep)
562bdcd8170SKalle Valo 			ar->total_tx_data_pend--;
563bdcd8170SKalle Valo 
564bdcd8170SKalle Valo 		if (eid == ar->ctrl_ep) {
565bdcd8170SKalle Valo 			if (test_bit(WMI_CTRL_EP_FULL, &ar->flag))
566bdcd8170SKalle Valo 				clear_bit(WMI_CTRL_EP_FULL, &ar->flag);
567bdcd8170SKalle Valo 
568bdcd8170SKalle Valo 			if (ar->tx_pending[eid] == 0)
569bdcd8170SKalle Valo 				wake_event = true;
570bdcd8170SKalle Valo 		}
571bdcd8170SKalle Valo 
572bdcd8170SKalle Valo 		if (status) {
573bdcd8170SKalle Valo 			if (status == -ECANCELED)
574bdcd8170SKalle Valo 				/* a packet was flushed  */
575bdcd8170SKalle Valo 				flushing = true;
576bdcd8170SKalle Valo 
577bdcd8170SKalle Valo 			ar->net_stats.tx_errors++;
578bdcd8170SKalle Valo 
579bdcd8170SKalle Valo 			if (status != -ENOSPC)
580bdcd8170SKalle Valo 				ath6kl_err("tx error, status: 0x%x\n", status);
581bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
582bdcd8170SKalle Valo 				   "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
583bdcd8170SKalle Valo 				   __func__, skb, packet->buf, packet->act_len,
584bdcd8170SKalle Valo 				   eid, "error!");
585bdcd8170SKalle Valo 		} else {
586bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
587bdcd8170SKalle Valo 				   "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
588bdcd8170SKalle Valo 				   __func__, skb, packet->buf, packet->act_len,
589bdcd8170SKalle Valo 				   eid, "OK");
590bdcd8170SKalle Valo 
591bdcd8170SKalle Valo 			flushing = false;
592bdcd8170SKalle Valo 			ar->net_stats.tx_packets++;
593bdcd8170SKalle Valo 			ar->net_stats.tx_bytes += skb->len;
594bdcd8170SKalle Valo 		}
595bdcd8170SKalle Valo 
596bdcd8170SKalle Valo 		ath6kl_tx_clear_node_map(ar, eid, map_no);
597bdcd8170SKalle Valo 
598bdcd8170SKalle Valo 		ath6kl_free_cookie(ar, ath6kl_cookie);
599bdcd8170SKalle Valo 
600bdcd8170SKalle Valo 		if (test_bit(NETQ_STOPPED, &ar->flag))
601bdcd8170SKalle Valo 			clear_bit(NETQ_STOPPED, &ar->flag);
602bdcd8170SKalle Valo 	}
603bdcd8170SKalle Valo 
604bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
605bdcd8170SKalle Valo 
606bdcd8170SKalle Valo 	__skb_queue_purge(&skb_queue);
607bdcd8170SKalle Valo 
608bdcd8170SKalle Valo 	if (test_bit(CONNECTED, &ar->flag)) {
609bdcd8170SKalle Valo 		if (!flushing)
610bdcd8170SKalle Valo 			netif_wake_queue(ar->net_dev);
611bdcd8170SKalle Valo 	}
612bdcd8170SKalle Valo 
613bdcd8170SKalle Valo 	if (wake_event)
614bdcd8170SKalle Valo 		wake_up(&ar->event_wq);
615bdcd8170SKalle Valo 
616bdcd8170SKalle Valo 	return;
617bdcd8170SKalle Valo 
618bdcd8170SKalle Valo fatal:
619bdcd8170SKalle Valo 	WARN_ON(1);
620bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
621bdcd8170SKalle Valo 	return;
622bdcd8170SKalle Valo }
623bdcd8170SKalle Valo 
624bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar)
625bdcd8170SKalle Valo {
626bdcd8170SKalle Valo 	int i;
627bdcd8170SKalle Valo 
628bdcd8170SKalle Valo 	/* flush all the data (non-control) streams */
629bdcd8170SKalle Valo 	for (i = 0; i < WMM_NUM_AC; i++)
630ad226ec2SKalle Valo 		ath6kl_htc_flush_txep(ar->htc_target, ar->ac2ep_map[i],
631bdcd8170SKalle Valo 				      ATH6KL_DATA_PKT_TAG);
632bdcd8170SKalle Valo }
633bdcd8170SKalle Valo 
634bdcd8170SKalle Valo /* Rx functions */
635bdcd8170SKalle Valo 
636bdcd8170SKalle Valo static void ath6kl_deliver_frames_to_nw_stack(struct net_device *dev,
637bdcd8170SKalle Valo 					      struct sk_buff *skb)
638bdcd8170SKalle Valo {
639bdcd8170SKalle Valo 	if (!skb)
640bdcd8170SKalle Valo 		return;
641bdcd8170SKalle Valo 
642bdcd8170SKalle Valo 	skb->dev = dev;
643bdcd8170SKalle Valo 
644bdcd8170SKalle Valo 	if (!(skb->dev->flags & IFF_UP)) {
645bdcd8170SKalle Valo 		dev_kfree_skb(skb);
646bdcd8170SKalle Valo 		return;
647bdcd8170SKalle Valo 	}
648bdcd8170SKalle Valo 
649bdcd8170SKalle Valo 	skb->protocol = eth_type_trans(skb, skb->dev);
650bdcd8170SKalle Valo 
651bdcd8170SKalle Valo 	netif_rx_ni(skb);
652bdcd8170SKalle Valo }
653bdcd8170SKalle Valo 
654bdcd8170SKalle Valo static void ath6kl_alloc_netbufs(struct sk_buff_head *q, u16 num)
655bdcd8170SKalle Valo {
656bdcd8170SKalle Valo 	struct sk_buff *skb;
657bdcd8170SKalle Valo 
658bdcd8170SKalle Valo 	while (num) {
659bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
660bdcd8170SKalle Valo 		if (!skb) {
661bdcd8170SKalle Valo 			ath6kl_err("netbuf allocation failed\n");
662bdcd8170SKalle Valo 			return;
663bdcd8170SKalle Valo 		}
664bdcd8170SKalle Valo 		skb_queue_tail(q, skb);
665bdcd8170SKalle Valo 		num--;
666bdcd8170SKalle Valo 	}
667bdcd8170SKalle Valo }
668bdcd8170SKalle Valo 
669bdcd8170SKalle Valo static struct sk_buff *aggr_get_free_skb(struct aggr_info *p_aggr)
670bdcd8170SKalle Valo {
671bdcd8170SKalle Valo 	struct sk_buff *skb = NULL;
672bdcd8170SKalle Valo 
673bdcd8170SKalle Valo 	if (skb_queue_len(&p_aggr->free_q) < (AGGR_NUM_OF_FREE_NETBUFS >> 2))
674bdcd8170SKalle Valo 		ath6kl_alloc_netbufs(&p_aggr->free_q, AGGR_NUM_OF_FREE_NETBUFS);
675bdcd8170SKalle Valo 
676bdcd8170SKalle Valo 	skb = skb_dequeue(&p_aggr->free_q);
677bdcd8170SKalle Valo 
678bdcd8170SKalle Valo 	return skb;
679bdcd8170SKalle Valo }
680bdcd8170SKalle Valo 
681bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target, enum htc_endpoint_id endpoint)
682bdcd8170SKalle Valo {
683bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
684bdcd8170SKalle Valo 	struct sk_buff *skb;
685bdcd8170SKalle Valo 	int rx_buf;
686bdcd8170SKalle Valo 	int n_buf_refill;
687bdcd8170SKalle Valo 	struct htc_packet *packet;
688bdcd8170SKalle Valo 	struct list_head queue;
689bdcd8170SKalle Valo 
690bdcd8170SKalle Valo 	n_buf_refill = ATH6KL_MAX_RX_BUFFERS -
691ad226ec2SKalle Valo 			  ath6kl_htc_get_rxbuf_num(ar->htc_target, endpoint);
692bdcd8170SKalle Valo 
693bdcd8170SKalle Valo 	if (n_buf_refill <= 0)
694bdcd8170SKalle Valo 		return;
695bdcd8170SKalle Valo 
696bdcd8170SKalle Valo 	INIT_LIST_HEAD(&queue);
697bdcd8170SKalle Valo 
698bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
699bdcd8170SKalle Valo 		   "%s: providing htc with %d buffers at eid=%d\n",
700bdcd8170SKalle Valo 		   __func__, n_buf_refill, endpoint);
701bdcd8170SKalle Valo 
702bdcd8170SKalle Valo 	for (rx_buf = 0; rx_buf < n_buf_refill; rx_buf++) {
703bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
704bdcd8170SKalle Valo 		if (!skb)
705bdcd8170SKalle Valo 			break;
706bdcd8170SKalle Valo 
707bdcd8170SKalle Valo 		packet = (struct htc_packet *) skb->head;
70894e532d1SVasanthakumar Thiagarajan 		if (!IS_ALIGNED((unsigned long) skb->data, 4))
7091df94a85SVasanthakumar Thiagarajan 			skb->data = PTR_ALIGN(skb->data - 4, 4);
710bdcd8170SKalle Valo 		set_htc_rxpkt_info(packet, skb, skb->data,
711bdcd8170SKalle Valo 				ATH6KL_BUFFER_SIZE, endpoint);
712bdcd8170SKalle Valo 		list_add_tail(&packet->list, &queue);
713bdcd8170SKalle Valo 	}
714bdcd8170SKalle Valo 
715bdcd8170SKalle Valo 	if (!list_empty(&queue))
716ad226ec2SKalle Valo 		ath6kl_htc_add_rxbuf_multiple(ar->htc_target, &queue);
717bdcd8170SKalle Valo }
718bdcd8170SKalle Valo 
719bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count)
720bdcd8170SKalle Valo {
721bdcd8170SKalle Valo 	struct htc_packet *packet;
722bdcd8170SKalle Valo 	struct sk_buff *skb;
723bdcd8170SKalle Valo 
724bdcd8170SKalle Valo 	while (count) {
725bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_AMSDU_BUFFER_SIZE);
726bdcd8170SKalle Valo 		if (!skb)
727bdcd8170SKalle Valo 			return;
728bdcd8170SKalle Valo 
729bdcd8170SKalle Valo 		packet = (struct htc_packet *) skb->head;
73094e532d1SVasanthakumar Thiagarajan 		if (!IS_ALIGNED((unsigned long) skb->data, 4))
7311df94a85SVasanthakumar Thiagarajan 			skb->data = PTR_ALIGN(skb->data - 4, 4);
732bdcd8170SKalle Valo 		set_htc_rxpkt_info(packet, skb, skb->data,
733bdcd8170SKalle Valo 				   ATH6KL_AMSDU_BUFFER_SIZE, 0);
734bdcd8170SKalle Valo 		spin_lock_bh(&ar->lock);
735bdcd8170SKalle Valo 		list_add_tail(&packet->list, &ar->amsdu_rx_buffer_queue);
736bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
737bdcd8170SKalle Valo 		count--;
738bdcd8170SKalle Valo 	}
739bdcd8170SKalle Valo }
740bdcd8170SKalle Valo 
741bdcd8170SKalle Valo /*
742bdcd8170SKalle Valo  * Callback to allocate a receive buffer for a pending packet. We use a
743bdcd8170SKalle Valo  * pre-allocated list of buffers of maximum AMSDU size (4K).
744bdcd8170SKalle Valo  */
745bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
746bdcd8170SKalle Valo 					    enum htc_endpoint_id endpoint,
747bdcd8170SKalle Valo 					    int len)
748bdcd8170SKalle Valo {
749bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
750bdcd8170SKalle Valo 	struct htc_packet *packet = NULL;
751bdcd8170SKalle Valo 	struct list_head *pkt_pos;
752bdcd8170SKalle Valo 	int refill_cnt = 0, depth = 0;
753bdcd8170SKalle Valo 
754bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: eid=%d, len:%d\n",
755bdcd8170SKalle Valo 		   __func__, endpoint, len);
756bdcd8170SKalle Valo 
757bdcd8170SKalle Valo 	if ((len <= ATH6KL_BUFFER_SIZE) ||
758bdcd8170SKalle Valo 	    (len > ATH6KL_AMSDU_BUFFER_SIZE))
759bdcd8170SKalle Valo 		return NULL;
760bdcd8170SKalle Valo 
761bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
762bdcd8170SKalle Valo 
763bdcd8170SKalle Valo 	if (list_empty(&ar->amsdu_rx_buffer_queue)) {
764bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
765bdcd8170SKalle Valo 		refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS;
766bdcd8170SKalle Valo 		goto refill_buf;
767bdcd8170SKalle Valo 	}
768bdcd8170SKalle Valo 
769bdcd8170SKalle Valo 	packet = list_first_entry(&ar->amsdu_rx_buffer_queue,
770bdcd8170SKalle Valo 				  struct htc_packet, list);
771bdcd8170SKalle Valo 	list_del(&packet->list);
772bdcd8170SKalle Valo 	list_for_each(pkt_pos, &ar->amsdu_rx_buffer_queue)
773bdcd8170SKalle Valo 		depth++;
774bdcd8170SKalle Valo 
775bdcd8170SKalle Valo 	refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS - depth;
776bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
777bdcd8170SKalle Valo 
778bdcd8170SKalle Valo 	/* set actual endpoint ID */
779bdcd8170SKalle Valo 	packet->endpoint = endpoint;
780bdcd8170SKalle Valo 
781bdcd8170SKalle Valo refill_buf:
782bdcd8170SKalle Valo 	if (refill_cnt >= ATH6KL_AMSDU_REFILL_THRESHOLD)
783bdcd8170SKalle Valo 		ath6kl_refill_amsdu_rxbufs(ar, refill_cnt);
784bdcd8170SKalle Valo 
785bdcd8170SKalle Valo 	return packet;
786bdcd8170SKalle Valo }
787bdcd8170SKalle Valo 
788bdcd8170SKalle Valo static void aggr_slice_amsdu(struct aggr_info *p_aggr,
789bdcd8170SKalle Valo 			     struct rxtid *rxtid, struct sk_buff *skb)
790bdcd8170SKalle Valo {
791bdcd8170SKalle Valo 	struct sk_buff *new_skb;
792bdcd8170SKalle Valo 	struct ethhdr *hdr;
793bdcd8170SKalle Valo 	u16 frame_8023_len, payload_8023_len, mac_hdr_len, amsdu_len;
794bdcd8170SKalle Valo 	u8 *framep;
795bdcd8170SKalle Valo 
796bdcd8170SKalle Valo 	mac_hdr_len = sizeof(struct ethhdr);
797bdcd8170SKalle Valo 	framep = skb->data + mac_hdr_len;
798bdcd8170SKalle Valo 	amsdu_len = skb->len - mac_hdr_len;
799bdcd8170SKalle Valo 
800bdcd8170SKalle Valo 	while (amsdu_len > mac_hdr_len) {
801bdcd8170SKalle Valo 		hdr = (struct ethhdr *) framep;
802bdcd8170SKalle Valo 		payload_8023_len = ntohs(hdr->h_proto);
803bdcd8170SKalle Valo 
804bdcd8170SKalle Valo 		if (payload_8023_len < MIN_MSDU_SUBFRAME_PAYLOAD_LEN ||
805bdcd8170SKalle Valo 		    payload_8023_len > MAX_MSDU_SUBFRAME_PAYLOAD_LEN) {
806bdcd8170SKalle Valo 			ath6kl_err("802.3 AMSDU frame bound check failed. len %d\n",
807bdcd8170SKalle Valo 				   payload_8023_len);
808bdcd8170SKalle Valo 			break;
809bdcd8170SKalle Valo 		}
810bdcd8170SKalle Valo 
811bdcd8170SKalle Valo 		frame_8023_len = payload_8023_len + mac_hdr_len;
812bdcd8170SKalle Valo 		new_skb = aggr_get_free_skb(p_aggr);
813bdcd8170SKalle Valo 		if (!new_skb) {
814bdcd8170SKalle Valo 			ath6kl_err("no buffer available\n");
815bdcd8170SKalle Valo 			break;
816bdcd8170SKalle Valo 		}
817bdcd8170SKalle Valo 
818bdcd8170SKalle Valo 		memcpy(new_skb->data, framep, frame_8023_len);
819bdcd8170SKalle Valo 		skb_put(new_skb, frame_8023_len);
820bdcd8170SKalle Valo 		if (ath6kl_wmi_dot3_2_dix(new_skb)) {
821bdcd8170SKalle Valo 			ath6kl_err("dot3_2_dix error\n");
822bdcd8170SKalle Valo 			dev_kfree_skb(new_skb);
823bdcd8170SKalle Valo 			break;
824bdcd8170SKalle Valo 		}
825bdcd8170SKalle Valo 
826bdcd8170SKalle Valo 		skb_queue_tail(&rxtid->q, new_skb);
827bdcd8170SKalle Valo 
828bdcd8170SKalle Valo 		/* Is this the last subframe within this aggregate ? */
829bdcd8170SKalle Valo 		if ((amsdu_len - frame_8023_len) == 0)
830bdcd8170SKalle Valo 			break;
831bdcd8170SKalle Valo 
832bdcd8170SKalle Valo 		/* Add the length of A-MSDU subframe padding bytes -
833bdcd8170SKalle Valo 		 * Round to nearest word.
834bdcd8170SKalle Valo 		 */
83513e34ea1SVasanthakumar Thiagarajan 		frame_8023_len = ALIGN(frame_8023_len, 4);
836bdcd8170SKalle Valo 
837bdcd8170SKalle Valo 		framep += frame_8023_len;
838bdcd8170SKalle Valo 		amsdu_len -= frame_8023_len;
839bdcd8170SKalle Valo 	}
840bdcd8170SKalle Valo 
841bdcd8170SKalle Valo 	dev_kfree_skb(skb);
842bdcd8170SKalle Valo }
843bdcd8170SKalle Valo 
844bdcd8170SKalle Valo static void aggr_deque_frms(struct aggr_info *p_aggr, u8 tid,
845bdcd8170SKalle Valo 			    u16 seq_no, u8 order)
846bdcd8170SKalle Valo {
847bdcd8170SKalle Valo 	struct sk_buff *skb;
848bdcd8170SKalle Valo 	struct rxtid *rxtid;
849bdcd8170SKalle Valo 	struct skb_hold_q *node;
850bdcd8170SKalle Valo 	u16 idx, idx_end, seq_end;
851bdcd8170SKalle Valo 	struct rxtid_stats *stats;
852bdcd8170SKalle Valo 
853bdcd8170SKalle Valo 	if (!p_aggr)
854bdcd8170SKalle Valo 		return;
855bdcd8170SKalle Valo 
856bdcd8170SKalle Valo 	rxtid = &p_aggr->rx_tid[tid];
857bdcd8170SKalle Valo 	stats = &p_aggr->stat[tid];
858bdcd8170SKalle Valo 
859bdcd8170SKalle Valo 	idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
860bdcd8170SKalle Valo 
861bdcd8170SKalle Valo 	/*
862bdcd8170SKalle Valo 	 * idx_end is typically the last possible frame in the window,
863bdcd8170SKalle Valo 	 * but changes to 'the' seq_no, when BAR comes. If seq_no
864bdcd8170SKalle Valo 	 * is non-zero, we will go up to that and stop.
865bdcd8170SKalle Valo 	 * Note: last seq no in current window will occupy the same
866bdcd8170SKalle Valo 	 * index position as index that is just previous to start.
867bdcd8170SKalle Valo 	 * An imp point : if win_sz is 7, for seq_no space of 4095,
868bdcd8170SKalle Valo 	 * then, there would be holes when sequence wrap around occurs.
869bdcd8170SKalle Valo 	 * Target should judiciously choose the win_sz, based on
870bdcd8170SKalle Valo 	 * this condition. For 4095, (TID_WINDOW_SZ = 2 x win_sz
871bdcd8170SKalle Valo 	 * 2, 4, 8, 16 win_sz works fine).
872bdcd8170SKalle Valo 	 * We must deque from "idx" to "idx_end", including both.
873bdcd8170SKalle Valo 	 */
874bdcd8170SKalle Valo 	seq_end = seq_no ? seq_no : rxtid->seq_next;
875bdcd8170SKalle Valo 	idx_end = AGGR_WIN_IDX(seq_end, rxtid->hold_q_sz);
876bdcd8170SKalle Valo 
877bdcd8170SKalle Valo 	spin_lock_bh(&rxtid->lock);
878bdcd8170SKalle Valo 
879bdcd8170SKalle Valo 	do {
880bdcd8170SKalle Valo 		node = &rxtid->hold_q[idx];
881bdcd8170SKalle Valo 		if ((order == 1) && (!node->skb))
882bdcd8170SKalle Valo 			break;
883bdcd8170SKalle Valo 
884bdcd8170SKalle Valo 		if (node->skb) {
885bdcd8170SKalle Valo 			if (node->is_amsdu)
886bdcd8170SKalle Valo 				aggr_slice_amsdu(p_aggr, rxtid, node->skb);
887bdcd8170SKalle Valo 			else
888bdcd8170SKalle Valo 				skb_queue_tail(&rxtid->q, node->skb);
889bdcd8170SKalle Valo 			node->skb = NULL;
890bdcd8170SKalle Valo 		} else
891bdcd8170SKalle Valo 			stats->num_hole++;
892bdcd8170SKalle Valo 
893bdcd8170SKalle Valo 		rxtid->seq_next = ATH6KL_NEXT_SEQ_NO(rxtid->seq_next);
894bdcd8170SKalle Valo 		idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
895bdcd8170SKalle Valo 	} while (idx != idx_end);
896bdcd8170SKalle Valo 
897bdcd8170SKalle Valo 	spin_unlock_bh(&rxtid->lock);
898bdcd8170SKalle Valo 
899bdcd8170SKalle Valo 	stats->num_delivered += skb_queue_len(&rxtid->q);
900bdcd8170SKalle Valo 
901bdcd8170SKalle Valo 	while ((skb = skb_dequeue(&rxtid->q)))
902bdcd8170SKalle Valo 		ath6kl_deliver_frames_to_nw_stack(p_aggr->dev, skb);
903bdcd8170SKalle Valo }
904bdcd8170SKalle Valo 
905bdcd8170SKalle Valo static bool aggr_process_recv_frm(struct aggr_info *agg_info, u8 tid,
906bdcd8170SKalle Valo 				  u16 seq_no,
907bdcd8170SKalle Valo 				  bool is_amsdu, struct sk_buff *frame)
908bdcd8170SKalle Valo {
909bdcd8170SKalle Valo 	struct rxtid *rxtid;
910bdcd8170SKalle Valo 	struct rxtid_stats *stats;
911bdcd8170SKalle Valo 	struct sk_buff *skb;
912bdcd8170SKalle Valo 	struct skb_hold_q *node;
913bdcd8170SKalle Valo 	u16 idx, st, cur, end;
914bdcd8170SKalle Valo 	bool is_queued = false;
915bdcd8170SKalle Valo 	u16 extended_end;
916bdcd8170SKalle Valo 
917bdcd8170SKalle Valo 	rxtid = &agg_info->rx_tid[tid];
918bdcd8170SKalle Valo 	stats = &agg_info->stat[tid];
919bdcd8170SKalle Valo 
920bdcd8170SKalle Valo 	stats->num_into_aggr++;
921bdcd8170SKalle Valo 
922bdcd8170SKalle Valo 	if (!rxtid->aggr) {
923bdcd8170SKalle Valo 		if (is_amsdu) {
924bdcd8170SKalle Valo 			aggr_slice_amsdu(agg_info, rxtid, frame);
925bdcd8170SKalle Valo 			is_queued = true;
926bdcd8170SKalle Valo 			stats->num_amsdu++;
927bdcd8170SKalle Valo 			while ((skb = skb_dequeue(&rxtid->q)))
928bdcd8170SKalle Valo 				ath6kl_deliver_frames_to_nw_stack(agg_info->dev,
929bdcd8170SKalle Valo 								  skb);
930bdcd8170SKalle Valo 		}
931bdcd8170SKalle Valo 		return is_queued;
932bdcd8170SKalle Valo 	}
933bdcd8170SKalle Valo 
934bdcd8170SKalle Valo 	/* Check the incoming sequence no, if it's in the window */
935bdcd8170SKalle Valo 	st = rxtid->seq_next;
936bdcd8170SKalle Valo 	cur = seq_no;
937bdcd8170SKalle Valo 	end = (st + rxtid->hold_q_sz-1) & ATH6KL_MAX_SEQ_NO;
938bdcd8170SKalle Valo 
939bdcd8170SKalle Valo 	if (((st < end) && (cur < st || cur > end)) ||
940bdcd8170SKalle Valo 	    ((st > end) && (cur > end) && (cur < st))) {
941bdcd8170SKalle Valo 		extended_end = (end + rxtid->hold_q_sz - 1) &
942bdcd8170SKalle Valo 			ATH6KL_MAX_SEQ_NO;
943bdcd8170SKalle Valo 
944bdcd8170SKalle Valo 		if (((end < extended_end) &&
945bdcd8170SKalle Valo 		     (cur < end || cur > extended_end)) ||
946bdcd8170SKalle Valo 		    ((end > extended_end) && (cur > extended_end) &&
947bdcd8170SKalle Valo 		     (cur < end))) {
948bdcd8170SKalle Valo 			aggr_deque_frms(agg_info, tid, 0, 0);
949bdcd8170SKalle Valo 			if (cur >= rxtid->hold_q_sz - 1)
950bdcd8170SKalle Valo 				rxtid->seq_next = cur - (rxtid->hold_q_sz - 1);
951bdcd8170SKalle Valo 			else
952bdcd8170SKalle Valo 				rxtid->seq_next = ATH6KL_MAX_SEQ_NO -
953bdcd8170SKalle Valo 						  (rxtid->hold_q_sz - 2 - cur);
954bdcd8170SKalle Valo 		} else {
955bdcd8170SKalle Valo 			/*
956bdcd8170SKalle Valo 			 * Dequeue only those frames that are outside the
957bdcd8170SKalle Valo 			 * new shifted window.
958bdcd8170SKalle Valo 			 */
959bdcd8170SKalle Valo 			if (cur >= rxtid->hold_q_sz - 1)
960bdcd8170SKalle Valo 				st = cur - (rxtid->hold_q_sz - 1);
961bdcd8170SKalle Valo 			else
962bdcd8170SKalle Valo 				st = ATH6KL_MAX_SEQ_NO -
963bdcd8170SKalle Valo 					(rxtid->hold_q_sz - 2 - cur);
964bdcd8170SKalle Valo 
965bdcd8170SKalle Valo 			aggr_deque_frms(agg_info, tid, st, 0);
966bdcd8170SKalle Valo 		}
967bdcd8170SKalle Valo 
968bdcd8170SKalle Valo 		stats->num_oow++;
969bdcd8170SKalle Valo 	}
970bdcd8170SKalle Valo 
971bdcd8170SKalle Valo 	idx = AGGR_WIN_IDX(seq_no, rxtid->hold_q_sz);
972bdcd8170SKalle Valo 
973bdcd8170SKalle Valo 	node = &rxtid->hold_q[idx];
974bdcd8170SKalle Valo 
975bdcd8170SKalle Valo 	spin_lock_bh(&rxtid->lock);
976bdcd8170SKalle Valo 
977bdcd8170SKalle Valo 	/*
978bdcd8170SKalle Valo 	 * Is the cur frame duplicate or something beyond our window(hold_q
979bdcd8170SKalle Valo 	 * -> which is 2x, already)?
980bdcd8170SKalle Valo 	 *
981bdcd8170SKalle Valo 	 * 1. Duplicate is easy - drop incoming frame.
982bdcd8170SKalle Valo 	 * 2. Not falling in current sliding window.
983bdcd8170SKalle Valo 	 *  2a. is the frame_seq_no preceding current tid_seq_no?
984bdcd8170SKalle Valo 	 *      -> drop the frame. perhaps sender did not get our ACK.
985bdcd8170SKalle Valo 	 *         this is taken care of above.
986bdcd8170SKalle Valo 	 *  2b. is the frame_seq_no beyond window(st, TID_WINDOW_SZ);
987bdcd8170SKalle Valo 	 *      -> Taken care of it above, by moving window forward.
988bdcd8170SKalle Valo 	 */
989bdcd8170SKalle Valo 	dev_kfree_skb(node->skb);
990bdcd8170SKalle Valo 	stats->num_dups++;
991bdcd8170SKalle Valo 
992bdcd8170SKalle Valo 	node->skb = frame;
993bdcd8170SKalle Valo 	is_queued = true;
994bdcd8170SKalle Valo 	node->is_amsdu = is_amsdu;
995bdcd8170SKalle Valo 	node->seq_no = seq_no;
996bdcd8170SKalle Valo 
997bdcd8170SKalle Valo 	if (node->is_amsdu)
998bdcd8170SKalle Valo 		stats->num_amsdu++;
999bdcd8170SKalle Valo 	else
1000bdcd8170SKalle Valo 		stats->num_mpdu++;
1001bdcd8170SKalle Valo 
1002bdcd8170SKalle Valo 	spin_unlock_bh(&rxtid->lock);
1003bdcd8170SKalle Valo 
1004bdcd8170SKalle Valo 	aggr_deque_frms(agg_info, tid, 0, 1);
1005bdcd8170SKalle Valo 
1006bdcd8170SKalle Valo 	if (agg_info->timer_scheduled)
1007bdcd8170SKalle Valo 		rxtid->progress = true;
1008bdcd8170SKalle Valo 	else
1009bdcd8170SKalle Valo 		for (idx = 0 ; idx < rxtid->hold_q_sz; idx++) {
1010bdcd8170SKalle Valo 			if (rxtid->hold_q[idx].skb) {
1011bdcd8170SKalle Valo 				/*
1012bdcd8170SKalle Valo 				 * There is a frame in the queue and no
1013bdcd8170SKalle Valo 				 * timer so start a timer to ensure that
1014bdcd8170SKalle Valo 				 * the frame doesn't remain stuck
1015bdcd8170SKalle Valo 				 * forever.
1016bdcd8170SKalle Valo 				 */
1017bdcd8170SKalle Valo 				agg_info->timer_scheduled = true;
1018bdcd8170SKalle Valo 				mod_timer(&agg_info->timer,
1019bdcd8170SKalle Valo 					  (jiffies +
1020bdcd8170SKalle Valo 					   HZ * (AGGR_RX_TIMEOUT) / 1000));
1021bdcd8170SKalle Valo 				rxtid->progress = false;
1022bdcd8170SKalle Valo 				rxtid->timer_mon = true;
1023bdcd8170SKalle Valo 				break;
1024bdcd8170SKalle Valo 			}
1025bdcd8170SKalle Valo 		}
1026bdcd8170SKalle Valo 
1027bdcd8170SKalle Valo 	return is_queued;
1028bdcd8170SKalle Valo }
1029bdcd8170SKalle Valo 
1030bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet)
1031bdcd8170SKalle Valo {
1032bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
1033bdcd8170SKalle Valo 	struct sk_buff *skb = packet->pkt_cntxt;
1034bdcd8170SKalle Valo 	struct wmi_rx_meta_v2 *meta;
1035bdcd8170SKalle Valo 	struct wmi_data_hdr *dhdr;
1036bdcd8170SKalle Valo 	int min_hdr_len;
1037bdcd8170SKalle Valo 	u8 meta_type, dot11_hdr = 0;
1038bdcd8170SKalle Valo 	int status = packet->status;
1039bdcd8170SKalle Valo 	enum htc_endpoint_id ept = packet->endpoint;
1040bdcd8170SKalle Valo 	bool is_amsdu, prev_ps, ps_state = false;
1041bdcd8170SKalle Valo 	struct ath6kl_sta *conn = NULL;
1042bdcd8170SKalle Valo 	struct sk_buff *skb1 = NULL;
1043bdcd8170SKalle Valo 	struct ethhdr *datap = NULL;
1044bdcd8170SKalle Valo 	u16 seq_no, offset;
1045bdcd8170SKalle Valo 	u8 tid;
1046bdcd8170SKalle Valo 
1047bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
1048bdcd8170SKalle Valo 		   "%s: ar=0x%p eid=%d, skb=0x%p, data=0x%p, len=0x%x status:%d",
1049bdcd8170SKalle Valo 		   __func__, ar, ept, skb, packet->buf,
1050bdcd8170SKalle Valo 		   packet->act_len, status);
1051bdcd8170SKalle Valo 
1052bdcd8170SKalle Valo 	if (status || !(skb->data + HTC_HDR_LENGTH)) {
1053bdcd8170SKalle Valo 		ar->net_stats.rx_errors++;
1054bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1055bdcd8170SKalle Valo 		return;
1056bdcd8170SKalle Valo 	}
1057bdcd8170SKalle Valo 
1058bdcd8170SKalle Valo 	/*
1059bdcd8170SKalle Valo 	 * Take lock to protect buffer counts and adaptive power throughput
1060bdcd8170SKalle Valo 	 * state.
1061bdcd8170SKalle Valo 	 */
1062bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
1063bdcd8170SKalle Valo 
1064bdcd8170SKalle Valo 	ar->net_stats.rx_packets++;
1065bdcd8170SKalle Valo 	ar->net_stats.rx_bytes += packet->act_len;
1066bdcd8170SKalle Valo 
106783dc5f2fSVasanthakumar Thiagarajan 	spin_unlock_bh(&ar->lock);
106883dc5f2fSVasanthakumar Thiagarajan 
1069bdcd8170SKalle Valo 	skb_put(skb, packet->act_len + HTC_HDR_LENGTH);
1070bdcd8170SKalle Valo 	skb_pull(skb, HTC_HDR_LENGTH);
1071bdcd8170SKalle Valo 
1072ef094103SKalle Valo 	ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "rx ",
1073ef094103SKalle Valo 			skb->data, skb->len);
1074bdcd8170SKalle Valo 
1075bdcd8170SKalle Valo 	skb->dev = ar->net_dev;
1076bdcd8170SKalle Valo 
1077bdcd8170SKalle Valo 	if (!test_bit(WMI_ENABLED, &ar->flag)) {
1078bdcd8170SKalle Valo 		if (EPPING_ALIGNMENT_PAD > 0)
1079bdcd8170SKalle Valo 			skb_pull(skb, EPPING_ALIGNMENT_PAD);
1080bdcd8170SKalle Valo 		ath6kl_deliver_frames_to_nw_stack(ar->net_dev, skb);
1081bdcd8170SKalle Valo 		return;
1082bdcd8170SKalle Valo 	}
1083bdcd8170SKalle Valo 
1084bdcd8170SKalle Valo 	if (ept == ar->ctrl_ep) {
1085bdcd8170SKalle Valo 		ath6kl_wmi_control_rx(ar->wmi, skb);
1086bdcd8170SKalle Valo 		return;
1087bdcd8170SKalle Valo 	}
1088bdcd8170SKalle Valo 
108967f9178fSVasanthakumar Thiagarajan 	min_hdr_len = sizeof(struct ethhdr) + sizeof(struct wmi_data_hdr) +
1090bdcd8170SKalle Valo 		      sizeof(struct ath6kl_llc_snap_hdr);
1091bdcd8170SKalle Valo 
1092bdcd8170SKalle Valo 	dhdr = (struct wmi_data_hdr *) skb->data;
1093bdcd8170SKalle Valo 
1094bdcd8170SKalle Valo 	/*
1095bdcd8170SKalle Valo 	 * In the case of AP mode we may receive NULL data frames
1096bdcd8170SKalle Valo 	 * that do not have LLC hdr. They are 16 bytes in size.
1097bdcd8170SKalle Valo 	 * Allow these frames in the AP mode.
1098bdcd8170SKalle Valo 	 */
1099bdcd8170SKalle Valo 	if (ar->nw_type != AP_NETWORK &&
1100bdcd8170SKalle Valo 	    ((packet->act_len < min_hdr_len) ||
1101bdcd8170SKalle Valo 	     (packet->act_len > WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH))) {
1102bdcd8170SKalle Valo 		ath6kl_info("frame len is too short or too long\n");
1103bdcd8170SKalle Valo 		ar->net_stats.rx_errors++;
1104bdcd8170SKalle Valo 		ar->net_stats.rx_length_errors++;
1105bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1106bdcd8170SKalle Valo 		return;
1107bdcd8170SKalle Valo 	}
1108bdcd8170SKalle Valo 
1109bdcd8170SKalle Valo 	/* Get the Power save state of the STA */
1110bdcd8170SKalle Valo 	if (ar->nw_type == AP_NETWORK) {
1111bdcd8170SKalle Valo 		meta_type = wmi_data_hdr_get_meta(dhdr);
1112bdcd8170SKalle Valo 
1113bdcd8170SKalle Valo 		ps_state = !!((dhdr->info >> WMI_DATA_HDR_PS_SHIFT) &
1114bdcd8170SKalle Valo 			      WMI_DATA_HDR_PS_MASK);
1115bdcd8170SKalle Valo 
1116bdcd8170SKalle Valo 		offset = sizeof(struct wmi_data_hdr);
1117bdcd8170SKalle Valo 
1118bdcd8170SKalle Valo 		switch (meta_type) {
1119bdcd8170SKalle Valo 		case 0:
1120bdcd8170SKalle Valo 			break;
1121bdcd8170SKalle Valo 		case WMI_META_VERSION_1:
1122bdcd8170SKalle Valo 			offset += sizeof(struct wmi_rx_meta_v1);
1123bdcd8170SKalle Valo 			break;
1124bdcd8170SKalle Valo 		case WMI_META_VERSION_2:
1125bdcd8170SKalle Valo 			offset += sizeof(struct wmi_rx_meta_v2);
1126bdcd8170SKalle Valo 			break;
1127bdcd8170SKalle Valo 		default:
1128bdcd8170SKalle Valo 			break;
1129bdcd8170SKalle Valo 		}
1130bdcd8170SKalle Valo 
1131bdcd8170SKalle Valo 		datap = (struct ethhdr *) (skb->data + offset);
1132bdcd8170SKalle Valo 		conn = ath6kl_find_sta(ar, datap->h_source);
1133bdcd8170SKalle Valo 
1134bdcd8170SKalle Valo 		if (!conn) {
1135bdcd8170SKalle Valo 			dev_kfree_skb(skb);
1136bdcd8170SKalle Valo 			return;
1137bdcd8170SKalle Valo 		}
1138bdcd8170SKalle Valo 
1139bdcd8170SKalle Valo 		/*
1140bdcd8170SKalle Valo 		 * If there is a change in PS state of the STA,
1141bdcd8170SKalle Valo 		 * take appropriate steps:
1142bdcd8170SKalle Valo 		 *
1143bdcd8170SKalle Valo 		 * 1. If Sleep-->Awake, flush the psq for the STA
1144bdcd8170SKalle Valo 		 *    Clear the PVB for the STA.
1145bdcd8170SKalle Valo 		 * 2. If Awake-->Sleep, Starting queueing frames
1146bdcd8170SKalle Valo 		 *    the STA.
1147bdcd8170SKalle Valo 		 */
1148bdcd8170SKalle Valo 		prev_ps = !!(conn->sta_flags & STA_PS_SLEEP);
1149bdcd8170SKalle Valo 
1150bdcd8170SKalle Valo 		if (ps_state)
1151bdcd8170SKalle Valo 			conn->sta_flags |= STA_PS_SLEEP;
1152bdcd8170SKalle Valo 		else
1153bdcd8170SKalle Valo 			conn->sta_flags &= ~STA_PS_SLEEP;
1154bdcd8170SKalle Valo 
1155bdcd8170SKalle Valo 		if (prev_ps ^ !!(conn->sta_flags & STA_PS_SLEEP)) {
1156bdcd8170SKalle Valo 			if (!(conn->sta_flags & STA_PS_SLEEP)) {
1157bdcd8170SKalle Valo 				struct sk_buff *skbuff = NULL;
1158bdcd8170SKalle Valo 
1159bdcd8170SKalle Valo 				spin_lock_bh(&conn->psq_lock);
1160bdcd8170SKalle Valo 				while ((skbuff = skb_dequeue(&conn->psq))
1161bdcd8170SKalle Valo 				       != NULL) {
1162bdcd8170SKalle Valo 					spin_unlock_bh(&conn->psq_lock);
1163bdcd8170SKalle Valo 					ath6kl_data_tx(skbuff, ar->net_dev);
1164bdcd8170SKalle Valo 					spin_lock_bh(&conn->psq_lock);
1165bdcd8170SKalle Valo 				}
1166bdcd8170SKalle Valo 				spin_unlock_bh(&conn->psq_lock);
1167bdcd8170SKalle Valo 				/* Clear the PVB for this STA */
1168bdcd8170SKalle Valo 				ath6kl_wmi_set_pvb_cmd(ar->wmi, conn->aid, 0);
1169bdcd8170SKalle Valo 			}
1170bdcd8170SKalle Valo 		}
1171bdcd8170SKalle Valo 
1172bdcd8170SKalle Valo 		/* drop NULL data frames here */
1173bdcd8170SKalle Valo 		if ((packet->act_len < min_hdr_len) ||
1174bdcd8170SKalle Valo 		    (packet->act_len >
1175bdcd8170SKalle Valo 		     WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH)) {
1176bdcd8170SKalle Valo 			dev_kfree_skb(skb);
1177bdcd8170SKalle Valo 			return;
1178bdcd8170SKalle Valo 		}
1179bdcd8170SKalle Valo 	}
1180bdcd8170SKalle Valo 
1181bdcd8170SKalle Valo 	is_amsdu = wmi_data_hdr_is_amsdu(dhdr) ? true : false;
1182bdcd8170SKalle Valo 	tid = wmi_data_hdr_get_up(dhdr);
1183bdcd8170SKalle Valo 	seq_no = wmi_data_hdr_get_seqno(dhdr);
1184bdcd8170SKalle Valo 	meta_type = wmi_data_hdr_get_meta(dhdr);
1185bdcd8170SKalle Valo 	dot11_hdr = wmi_data_hdr_get_dot11(dhdr);
1186594a0bc8SVasanthakumar Thiagarajan 	skb_pull(skb, sizeof(struct wmi_data_hdr));
1187bdcd8170SKalle Valo 
1188bdcd8170SKalle Valo 	switch (meta_type) {
1189bdcd8170SKalle Valo 	case WMI_META_VERSION_1:
1190bdcd8170SKalle Valo 		skb_pull(skb, sizeof(struct wmi_rx_meta_v1));
1191bdcd8170SKalle Valo 		break;
1192bdcd8170SKalle Valo 	case WMI_META_VERSION_2:
1193bdcd8170SKalle Valo 		meta = (struct wmi_rx_meta_v2 *) skb->data;
1194bdcd8170SKalle Valo 		if (meta->csum_flags & 0x1) {
1195bdcd8170SKalle Valo 			skb->ip_summed = CHECKSUM_COMPLETE;
1196bdcd8170SKalle Valo 			skb->csum = (__force __wsum) meta->csum;
1197bdcd8170SKalle Valo 		}
1198bdcd8170SKalle Valo 		skb_pull(skb, sizeof(struct wmi_rx_meta_v2));
1199bdcd8170SKalle Valo 		break;
1200bdcd8170SKalle Valo 	default:
1201bdcd8170SKalle Valo 		break;
1202bdcd8170SKalle Valo 	}
1203bdcd8170SKalle Valo 
1204bdcd8170SKalle Valo 	if (dot11_hdr)
1205bdcd8170SKalle Valo 		status = ath6kl_wmi_dot11_hdr_remove(ar->wmi, skb);
1206bdcd8170SKalle Valo 	else if (!is_amsdu)
1207bdcd8170SKalle Valo 		status = ath6kl_wmi_dot3_2_dix(skb);
1208bdcd8170SKalle Valo 
1209bdcd8170SKalle Valo 	if (status) {
1210bdcd8170SKalle Valo 		/*
1211bdcd8170SKalle Valo 		 * Drop frames that could not be processed (lack of
1212bdcd8170SKalle Valo 		 * memory, etc.)
1213bdcd8170SKalle Valo 		 */
1214bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1215bdcd8170SKalle Valo 		return;
1216bdcd8170SKalle Valo 	}
1217bdcd8170SKalle Valo 
1218bdcd8170SKalle Valo 	if (!(ar->net_dev->flags & IFF_UP)) {
1219bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1220bdcd8170SKalle Valo 		return;
1221bdcd8170SKalle Valo 	}
1222bdcd8170SKalle Valo 
1223bdcd8170SKalle Valo 	if (ar->nw_type == AP_NETWORK) {
1224bdcd8170SKalle Valo 		datap = (struct ethhdr *) skb->data;
1225bdcd8170SKalle Valo 		if (is_multicast_ether_addr(datap->h_dest))
1226bdcd8170SKalle Valo 			/*
1227bdcd8170SKalle Valo 			 * Bcast/Mcast frames should be sent to the
1228bdcd8170SKalle Valo 			 * OS stack as well as on the air.
1229bdcd8170SKalle Valo 			 */
1230bdcd8170SKalle Valo 			skb1 = skb_copy(skb, GFP_ATOMIC);
1231bdcd8170SKalle Valo 		else {
1232bdcd8170SKalle Valo 			/*
1233bdcd8170SKalle Valo 			 * Search for a connected STA with dstMac
1234bdcd8170SKalle Valo 			 * as the Mac address. If found send the
1235bdcd8170SKalle Valo 			 * frame to it on the air else send the
1236bdcd8170SKalle Valo 			 * frame up the stack.
1237bdcd8170SKalle Valo 			 */
1238bdcd8170SKalle Valo 			struct ath6kl_sta *conn = NULL;
1239bdcd8170SKalle Valo 			conn = ath6kl_find_sta(ar, datap->h_dest);
1240bdcd8170SKalle Valo 
1241bdcd8170SKalle Valo 			if (conn && ar->intra_bss) {
1242bdcd8170SKalle Valo 				skb1 = skb;
1243bdcd8170SKalle Valo 				skb = NULL;
1244bdcd8170SKalle Valo 			} else if (conn && !ar->intra_bss) {
1245bdcd8170SKalle Valo 				dev_kfree_skb(skb);
1246bdcd8170SKalle Valo 				skb = NULL;
1247bdcd8170SKalle Valo 			}
1248bdcd8170SKalle Valo 		}
1249bdcd8170SKalle Valo 		if (skb1)
1250bdcd8170SKalle Valo 			ath6kl_data_tx(skb1, ar->net_dev);
1251bdcd8170SKalle Valo 	}
1252bdcd8170SKalle Valo 
12535694f962SKalle Valo 	datap = (struct ethhdr *) skb->data;
12545694f962SKalle Valo 
12555694f962SKalle Valo 	if (is_unicast_ether_addr(datap->h_dest) &&
12565694f962SKalle Valo 	    aggr_process_recv_frm(ar->aggr_cntxt, tid, seq_no,
1257bdcd8170SKalle Valo 				  is_amsdu, skb))
12585694f962SKalle Valo 		/* aggregation code will handle the skb */
12595694f962SKalle Valo 		return;
12605694f962SKalle Valo 
1261bdcd8170SKalle Valo 	ath6kl_deliver_frames_to_nw_stack(ar->net_dev, skb);
1262bdcd8170SKalle Valo }
1263bdcd8170SKalle Valo 
1264bdcd8170SKalle Valo static void aggr_timeout(unsigned long arg)
1265bdcd8170SKalle Valo {
1266bdcd8170SKalle Valo 	u8 i, j;
1267bdcd8170SKalle Valo 	struct aggr_info *p_aggr = (struct aggr_info *) arg;
1268bdcd8170SKalle Valo 	struct rxtid *rxtid;
1269bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1270bdcd8170SKalle Valo 
1271bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
1272bdcd8170SKalle Valo 		rxtid = &p_aggr->rx_tid[i];
1273bdcd8170SKalle Valo 		stats = &p_aggr->stat[i];
1274bdcd8170SKalle Valo 
1275bdcd8170SKalle Valo 		if (!rxtid->aggr || !rxtid->timer_mon || rxtid->progress)
1276bdcd8170SKalle Valo 			continue;
1277bdcd8170SKalle Valo 
1278bdcd8170SKalle Valo 		stats->num_timeouts++;
127937ca6335SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_AGGR,
128037ca6335SKalle Valo 			   "aggr timeout (st %d end %d)\n",
1281bdcd8170SKalle Valo 			   rxtid->seq_next,
1282bdcd8170SKalle Valo 			   ((rxtid->seq_next + rxtid->hold_q_sz-1) &
1283bdcd8170SKalle Valo 			    ATH6KL_MAX_SEQ_NO));
1284bdcd8170SKalle Valo 		aggr_deque_frms(p_aggr, i, 0, 0);
1285bdcd8170SKalle Valo 	}
1286bdcd8170SKalle Valo 
1287bdcd8170SKalle Valo 	p_aggr->timer_scheduled = false;
1288bdcd8170SKalle Valo 
1289bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
1290bdcd8170SKalle Valo 		rxtid = &p_aggr->rx_tid[i];
1291bdcd8170SKalle Valo 
1292bdcd8170SKalle Valo 		if (rxtid->aggr && rxtid->hold_q) {
1293bdcd8170SKalle Valo 			for (j = 0; j < rxtid->hold_q_sz; j++) {
1294bdcd8170SKalle Valo 				if (rxtid->hold_q[j].skb) {
1295bdcd8170SKalle Valo 					p_aggr->timer_scheduled = true;
1296bdcd8170SKalle Valo 					rxtid->timer_mon = true;
1297bdcd8170SKalle Valo 					rxtid->progress = false;
1298bdcd8170SKalle Valo 					break;
1299bdcd8170SKalle Valo 				}
1300bdcd8170SKalle Valo 			}
1301bdcd8170SKalle Valo 
1302bdcd8170SKalle Valo 			if (j >= rxtid->hold_q_sz)
1303bdcd8170SKalle Valo 				rxtid->timer_mon = false;
1304bdcd8170SKalle Valo 		}
1305bdcd8170SKalle Valo 	}
1306bdcd8170SKalle Valo 
1307bdcd8170SKalle Valo 	if (p_aggr->timer_scheduled)
1308bdcd8170SKalle Valo 		mod_timer(&p_aggr->timer,
1309bdcd8170SKalle Valo 			  jiffies + msecs_to_jiffies(AGGR_RX_TIMEOUT));
1310bdcd8170SKalle Valo }
1311bdcd8170SKalle Valo 
1312bdcd8170SKalle Valo static void aggr_delete_tid_state(struct aggr_info *p_aggr, u8 tid)
1313bdcd8170SKalle Valo {
1314bdcd8170SKalle Valo 	struct rxtid *rxtid;
1315bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1316bdcd8170SKalle Valo 
1317bdcd8170SKalle Valo 	if (!p_aggr || tid >= NUM_OF_TIDS)
1318bdcd8170SKalle Valo 		return;
1319bdcd8170SKalle Valo 
1320bdcd8170SKalle Valo 	rxtid = &p_aggr->rx_tid[tid];
1321bdcd8170SKalle Valo 	stats = &p_aggr->stat[tid];
1322bdcd8170SKalle Valo 
1323bdcd8170SKalle Valo 	if (rxtid->aggr)
1324bdcd8170SKalle Valo 		aggr_deque_frms(p_aggr, tid, 0, 0);
1325bdcd8170SKalle Valo 
1326bdcd8170SKalle Valo 	rxtid->aggr = false;
1327bdcd8170SKalle Valo 	rxtid->progress = false;
1328bdcd8170SKalle Valo 	rxtid->timer_mon = false;
1329bdcd8170SKalle Valo 	rxtid->win_sz = 0;
1330bdcd8170SKalle Valo 	rxtid->seq_next = 0;
1331bdcd8170SKalle Valo 	rxtid->hold_q_sz = 0;
1332bdcd8170SKalle Valo 
1333bdcd8170SKalle Valo 	kfree(rxtid->hold_q);
1334bdcd8170SKalle Valo 	rxtid->hold_q = NULL;
1335bdcd8170SKalle Valo 
1336bdcd8170SKalle Valo 	memset(stats, 0, sizeof(struct rxtid_stats));
1337bdcd8170SKalle Valo }
1338bdcd8170SKalle Valo 
1339bdcd8170SKalle Valo void aggr_recv_addba_req_evt(struct ath6kl *ar, u8 tid, u16 seq_no, u8 win_sz)
1340bdcd8170SKalle Valo {
1341bdcd8170SKalle Valo 	struct aggr_info *p_aggr = ar->aggr_cntxt;
1342bdcd8170SKalle Valo 	struct rxtid *rxtid;
1343bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1344bdcd8170SKalle Valo 	u16 hold_q_size;
1345bdcd8170SKalle Valo 
1346bdcd8170SKalle Valo 	if (!p_aggr)
1347bdcd8170SKalle Valo 		return;
1348bdcd8170SKalle Valo 
1349bdcd8170SKalle Valo 	rxtid = &p_aggr->rx_tid[tid];
1350bdcd8170SKalle Valo 	stats = &p_aggr->stat[tid];
1351bdcd8170SKalle Valo 
1352bdcd8170SKalle Valo 	if (win_sz < AGGR_WIN_SZ_MIN || win_sz > AGGR_WIN_SZ_MAX)
1353bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: win_sz %d, tid %d\n",
1354bdcd8170SKalle Valo 			   __func__, win_sz, tid);
1355bdcd8170SKalle Valo 
1356bdcd8170SKalle Valo 	if (rxtid->aggr)
1357bdcd8170SKalle Valo 		aggr_delete_tid_state(p_aggr, tid);
1358bdcd8170SKalle Valo 
1359bdcd8170SKalle Valo 	rxtid->seq_next = seq_no;
1360bdcd8170SKalle Valo 	hold_q_size = TID_WINDOW_SZ(win_sz) * sizeof(struct skb_hold_q);
1361bdcd8170SKalle Valo 	rxtid->hold_q = kzalloc(hold_q_size, GFP_KERNEL);
1362bdcd8170SKalle Valo 	if (!rxtid->hold_q)
1363bdcd8170SKalle Valo 		return;
1364bdcd8170SKalle Valo 
1365bdcd8170SKalle Valo 	rxtid->win_sz = win_sz;
1366bdcd8170SKalle Valo 	rxtid->hold_q_sz = TID_WINDOW_SZ(win_sz);
1367bdcd8170SKalle Valo 	if (!skb_queue_empty(&rxtid->q))
1368bdcd8170SKalle Valo 		return;
1369bdcd8170SKalle Valo 
1370bdcd8170SKalle Valo 	rxtid->aggr = true;
1371bdcd8170SKalle Valo }
1372bdcd8170SKalle Valo 
1373bdcd8170SKalle Valo struct aggr_info *aggr_init(struct net_device *dev)
1374bdcd8170SKalle Valo {
1375bdcd8170SKalle Valo 	struct aggr_info *p_aggr = NULL;
1376bdcd8170SKalle Valo 	struct rxtid *rxtid;
1377bdcd8170SKalle Valo 	u8 i;
1378bdcd8170SKalle Valo 
1379bdcd8170SKalle Valo 	p_aggr = kzalloc(sizeof(struct aggr_info), GFP_KERNEL);
1380bdcd8170SKalle Valo 	if (!p_aggr) {
1381bdcd8170SKalle Valo 		ath6kl_err("failed to alloc memory for aggr_node\n");
1382bdcd8170SKalle Valo 		return NULL;
1383bdcd8170SKalle Valo 	}
1384bdcd8170SKalle Valo 
1385bdcd8170SKalle Valo 	p_aggr->aggr_sz = AGGR_SZ_DEFAULT;
1386bdcd8170SKalle Valo 	p_aggr->dev = dev;
1387bdcd8170SKalle Valo 	init_timer(&p_aggr->timer);
1388bdcd8170SKalle Valo 	p_aggr->timer.function = aggr_timeout;
1389bdcd8170SKalle Valo 	p_aggr->timer.data = (unsigned long) p_aggr;
1390bdcd8170SKalle Valo 
1391bdcd8170SKalle Valo 	p_aggr->timer_scheduled = false;
1392bdcd8170SKalle Valo 	skb_queue_head_init(&p_aggr->free_q);
1393bdcd8170SKalle Valo 
1394bdcd8170SKalle Valo 	ath6kl_alloc_netbufs(&p_aggr->free_q, AGGR_NUM_OF_FREE_NETBUFS);
1395bdcd8170SKalle Valo 
1396bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
1397bdcd8170SKalle Valo 		rxtid = &p_aggr->rx_tid[i];
1398bdcd8170SKalle Valo 		rxtid->aggr = false;
1399bdcd8170SKalle Valo 		rxtid->progress = false;
1400bdcd8170SKalle Valo 		rxtid->timer_mon = false;
1401bdcd8170SKalle Valo 		skb_queue_head_init(&rxtid->q);
1402bdcd8170SKalle Valo 		spin_lock_init(&rxtid->lock);
1403bdcd8170SKalle Valo 	}
1404bdcd8170SKalle Valo 
1405bdcd8170SKalle Valo 	return p_aggr;
1406bdcd8170SKalle Valo }
1407bdcd8170SKalle Valo 
1408bdcd8170SKalle Valo void aggr_recv_delba_req_evt(struct ath6kl *ar, u8 tid)
1409bdcd8170SKalle Valo {
1410bdcd8170SKalle Valo 	struct aggr_info *p_aggr = ar->aggr_cntxt;
1411bdcd8170SKalle Valo 	struct rxtid *rxtid;
1412bdcd8170SKalle Valo 
1413bdcd8170SKalle Valo 	if (!p_aggr)
1414bdcd8170SKalle Valo 		return;
1415bdcd8170SKalle Valo 
1416bdcd8170SKalle Valo 	rxtid = &p_aggr->rx_tid[tid];
1417bdcd8170SKalle Valo 
1418bdcd8170SKalle Valo 	if (rxtid->aggr)
1419bdcd8170SKalle Valo 		aggr_delete_tid_state(p_aggr, tid);
1420bdcd8170SKalle Valo }
1421bdcd8170SKalle Valo 
1422bdcd8170SKalle Valo void aggr_reset_state(struct aggr_info *aggr_info)
1423bdcd8170SKalle Valo {
1424bdcd8170SKalle Valo 	u8 tid;
1425bdcd8170SKalle Valo 
1426bdcd8170SKalle Valo 	for (tid = 0; tid < NUM_OF_TIDS; tid++)
1427bdcd8170SKalle Valo 		aggr_delete_tid_state(aggr_info, tid);
1428bdcd8170SKalle Valo }
1429bdcd8170SKalle Valo 
1430bdcd8170SKalle Valo /* clean up our amsdu buffer list */
1431bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar)
1432bdcd8170SKalle Valo {
1433bdcd8170SKalle Valo 	struct htc_packet *packet, *tmp_pkt;
1434bdcd8170SKalle Valo 
1435bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
1436bdcd8170SKalle Valo 	if (list_empty(&ar->amsdu_rx_buffer_queue)) {
1437bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
1438bdcd8170SKalle Valo 		return;
1439bdcd8170SKalle Valo 	}
1440bdcd8170SKalle Valo 
1441bdcd8170SKalle Valo 	list_for_each_entry_safe(packet, tmp_pkt, &ar->amsdu_rx_buffer_queue,
1442bdcd8170SKalle Valo 				 list) {
1443bdcd8170SKalle Valo 		list_del(&packet->list);
1444bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
1445bdcd8170SKalle Valo 		dev_kfree_skb(packet->pkt_cntxt);
1446bdcd8170SKalle Valo 		spin_lock_bh(&ar->lock);
1447bdcd8170SKalle Valo 	}
1448bdcd8170SKalle Valo 
1449bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
1450bdcd8170SKalle Valo }
1451bdcd8170SKalle Valo 
1452bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info)
1453bdcd8170SKalle Valo {
1454bdcd8170SKalle Valo 	struct rxtid *rxtid;
1455bdcd8170SKalle Valo 	u8 i, k;
1456bdcd8170SKalle Valo 
1457bdcd8170SKalle Valo 	if (!aggr_info)
1458bdcd8170SKalle Valo 		return;
1459bdcd8170SKalle Valo 
1460bdcd8170SKalle Valo 	if (aggr_info->timer_scheduled) {
1461bdcd8170SKalle Valo 		del_timer(&aggr_info->timer);
1462bdcd8170SKalle Valo 		aggr_info->timer_scheduled = false;
1463bdcd8170SKalle Valo 	}
1464bdcd8170SKalle Valo 
1465bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
1466bdcd8170SKalle Valo 		rxtid = &aggr_info->rx_tid[i];
1467bdcd8170SKalle Valo 		if (rxtid->hold_q) {
1468bdcd8170SKalle Valo 			for (k = 0; k < rxtid->hold_q_sz; k++)
1469bdcd8170SKalle Valo 				dev_kfree_skb(rxtid->hold_q[k].skb);
1470bdcd8170SKalle Valo 			kfree(rxtid->hold_q);
1471bdcd8170SKalle Valo 		}
1472bdcd8170SKalle Valo 
1473bdcd8170SKalle Valo 		skb_queue_purge(&rxtid->q);
1474bdcd8170SKalle Valo 	}
1475bdcd8170SKalle Valo 
1476bdcd8170SKalle Valo 	skb_queue_purge(&aggr_info->free_q);
1477bdcd8170SKalle Valo 	kfree(aggr_info);
1478bdcd8170SKalle Valo }
1479