1bdcd8170SKalle Valo /*
2bdcd8170SKalle Valo  * Copyright (c) 2004-2011 Atheros Communications Inc.
31b2df407SVasanthakumar Thiagarajan  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
4bdcd8170SKalle Valo  *
5bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
6bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
7bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
8bdcd8170SKalle Valo  *
9bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16bdcd8170SKalle Valo  */
17bdcd8170SKalle Valo 
18516304b0SJoe Perches #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19516304b0SJoe Perches 
20bdcd8170SKalle Valo #include "core.h"
21bdcd8170SKalle Valo #include "debug.h"
22e76ac2bfSKalle Valo #include "htc-ops.h"
23bdcd8170SKalle Valo 
243fdc0991SVasanthakumar Thiagarajan /*
253fdc0991SVasanthakumar Thiagarajan  * tid - tid_mux0..tid_mux3
263fdc0991SVasanthakumar Thiagarajan  * aid - tid_mux4..tid_mux7
273fdc0991SVasanthakumar Thiagarajan  */
283fdc0991SVasanthakumar Thiagarajan #define ATH6KL_TID_MASK 0xf
291d2a4456SVasanthakumar Thiagarajan #define ATH6KL_AID_SHIFT 4
303fdc0991SVasanthakumar Thiagarajan 
313fdc0991SVasanthakumar Thiagarajan static inline u8 ath6kl_get_tid(u8 tid_mux)
323fdc0991SVasanthakumar Thiagarajan {
333fdc0991SVasanthakumar Thiagarajan 	return tid_mux & ATH6KL_TID_MASK;
343fdc0991SVasanthakumar Thiagarajan }
353fdc0991SVasanthakumar Thiagarajan 
361d2a4456SVasanthakumar Thiagarajan static inline u8 ath6kl_get_aid(u8 tid_mux)
371d2a4456SVasanthakumar Thiagarajan {
381d2a4456SVasanthakumar Thiagarajan 	return tid_mux >> ATH6KL_AID_SHIFT;
391d2a4456SVasanthakumar Thiagarajan }
401d2a4456SVasanthakumar Thiagarajan 
41bdcd8170SKalle Valo static u8 ath6kl_ibss_map_epid(struct sk_buff *skb, struct net_device *dev,
42bdcd8170SKalle Valo 			       u32 *map_no)
43bdcd8170SKalle Valo {
44bdcd8170SKalle Valo 	struct ath6kl *ar = ath6kl_priv(dev);
45bdcd8170SKalle Valo 	struct ethhdr *eth_hdr;
46bdcd8170SKalle Valo 	u32 i, ep_map = -1;
47bdcd8170SKalle Valo 	u8 *datap;
48bdcd8170SKalle Valo 
49bdcd8170SKalle Valo 	*map_no = 0;
50bdcd8170SKalle Valo 	datap = skb->data;
51bdcd8170SKalle Valo 	eth_hdr = (struct ethhdr *) (datap + sizeof(struct wmi_data_hdr));
52bdcd8170SKalle Valo 
53bdcd8170SKalle Valo 	if (is_multicast_ether_addr(eth_hdr->h_dest))
54bdcd8170SKalle Valo 		return ENDPOINT_2;
55bdcd8170SKalle Valo 
56bdcd8170SKalle Valo 	for (i = 0; i < ar->node_num; i++) {
57bdcd8170SKalle Valo 		if (memcmp(eth_hdr->h_dest, ar->node_map[i].mac_addr,
58bdcd8170SKalle Valo 			   ETH_ALEN) == 0) {
59bdcd8170SKalle Valo 			*map_no = i + 1;
60bdcd8170SKalle Valo 			ar->node_map[i].tx_pend++;
61bdcd8170SKalle Valo 			return ar->node_map[i].ep_id;
62bdcd8170SKalle Valo 		}
63bdcd8170SKalle Valo 
64bdcd8170SKalle Valo 		if ((ep_map == -1) && !ar->node_map[i].tx_pend)
65bdcd8170SKalle Valo 			ep_map = i;
66bdcd8170SKalle Valo 	}
67bdcd8170SKalle Valo 
68bdcd8170SKalle Valo 	if (ep_map == -1) {
69bdcd8170SKalle Valo 		ep_map = ar->node_num;
70bdcd8170SKalle Valo 		ar->node_num++;
71bdcd8170SKalle Valo 		if (ar->node_num > MAX_NODE_NUM)
72bdcd8170SKalle Valo 			return ENDPOINT_UNUSED;
73bdcd8170SKalle Valo 	}
74bdcd8170SKalle Valo 
75bdcd8170SKalle Valo 	memcpy(ar->node_map[ep_map].mac_addr, eth_hdr->h_dest, ETH_ALEN);
76bdcd8170SKalle Valo 
77bdcd8170SKalle Valo 	for (i = ENDPOINT_2; i <= ENDPOINT_5; i++) {
78bdcd8170SKalle Valo 		if (!ar->tx_pending[i]) {
79bdcd8170SKalle Valo 			ar->node_map[ep_map].ep_id = i;
80bdcd8170SKalle Valo 			break;
81bdcd8170SKalle Valo 		}
82bdcd8170SKalle Valo 
83bdcd8170SKalle Valo 		/*
84bdcd8170SKalle Valo 		 * No free endpoint is available, start redistribution on
85bdcd8170SKalle Valo 		 * the inuse endpoints.
86bdcd8170SKalle Valo 		 */
87bdcd8170SKalle Valo 		if (i == ENDPOINT_5) {
88bdcd8170SKalle Valo 			ar->node_map[ep_map].ep_id = ar->next_ep_id;
89bdcd8170SKalle Valo 			ar->next_ep_id++;
90bdcd8170SKalle Valo 			if (ar->next_ep_id > ENDPOINT_5)
91bdcd8170SKalle Valo 				ar->next_ep_id = ENDPOINT_2;
92bdcd8170SKalle Valo 		}
93bdcd8170SKalle Valo 	}
94bdcd8170SKalle Valo 
95bdcd8170SKalle Valo 	*map_no = ep_map + 1;
96bdcd8170SKalle Valo 	ar->node_map[ep_map].tx_pend++;
97bdcd8170SKalle Valo 
98bdcd8170SKalle Valo 	return ar->node_map[ep_map].ep_id;
99bdcd8170SKalle Valo }
100bdcd8170SKalle Valo 
101c1762a3fSThirumalai Pachamuthu static bool ath6kl_process_uapsdq(struct ath6kl_sta *conn,
102c1762a3fSThirumalai Pachamuthu 				struct ath6kl_vif *vif,
103c1762a3fSThirumalai Pachamuthu 				struct sk_buff *skb,
104c1762a3fSThirumalai Pachamuthu 				u32 *flags)
105c1762a3fSThirumalai Pachamuthu {
106c1762a3fSThirumalai Pachamuthu 	struct ath6kl *ar = vif->ar;
107c1762a3fSThirumalai Pachamuthu 	bool is_apsdq_empty = false;
108c1762a3fSThirumalai Pachamuthu 	struct ethhdr *datap = (struct ethhdr *) skb->data;
109e5726028SKalle Valo 	u8 up = 0, traffic_class, *ip_hdr;
110c1762a3fSThirumalai Pachamuthu 	u16 ether_type;
111c1762a3fSThirumalai Pachamuthu 	struct ath6kl_llc_snap_hdr *llc_hdr;
112c1762a3fSThirumalai Pachamuthu 
113c1762a3fSThirumalai Pachamuthu 	if (conn->sta_flags & STA_PS_APSD_TRIGGER) {
114c1762a3fSThirumalai Pachamuthu 		/*
115c1762a3fSThirumalai Pachamuthu 		 * This tx is because of a uAPSD trigger, determine
116c1762a3fSThirumalai Pachamuthu 		 * more and EOSP bit. Set EOSP if queue is empty
117c1762a3fSThirumalai Pachamuthu 		 * or sufficient frames are delivered for this trigger.
118c1762a3fSThirumalai Pachamuthu 		 */
119c1762a3fSThirumalai Pachamuthu 		spin_lock_bh(&conn->psq_lock);
120c1762a3fSThirumalai Pachamuthu 		if (!skb_queue_empty(&conn->apsdq))
121c1762a3fSThirumalai Pachamuthu 			*flags |= WMI_DATA_HDR_FLAGS_MORE;
122c1762a3fSThirumalai Pachamuthu 		else if (conn->sta_flags & STA_PS_APSD_EOSP)
123c1762a3fSThirumalai Pachamuthu 			*flags |= WMI_DATA_HDR_FLAGS_EOSP;
124c1762a3fSThirumalai Pachamuthu 		*flags |= WMI_DATA_HDR_FLAGS_UAPSD;
125c1762a3fSThirumalai Pachamuthu 		spin_unlock_bh(&conn->psq_lock);
126c1762a3fSThirumalai Pachamuthu 		return false;
127c1762a3fSThirumalai Pachamuthu 	} else if (!conn->apsd_info)
128c1762a3fSThirumalai Pachamuthu 		return false;
129c1762a3fSThirumalai Pachamuthu 
130c1762a3fSThirumalai Pachamuthu 	if (test_bit(WMM_ENABLED, &vif->flags)) {
131c1762a3fSThirumalai Pachamuthu 		ether_type = be16_to_cpu(datap->h_proto);
132c1762a3fSThirumalai Pachamuthu 		if (is_ethertype(ether_type)) {
133c1762a3fSThirumalai Pachamuthu 			/* packet is in DIX format  */
134c1762a3fSThirumalai Pachamuthu 			ip_hdr = (u8 *)(datap + 1);
135c1762a3fSThirumalai Pachamuthu 		} else {
136c1762a3fSThirumalai Pachamuthu 			/* packet is in 802.3 format */
137c1762a3fSThirumalai Pachamuthu 			llc_hdr = (struct ath6kl_llc_snap_hdr *)
138c1762a3fSThirumalai Pachamuthu 							(datap + 1);
139c1762a3fSThirumalai Pachamuthu 			ether_type = be16_to_cpu(llc_hdr->eth_type);
140c1762a3fSThirumalai Pachamuthu 			ip_hdr = (u8 *)(llc_hdr + 1);
141c1762a3fSThirumalai Pachamuthu 		}
142c1762a3fSThirumalai Pachamuthu 
143c1762a3fSThirumalai Pachamuthu 		if (ether_type == IP_ETHERTYPE)
144c1762a3fSThirumalai Pachamuthu 			up = ath6kl_wmi_determine_user_priority(
145c1762a3fSThirumalai Pachamuthu 							ip_hdr, 0);
146c1762a3fSThirumalai Pachamuthu 	}
147c1762a3fSThirumalai Pachamuthu 
148c1762a3fSThirumalai Pachamuthu 	traffic_class = ath6kl_wmi_get_traffic_class(up);
149c1762a3fSThirumalai Pachamuthu 
150c1762a3fSThirumalai Pachamuthu 	if ((conn->apsd_info & (1 << traffic_class)) == 0)
151c1762a3fSThirumalai Pachamuthu 		return false;
152c1762a3fSThirumalai Pachamuthu 
153c1762a3fSThirumalai Pachamuthu 	/* Queue the frames if the STA is sleeping */
154c1762a3fSThirumalai Pachamuthu 	spin_lock_bh(&conn->psq_lock);
155c1762a3fSThirumalai Pachamuthu 	is_apsdq_empty = skb_queue_empty(&conn->apsdq);
156c1762a3fSThirumalai Pachamuthu 	skb_queue_tail(&conn->apsdq, skb);
157c1762a3fSThirumalai Pachamuthu 	spin_unlock_bh(&conn->psq_lock);
158c1762a3fSThirumalai Pachamuthu 
159c1762a3fSThirumalai Pachamuthu 	/*
160c1762a3fSThirumalai Pachamuthu 	 * If this is the first pkt getting queued
161c1762a3fSThirumalai Pachamuthu 	 * for this STA, update the PVB for this STA
162c1762a3fSThirumalai Pachamuthu 	 */
163c1762a3fSThirumalai Pachamuthu 	if (is_apsdq_empty) {
164c1762a3fSThirumalai Pachamuthu 		ath6kl_wmi_set_apsd_bfrd_traf(ar->wmi,
165c1762a3fSThirumalai Pachamuthu 					      vif->fw_vif_idx,
166c1762a3fSThirumalai Pachamuthu 					      conn->aid, 1, 0);
167c1762a3fSThirumalai Pachamuthu 	}
168c1762a3fSThirumalai Pachamuthu 	*flags |= WMI_DATA_HDR_FLAGS_UAPSD;
169c1762a3fSThirumalai Pachamuthu 
170c1762a3fSThirumalai Pachamuthu 	return true;
171c1762a3fSThirumalai Pachamuthu }
172c1762a3fSThirumalai Pachamuthu 
173c1762a3fSThirumalai Pachamuthu static bool ath6kl_process_psq(struct ath6kl_sta *conn,
174c1762a3fSThirumalai Pachamuthu 				struct ath6kl_vif *vif,
175c1762a3fSThirumalai Pachamuthu 				struct sk_buff *skb,
176c1762a3fSThirumalai Pachamuthu 				u32 *flags)
177c1762a3fSThirumalai Pachamuthu {
178c1762a3fSThirumalai Pachamuthu 	bool is_psq_empty = false;
179c1762a3fSThirumalai Pachamuthu 	struct ath6kl *ar = vif->ar;
180c1762a3fSThirumalai Pachamuthu 
181c1762a3fSThirumalai Pachamuthu 	if (conn->sta_flags & STA_PS_POLLED) {
182c1762a3fSThirumalai Pachamuthu 		spin_lock_bh(&conn->psq_lock);
183c1762a3fSThirumalai Pachamuthu 		if (!skb_queue_empty(&conn->psq))
184c1762a3fSThirumalai Pachamuthu 			*flags |= WMI_DATA_HDR_FLAGS_MORE;
185c1762a3fSThirumalai Pachamuthu 		spin_unlock_bh(&conn->psq_lock);
186c1762a3fSThirumalai Pachamuthu 		return false;
187c1762a3fSThirumalai Pachamuthu 	}
188c1762a3fSThirumalai Pachamuthu 
189c1762a3fSThirumalai Pachamuthu 	/* Queue the frames if the STA is sleeping */
190c1762a3fSThirumalai Pachamuthu 	spin_lock_bh(&conn->psq_lock);
191c1762a3fSThirumalai Pachamuthu 	is_psq_empty = skb_queue_empty(&conn->psq);
192c1762a3fSThirumalai Pachamuthu 	skb_queue_tail(&conn->psq, skb);
193c1762a3fSThirumalai Pachamuthu 	spin_unlock_bh(&conn->psq_lock);
194c1762a3fSThirumalai Pachamuthu 
195c1762a3fSThirumalai Pachamuthu 	/*
196c1762a3fSThirumalai Pachamuthu 	 * If this is the first pkt getting queued
197c1762a3fSThirumalai Pachamuthu 	 * for this STA, update the PVB for this
198c1762a3fSThirumalai Pachamuthu 	 * STA.
199c1762a3fSThirumalai Pachamuthu 	 */
200c1762a3fSThirumalai Pachamuthu 	if (is_psq_empty)
201c1762a3fSThirumalai Pachamuthu 		ath6kl_wmi_set_pvb_cmd(ar->wmi,
202c1762a3fSThirumalai Pachamuthu 				       vif->fw_vif_idx,
203c1762a3fSThirumalai Pachamuthu 				       conn->aid, 1);
204c1762a3fSThirumalai Pachamuthu 	return true;
205c1762a3fSThirumalai Pachamuthu }
206c1762a3fSThirumalai Pachamuthu 
2076765d0aaSVasanthakumar Thiagarajan static bool ath6kl_powersave_ap(struct ath6kl_vif *vif, struct sk_buff *skb,
208c1762a3fSThirumalai Pachamuthu 				u32 *flags)
209bdcd8170SKalle Valo {
210bdcd8170SKalle Valo 	struct ethhdr *datap = (struct ethhdr *) skb->data;
211bdcd8170SKalle Valo 	struct ath6kl_sta *conn = NULL;
212c1762a3fSThirumalai Pachamuthu 	bool ps_queued = false;
2136765d0aaSVasanthakumar Thiagarajan 	struct ath6kl *ar = vif->ar;
214bdcd8170SKalle Valo 
215bdcd8170SKalle Valo 	if (is_multicast_ether_addr(datap->h_dest)) {
216bdcd8170SKalle Valo 		u8 ctr = 0;
217bdcd8170SKalle Valo 		bool q_mcast = false;
218bdcd8170SKalle Valo 
219bdcd8170SKalle Valo 		for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
220bdcd8170SKalle Valo 			if (ar->sta_list[ctr].sta_flags & STA_PS_SLEEP) {
221bdcd8170SKalle Valo 				q_mcast = true;
222bdcd8170SKalle Valo 				break;
223bdcd8170SKalle Valo 			}
224bdcd8170SKalle Valo 		}
225bdcd8170SKalle Valo 
226bdcd8170SKalle Valo 		if (q_mcast) {
227bdcd8170SKalle Valo 			/*
228bdcd8170SKalle Valo 			 * If this transmit is not because of a Dtim Expiry
229bdcd8170SKalle Valo 			 * q it.
230bdcd8170SKalle Valo 			 */
23159c98449SVasanthakumar Thiagarajan 			if (!test_bit(DTIM_EXPIRED, &vif->flags)) {
232bdcd8170SKalle Valo 				bool is_mcastq_empty = false;
233bdcd8170SKalle Valo 
234bdcd8170SKalle Valo 				spin_lock_bh(&ar->mcastpsq_lock);
235bdcd8170SKalle Valo 				is_mcastq_empty =
236bdcd8170SKalle Valo 					skb_queue_empty(&ar->mcastpsq);
237bdcd8170SKalle Valo 				skb_queue_tail(&ar->mcastpsq, skb);
238bdcd8170SKalle Valo 				spin_unlock_bh(&ar->mcastpsq_lock);
239bdcd8170SKalle Valo 
240bdcd8170SKalle Valo 				/*
241bdcd8170SKalle Valo 				 * If this is the first Mcast pkt getting
242bdcd8170SKalle Valo 				 * queued indicate to the target to set the
243bdcd8170SKalle Valo 				 * BitmapControl LSB of the TIM IE.
244bdcd8170SKalle Valo 				 */
245bdcd8170SKalle Valo 				if (is_mcastq_empty)
246bdcd8170SKalle Valo 					ath6kl_wmi_set_pvb_cmd(ar->wmi,
247334234b5SVasanthakumar Thiagarajan 							       vif->fw_vif_idx,
248bdcd8170SKalle Valo 							       MCAST_AID, 1);
249bdcd8170SKalle Valo 
250bdcd8170SKalle Valo 				ps_queued = true;
251bdcd8170SKalle Valo 			} else {
252bdcd8170SKalle Valo 				/*
253bdcd8170SKalle Valo 				 * This transmit is because of Dtim expiry.
254bdcd8170SKalle Valo 				 * Determine if MoreData bit has to be set.
255bdcd8170SKalle Valo 				 */
256bdcd8170SKalle Valo 				spin_lock_bh(&ar->mcastpsq_lock);
257bdcd8170SKalle Valo 				if (!skb_queue_empty(&ar->mcastpsq))
258c1762a3fSThirumalai Pachamuthu 					*flags |= WMI_DATA_HDR_FLAGS_MORE;
259bdcd8170SKalle Valo 				spin_unlock_bh(&ar->mcastpsq_lock);
260bdcd8170SKalle Valo 			}
261bdcd8170SKalle Valo 		}
262bdcd8170SKalle Valo 	} else {
2636765d0aaSVasanthakumar Thiagarajan 		conn = ath6kl_find_sta(vif, datap->h_dest);
264bdcd8170SKalle Valo 		if (!conn) {
265bdcd8170SKalle Valo 			dev_kfree_skb(skb);
266bdcd8170SKalle Valo 
267bdcd8170SKalle Valo 			/* Inform the caller that the skb is consumed */
268bdcd8170SKalle Valo 			return true;
269bdcd8170SKalle Valo 		}
270bdcd8170SKalle Valo 
271bdcd8170SKalle Valo 		if (conn->sta_flags & STA_PS_SLEEP) {
272c1762a3fSThirumalai Pachamuthu 			ps_queued = ath6kl_process_uapsdq(conn,
273c1762a3fSThirumalai Pachamuthu 						vif, skb, flags);
274c1762a3fSThirumalai Pachamuthu 			if (!(*flags & WMI_DATA_HDR_FLAGS_UAPSD))
275c1762a3fSThirumalai Pachamuthu 				ps_queued = ath6kl_process_psq(conn,
276c1762a3fSThirumalai Pachamuthu 						vif, skb, flags);
277bdcd8170SKalle Valo 		}
278bdcd8170SKalle Valo 	}
279bdcd8170SKalle Valo 	return ps_queued;
280bdcd8170SKalle Valo }
281bdcd8170SKalle Valo 
282bdcd8170SKalle Valo /* Tx functions */
283bdcd8170SKalle Valo 
284bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb,
285bdcd8170SKalle Valo 		      enum htc_endpoint_id eid)
286bdcd8170SKalle Valo {
287bdcd8170SKalle Valo 	struct ath6kl *ar = devt;
288bdcd8170SKalle Valo 	int status = 0;
289bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie = NULL;
290bdcd8170SKalle Valo 
291390a8c8fSRaja Mani 	if (WARN_ON_ONCE(ar->state == ATH6KL_STATE_WOW))
292390a8c8fSRaja Mani 		return -EACCES;
293390a8c8fSRaja Mani 
294bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
295bdcd8170SKalle Valo 
296bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
297bdcd8170SKalle Valo 		   "%s: skb=0x%p, len=0x%x eid =%d\n", __func__,
298bdcd8170SKalle Valo 		   skb, skb->len, eid);
299bdcd8170SKalle Valo 
300bdcd8170SKalle Valo 	if (test_bit(WMI_CTRL_EP_FULL, &ar->flag) && (eid == ar->ctrl_ep)) {
301bdcd8170SKalle Valo 		/*
302bdcd8170SKalle Valo 		 * Control endpoint is full, don't allocate resources, we
303bdcd8170SKalle Valo 		 * are just going to drop this packet.
304bdcd8170SKalle Valo 		 */
305bdcd8170SKalle Valo 		cookie = NULL;
306bdcd8170SKalle Valo 		ath6kl_err("wmi ctrl ep full, dropping pkt : 0x%p, len:%d\n",
307bdcd8170SKalle Valo 			   skb, skb->len);
308bdcd8170SKalle Valo 	} else
309bdcd8170SKalle Valo 		cookie = ath6kl_alloc_cookie(ar);
310bdcd8170SKalle Valo 
311bdcd8170SKalle Valo 	if (cookie == NULL) {
312bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
313bdcd8170SKalle Valo 		status = -ENOMEM;
314bdcd8170SKalle Valo 		goto fail_ctrl_tx;
315bdcd8170SKalle Valo 	}
316bdcd8170SKalle Valo 
317bdcd8170SKalle Valo 	ar->tx_pending[eid]++;
318bdcd8170SKalle Valo 
319bdcd8170SKalle Valo 	if (eid != ar->ctrl_ep)
320bdcd8170SKalle Valo 		ar->total_tx_data_pend++;
321bdcd8170SKalle Valo 
322bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
323bdcd8170SKalle Valo 
324bdcd8170SKalle Valo 	cookie->skb = skb;
325bdcd8170SKalle Valo 	cookie->map_no = 0;
326bdcd8170SKalle Valo 	set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
327bdcd8170SKalle Valo 			 eid, ATH6KL_CONTROL_PKT_TAG);
328cfc10f24SKalle Valo 	cookie->htc_pkt.skb = skb;
329bdcd8170SKalle Valo 
330bdcd8170SKalle Valo 	/*
331bdcd8170SKalle Valo 	 * This interface is asynchronous, if there is an error, cleanup
332bdcd8170SKalle Valo 	 * will happen in the TX completion callback.
333bdcd8170SKalle Valo 	 */
334ad226ec2SKalle Valo 	ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
335bdcd8170SKalle Valo 
336bdcd8170SKalle Valo 	return 0;
337bdcd8170SKalle Valo 
338bdcd8170SKalle Valo fail_ctrl_tx:
339bdcd8170SKalle Valo 	dev_kfree_skb(skb);
340bdcd8170SKalle Valo 	return status;
341bdcd8170SKalle Valo }
342bdcd8170SKalle Valo 
343bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev)
344bdcd8170SKalle Valo {
345bdcd8170SKalle Valo 	struct ath6kl *ar = ath6kl_priv(dev);
346bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie = NULL;
347bdcd8170SKalle Valo 	enum htc_endpoint_id eid = ENDPOINT_UNUSED;
34859c98449SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif = netdev_priv(dev);
349bdcd8170SKalle Valo 	u32 map_no = 0;
350bdcd8170SKalle Valo 	u16 htc_tag = ATH6KL_DATA_PKT_TAG;
351bdcd8170SKalle Valo 	u8 ac = 99 ; /* initialize to unmapped ac */
352c1762a3fSThirumalai Pachamuthu 	bool chk_adhoc_ps_mapping = false;
353bdcd8170SKalle Valo 	int ret;
354bc48ad31SRishi Panjwani 	struct wmi_tx_meta_v2 meta_v2;
355bc48ad31SRishi Panjwani 	void *meta;
356bc48ad31SRishi Panjwani 	u8 csum_start = 0, csum_dest = 0, csum = skb->ip_summed;
357bc48ad31SRishi Panjwani 	u8 meta_ver = 0;
358c1762a3fSThirumalai Pachamuthu 	u32 flags = 0;
359bdcd8170SKalle Valo 
360bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
361bdcd8170SKalle Valo 		   "%s: skb=0x%p, data=0x%p, len=0x%x\n", __func__,
362bdcd8170SKalle Valo 		   skb, skb->data, skb->len);
363bdcd8170SKalle Valo 
364bdcd8170SKalle Valo 	/* If target is not associated */
3651881ced5SVasanthakumar Thiagarajan 	if (!test_bit(CONNECTED, &vif->flags))
3661881ced5SVasanthakumar Thiagarajan 		goto fail_tx;
367bdcd8170SKalle Valo 
3681881ced5SVasanthakumar Thiagarajan 	if (WARN_ON_ONCE(ar->state != ATH6KL_STATE_ON))
3691881ced5SVasanthakumar Thiagarajan 		goto fail_tx;
370390a8c8fSRaja Mani 
371bdcd8170SKalle Valo 	if (!test_bit(WMI_READY, &ar->flag))
372bdcd8170SKalle Valo 		goto fail_tx;
373bdcd8170SKalle Valo 
374bdcd8170SKalle Valo 	/* AP mode Power saving processing */
375f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
376c1762a3fSThirumalai Pachamuthu 		if (ath6kl_powersave_ap(vif, skb, &flags))
377bdcd8170SKalle Valo 			return 0;
378bdcd8170SKalle Valo 	}
379bdcd8170SKalle Valo 
380bdcd8170SKalle Valo 	if (test_bit(WMI_ENABLED, &ar->flag)) {
381bc48ad31SRishi Panjwani 		if ((dev->features & NETIF_F_IP_CSUM) &&
382bc48ad31SRishi Panjwani 		    (csum == CHECKSUM_PARTIAL)) {
383bc48ad31SRishi Panjwani 			csum_start = skb->csum_start -
384bc48ad31SRishi Panjwani 					(skb_network_header(skb) - skb->head) +
385bc48ad31SRishi Panjwani 					sizeof(struct ath6kl_llc_snap_hdr);
386bc48ad31SRishi Panjwani 			csum_dest = skb->csum_offset + csum_start;
387bc48ad31SRishi Panjwani 		}
388bc48ad31SRishi Panjwani 
389bdcd8170SKalle Valo 		if (skb_headroom(skb) < dev->needed_headroom) {
390a29517ceSVasanthakumar Thiagarajan 			struct sk_buff *tmp_skb = skb;
391a29517ceSVasanthakumar Thiagarajan 
392a29517ceSVasanthakumar Thiagarajan 			skb = skb_realloc_headroom(skb, dev->needed_headroom);
393a29517ceSVasanthakumar Thiagarajan 			kfree_skb(tmp_skb);
394a29517ceSVasanthakumar Thiagarajan 			if (skb == NULL) {
395a29517ceSVasanthakumar Thiagarajan 				vif->net_stats.tx_dropped++;
396a29517ceSVasanthakumar Thiagarajan 				return 0;
397a29517ceSVasanthakumar Thiagarajan 			}
398bdcd8170SKalle Valo 		}
399bdcd8170SKalle Valo 
400bdcd8170SKalle Valo 		if (ath6kl_wmi_dix_2_dot3(ar->wmi, skb)) {
401bdcd8170SKalle Valo 			ath6kl_err("ath6kl_wmi_dix_2_dot3 failed\n");
402bdcd8170SKalle Valo 			goto fail_tx;
403bdcd8170SKalle Valo 		}
404bdcd8170SKalle Valo 
405bc48ad31SRishi Panjwani 		if ((dev->features & NETIF_F_IP_CSUM) &&
406bc48ad31SRishi Panjwani 		    (csum == CHECKSUM_PARTIAL)) {
407bc48ad31SRishi Panjwani 			meta_v2.csum_start = csum_start;
408bc48ad31SRishi Panjwani 			meta_v2.csum_dest = csum_dest;
409bc48ad31SRishi Panjwani 
410bc48ad31SRishi Panjwani 			/* instruct target to calculate checksum */
411bc48ad31SRishi Panjwani 			meta_v2.csum_flags = WMI_META_V2_FLAG_CSUM_OFFLOAD;
412bc48ad31SRishi Panjwani 			meta_ver = WMI_META_VERSION_2;
413bc48ad31SRishi Panjwani 			meta = &meta_v2;
414bc48ad31SRishi Panjwani 		} else {
415bc48ad31SRishi Panjwani 			meta_ver = 0;
416bc48ad31SRishi Panjwani 			meta = NULL;
417bc48ad31SRishi Panjwani 		}
418bc48ad31SRishi Panjwani 
419bc48ad31SRishi Panjwani 		ret = ath6kl_wmi_data_hdr_add(ar->wmi, skb,
420c1762a3fSThirumalai Pachamuthu 				DATA_MSGTYPE, flags, 0,
421bc48ad31SRishi Panjwani 				meta_ver,
422bc48ad31SRishi Panjwani 				meta, vif->fw_vif_idx);
423bc48ad31SRishi Panjwani 
424bc48ad31SRishi Panjwani 		if (ret) {
425bc48ad31SRishi Panjwani 			ath6kl_warn("failed to add wmi data header:%d\n"
426bc48ad31SRishi Panjwani 				, ret);
427bdcd8170SKalle Valo 			goto fail_tx;
428bdcd8170SKalle Valo 		}
429bdcd8170SKalle Valo 
430f5938f24SVasanthakumar Thiagarajan 		if ((vif->nw_type == ADHOC_NETWORK) &&
43159c98449SVasanthakumar Thiagarajan 		    ar->ibss_ps_enable && test_bit(CONNECTED, &vif->flags))
432bdcd8170SKalle Valo 			chk_adhoc_ps_mapping = true;
433bdcd8170SKalle Valo 		else {
434bdcd8170SKalle Valo 			/* get the stream mapping */
435240d2799SVasanthakumar Thiagarajan 			ret = ath6kl_wmi_implicit_create_pstream(ar->wmi,
436240d2799SVasanthakumar Thiagarajan 				    vif->fw_vif_idx, skb,
43759c98449SVasanthakumar Thiagarajan 				    0, test_bit(WMM_ENABLED, &vif->flags), &ac);
438bdcd8170SKalle Valo 			if (ret)
439bdcd8170SKalle Valo 				goto fail_tx;
440bdcd8170SKalle Valo 		}
441bdcd8170SKalle Valo 	} else
442bdcd8170SKalle Valo 		goto fail_tx;
443bdcd8170SKalle Valo 
444bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
445bdcd8170SKalle Valo 
446bdcd8170SKalle Valo 	if (chk_adhoc_ps_mapping)
447bdcd8170SKalle Valo 		eid = ath6kl_ibss_map_epid(skb, dev, &map_no);
448bdcd8170SKalle Valo 	else
449bdcd8170SKalle Valo 		eid = ar->ac2ep_map[ac];
450bdcd8170SKalle Valo 
451bdcd8170SKalle Valo 	if (eid == 0 || eid == ENDPOINT_UNUSED) {
452bdcd8170SKalle Valo 		ath6kl_err("eid %d is not mapped!\n", eid);
453bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
454bdcd8170SKalle Valo 		goto fail_tx;
455bdcd8170SKalle Valo 	}
456bdcd8170SKalle Valo 
457bdcd8170SKalle Valo 	/* allocate resource for this packet */
458bdcd8170SKalle Valo 	cookie = ath6kl_alloc_cookie(ar);
459bdcd8170SKalle Valo 
460bdcd8170SKalle Valo 	if (!cookie) {
461bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
462bdcd8170SKalle Valo 		goto fail_tx;
463bdcd8170SKalle Valo 	}
464bdcd8170SKalle Valo 
465bdcd8170SKalle Valo 	/* update counts while the lock is held */
466bdcd8170SKalle Valo 	ar->tx_pending[eid]++;
467bdcd8170SKalle Valo 	ar->total_tx_data_pend++;
468bdcd8170SKalle Valo 
469bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
470bdcd8170SKalle Valo 
47100b1edf1SJouni Malinen 	if (!IS_ALIGNED((unsigned long) skb->data - HTC_HDR_LENGTH, 4) &&
47200b1edf1SJouni Malinen 	    skb_cloned(skb)) {
47300b1edf1SJouni Malinen 		/*
47400b1edf1SJouni Malinen 		 * We will touch (move the buffer data to align it. Since the
47500b1edf1SJouni Malinen 		 * skb buffer is cloned and not only the header is changed, we
47600b1edf1SJouni Malinen 		 * have to copy it to allow the changes. Since we are copying
47700b1edf1SJouni Malinen 		 * the data here, we may as well align it by reserving suitable
47800b1edf1SJouni Malinen 		 * headroom to avoid the memmove in ath6kl_htc_tx_buf_align().
47900b1edf1SJouni Malinen 		 */
48000b1edf1SJouni Malinen 		struct sk_buff *nskb;
48100b1edf1SJouni Malinen 
48200b1edf1SJouni Malinen 		nskb = skb_copy_expand(skb, HTC_HDR_LENGTH, 0, GFP_ATOMIC);
48300b1edf1SJouni Malinen 		if (nskb == NULL)
48400b1edf1SJouni Malinen 			goto fail_tx;
48500b1edf1SJouni Malinen 		kfree_skb(skb);
48600b1edf1SJouni Malinen 		skb = nskb;
48700b1edf1SJouni Malinen 	}
48800b1edf1SJouni Malinen 
489bdcd8170SKalle Valo 	cookie->skb = skb;
490bdcd8170SKalle Valo 	cookie->map_no = map_no;
491bdcd8170SKalle Valo 	set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
492bdcd8170SKalle Valo 			 eid, htc_tag);
493cfc10f24SKalle Valo 	cookie->htc_pkt.skb = skb;
494bdcd8170SKalle Valo 
495ef094103SKalle Valo 	ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "tx ",
496ef094103SKalle Valo 			skb->data, skb->len);
497bdcd8170SKalle Valo 
498bdcd8170SKalle Valo 	/*
499bdcd8170SKalle Valo 	 * HTC interface is asynchronous, if this fails, cleanup will
500bdcd8170SKalle Valo 	 * happen in the ath6kl_tx_complete callback.
501bdcd8170SKalle Valo 	 */
502ad226ec2SKalle Valo 	ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
503bdcd8170SKalle Valo 
504bdcd8170SKalle Valo 	return 0;
505bdcd8170SKalle Valo 
506bdcd8170SKalle Valo fail_tx:
507bdcd8170SKalle Valo 	dev_kfree_skb(skb);
508bdcd8170SKalle Valo 
509b95907a7SVasanthakumar Thiagarajan 	vif->net_stats.tx_dropped++;
510b95907a7SVasanthakumar Thiagarajan 	vif->net_stats.tx_aborted_errors++;
511bdcd8170SKalle Valo 
512bdcd8170SKalle Valo 	return 0;
513bdcd8170SKalle Valo }
514bdcd8170SKalle Valo 
515bdcd8170SKalle Valo /* indicate tx activity or inactivity on a WMI stream */
516bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active)
517bdcd8170SKalle Valo {
518bdcd8170SKalle Valo 	struct ath6kl *ar = devt;
519bdcd8170SKalle Valo 	enum htc_endpoint_id eid;
520bdcd8170SKalle Valo 	int i;
521bdcd8170SKalle Valo 
522bdcd8170SKalle Valo 	eid = ar->ac2ep_map[traffic_class];
523bdcd8170SKalle Valo 
524bdcd8170SKalle Valo 	if (!test_bit(WMI_ENABLED, &ar->flag))
525bdcd8170SKalle Valo 		goto notify_htc;
526bdcd8170SKalle Valo 
527bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
528bdcd8170SKalle Valo 
529bdcd8170SKalle Valo 	ar->ac_stream_active[traffic_class] = active;
530bdcd8170SKalle Valo 
531bdcd8170SKalle Valo 	if (active) {
532bdcd8170SKalle Valo 		/*
533bdcd8170SKalle Valo 		 * Keep track of the active stream with the highest
534bdcd8170SKalle Valo 		 * priority.
535bdcd8170SKalle Valo 		 */
536bdcd8170SKalle Valo 		if (ar->ac_stream_pri_map[traffic_class] >
537bdcd8170SKalle Valo 		    ar->hiac_stream_active_pri)
538bdcd8170SKalle Valo 			/* set the new highest active priority */
539bdcd8170SKalle Valo 			ar->hiac_stream_active_pri =
540bdcd8170SKalle Valo 					ar->ac_stream_pri_map[traffic_class];
541bdcd8170SKalle Valo 
542bdcd8170SKalle Valo 	} else {
543bdcd8170SKalle Valo 		/*
544bdcd8170SKalle Valo 		 * We may have to search for the next active stream
545bdcd8170SKalle Valo 		 * that is the highest priority.
546bdcd8170SKalle Valo 		 */
547bdcd8170SKalle Valo 		if (ar->hiac_stream_active_pri ==
548bdcd8170SKalle Valo 			ar->ac_stream_pri_map[traffic_class]) {
549bdcd8170SKalle Valo 			/*
550bdcd8170SKalle Valo 			 * The highest priority stream just went inactive
551bdcd8170SKalle Valo 			 * reset and search for the "next" highest "active"
552bdcd8170SKalle Valo 			 * priority stream.
553bdcd8170SKalle Valo 			 */
554bdcd8170SKalle Valo 			ar->hiac_stream_active_pri = 0;
555bdcd8170SKalle Valo 
556bdcd8170SKalle Valo 			for (i = 0; i < WMM_NUM_AC; i++) {
557bdcd8170SKalle Valo 				if (ar->ac_stream_active[i] &&
558bdcd8170SKalle Valo 				    (ar->ac_stream_pri_map[i] >
559bdcd8170SKalle Valo 				     ar->hiac_stream_active_pri))
560bdcd8170SKalle Valo 					/*
561bdcd8170SKalle Valo 					 * Set the new highest active
562bdcd8170SKalle Valo 					 * priority.
563bdcd8170SKalle Valo 					 */
564bdcd8170SKalle Valo 					ar->hiac_stream_active_pri =
565bdcd8170SKalle Valo 						ar->ac_stream_pri_map[i];
566bdcd8170SKalle Valo 			}
567bdcd8170SKalle Valo 		}
568bdcd8170SKalle Valo 	}
569bdcd8170SKalle Valo 
570bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
571bdcd8170SKalle Valo 
572bdcd8170SKalle Valo notify_htc:
573bdcd8170SKalle Valo 	/* notify HTC, this may cause credit distribution changes */
574e76ac2bfSKalle Valo 	ath6kl_htc_activity_changed(ar->htc_target, eid, active);
575bdcd8170SKalle Valo }
576bdcd8170SKalle Valo 
577bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
578bdcd8170SKalle Valo 					       struct htc_packet *packet)
579bdcd8170SKalle Valo {
580bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
581990bd915SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif;
582bdcd8170SKalle Valo 	enum htc_endpoint_id endpoint = packet->endpoint;
583990bd915SVasanthakumar Thiagarajan 	enum htc_send_full_action action = HTC_SEND_FULL_KEEP;
584bdcd8170SKalle Valo 
585bdcd8170SKalle Valo 	if (endpoint == ar->ctrl_ep) {
586bdcd8170SKalle Valo 		/*
587bdcd8170SKalle Valo 		 * Under normal WMI if this is getting full, then something
588bdcd8170SKalle Valo 		 * is running rampant the host should not be exhausting the
589bdcd8170SKalle Valo 		 * WMI queue with too many commands the only exception to
590bdcd8170SKalle Valo 		 * this is during testing using endpointping.
591bdcd8170SKalle Valo 		 */
592bdcd8170SKalle Valo 		set_bit(WMI_CTRL_EP_FULL, &ar->flag);
593bdcd8170SKalle Valo 		ath6kl_err("wmi ctrl ep is full\n");
594901db39cSVasanthakumar Thiagarajan 		return action;
595bdcd8170SKalle Valo 	}
596bdcd8170SKalle Valo 
597bdcd8170SKalle Valo 	if (packet->info.tx.tag == ATH6KL_CONTROL_PKT_TAG)
598901db39cSVasanthakumar Thiagarajan 		return action;
599bdcd8170SKalle Valo 
600bdcd8170SKalle Valo 	/*
601bdcd8170SKalle Valo 	 * The last MAX_HI_COOKIE_NUM "batch" of cookies are reserved for
602bdcd8170SKalle Valo 	 * the highest active stream.
603bdcd8170SKalle Valo 	 */
604bdcd8170SKalle Valo 	if (ar->ac_stream_pri_map[ar->ep2ac_map[endpoint]] <
605bdcd8170SKalle Valo 	    ar->hiac_stream_active_pri &&
6060ea10f2bSChilam Ng 	    ar->cookie_count <=
6070ea10f2bSChilam Ng 			target->endpoint[endpoint].tx_drop_packet_threshold)
608bdcd8170SKalle Valo 		/*
609bdcd8170SKalle Valo 		 * Give preference to the highest priority stream by
610bdcd8170SKalle Valo 		 * dropping the packets which overflowed.
611bdcd8170SKalle Valo 		 */
612990bd915SVasanthakumar Thiagarajan 		action = HTC_SEND_FULL_DROP;
613bdcd8170SKalle Valo 
614990bd915SVasanthakumar Thiagarajan 	/* FIXME: Locking */
61511f6e40dSVasanthakumar Thiagarajan 	spin_lock_bh(&ar->list_lock);
616990bd915SVasanthakumar Thiagarajan 	list_for_each_entry(vif, &ar->vif_list, list) {
617901db39cSVasanthakumar Thiagarajan 		if (vif->nw_type == ADHOC_NETWORK ||
618901db39cSVasanthakumar Thiagarajan 		    action != HTC_SEND_FULL_DROP) {
61911f6e40dSVasanthakumar Thiagarajan 			spin_unlock_bh(&ar->list_lock);
620990bd915SVasanthakumar Thiagarajan 
62159c98449SVasanthakumar Thiagarajan 			set_bit(NETQ_STOPPED, &vif->flags);
62228ae58ddSVasanthakumar Thiagarajan 			netif_stop_queue(vif->ndev);
623bdcd8170SKalle Valo 
624990bd915SVasanthakumar Thiagarajan 			return action;
625990bd915SVasanthakumar Thiagarajan 		}
626990bd915SVasanthakumar Thiagarajan 	}
62711f6e40dSVasanthakumar Thiagarajan 	spin_unlock_bh(&ar->list_lock);
628990bd915SVasanthakumar Thiagarajan 
629990bd915SVasanthakumar Thiagarajan 	return action;
630bdcd8170SKalle Valo }
631bdcd8170SKalle Valo 
632bdcd8170SKalle Valo /* TODO this needs to be looked at */
633990bd915SVasanthakumar Thiagarajan static void ath6kl_tx_clear_node_map(struct ath6kl_vif *vif,
634bdcd8170SKalle Valo 				     enum htc_endpoint_id eid, u32 map_no)
635bdcd8170SKalle Valo {
636990bd915SVasanthakumar Thiagarajan 	struct ath6kl *ar = vif->ar;
637bdcd8170SKalle Valo 	u32 i;
638bdcd8170SKalle Valo 
639f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type != ADHOC_NETWORK)
640bdcd8170SKalle Valo 		return;
641bdcd8170SKalle Valo 
642bdcd8170SKalle Valo 	if (!ar->ibss_ps_enable)
643bdcd8170SKalle Valo 		return;
644bdcd8170SKalle Valo 
645bdcd8170SKalle Valo 	if (eid == ar->ctrl_ep)
646bdcd8170SKalle Valo 		return;
647bdcd8170SKalle Valo 
648bdcd8170SKalle Valo 	if (map_no == 0)
649bdcd8170SKalle Valo 		return;
650bdcd8170SKalle Valo 
651bdcd8170SKalle Valo 	map_no--;
652bdcd8170SKalle Valo 	ar->node_map[map_no].tx_pend--;
653bdcd8170SKalle Valo 
654bdcd8170SKalle Valo 	if (ar->node_map[map_no].tx_pend)
655bdcd8170SKalle Valo 		return;
656bdcd8170SKalle Valo 
657bdcd8170SKalle Valo 	if (map_no != (ar->node_num - 1))
658bdcd8170SKalle Valo 		return;
659bdcd8170SKalle Valo 
660bdcd8170SKalle Valo 	for (i = ar->node_num; i > 0; i--) {
661bdcd8170SKalle Valo 		if (ar->node_map[i - 1].tx_pend)
662bdcd8170SKalle Valo 			break;
663bdcd8170SKalle Valo 
664bdcd8170SKalle Valo 		memset(&ar->node_map[i - 1], 0,
665bdcd8170SKalle Valo 		       sizeof(struct ath6kl_node_mapping));
666bdcd8170SKalle Valo 		ar->node_num--;
667bdcd8170SKalle Valo 	}
668bdcd8170SKalle Valo }
669bdcd8170SKalle Valo 
67063de1112SKalle Valo void ath6kl_tx_complete(struct htc_target *target,
67163de1112SKalle Valo 			struct list_head *packet_queue)
672bdcd8170SKalle Valo {
67363de1112SKalle Valo 	struct ath6kl *ar = target->dev->ar;
674bdcd8170SKalle Valo 	struct sk_buff_head skb_queue;
675bdcd8170SKalle Valo 	struct htc_packet *packet;
676bdcd8170SKalle Valo 	struct sk_buff *skb;
677bdcd8170SKalle Valo 	struct ath6kl_cookie *ath6kl_cookie;
678bdcd8170SKalle Valo 	u32 map_no = 0;
679bdcd8170SKalle Valo 	int status;
680bdcd8170SKalle Valo 	enum htc_endpoint_id eid;
681bdcd8170SKalle Valo 	bool wake_event = false;
68271f96ee6SKalle Valo 	bool flushing[ATH6KL_VIF_MAX] = {false};
6836765d0aaSVasanthakumar Thiagarajan 	u8 if_idx;
684990bd915SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif;
685bdcd8170SKalle Valo 
686bdcd8170SKalle Valo 	skb_queue_head_init(&skb_queue);
687bdcd8170SKalle Valo 
688bdcd8170SKalle Valo 	/* lock the driver as we update internal state */
689bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
690bdcd8170SKalle Valo 
691bdcd8170SKalle Valo 	/* reap completed packets */
692bdcd8170SKalle Valo 	while (!list_empty(packet_queue)) {
693bdcd8170SKalle Valo 
694bdcd8170SKalle Valo 		packet = list_first_entry(packet_queue, struct htc_packet,
695bdcd8170SKalle Valo 					  list);
696bdcd8170SKalle Valo 		list_del(&packet->list);
697bdcd8170SKalle Valo 
698bdcd8170SKalle Valo 		ath6kl_cookie = (struct ath6kl_cookie *)packet->pkt_cntxt;
699bdcd8170SKalle Valo 		if (!ath6kl_cookie)
700bdcd8170SKalle Valo 			goto fatal;
701bdcd8170SKalle Valo 
702bdcd8170SKalle Valo 		status = packet->status;
703bdcd8170SKalle Valo 		skb = ath6kl_cookie->skb;
704bdcd8170SKalle Valo 		eid = packet->endpoint;
705bdcd8170SKalle Valo 		map_no = ath6kl_cookie->map_no;
706bdcd8170SKalle Valo 
707bdcd8170SKalle Valo 		if (!skb || !skb->data)
708bdcd8170SKalle Valo 			goto fatal;
709bdcd8170SKalle Valo 
710bdcd8170SKalle Valo 		__skb_queue_tail(&skb_queue, skb);
711bdcd8170SKalle Valo 
712bdcd8170SKalle Valo 		if (!status && (packet->act_len != skb->len))
713bdcd8170SKalle Valo 			goto fatal;
714bdcd8170SKalle Valo 
715bdcd8170SKalle Valo 		ar->tx_pending[eid]--;
716bdcd8170SKalle Valo 
717bdcd8170SKalle Valo 		if (eid != ar->ctrl_ep)
718bdcd8170SKalle Valo 			ar->total_tx_data_pend--;
719bdcd8170SKalle Valo 
720bdcd8170SKalle Valo 		if (eid == ar->ctrl_ep) {
721bdcd8170SKalle Valo 			if (test_bit(WMI_CTRL_EP_FULL, &ar->flag))
722bdcd8170SKalle Valo 				clear_bit(WMI_CTRL_EP_FULL, &ar->flag);
723bdcd8170SKalle Valo 
724bdcd8170SKalle Valo 			if (ar->tx_pending[eid] == 0)
725bdcd8170SKalle Valo 				wake_event = true;
726bdcd8170SKalle Valo 		}
727bdcd8170SKalle Valo 
7286765d0aaSVasanthakumar Thiagarajan 		if (eid == ar->ctrl_ep) {
7296765d0aaSVasanthakumar Thiagarajan 			if_idx = wmi_cmd_hdr_get_if_idx(
730f3803eb2SVasanthakumar Thiagarajan 				(struct wmi_cmd_hdr *) packet->buf);
7316765d0aaSVasanthakumar Thiagarajan 		} else {
7326765d0aaSVasanthakumar Thiagarajan 			if_idx = wmi_data_hdr_get_if_idx(
733f3803eb2SVasanthakumar Thiagarajan 				(struct wmi_data_hdr *) packet->buf);
7346765d0aaSVasanthakumar Thiagarajan 		}
7356765d0aaSVasanthakumar Thiagarajan 
7366765d0aaSVasanthakumar Thiagarajan 		vif = ath6kl_get_vif_by_index(ar, if_idx);
7376765d0aaSVasanthakumar Thiagarajan 		if (!vif) {
7386765d0aaSVasanthakumar Thiagarajan 			ath6kl_free_cookie(ar, ath6kl_cookie);
7396765d0aaSVasanthakumar Thiagarajan 			continue;
7406765d0aaSVasanthakumar Thiagarajan 		}
7416765d0aaSVasanthakumar Thiagarajan 
742bdcd8170SKalle Valo 		if (status) {
743bdcd8170SKalle Valo 			if (status == -ECANCELED)
744bdcd8170SKalle Valo 				/* a packet was flushed  */
745990bd915SVasanthakumar Thiagarajan 				flushing[if_idx] = true;
746bdcd8170SKalle Valo 
747b95907a7SVasanthakumar Thiagarajan 			vif->net_stats.tx_errors++;
748bdcd8170SKalle Valo 
749778e6502SKalle Valo 			if (status != -ENOSPC && status != -ECANCELED)
750778e6502SKalle Valo 				ath6kl_warn("tx complete error: %d\n", status);
751778e6502SKalle Valo 
752bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
753bdcd8170SKalle Valo 				   "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
754bdcd8170SKalle Valo 				   __func__, skb, packet->buf, packet->act_len,
755bdcd8170SKalle Valo 				   eid, "error!");
756bdcd8170SKalle Valo 		} else {
757bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
758bdcd8170SKalle Valo 				   "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
759bdcd8170SKalle Valo 				   __func__, skb, packet->buf, packet->act_len,
760bdcd8170SKalle Valo 				   eid, "OK");
761bdcd8170SKalle Valo 
762990bd915SVasanthakumar Thiagarajan 			flushing[if_idx] = false;
763b95907a7SVasanthakumar Thiagarajan 			vif->net_stats.tx_packets++;
764b95907a7SVasanthakumar Thiagarajan 			vif->net_stats.tx_bytes += skb->len;
765bdcd8170SKalle Valo 		}
766bdcd8170SKalle Valo 
767990bd915SVasanthakumar Thiagarajan 		ath6kl_tx_clear_node_map(vif, eid, map_no);
768bdcd8170SKalle Valo 
769bdcd8170SKalle Valo 		ath6kl_free_cookie(ar, ath6kl_cookie);
770bdcd8170SKalle Valo 
77159c98449SVasanthakumar Thiagarajan 		if (test_bit(NETQ_STOPPED, &vif->flags))
77259c98449SVasanthakumar Thiagarajan 			clear_bit(NETQ_STOPPED, &vif->flags);
773bdcd8170SKalle Valo 	}
774bdcd8170SKalle Valo 
775bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
776bdcd8170SKalle Valo 
777bdcd8170SKalle Valo 	__skb_queue_purge(&skb_queue);
778bdcd8170SKalle Valo 
779990bd915SVasanthakumar Thiagarajan 	/* FIXME: Locking */
78011f6e40dSVasanthakumar Thiagarajan 	spin_lock_bh(&ar->list_lock);
781990bd915SVasanthakumar Thiagarajan 	list_for_each_entry(vif, &ar->vif_list, list) {
782990bd915SVasanthakumar Thiagarajan 		if (test_bit(CONNECTED, &vif->flags) &&
783990bd915SVasanthakumar Thiagarajan 		    !flushing[vif->fw_vif_idx]) {
78411f6e40dSVasanthakumar Thiagarajan 			spin_unlock_bh(&ar->list_lock);
78528ae58ddSVasanthakumar Thiagarajan 			netif_wake_queue(vif->ndev);
78611f6e40dSVasanthakumar Thiagarajan 			spin_lock_bh(&ar->list_lock);
787bdcd8170SKalle Valo 		}
788990bd915SVasanthakumar Thiagarajan 	}
78911f6e40dSVasanthakumar Thiagarajan 	spin_unlock_bh(&ar->list_lock);
790bdcd8170SKalle Valo 
791bdcd8170SKalle Valo 	if (wake_event)
792bdcd8170SKalle Valo 		wake_up(&ar->event_wq);
793bdcd8170SKalle Valo 
794bdcd8170SKalle Valo 	return;
795bdcd8170SKalle Valo 
796bdcd8170SKalle Valo fatal:
797bdcd8170SKalle Valo 	WARN_ON(1);
798bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
799bdcd8170SKalle Valo 	return;
800bdcd8170SKalle Valo }
801bdcd8170SKalle Valo 
802bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar)
803bdcd8170SKalle Valo {
804bdcd8170SKalle Valo 	int i;
805bdcd8170SKalle Valo 
806bdcd8170SKalle Valo 	/* flush all the data (non-control) streams */
807bdcd8170SKalle Valo 	for (i = 0; i < WMM_NUM_AC; i++)
808ad226ec2SKalle Valo 		ath6kl_htc_flush_txep(ar->htc_target, ar->ac2ep_map[i],
809bdcd8170SKalle Valo 				      ATH6KL_DATA_PKT_TAG);
810bdcd8170SKalle Valo }
811bdcd8170SKalle Valo 
812bdcd8170SKalle Valo /* Rx functions */
813bdcd8170SKalle Valo 
814bdcd8170SKalle Valo static void ath6kl_deliver_frames_to_nw_stack(struct net_device *dev,
815bdcd8170SKalle Valo 					      struct sk_buff *skb)
816bdcd8170SKalle Valo {
817bdcd8170SKalle Valo 	if (!skb)
818bdcd8170SKalle Valo 		return;
819bdcd8170SKalle Valo 
820bdcd8170SKalle Valo 	skb->dev = dev;
821bdcd8170SKalle Valo 
822bdcd8170SKalle Valo 	if (!(skb->dev->flags & IFF_UP)) {
823bdcd8170SKalle Valo 		dev_kfree_skb(skb);
824bdcd8170SKalle Valo 		return;
825bdcd8170SKalle Valo 	}
826bdcd8170SKalle Valo 
827bdcd8170SKalle Valo 	skb->protocol = eth_type_trans(skb, skb->dev);
828bdcd8170SKalle Valo 
829bdcd8170SKalle Valo 	netif_rx_ni(skb);
830bdcd8170SKalle Valo }
831bdcd8170SKalle Valo 
832bdcd8170SKalle Valo static void ath6kl_alloc_netbufs(struct sk_buff_head *q, u16 num)
833bdcd8170SKalle Valo {
834bdcd8170SKalle Valo 	struct sk_buff *skb;
835bdcd8170SKalle Valo 
836bdcd8170SKalle Valo 	while (num) {
837bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
838bdcd8170SKalle Valo 		if (!skb) {
839bdcd8170SKalle Valo 			ath6kl_err("netbuf allocation failed\n");
840bdcd8170SKalle Valo 			return;
841bdcd8170SKalle Valo 		}
842bdcd8170SKalle Valo 		skb_queue_tail(q, skb);
843bdcd8170SKalle Valo 		num--;
844bdcd8170SKalle Valo 	}
845bdcd8170SKalle Valo }
846bdcd8170SKalle Valo 
847bdcd8170SKalle Valo static struct sk_buff *aggr_get_free_skb(struct aggr_info *p_aggr)
848bdcd8170SKalle Valo {
849bdcd8170SKalle Valo 	struct sk_buff *skb = NULL;
850bdcd8170SKalle Valo 
8517baef812SVasanthakumar Thiagarajan 	if (skb_queue_len(&p_aggr->rx_amsdu_freeq) <
8527baef812SVasanthakumar Thiagarajan 	    (AGGR_NUM_OF_FREE_NETBUFS >> 2))
8537baef812SVasanthakumar Thiagarajan 		ath6kl_alloc_netbufs(&p_aggr->rx_amsdu_freeq,
8547baef812SVasanthakumar Thiagarajan 				     AGGR_NUM_OF_FREE_NETBUFS);
855bdcd8170SKalle Valo 
8567baef812SVasanthakumar Thiagarajan 	skb = skb_dequeue(&p_aggr->rx_amsdu_freeq);
857bdcd8170SKalle Valo 
858bdcd8170SKalle Valo 	return skb;
859bdcd8170SKalle Valo }
860bdcd8170SKalle Valo 
861bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target, enum htc_endpoint_id endpoint)
862bdcd8170SKalle Valo {
863bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
864bdcd8170SKalle Valo 	struct sk_buff *skb;
865bdcd8170SKalle Valo 	int rx_buf;
866bdcd8170SKalle Valo 	int n_buf_refill;
867bdcd8170SKalle Valo 	struct htc_packet *packet;
868bdcd8170SKalle Valo 	struct list_head queue;
869bdcd8170SKalle Valo 
870bdcd8170SKalle Valo 	n_buf_refill = ATH6KL_MAX_RX_BUFFERS -
871ad226ec2SKalle Valo 			  ath6kl_htc_get_rxbuf_num(ar->htc_target, endpoint);
872bdcd8170SKalle Valo 
873bdcd8170SKalle Valo 	if (n_buf_refill <= 0)
874bdcd8170SKalle Valo 		return;
875bdcd8170SKalle Valo 
876bdcd8170SKalle Valo 	INIT_LIST_HEAD(&queue);
877bdcd8170SKalle Valo 
878bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
879bdcd8170SKalle Valo 		   "%s: providing htc with %d buffers at eid=%d\n",
880bdcd8170SKalle Valo 		   __func__, n_buf_refill, endpoint);
881bdcd8170SKalle Valo 
882bdcd8170SKalle Valo 	for (rx_buf = 0; rx_buf < n_buf_refill; rx_buf++) {
883bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
884bdcd8170SKalle Valo 		if (!skb)
885bdcd8170SKalle Valo 			break;
886bdcd8170SKalle Valo 
887bdcd8170SKalle Valo 		packet = (struct htc_packet *) skb->head;
88894e532d1SVasanthakumar Thiagarajan 		if (!IS_ALIGNED((unsigned long) skb->data, 4))
8891df94a85SVasanthakumar Thiagarajan 			skb->data = PTR_ALIGN(skb->data - 4, 4);
890bdcd8170SKalle Valo 		set_htc_rxpkt_info(packet, skb, skb->data,
891bdcd8170SKalle Valo 				   ATH6KL_BUFFER_SIZE, endpoint);
892cfc10f24SKalle Valo 		packet->skb = skb;
893bdcd8170SKalle Valo 		list_add_tail(&packet->list, &queue);
894bdcd8170SKalle Valo 	}
895bdcd8170SKalle Valo 
896bdcd8170SKalle Valo 	if (!list_empty(&queue))
897ad226ec2SKalle Valo 		ath6kl_htc_add_rxbuf_multiple(ar->htc_target, &queue);
898bdcd8170SKalle Valo }
899bdcd8170SKalle Valo 
900bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count)
901bdcd8170SKalle Valo {
902bdcd8170SKalle Valo 	struct htc_packet *packet;
903bdcd8170SKalle Valo 	struct sk_buff *skb;
904bdcd8170SKalle Valo 
905bdcd8170SKalle Valo 	while (count) {
906bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_AMSDU_BUFFER_SIZE);
907bdcd8170SKalle Valo 		if (!skb)
908bdcd8170SKalle Valo 			return;
909bdcd8170SKalle Valo 
910bdcd8170SKalle Valo 		packet = (struct htc_packet *) skb->head;
91194e532d1SVasanthakumar Thiagarajan 		if (!IS_ALIGNED((unsigned long) skb->data, 4))
9121df94a85SVasanthakumar Thiagarajan 			skb->data = PTR_ALIGN(skb->data - 4, 4);
913bdcd8170SKalle Valo 		set_htc_rxpkt_info(packet, skb, skb->data,
914bdcd8170SKalle Valo 				   ATH6KL_AMSDU_BUFFER_SIZE, 0);
915cfc10f24SKalle Valo 		packet->skb = skb;
916cfc10f24SKalle Valo 
917bdcd8170SKalle Valo 		spin_lock_bh(&ar->lock);
918bdcd8170SKalle Valo 		list_add_tail(&packet->list, &ar->amsdu_rx_buffer_queue);
919bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
920bdcd8170SKalle Valo 		count--;
921bdcd8170SKalle Valo 	}
922bdcd8170SKalle Valo }
923bdcd8170SKalle Valo 
924bdcd8170SKalle Valo /*
925bdcd8170SKalle Valo  * Callback to allocate a receive buffer for a pending packet. We use a
926bdcd8170SKalle Valo  * pre-allocated list of buffers of maximum AMSDU size (4K).
927bdcd8170SKalle Valo  */
928bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
929bdcd8170SKalle Valo 					    enum htc_endpoint_id endpoint,
930bdcd8170SKalle Valo 					    int len)
931bdcd8170SKalle Valo {
932bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
933bdcd8170SKalle Valo 	struct htc_packet *packet = NULL;
934bdcd8170SKalle Valo 	struct list_head *pkt_pos;
935bdcd8170SKalle Valo 	int refill_cnt = 0, depth = 0;
936bdcd8170SKalle Valo 
937bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: eid=%d, len:%d\n",
938bdcd8170SKalle Valo 		   __func__, endpoint, len);
939bdcd8170SKalle Valo 
940bdcd8170SKalle Valo 	if ((len <= ATH6KL_BUFFER_SIZE) ||
941bdcd8170SKalle Valo 	    (len > ATH6KL_AMSDU_BUFFER_SIZE))
942bdcd8170SKalle Valo 		return NULL;
943bdcd8170SKalle Valo 
944bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
945bdcd8170SKalle Valo 
946bdcd8170SKalle Valo 	if (list_empty(&ar->amsdu_rx_buffer_queue)) {
947bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
948bdcd8170SKalle Valo 		refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS;
949bdcd8170SKalle Valo 		goto refill_buf;
950bdcd8170SKalle Valo 	}
951bdcd8170SKalle Valo 
952bdcd8170SKalle Valo 	packet = list_first_entry(&ar->amsdu_rx_buffer_queue,
953bdcd8170SKalle Valo 				  struct htc_packet, list);
954bdcd8170SKalle Valo 	list_del(&packet->list);
955bdcd8170SKalle Valo 	list_for_each(pkt_pos, &ar->amsdu_rx_buffer_queue)
956bdcd8170SKalle Valo 		depth++;
957bdcd8170SKalle Valo 
958bdcd8170SKalle Valo 	refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS - depth;
959bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
960bdcd8170SKalle Valo 
961bdcd8170SKalle Valo 	/* set actual endpoint ID */
962bdcd8170SKalle Valo 	packet->endpoint = endpoint;
963bdcd8170SKalle Valo 
964bdcd8170SKalle Valo refill_buf:
965bdcd8170SKalle Valo 	if (refill_cnt >= ATH6KL_AMSDU_REFILL_THRESHOLD)
966bdcd8170SKalle Valo 		ath6kl_refill_amsdu_rxbufs(ar, refill_cnt);
967bdcd8170SKalle Valo 
968bdcd8170SKalle Valo 	return packet;
969bdcd8170SKalle Valo }
970bdcd8170SKalle Valo 
971bdcd8170SKalle Valo static void aggr_slice_amsdu(struct aggr_info *p_aggr,
972bdcd8170SKalle Valo 			     struct rxtid *rxtid, struct sk_buff *skb)
973bdcd8170SKalle Valo {
974bdcd8170SKalle Valo 	struct sk_buff *new_skb;
975bdcd8170SKalle Valo 	struct ethhdr *hdr;
976bdcd8170SKalle Valo 	u16 frame_8023_len, payload_8023_len, mac_hdr_len, amsdu_len;
977bdcd8170SKalle Valo 	u8 *framep;
978bdcd8170SKalle Valo 
979bdcd8170SKalle Valo 	mac_hdr_len = sizeof(struct ethhdr);
980bdcd8170SKalle Valo 	framep = skb->data + mac_hdr_len;
981bdcd8170SKalle Valo 	amsdu_len = skb->len - mac_hdr_len;
982bdcd8170SKalle Valo 
983bdcd8170SKalle Valo 	while (amsdu_len > mac_hdr_len) {
984bdcd8170SKalle Valo 		hdr = (struct ethhdr *) framep;
985bdcd8170SKalle Valo 		payload_8023_len = ntohs(hdr->h_proto);
986bdcd8170SKalle Valo 
987bdcd8170SKalle Valo 		if (payload_8023_len < MIN_MSDU_SUBFRAME_PAYLOAD_LEN ||
988bdcd8170SKalle Valo 		    payload_8023_len > MAX_MSDU_SUBFRAME_PAYLOAD_LEN) {
989bdcd8170SKalle Valo 			ath6kl_err("802.3 AMSDU frame bound check failed. len %d\n",
990bdcd8170SKalle Valo 				   payload_8023_len);
991bdcd8170SKalle Valo 			break;
992bdcd8170SKalle Valo 		}
993bdcd8170SKalle Valo 
994bdcd8170SKalle Valo 		frame_8023_len = payload_8023_len + mac_hdr_len;
995bdcd8170SKalle Valo 		new_skb = aggr_get_free_skb(p_aggr);
996bdcd8170SKalle Valo 		if (!new_skb) {
997bdcd8170SKalle Valo 			ath6kl_err("no buffer available\n");
998bdcd8170SKalle Valo 			break;
999bdcd8170SKalle Valo 		}
1000bdcd8170SKalle Valo 
1001bdcd8170SKalle Valo 		memcpy(new_skb->data, framep, frame_8023_len);
1002bdcd8170SKalle Valo 		skb_put(new_skb, frame_8023_len);
1003bdcd8170SKalle Valo 		if (ath6kl_wmi_dot3_2_dix(new_skb)) {
1004bdcd8170SKalle Valo 			ath6kl_err("dot3_2_dix error\n");
1005bdcd8170SKalle Valo 			dev_kfree_skb(new_skb);
1006bdcd8170SKalle Valo 			break;
1007bdcd8170SKalle Valo 		}
1008bdcd8170SKalle Valo 
1009bdcd8170SKalle Valo 		skb_queue_tail(&rxtid->q, new_skb);
1010bdcd8170SKalle Valo 
1011bdcd8170SKalle Valo 		/* Is this the last subframe within this aggregate ? */
1012bdcd8170SKalle Valo 		if ((amsdu_len - frame_8023_len) == 0)
1013bdcd8170SKalle Valo 			break;
1014bdcd8170SKalle Valo 
1015bdcd8170SKalle Valo 		/* Add the length of A-MSDU subframe padding bytes -
1016bdcd8170SKalle Valo 		 * Round to nearest word.
1017bdcd8170SKalle Valo 		 */
101813e34ea1SVasanthakumar Thiagarajan 		frame_8023_len = ALIGN(frame_8023_len, 4);
1019bdcd8170SKalle Valo 
1020bdcd8170SKalle Valo 		framep += frame_8023_len;
1021bdcd8170SKalle Valo 		amsdu_len -= frame_8023_len;
1022bdcd8170SKalle Valo 	}
1023bdcd8170SKalle Valo 
1024bdcd8170SKalle Valo 	dev_kfree_skb(skb);
1025bdcd8170SKalle Valo }
1026bdcd8170SKalle Valo 
10271d2a4456SVasanthakumar Thiagarajan static void aggr_deque_frms(struct aggr_info_conn *agg_conn, u8 tid,
1028bdcd8170SKalle Valo 			    u16 seq_no, u8 order)
1029bdcd8170SKalle Valo {
1030bdcd8170SKalle Valo 	struct sk_buff *skb;
1031bdcd8170SKalle Valo 	struct rxtid *rxtid;
1032bdcd8170SKalle Valo 	struct skb_hold_q *node;
1033bdcd8170SKalle Valo 	u16 idx, idx_end, seq_end;
1034bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1035bdcd8170SKalle Valo 
10367baef812SVasanthakumar Thiagarajan 	rxtid = &agg_conn->rx_tid[tid];
10377baef812SVasanthakumar Thiagarajan 	stats = &agg_conn->stat[tid];
1038bdcd8170SKalle Valo 
1039bdcd8170SKalle Valo 	idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
1040bdcd8170SKalle Valo 
1041bdcd8170SKalle Valo 	/*
1042bdcd8170SKalle Valo 	 * idx_end is typically the last possible frame in the window,
1043bdcd8170SKalle Valo 	 * but changes to 'the' seq_no, when BAR comes. If seq_no
1044bdcd8170SKalle Valo 	 * is non-zero, we will go up to that and stop.
1045bdcd8170SKalle Valo 	 * Note: last seq no in current window will occupy the same
1046bdcd8170SKalle Valo 	 * index position as index that is just previous to start.
1047bdcd8170SKalle Valo 	 * An imp point : if win_sz is 7, for seq_no space of 4095,
1048bdcd8170SKalle Valo 	 * then, there would be holes when sequence wrap around occurs.
1049bdcd8170SKalle Valo 	 * Target should judiciously choose the win_sz, based on
1050bdcd8170SKalle Valo 	 * this condition. For 4095, (TID_WINDOW_SZ = 2 x win_sz
1051bdcd8170SKalle Valo 	 * 2, 4, 8, 16 win_sz works fine).
1052bdcd8170SKalle Valo 	 * We must deque from "idx" to "idx_end", including both.
1053bdcd8170SKalle Valo 	 */
1054bdcd8170SKalle Valo 	seq_end = seq_no ? seq_no : rxtid->seq_next;
1055bdcd8170SKalle Valo 	idx_end = AGGR_WIN_IDX(seq_end, rxtid->hold_q_sz);
1056bdcd8170SKalle Valo 
1057bdcd8170SKalle Valo 	spin_lock_bh(&rxtid->lock);
1058bdcd8170SKalle Valo 
1059bdcd8170SKalle Valo 	do {
1060bdcd8170SKalle Valo 		node = &rxtid->hold_q[idx];
1061bdcd8170SKalle Valo 		if ((order == 1) && (!node->skb))
1062bdcd8170SKalle Valo 			break;
1063bdcd8170SKalle Valo 
1064bdcd8170SKalle Valo 		if (node->skb) {
1065bdcd8170SKalle Valo 			if (node->is_amsdu)
10661d2a4456SVasanthakumar Thiagarajan 				aggr_slice_amsdu(agg_conn->aggr_info, rxtid,
10671d2a4456SVasanthakumar Thiagarajan 						 node->skb);
1068bdcd8170SKalle Valo 			else
1069bdcd8170SKalle Valo 				skb_queue_tail(&rxtid->q, node->skb);
1070bdcd8170SKalle Valo 			node->skb = NULL;
1071bdcd8170SKalle Valo 		} else
1072bdcd8170SKalle Valo 			stats->num_hole++;
1073bdcd8170SKalle Valo 
1074bdcd8170SKalle Valo 		rxtid->seq_next = ATH6KL_NEXT_SEQ_NO(rxtid->seq_next);
1075bdcd8170SKalle Valo 		idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
1076bdcd8170SKalle Valo 	} while (idx != idx_end);
1077bdcd8170SKalle Valo 
1078bdcd8170SKalle Valo 	spin_unlock_bh(&rxtid->lock);
1079bdcd8170SKalle Valo 
1080bdcd8170SKalle Valo 	stats->num_delivered += skb_queue_len(&rxtid->q);
1081bdcd8170SKalle Valo 
1082bdcd8170SKalle Valo 	while ((skb = skb_dequeue(&rxtid->q)))
10837baef812SVasanthakumar Thiagarajan 		ath6kl_deliver_frames_to_nw_stack(agg_conn->dev, skb);
1084bdcd8170SKalle Valo }
1085bdcd8170SKalle Valo 
10861d2a4456SVasanthakumar Thiagarajan static bool aggr_process_recv_frm(struct aggr_info_conn *agg_conn, u8 tid,
1087bdcd8170SKalle Valo 				  u16 seq_no,
1088bdcd8170SKalle Valo 				  bool is_amsdu, struct sk_buff *frame)
1089bdcd8170SKalle Valo {
1090bdcd8170SKalle Valo 	struct rxtid *rxtid;
1091bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1092bdcd8170SKalle Valo 	struct sk_buff *skb;
1093bdcd8170SKalle Valo 	struct skb_hold_q *node;
1094bdcd8170SKalle Valo 	u16 idx, st, cur, end;
1095bdcd8170SKalle Valo 	bool is_queued = false;
1096bdcd8170SKalle Valo 	u16 extended_end;
1097bdcd8170SKalle Valo 
10987baef812SVasanthakumar Thiagarajan 	rxtid = &agg_conn->rx_tid[tid];
10997baef812SVasanthakumar Thiagarajan 	stats = &agg_conn->stat[tid];
1100bdcd8170SKalle Valo 
1101bdcd8170SKalle Valo 	stats->num_into_aggr++;
1102bdcd8170SKalle Valo 
1103bdcd8170SKalle Valo 	if (!rxtid->aggr) {
1104bdcd8170SKalle Valo 		if (is_amsdu) {
11051d2a4456SVasanthakumar Thiagarajan 			aggr_slice_amsdu(agg_conn->aggr_info, rxtid, frame);
1106bdcd8170SKalle Valo 			is_queued = true;
1107bdcd8170SKalle Valo 			stats->num_amsdu++;
1108bdcd8170SKalle Valo 			while ((skb = skb_dequeue(&rxtid->q)))
11097baef812SVasanthakumar Thiagarajan 				ath6kl_deliver_frames_to_nw_stack(agg_conn->dev,
1110bdcd8170SKalle Valo 								  skb);
1111bdcd8170SKalle Valo 		}
1112bdcd8170SKalle Valo 		return is_queued;
1113bdcd8170SKalle Valo 	}
1114bdcd8170SKalle Valo 
1115bdcd8170SKalle Valo 	/* Check the incoming sequence no, if it's in the window */
1116bdcd8170SKalle Valo 	st = rxtid->seq_next;
1117bdcd8170SKalle Valo 	cur = seq_no;
1118bdcd8170SKalle Valo 	end = (st + rxtid->hold_q_sz-1) & ATH6KL_MAX_SEQ_NO;
1119bdcd8170SKalle Valo 
1120bdcd8170SKalle Valo 	if (((st < end) && (cur < st || cur > end)) ||
1121bdcd8170SKalle Valo 	    ((st > end) && (cur > end) && (cur < st))) {
1122bdcd8170SKalle Valo 		extended_end = (end + rxtid->hold_q_sz - 1) &
1123bdcd8170SKalle Valo 			ATH6KL_MAX_SEQ_NO;
1124bdcd8170SKalle Valo 
1125bdcd8170SKalle Valo 		if (((end < extended_end) &&
1126bdcd8170SKalle Valo 		     (cur < end || cur > extended_end)) ||
1127bdcd8170SKalle Valo 		    ((end > extended_end) && (cur > extended_end) &&
1128bdcd8170SKalle Valo 		     (cur < end))) {
11291d2a4456SVasanthakumar Thiagarajan 			aggr_deque_frms(agg_conn, tid, 0, 0);
1130bdcd8170SKalle Valo 			if (cur >= rxtid->hold_q_sz - 1)
1131bdcd8170SKalle Valo 				rxtid->seq_next = cur - (rxtid->hold_q_sz - 1);
1132bdcd8170SKalle Valo 			else
1133bdcd8170SKalle Valo 				rxtid->seq_next = ATH6KL_MAX_SEQ_NO -
1134bdcd8170SKalle Valo 						  (rxtid->hold_q_sz - 2 - cur);
1135bdcd8170SKalle Valo 		} else {
1136bdcd8170SKalle Valo 			/*
1137bdcd8170SKalle Valo 			 * Dequeue only those frames that are outside the
1138bdcd8170SKalle Valo 			 * new shifted window.
1139bdcd8170SKalle Valo 			 */
1140bdcd8170SKalle Valo 			if (cur >= rxtid->hold_q_sz - 1)
1141bdcd8170SKalle Valo 				st = cur - (rxtid->hold_q_sz - 1);
1142bdcd8170SKalle Valo 			else
1143bdcd8170SKalle Valo 				st = ATH6KL_MAX_SEQ_NO -
1144bdcd8170SKalle Valo 					(rxtid->hold_q_sz - 2 - cur);
1145bdcd8170SKalle Valo 
11461d2a4456SVasanthakumar Thiagarajan 			aggr_deque_frms(agg_conn, tid, st, 0);
1147bdcd8170SKalle Valo 		}
1148bdcd8170SKalle Valo 
1149bdcd8170SKalle Valo 		stats->num_oow++;
1150bdcd8170SKalle Valo 	}
1151bdcd8170SKalle Valo 
1152bdcd8170SKalle Valo 	idx = AGGR_WIN_IDX(seq_no, rxtid->hold_q_sz);
1153bdcd8170SKalle Valo 
1154bdcd8170SKalle Valo 	node = &rxtid->hold_q[idx];
1155bdcd8170SKalle Valo 
1156bdcd8170SKalle Valo 	spin_lock_bh(&rxtid->lock);
1157bdcd8170SKalle Valo 
1158bdcd8170SKalle Valo 	/*
1159bdcd8170SKalle Valo 	 * Is the cur frame duplicate or something beyond our window(hold_q
1160bdcd8170SKalle Valo 	 * -> which is 2x, already)?
1161bdcd8170SKalle Valo 	 *
1162bdcd8170SKalle Valo 	 * 1. Duplicate is easy - drop incoming frame.
1163bdcd8170SKalle Valo 	 * 2. Not falling in current sliding window.
1164bdcd8170SKalle Valo 	 *  2a. is the frame_seq_no preceding current tid_seq_no?
1165bdcd8170SKalle Valo 	 *      -> drop the frame. perhaps sender did not get our ACK.
1166bdcd8170SKalle Valo 	 *         this is taken care of above.
1167bdcd8170SKalle Valo 	 *  2b. is the frame_seq_no beyond window(st, TID_WINDOW_SZ);
1168bdcd8170SKalle Valo 	 *      -> Taken care of it above, by moving window forward.
1169bdcd8170SKalle Valo 	 */
1170bdcd8170SKalle Valo 	dev_kfree_skb(node->skb);
1171bdcd8170SKalle Valo 	stats->num_dups++;
1172bdcd8170SKalle Valo 
1173bdcd8170SKalle Valo 	node->skb = frame;
1174bdcd8170SKalle Valo 	is_queued = true;
1175bdcd8170SKalle Valo 	node->is_amsdu = is_amsdu;
1176bdcd8170SKalle Valo 	node->seq_no = seq_no;
1177bdcd8170SKalle Valo 
1178bdcd8170SKalle Valo 	if (node->is_amsdu)
1179bdcd8170SKalle Valo 		stats->num_amsdu++;
1180bdcd8170SKalle Valo 	else
1181bdcd8170SKalle Valo 		stats->num_mpdu++;
1182bdcd8170SKalle Valo 
1183bdcd8170SKalle Valo 	spin_unlock_bh(&rxtid->lock);
1184bdcd8170SKalle Valo 
11851d2a4456SVasanthakumar Thiagarajan 	aggr_deque_frms(agg_conn, tid, 0, 1);
1186bdcd8170SKalle Valo 
11877baef812SVasanthakumar Thiagarajan 	if (agg_conn->timer_scheduled)
1188bdcd8170SKalle Valo 		rxtid->progress = true;
1189bdcd8170SKalle Valo 	else
1190bdcd8170SKalle Valo 		for (idx = 0 ; idx < rxtid->hold_q_sz; idx++) {
1191bdcd8170SKalle Valo 			if (rxtid->hold_q[idx].skb) {
1192bdcd8170SKalle Valo 				/*
1193bdcd8170SKalle Valo 				 * There is a frame in the queue and no
1194bdcd8170SKalle Valo 				 * timer so start a timer to ensure that
1195bdcd8170SKalle Valo 				 * the frame doesn't remain stuck
1196bdcd8170SKalle Valo 				 * forever.
1197bdcd8170SKalle Valo 				 */
11987baef812SVasanthakumar Thiagarajan 				agg_conn->timer_scheduled = true;
11997baef812SVasanthakumar Thiagarajan 				mod_timer(&agg_conn->timer,
1200bdcd8170SKalle Valo 					  (jiffies +
1201bdcd8170SKalle Valo 					   HZ * (AGGR_RX_TIMEOUT) / 1000));
1202bdcd8170SKalle Valo 				rxtid->progress = false;
1203bdcd8170SKalle Valo 				rxtid->timer_mon = true;
1204bdcd8170SKalle Valo 				break;
1205bdcd8170SKalle Valo 			}
1206bdcd8170SKalle Valo 		}
1207bdcd8170SKalle Valo 
1208bdcd8170SKalle Valo 	return is_queued;
1209bdcd8170SKalle Valo }
1210bdcd8170SKalle Valo 
1211c1762a3fSThirumalai Pachamuthu static void ath6kl_uapsd_trigger_frame_rx(struct ath6kl_vif *vif,
1212c1762a3fSThirumalai Pachamuthu 						 struct ath6kl_sta *conn)
1213c1762a3fSThirumalai Pachamuthu {
1214c1762a3fSThirumalai Pachamuthu 	struct ath6kl *ar = vif->ar;
1215c1762a3fSThirumalai Pachamuthu 	bool is_apsdq_empty, is_apsdq_empty_at_start;
1216c1762a3fSThirumalai Pachamuthu 	u32 num_frames_to_deliver, flags;
1217c1762a3fSThirumalai Pachamuthu 	struct sk_buff *skb = NULL;
1218c1762a3fSThirumalai Pachamuthu 
1219c1762a3fSThirumalai Pachamuthu 	/*
1220c1762a3fSThirumalai Pachamuthu 	 * If the APSD q for this STA is not empty, dequeue and
1221c1762a3fSThirumalai Pachamuthu 	 * send a pkt from the head of the q. Also update the
1222c1762a3fSThirumalai Pachamuthu 	 * More data bit in the WMI_DATA_HDR if there are
1223c1762a3fSThirumalai Pachamuthu 	 * more pkts for this STA in the APSD q.
1224c1762a3fSThirumalai Pachamuthu 	 * If there are no more pkts for this STA,
1225c1762a3fSThirumalai Pachamuthu 	 * update the APSD bitmap for this STA.
1226c1762a3fSThirumalai Pachamuthu 	 */
1227c1762a3fSThirumalai Pachamuthu 
1228c1762a3fSThirumalai Pachamuthu 	num_frames_to_deliver = (conn->apsd_info >> ATH6KL_APSD_NUM_OF_AC) &
1229c1762a3fSThirumalai Pachamuthu 						    ATH6KL_APSD_FRAME_MASK;
1230c1762a3fSThirumalai Pachamuthu 	/*
1231c1762a3fSThirumalai Pachamuthu 	 * Number of frames to send in a service period is
1232c1762a3fSThirumalai Pachamuthu 	 * indicated by the station
1233c1762a3fSThirumalai Pachamuthu 	 * in the QOS_INFO of the association request
1234c1762a3fSThirumalai Pachamuthu 	 * If it is zero, send all frames
1235c1762a3fSThirumalai Pachamuthu 	 */
1236c1762a3fSThirumalai Pachamuthu 	if (!num_frames_to_deliver)
1237c1762a3fSThirumalai Pachamuthu 		num_frames_to_deliver = ATH6KL_APSD_ALL_FRAME;
1238c1762a3fSThirumalai Pachamuthu 
1239c1762a3fSThirumalai Pachamuthu 	spin_lock_bh(&conn->psq_lock);
1240c1762a3fSThirumalai Pachamuthu 	is_apsdq_empty = skb_queue_empty(&conn->apsdq);
1241c1762a3fSThirumalai Pachamuthu 	spin_unlock_bh(&conn->psq_lock);
1242c1762a3fSThirumalai Pachamuthu 	is_apsdq_empty_at_start = is_apsdq_empty;
1243c1762a3fSThirumalai Pachamuthu 
1244c1762a3fSThirumalai Pachamuthu 	while ((!is_apsdq_empty) && (num_frames_to_deliver)) {
1245c1762a3fSThirumalai Pachamuthu 
1246c1762a3fSThirumalai Pachamuthu 		spin_lock_bh(&conn->psq_lock);
1247c1762a3fSThirumalai Pachamuthu 		skb = skb_dequeue(&conn->apsdq);
1248c1762a3fSThirumalai Pachamuthu 		is_apsdq_empty = skb_queue_empty(&conn->apsdq);
1249c1762a3fSThirumalai Pachamuthu 		spin_unlock_bh(&conn->psq_lock);
1250c1762a3fSThirumalai Pachamuthu 
1251c1762a3fSThirumalai Pachamuthu 		/*
1252c1762a3fSThirumalai Pachamuthu 		 * Set the STA flag to Trigger delivery,
1253c1762a3fSThirumalai Pachamuthu 		 * so that the frame will go out
1254c1762a3fSThirumalai Pachamuthu 		 */
1255c1762a3fSThirumalai Pachamuthu 		conn->sta_flags |= STA_PS_APSD_TRIGGER;
1256c1762a3fSThirumalai Pachamuthu 		num_frames_to_deliver--;
1257c1762a3fSThirumalai Pachamuthu 
1258c1762a3fSThirumalai Pachamuthu 		/* Last frame in the service period, set EOSP or queue empty */
1259c1762a3fSThirumalai Pachamuthu 		if ((is_apsdq_empty) || (!num_frames_to_deliver))
1260c1762a3fSThirumalai Pachamuthu 			conn->sta_flags |= STA_PS_APSD_EOSP;
1261c1762a3fSThirumalai Pachamuthu 
1262c1762a3fSThirumalai Pachamuthu 		ath6kl_data_tx(skb, vif->ndev);
1263c1762a3fSThirumalai Pachamuthu 		conn->sta_flags &= ~(STA_PS_APSD_TRIGGER);
1264c1762a3fSThirumalai Pachamuthu 		conn->sta_flags &= ~(STA_PS_APSD_EOSP);
1265c1762a3fSThirumalai Pachamuthu 	}
1266c1762a3fSThirumalai Pachamuthu 
1267c1762a3fSThirumalai Pachamuthu 	if (is_apsdq_empty) {
1268c1762a3fSThirumalai Pachamuthu 		if (is_apsdq_empty_at_start)
1269c1762a3fSThirumalai Pachamuthu 			flags = WMI_AP_APSD_NO_DELIVERY_FRAMES;
1270c1762a3fSThirumalai Pachamuthu 		else
1271c1762a3fSThirumalai Pachamuthu 			flags = 0;
1272c1762a3fSThirumalai Pachamuthu 
1273c1762a3fSThirumalai Pachamuthu 		ath6kl_wmi_set_apsd_bfrd_traf(ar->wmi,
1274c1762a3fSThirumalai Pachamuthu 					      vif->fw_vif_idx,
1275c1762a3fSThirumalai Pachamuthu 					      conn->aid, 0, flags);
1276c1762a3fSThirumalai Pachamuthu 	}
1277c1762a3fSThirumalai Pachamuthu 
1278c1762a3fSThirumalai Pachamuthu 	return;
1279c1762a3fSThirumalai Pachamuthu }
1280c1762a3fSThirumalai Pachamuthu 
1281bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet)
1282bdcd8170SKalle Valo {
1283bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
1284bdcd8170SKalle Valo 	struct sk_buff *skb = packet->pkt_cntxt;
1285bdcd8170SKalle Valo 	struct wmi_rx_meta_v2 *meta;
1286bdcd8170SKalle Valo 	struct wmi_data_hdr *dhdr;
1287bdcd8170SKalle Valo 	int min_hdr_len;
1288bdcd8170SKalle Valo 	u8 meta_type, dot11_hdr = 0;
12898bd5bca8SKalle Valo 	u8 pad_before_data_start;
1290bdcd8170SKalle Valo 	int status = packet->status;
1291bdcd8170SKalle Valo 	enum htc_endpoint_id ept = packet->endpoint;
1292bdcd8170SKalle Valo 	bool is_amsdu, prev_ps, ps_state = false;
1293c1762a3fSThirumalai Pachamuthu 	bool trig_state = false;
1294bdcd8170SKalle Valo 	struct ath6kl_sta *conn = NULL;
1295bdcd8170SKalle Valo 	struct sk_buff *skb1 = NULL;
1296bdcd8170SKalle Valo 	struct ethhdr *datap = NULL;
12976765d0aaSVasanthakumar Thiagarajan 	struct ath6kl_vif *vif;
12981d2a4456SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn;
1299bdcd8170SKalle Valo 	u16 seq_no, offset;
13006765d0aaSVasanthakumar Thiagarajan 	u8 tid, if_idx;
1301bdcd8170SKalle Valo 
1302bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
1303bdcd8170SKalle Valo 		   "%s: ar=0x%p eid=%d, skb=0x%p, data=0x%p, len=0x%x status:%d",
1304bdcd8170SKalle Valo 		   __func__, ar, ept, skb, packet->buf,
1305bdcd8170SKalle Valo 		   packet->act_len, status);
1306bdcd8170SKalle Valo 
1307bdcd8170SKalle Valo 	if (status || !(skb->data + HTC_HDR_LENGTH)) {
13086765d0aaSVasanthakumar Thiagarajan 		dev_kfree_skb(skb);
13096765d0aaSVasanthakumar Thiagarajan 		return;
13106765d0aaSVasanthakumar Thiagarajan 	}
13116765d0aaSVasanthakumar Thiagarajan 
13126765d0aaSVasanthakumar Thiagarajan 	skb_put(skb, packet->act_len + HTC_HDR_LENGTH);
13136765d0aaSVasanthakumar Thiagarajan 	skb_pull(skb, HTC_HDR_LENGTH);
13146765d0aaSVasanthakumar Thiagarajan 
131581db48dcSVasanthakumar Thiagarajan 	ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "rx ",
131681db48dcSVasanthakumar Thiagarajan 			skb->data, skb->len);
131781db48dcSVasanthakumar Thiagarajan 
13186765d0aaSVasanthakumar Thiagarajan 	if (ept == ar->ctrl_ep) {
131981db48dcSVasanthakumar Thiagarajan 		if (test_bit(WMI_ENABLED, &ar->flag)) {
132081db48dcSVasanthakumar Thiagarajan 			ath6kl_check_wow_status(ar);
132181db48dcSVasanthakumar Thiagarajan 			ath6kl_wmi_control_rx(ar->wmi, skb);
132281db48dcSVasanthakumar Thiagarajan 			return;
132381db48dcSVasanthakumar Thiagarajan 		}
13246765d0aaSVasanthakumar Thiagarajan 		if_idx =
13256765d0aaSVasanthakumar Thiagarajan 		wmi_cmd_hdr_get_if_idx((struct wmi_cmd_hdr *) skb->data);
13266765d0aaSVasanthakumar Thiagarajan 	} else {
13276765d0aaSVasanthakumar Thiagarajan 		if_idx =
13286765d0aaSVasanthakumar Thiagarajan 		wmi_data_hdr_get_if_idx((struct wmi_data_hdr *) skb->data);
13296765d0aaSVasanthakumar Thiagarajan 	}
13306765d0aaSVasanthakumar Thiagarajan 
13316765d0aaSVasanthakumar Thiagarajan 	vif = ath6kl_get_vif_by_index(ar, if_idx);
13326765d0aaSVasanthakumar Thiagarajan 	if (!vif) {
1333bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1334bdcd8170SKalle Valo 		return;
1335bdcd8170SKalle Valo 	}
1336bdcd8170SKalle Valo 
1337bdcd8170SKalle Valo 	/*
1338bdcd8170SKalle Valo 	 * Take lock to protect buffer counts and adaptive power throughput
1339bdcd8170SKalle Valo 	 * state.
1340bdcd8170SKalle Valo 	 */
1341478ac027SVasanthakumar Thiagarajan 	spin_lock_bh(&vif->if_lock);
1342bdcd8170SKalle Valo 
1343b95907a7SVasanthakumar Thiagarajan 	vif->net_stats.rx_packets++;
1344b95907a7SVasanthakumar Thiagarajan 	vif->net_stats.rx_bytes += packet->act_len;
1345bdcd8170SKalle Valo 
1346478ac027SVasanthakumar Thiagarajan 	spin_unlock_bh(&vif->if_lock);
134783dc5f2fSVasanthakumar Thiagarajan 
134828ae58ddSVasanthakumar Thiagarajan 	skb->dev = vif->ndev;
1349bdcd8170SKalle Valo 
1350bdcd8170SKalle Valo 	if (!test_bit(WMI_ENABLED, &ar->flag)) {
1351bdcd8170SKalle Valo 		if (EPPING_ALIGNMENT_PAD > 0)
1352bdcd8170SKalle Valo 			skb_pull(skb, EPPING_ALIGNMENT_PAD);
135328ae58ddSVasanthakumar Thiagarajan 		ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb);
1354bdcd8170SKalle Valo 		return;
1355bdcd8170SKalle Valo 	}
1356bdcd8170SKalle Valo 
1357a918fb3cSRaja Mani 	ath6kl_check_wow_status(ar);
1358a918fb3cSRaja Mani 
135967f9178fSVasanthakumar Thiagarajan 	min_hdr_len = sizeof(struct ethhdr) + sizeof(struct wmi_data_hdr) +
1360bdcd8170SKalle Valo 		      sizeof(struct ath6kl_llc_snap_hdr);
1361bdcd8170SKalle Valo 
1362bdcd8170SKalle Valo 	dhdr = (struct wmi_data_hdr *) skb->data;
1363bdcd8170SKalle Valo 
1364bdcd8170SKalle Valo 	/*
1365bdcd8170SKalle Valo 	 * In the case of AP mode we may receive NULL data frames
1366bdcd8170SKalle Valo 	 * that do not have LLC hdr. They are 16 bytes in size.
1367bdcd8170SKalle Valo 	 * Allow these frames in the AP mode.
1368bdcd8170SKalle Valo 	 */
1369f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type != AP_NETWORK &&
1370bdcd8170SKalle Valo 	    ((packet->act_len < min_hdr_len) ||
1371bdcd8170SKalle Valo 	     (packet->act_len > WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH))) {
1372bdcd8170SKalle Valo 		ath6kl_info("frame len is too short or too long\n");
1373b95907a7SVasanthakumar Thiagarajan 		vif->net_stats.rx_errors++;
1374b95907a7SVasanthakumar Thiagarajan 		vif->net_stats.rx_length_errors++;
1375bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1376bdcd8170SKalle Valo 		return;
1377bdcd8170SKalle Valo 	}
1378bdcd8170SKalle Valo 
1379bdcd8170SKalle Valo 	/* Get the Power save state of the STA */
1380f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
1381bdcd8170SKalle Valo 		meta_type = wmi_data_hdr_get_meta(dhdr);
1382bdcd8170SKalle Valo 
1383bdcd8170SKalle Valo 		ps_state = !!((dhdr->info >> WMI_DATA_HDR_PS_SHIFT) &
1384bdcd8170SKalle Valo 			      WMI_DATA_HDR_PS_MASK);
1385bdcd8170SKalle Valo 
1386bdcd8170SKalle Valo 		offset = sizeof(struct wmi_data_hdr);
1387c1762a3fSThirumalai Pachamuthu 		trig_state = !!(le16_to_cpu(dhdr->info3) & WMI_DATA_HDR_TRIG);
1388bdcd8170SKalle Valo 
1389bdcd8170SKalle Valo 		switch (meta_type) {
1390bdcd8170SKalle Valo 		case 0:
1391bdcd8170SKalle Valo 			break;
1392bdcd8170SKalle Valo 		case WMI_META_VERSION_1:
1393bdcd8170SKalle Valo 			offset += sizeof(struct wmi_rx_meta_v1);
1394bdcd8170SKalle Valo 			break;
1395bdcd8170SKalle Valo 		case WMI_META_VERSION_2:
1396bdcd8170SKalle Valo 			offset += sizeof(struct wmi_rx_meta_v2);
1397bdcd8170SKalle Valo 			break;
1398bdcd8170SKalle Valo 		default:
1399bdcd8170SKalle Valo 			break;
1400bdcd8170SKalle Valo 		}
1401bdcd8170SKalle Valo 
1402bdcd8170SKalle Valo 		datap = (struct ethhdr *) (skb->data + offset);
14036765d0aaSVasanthakumar Thiagarajan 		conn = ath6kl_find_sta(vif, datap->h_source);
1404bdcd8170SKalle Valo 
1405bdcd8170SKalle Valo 		if (!conn) {
1406bdcd8170SKalle Valo 			dev_kfree_skb(skb);
1407bdcd8170SKalle Valo 			return;
1408bdcd8170SKalle Valo 		}
1409bdcd8170SKalle Valo 
1410bdcd8170SKalle Valo 		/*
1411bdcd8170SKalle Valo 		 * If there is a change in PS state of the STA,
1412bdcd8170SKalle Valo 		 * take appropriate steps:
1413bdcd8170SKalle Valo 		 *
1414bdcd8170SKalle Valo 		 * 1. If Sleep-->Awake, flush the psq for the STA
1415bdcd8170SKalle Valo 		 *    Clear the PVB for the STA.
1416bdcd8170SKalle Valo 		 * 2. If Awake-->Sleep, Starting queueing frames
1417bdcd8170SKalle Valo 		 *    the STA.
1418bdcd8170SKalle Valo 		 */
1419bdcd8170SKalle Valo 		prev_ps = !!(conn->sta_flags & STA_PS_SLEEP);
1420bdcd8170SKalle Valo 
1421bdcd8170SKalle Valo 		if (ps_state)
1422bdcd8170SKalle Valo 			conn->sta_flags |= STA_PS_SLEEP;
1423bdcd8170SKalle Valo 		else
1424bdcd8170SKalle Valo 			conn->sta_flags &= ~STA_PS_SLEEP;
1425bdcd8170SKalle Valo 
1426c1762a3fSThirumalai Pachamuthu 		/* Accept trigger only when the station is in sleep */
1427c1762a3fSThirumalai Pachamuthu 		if ((conn->sta_flags & STA_PS_SLEEP) && trig_state)
1428c1762a3fSThirumalai Pachamuthu 			ath6kl_uapsd_trigger_frame_rx(vif, conn);
1429c1762a3fSThirumalai Pachamuthu 
1430bdcd8170SKalle Valo 		if (prev_ps ^ !!(conn->sta_flags & STA_PS_SLEEP)) {
1431bdcd8170SKalle Valo 			if (!(conn->sta_flags & STA_PS_SLEEP)) {
1432bdcd8170SKalle Valo 				struct sk_buff *skbuff = NULL;
1433c1762a3fSThirumalai Pachamuthu 				bool is_apsdq_empty;
1434d0ff7383SNaveen Gangadharan 				struct ath6kl_mgmt_buff *mgmt;
1435d0ff7383SNaveen Gangadharan 				u8 idx;
1436bdcd8170SKalle Valo 
1437bdcd8170SKalle Valo 				spin_lock_bh(&conn->psq_lock);
1438d0ff7383SNaveen Gangadharan 				while (conn->mgmt_psq_len > 0) {
1439d0ff7383SNaveen Gangadharan 					mgmt = list_first_entry(
1440d0ff7383SNaveen Gangadharan 							&conn->mgmt_psq,
1441d0ff7383SNaveen Gangadharan 							struct ath6kl_mgmt_buff,
1442d0ff7383SNaveen Gangadharan 							list);
1443d0ff7383SNaveen Gangadharan 					list_del(&mgmt->list);
1444d0ff7383SNaveen Gangadharan 					conn->mgmt_psq_len--;
1445d0ff7383SNaveen Gangadharan 					spin_unlock_bh(&conn->psq_lock);
1446d0ff7383SNaveen Gangadharan 					idx = vif->fw_vif_idx;
1447d0ff7383SNaveen Gangadharan 
1448d0ff7383SNaveen Gangadharan 					ath6kl_wmi_send_mgmt_cmd(ar->wmi,
1449d0ff7383SNaveen Gangadharan 								 idx,
1450d0ff7383SNaveen Gangadharan 								 mgmt->id,
1451d0ff7383SNaveen Gangadharan 								 mgmt->freq,
1452d0ff7383SNaveen Gangadharan 								 mgmt->wait,
1453d0ff7383SNaveen Gangadharan 								 mgmt->buf,
1454d0ff7383SNaveen Gangadharan 								 mgmt->len,
1455d0ff7383SNaveen Gangadharan 								 mgmt->no_cck);
1456d0ff7383SNaveen Gangadharan 
1457d0ff7383SNaveen Gangadharan 					kfree(mgmt);
1458d0ff7383SNaveen Gangadharan 					spin_lock_bh(&conn->psq_lock);
1459d0ff7383SNaveen Gangadharan 				}
1460d0ff7383SNaveen Gangadharan 				conn->mgmt_psq_len = 0;
1461c1762a3fSThirumalai Pachamuthu 				while ((skbuff = skb_dequeue(&conn->psq))) {
1462c1762a3fSThirumalai Pachamuthu 					spin_unlock_bh(&conn->psq_lock);
1463c1762a3fSThirumalai Pachamuthu 					ath6kl_data_tx(skbuff, vif->ndev);
1464c1762a3fSThirumalai Pachamuthu 					spin_lock_bh(&conn->psq_lock);
1465c1762a3fSThirumalai Pachamuthu 				}
1466c1762a3fSThirumalai Pachamuthu 
1467c1762a3fSThirumalai Pachamuthu 				is_apsdq_empty = skb_queue_empty(&conn->apsdq);
1468c1762a3fSThirumalai Pachamuthu 				while ((skbuff = skb_dequeue(&conn->apsdq))) {
1469bdcd8170SKalle Valo 					spin_unlock_bh(&conn->psq_lock);
147028ae58ddSVasanthakumar Thiagarajan 					ath6kl_data_tx(skbuff, vif->ndev);
1471bdcd8170SKalle Valo 					spin_lock_bh(&conn->psq_lock);
1472bdcd8170SKalle Valo 				}
1473bdcd8170SKalle Valo 				spin_unlock_bh(&conn->psq_lock);
1474c1762a3fSThirumalai Pachamuthu 
1475c1762a3fSThirumalai Pachamuthu 				if (!is_apsdq_empty)
1476c1762a3fSThirumalai Pachamuthu 					ath6kl_wmi_set_apsd_bfrd_traf(
1477c1762a3fSThirumalai Pachamuthu 							ar->wmi,
1478c1762a3fSThirumalai Pachamuthu 							vif->fw_vif_idx,
1479c1762a3fSThirumalai Pachamuthu 							conn->aid, 0, 0);
1480c1762a3fSThirumalai Pachamuthu 
1481bdcd8170SKalle Valo 				/* Clear the PVB for this STA */
1482334234b5SVasanthakumar Thiagarajan 				ath6kl_wmi_set_pvb_cmd(ar->wmi, vif->fw_vif_idx,
1483334234b5SVasanthakumar Thiagarajan 						       conn->aid, 0);
1484bdcd8170SKalle Valo 			}
1485bdcd8170SKalle Valo 		}
1486bdcd8170SKalle Valo 
1487bdcd8170SKalle Valo 		/* drop NULL data frames here */
1488bdcd8170SKalle Valo 		if ((packet->act_len < min_hdr_len) ||
1489bdcd8170SKalle Valo 		    (packet->act_len >
1490bdcd8170SKalle Valo 		     WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH)) {
1491bdcd8170SKalle Valo 			dev_kfree_skb(skb);
1492bdcd8170SKalle Valo 			return;
1493bdcd8170SKalle Valo 		}
1494bdcd8170SKalle Valo 	}
1495bdcd8170SKalle Valo 
1496bdcd8170SKalle Valo 	is_amsdu = wmi_data_hdr_is_amsdu(dhdr) ? true : false;
1497bdcd8170SKalle Valo 	tid = wmi_data_hdr_get_up(dhdr);
1498bdcd8170SKalle Valo 	seq_no = wmi_data_hdr_get_seqno(dhdr);
1499bdcd8170SKalle Valo 	meta_type = wmi_data_hdr_get_meta(dhdr);
1500bdcd8170SKalle Valo 	dot11_hdr = wmi_data_hdr_get_dot11(dhdr);
15018bd5bca8SKalle Valo 	pad_before_data_start =
15028bd5bca8SKalle Valo 		(le16_to_cpu(dhdr->info3) >> WMI_DATA_HDR_PAD_BEFORE_DATA_SHIFT)
15038bd5bca8SKalle Valo 			& WMI_DATA_HDR_PAD_BEFORE_DATA_MASK;
15048bd5bca8SKalle Valo 
1505594a0bc8SVasanthakumar Thiagarajan 	skb_pull(skb, sizeof(struct wmi_data_hdr));
1506bdcd8170SKalle Valo 
1507bdcd8170SKalle Valo 	switch (meta_type) {
1508bdcd8170SKalle Valo 	case WMI_META_VERSION_1:
1509bdcd8170SKalle Valo 		skb_pull(skb, sizeof(struct wmi_rx_meta_v1));
1510bdcd8170SKalle Valo 		break;
1511bdcd8170SKalle Valo 	case WMI_META_VERSION_2:
1512bdcd8170SKalle Valo 		meta = (struct wmi_rx_meta_v2 *) skb->data;
1513bdcd8170SKalle Valo 		if (meta->csum_flags & 0x1) {
1514bdcd8170SKalle Valo 			skb->ip_summed = CHECKSUM_COMPLETE;
1515bdcd8170SKalle Valo 			skb->csum = (__force __wsum) meta->csum;
1516bdcd8170SKalle Valo 		}
1517bdcd8170SKalle Valo 		skb_pull(skb, sizeof(struct wmi_rx_meta_v2));
1518bdcd8170SKalle Valo 		break;
1519bdcd8170SKalle Valo 	default:
1520bdcd8170SKalle Valo 		break;
1521bdcd8170SKalle Valo 	}
1522bdcd8170SKalle Valo 
15238bd5bca8SKalle Valo 	skb_pull(skb, pad_before_data_start);
15248bd5bca8SKalle Valo 
1525bdcd8170SKalle Valo 	if (dot11_hdr)
1526bdcd8170SKalle Valo 		status = ath6kl_wmi_dot11_hdr_remove(ar->wmi, skb);
1527bdcd8170SKalle Valo 	else if (!is_amsdu)
1528bdcd8170SKalle Valo 		status = ath6kl_wmi_dot3_2_dix(skb);
1529bdcd8170SKalle Valo 
1530bdcd8170SKalle Valo 	if (status) {
1531bdcd8170SKalle Valo 		/*
1532bdcd8170SKalle Valo 		 * Drop frames that could not be processed (lack of
1533bdcd8170SKalle Valo 		 * memory, etc.)
1534bdcd8170SKalle Valo 		 */
1535bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1536bdcd8170SKalle Valo 		return;
1537bdcd8170SKalle Valo 	}
1538bdcd8170SKalle Valo 
153928ae58ddSVasanthakumar Thiagarajan 	if (!(vif->ndev->flags & IFF_UP)) {
1540bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1541bdcd8170SKalle Valo 		return;
1542bdcd8170SKalle Valo 	}
1543bdcd8170SKalle Valo 
1544f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
1545bdcd8170SKalle Valo 		datap = (struct ethhdr *) skb->data;
1546bdcd8170SKalle Valo 		if (is_multicast_ether_addr(datap->h_dest))
1547bdcd8170SKalle Valo 			/*
1548bdcd8170SKalle Valo 			 * Bcast/Mcast frames should be sent to the
1549bdcd8170SKalle Valo 			 * OS stack as well as on the air.
1550bdcd8170SKalle Valo 			 */
1551bdcd8170SKalle Valo 			skb1 = skb_copy(skb, GFP_ATOMIC);
1552bdcd8170SKalle Valo 		else {
1553bdcd8170SKalle Valo 			/*
1554bdcd8170SKalle Valo 			 * Search for a connected STA with dstMac
1555bdcd8170SKalle Valo 			 * as the Mac address. If found send the
1556bdcd8170SKalle Valo 			 * frame to it on the air else send the
1557bdcd8170SKalle Valo 			 * frame up the stack.
1558bdcd8170SKalle Valo 			 */
15596765d0aaSVasanthakumar Thiagarajan 			conn = ath6kl_find_sta(vif, datap->h_dest);
1560bdcd8170SKalle Valo 
1561bdcd8170SKalle Valo 			if (conn && ar->intra_bss) {
1562bdcd8170SKalle Valo 				skb1 = skb;
1563bdcd8170SKalle Valo 				skb = NULL;
1564bdcd8170SKalle Valo 			} else if (conn && !ar->intra_bss) {
1565bdcd8170SKalle Valo 				dev_kfree_skb(skb);
1566bdcd8170SKalle Valo 				skb = NULL;
1567bdcd8170SKalle Valo 			}
1568bdcd8170SKalle Valo 		}
1569bdcd8170SKalle Valo 		if (skb1)
157028ae58ddSVasanthakumar Thiagarajan 			ath6kl_data_tx(skb1, vif->ndev);
1571ad3f78b9SKalle Valo 
1572ad3f78b9SKalle Valo 		if (skb == NULL) {
1573ad3f78b9SKalle Valo 			/* nothing to deliver up the stack */
1574ad3f78b9SKalle Valo 			return;
1575ad3f78b9SKalle Valo 		}
1576bdcd8170SKalle Valo 	}
1577bdcd8170SKalle Valo 
15785694f962SKalle Valo 	datap = (struct ethhdr *) skb->data;
15795694f962SKalle Valo 
15801d2a4456SVasanthakumar Thiagarajan 	if (is_unicast_ether_addr(datap->h_dest)) {
15811d2a4456SVasanthakumar Thiagarajan 		if (vif->nw_type == AP_NETWORK) {
15821d2a4456SVasanthakumar Thiagarajan 			conn = ath6kl_find_sta(vif, datap->h_source);
15831d2a4456SVasanthakumar Thiagarajan 			if (!conn)
15841d2a4456SVasanthakumar Thiagarajan 				return;
15851d2a4456SVasanthakumar Thiagarajan 			aggr_conn = conn->aggr_conn;
15861d2a4456SVasanthakumar Thiagarajan 		} else
15871d2a4456SVasanthakumar Thiagarajan 			aggr_conn = vif->aggr_cntxt->aggr_conn;
15881d2a4456SVasanthakumar Thiagarajan 
15891d2a4456SVasanthakumar Thiagarajan 		if (aggr_process_recv_frm(aggr_conn, tid, seq_no,
15901d2a4456SVasanthakumar Thiagarajan 					  is_amsdu, skb)) {
15915694f962SKalle Valo 			/* aggregation code will handle the skb */
15925694f962SKalle Valo 			return;
15931d2a4456SVasanthakumar Thiagarajan 		}
1594b514fab5SVasanthakumar Thiagarajan 	} else if (!is_broadcast_ether_addr(datap->h_dest))
1595b514fab5SVasanthakumar Thiagarajan 		vif->net_stats.multicast++;
15965694f962SKalle Valo 
159728ae58ddSVasanthakumar Thiagarajan 	ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb);
1598bdcd8170SKalle Valo }
1599bdcd8170SKalle Valo 
1600bdcd8170SKalle Valo static void aggr_timeout(unsigned long arg)
1601bdcd8170SKalle Valo {
1602bdcd8170SKalle Valo 	u8 i, j;
16037baef812SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn = (struct aggr_info_conn *) arg;
1604bdcd8170SKalle Valo 	struct rxtid *rxtid;
1605bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1606bdcd8170SKalle Valo 
1607bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
16087baef812SVasanthakumar Thiagarajan 		rxtid = &aggr_conn->rx_tid[i];
16097baef812SVasanthakumar Thiagarajan 		stats = &aggr_conn->stat[i];
1610bdcd8170SKalle Valo 
1611bdcd8170SKalle Valo 		if (!rxtid->aggr || !rxtid->timer_mon || rxtid->progress)
1612bdcd8170SKalle Valo 			continue;
1613bdcd8170SKalle Valo 
1614bdcd8170SKalle Valo 		stats->num_timeouts++;
161537ca6335SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_AGGR,
161637ca6335SKalle Valo 			   "aggr timeout (st %d end %d)\n",
1617bdcd8170SKalle Valo 			   rxtid->seq_next,
1618bdcd8170SKalle Valo 			   ((rxtid->seq_next + rxtid->hold_q_sz-1) &
1619bdcd8170SKalle Valo 			    ATH6KL_MAX_SEQ_NO));
16201d2a4456SVasanthakumar Thiagarajan 		aggr_deque_frms(aggr_conn, i, 0, 0);
1621bdcd8170SKalle Valo 	}
1622bdcd8170SKalle Valo 
16237baef812SVasanthakumar Thiagarajan 	aggr_conn->timer_scheduled = false;
1624bdcd8170SKalle Valo 
1625bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
16267baef812SVasanthakumar Thiagarajan 		rxtid = &aggr_conn->rx_tid[i];
1627bdcd8170SKalle Valo 
1628bdcd8170SKalle Valo 		if (rxtid->aggr && rxtid->hold_q) {
1629bdcd8170SKalle Valo 			for (j = 0; j < rxtid->hold_q_sz; j++) {
1630bdcd8170SKalle Valo 				if (rxtid->hold_q[j].skb) {
16317baef812SVasanthakumar Thiagarajan 					aggr_conn->timer_scheduled = true;
1632bdcd8170SKalle Valo 					rxtid->timer_mon = true;
1633bdcd8170SKalle Valo 					rxtid->progress = false;
1634bdcd8170SKalle Valo 					break;
1635bdcd8170SKalle Valo 				}
1636bdcd8170SKalle Valo 			}
1637bdcd8170SKalle Valo 
1638bdcd8170SKalle Valo 			if (j >= rxtid->hold_q_sz)
1639bdcd8170SKalle Valo 				rxtid->timer_mon = false;
1640bdcd8170SKalle Valo 		}
1641bdcd8170SKalle Valo 	}
1642bdcd8170SKalle Valo 
16437baef812SVasanthakumar Thiagarajan 	if (aggr_conn->timer_scheduled)
16447baef812SVasanthakumar Thiagarajan 		mod_timer(&aggr_conn->timer,
1645bdcd8170SKalle Valo 			  jiffies + msecs_to_jiffies(AGGR_RX_TIMEOUT));
1646bdcd8170SKalle Valo }
1647bdcd8170SKalle Valo 
16487baef812SVasanthakumar Thiagarajan static void aggr_delete_tid_state(struct aggr_info_conn *aggr_conn, u8 tid)
1649bdcd8170SKalle Valo {
1650bdcd8170SKalle Valo 	struct rxtid *rxtid;
1651bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1652bdcd8170SKalle Valo 
16537baef812SVasanthakumar Thiagarajan 	if (!aggr_conn || tid >= NUM_OF_TIDS)
1654bdcd8170SKalle Valo 		return;
1655bdcd8170SKalle Valo 
16567baef812SVasanthakumar Thiagarajan 	rxtid = &aggr_conn->rx_tid[tid];
16577baef812SVasanthakumar Thiagarajan 	stats = &aggr_conn->stat[tid];
1658bdcd8170SKalle Valo 
1659bdcd8170SKalle Valo 	if (rxtid->aggr)
16601d2a4456SVasanthakumar Thiagarajan 		aggr_deque_frms(aggr_conn, tid, 0, 0);
1661bdcd8170SKalle Valo 
1662bdcd8170SKalle Valo 	rxtid->aggr = false;
1663bdcd8170SKalle Valo 	rxtid->progress = false;
1664bdcd8170SKalle Valo 	rxtid->timer_mon = false;
1665bdcd8170SKalle Valo 	rxtid->win_sz = 0;
1666bdcd8170SKalle Valo 	rxtid->seq_next = 0;
1667bdcd8170SKalle Valo 	rxtid->hold_q_sz = 0;
1668bdcd8170SKalle Valo 
1669bdcd8170SKalle Valo 	kfree(rxtid->hold_q);
1670bdcd8170SKalle Valo 	rxtid->hold_q = NULL;
1671bdcd8170SKalle Valo 
1672bdcd8170SKalle Valo 	memset(stats, 0, sizeof(struct rxtid_stats));
1673bdcd8170SKalle Valo }
1674bdcd8170SKalle Valo 
16753fdc0991SVasanthakumar Thiagarajan void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid_mux, u16 seq_no,
1676240d2799SVasanthakumar Thiagarajan 			     u8 win_sz)
1677bdcd8170SKalle Valo {
16781d2a4456SVasanthakumar Thiagarajan 	struct ath6kl_sta *sta;
16791d2a4456SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn = NULL;
1680bdcd8170SKalle Valo 	struct rxtid *rxtid;
1681bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1682bdcd8170SKalle Valo 	u16 hold_q_size;
16831d2a4456SVasanthakumar Thiagarajan 	u8 tid, aid;
1684bdcd8170SKalle Valo 
16851d2a4456SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
16861d2a4456SVasanthakumar Thiagarajan 		aid = ath6kl_get_aid(tid_mux);
16871d2a4456SVasanthakumar Thiagarajan 		sta = ath6kl_find_sta_by_aid(vif->ar, aid);
16881d2a4456SVasanthakumar Thiagarajan 		if (sta)
16891d2a4456SVasanthakumar Thiagarajan 			aggr_conn = sta->aggr_conn;
16901d2a4456SVasanthakumar Thiagarajan 	} else
16911d2a4456SVasanthakumar Thiagarajan 		aggr_conn = vif->aggr_cntxt->aggr_conn;
16921d2a4456SVasanthakumar Thiagarajan 
16931d2a4456SVasanthakumar Thiagarajan 	if (!aggr_conn)
1694bdcd8170SKalle Valo 		return;
1695bdcd8170SKalle Valo 
16963fdc0991SVasanthakumar Thiagarajan 	tid = ath6kl_get_tid(tid_mux);
16973fdc0991SVasanthakumar Thiagarajan 	if (tid >= NUM_OF_TIDS)
16983fdc0991SVasanthakumar Thiagarajan 		return;
16993fdc0991SVasanthakumar Thiagarajan 
17007baef812SVasanthakumar Thiagarajan 	rxtid = &aggr_conn->rx_tid[tid];
17017baef812SVasanthakumar Thiagarajan 	stats = &aggr_conn->stat[tid];
1702bdcd8170SKalle Valo 
1703bdcd8170SKalle Valo 	if (win_sz < AGGR_WIN_SZ_MIN || win_sz > AGGR_WIN_SZ_MAX)
1704bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: win_sz %d, tid %d\n",
1705bdcd8170SKalle Valo 			   __func__, win_sz, tid);
1706bdcd8170SKalle Valo 
1707bdcd8170SKalle Valo 	if (rxtid->aggr)
17087baef812SVasanthakumar Thiagarajan 		aggr_delete_tid_state(aggr_conn, tid);
1709bdcd8170SKalle Valo 
1710bdcd8170SKalle Valo 	rxtid->seq_next = seq_no;
1711bdcd8170SKalle Valo 	hold_q_size = TID_WINDOW_SZ(win_sz) * sizeof(struct skb_hold_q);
1712bdcd8170SKalle Valo 	rxtid->hold_q = kzalloc(hold_q_size, GFP_KERNEL);
1713bdcd8170SKalle Valo 	if (!rxtid->hold_q)
1714bdcd8170SKalle Valo 		return;
1715bdcd8170SKalle Valo 
1716bdcd8170SKalle Valo 	rxtid->win_sz = win_sz;
1717bdcd8170SKalle Valo 	rxtid->hold_q_sz = TID_WINDOW_SZ(win_sz);
1718bdcd8170SKalle Valo 	if (!skb_queue_empty(&rxtid->q))
1719bdcd8170SKalle Valo 		return;
1720bdcd8170SKalle Valo 
1721bdcd8170SKalle Valo 	rxtid->aggr = true;
1722bdcd8170SKalle Valo }
1723bdcd8170SKalle Valo 
1724c8651541SVasanthakumar Thiagarajan void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info,
1725c8651541SVasanthakumar Thiagarajan 		    struct aggr_info_conn *aggr_conn)
1726bdcd8170SKalle Valo {
1727bdcd8170SKalle Valo 	struct rxtid *rxtid;
1728bdcd8170SKalle Valo 	u8 i;
1729bdcd8170SKalle Valo 
17307baef812SVasanthakumar Thiagarajan 	aggr_conn->aggr_sz = AGGR_SZ_DEFAULT;
17317baef812SVasanthakumar Thiagarajan 	aggr_conn->dev = vif->ndev;
17327baef812SVasanthakumar Thiagarajan 	init_timer(&aggr_conn->timer);
17337baef812SVasanthakumar Thiagarajan 	aggr_conn->timer.function = aggr_timeout;
17347baef812SVasanthakumar Thiagarajan 	aggr_conn->timer.data = (unsigned long) aggr_conn;
1735c8651541SVasanthakumar Thiagarajan 	aggr_conn->aggr_info = aggr_info;
17367baef812SVasanthakumar Thiagarajan 
17377baef812SVasanthakumar Thiagarajan 	aggr_conn->timer_scheduled = false;
17387baef812SVasanthakumar Thiagarajan 
17397baef812SVasanthakumar Thiagarajan 	for (i = 0; i < NUM_OF_TIDS; i++) {
17407baef812SVasanthakumar Thiagarajan 		rxtid = &aggr_conn->rx_tid[i];
17417baef812SVasanthakumar Thiagarajan 		rxtid->aggr = false;
17427baef812SVasanthakumar Thiagarajan 		rxtid->progress = false;
17437baef812SVasanthakumar Thiagarajan 		rxtid->timer_mon = false;
17447baef812SVasanthakumar Thiagarajan 		skb_queue_head_init(&rxtid->q);
17457baef812SVasanthakumar Thiagarajan 		spin_lock_init(&rxtid->lock);
17467baef812SVasanthakumar Thiagarajan 	}
17477baef812SVasanthakumar Thiagarajan 
17487baef812SVasanthakumar Thiagarajan }
17497baef812SVasanthakumar Thiagarajan 
17507baef812SVasanthakumar Thiagarajan struct aggr_info *aggr_init(struct ath6kl_vif *vif)
17517baef812SVasanthakumar Thiagarajan {
17527baef812SVasanthakumar Thiagarajan 	struct aggr_info *p_aggr = NULL;
17537baef812SVasanthakumar Thiagarajan 
1754bdcd8170SKalle Valo 	p_aggr = kzalloc(sizeof(struct aggr_info), GFP_KERNEL);
1755bdcd8170SKalle Valo 	if (!p_aggr) {
1756bdcd8170SKalle Valo 		ath6kl_err("failed to alloc memory for aggr_node\n");
1757bdcd8170SKalle Valo 		return NULL;
1758bdcd8170SKalle Valo 	}
1759bdcd8170SKalle Valo 
17607baef812SVasanthakumar Thiagarajan 	p_aggr->aggr_conn = kzalloc(sizeof(struct aggr_info_conn), GFP_KERNEL);
17617baef812SVasanthakumar Thiagarajan 	if (!p_aggr->aggr_conn) {
17627baef812SVasanthakumar Thiagarajan 		ath6kl_err("failed to alloc memory for connection specific aggr info\n");
17637baef812SVasanthakumar Thiagarajan 		kfree(p_aggr);
17647baef812SVasanthakumar Thiagarajan 		return NULL;
1765bdcd8170SKalle Valo 	}
1766bdcd8170SKalle Valo 
1767c8651541SVasanthakumar Thiagarajan 	aggr_conn_init(vif, p_aggr, p_aggr->aggr_conn);
17687baef812SVasanthakumar Thiagarajan 
17697baef812SVasanthakumar Thiagarajan 	skb_queue_head_init(&p_aggr->rx_amsdu_freeq);
17707baef812SVasanthakumar Thiagarajan 	ath6kl_alloc_netbufs(&p_aggr->rx_amsdu_freeq, AGGR_NUM_OF_FREE_NETBUFS);
17717baef812SVasanthakumar Thiagarajan 
1772bdcd8170SKalle Valo 	return p_aggr;
1773bdcd8170SKalle Valo }
1774bdcd8170SKalle Valo 
17753fdc0991SVasanthakumar Thiagarajan void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid_mux)
1776bdcd8170SKalle Valo {
17771d2a4456SVasanthakumar Thiagarajan 	struct ath6kl_sta *sta;
1778bdcd8170SKalle Valo 	struct rxtid *rxtid;
17791d2a4456SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn = NULL;
17801d2a4456SVasanthakumar Thiagarajan 	u8 tid, aid;
1781bdcd8170SKalle Valo 
17821d2a4456SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
17831d2a4456SVasanthakumar Thiagarajan 		aid = ath6kl_get_aid(tid_mux);
17841d2a4456SVasanthakumar Thiagarajan 		sta = ath6kl_find_sta_by_aid(vif->ar, aid);
17851d2a4456SVasanthakumar Thiagarajan 		if (sta)
17861d2a4456SVasanthakumar Thiagarajan 			aggr_conn = sta->aggr_conn;
17871d2a4456SVasanthakumar Thiagarajan 	} else
17881d2a4456SVasanthakumar Thiagarajan 		aggr_conn = vif->aggr_cntxt->aggr_conn;
17891d2a4456SVasanthakumar Thiagarajan 
17901d2a4456SVasanthakumar Thiagarajan 	if (!aggr_conn)
1791bdcd8170SKalle Valo 		return;
1792bdcd8170SKalle Valo 
17933fdc0991SVasanthakumar Thiagarajan 	tid = ath6kl_get_tid(tid_mux);
17943fdc0991SVasanthakumar Thiagarajan 	if (tid >= NUM_OF_TIDS)
17953fdc0991SVasanthakumar Thiagarajan 		return;
17963fdc0991SVasanthakumar Thiagarajan 
17977baef812SVasanthakumar Thiagarajan 	rxtid = &aggr_conn->rx_tid[tid];
1798bdcd8170SKalle Valo 
1799bdcd8170SKalle Valo 	if (rxtid->aggr)
18007baef812SVasanthakumar Thiagarajan 		aggr_delete_tid_state(aggr_conn, tid);
1801bdcd8170SKalle Valo }
1802bdcd8170SKalle Valo 
18031d2a4456SVasanthakumar Thiagarajan void aggr_reset_state(struct aggr_info_conn *aggr_conn)
1804bdcd8170SKalle Valo {
1805bdcd8170SKalle Valo 	u8 tid;
1806bdcd8170SKalle Valo 
18071d2a4456SVasanthakumar Thiagarajan 	if (!aggr_conn)
18087baef812SVasanthakumar Thiagarajan 		return;
18097baef812SVasanthakumar Thiagarajan 
18101d2a4456SVasanthakumar Thiagarajan 	if (aggr_conn->timer_scheduled) {
18111d2a4456SVasanthakumar Thiagarajan 		del_timer(&aggr_conn->timer);
18121d2a4456SVasanthakumar Thiagarajan 		aggr_conn->timer_scheduled = false;
18137a950ea8SVasanthakumar Thiagarajan 	}
18147a950ea8SVasanthakumar Thiagarajan 
1815bdcd8170SKalle Valo 	for (tid = 0; tid < NUM_OF_TIDS; tid++)
18161d2a4456SVasanthakumar Thiagarajan 		aggr_delete_tid_state(aggr_conn, tid);
1817bdcd8170SKalle Valo }
1818bdcd8170SKalle Valo 
1819bdcd8170SKalle Valo /* clean up our amsdu buffer list */
1820bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar)
1821bdcd8170SKalle Valo {
1822bdcd8170SKalle Valo 	struct htc_packet *packet, *tmp_pkt;
1823bdcd8170SKalle Valo 
1824bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
1825bdcd8170SKalle Valo 	if (list_empty(&ar->amsdu_rx_buffer_queue)) {
1826bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
1827bdcd8170SKalle Valo 		return;
1828bdcd8170SKalle Valo 	}
1829bdcd8170SKalle Valo 
1830bdcd8170SKalle Valo 	list_for_each_entry_safe(packet, tmp_pkt, &ar->amsdu_rx_buffer_queue,
1831bdcd8170SKalle Valo 				 list) {
1832bdcd8170SKalle Valo 		list_del(&packet->list);
1833bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
1834bdcd8170SKalle Valo 		dev_kfree_skb(packet->pkt_cntxt);
1835bdcd8170SKalle Valo 		spin_lock_bh(&ar->lock);
1836bdcd8170SKalle Valo 	}
1837bdcd8170SKalle Valo 
1838bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
1839bdcd8170SKalle Valo }
1840bdcd8170SKalle Valo 
1841bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info)
1842bdcd8170SKalle Valo {
18431d2a4456SVasanthakumar Thiagarajan 	if (!aggr_info)
1844bdcd8170SKalle Valo 		return;
1845bdcd8170SKalle Valo 
18461d2a4456SVasanthakumar Thiagarajan 	aggr_reset_state(aggr_info->aggr_conn);
18477baef812SVasanthakumar Thiagarajan 	skb_queue_purge(&aggr_info->rx_amsdu_freeq);
18487baef812SVasanthakumar Thiagarajan 	kfree(aggr_info->aggr_conn);
1849bdcd8170SKalle Valo 	kfree(aggr_info);
1850bdcd8170SKalle Valo }
1851