1bdcd8170SKalle Valo /*
2bdcd8170SKalle Valo  * Copyright (c) 2004-2011 Atheros Communications Inc.
31b2df407SVasanthakumar Thiagarajan  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
4bdcd8170SKalle Valo  *
5bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
6bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
7bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
8bdcd8170SKalle Valo  *
9bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16bdcd8170SKalle Valo  */
17bdcd8170SKalle Valo 
18516304b0SJoe Perches #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19516304b0SJoe Perches 
20bdcd8170SKalle Valo #include "core.h"
21bdcd8170SKalle Valo #include "debug.h"
22e76ac2bfSKalle Valo #include "htc-ops.h"
23416cf0b4SKalle Valo #include "trace.h"
24bdcd8170SKalle Valo 
253fdc0991SVasanthakumar Thiagarajan /*
263fdc0991SVasanthakumar Thiagarajan  * tid - tid_mux0..tid_mux3
273fdc0991SVasanthakumar Thiagarajan  * aid - tid_mux4..tid_mux7
283fdc0991SVasanthakumar Thiagarajan  */
293fdc0991SVasanthakumar Thiagarajan #define ATH6KL_TID_MASK 0xf
301d2a4456SVasanthakumar Thiagarajan #define ATH6KL_AID_SHIFT 4
313fdc0991SVasanthakumar Thiagarajan 
ath6kl_get_tid(u8 tid_mux)323fdc0991SVasanthakumar Thiagarajan static inline u8 ath6kl_get_tid(u8 tid_mux)
333fdc0991SVasanthakumar Thiagarajan {
343fdc0991SVasanthakumar Thiagarajan 	return tid_mux & ATH6KL_TID_MASK;
353fdc0991SVasanthakumar Thiagarajan }
363fdc0991SVasanthakumar Thiagarajan 
ath6kl_get_aid(u8 tid_mux)371d2a4456SVasanthakumar Thiagarajan static inline u8 ath6kl_get_aid(u8 tid_mux)
381d2a4456SVasanthakumar Thiagarajan {
391d2a4456SVasanthakumar Thiagarajan 	return tid_mux >> ATH6KL_AID_SHIFT;
401d2a4456SVasanthakumar Thiagarajan }
411d2a4456SVasanthakumar Thiagarajan 
ath6kl_ibss_map_epid(struct sk_buff * skb,struct net_device * dev,u32 * map_no)42bdcd8170SKalle Valo static u8 ath6kl_ibss_map_epid(struct sk_buff *skb, struct net_device *dev,
43bdcd8170SKalle Valo 			       u32 *map_no)
44bdcd8170SKalle Valo {
45bdcd8170SKalle Valo 	struct ath6kl *ar = ath6kl_priv(dev);
46bdcd8170SKalle Valo 	struct ethhdr *eth_hdr;
47bdcd8170SKalle Valo 	u32 i, ep_map = -1;
48bdcd8170SKalle Valo 	u8 *datap;
49bdcd8170SKalle Valo 
50bdcd8170SKalle Valo 	*map_no = 0;
51bdcd8170SKalle Valo 	datap = skb->data;
52bdcd8170SKalle Valo 	eth_hdr = (struct ethhdr *) (datap + sizeof(struct wmi_data_hdr));
53bdcd8170SKalle Valo 
54bdcd8170SKalle Valo 	if (is_multicast_ether_addr(eth_hdr->h_dest))
55bdcd8170SKalle Valo 		return ENDPOINT_2;
56bdcd8170SKalle Valo 
57bdcd8170SKalle Valo 	for (i = 0; i < ar->node_num; i++) {
58bdcd8170SKalle Valo 		if (memcmp(eth_hdr->h_dest, ar->node_map[i].mac_addr,
59bdcd8170SKalle Valo 			   ETH_ALEN) == 0) {
60bdcd8170SKalle Valo 			*map_no = i + 1;
61bdcd8170SKalle Valo 			ar->node_map[i].tx_pend++;
62bdcd8170SKalle Valo 			return ar->node_map[i].ep_id;
63bdcd8170SKalle Valo 		}
64bdcd8170SKalle Valo 
65bdcd8170SKalle Valo 		if ((ep_map == -1) && !ar->node_map[i].tx_pend)
66bdcd8170SKalle Valo 			ep_map = i;
67bdcd8170SKalle Valo 	}
68bdcd8170SKalle Valo 
69bdcd8170SKalle Valo 	if (ep_map == -1) {
70bdcd8170SKalle Valo 		ep_map = ar->node_num;
71bdcd8170SKalle Valo 		ar->node_num++;
72bdcd8170SKalle Valo 		if (ar->node_num > MAX_NODE_NUM)
73bdcd8170SKalle Valo 			return ENDPOINT_UNUSED;
74bdcd8170SKalle Valo 	}
75bdcd8170SKalle Valo 
76bdcd8170SKalle Valo 	memcpy(ar->node_map[ep_map].mac_addr, eth_hdr->h_dest, ETH_ALEN);
77bdcd8170SKalle Valo 
78bdcd8170SKalle Valo 	for (i = ENDPOINT_2; i <= ENDPOINT_5; i++) {
79bdcd8170SKalle Valo 		if (!ar->tx_pending[i]) {
80bdcd8170SKalle Valo 			ar->node_map[ep_map].ep_id = i;
81bdcd8170SKalle Valo 			break;
82bdcd8170SKalle Valo 		}
83bdcd8170SKalle Valo 
84bdcd8170SKalle Valo 		/*
85bdcd8170SKalle Valo 		 * No free endpoint is available, start redistribution on
86bdcd8170SKalle Valo 		 * the inuse endpoints.
87bdcd8170SKalle Valo 		 */
88bdcd8170SKalle Valo 		if (i == ENDPOINT_5) {
89bdcd8170SKalle Valo 			ar->node_map[ep_map].ep_id = ar->next_ep_id;
90bdcd8170SKalle Valo 			ar->next_ep_id++;
91bdcd8170SKalle Valo 			if (ar->next_ep_id > ENDPOINT_5)
92bdcd8170SKalle Valo 				ar->next_ep_id = ENDPOINT_2;
93bdcd8170SKalle Valo 		}
94bdcd8170SKalle Valo 	}
95bdcd8170SKalle Valo 
96bdcd8170SKalle Valo 	*map_no = ep_map + 1;
97bdcd8170SKalle Valo 	ar->node_map[ep_map].tx_pend++;
98bdcd8170SKalle Valo 
99bdcd8170SKalle Valo 	return ar->node_map[ep_map].ep_id;
100bdcd8170SKalle Valo }
101bdcd8170SKalle Valo 
ath6kl_process_uapsdq(struct ath6kl_sta * conn,struct ath6kl_vif * vif,struct sk_buff * skb,u32 * flags)102c1762a3fSThirumalai Pachamuthu static bool ath6kl_process_uapsdq(struct ath6kl_sta *conn,
103c1762a3fSThirumalai Pachamuthu 				struct ath6kl_vif *vif,
104c1762a3fSThirumalai Pachamuthu 				struct sk_buff *skb,
105c1762a3fSThirumalai Pachamuthu 				u32 *flags)
106c1762a3fSThirumalai Pachamuthu {
107c1762a3fSThirumalai Pachamuthu 	struct ath6kl *ar = vif->ar;
108c1762a3fSThirumalai Pachamuthu 	bool is_apsdq_empty = false;
109c1762a3fSThirumalai Pachamuthu 	struct ethhdr *datap = (struct ethhdr *) skb->data;
110e5726028SKalle Valo 	u8 up = 0, traffic_class, *ip_hdr;
111c1762a3fSThirumalai Pachamuthu 	u16 ether_type;
112c1762a3fSThirumalai Pachamuthu 	struct ath6kl_llc_snap_hdr *llc_hdr;
113c1762a3fSThirumalai Pachamuthu 
114c1762a3fSThirumalai Pachamuthu 	if (conn->sta_flags & STA_PS_APSD_TRIGGER) {
115c1762a3fSThirumalai Pachamuthu 		/*
116c1762a3fSThirumalai Pachamuthu 		 * This tx is because of a uAPSD trigger, determine
117c1762a3fSThirumalai Pachamuthu 		 * more and EOSP bit. Set EOSP if queue is empty
118c1762a3fSThirumalai Pachamuthu 		 * or sufficient frames are delivered for this trigger.
119c1762a3fSThirumalai Pachamuthu 		 */
120c1762a3fSThirumalai Pachamuthu 		spin_lock_bh(&conn->psq_lock);
121c1762a3fSThirumalai Pachamuthu 		if (!skb_queue_empty(&conn->apsdq))
122c1762a3fSThirumalai Pachamuthu 			*flags |= WMI_DATA_HDR_FLAGS_MORE;
123c1762a3fSThirumalai Pachamuthu 		else if (conn->sta_flags & STA_PS_APSD_EOSP)
124c1762a3fSThirumalai Pachamuthu 			*flags |= WMI_DATA_HDR_FLAGS_EOSP;
125c1762a3fSThirumalai Pachamuthu 		*flags |= WMI_DATA_HDR_FLAGS_UAPSD;
126c1762a3fSThirumalai Pachamuthu 		spin_unlock_bh(&conn->psq_lock);
127c1762a3fSThirumalai Pachamuthu 		return false;
128a5d8f9dfSKalle Valo 	} else if (!conn->apsd_info) {
129c1762a3fSThirumalai Pachamuthu 		return false;
130a5d8f9dfSKalle Valo 	}
131c1762a3fSThirumalai Pachamuthu 
132c1762a3fSThirumalai Pachamuthu 	if (test_bit(WMM_ENABLED, &vif->flags)) {
133c1762a3fSThirumalai Pachamuthu 		ether_type = be16_to_cpu(datap->h_proto);
134c1762a3fSThirumalai Pachamuthu 		if (is_ethertype(ether_type)) {
135c1762a3fSThirumalai Pachamuthu 			/* packet is in DIX format  */
136c1762a3fSThirumalai Pachamuthu 			ip_hdr = (u8 *)(datap + 1);
137c1762a3fSThirumalai Pachamuthu 		} else {
138c1762a3fSThirumalai Pachamuthu 			/* packet is in 802.3 format */
139c1762a3fSThirumalai Pachamuthu 			llc_hdr = (struct ath6kl_llc_snap_hdr *)
140c1762a3fSThirumalai Pachamuthu 							(datap + 1);
141c1762a3fSThirumalai Pachamuthu 			ether_type = be16_to_cpu(llc_hdr->eth_type);
142c1762a3fSThirumalai Pachamuthu 			ip_hdr = (u8 *)(llc_hdr + 1);
143c1762a3fSThirumalai Pachamuthu 		}
144c1762a3fSThirumalai Pachamuthu 
145c1762a3fSThirumalai Pachamuthu 		if (ether_type == IP_ETHERTYPE)
146c1762a3fSThirumalai Pachamuthu 			up = ath6kl_wmi_determine_user_priority(
147c1762a3fSThirumalai Pachamuthu 							ip_hdr, 0);
148c1762a3fSThirumalai Pachamuthu 	}
149c1762a3fSThirumalai Pachamuthu 
150c1762a3fSThirumalai Pachamuthu 	traffic_class = ath6kl_wmi_get_traffic_class(up);
151c1762a3fSThirumalai Pachamuthu 
152c1762a3fSThirumalai Pachamuthu 	if ((conn->apsd_info & (1 << traffic_class)) == 0)
153c1762a3fSThirumalai Pachamuthu 		return false;
154c1762a3fSThirumalai Pachamuthu 
155c1762a3fSThirumalai Pachamuthu 	/* Queue the frames if the STA is sleeping */
156c1762a3fSThirumalai Pachamuthu 	spin_lock_bh(&conn->psq_lock);
157c1762a3fSThirumalai Pachamuthu 	is_apsdq_empty = skb_queue_empty(&conn->apsdq);
158c1762a3fSThirumalai Pachamuthu 	skb_queue_tail(&conn->apsdq, skb);
159c1762a3fSThirumalai Pachamuthu 	spin_unlock_bh(&conn->psq_lock);
160c1762a3fSThirumalai Pachamuthu 
161c1762a3fSThirumalai Pachamuthu 	/*
162c1762a3fSThirumalai Pachamuthu 	 * If this is the first pkt getting queued
163c1762a3fSThirumalai Pachamuthu 	 * for this STA, update the PVB for this STA
164c1762a3fSThirumalai Pachamuthu 	 */
165c1762a3fSThirumalai Pachamuthu 	if (is_apsdq_empty) {
166c1762a3fSThirumalai Pachamuthu 		ath6kl_wmi_set_apsd_bfrd_traf(ar->wmi,
167c1762a3fSThirumalai Pachamuthu 					      vif->fw_vif_idx,
168c1762a3fSThirumalai Pachamuthu 					      conn->aid, 1, 0);
169c1762a3fSThirumalai Pachamuthu 	}
170c1762a3fSThirumalai Pachamuthu 	*flags |= WMI_DATA_HDR_FLAGS_UAPSD;
171c1762a3fSThirumalai Pachamuthu 
172c1762a3fSThirumalai Pachamuthu 	return true;
173c1762a3fSThirumalai Pachamuthu }
174c1762a3fSThirumalai Pachamuthu 
ath6kl_process_psq(struct ath6kl_sta * conn,struct ath6kl_vif * vif,struct sk_buff * skb,u32 * flags)175c1762a3fSThirumalai Pachamuthu static bool ath6kl_process_psq(struct ath6kl_sta *conn,
176c1762a3fSThirumalai Pachamuthu 				struct ath6kl_vif *vif,
177c1762a3fSThirumalai Pachamuthu 				struct sk_buff *skb,
178c1762a3fSThirumalai Pachamuthu 				u32 *flags)
179c1762a3fSThirumalai Pachamuthu {
180c1762a3fSThirumalai Pachamuthu 	bool is_psq_empty = false;
181c1762a3fSThirumalai Pachamuthu 	struct ath6kl *ar = vif->ar;
182c1762a3fSThirumalai Pachamuthu 
183c1762a3fSThirumalai Pachamuthu 	if (conn->sta_flags & STA_PS_POLLED) {
184c1762a3fSThirumalai Pachamuthu 		spin_lock_bh(&conn->psq_lock);
185c1762a3fSThirumalai Pachamuthu 		if (!skb_queue_empty(&conn->psq))
186c1762a3fSThirumalai Pachamuthu 			*flags |= WMI_DATA_HDR_FLAGS_MORE;
187c1762a3fSThirumalai Pachamuthu 		spin_unlock_bh(&conn->psq_lock);
188c1762a3fSThirumalai Pachamuthu 		return false;
189c1762a3fSThirumalai Pachamuthu 	}
190c1762a3fSThirumalai Pachamuthu 
191c1762a3fSThirumalai Pachamuthu 	/* Queue the frames if the STA is sleeping */
192c1762a3fSThirumalai Pachamuthu 	spin_lock_bh(&conn->psq_lock);
193c1762a3fSThirumalai Pachamuthu 	is_psq_empty = skb_queue_empty(&conn->psq);
194c1762a3fSThirumalai Pachamuthu 	skb_queue_tail(&conn->psq, skb);
195c1762a3fSThirumalai Pachamuthu 	spin_unlock_bh(&conn->psq_lock);
196c1762a3fSThirumalai Pachamuthu 
197c1762a3fSThirumalai Pachamuthu 	/*
198c1762a3fSThirumalai Pachamuthu 	 * If this is the first pkt getting queued
199c1762a3fSThirumalai Pachamuthu 	 * for this STA, update the PVB for this
200c1762a3fSThirumalai Pachamuthu 	 * STA.
201c1762a3fSThirumalai Pachamuthu 	 */
202c1762a3fSThirumalai Pachamuthu 	if (is_psq_empty)
203c1762a3fSThirumalai Pachamuthu 		ath6kl_wmi_set_pvb_cmd(ar->wmi,
204c1762a3fSThirumalai Pachamuthu 				       vif->fw_vif_idx,
205c1762a3fSThirumalai Pachamuthu 				       conn->aid, 1);
206c1762a3fSThirumalai Pachamuthu 	return true;
207c1762a3fSThirumalai Pachamuthu }
208c1762a3fSThirumalai Pachamuthu 
ath6kl_powersave_ap(struct ath6kl_vif * vif,struct sk_buff * skb,u32 * flags)2096765d0aaSVasanthakumar Thiagarajan static bool ath6kl_powersave_ap(struct ath6kl_vif *vif, struct sk_buff *skb,
210c1762a3fSThirumalai Pachamuthu 				u32 *flags)
211bdcd8170SKalle Valo {
212bdcd8170SKalle Valo 	struct ethhdr *datap = (struct ethhdr *) skb->data;
213bdcd8170SKalle Valo 	struct ath6kl_sta *conn = NULL;
214c1762a3fSThirumalai Pachamuthu 	bool ps_queued = false;
2156765d0aaSVasanthakumar Thiagarajan 	struct ath6kl *ar = vif->ar;
216bdcd8170SKalle Valo 
217bdcd8170SKalle Valo 	if (is_multicast_ether_addr(datap->h_dest)) {
218bdcd8170SKalle Valo 		u8 ctr = 0;
219bdcd8170SKalle Valo 		bool q_mcast = false;
220bdcd8170SKalle Valo 
221bdcd8170SKalle Valo 		for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
222bdcd8170SKalle Valo 			if (ar->sta_list[ctr].sta_flags & STA_PS_SLEEP) {
223bdcd8170SKalle Valo 				q_mcast = true;
224bdcd8170SKalle Valo 				break;
225bdcd8170SKalle Valo 			}
226bdcd8170SKalle Valo 		}
227bdcd8170SKalle Valo 
228bdcd8170SKalle Valo 		if (q_mcast) {
229bdcd8170SKalle Valo 			/*
230bdcd8170SKalle Valo 			 * If this transmit is not because of a Dtim Expiry
231bdcd8170SKalle Valo 			 * q it.
232bdcd8170SKalle Valo 			 */
23359c98449SVasanthakumar Thiagarajan 			if (!test_bit(DTIM_EXPIRED, &vif->flags)) {
234bdcd8170SKalle Valo 				bool is_mcastq_empty = false;
235bdcd8170SKalle Valo 
236bdcd8170SKalle Valo 				spin_lock_bh(&ar->mcastpsq_lock);
237bdcd8170SKalle Valo 				is_mcastq_empty =
238bdcd8170SKalle Valo 					skb_queue_empty(&ar->mcastpsq);
239bdcd8170SKalle Valo 				skb_queue_tail(&ar->mcastpsq, skb);
240bdcd8170SKalle Valo 				spin_unlock_bh(&ar->mcastpsq_lock);
241bdcd8170SKalle Valo 
242bdcd8170SKalle Valo 				/*
243bdcd8170SKalle Valo 				 * If this is the first Mcast pkt getting
244bdcd8170SKalle Valo 				 * queued indicate to the target to set the
245bdcd8170SKalle Valo 				 * BitmapControl LSB of the TIM IE.
246bdcd8170SKalle Valo 				 */
247bdcd8170SKalle Valo 				if (is_mcastq_empty)
248bdcd8170SKalle Valo 					ath6kl_wmi_set_pvb_cmd(ar->wmi,
249334234b5SVasanthakumar Thiagarajan 							       vif->fw_vif_idx,
250bdcd8170SKalle Valo 							       MCAST_AID, 1);
251bdcd8170SKalle Valo 
252bdcd8170SKalle Valo 				ps_queued = true;
253bdcd8170SKalle Valo 			} else {
254bdcd8170SKalle Valo 				/*
255bdcd8170SKalle Valo 				 * This transmit is because of Dtim expiry.
256bdcd8170SKalle Valo 				 * Determine if MoreData bit has to be set.
257bdcd8170SKalle Valo 				 */
258bdcd8170SKalle Valo 				spin_lock_bh(&ar->mcastpsq_lock);
259bdcd8170SKalle Valo 				if (!skb_queue_empty(&ar->mcastpsq))
260c1762a3fSThirumalai Pachamuthu 					*flags |= WMI_DATA_HDR_FLAGS_MORE;
261bdcd8170SKalle Valo 				spin_unlock_bh(&ar->mcastpsq_lock);
262bdcd8170SKalle Valo 			}
263bdcd8170SKalle Valo 		}
264bdcd8170SKalle Valo 	} else {
2656765d0aaSVasanthakumar Thiagarajan 		conn = ath6kl_find_sta(vif, datap->h_dest);
266bdcd8170SKalle Valo 		if (!conn) {
267bdcd8170SKalle Valo 			dev_kfree_skb(skb);
268bdcd8170SKalle Valo 
269bdcd8170SKalle Valo 			/* Inform the caller that the skb is consumed */
270bdcd8170SKalle Valo 			return true;
271bdcd8170SKalle Valo 		}
272bdcd8170SKalle Valo 
273bdcd8170SKalle Valo 		if (conn->sta_flags & STA_PS_SLEEP) {
274c1762a3fSThirumalai Pachamuthu 			ps_queued = ath6kl_process_uapsdq(conn,
275c1762a3fSThirumalai Pachamuthu 						vif, skb, flags);
276c1762a3fSThirumalai Pachamuthu 			if (!(*flags & WMI_DATA_HDR_FLAGS_UAPSD))
277c1762a3fSThirumalai Pachamuthu 				ps_queued = ath6kl_process_psq(conn,
278c1762a3fSThirumalai Pachamuthu 						vif, skb, flags);
279bdcd8170SKalle Valo 		}
280bdcd8170SKalle Valo 	}
281bdcd8170SKalle Valo 	return ps_queued;
282bdcd8170SKalle Valo }
283bdcd8170SKalle Valo 
284bdcd8170SKalle Valo /* Tx functions */
285bdcd8170SKalle Valo 
ath6kl_control_tx(void * devt,struct sk_buff * skb,enum htc_endpoint_id eid)286bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb,
287bdcd8170SKalle Valo 		      enum htc_endpoint_id eid)
288bdcd8170SKalle Valo {
289bdcd8170SKalle Valo 	struct ath6kl *ar = devt;
290bdcd8170SKalle Valo 	int status = 0;
291bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie = NULL;
292bdcd8170SKalle Valo 
293416cf0b4SKalle Valo 	trace_ath6kl_wmi_cmd(skb->data, skb->len);
294416cf0b4SKalle Valo 
29558109df6SVasanthakumar Thiagarajan 	if (WARN_ON_ONCE(ar->state == ATH6KL_STATE_WOW)) {
2960616dc1fSVasanthakumar Thiagarajan 		dev_kfree_skb(skb);
297390a8c8fSRaja Mani 		return -EACCES;
2980616dc1fSVasanthakumar Thiagarajan 	}
299390a8c8fSRaja Mani 
300363f149cSRaja Mani 	if (WARN_ON_ONCE(eid == ENDPOINT_UNUSED ||
301363f149cSRaja Mani 			 eid >= ENDPOINT_MAX)) {
302363f149cSRaja Mani 		status = -EINVAL;
303363f149cSRaja Mani 		goto fail_ctrl_tx;
304363f149cSRaja Mani 	}
305363f149cSRaja Mani 
306bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
307bdcd8170SKalle Valo 
308bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
309bdcd8170SKalle Valo 		   "%s: skb=0x%p, len=0x%x eid =%d\n", __func__,
310bdcd8170SKalle Valo 		   skb, skb->len, eid);
311bdcd8170SKalle Valo 
312bdcd8170SKalle Valo 	if (test_bit(WMI_CTRL_EP_FULL, &ar->flag) && (eid == ar->ctrl_ep)) {
313bdcd8170SKalle Valo 		/*
314bdcd8170SKalle Valo 		 * Control endpoint is full, don't allocate resources, we
315bdcd8170SKalle Valo 		 * are just going to drop this packet.
316bdcd8170SKalle Valo 		 */
317bdcd8170SKalle Valo 		cookie = NULL;
318bdcd8170SKalle Valo 		ath6kl_err("wmi ctrl ep full, dropping pkt : 0x%p, len:%d\n",
319bdcd8170SKalle Valo 			   skb, skb->len);
320a5d8f9dfSKalle Valo 	} else {
321bdcd8170SKalle Valo 		cookie = ath6kl_alloc_cookie(ar);
322a5d8f9dfSKalle Valo 	}
323bdcd8170SKalle Valo 
324bdcd8170SKalle Valo 	if (cookie == NULL) {
325bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
326bdcd8170SKalle Valo 		status = -ENOMEM;
327bdcd8170SKalle Valo 		goto fail_ctrl_tx;
328bdcd8170SKalle Valo 	}
329bdcd8170SKalle Valo 
330bdcd8170SKalle Valo 	ar->tx_pending[eid]++;
331bdcd8170SKalle Valo 
332bdcd8170SKalle Valo 	if (eid != ar->ctrl_ep)
333bdcd8170SKalle Valo 		ar->total_tx_data_pend++;
334bdcd8170SKalle Valo 
335bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
336bdcd8170SKalle Valo 
337bdcd8170SKalle Valo 	cookie->skb = skb;
338bdcd8170SKalle Valo 	cookie->map_no = 0;
339bdcd8170SKalle Valo 	set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
340bdcd8170SKalle Valo 			 eid, ATH6KL_CONTROL_PKT_TAG);
341cfc10f24SKalle Valo 	cookie->htc_pkt.skb = skb;
342bdcd8170SKalle Valo 
343bdcd8170SKalle Valo 	/*
344bdcd8170SKalle Valo 	 * This interface is asynchronous, if there is an error, cleanup
345bdcd8170SKalle Valo 	 * will happen in the TX completion callback.
346bdcd8170SKalle Valo 	 */
347ad226ec2SKalle Valo 	ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
348bdcd8170SKalle Valo 
349bdcd8170SKalle Valo 	return 0;
350bdcd8170SKalle Valo 
351bdcd8170SKalle Valo fail_ctrl_tx:
352bdcd8170SKalle Valo 	dev_kfree_skb(skb);
353bdcd8170SKalle Valo 	return status;
354bdcd8170SKalle Valo }
355bdcd8170SKalle Valo 
ath6kl_data_tx(struct sk_buff * skb,struct net_device * dev)356378b1d65SLuc Van Oostenryck netdev_tx_t ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev)
357bdcd8170SKalle Valo {
358bdcd8170SKalle Valo 	struct ath6kl *ar = ath6kl_priv(dev);
359bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie = NULL;
360bdcd8170SKalle Valo 	enum htc_endpoint_id eid = ENDPOINT_UNUSED;
36159c98449SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif = netdev_priv(dev);
362bdcd8170SKalle Valo 	u32 map_no = 0;
363bdcd8170SKalle Valo 	u16 htc_tag = ATH6KL_DATA_PKT_TAG;
364bdcd8170SKalle Valo 	u8 ac = 99; /* initialize to unmapped ac */
365c1762a3fSThirumalai Pachamuthu 	bool chk_adhoc_ps_mapping = false;
366bdcd8170SKalle Valo 	int ret;
367bc48ad31SRishi Panjwani 	struct wmi_tx_meta_v2 meta_v2;
368bc48ad31SRishi Panjwani 	void *meta;
369bc48ad31SRishi Panjwani 	u8 csum_start = 0, csum_dest = 0, csum = skb->ip_summed;
370bc48ad31SRishi Panjwani 	u8 meta_ver = 0;
371c1762a3fSThirumalai Pachamuthu 	u32 flags = 0;
372bdcd8170SKalle Valo 
373bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
374bdcd8170SKalle Valo 		   "%s: skb=0x%p, data=0x%p, len=0x%x\n", __func__,
375bdcd8170SKalle Valo 		   skb, skb->data, skb->len);
376bdcd8170SKalle Valo 
377bdcd8170SKalle Valo 	/* If target is not associated */
3781881ced5SVasanthakumar Thiagarajan 	if (!test_bit(CONNECTED, &vif->flags))
3791881ced5SVasanthakumar Thiagarajan 		goto fail_tx;
380bdcd8170SKalle Valo 
3811881ced5SVasanthakumar Thiagarajan 	if (WARN_ON_ONCE(ar->state != ATH6KL_STATE_ON))
3821881ced5SVasanthakumar Thiagarajan 		goto fail_tx;
383390a8c8fSRaja Mani 
384bdcd8170SKalle Valo 	if (!test_bit(WMI_READY, &ar->flag))
385bdcd8170SKalle Valo 		goto fail_tx;
386bdcd8170SKalle Valo 
387bdcd8170SKalle Valo 	/* AP mode Power saving processing */
388f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
389c1762a3fSThirumalai Pachamuthu 		if (ath6kl_powersave_ap(vif, skb, &flags))
390bdcd8170SKalle Valo 			return 0;
391bdcd8170SKalle Valo 	}
392bdcd8170SKalle Valo 
393bdcd8170SKalle Valo 	if (test_bit(WMI_ENABLED, &ar->flag)) {
394bc48ad31SRishi Panjwani 		if ((dev->features & NETIF_F_IP_CSUM) &&
395bc48ad31SRishi Panjwani 		    (csum == CHECKSUM_PARTIAL)) {
396bc48ad31SRishi Panjwani 			csum_start = skb->csum_start -
397bc48ad31SRishi Panjwani 					(skb_network_header(skb) - skb->head) +
398bc48ad31SRishi Panjwani 					sizeof(struct ath6kl_llc_snap_hdr);
399bc48ad31SRishi Panjwani 			csum_dest = skb->csum_offset + csum_start;
400bc48ad31SRishi Panjwani 		}
401bc48ad31SRishi Panjwani 
4021ed760c9SArend Van Spriel 		if (skb_cow_head(skb, dev->needed_headroom)) {
4031235a3b6STobias Klauser 			dev->stats.tx_dropped++;
4041ed760c9SArend Van Spriel 			kfree_skb(skb);
405a29517ceSVasanthakumar Thiagarajan 			return 0;
406a29517ceSVasanthakumar Thiagarajan 		}
407bdcd8170SKalle Valo 
408bdcd8170SKalle Valo 		if (ath6kl_wmi_dix_2_dot3(ar->wmi, skb)) {
409bdcd8170SKalle Valo 			ath6kl_err("ath6kl_wmi_dix_2_dot3 failed\n");
410bdcd8170SKalle Valo 			goto fail_tx;
411bdcd8170SKalle Valo 		}
412bdcd8170SKalle Valo 
413bc48ad31SRishi Panjwani 		if ((dev->features & NETIF_F_IP_CSUM) &&
414bc48ad31SRishi Panjwani 		    (csum == CHECKSUM_PARTIAL)) {
415bc48ad31SRishi Panjwani 			meta_v2.csum_start = csum_start;
416bc48ad31SRishi Panjwani 			meta_v2.csum_dest = csum_dest;
417bc48ad31SRishi Panjwani 
418bc48ad31SRishi Panjwani 			/* instruct target to calculate checksum */
419bc48ad31SRishi Panjwani 			meta_v2.csum_flags = WMI_META_V2_FLAG_CSUM_OFFLOAD;
420bc48ad31SRishi Panjwani 			meta_ver = WMI_META_VERSION_2;
421bc48ad31SRishi Panjwani 			meta = &meta_v2;
422bc48ad31SRishi Panjwani 		} else {
423bc48ad31SRishi Panjwani 			meta_ver = 0;
424bc48ad31SRishi Panjwani 			meta = NULL;
425bc48ad31SRishi Panjwani 		}
426bc48ad31SRishi Panjwani 
427bc48ad31SRishi Panjwani 		ret = ath6kl_wmi_data_hdr_add(ar->wmi, skb,
428c1762a3fSThirumalai Pachamuthu 				DATA_MSGTYPE, flags, 0,
429bc48ad31SRishi Panjwani 				meta_ver,
430bc48ad31SRishi Panjwani 				meta, vif->fw_vif_idx);
431bc48ad31SRishi Panjwani 
432bc48ad31SRishi Panjwani 		if (ret) {
433bc48ad31SRishi Panjwani 			ath6kl_warn("failed to add wmi data header:%d\n"
434bc48ad31SRishi Panjwani 				, ret);
435bdcd8170SKalle Valo 			goto fail_tx;
436bdcd8170SKalle Valo 		}
437bdcd8170SKalle Valo 
438f5938f24SVasanthakumar Thiagarajan 		if ((vif->nw_type == ADHOC_NETWORK) &&
43959c98449SVasanthakumar Thiagarajan 		    ar->ibss_ps_enable && test_bit(CONNECTED, &vif->flags))
440bdcd8170SKalle Valo 			chk_adhoc_ps_mapping = true;
441bdcd8170SKalle Valo 		else {
442bdcd8170SKalle Valo 			/* get the stream mapping */
443240d2799SVasanthakumar Thiagarajan 			ret = ath6kl_wmi_implicit_create_pstream(ar->wmi,
444240d2799SVasanthakumar Thiagarajan 				    vif->fw_vif_idx, skb,
44559c98449SVasanthakumar Thiagarajan 				    0, test_bit(WMM_ENABLED, &vif->flags), &ac);
446bdcd8170SKalle Valo 			if (ret)
447bdcd8170SKalle Valo 				goto fail_tx;
448bdcd8170SKalle Valo 		}
449a5d8f9dfSKalle Valo 	} else {
450bdcd8170SKalle Valo 		goto fail_tx;
451a5d8f9dfSKalle Valo 	}
452bdcd8170SKalle Valo 
453bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
454bdcd8170SKalle Valo 
455bdcd8170SKalle Valo 	if (chk_adhoc_ps_mapping)
456bdcd8170SKalle Valo 		eid = ath6kl_ibss_map_epid(skb, dev, &map_no);
457bdcd8170SKalle Valo 	else
458bdcd8170SKalle Valo 		eid = ar->ac2ep_map[ac];
459bdcd8170SKalle Valo 
460bdcd8170SKalle Valo 	if (eid == 0 || eid == ENDPOINT_UNUSED) {
461bdcd8170SKalle Valo 		ath6kl_err("eid %d is not mapped!\n", eid);
462bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
463bdcd8170SKalle Valo 		goto fail_tx;
464bdcd8170SKalle Valo 	}
465bdcd8170SKalle Valo 
466bdcd8170SKalle Valo 	/* allocate resource for this packet */
467bdcd8170SKalle Valo 	cookie = ath6kl_alloc_cookie(ar);
468bdcd8170SKalle Valo 
469bdcd8170SKalle Valo 	if (!cookie) {
470bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
471bdcd8170SKalle Valo 		goto fail_tx;
472bdcd8170SKalle Valo 	}
473bdcd8170SKalle Valo 
474bdcd8170SKalle Valo 	/* update counts while the lock is held */
475bdcd8170SKalle Valo 	ar->tx_pending[eid]++;
476bdcd8170SKalle Valo 	ar->total_tx_data_pend++;
477bdcd8170SKalle Valo 
478bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
479bdcd8170SKalle Valo 
48000b1edf1SJouni Malinen 	if (!IS_ALIGNED((unsigned long) skb->data - HTC_HDR_LENGTH, 4) &&
48100b1edf1SJouni Malinen 	    skb_cloned(skb)) {
48200b1edf1SJouni Malinen 		/*
48300b1edf1SJouni Malinen 		 * We will touch (move the buffer data to align it. Since the
48400b1edf1SJouni Malinen 		 * skb buffer is cloned and not only the header is changed, we
48500b1edf1SJouni Malinen 		 * have to copy it to allow the changes. Since we are copying
48600b1edf1SJouni Malinen 		 * the data here, we may as well align it by reserving suitable
48700b1edf1SJouni Malinen 		 * headroom to avoid the memmove in ath6kl_htc_tx_buf_align().
48800b1edf1SJouni Malinen 		 */
48900b1edf1SJouni Malinen 		struct sk_buff *nskb;
49000b1edf1SJouni Malinen 
49100b1edf1SJouni Malinen 		nskb = skb_copy_expand(skb, HTC_HDR_LENGTH, 0, GFP_ATOMIC);
49200b1edf1SJouni Malinen 		if (nskb == NULL)
49300b1edf1SJouni Malinen 			goto fail_tx;
49400b1edf1SJouni Malinen 		kfree_skb(skb);
49500b1edf1SJouni Malinen 		skb = nskb;
49600b1edf1SJouni Malinen 	}
49700b1edf1SJouni Malinen 
498bdcd8170SKalle Valo 	cookie->skb = skb;
499bdcd8170SKalle Valo 	cookie->map_no = map_no;
500bdcd8170SKalle Valo 	set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
501bdcd8170SKalle Valo 			 eid, htc_tag);
502cfc10f24SKalle Valo 	cookie->htc_pkt.skb = skb;
503bdcd8170SKalle Valo 
504ef094103SKalle Valo 	ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "tx ",
505ef094103SKalle Valo 			skb->data, skb->len);
506bdcd8170SKalle Valo 
507bdcd8170SKalle Valo 	/*
508bdcd8170SKalle Valo 	 * HTC interface is asynchronous, if this fails, cleanup will
509bdcd8170SKalle Valo 	 * happen in the ath6kl_tx_complete callback.
510bdcd8170SKalle Valo 	 */
511ad226ec2SKalle Valo 	ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
512bdcd8170SKalle Valo 
513bdcd8170SKalle Valo 	return 0;
514bdcd8170SKalle Valo 
515bdcd8170SKalle Valo fail_tx:
516bdcd8170SKalle Valo 	dev_kfree_skb(skb);
517bdcd8170SKalle Valo 
5181235a3b6STobias Klauser 	dev->stats.tx_dropped++;
5191235a3b6STobias Klauser 	dev->stats.tx_aborted_errors++;
520bdcd8170SKalle Valo 
521bdcd8170SKalle Valo 	return 0;
522bdcd8170SKalle Valo }
523bdcd8170SKalle Valo 
524bdcd8170SKalle Valo /* indicate tx activity or inactivity on a WMI stream */
ath6kl_indicate_tx_activity(void * devt,u8 traffic_class,bool active)525bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active)
526bdcd8170SKalle Valo {
527bdcd8170SKalle Valo 	struct ath6kl *ar = devt;
528bdcd8170SKalle Valo 	enum htc_endpoint_id eid;
529bdcd8170SKalle Valo 	int i;
530bdcd8170SKalle Valo 
531bdcd8170SKalle Valo 	eid = ar->ac2ep_map[traffic_class];
532bdcd8170SKalle Valo 
533bdcd8170SKalle Valo 	if (!test_bit(WMI_ENABLED, &ar->flag))
534bdcd8170SKalle Valo 		goto notify_htc;
535bdcd8170SKalle Valo 
536bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
537bdcd8170SKalle Valo 
538bdcd8170SKalle Valo 	ar->ac_stream_active[traffic_class] = active;
539bdcd8170SKalle Valo 
540bdcd8170SKalle Valo 	if (active) {
541bdcd8170SKalle Valo 		/*
542bdcd8170SKalle Valo 		 * Keep track of the active stream with the highest
543bdcd8170SKalle Valo 		 * priority.
544bdcd8170SKalle Valo 		 */
545bdcd8170SKalle Valo 		if (ar->ac_stream_pri_map[traffic_class] >
546bdcd8170SKalle Valo 		    ar->hiac_stream_active_pri)
547bdcd8170SKalle Valo 			/* set the new highest active priority */
548bdcd8170SKalle Valo 			ar->hiac_stream_active_pri =
549bdcd8170SKalle Valo 					ar->ac_stream_pri_map[traffic_class];
550bdcd8170SKalle Valo 
551bdcd8170SKalle Valo 	} else {
552bdcd8170SKalle Valo 		/*
553bdcd8170SKalle Valo 		 * We may have to search for the next active stream
554bdcd8170SKalle Valo 		 * that is the highest priority.
555bdcd8170SKalle Valo 		 */
556bdcd8170SKalle Valo 		if (ar->hiac_stream_active_pri ==
557bdcd8170SKalle Valo 			ar->ac_stream_pri_map[traffic_class]) {
558bdcd8170SKalle Valo 			/*
559bdcd8170SKalle Valo 			 * The highest priority stream just went inactive
560bdcd8170SKalle Valo 			 * reset and search for the "next" highest "active"
561bdcd8170SKalle Valo 			 * priority stream.
562bdcd8170SKalle Valo 			 */
563bdcd8170SKalle Valo 			ar->hiac_stream_active_pri = 0;
564bdcd8170SKalle Valo 
565bdcd8170SKalle Valo 			for (i = 0; i < WMM_NUM_AC; i++) {
566bdcd8170SKalle Valo 				if (ar->ac_stream_active[i] &&
567bdcd8170SKalle Valo 				    (ar->ac_stream_pri_map[i] >
568bdcd8170SKalle Valo 				     ar->hiac_stream_active_pri))
569bdcd8170SKalle Valo 					/*
570bdcd8170SKalle Valo 					 * Set the new highest active
571bdcd8170SKalle Valo 					 * priority.
572bdcd8170SKalle Valo 					 */
573bdcd8170SKalle Valo 					ar->hiac_stream_active_pri =
574bdcd8170SKalle Valo 						ar->ac_stream_pri_map[i];
575bdcd8170SKalle Valo 			}
576bdcd8170SKalle Valo 		}
577bdcd8170SKalle Valo 	}
578bdcd8170SKalle Valo 
579bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
580bdcd8170SKalle Valo 
581bdcd8170SKalle Valo notify_htc:
582bdcd8170SKalle Valo 	/* notify HTC, this may cause credit distribution changes */
583e76ac2bfSKalle Valo 	ath6kl_htc_activity_changed(ar->htc_target, eid, active);
584bdcd8170SKalle Valo }
585bdcd8170SKalle Valo 
ath6kl_tx_queue_full(struct htc_target * target,struct htc_packet * packet)586bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
587bdcd8170SKalle Valo 					       struct htc_packet *packet)
588bdcd8170SKalle Valo {
589bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
590990bd915SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif;
591bdcd8170SKalle Valo 	enum htc_endpoint_id endpoint = packet->endpoint;
592990bd915SVasanthakumar Thiagarajan 	enum htc_send_full_action action = HTC_SEND_FULL_KEEP;
593bdcd8170SKalle Valo 
594bdcd8170SKalle Valo 	if (endpoint == ar->ctrl_ep) {
595bdcd8170SKalle Valo 		/*
596bdcd8170SKalle Valo 		 * Under normal WMI if this is getting full, then something
597bdcd8170SKalle Valo 		 * is running rampant the host should not be exhausting the
598bdcd8170SKalle Valo 		 * WMI queue with too many commands the only exception to
599bdcd8170SKalle Valo 		 * this is during testing using endpointping.
600bdcd8170SKalle Valo 		 */
601bdcd8170SKalle Valo 		set_bit(WMI_CTRL_EP_FULL, &ar->flag);
602bdcd8170SKalle Valo 		ath6kl_err("wmi ctrl ep is full\n");
60377565794SVasanthakumar Thiagarajan 		ath6kl_recovery_err_notify(ar, ATH6KL_FW_EP_FULL);
604901db39cSVasanthakumar Thiagarajan 		return action;
605bdcd8170SKalle Valo 	}
606bdcd8170SKalle Valo 
607bdcd8170SKalle Valo 	if (packet->info.tx.tag == ATH6KL_CONTROL_PKT_TAG)
608901db39cSVasanthakumar Thiagarajan 		return action;
609bdcd8170SKalle Valo 
610bdcd8170SKalle Valo 	/*
611bdcd8170SKalle Valo 	 * The last MAX_HI_COOKIE_NUM "batch" of cookies are reserved for
612bdcd8170SKalle Valo 	 * the highest active stream.
613bdcd8170SKalle Valo 	 */
614bdcd8170SKalle Valo 	if (ar->ac_stream_pri_map[ar->ep2ac_map[endpoint]] <
615bdcd8170SKalle Valo 	    ar->hiac_stream_active_pri &&
6160ea10f2bSChilam Ng 	    ar->cookie_count <=
6170ea10f2bSChilam Ng 			target->endpoint[endpoint].tx_drop_packet_threshold)
618bdcd8170SKalle Valo 		/*
619bdcd8170SKalle Valo 		 * Give preference to the highest priority stream by
620bdcd8170SKalle Valo 		 * dropping the packets which overflowed.
621bdcd8170SKalle Valo 		 */
622990bd915SVasanthakumar Thiagarajan 		action = HTC_SEND_FULL_DROP;
623bdcd8170SKalle Valo 
624990bd915SVasanthakumar Thiagarajan 	/* FIXME: Locking */
62511f6e40dSVasanthakumar Thiagarajan 	spin_lock_bh(&ar->list_lock);
626990bd915SVasanthakumar Thiagarajan 	list_for_each_entry(vif, &ar->vif_list, list) {
627901db39cSVasanthakumar Thiagarajan 		if (vif->nw_type == ADHOC_NETWORK ||
628901db39cSVasanthakumar Thiagarajan 		    action != HTC_SEND_FULL_DROP) {
62911f6e40dSVasanthakumar Thiagarajan 			spin_unlock_bh(&ar->list_lock);
630990bd915SVasanthakumar Thiagarajan 
63159c98449SVasanthakumar Thiagarajan 			set_bit(NETQ_STOPPED, &vif->flags);
63228ae58ddSVasanthakumar Thiagarajan 			netif_stop_queue(vif->ndev);
633bdcd8170SKalle Valo 
634990bd915SVasanthakumar Thiagarajan 			return action;
635990bd915SVasanthakumar Thiagarajan 		}
636990bd915SVasanthakumar Thiagarajan 	}
63711f6e40dSVasanthakumar Thiagarajan 	spin_unlock_bh(&ar->list_lock);
638990bd915SVasanthakumar Thiagarajan 
639990bd915SVasanthakumar Thiagarajan 	return action;
640bdcd8170SKalle Valo }
641bdcd8170SKalle Valo 
642bdcd8170SKalle Valo /* TODO this needs to be looked at */
ath6kl_tx_clear_node_map(struct ath6kl_vif * vif,enum htc_endpoint_id eid,u32 map_no)643990bd915SVasanthakumar Thiagarajan static void ath6kl_tx_clear_node_map(struct ath6kl_vif *vif,
644bdcd8170SKalle Valo 				     enum htc_endpoint_id eid, u32 map_no)
645bdcd8170SKalle Valo {
646990bd915SVasanthakumar Thiagarajan 	struct ath6kl *ar = vif->ar;
647bdcd8170SKalle Valo 	u32 i;
648bdcd8170SKalle Valo 
649f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type != ADHOC_NETWORK)
650bdcd8170SKalle Valo 		return;
651bdcd8170SKalle Valo 
652bdcd8170SKalle Valo 	if (!ar->ibss_ps_enable)
653bdcd8170SKalle Valo 		return;
654bdcd8170SKalle Valo 
655bdcd8170SKalle Valo 	if (eid == ar->ctrl_ep)
656bdcd8170SKalle Valo 		return;
657bdcd8170SKalle Valo 
658bdcd8170SKalle Valo 	if (map_no == 0)
659bdcd8170SKalle Valo 		return;
660bdcd8170SKalle Valo 
661bdcd8170SKalle Valo 	map_no--;
662bdcd8170SKalle Valo 	ar->node_map[map_no].tx_pend--;
663bdcd8170SKalle Valo 
664bdcd8170SKalle Valo 	if (ar->node_map[map_no].tx_pend)
665bdcd8170SKalle Valo 		return;
666bdcd8170SKalle Valo 
667bdcd8170SKalle Valo 	if (map_no != (ar->node_num - 1))
668bdcd8170SKalle Valo 		return;
669bdcd8170SKalle Valo 
670bdcd8170SKalle Valo 	for (i = ar->node_num; i > 0; i--) {
671bdcd8170SKalle Valo 		if (ar->node_map[i - 1].tx_pend)
672bdcd8170SKalle Valo 			break;
673bdcd8170SKalle Valo 
674bdcd8170SKalle Valo 		memset(&ar->node_map[i - 1], 0,
675bdcd8170SKalle Valo 		       sizeof(struct ath6kl_node_mapping));
676bdcd8170SKalle Valo 		ar->node_num--;
677bdcd8170SKalle Valo 	}
678bdcd8170SKalle Valo }
679bdcd8170SKalle Valo 
ath6kl_tx_complete(struct htc_target * target,struct list_head * packet_queue)68063de1112SKalle Valo void ath6kl_tx_complete(struct htc_target *target,
68163de1112SKalle Valo 			struct list_head *packet_queue)
682bdcd8170SKalle Valo {
68363de1112SKalle Valo 	struct ath6kl *ar = target->dev->ar;
684bdcd8170SKalle Valo 	struct sk_buff_head skb_queue;
685bdcd8170SKalle Valo 	struct htc_packet *packet;
686bdcd8170SKalle Valo 	struct sk_buff *skb;
687bdcd8170SKalle Valo 	struct ath6kl_cookie *ath6kl_cookie;
688bdcd8170SKalle Valo 	u32 map_no = 0;
689bdcd8170SKalle Valo 	int status;
690bdcd8170SKalle Valo 	enum htc_endpoint_id eid;
691bdcd8170SKalle Valo 	bool wake_event = false;
69271f96ee6SKalle Valo 	bool flushing[ATH6KL_VIF_MAX] = {false};
6936765d0aaSVasanthakumar Thiagarajan 	u8 if_idx;
694990bd915SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif;
695bdcd8170SKalle Valo 
696bdcd8170SKalle Valo 	skb_queue_head_init(&skb_queue);
697bdcd8170SKalle Valo 
698bdcd8170SKalle Valo 	/* lock the driver as we update internal state */
699bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
700bdcd8170SKalle Valo 
701bdcd8170SKalle Valo 	/* reap completed packets */
702bdcd8170SKalle Valo 	while (!list_empty(packet_queue)) {
703bdcd8170SKalle Valo 		packet = list_first_entry(packet_queue, struct htc_packet,
704bdcd8170SKalle Valo 					  list);
705bdcd8170SKalle Valo 		list_del(&packet->list);
706bdcd8170SKalle Valo 
70730774940SPandiyarajan Pitchaimuthu 		if (WARN_ON_ONCE(packet->endpoint == ENDPOINT_UNUSED ||
70830774940SPandiyarajan Pitchaimuthu 				 packet->endpoint >= ENDPOINT_MAX))
70930774940SPandiyarajan Pitchaimuthu 			continue;
71030774940SPandiyarajan Pitchaimuthu 
711bdcd8170SKalle Valo 		ath6kl_cookie = (struct ath6kl_cookie *)packet->pkt_cntxt;
7128114f9b6SVasanthakumar Thiagarajan 		if (WARN_ON_ONCE(!ath6kl_cookie))
7138114f9b6SVasanthakumar Thiagarajan 			continue;
714bdcd8170SKalle Valo 
715bdcd8170SKalle Valo 		status = packet->status;
716bdcd8170SKalle Valo 		skb = ath6kl_cookie->skb;
717bdcd8170SKalle Valo 		eid = packet->endpoint;
718bdcd8170SKalle Valo 		map_no = ath6kl_cookie->map_no;
719bdcd8170SKalle Valo 
7208114f9b6SVasanthakumar Thiagarajan 		if (WARN_ON_ONCE(!skb || !skb->data)) {
7218114f9b6SVasanthakumar Thiagarajan 			dev_kfree_skb(skb);
7228114f9b6SVasanthakumar Thiagarajan 			ath6kl_free_cookie(ar, ath6kl_cookie);
7238114f9b6SVasanthakumar Thiagarajan 			continue;
7248114f9b6SVasanthakumar Thiagarajan 		}
725bdcd8170SKalle Valo 
726bdcd8170SKalle Valo 		__skb_queue_tail(&skb_queue, skb);
727bdcd8170SKalle Valo 
7288114f9b6SVasanthakumar Thiagarajan 		if (WARN_ON_ONCE(!status && (packet->act_len != skb->len))) {
7298114f9b6SVasanthakumar Thiagarajan 			ath6kl_free_cookie(ar, ath6kl_cookie);
7308114f9b6SVasanthakumar Thiagarajan 			continue;
7318114f9b6SVasanthakumar Thiagarajan 		}
732bdcd8170SKalle Valo 
733bdcd8170SKalle Valo 		ar->tx_pending[eid]--;
734bdcd8170SKalle Valo 
735bdcd8170SKalle Valo 		if (eid != ar->ctrl_ep)
736bdcd8170SKalle Valo 			ar->total_tx_data_pend--;
737bdcd8170SKalle Valo 
738bdcd8170SKalle Valo 		if (eid == ar->ctrl_ep) {
739bdcd8170SKalle Valo 			if (test_bit(WMI_CTRL_EP_FULL, &ar->flag))
740bdcd8170SKalle Valo 				clear_bit(WMI_CTRL_EP_FULL, &ar->flag);
741bdcd8170SKalle Valo 
742bdcd8170SKalle Valo 			if (ar->tx_pending[eid] == 0)
743bdcd8170SKalle Valo 				wake_event = true;
744bdcd8170SKalle Valo 		}
745bdcd8170SKalle Valo 
7466765d0aaSVasanthakumar Thiagarajan 		if (eid == ar->ctrl_ep) {
7476765d0aaSVasanthakumar Thiagarajan 			if_idx = wmi_cmd_hdr_get_if_idx(
748f3803eb2SVasanthakumar Thiagarajan 				(struct wmi_cmd_hdr *) packet->buf);
7496765d0aaSVasanthakumar Thiagarajan 		} else {
7506765d0aaSVasanthakumar Thiagarajan 			if_idx = wmi_data_hdr_get_if_idx(
751f3803eb2SVasanthakumar Thiagarajan 				(struct wmi_data_hdr *) packet->buf);
7526765d0aaSVasanthakumar Thiagarajan 		}
7536765d0aaSVasanthakumar Thiagarajan 
7546765d0aaSVasanthakumar Thiagarajan 		vif = ath6kl_get_vif_by_index(ar, if_idx);
7556765d0aaSVasanthakumar Thiagarajan 		if (!vif) {
7566765d0aaSVasanthakumar Thiagarajan 			ath6kl_free_cookie(ar, ath6kl_cookie);
7576765d0aaSVasanthakumar Thiagarajan 			continue;
7586765d0aaSVasanthakumar Thiagarajan 		}
7596765d0aaSVasanthakumar Thiagarajan 
760bdcd8170SKalle Valo 		if (status) {
761bdcd8170SKalle Valo 			if (status == -ECANCELED)
762bdcd8170SKalle Valo 				/* a packet was flushed  */
763990bd915SVasanthakumar Thiagarajan 				flushing[if_idx] = true;
764bdcd8170SKalle Valo 
7651235a3b6STobias Klauser 			vif->ndev->stats.tx_errors++;
766bdcd8170SKalle Valo 
767778e6502SKalle Valo 			if (status != -ENOSPC && status != -ECANCELED)
768778e6502SKalle Valo 				ath6kl_warn("tx complete error: %d\n", status);
769778e6502SKalle Valo 
770bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
771bdcd8170SKalle Valo 				   "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
772bdcd8170SKalle Valo 				   __func__, skb, packet->buf, packet->act_len,
773bdcd8170SKalle Valo 				   eid, "error!");
774bdcd8170SKalle Valo 		} else {
775bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
776bdcd8170SKalle Valo 				   "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
777bdcd8170SKalle Valo 				   __func__, skb, packet->buf, packet->act_len,
778bdcd8170SKalle Valo 				   eid, "OK");
779bdcd8170SKalle Valo 
780990bd915SVasanthakumar Thiagarajan 			flushing[if_idx] = false;
7811235a3b6STobias Klauser 			vif->ndev->stats.tx_packets++;
7821235a3b6STobias Klauser 			vif->ndev->stats.tx_bytes += skb->len;
783bdcd8170SKalle Valo 		}
784bdcd8170SKalle Valo 
785990bd915SVasanthakumar Thiagarajan 		ath6kl_tx_clear_node_map(vif, eid, map_no);
786bdcd8170SKalle Valo 
787bdcd8170SKalle Valo 		ath6kl_free_cookie(ar, ath6kl_cookie);
788bdcd8170SKalle Valo 
78959c98449SVasanthakumar Thiagarajan 		if (test_bit(NETQ_STOPPED, &vif->flags))
79059c98449SVasanthakumar Thiagarajan 			clear_bit(NETQ_STOPPED, &vif->flags);
791bdcd8170SKalle Valo 	}
792bdcd8170SKalle Valo 
793bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
794bdcd8170SKalle Valo 
795bdcd8170SKalle Valo 	__skb_queue_purge(&skb_queue);
796bdcd8170SKalle Valo 
797990bd915SVasanthakumar Thiagarajan 	/* FIXME: Locking */
79811f6e40dSVasanthakumar Thiagarajan 	spin_lock_bh(&ar->list_lock);
799990bd915SVasanthakumar Thiagarajan 	list_for_each_entry(vif, &ar->vif_list, list) {
800990bd915SVasanthakumar Thiagarajan 		if (test_bit(CONNECTED, &vif->flags) &&
801990bd915SVasanthakumar Thiagarajan 		    !flushing[vif->fw_vif_idx]) {
80211f6e40dSVasanthakumar Thiagarajan 			spin_unlock_bh(&ar->list_lock);
80328ae58ddSVasanthakumar Thiagarajan 			netif_wake_queue(vif->ndev);
80411f6e40dSVasanthakumar Thiagarajan 			spin_lock_bh(&ar->list_lock);
805bdcd8170SKalle Valo 		}
806990bd915SVasanthakumar Thiagarajan 	}
80711f6e40dSVasanthakumar Thiagarajan 	spin_unlock_bh(&ar->list_lock);
808bdcd8170SKalle Valo 
809bdcd8170SKalle Valo 	if (wake_event)
810bdcd8170SKalle Valo 		wake_up(&ar->event_wq);
811bdcd8170SKalle Valo 
812bdcd8170SKalle Valo 	return;
813bdcd8170SKalle Valo }
814bdcd8170SKalle Valo 
ath6kl_tx_data_cleanup(struct ath6kl * ar)815bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar)
816bdcd8170SKalle Valo {
817bdcd8170SKalle Valo 	int i;
818bdcd8170SKalle Valo 
819bdcd8170SKalle Valo 	/* flush all the data (non-control) streams */
820bdcd8170SKalle Valo 	for (i = 0; i < WMM_NUM_AC; i++)
821ad226ec2SKalle Valo 		ath6kl_htc_flush_txep(ar->htc_target, ar->ac2ep_map[i],
822bdcd8170SKalle Valo 				      ATH6KL_DATA_PKT_TAG);
823bdcd8170SKalle Valo }
824bdcd8170SKalle Valo 
825bdcd8170SKalle Valo /* Rx functions */
826bdcd8170SKalle Valo 
ath6kl_deliver_frames_to_nw_stack(struct net_device * dev,struct sk_buff * skb)827bdcd8170SKalle Valo static void ath6kl_deliver_frames_to_nw_stack(struct net_device *dev,
828bdcd8170SKalle Valo 					      struct sk_buff *skb)
829bdcd8170SKalle Valo {
830bdcd8170SKalle Valo 	if (!skb)
831bdcd8170SKalle Valo 		return;
832bdcd8170SKalle Valo 
833bdcd8170SKalle Valo 	skb->dev = dev;
834bdcd8170SKalle Valo 
835bdcd8170SKalle Valo 	if (!(skb->dev->flags & IFF_UP)) {
836bdcd8170SKalle Valo 		dev_kfree_skb(skb);
837bdcd8170SKalle Valo 		return;
838bdcd8170SKalle Valo 	}
839bdcd8170SKalle Valo 
840bdcd8170SKalle Valo 	skb->protocol = eth_type_trans(skb, skb->dev);
841bdcd8170SKalle Valo 
842*1cd2ef9fSSebastian Andrzej Siewior 	netif_rx(skb);
843bdcd8170SKalle Valo }
844bdcd8170SKalle Valo 
ath6kl_alloc_netbufs(struct sk_buff_head * q,u16 num)845bdcd8170SKalle Valo static void ath6kl_alloc_netbufs(struct sk_buff_head *q, u16 num)
846bdcd8170SKalle Valo {
847bdcd8170SKalle Valo 	struct sk_buff *skb;
848bdcd8170SKalle Valo 
849bdcd8170SKalle Valo 	while (num) {
850bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
851bdcd8170SKalle Valo 		if (!skb) {
852bdcd8170SKalle Valo 			ath6kl_err("netbuf allocation failed\n");
853bdcd8170SKalle Valo 			return;
854bdcd8170SKalle Valo 		}
855bdcd8170SKalle Valo 		skb_queue_tail(q, skb);
856bdcd8170SKalle Valo 		num--;
857bdcd8170SKalle Valo 	}
858bdcd8170SKalle Valo }
859bdcd8170SKalle Valo 
aggr_get_free_skb(struct aggr_info * p_aggr)860bdcd8170SKalle Valo static struct sk_buff *aggr_get_free_skb(struct aggr_info *p_aggr)
861bdcd8170SKalle Valo {
862bdcd8170SKalle Valo 	struct sk_buff *skb = NULL;
863bdcd8170SKalle Valo 
8647baef812SVasanthakumar Thiagarajan 	if (skb_queue_len(&p_aggr->rx_amsdu_freeq) <
8657baef812SVasanthakumar Thiagarajan 	    (AGGR_NUM_OF_FREE_NETBUFS >> 2))
8667baef812SVasanthakumar Thiagarajan 		ath6kl_alloc_netbufs(&p_aggr->rx_amsdu_freeq,
8677baef812SVasanthakumar Thiagarajan 				     AGGR_NUM_OF_FREE_NETBUFS);
868bdcd8170SKalle Valo 
8697baef812SVasanthakumar Thiagarajan 	skb = skb_dequeue(&p_aggr->rx_amsdu_freeq);
870bdcd8170SKalle Valo 
871bdcd8170SKalle Valo 	return skb;
872bdcd8170SKalle Valo }
873bdcd8170SKalle Valo 
ath6kl_rx_refill(struct htc_target * target,enum htc_endpoint_id endpoint)874bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target, enum htc_endpoint_id endpoint)
875bdcd8170SKalle Valo {
876bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
877bdcd8170SKalle Valo 	struct sk_buff *skb;
878bdcd8170SKalle Valo 	int rx_buf;
879bdcd8170SKalle Valo 	int n_buf_refill;
880bdcd8170SKalle Valo 	struct htc_packet *packet;
881bdcd8170SKalle Valo 	struct list_head queue;
882bdcd8170SKalle Valo 
883bdcd8170SKalle Valo 	n_buf_refill = ATH6KL_MAX_RX_BUFFERS -
884ad226ec2SKalle Valo 			  ath6kl_htc_get_rxbuf_num(ar->htc_target, endpoint);
885bdcd8170SKalle Valo 
886bdcd8170SKalle Valo 	if (n_buf_refill <= 0)
887bdcd8170SKalle Valo 		return;
888bdcd8170SKalle Valo 
889bdcd8170SKalle Valo 	INIT_LIST_HEAD(&queue);
890bdcd8170SKalle Valo 
891bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
892bdcd8170SKalle Valo 		   "%s: providing htc with %d buffers at eid=%d\n",
893bdcd8170SKalle Valo 		   __func__, n_buf_refill, endpoint);
894bdcd8170SKalle Valo 
895bdcd8170SKalle Valo 	for (rx_buf = 0; rx_buf < n_buf_refill; rx_buf++) {
896bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
897bdcd8170SKalle Valo 		if (!skb)
898bdcd8170SKalle Valo 			break;
899bdcd8170SKalle Valo 
900bdcd8170SKalle Valo 		packet = (struct htc_packet *) skb->head;
901baec5c6dSVasanthakumar Thiagarajan 		if (!IS_ALIGNED((unsigned long) skb->data, 4)) {
902baec5c6dSVasanthakumar Thiagarajan 			size_t len = skb_headlen(skb);
9031df94a85SVasanthakumar Thiagarajan 			skb->data = PTR_ALIGN(skb->data - 4, 4);
904baec5c6dSVasanthakumar Thiagarajan 			skb_set_tail_pointer(skb, len);
905baec5c6dSVasanthakumar Thiagarajan 		}
906bdcd8170SKalle Valo 		set_htc_rxpkt_info(packet, skb, skb->data,
907bdcd8170SKalle Valo 				   ATH6KL_BUFFER_SIZE, endpoint);
908cfc10f24SKalle Valo 		packet->skb = skb;
909bdcd8170SKalle Valo 		list_add_tail(&packet->list, &queue);
910bdcd8170SKalle Valo 	}
911bdcd8170SKalle Valo 
912bdcd8170SKalle Valo 	if (!list_empty(&queue))
913ad226ec2SKalle Valo 		ath6kl_htc_add_rxbuf_multiple(ar->htc_target, &queue);
914bdcd8170SKalle Valo }
915bdcd8170SKalle Valo 
ath6kl_refill_amsdu_rxbufs(struct ath6kl * ar,int count)916bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count)
917bdcd8170SKalle Valo {
918bdcd8170SKalle Valo 	struct htc_packet *packet;
919bdcd8170SKalle Valo 	struct sk_buff *skb;
920bdcd8170SKalle Valo 
921bdcd8170SKalle Valo 	while (count) {
922bdcd8170SKalle Valo 		skb = ath6kl_buf_alloc(ATH6KL_AMSDU_BUFFER_SIZE);
923bdcd8170SKalle Valo 		if (!skb)
924bdcd8170SKalle Valo 			return;
925bdcd8170SKalle Valo 
926bdcd8170SKalle Valo 		packet = (struct htc_packet *) skb->head;
927baec5c6dSVasanthakumar Thiagarajan 		if (!IS_ALIGNED((unsigned long) skb->data, 4)) {
928baec5c6dSVasanthakumar Thiagarajan 			size_t len = skb_headlen(skb);
9291df94a85SVasanthakumar Thiagarajan 			skb->data = PTR_ALIGN(skb->data - 4, 4);
930baec5c6dSVasanthakumar Thiagarajan 			skb_set_tail_pointer(skb, len);
931baec5c6dSVasanthakumar Thiagarajan 		}
932bdcd8170SKalle Valo 		set_htc_rxpkt_info(packet, skb, skb->data,
933bdcd8170SKalle Valo 				   ATH6KL_AMSDU_BUFFER_SIZE, 0);
934cfc10f24SKalle Valo 		packet->skb = skb;
935cfc10f24SKalle Valo 
936bdcd8170SKalle Valo 		spin_lock_bh(&ar->lock);
937bdcd8170SKalle Valo 		list_add_tail(&packet->list, &ar->amsdu_rx_buffer_queue);
938bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
939bdcd8170SKalle Valo 		count--;
940bdcd8170SKalle Valo 	}
941bdcd8170SKalle Valo }
942bdcd8170SKalle Valo 
943bdcd8170SKalle Valo /*
944bdcd8170SKalle Valo  * Callback to allocate a receive buffer for a pending packet. We use a
945bdcd8170SKalle Valo  * pre-allocated list of buffers of maximum AMSDU size (4K).
946bdcd8170SKalle Valo  */
ath6kl_alloc_amsdu_rxbuf(struct htc_target * target,enum htc_endpoint_id endpoint,int len)947bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
948bdcd8170SKalle Valo 					    enum htc_endpoint_id endpoint,
949bdcd8170SKalle Valo 					    int len)
950bdcd8170SKalle Valo {
951bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
952bdcd8170SKalle Valo 	struct htc_packet *packet = NULL;
953bdcd8170SKalle Valo 	struct list_head *pkt_pos;
954bdcd8170SKalle Valo 	int refill_cnt = 0, depth = 0;
955bdcd8170SKalle Valo 
956bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: eid=%d, len:%d\n",
957bdcd8170SKalle Valo 		   __func__, endpoint, len);
958bdcd8170SKalle Valo 
959bdcd8170SKalle Valo 	if ((len <= ATH6KL_BUFFER_SIZE) ||
960bdcd8170SKalle Valo 	    (len > ATH6KL_AMSDU_BUFFER_SIZE))
961bdcd8170SKalle Valo 		return NULL;
962bdcd8170SKalle Valo 
963bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
964bdcd8170SKalle Valo 
965bdcd8170SKalle Valo 	if (list_empty(&ar->amsdu_rx_buffer_queue)) {
966bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
967bdcd8170SKalle Valo 		refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS;
968bdcd8170SKalle Valo 		goto refill_buf;
969bdcd8170SKalle Valo 	}
970bdcd8170SKalle Valo 
971bdcd8170SKalle Valo 	packet = list_first_entry(&ar->amsdu_rx_buffer_queue,
972bdcd8170SKalle Valo 				  struct htc_packet, list);
973bdcd8170SKalle Valo 	list_del(&packet->list);
974bdcd8170SKalle Valo 	list_for_each(pkt_pos, &ar->amsdu_rx_buffer_queue)
975bdcd8170SKalle Valo 		depth++;
976bdcd8170SKalle Valo 
977bdcd8170SKalle Valo 	refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS - depth;
978bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
979bdcd8170SKalle Valo 
980bdcd8170SKalle Valo 	/* set actual endpoint ID */
981bdcd8170SKalle Valo 	packet->endpoint = endpoint;
982bdcd8170SKalle Valo 
983bdcd8170SKalle Valo refill_buf:
984bdcd8170SKalle Valo 	if (refill_cnt >= ATH6KL_AMSDU_REFILL_THRESHOLD)
985bdcd8170SKalle Valo 		ath6kl_refill_amsdu_rxbufs(ar, refill_cnt);
986bdcd8170SKalle Valo 
987bdcd8170SKalle Valo 	return packet;
988bdcd8170SKalle Valo }
989bdcd8170SKalle Valo 
aggr_slice_amsdu(struct aggr_info * p_aggr,struct rxtid * rxtid,struct sk_buff * skb)990bdcd8170SKalle Valo static void aggr_slice_amsdu(struct aggr_info *p_aggr,
991bdcd8170SKalle Valo 			     struct rxtid *rxtid, struct sk_buff *skb)
992bdcd8170SKalle Valo {
993bdcd8170SKalle Valo 	struct sk_buff *new_skb;
994bdcd8170SKalle Valo 	struct ethhdr *hdr;
995bdcd8170SKalle Valo 	u16 frame_8023_len, payload_8023_len, mac_hdr_len, amsdu_len;
996bdcd8170SKalle Valo 	u8 *framep;
997bdcd8170SKalle Valo 
998bdcd8170SKalle Valo 	mac_hdr_len = sizeof(struct ethhdr);
999bdcd8170SKalle Valo 	framep = skb->data + mac_hdr_len;
1000bdcd8170SKalle Valo 	amsdu_len = skb->len - mac_hdr_len;
1001bdcd8170SKalle Valo 
1002bdcd8170SKalle Valo 	while (amsdu_len > mac_hdr_len) {
1003bdcd8170SKalle Valo 		hdr = (struct ethhdr *) framep;
10045d24bcd5SKenneth Lu 		payload_8023_len = be16_to_cpu(hdr->h_proto);
1005bdcd8170SKalle Valo 
1006bdcd8170SKalle Valo 		if (payload_8023_len < MIN_MSDU_SUBFRAME_PAYLOAD_LEN ||
1007bdcd8170SKalle Valo 		    payload_8023_len > MAX_MSDU_SUBFRAME_PAYLOAD_LEN) {
1008bdcd8170SKalle Valo 			ath6kl_err("802.3 AMSDU frame bound check failed. len %d\n",
1009bdcd8170SKalle Valo 				   payload_8023_len);
1010bdcd8170SKalle Valo 			break;
1011bdcd8170SKalle Valo 		}
1012bdcd8170SKalle Valo 
1013bdcd8170SKalle Valo 		frame_8023_len = payload_8023_len + mac_hdr_len;
1014bdcd8170SKalle Valo 		new_skb = aggr_get_free_skb(p_aggr);
1015bdcd8170SKalle Valo 		if (!new_skb) {
1016bdcd8170SKalle Valo 			ath6kl_err("no buffer available\n");
1017bdcd8170SKalle Valo 			break;
1018bdcd8170SKalle Valo 		}
1019bdcd8170SKalle Valo 
1020bdcd8170SKalle Valo 		memcpy(new_skb->data, framep, frame_8023_len);
1021bdcd8170SKalle Valo 		skb_put(new_skb, frame_8023_len);
1022bdcd8170SKalle Valo 		if (ath6kl_wmi_dot3_2_dix(new_skb)) {
1023bdcd8170SKalle Valo 			ath6kl_err("dot3_2_dix error\n");
1024bdcd8170SKalle Valo 			dev_kfree_skb(new_skb);
1025bdcd8170SKalle Valo 			break;
1026bdcd8170SKalle Valo 		}
1027bdcd8170SKalle Valo 
1028bdcd8170SKalle Valo 		skb_queue_tail(&rxtid->q, new_skb);
1029bdcd8170SKalle Valo 
1030bdcd8170SKalle Valo 		/* Is this the last subframe within this aggregate ? */
1031bdcd8170SKalle Valo 		if ((amsdu_len - frame_8023_len) == 0)
1032bdcd8170SKalle Valo 			break;
1033bdcd8170SKalle Valo 
1034bdcd8170SKalle Valo 		/* Add the length of A-MSDU subframe padding bytes -
1035bdcd8170SKalle Valo 		 * Round to nearest word.
1036bdcd8170SKalle Valo 		 */
103713e34ea1SVasanthakumar Thiagarajan 		frame_8023_len = ALIGN(frame_8023_len, 4);
1038bdcd8170SKalle Valo 
1039bdcd8170SKalle Valo 		framep += frame_8023_len;
1040bdcd8170SKalle Valo 		amsdu_len -= frame_8023_len;
1041bdcd8170SKalle Valo 	}
1042bdcd8170SKalle Valo 
1043bdcd8170SKalle Valo 	dev_kfree_skb(skb);
1044bdcd8170SKalle Valo }
1045bdcd8170SKalle Valo 
aggr_deque_frms(struct aggr_info_conn * agg_conn,u8 tid,u16 seq_no,u8 order)10461d2a4456SVasanthakumar Thiagarajan static void aggr_deque_frms(struct aggr_info_conn *agg_conn, u8 tid,
1047bdcd8170SKalle Valo 			    u16 seq_no, u8 order)
1048bdcd8170SKalle Valo {
1049bdcd8170SKalle Valo 	struct sk_buff *skb;
1050bdcd8170SKalle Valo 	struct rxtid *rxtid;
1051bdcd8170SKalle Valo 	struct skb_hold_q *node;
1052bdcd8170SKalle Valo 	u16 idx, idx_end, seq_end;
1053bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1054bdcd8170SKalle Valo 
10557baef812SVasanthakumar Thiagarajan 	rxtid = &agg_conn->rx_tid[tid];
10567baef812SVasanthakumar Thiagarajan 	stats = &agg_conn->stat[tid];
1057bdcd8170SKalle Valo 
10580faf7458SVasanthakumar Thiagarajan 	spin_lock_bh(&rxtid->lock);
1059bdcd8170SKalle Valo 	idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
1060bdcd8170SKalle Valo 
1061bdcd8170SKalle Valo 	/*
1062bdcd8170SKalle Valo 	 * idx_end is typically the last possible frame in the window,
1063bdcd8170SKalle Valo 	 * but changes to 'the' seq_no, when BAR comes. If seq_no
1064bdcd8170SKalle Valo 	 * is non-zero, we will go up to that and stop.
1065bdcd8170SKalle Valo 	 * Note: last seq no in current window will occupy the same
1066bdcd8170SKalle Valo 	 * index position as index that is just previous to start.
1067bdcd8170SKalle Valo 	 * An imp point : if win_sz is 7, for seq_no space of 4095,
1068bdcd8170SKalle Valo 	 * then, there would be holes when sequence wrap around occurs.
1069bdcd8170SKalle Valo 	 * Target should judiciously choose the win_sz, based on
1070bdcd8170SKalle Valo 	 * this condition. For 4095, (TID_WINDOW_SZ = 2 x win_sz
1071bdcd8170SKalle Valo 	 * 2, 4, 8, 16 win_sz works fine).
1072bdcd8170SKalle Valo 	 * We must deque from "idx" to "idx_end", including both.
1073bdcd8170SKalle Valo 	 */
1074bdcd8170SKalle Valo 	seq_end = seq_no ? seq_no : rxtid->seq_next;
1075bdcd8170SKalle Valo 	idx_end = AGGR_WIN_IDX(seq_end, rxtid->hold_q_sz);
1076bdcd8170SKalle Valo 
1077bdcd8170SKalle Valo 	do {
1078bdcd8170SKalle Valo 		node = &rxtid->hold_q[idx];
1079bdcd8170SKalle Valo 		if ((order == 1) && (!node->skb))
1080bdcd8170SKalle Valo 			break;
1081bdcd8170SKalle Valo 
1082bdcd8170SKalle Valo 		if (node->skb) {
1083bdcd8170SKalle Valo 			if (node->is_amsdu)
10841d2a4456SVasanthakumar Thiagarajan 				aggr_slice_amsdu(agg_conn->aggr_info, rxtid,
10851d2a4456SVasanthakumar Thiagarajan 						 node->skb);
1086bdcd8170SKalle Valo 			else
1087bdcd8170SKalle Valo 				skb_queue_tail(&rxtid->q, node->skb);
1088bdcd8170SKalle Valo 			node->skb = NULL;
1089a5d8f9dfSKalle Valo 		} else {
1090bdcd8170SKalle Valo 			stats->num_hole++;
1091a5d8f9dfSKalle Valo 		}
1092bdcd8170SKalle Valo 
1093bdcd8170SKalle Valo 		rxtid->seq_next = ATH6KL_NEXT_SEQ_NO(rxtid->seq_next);
1094bdcd8170SKalle Valo 		idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
1095bdcd8170SKalle Valo 	} while (idx != idx_end);
1096bdcd8170SKalle Valo 
1097bdcd8170SKalle Valo 	spin_unlock_bh(&rxtid->lock);
1098bdcd8170SKalle Valo 
1099bdcd8170SKalle Valo 	stats->num_delivered += skb_queue_len(&rxtid->q);
1100bdcd8170SKalle Valo 
1101bdcd8170SKalle Valo 	while ((skb = skb_dequeue(&rxtid->q)))
11027baef812SVasanthakumar Thiagarajan 		ath6kl_deliver_frames_to_nw_stack(agg_conn->dev, skb);
1103bdcd8170SKalle Valo }
1104bdcd8170SKalle Valo 
aggr_process_recv_frm(struct aggr_info_conn * agg_conn,u8 tid,u16 seq_no,bool is_amsdu,struct sk_buff * frame)11051d2a4456SVasanthakumar Thiagarajan static bool aggr_process_recv_frm(struct aggr_info_conn *agg_conn, u8 tid,
1106bdcd8170SKalle Valo 				  u16 seq_no,
1107bdcd8170SKalle Valo 				  bool is_amsdu, struct sk_buff *frame)
1108bdcd8170SKalle Valo {
1109bdcd8170SKalle Valo 	struct rxtid *rxtid;
1110bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1111bdcd8170SKalle Valo 	struct sk_buff *skb;
1112bdcd8170SKalle Valo 	struct skb_hold_q *node;
1113bdcd8170SKalle Valo 	u16 idx, st, cur, end;
1114bdcd8170SKalle Valo 	bool is_queued = false;
1115bdcd8170SKalle Valo 	u16 extended_end;
1116bdcd8170SKalle Valo 
11177baef812SVasanthakumar Thiagarajan 	rxtid = &agg_conn->rx_tid[tid];
11187baef812SVasanthakumar Thiagarajan 	stats = &agg_conn->stat[tid];
1119bdcd8170SKalle Valo 
1120bdcd8170SKalle Valo 	stats->num_into_aggr++;
1121bdcd8170SKalle Valo 
1122bdcd8170SKalle Valo 	if (!rxtid->aggr) {
1123bdcd8170SKalle Valo 		if (is_amsdu) {
11241d2a4456SVasanthakumar Thiagarajan 			aggr_slice_amsdu(agg_conn->aggr_info, rxtid, frame);
1125bdcd8170SKalle Valo 			is_queued = true;
1126bdcd8170SKalle Valo 			stats->num_amsdu++;
1127bdcd8170SKalle Valo 			while ((skb = skb_dequeue(&rxtid->q)))
11287baef812SVasanthakumar Thiagarajan 				ath6kl_deliver_frames_to_nw_stack(agg_conn->dev,
1129bdcd8170SKalle Valo 								  skb);
1130bdcd8170SKalle Valo 		}
1131bdcd8170SKalle Valo 		return is_queued;
1132bdcd8170SKalle Valo 	}
1133bdcd8170SKalle Valo 
1134bdcd8170SKalle Valo 	/* Check the incoming sequence no, if it's in the window */
1135bdcd8170SKalle Valo 	st = rxtid->seq_next;
1136bdcd8170SKalle Valo 	cur = seq_no;
1137bdcd8170SKalle Valo 	end = (st + rxtid->hold_q_sz-1) & ATH6KL_MAX_SEQ_NO;
1138bdcd8170SKalle Valo 
1139bdcd8170SKalle Valo 	if (((st < end) && (cur < st || cur > end)) ||
1140bdcd8170SKalle Valo 	    ((st > end) && (cur > end) && (cur < st))) {
1141bdcd8170SKalle Valo 		extended_end = (end + rxtid->hold_q_sz - 1) &
1142bdcd8170SKalle Valo 			ATH6KL_MAX_SEQ_NO;
1143bdcd8170SKalle Valo 
1144bdcd8170SKalle Valo 		if (((end < extended_end) &&
1145bdcd8170SKalle Valo 		     (cur < end || cur > extended_end)) ||
1146bdcd8170SKalle Valo 		    ((end > extended_end) && (cur > extended_end) &&
1147bdcd8170SKalle Valo 		     (cur < end))) {
11481d2a4456SVasanthakumar Thiagarajan 			aggr_deque_frms(agg_conn, tid, 0, 0);
11490faf7458SVasanthakumar Thiagarajan 			spin_lock_bh(&rxtid->lock);
1150bdcd8170SKalle Valo 			if (cur >= rxtid->hold_q_sz - 1)
1151bdcd8170SKalle Valo 				rxtid->seq_next = cur - (rxtid->hold_q_sz - 1);
1152bdcd8170SKalle Valo 			else
1153bdcd8170SKalle Valo 				rxtid->seq_next = ATH6KL_MAX_SEQ_NO -
1154bdcd8170SKalle Valo 						  (rxtid->hold_q_sz - 2 - cur);
11550faf7458SVasanthakumar Thiagarajan 			spin_unlock_bh(&rxtid->lock);
1156bdcd8170SKalle Valo 		} else {
1157bdcd8170SKalle Valo 			/*
1158bdcd8170SKalle Valo 			 * Dequeue only those frames that are outside the
1159bdcd8170SKalle Valo 			 * new shifted window.
1160bdcd8170SKalle Valo 			 */
1161bdcd8170SKalle Valo 			if (cur >= rxtid->hold_q_sz - 1)
1162bdcd8170SKalle Valo 				st = cur - (rxtid->hold_q_sz - 1);
1163bdcd8170SKalle Valo 			else
1164bdcd8170SKalle Valo 				st = ATH6KL_MAX_SEQ_NO -
1165bdcd8170SKalle Valo 					(rxtid->hold_q_sz - 2 - cur);
1166bdcd8170SKalle Valo 
11671d2a4456SVasanthakumar Thiagarajan 			aggr_deque_frms(agg_conn, tid, st, 0);
1168bdcd8170SKalle Valo 		}
1169bdcd8170SKalle Valo 
1170bdcd8170SKalle Valo 		stats->num_oow++;
1171bdcd8170SKalle Valo 	}
1172bdcd8170SKalle Valo 
1173bdcd8170SKalle Valo 	idx = AGGR_WIN_IDX(seq_no, rxtid->hold_q_sz);
1174bdcd8170SKalle Valo 
1175bdcd8170SKalle Valo 	node = &rxtid->hold_q[idx];
1176bdcd8170SKalle Valo 
1177bdcd8170SKalle Valo 	spin_lock_bh(&rxtid->lock);
1178bdcd8170SKalle Valo 
1179bdcd8170SKalle Valo 	/*
1180bdcd8170SKalle Valo 	 * Is the cur frame duplicate or something beyond our window(hold_q
1181bdcd8170SKalle Valo 	 * -> which is 2x, already)?
1182bdcd8170SKalle Valo 	 *
1183bdcd8170SKalle Valo 	 * 1. Duplicate is easy - drop incoming frame.
1184bdcd8170SKalle Valo 	 * 2. Not falling in current sliding window.
1185bdcd8170SKalle Valo 	 *  2a. is the frame_seq_no preceding current tid_seq_no?
1186bdcd8170SKalle Valo 	 *      -> drop the frame. perhaps sender did not get our ACK.
1187bdcd8170SKalle Valo 	 *         this is taken care of above.
1188bdcd8170SKalle Valo 	 *  2b. is the frame_seq_no beyond window(st, TID_WINDOW_SZ);
1189bdcd8170SKalle Valo 	 *      -> Taken care of it above, by moving window forward.
1190bdcd8170SKalle Valo 	 */
1191bdcd8170SKalle Valo 	dev_kfree_skb(node->skb);
1192bdcd8170SKalle Valo 	stats->num_dups++;
1193bdcd8170SKalle Valo 
1194bdcd8170SKalle Valo 	node->skb = frame;
1195bdcd8170SKalle Valo 	is_queued = true;
1196bdcd8170SKalle Valo 	node->is_amsdu = is_amsdu;
1197bdcd8170SKalle Valo 	node->seq_no = seq_no;
1198bdcd8170SKalle Valo 
1199bdcd8170SKalle Valo 	if (node->is_amsdu)
1200bdcd8170SKalle Valo 		stats->num_amsdu++;
1201bdcd8170SKalle Valo 	else
1202bdcd8170SKalle Valo 		stats->num_mpdu++;
1203bdcd8170SKalle Valo 
1204bdcd8170SKalle Valo 	spin_unlock_bh(&rxtid->lock);
1205bdcd8170SKalle Valo 
12061d2a4456SVasanthakumar Thiagarajan 	aggr_deque_frms(agg_conn, tid, 0, 1);
1207bdcd8170SKalle Valo 
12087baef812SVasanthakumar Thiagarajan 	if (agg_conn->timer_scheduled)
12097940bad5SVasanthakumar Thiagarajan 		return is_queued;
12107940bad5SVasanthakumar Thiagarajan 
12110faf7458SVasanthakumar Thiagarajan 	spin_lock_bh(&rxtid->lock);
1212bdcd8170SKalle Valo 	for (idx = 0; idx < rxtid->hold_q_sz; idx++) {
1213bdcd8170SKalle Valo 		if (rxtid->hold_q[idx].skb) {
1214bdcd8170SKalle Valo 			/*
1215bdcd8170SKalle Valo 			 * There is a frame in the queue and no
1216bdcd8170SKalle Valo 			 * timer so start a timer to ensure that
1217bdcd8170SKalle Valo 			 * the frame doesn't remain stuck
1218bdcd8170SKalle Valo 			 * forever.
1219bdcd8170SKalle Valo 			 */
12207baef812SVasanthakumar Thiagarajan 			agg_conn->timer_scheduled = true;
12217baef812SVasanthakumar Thiagarajan 			mod_timer(&agg_conn->timer,
12227940bad5SVasanthakumar Thiagarajan 				  (jiffies + (HZ * AGGR_RX_TIMEOUT) / 1000));
1223bdcd8170SKalle Valo 			rxtid->timer_mon = true;
1224bdcd8170SKalle Valo 			break;
1225bdcd8170SKalle Valo 		}
1226bdcd8170SKalle Valo 	}
12270faf7458SVasanthakumar Thiagarajan 	spin_unlock_bh(&rxtid->lock);
1228bdcd8170SKalle Valo 
1229bdcd8170SKalle Valo 	return is_queued;
1230bdcd8170SKalle Valo }
1231bdcd8170SKalle Valo 
ath6kl_uapsd_trigger_frame_rx(struct ath6kl_vif * vif,struct ath6kl_sta * conn)1232c1762a3fSThirumalai Pachamuthu static void ath6kl_uapsd_trigger_frame_rx(struct ath6kl_vif *vif,
1233c1762a3fSThirumalai Pachamuthu 						 struct ath6kl_sta *conn)
1234c1762a3fSThirumalai Pachamuthu {
1235c1762a3fSThirumalai Pachamuthu 	struct ath6kl *ar = vif->ar;
1236c1762a3fSThirumalai Pachamuthu 	bool is_apsdq_empty, is_apsdq_empty_at_start;
1237c1762a3fSThirumalai Pachamuthu 	u32 num_frames_to_deliver, flags;
1238c1762a3fSThirumalai Pachamuthu 	struct sk_buff *skb = NULL;
1239c1762a3fSThirumalai Pachamuthu 
1240c1762a3fSThirumalai Pachamuthu 	/*
1241c1762a3fSThirumalai Pachamuthu 	 * If the APSD q for this STA is not empty, dequeue and
1242c1762a3fSThirumalai Pachamuthu 	 * send a pkt from the head of the q. Also update the
1243c1762a3fSThirumalai Pachamuthu 	 * More data bit in the WMI_DATA_HDR if there are
1244c1762a3fSThirumalai Pachamuthu 	 * more pkts for this STA in the APSD q.
1245c1762a3fSThirumalai Pachamuthu 	 * If there are no more pkts for this STA,
1246c1762a3fSThirumalai Pachamuthu 	 * update the APSD bitmap for this STA.
1247c1762a3fSThirumalai Pachamuthu 	 */
1248c1762a3fSThirumalai Pachamuthu 
1249c1762a3fSThirumalai Pachamuthu 	num_frames_to_deliver = (conn->apsd_info >> ATH6KL_APSD_NUM_OF_AC) &
1250c1762a3fSThirumalai Pachamuthu 						    ATH6KL_APSD_FRAME_MASK;
1251c1762a3fSThirumalai Pachamuthu 	/*
1252c1762a3fSThirumalai Pachamuthu 	 * Number of frames to send in a service period is
1253c1762a3fSThirumalai Pachamuthu 	 * indicated by the station
1254c1762a3fSThirumalai Pachamuthu 	 * in the QOS_INFO of the association request
1255c1762a3fSThirumalai Pachamuthu 	 * If it is zero, send all frames
1256c1762a3fSThirumalai Pachamuthu 	 */
1257c1762a3fSThirumalai Pachamuthu 	if (!num_frames_to_deliver)
1258c1762a3fSThirumalai Pachamuthu 		num_frames_to_deliver = ATH6KL_APSD_ALL_FRAME;
1259c1762a3fSThirumalai Pachamuthu 
1260c1762a3fSThirumalai Pachamuthu 	spin_lock_bh(&conn->psq_lock);
1261c1762a3fSThirumalai Pachamuthu 	is_apsdq_empty = skb_queue_empty(&conn->apsdq);
1262c1762a3fSThirumalai Pachamuthu 	spin_unlock_bh(&conn->psq_lock);
1263c1762a3fSThirumalai Pachamuthu 	is_apsdq_empty_at_start = is_apsdq_empty;
1264c1762a3fSThirumalai Pachamuthu 
1265c1762a3fSThirumalai Pachamuthu 	while ((!is_apsdq_empty) && (num_frames_to_deliver)) {
1266c1762a3fSThirumalai Pachamuthu 		spin_lock_bh(&conn->psq_lock);
1267c1762a3fSThirumalai Pachamuthu 		skb = skb_dequeue(&conn->apsdq);
1268c1762a3fSThirumalai Pachamuthu 		is_apsdq_empty = skb_queue_empty(&conn->apsdq);
1269c1762a3fSThirumalai Pachamuthu 		spin_unlock_bh(&conn->psq_lock);
1270c1762a3fSThirumalai Pachamuthu 
1271c1762a3fSThirumalai Pachamuthu 		/*
1272c1762a3fSThirumalai Pachamuthu 		 * Set the STA flag to Trigger delivery,
1273c1762a3fSThirumalai Pachamuthu 		 * so that the frame will go out
1274c1762a3fSThirumalai Pachamuthu 		 */
1275c1762a3fSThirumalai Pachamuthu 		conn->sta_flags |= STA_PS_APSD_TRIGGER;
1276c1762a3fSThirumalai Pachamuthu 		num_frames_to_deliver--;
1277c1762a3fSThirumalai Pachamuthu 
1278c1762a3fSThirumalai Pachamuthu 		/* Last frame in the service period, set EOSP or queue empty */
1279c1762a3fSThirumalai Pachamuthu 		if ((is_apsdq_empty) || (!num_frames_to_deliver))
1280c1762a3fSThirumalai Pachamuthu 			conn->sta_flags |= STA_PS_APSD_EOSP;
1281c1762a3fSThirumalai Pachamuthu 
1282c1762a3fSThirumalai Pachamuthu 		ath6kl_data_tx(skb, vif->ndev);
1283c1762a3fSThirumalai Pachamuthu 		conn->sta_flags &= ~(STA_PS_APSD_TRIGGER);
1284c1762a3fSThirumalai Pachamuthu 		conn->sta_flags &= ~(STA_PS_APSD_EOSP);
1285c1762a3fSThirumalai Pachamuthu 	}
1286c1762a3fSThirumalai Pachamuthu 
1287c1762a3fSThirumalai Pachamuthu 	if (is_apsdq_empty) {
1288c1762a3fSThirumalai Pachamuthu 		if (is_apsdq_empty_at_start)
1289c1762a3fSThirumalai Pachamuthu 			flags = WMI_AP_APSD_NO_DELIVERY_FRAMES;
1290c1762a3fSThirumalai Pachamuthu 		else
1291c1762a3fSThirumalai Pachamuthu 			flags = 0;
1292c1762a3fSThirumalai Pachamuthu 
1293c1762a3fSThirumalai Pachamuthu 		ath6kl_wmi_set_apsd_bfrd_traf(ar->wmi,
1294c1762a3fSThirumalai Pachamuthu 					      vif->fw_vif_idx,
1295c1762a3fSThirumalai Pachamuthu 					      conn->aid, 0, flags);
1296c1762a3fSThirumalai Pachamuthu 	}
1297c1762a3fSThirumalai Pachamuthu 
1298c1762a3fSThirumalai Pachamuthu 	return;
1299c1762a3fSThirumalai Pachamuthu }
1300c1762a3fSThirumalai Pachamuthu 
ath6kl_rx(struct htc_target * target,struct htc_packet * packet)1301bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet)
1302bdcd8170SKalle Valo {
1303bdcd8170SKalle Valo 	struct ath6kl *ar = target->dev->ar;
1304bdcd8170SKalle Valo 	struct sk_buff *skb = packet->pkt_cntxt;
1305bdcd8170SKalle Valo 	struct wmi_rx_meta_v2 *meta;
1306bdcd8170SKalle Valo 	struct wmi_data_hdr *dhdr;
1307bdcd8170SKalle Valo 	int min_hdr_len;
1308bdcd8170SKalle Valo 	u8 meta_type, dot11_hdr = 0;
13098bd5bca8SKalle Valo 	u8 pad_before_data_start;
1310bdcd8170SKalle Valo 	int status = packet->status;
1311bdcd8170SKalle Valo 	enum htc_endpoint_id ept = packet->endpoint;
1312bdcd8170SKalle Valo 	bool is_amsdu, prev_ps, ps_state = false;
1313c1762a3fSThirumalai Pachamuthu 	bool trig_state = false;
1314bdcd8170SKalle Valo 	struct ath6kl_sta *conn = NULL;
1315bdcd8170SKalle Valo 	struct sk_buff *skb1 = NULL;
1316bdcd8170SKalle Valo 	struct ethhdr *datap = NULL;
13176765d0aaSVasanthakumar Thiagarajan 	struct ath6kl_vif *vif;
13181d2a4456SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn;
1319bdcd8170SKalle Valo 	u16 seq_no, offset;
13206765d0aaSVasanthakumar Thiagarajan 	u8 tid, if_idx;
1321bdcd8170SKalle Valo 
1322bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
1323bdcd8170SKalle Valo 		   "%s: ar=0x%p eid=%d, skb=0x%p, data=0x%p, len=0x%x status:%d",
1324bdcd8170SKalle Valo 		   __func__, ar, ept, skb, packet->buf,
1325bdcd8170SKalle Valo 		   packet->act_len, status);
1326bdcd8170SKalle Valo 
132715ac0778SKalle Valo 	if (status || packet->act_len < HTC_HDR_LENGTH) {
13286765d0aaSVasanthakumar Thiagarajan 		dev_kfree_skb(skb);
13296765d0aaSVasanthakumar Thiagarajan 		return;
13306765d0aaSVasanthakumar Thiagarajan 	}
13316765d0aaSVasanthakumar Thiagarajan 
13326765d0aaSVasanthakumar Thiagarajan 	skb_put(skb, packet->act_len + HTC_HDR_LENGTH);
13336765d0aaSVasanthakumar Thiagarajan 	skb_pull(skb, HTC_HDR_LENGTH);
13346765d0aaSVasanthakumar Thiagarajan 
133581db48dcSVasanthakumar Thiagarajan 	ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "rx ",
133681db48dcSVasanthakumar Thiagarajan 			skb->data, skb->len);
133781db48dcSVasanthakumar Thiagarajan 
13386765d0aaSVasanthakumar Thiagarajan 	if (ept == ar->ctrl_ep) {
133981db48dcSVasanthakumar Thiagarajan 		if (test_bit(WMI_ENABLED, &ar->flag)) {
134081db48dcSVasanthakumar Thiagarajan 			ath6kl_check_wow_status(ar);
134181db48dcSVasanthakumar Thiagarajan 			ath6kl_wmi_control_rx(ar->wmi, skb);
134281db48dcSVasanthakumar Thiagarajan 			return;
134381db48dcSVasanthakumar Thiagarajan 		}
13446765d0aaSVasanthakumar Thiagarajan 		if_idx =
13456765d0aaSVasanthakumar Thiagarajan 		wmi_cmd_hdr_get_if_idx((struct wmi_cmd_hdr *) skb->data);
13466765d0aaSVasanthakumar Thiagarajan 	} else {
13476765d0aaSVasanthakumar Thiagarajan 		if_idx =
13486765d0aaSVasanthakumar Thiagarajan 		wmi_data_hdr_get_if_idx((struct wmi_data_hdr *) skb->data);
13496765d0aaSVasanthakumar Thiagarajan 	}
13506765d0aaSVasanthakumar Thiagarajan 
13516765d0aaSVasanthakumar Thiagarajan 	vif = ath6kl_get_vif_by_index(ar, if_idx);
13526765d0aaSVasanthakumar Thiagarajan 	if (!vif) {
1353bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1354bdcd8170SKalle Valo 		return;
1355bdcd8170SKalle Valo 	}
1356bdcd8170SKalle Valo 
1357bdcd8170SKalle Valo 	/*
1358bdcd8170SKalle Valo 	 * Take lock to protect buffer counts and adaptive power throughput
1359bdcd8170SKalle Valo 	 * state.
1360bdcd8170SKalle Valo 	 */
1361478ac027SVasanthakumar Thiagarajan 	spin_lock_bh(&vif->if_lock);
1362bdcd8170SKalle Valo 
13631235a3b6STobias Klauser 	vif->ndev->stats.rx_packets++;
13641235a3b6STobias Klauser 	vif->ndev->stats.rx_bytes += packet->act_len;
1365bdcd8170SKalle Valo 
1366478ac027SVasanthakumar Thiagarajan 	spin_unlock_bh(&vif->if_lock);
136783dc5f2fSVasanthakumar Thiagarajan 
136828ae58ddSVasanthakumar Thiagarajan 	skb->dev = vif->ndev;
1369bdcd8170SKalle Valo 
1370bdcd8170SKalle Valo 	if (!test_bit(WMI_ENABLED, &ar->flag)) {
1371bdcd8170SKalle Valo 		if (EPPING_ALIGNMENT_PAD > 0)
1372bdcd8170SKalle Valo 			skb_pull(skb, EPPING_ALIGNMENT_PAD);
137328ae58ddSVasanthakumar Thiagarajan 		ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb);
1374bdcd8170SKalle Valo 		return;
1375bdcd8170SKalle Valo 	}
1376bdcd8170SKalle Valo 
1377a918fb3cSRaja Mani 	ath6kl_check_wow_status(ar);
1378a918fb3cSRaja Mani 
137967f9178fSVasanthakumar Thiagarajan 	min_hdr_len = sizeof(struct ethhdr) + sizeof(struct wmi_data_hdr) +
1380bdcd8170SKalle Valo 		      sizeof(struct ath6kl_llc_snap_hdr);
1381bdcd8170SKalle Valo 
1382bdcd8170SKalle Valo 	dhdr = (struct wmi_data_hdr *) skb->data;
1383bdcd8170SKalle Valo 
1384bdcd8170SKalle Valo 	/*
1385bdcd8170SKalle Valo 	 * In the case of AP mode we may receive NULL data frames
1386bdcd8170SKalle Valo 	 * that do not have LLC hdr. They are 16 bytes in size.
1387bdcd8170SKalle Valo 	 * Allow these frames in the AP mode.
1388bdcd8170SKalle Valo 	 */
1389f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type != AP_NETWORK &&
1390bdcd8170SKalle Valo 	    ((packet->act_len < min_hdr_len) ||
1391bdcd8170SKalle Valo 	     (packet->act_len > WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH))) {
1392bdcd8170SKalle Valo 		ath6kl_info("frame len is too short or too long\n");
13931235a3b6STobias Klauser 		vif->ndev->stats.rx_errors++;
13941235a3b6STobias Klauser 		vif->ndev->stats.rx_length_errors++;
1395bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1396bdcd8170SKalle Valo 		return;
1397bdcd8170SKalle Valo 	}
1398bdcd8170SKalle Valo 
1399270df8f8SPierre Le Magourou 	pad_before_data_start =
1400270df8f8SPierre Le Magourou 		(le16_to_cpu(dhdr->info3) >> WMI_DATA_HDR_PAD_BEFORE_DATA_SHIFT)
1401270df8f8SPierre Le Magourou 			& WMI_DATA_HDR_PAD_BEFORE_DATA_MASK;
1402270df8f8SPierre Le Magourou 
1403bdcd8170SKalle Valo 	/* Get the Power save state of the STA */
1404f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
1405bdcd8170SKalle Valo 		meta_type = wmi_data_hdr_get_meta(dhdr);
1406bdcd8170SKalle Valo 
1407bdcd8170SKalle Valo 		ps_state = !!((dhdr->info >> WMI_DATA_HDR_PS_SHIFT) &
1408bdcd8170SKalle Valo 			      WMI_DATA_HDR_PS_MASK);
1409bdcd8170SKalle Valo 
1410270df8f8SPierre Le Magourou 		offset = sizeof(struct wmi_data_hdr) + pad_before_data_start;
1411c1762a3fSThirumalai Pachamuthu 		trig_state = !!(le16_to_cpu(dhdr->info3) & WMI_DATA_HDR_TRIG);
1412bdcd8170SKalle Valo 
1413bdcd8170SKalle Valo 		switch (meta_type) {
1414bdcd8170SKalle Valo 		case 0:
1415bdcd8170SKalle Valo 			break;
1416bdcd8170SKalle Valo 		case WMI_META_VERSION_1:
1417bdcd8170SKalle Valo 			offset += sizeof(struct wmi_rx_meta_v1);
1418bdcd8170SKalle Valo 			break;
1419bdcd8170SKalle Valo 		case WMI_META_VERSION_2:
1420bdcd8170SKalle Valo 			offset += sizeof(struct wmi_rx_meta_v2);
1421bdcd8170SKalle Valo 			break;
1422bdcd8170SKalle Valo 		default:
1423bdcd8170SKalle Valo 			break;
1424bdcd8170SKalle Valo 		}
1425bdcd8170SKalle Valo 
1426bdcd8170SKalle Valo 		datap = (struct ethhdr *) (skb->data + offset);
14276765d0aaSVasanthakumar Thiagarajan 		conn = ath6kl_find_sta(vif, datap->h_source);
1428bdcd8170SKalle Valo 
1429bdcd8170SKalle Valo 		if (!conn) {
1430bdcd8170SKalle Valo 			dev_kfree_skb(skb);
1431bdcd8170SKalle Valo 			return;
1432bdcd8170SKalle Valo 		}
1433bdcd8170SKalle Valo 
1434bdcd8170SKalle Valo 		/*
1435bdcd8170SKalle Valo 		 * If there is a change in PS state of the STA,
1436bdcd8170SKalle Valo 		 * take appropriate steps:
1437bdcd8170SKalle Valo 		 *
1438bdcd8170SKalle Valo 		 * 1. If Sleep-->Awake, flush the psq for the STA
1439bdcd8170SKalle Valo 		 *    Clear the PVB for the STA.
1440bdcd8170SKalle Valo 		 * 2. If Awake-->Sleep, Starting queueing frames
1441bdcd8170SKalle Valo 		 *    the STA.
1442bdcd8170SKalle Valo 		 */
1443bdcd8170SKalle Valo 		prev_ps = !!(conn->sta_flags & STA_PS_SLEEP);
1444bdcd8170SKalle Valo 
1445bdcd8170SKalle Valo 		if (ps_state)
1446bdcd8170SKalle Valo 			conn->sta_flags |= STA_PS_SLEEP;
1447bdcd8170SKalle Valo 		else
1448bdcd8170SKalle Valo 			conn->sta_flags &= ~STA_PS_SLEEP;
1449bdcd8170SKalle Valo 
1450c1762a3fSThirumalai Pachamuthu 		/* Accept trigger only when the station is in sleep */
1451c1762a3fSThirumalai Pachamuthu 		if ((conn->sta_flags & STA_PS_SLEEP) && trig_state)
1452c1762a3fSThirumalai Pachamuthu 			ath6kl_uapsd_trigger_frame_rx(vif, conn);
1453c1762a3fSThirumalai Pachamuthu 
1454bdcd8170SKalle Valo 		if (prev_ps ^ !!(conn->sta_flags & STA_PS_SLEEP)) {
1455bdcd8170SKalle Valo 			if (!(conn->sta_flags & STA_PS_SLEEP)) {
1456bdcd8170SKalle Valo 				struct sk_buff *skbuff = NULL;
1457c1762a3fSThirumalai Pachamuthu 				bool is_apsdq_empty;
1458d0ff7383SNaveen Gangadharan 				struct ath6kl_mgmt_buff *mgmt;
1459d0ff7383SNaveen Gangadharan 				u8 idx;
1460bdcd8170SKalle Valo 
1461bdcd8170SKalle Valo 				spin_lock_bh(&conn->psq_lock);
1462d0ff7383SNaveen Gangadharan 				while (conn->mgmt_psq_len > 0) {
1463d0ff7383SNaveen Gangadharan 					mgmt = list_first_entry(
1464d0ff7383SNaveen Gangadharan 							&conn->mgmt_psq,
1465d0ff7383SNaveen Gangadharan 							struct ath6kl_mgmt_buff,
1466d0ff7383SNaveen Gangadharan 							list);
1467d0ff7383SNaveen Gangadharan 					list_del(&mgmt->list);
1468d0ff7383SNaveen Gangadharan 					conn->mgmt_psq_len--;
1469d0ff7383SNaveen Gangadharan 					spin_unlock_bh(&conn->psq_lock);
1470d0ff7383SNaveen Gangadharan 					idx = vif->fw_vif_idx;
1471d0ff7383SNaveen Gangadharan 
1472d0ff7383SNaveen Gangadharan 					ath6kl_wmi_send_mgmt_cmd(ar->wmi,
1473d0ff7383SNaveen Gangadharan 								 idx,
1474d0ff7383SNaveen Gangadharan 								 mgmt->id,
1475d0ff7383SNaveen Gangadharan 								 mgmt->freq,
1476d0ff7383SNaveen Gangadharan 								 mgmt->wait,
1477d0ff7383SNaveen Gangadharan 								 mgmt->buf,
1478d0ff7383SNaveen Gangadharan 								 mgmt->len,
1479d0ff7383SNaveen Gangadharan 								 mgmt->no_cck);
1480d0ff7383SNaveen Gangadharan 
1481d0ff7383SNaveen Gangadharan 					kfree(mgmt);
1482d0ff7383SNaveen Gangadharan 					spin_lock_bh(&conn->psq_lock);
1483d0ff7383SNaveen Gangadharan 				}
1484d0ff7383SNaveen Gangadharan 				conn->mgmt_psq_len = 0;
1485c1762a3fSThirumalai Pachamuthu 				while ((skbuff = skb_dequeue(&conn->psq))) {
1486c1762a3fSThirumalai Pachamuthu 					spin_unlock_bh(&conn->psq_lock);
1487c1762a3fSThirumalai Pachamuthu 					ath6kl_data_tx(skbuff, vif->ndev);
1488c1762a3fSThirumalai Pachamuthu 					spin_lock_bh(&conn->psq_lock);
1489c1762a3fSThirumalai Pachamuthu 				}
1490c1762a3fSThirumalai Pachamuthu 
1491c1762a3fSThirumalai Pachamuthu 				is_apsdq_empty = skb_queue_empty(&conn->apsdq);
1492c1762a3fSThirumalai Pachamuthu 				while ((skbuff = skb_dequeue(&conn->apsdq))) {
1493bdcd8170SKalle Valo 					spin_unlock_bh(&conn->psq_lock);
149428ae58ddSVasanthakumar Thiagarajan 					ath6kl_data_tx(skbuff, vif->ndev);
1495bdcd8170SKalle Valo 					spin_lock_bh(&conn->psq_lock);
1496bdcd8170SKalle Valo 				}
1497bdcd8170SKalle Valo 				spin_unlock_bh(&conn->psq_lock);
1498c1762a3fSThirumalai Pachamuthu 
1499c1762a3fSThirumalai Pachamuthu 				if (!is_apsdq_empty)
1500c1762a3fSThirumalai Pachamuthu 					ath6kl_wmi_set_apsd_bfrd_traf(
1501c1762a3fSThirumalai Pachamuthu 							ar->wmi,
1502c1762a3fSThirumalai Pachamuthu 							vif->fw_vif_idx,
1503c1762a3fSThirumalai Pachamuthu 							conn->aid, 0, 0);
1504c1762a3fSThirumalai Pachamuthu 
1505bdcd8170SKalle Valo 				/* Clear the PVB for this STA */
1506334234b5SVasanthakumar Thiagarajan 				ath6kl_wmi_set_pvb_cmd(ar->wmi, vif->fw_vif_idx,
1507334234b5SVasanthakumar Thiagarajan 						       conn->aid, 0);
1508bdcd8170SKalle Valo 			}
1509bdcd8170SKalle Valo 		}
1510bdcd8170SKalle Valo 
1511bdcd8170SKalle Valo 		/* drop NULL data frames here */
1512bdcd8170SKalle Valo 		if ((packet->act_len < min_hdr_len) ||
1513bdcd8170SKalle Valo 		    (packet->act_len >
1514bdcd8170SKalle Valo 		     WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH)) {
1515bdcd8170SKalle Valo 			dev_kfree_skb(skb);
1516bdcd8170SKalle Valo 			return;
1517bdcd8170SKalle Valo 		}
1518bdcd8170SKalle Valo 	}
1519bdcd8170SKalle Valo 
1520bdcd8170SKalle Valo 	is_amsdu = wmi_data_hdr_is_amsdu(dhdr) ? true : false;
1521bdcd8170SKalle Valo 	tid = wmi_data_hdr_get_up(dhdr);
1522bdcd8170SKalle Valo 	seq_no = wmi_data_hdr_get_seqno(dhdr);
1523bdcd8170SKalle Valo 	meta_type = wmi_data_hdr_get_meta(dhdr);
1524bdcd8170SKalle Valo 	dot11_hdr = wmi_data_hdr_get_dot11(dhdr);
15258bd5bca8SKalle Valo 
1526594a0bc8SVasanthakumar Thiagarajan 	skb_pull(skb, sizeof(struct wmi_data_hdr));
1527bdcd8170SKalle Valo 
1528bdcd8170SKalle Valo 	switch (meta_type) {
1529bdcd8170SKalle Valo 	case WMI_META_VERSION_1:
1530bdcd8170SKalle Valo 		skb_pull(skb, sizeof(struct wmi_rx_meta_v1));
1531bdcd8170SKalle Valo 		break;
1532bdcd8170SKalle Valo 	case WMI_META_VERSION_2:
1533bdcd8170SKalle Valo 		meta = (struct wmi_rx_meta_v2 *) skb->data;
1534bdcd8170SKalle Valo 		if (meta->csum_flags & 0x1) {
1535bdcd8170SKalle Valo 			skb->ip_summed = CHECKSUM_COMPLETE;
1536bdcd8170SKalle Valo 			skb->csum = (__force __wsum) meta->csum;
1537bdcd8170SKalle Valo 		}
1538bdcd8170SKalle Valo 		skb_pull(skb, sizeof(struct wmi_rx_meta_v2));
1539bdcd8170SKalle Valo 		break;
1540bdcd8170SKalle Valo 	default:
1541bdcd8170SKalle Valo 		break;
1542bdcd8170SKalle Valo 	}
1543bdcd8170SKalle Valo 
15448bd5bca8SKalle Valo 	skb_pull(skb, pad_before_data_start);
15458bd5bca8SKalle Valo 
1546bdcd8170SKalle Valo 	if (dot11_hdr)
1547bdcd8170SKalle Valo 		status = ath6kl_wmi_dot11_hdr_remove(ar->wmi, skb);
1548bdcd8170SKalle Valo 	else if (!is_amsdu)
1549bdcd8170SKalle Valo 		status = ath6kl_wmi_dot3_2_dix(skb);
1550bdcd8170SKalle Valo 
1551bdcd8170SKalle Valo 	if (status) {
1552bdcd8170SKalle Valo 		/*
1553bdcd8170SKalle Valo 		 * Drop frames that could not be processed (lack of
1554bdcd8170SKalle Valo 		 * memory, etc.)
1555bdcd8170SKalle Valo 		 */
1556bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1557bdcd8170SKalle Valo 		return;
1558bdcd8170SKalle Valo 	}
1559bdcd8170SKalle Valo 
156028ae58ddSVasanthakumar Thiagarajan 	if (!(vif->ndev->flags & IFF_UP)) {
1561bdcd8170SKalle Valo 		dev_kfree_skb(skb);
1562bdcd8170SKalle Valo 		return;
1563bdcd8170SKalle Valo 	}
1564bdcd8170SKalle Valo 
1565f5938f24SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
1566bdcd8170SKalle Valo 		datap = (struct ethhdr *) skb->data;
1567bdcd8170SKalle Valo 		if (is_multicast_ether_addr(datap->h_dest))
1568bdcd8170SKalle Valo 			/*
1569bdcd8170SKalle Valo 			 * Bcast/Mcast frames should be sent to the
1570bdcd8170SKalle Valo 			 * OS stack as well as on the air.
1571bdcd8170SKalle Valo 			 */
1572bdcd8170SKalle Valo 			skb1 = skb_copy(skb, GFP_ATOMIC);
1573bdcd8170SKalle Valo 		else {
1574bdcd8170SKalle Valo 			/*
1575bdcd8170SKalle Valo 			 * Search for a connected STA with dstMac
1576bdcd8170SKalle Valo 			 * as the Mac address. If found send the
1577bdcd8170SKalle Valo 			 * frame to it on the air else send the
1578bdcd8170SKalle Valo 			 * frame up the stack.
1579bdcd8170SKalle Valo 			 */
15806765d0aaSVasanthakumar Thiagarajan 			conn = ath6kl_find_sta(vif, datap->h_dest);
1581bdcd8170SKalle Valo 
1582bdcd8170SKalle Valo 			if (conn && ar->intra_bss) {
1583bdcd8170SKalle Valo 				skb1 = skb;
1584bdcd8170SKalle Valo 				skb = NULL;
1585bdcd8170SKalle Valo 			} else if (conn && !ar->intra_bss) {
1586bdcd8170SKalle Valo 				dev_kfree_skb(skb);
1587bdcd8170SKalle Valo 				skb = NULL;
1588bdcd8170SKalle Valo 			}
1589bdcd8170SKalle Valo 		}
1590bdcd8170SKalle Valo 		if (skb1)
159128ae58ddSVasanthakumar Thiagarajan 			ath6kl_data_tx(skb1, vif->ndev);
1592ad3f78b9SKalle Valo 
1593ad3f78b9SKalle Valo 		if (skb == NULL) {
1594ad3f78b9SKalle Valo 			/* nothing to deliver up the stack */
1595ad3f78b9SKalle Valo 			return;
1596ad3f78b9SKalle Valo 		}
1597bdcd8170SKalle Valo 	}
1598bdcd8170SKalle Valo 
15995694f962SKalle Valo 	datap = (struct ethhdr *) skb->data;
16005694f962SKalle Valo 
16011d2a4456SVasanthakumar Thiagarajan 	if (is_unicast_ether_addr(datap->h_dest)) {
16021d2a4456SVasanthakumar Thiagarajan 		if (vif->nw_type == AP_NETWORK) {
16031d2a4456SVasanthakumar Thiagarajan 			conn = ath6kl_find_sta(vif, datap->h_source);
16041d2a4456SVasanthakumar Thiagarajan 			if (!conn)
16051d2a4456SVasanthakumar Thiagarajan 				return;
16061d2a4456SVasanthakumar Thiagarajan 			aggr_conn = conn->aggr_conn;
1607a5d8f9dfSKalle Valo 		} else {
16081d2a4456SVasanthakumar Thiagarajan 			aggr_conn = vif->aggr_cntxt->aggr_conn;
1609a5d8f9dfSKalle Valo 		}
16101d2a4456SVasanthakumar Thiagarajan 
16111d2a4456SVasanthakumar Thiagarajan 		if (aggr_process_recv_frm(aggr_conn, tid, seq_no,
16121d2a4456SVasanthakumar Thiagarajan 					  is_amsdu, skb)) {
16135694f962SKalle Valo 			/* aggregation code will handle the skb */
16145694f962SKalle Valo 			return;
16151d2a4456SVasanthakumar Thiagarajan 		}
1616a5d8f9dfSKalle Valo 	} else if (!is_broadcast_ether_addr(datap->h_dest)) {
16171235a3b6STobias Klauser 		vif->ndev->stats.multicast++;
1618a5d8f9dfSKalle Valo 	}
16195694f962SKalle Valo 
162028ae58ddSVasanthakumar Thiagarajan 	ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb);
1621bdcd8170SKalle Valo }
1622bdcd8170SKalle Valo 
aggr_timeout(struct timer_list * t)16237ac76764SKees Cook static void aggr_timeout(struct timer_list *t)
1624bdcd8170SKalle Valo {
1625bdcd8170SKalle Valo 	u8 i, j;
16267ac76764SKees Cook 	struct aggr_info_conn *aggr_conn = from_timer(aggr_conn, t, timer);
1627bdcd8170SKalle Valo 	struct rxtid *rxtid;
1628bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1629bdcd8170SKalle Valo 
1630bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
16317baef812SVasanthakumar Thiagarajan 		rxtid = &aggr_conn->rx_tid[i];
16327baef812SVasanthakumar Thiagarajan 		stats = &aggr_conn->stat[i];
1633bdcd8170SKalle Valo 
16347940bad5SVasanthakumar Thiagarajan 		if (!rxtid->aggr || !rxtid->timer_mon)
1635bdcd8170SKalle Valo 			continue;
1636bdcd8170SKalle Valo 
1637bdcd8170SKalle Valo 		stats->num_timeouts++;
163837ca6335SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_AGGR,
163937ca6335SKalle Valo 			   "aggr timeout (st %d end %d)\n",
1640bdcd8170SKalle Valo 			   rxtid->seq_next,
1641bdcd8170SKalle Valo 			   ((rxtid->seq_next + rxtid->hold_q_sz-1) &
1642bdcd8170SKalle Valo 			    ATH6KL_MAX_SEQ_NO));
16431d2a4456SVasanthakumar Thiagarajan 		aggr_deque_frms(aggr_conn, i, 0, 0);
1644bdcd8170SKalle Valo 	}
1645bdcd8170SKalle Valo 
16467baef812SVasanthakumar Thiagarajan 	aggr_conn->timer_scheduled = false;
1647bdcd8170SKalle Valo 
1648bdcd8170SKalle Valo 	for (i = 0; i < NUM_OF_TIDS; i++) {
16497baef812SVasanthakumar Thiagarajan 		rxtid = &aggr_conn->rx_tid[i];
1650bdcd8170SKalle Valo 
1651bdcd8170SKalle Valo 		if (rxtid->aggr && rxtid->hold_q) {
16520faf7458SVasanthakumar Thiagarajan 			spin_lock_bh(&rxtid->lock);
1653bdcd8170SKalle Valo 			for (j = 0; j < rxtid->hold_q_sz; j++) {
1654bdcd8170SKalle Valo 				if (rxtid->hold_q[j].skb) {
16557baef812SVasanthakumar Thiagarajan 					aggr_conn->timer_scheduled = true;
1656bdcd8170SKalle Valo 					rxtid->timer_mon = true;
1657bdcd8170SKalle Valo 					break;
1658bdcd8170SKalle Valo 				}
1659bdcd8170SKalle Valo 			}
16600faf7458SVasanthakumar Thiagarajan 			spin_unlock_bh(&rxtid->lock);
1661bdcd8170SKalle Valo 
1662bdcd8170SKalle Valo 			if (j >= rxtid->hold_q_sz)
1663bdcd8170SKalle Valo 				rxtid->timer_mon = false;
1664bdcd8170SKalle Valo 		}
1665bdcd8170SKalle Valo 	}
1666bdcd8170SKalle Valo 
16677baef812SVasanthakumar Thiagarajan 	if (aggr_conn->timer_scheduled)
16687baef812SVasanthakumar Thiagarajan 		mod_timer(&aggr_conn->timer,
1669bdcd8170SKalle Valo 			  jiffies + msecs_to_jiffies(AGGR_RX_TIMEOUT));
1670bdcd8170SKalle Valo }
1671bdcd8170SKalle Valo 
aggr_delete_tid_state(struct aggr_info_conn * aggr_conn,u8 tid)16727baef812SVasanthakumar Thiagarajan static void aggr_delete_tid_state(struct aggr_info_conn *aggr_conn, u8 tid)
1673bdcd8170SKalle Valo {
1674bdcd8170SKalle Valo 	struct rxtid *rxtid;
1675bdcd8170SKalle Valo 	struct rxtid_stats *stats;
1676bdcd8170SKalle Valo 
16777baef812SVasanthakumar Thiagarajan 	if (!aggr_conn || tid >= NUM_OF_TIDS)
1678bdcd8170SKalle Valo 		return;
1679bdcd8170SKalle Valo 
16807baef812SVasanthakumar Thiagarajan 	rxtid = &aggr_conn->rx_tid[tid];
16817baef812SVasanthakumar Thiagarajan 	stats = &aggr_conn->stat[tid];
1682bdcd8170SKalle Valo 
1683bdcd8170SKalle Valo 	if (rxtid->aggr)
16841d2a4456SVasanthakumar Thiagarajan 		aggr_deque_frms(aggr_conn, tid, 0, 0);
1685bdcd8170SKalle Valo 
1686bdcd8170SKalle Valo 	rxtid->aggr = false;
1687bdcd8170SKalle Valo 	rxtid->timer_mon = false;
1688bdcd8170SKalle Valo 	rxtid->win_sz = 0;
1689bdcd8170SKalle Valo 	rxtid->seq_next = 0;
1690bdcd8170SKalle Valo 	rxtid->hold_q_sz = 0;
1691bdcd8170SKalle Valo 
1692bdcd8170SKalle Valo 	kfree(rxtid->hold_q);
1693bdcd8170SKalle Valo 	rxtid->hold_q = NULL;
1694bdcd8170SKalle Valo 
1695bdcd8170SKalle Valo 	memset(stats, 0, sizeof(struct rxtid_stats));
1696bdcd8170SKalle Valo }
1697bdcd8170SKalle Valo 
aggr_recv_addba_req_evt(struct ath6kl_vif * vif,u8 tid_mux,u16 seq_no,u8 win_sz)16983fdc0991SVasanthakumar Thiagarajan void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid_mux, u16 seq_no,
1699240d2799SVasanthakumar Thiagarajan 			     u8 win_sz)
1700bdcd8170SKalle Valo {
17011d2a4456SVasanthakumar Thiagarajan 	struct ath6kl_sta *sta;
17021d2a4456SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn = NULL;
1703bdcd8170SKalle Valo 	struct rxtid *rxtid;
1704bdcd8170SKalle Valo 	u16 hold_q_size;
17051d2a4456SVasanthakumar Thiagarajan 	u8 tid, aid;
1706bdcd8170SKalle Valo 
17071d2a4456SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
17081d2a4456SVasanthakumar Thiagarajan 		aid = ath6kl_get_aid(tid_mux);
17091d2a4456SVasanthakumar Thiagarajan 		sta = ath6kl_find_sta_by_aid(vif->ar, aid);
17101d2a4456SVasanthakumar Thiagarajan 		if (sta)
17111d2a4456SVasanthakumar Thiagarajan 			aggr_conn = sta->aggr_conn;
1712a5d8f9dfSKalle Valo 	} else {
17131d2a4456SVasanthakumar Thiagarajan 		aggr_conn = vif->aggr_cntxt->aggr_conn;
1714a5d8f9dfSKalle Valo 	}
17151d2a4456SVasanthakumar Thiagarajan 
17161d2a4456SVasanthakumar Thiagarajan 	if (!aggr_conn)
1717bdcd8170SKalle Valo 		return;
1718bdcd8170SKalle Valo 
17193fdc0991SVasanthakumar Thiagarajan 	tid = ath6kl_get_tid(tid_mux);
17203fdc0991SVasanthakumar Thiagarajan 	if (tid >= NUM_OF_TIDS)
17213fdc0991SVasanthakumar Thiagarajan 		return;
17223fdc0991SVasanthakumar Thiagarajan 
17237baef812SVasanthakumar Thiagarajan 	rxtid = &aggr_conn->rx_tid[tid];
1724bdcd8170SKalle Valo 
1725bdcd8170SKalle Valo 	if (win_sz < AGGR_WIN_SZ_MIN || win_sz > AGGR_WIN_SZ_MAX)
1726bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: win_sz %d, tid %d\n",
1727bdcd8170SKalle Valo 			   __func__, win_sz, tid);
1728bdcd8170SKalle Valo 
1729bdcd8170SKalle Valo 	if (rxtid->aggr)
17307baef812SVasanthakumar Thiagarajan 		aggr_delete_tid_state(aggr_conn, tid);
1731bdcd8170SKalle Valo 
1732bdcd8170SKalle Valo 	rxtid->seq_next = seq_no;
1733bdcd8170SKalle Valo 	hold_q_size = TID_WINDOW_SZ(win_sz) * sizeof(struct skb_hold_q);
1734bdcd8170SKalle Valo 	rxtid->hold_q = kzalloc(hold_q_size, GFP_KERNEL);
1735bdcd8170SKalle Valo 	if (!rxtid->hold_q)
1736bdcd8170SKalle Valo 		return;
1737bdcd8170SKalle Valo 
1738bdcd8170SKalle Valo 	rxtid->win_sz = win_sz;
1739bdcd8170SKalle Valo 	rxtid->hold_q_sz = TID_WINDOW_SZ(win_sz);
1740bdcd8170SKalle Valo 	if (!skb_queue_empty(&rxtid->q))
1741bdcd8170SKalle Valo 		return;
1742bdcd8170SKalle Valo 
1743bdcd8170SKalle Valo 	rxtid->aggr = true;
1744bdcd8170SKalle Valo }
1745bdcd8170SKalle Valo 
aggr_conn_init(struct ath6kl_vif * vif,struct aggr_info * aggr_info,struct aggr_info_conn * aggr_conn)1746c8651541SVasanthakumar Thiagarajan void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info,
1747c8651541SVasanthakumar Thiagarajan 		    struct aggr_info_conn *aggr_conn)
1748bdcd8170SKalle Valo {
1749bdcd8170SKalle Valo 	struct rxtid *rxtid;
1750bdcd8170SKalle Valo 	u8 i;
1751bdcd8170SKalle Valo 
17527baef812SVasanthakumar Thiagarajan 	aggr_conn->aggr_sz = AGGR_SZ_DEFAULT;
17537baef812SVasanthakumar Thiagarajan 	aggr_conn->dev = vif->ndev;
17547ac76764SKees Cook 	timer_setup(&aggr_conn->timer, aggr_timeout, 0);
1755c8651541SVasanthakumar Thiagarajan 	aggr_conn->aggr_info = aggr_info;
17567baef812SVasanthakumar Thiagarajan 
17577baef812SVasanthakumar Thiagarajan 	aggr_conn->timer_scheduled = false;
17587baef812SVasanthakumar Thiagarajan 
17597baef812SVasanthakumar Thiagarajan 	for (i = 0; i < NUM_OF_TIDS; i++) {
17607baef812SVasanthakumar Thiagarajan 		rxtid = &aggr_conn->rx_tid[i];
17617baef812SVasanthakumar Thiagarajan 		rxtid->aggr = false;
17627baef812SVasanthakumar Thiagarajan 		rxtid->timer_mon = false;
17637baef812SVasanthakumar Thiagarajan 		skb_queue_head_init(&rxtid->q);
17647baef812SVasanthakumar Thiagarajan 		spin_lock_init(&rxtid->lock);
17657baef812SVasanthakumar Thiagarajan 	}
17667baef812SVasanthakumar Thiagarajan }
17677baef812SVasanthakumar Thiagarajan 
aggr_init(struct ath6kl_vif * vif)17687baef812SVasanthakumar Thiagarajan struct aggr_info *aggr_init(struct ath6kl_vif *vif)
17697baef812SVasanthakumar Thiagarajan {
17707baef812SVasanthakumar Thiagarajan 	struct aggr_info *p_aggr = NULL;
17717baef812SVasanthakumar Thiagarajan 
1772bdcd8170SKalle Valo 	p_aggr = kzalloc(sizeof(struct aggr_info), GFP_KERNEL);
1773bdcd8170SKalle Valo 	if (!p_aggr) {
1774bdcd8170SKalle Valo 		ath6kl_err("failed to alloc memory for aggr_node\n");
1775bdcd8170SKalle Valo 		return NULL;
1776bdcd8170SKalle Valo 	}
1777bdcd8170SKalle Valo 
17787baef812SVasanthakumar Thiagarajan 	p_aggr->aggr_conn = kzalloc(sizeof(struct aggr_info_conn), GFP_KERNEL);
17797baef812SVasanthakumar Thiagarajan 	if (!p_aggr->aggr_conn) {
17807baef812SVasanthakumar Thiagarajan 		ath6kl_err("failed to alloc memory for connection specific aggr info\n");
17817baef812SVasanthakumar Thiagarajan 		kfree(p_aggr);
17827baef812SVasanthakumar Thiagarajan 		return NULL;
1783bdcd8170SKalle Valo 	}
1784bdcd8170SKalle Valo 
1785c8651541SVasanthakumar Thiagarajan 	aggr_conn_init(vif, p_aggr, p_aggr->aggr_conn);
17867baef812SVasanthakumar Thiagarajan 
17877baef812SVasanthakumar Thiagarajan 	skb_queue_head_init(&p_aggr->rx_amsdu_freeq);
17887baef812SVasanthakumar Thiagarajan 	ath6kl_alloc_netbufs(&p_aggr->rx_amsdu_freeq, AGGR_NUM_OF_FREE_NETBUFS);
17897baef812SVasanthakumar Thiagarajan 
1790bdcd8170SKalle Valo 	return p_aggr;
1791bdcd8170SKalle Valo }
1792bdcd8170SKalle Valo 
aggr_recv_delba_req_evt(struct ath6kl_vif * vif,u8 tid_mux)17933fdc0991SVasanthakumar Thiagarajan void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid_mux)
1794bdcd8170SKalle Valo {
17951d2a4456SVasanthakumar Thiagarajan 	struct ath6kl_sta *sta;
1796bdcd8170SKalle Valo 	struct rxtid *rxtid;
17971d2a4456SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn = NULL;
17981d2a4456SVasanthakumar Thiagarajan 	u8 tid, aid;
1799bdcd8170SKalle Valo 
18001d2a4456SVasanthakumar Thiagarajan 	if (vif->nw_type == AP_NETWORK) {
18011d2a4456SVasanthakumar Thiagarajan 		aid = ath6kl_get_aid(tid_mux);
18021d2a4456SVasanthakumar Thiagarajan 		sta = ath6kl_find_sta_by_aid(vif->ar, aid);
18031d2a4456SVasanthakumar Thiagarajan 		if (sta)
18041d2a4456SVasanthakumar Thiagarajan 			aggr_conn = sta->aggr_conn;
1805a5d8f9dfSKalle Valo 	} else {
18061d2a4456SVasanthakumar Thiagarajan 		aggr_conn = vif->aggr_cntxt->aggr_conn;
1807a5d8f9dfSKalle Valo 	}
18081d2a4456SVasanthakumar Thiagarajan 
18091d2a4456SVasanthakumar Thiagarajan 	if (!aggr_conn)
1810bdcd8170SKalle Valo 		return;
1811bdcd8170SKalle Valo 
18123fdc0991SVasanthakumar Thiagarajan 	tid = ath6kl_get_tid(tid_mux);
18133fdc0991SVasanthakumar Thiagarajan 	if (tid >= NUM_OF_TIDS)
18143fdc0991SVasanthakumar Thiagarajan 		return;
18153fdc0991SVasanthakumar Thiagarajan 
18167baef812SVasanthakumar Thiagarajan 	rxtid = &aggr_conn->rx_tid[tid];
1817bdcd8170SKalle Valo 
1818bdcd8170SKalle Valo 	if (rxtid->aggr)
18197baef812SVasanthakumar Thiagarajan 		aggr_delete_tid_state(aggr_conn, tid);
1820bdcd8170SKalle Valo }
1821bdcd8170SKalle Valo 
aggr_reset_state(struct aggr_info_conn * aggr_conn)18221d2a4456SVasanthakumar Thiagarajan void aggr_reset_state(struct aggr_info_conn *aggr_conn)
1823bdcd8170SKalle Valo {
1824bdcd8170SKalle Valo 	u8 tid;
1825bdcd8170SKalle Valo 
18261d2a4456SVasanthakumar Thiagarajan 	if (!aggr_conn)
18277baef812SVasanthakumar Thiagarajan 		return;
18287baef812SVasanthakumar Thiagarajan 
18291d2a4456SVasanthakumar Thiagarajan 	if (aggr_conn->timer_scheduled) {
18301d2a4456SVasanthakumar Thiagarajan 		del_timer(&aggr_conn->timer);
18311d2a4456SVasanthakumar Thiagarajan 		aggr_conn->timer_scheduled = false;
18327a950ea8SVasanthakumar Thiagarajan 	}
18337a950ea8SVasanthakumar Thiagarajan 
1834bdcd8170SKalle Valo 	for (tid = 0; tid < NUM_OF_TIDS; tid++)
18351d2a4456SVasanthakumar Thiagarajan 		aggr_delete_tid_state(aggr_conn, tid);
1836bdcd8170SKalle Valo }
1837bdcd8170SKalle Valo 
1838bdcd8170SKalle Valo /* clean up our amsdu buffer list */
ath6kl_cleanup_amsdu_rxbufs(struct ath6kl * ar)1839bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar)
1840bdcd8170SKalle Valo {
1841bdcd8170SKalle Valo 	struct htc_packet *packet, *tmp_pkt;
1842bdcd8170SKalle Valo 
1843bdcd8170SKalle Valo 	spin_lock_bh(&ar->lock);
1844bdcd8170SKalle Valo 	if (list_empty(&ar->amsdu_rx_buffer_queue)) {
1845bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
1846bdcd8170SKalle Valo 		return;
1847bdcd8170SKalle Valo 	}
1848bdcd8170SKalle Valo 
1849bdcd8170SKalle Valo 	list_for_each_entry_safe(packet, tmp_pkt, &ar->amsdu_rx_buffer_queue,
1850bdcd8170SKalle Valo 				 list) {
1851bdcd8170SKalle Valo 		list_del(&packet->list);
1852bdcd8170SKalle Valo 		spin_unlock_bh(&ar->lock);
1853bdcd8170SKalle Valo 		dev_kfree_skb(packet->pkt_cntxt);
1854bdcd8170SKalle Valo 		spin_lock_bh(&ar->lock);
1855bdcd8170SKalle Valo 	}
1856bdcd8170SKalle Valo 
1857bdcd8170SKalle Valo 	spin_unlock_bh(&ar->lock);
1858bdcd8170SKalle Valo }
1859bdcd8170SKalle Valo 
aggr_module_destroy(struct aggr_info * aggr_info)1860bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info)
1861bdcd8170SKalle Valo {
18621d2a4456SVasanthakumar Thiagarajan 	if (!aggr_info)
1863bdcd8170SKalle Valo 		return;
1864bdcd8170SKalle Valo 
18651d2a4456SVasanthakumar Thiagarajan 	aggr_reset_state(aggr_info->aggr_conn);
18667baef812SVasanthakumar Thiagarajan 	skb_queue_purge(&aggr_info->rx_amsdu_freeq);
18677baef812SVasanthakumar Thiagarajan 	kfree(aggr_info->aggr_conn);
1868bdcd8170SKalle Valo 	kfree(aggr_info);
1869bdcd8170SKalle Valo }
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