1bdcd8170SKalle Valo /* 2bdcd8170SKalle Valo * Copyright (c) 2004-2011 Atheros Communications Inc. 3bdcd8170SKalle Valo * 4bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 5bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 6bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 7bdcd8170SKalle Valo * 8bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15bdcd8170SKalle Valo */ 16bdcd8170SKalle Valo 17bdcd8170SKalle Valo #include <linux/mmc/card.h> 18bdcd8170SKalle Valo #include <linux/mmc/mmc.h> 19bdcd8170SKalle Valo #include <linux/mmc/host.h> 20bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h> 21bdcd8170SKalle Valo #include <linux/mmc/sdio_ids.h> 22bdcd8170SKalle Valo #include <linux/mmc/sdio.h> 23bdcd8170SKalle Valo #include <linux/mmc/sd.h> 24bdcd8170SKalle Valo #include "htc_hif.h" 25bdcd8170SKalle Valo #include "hif-ops.h" 26bdcd8170SKalle Valo #include "target.h" 27bdcd8170SKalle Valo #include "debug.h" 28bdcd8170SKalle Valo 29bdcd8170SKalle Valo struct ath6kl_sdio { 30bdcd8170SKalle Valo struct sdio_func *func; 31bdcd8170SKalle Valo 32bdcd8170SKalle Valo spinlock_t lock; 33bdcd8170SKalle Valo 34bdcd8170SKalle Valo /* free list */ 35bdcd8170SKalle Valo struct list_head bus_req_freeq; 36bdcd8170SKalle Valo 37bdcd8170SKalle Valo /* available bus requests */ 38bdcd8170SKalle Valo struct bus_request bus_req[BUS_REQUEST_MAX_NUM]; 39bdcd8170SKalle Valo 40bdcd8170SKalle Valo struct ath6kl *ar; 41bdcd8170SKalle Valo u8 *dma_buffer; 42bdcd8170SKalle Valo 43bdcd8170SKalle Valo /* scatter request list head */ 44bdcd8170SKalle Valo struct list_head scat_req; 45bdcd8170SKalle Valo 46bdcd8170SKalle Valo spinlock_t scat_lock; 47bdcd8170SKalle Valo bool is_disabled; 48bdcd8170SKalle Valo atomic_t irq_handling; 49bdcd8170SKalle Valo const struct sdio_device_id *id; 50bdcd8170SKalle Valo struct work_struct wr_async_work; 51bdcd8170SKalle Valo struct list_head wr_asyncq; 52bdcd8170SKalle Valo spinlock_t wr_async_lock; 53bdcd8170SKalle Valo }; 54bdcd8170SKalle Valo 55bdcd8170SKalle Valo #define CMD53_ARG_READ 0 56bdcd8170SKalle Valo #define CMD53_ARG_WRITE 1 57bdcd8170SKalle Valo #define CMD53_ARG_BLOCK_BASIS 1 58bdcd8170SKalle Valo #define CMD53_ARG_FIXED_ADDRESS 0 59bdcd8170SKalle Valo #define CMD53_ARG_INCR_ADDRESS 1 60bdcd8170SKalle Valo 61bdcd8170SKalle Valo static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar) 62bdcd8170SKalle Valo { 63bdcd8170SKalle Valo return ar->hif_priv; 64bdcd8170SKalle Valo } 65bdcd8170SKalle Valo 66bdcd8170SKalle Valo /* 67bdcd8170SKalle Valo * Macro to check if DMA buffer is WORD-aligned and DMA-able. 68bdcd8170SKalle Valo * Most host controllers assume the buffer is DMA'able and will 69bdcd8170SKalle Valo * bug-check otherwise (i.e. buffers on the stack). virt_addr_valid 70bdcd8170SKalle Valo * check fails on stack memory. 71bdcd8170SKalle Valo */ 72bdcd8170SKalle Valo static inline bool buf_needs_bounce(u8 *buf) 73bdcd8170SKalle Valo { 74bdcd8170SKalle Valo return ((unsigned long) buf & 0x3) || !virt_addr_valid(buf); 75bdcd8170SKalle Valo } 76bdcd8170SKalle Valo 77bdcd8170SKalle Valo static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar) 78bdcd8170SKalle Valo { 79bdcd8170SKalle Valo struct ath6kl_mbox_info *mbox_info = &ar->mbox_info; 80bdcd8170SKalle Valo 81bdcd8170SKalle Valo /* EP1 has an extended range */ 82bdcd8170SKalle Valo mbox_info->htc_addr = HIF_MBOX_BASE_ADDR; 83bdcd8170SKalle Valo mbox_info->htc_ext_addr = HIF_MBOX0_EXT_BASE_ADDR; 84bdcd8170SKalle Valo mbox_info->htc_ext_sz = HIF_MBOX0_EXT_WIDTH; 85bdcd8170SKalle Valo mbox_info->block_size = HIF_MBOX_BLOCK_SIZE; 86bdcd8170SKalle Valo mbox_info->gmbox_addr = HIF_GMBOX_BASE_ADDR; 87bdcd8170SKalle Valo mbox_info->gmbox_sz = HIF_GMBOX_WIDTH; 88bdcd8170SKalle Valo } 89bdcd8170SKalle Valo 90bdcd8170SKalle Valo static inline void ath6kl_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func, 91bdcd8170SKalle Valo u8 mode, u8 opcode, u32 addr, 92bdcd8170SKalle Valo u16 blksz) 93bdcd8170SKalle Valo { 94bdcd8170SKalle Valo *arg = (((rw & 1) << 31) | 95bdcd8170SKalle Valo ((func & 0x7) << 28) | 96bdcd8170SKalle Valo ((mode & 1) << 27) | 97bdcd8170SKalle Valo ((opcode & 1) << 26) | 98bdcd8170SKalle Valo ((addr & 0x1FFFF) << 9) | 99bdcd8170SKalle Valo (blksz & 0x1FF)); 100bdcd8170SKalle Valo } 101bdcd8170SKalle Valo 102bdcd8170SKalle Valo static inline void ath6kl_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw, 103bdcd8170SKalle Valo unsigned int address, 104bdcd8170SKalle Valo unsigned char val) 105bdcd8170SKalle Valo { 106bdcd8170SKalle Valo const u8 func = 0; 107bdcd8170SKalle Valo 108bdcd8170SKalle Valo *arg = ((write & 1) << 31) | 109bdcd8170SKalle Valo ((func & 0x7) << 28) | 110bdcd8170SKalle Valo ((raw & 1) << 27) | 111bdcd8170SKalle Valo (1 << 26) | 112bdcd8170SKalle Valo ((address & 0x1FFFF) << 9) | 113bdcd8170SKalle Valo (1 << 8) | 114bdcd8170SKalle Valo (val & 0xFF); 115bdcd8170SKalle Valo } 116bdcd8170SKalle Valo 117bdcd8170SKalle Valo static int ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card, 118bdcd8170SKalle Valo unsigned int address, 119bdcd8170SKalle Valo unsigned char byte) 120bdcd8170SKalle Valo { 121bdcd8170SKalle Valo struct mmc_command io_cmd; 122bdcd8170SKalle Valo 123bdcd8170SKalle Valo memset(&io_cmd, 0, sizeof(io_cmd)); 124bdcd8170SKalle Valo ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte); 125bdcd8170SKalle Valo io_cmd.opcode = SD_IO_RW_DIRECT; 126bdcd8170SKalle Valo io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC; 127bdcd8170SKalle Valo 128bdcd8170SKalle Valo return mmc_wait_for_cmd(card->host, &io_cmd, 0); 129bdcd8170SKalle Valo } 130bdcd8170SKalle Valo 131bdcd8170SKalle Valo static struct bus_request *ath6kl_sdio_alloc_busreq(struct ath6kl_sdio *ar_sdio) 132bdcd8170SKalle Valo { 133bdcd8170SKalle Valo struct bus_request *bus_req; 134bdcd8170SKalle Valo unsigned long flag; 135bdcd8170SKalle Valo 136bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->lock, flag); 137bdcd8170SKalle Valo 138bdcd8170SKalle Valo if (list_empty(&ar_sdio->bus_req_freeq)) { 139bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->lock, flag); 140bdcd8170SKalle Valo return NULL; 141bdcd8170SKalle Valo } 142bdcd8170SKalle Valo 143bdcd8170SKalle Valo bus_req = list_first_entry(&ar_sdio->bus_req_freeq, 144bdcd8170SKalle Valo struct bus_request, list); 145bdcd8170SKalle Valo list_del(&bus_req->list); 146bdcd8170SKalle Valo 147bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->lock, flag); 148bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req); 149bdcd8170SKalle Valo 150bdcd8170SKalle Valo return bus_req; 151bdcd8170SKalle Valo } 152bdcd8170SKalle Valo 153bdcd8170SKalle Valo static void ath6kl_sdio_free_bus_req(struct ath6kl_sdio *ar_sdio, 154bdcd8170SKalle Valo struct bus_request *bus_req) 155bdcd8170SKalle Valo { 156bdcd8170SKalle Valo unsigned long flag; 157bdcd8170SKalle Valo 158bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req); 159bdcd8170SKalle Valo 160bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->lock, flag); 161bdcd8170SKalle Valo list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq); 162bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->lock, flag); 163bdcd8170SKalle Valo } 164bdcd8170SKalle Valo 165bdcd8170SKalle Valo static void ath6kl_sdio_setup_scat_data(struct hif_scatter_req *scat_req, 166bdcd8170SKalle Valo struct mmc_data *data) 167bdcd8170SKalle Valo { 168bdcd8170SKalle Valo struct scatterlist *sg; 169bdcd8170SKalle Valo int i; 170bdcd8170SKalle Valo 171bdcd8170SKalle Valo data->blksz = HIF_MBOX_BLOCK_SIZE; 172bdcd8170SKalle Valo data->blocks = scat_req->len / HIF_MBOX_BLOCK_SIZE; 173bdcd8170SKalle Valo 174bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, 175bdcd8170SKalle Valo "hif-scatter: (%s) addr: 0x%X, (block len: %d, block count: %d) , (tot:%d,sg:%d)\n", 176bdcd8170SKalle Valo (scat_req->req & HIF_WRITE) ? "WR" : "RD", scat_req->addr, 177bdcd8170SKalle Valo data->blksz, data->blocks, scat_req->len, 178bdcd8170SKalle Valo scat_req->scat_entries); 179bdcd8170SKalle Valo 180bdcd8170SKalle Valo data->flags = (scat_req->req & HIF_WRITE) ? MMC_DATA_WRITE : 181bdcd8170SKalle Valo MMC_DATA_READ; 182bdcd8170SKalle Valo 183bdcd8170SKalle Valo /* fill SG entries */ 184d4df7890SVasanthakumar Thiagarajan sg = scat_req->sgentries; 185bdcd8170SKalle Valo sg_init_table(sg, scat_req->scat_entries); 186bdcd8170SKalle Valo 187bdcd8170SKalle Valo /* assemble SG list */ 188bdcd8170SKalle Valo for (i = 0; i < scat_req->scat_entries; i++, sg++) { 189bdcd8170SKalle Valo if ((unsigned long)scat_req->scat_list[i].buf & 0x3) 190bdcd8170SKalle Valo /* 191bdcd8170SKalle Valo * Some scatter engines can handle unaligned 192bdcd8170SKalle Valo * buffers, print this as informational only. 193bdcd8170SKalle Valo */ 194bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, 195bdcd8170SKalle Valo "(%s) scatter buffer is unaligned 0x%p\n", 196bdcd8170SKalle Valo scat_req->req & HIF_WRITE ? "WR" : "RD", 197bdcd8170SKalle Valo scat_req->scat_list[i].buf); 198bdcd8170SKalle Valo 199bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n", 200bdcd8170SKalle Valo i, scat_req->scat_list[i].buf, 201bdcd8170SKalle Valo scat_req->scat_list[i].len); 202bdcd8170SKalle Valo 203bdcd8170SKalle Valo sg_set_buf(sg, scat_req->scat_list[i].buf, 204bdcd8170SKalle Valo scat_req->scat_list[i].len); 205bdcd8170SKalle Valo } 206bdcd8170SKalle Valo 207bdcd8170SKalle Valo /* set scatter-gather table for request */ 208d4df7890SVasanthakumar Thiagarajan data->sg = scat_req->sgentries; 209bdcd8170SKalle Valo data->sg_len = scat_req->scat_entries; 210bdcd8170SKalle Valo } 211bdcd8170SKalle Valo 212bdcd8170SKalle Valo static int ath6kl_sdio_scat_rw(struct ath6kl_sdio *ar_sdio, 213bdcd8170SKalle Valo struct bus_request *req) 214bdcd8170SKalle Valo { 215bdcd8170SKalle Valo struct mmc_request mmc_req; 216bdcd8170SKalle Valo struct mmc_command cmd; 217bdcd8170SKalle Valo struct mmc_data data; 218bdcd8170SKalle Valo struct hif_scatter_req *scat_req; 219bdcd8170SKalle Valo u8 opcode, rw; 220bdcd8170SKalle Valo int status; 221bdcd8170SKalle Valo 222bdcd8170SKalle Valo scat_req = req->scat_req; 223bdcd8170SKalle Valo 224bdcd8170SKalle Valo memset(&mmc_req, 0, sizeof(struct mmc_request)); 225bdcd8170SKalle Valo memset(&cmd, 0, sizeof(struct mmc_command)); 226bdcd8170SKalle Valo memset(&data, 0, sizeof(struct mmc_data)); 227bdcd8170SKalle Valo 228d4df7890SVasanthakumar Thiagarajan ath6kl_sdio_setup_scat_data(scat_req, &data); 229bdcd8170SKalle Valo 230bdcd8170SKalle Valo opcode = (scat_req->req & HIF_FIXED_ADDRESS) ? 231bdcd8170SKalle Valo CMD53_ARG_FIXED_ADDRESS : CMD53_ARG_INCR_ADDRESS; 232bdcd8170SKalle Valo 233bdcd8170SKalle Valo rw = (scat_req->req & HIF_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ; 234bdcd8170SKalle Valo 235bdcd8170SKalle Valo /* Fixup the address so that the last byte will fall on MBOX EOM */ 236bdcd8170SKalle Valo if (scat_req->req & HIF_WRITE) { 237bdcd8170SKalle Valo if (scat_req->addr == HIF_MBOX_BASE_ADDR) 238bdcd8170SKalle Valo scat_req->addr += HIF_MBOX_WIDTH - scat_req->len; 239bdcd8170SKalle Valo else 240bdcd8170SKalle Valo /* Uses extended address range */ 241bdcd8170SKalle Valo scat_req->addr += HIF_MBOX0_EXT_WIDTH - scat_req->len; 242bdcd8170SKalle Valo } 243bdcd8170SKalle Valo 244bdcd8170SKalle Valo /* set command argument */ 245bdcd8170SKalle Valo ath6kl_sdio_set_cmd53_arg(&cmd.arg, rw, ar_sdio->func->num, 246bdcd8170SKalle Valo CMD53_ARG_BLOCK_BASIS, opcode, scat_req->addr, 247bdcd8170SKalle Valo data.blocks); 248bdcd8170SKalle Valo 249bdcd8170SKalle Valo cmd.opcode = SD_IO_RW_EXTENDED; 250bdcd8170SKalle Valo cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC; 251bdcd8170SKalle Valo 252bdcd8170SKalle Valo mmc_req.cmd = &cmd; 253bdcd8170SKalle Valo mmc_req.data = &data; 254bdcd8170SKalle Valo 255bdcd8170SKalle Valo mmc_set_data_timeout(&data, ar_sdio->func->card); 256bdcd8170SKalle Valo /* synchronous call to process request */ 257bdcd8170SKalle Valo mmc_wait_for_req(ar_sdio->func->card->host, &mmc_req); 258bdcd8170SKalle Valo 259bdcd8170SKalle Valo status = cmd.error ? cmd.error : data.error; 260bdcd8170SKalle Valo scat_req->status = status; 261bdcd8170SKalle Valo 262bdcd8170SKalle Valo if (scat_req->status) 263bdcd8170SKalle Valo ath6kl_err("Scatter write request failed:%d\n", 264bdcd8170SKalle Valo scat_req->status); 265bdcd8170SKalle Valo 266bdcd8170SKalle Valo if (scat_req->req & HIF_ASYNCHRONOUS) 267bdcd8170SKalle Valo scat_req->complete(scat_req); 268bdcd8170SKalle Valo 269bdcd8170SKalle Valo return status; 270bdcd8170SKalle Valo } 271bdcd8170SKalle Valo 272bdcd8170SKalle Valo /* clean up scatter support */ 273bdcd8170SKalle Valo static void ath6kl_sdio_cleanup_scat_resource(struct ath6kl_sdio *ar_sdio) 274bdcd8170SKalle Valo { 275bdcd8170SKalle Valo struct hif_scatter_req *s_req, *tmp_req; 276bdcd8170SKalle Valo unsigned long flag; 277bdcd8170SKalle Valo 278bdcd8170SKalle Valo /* empty the free list */ 279bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->scat_lock, flag); 280bdcd8170SKalle Valo list_for_each_entry_safe(s_req, tmp_req, &ar_sdio->scat_req, list) { 281bdcd8170SKalle Valo list_del(&s_req->list); 282bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->scat_lock, flag); 283bdcd8170SKalle Valo 284d4df7890SVasanthakumar Thiagarajan if (s_req->busrequest) 285d4df7890SVasanthakumar Thiagarajan ath6kl_sdio_free_bus_req(ar_sdio, s_req->busrequest); 286bdcd8170SKalle Valo kfree(s_req->virt_dma_buf); 287d4df7890SVasanthakumar Thiagarajan kfree(s_req->sgentries); 288bdcd8170SKalle Valo kfree(s_req); 289bdcd8170SKalle Valo 290bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->scat_lock, flag); 291bdcd8170SKalle Valo } 292bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->scat_lock, flag); 293bdcd8170SKalle Valo } 294bdcd8170SKalle Valo 295bdcd8170SKalle Valo /* setup of HIF scatter resources */ 296bdcd8170SKalle Valo static int ath6kl_sdio_setup_scat_resource(struct ath6kl_sdio *ar_sdio, 297bdcd8170SKalle Valo struct hif_dev_scat_sup_info *pinfo) 298bdcd8170SKalle Valo { 299bdcd8170SKalle Valo struct hif_scatter_req *s_req; 300bdcd8170SKalle Valo struct bus_request *bus_req; 301d4df7890SVasanthakumar Thiagarajan int i, scat_req_sz, scat_list_sz, sg_sz; 302bdcd8170SKalle Valo 303bdcd8170SKalle Valo /* check if host supports scatter and it meets our requirements */ 304bdcd8170SKalle Valo if (ar_sdio->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) { 305bdcd8170SKalle Valo ath6kl_err("hif-scatter: host only supports scatter of : %d entries, need: %d\n", 306bdcd8170SKalle Valo ar_sdio->func->card->host->max_segs, 307bdcd8170SKalle Valo MAX_SCATTER_ENTRIES_PER_REQ); 308bdcd8170SKalle Valo return -EINVAL; 309bdcd8170SKalle Valo } 310bdcd8170SKalle Valo 311bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_ANY, 312bdcd8170SKalle Valo "hif-scatter enabled: max scatter req : %d entries: %d\n", 313bdcd8170SKalle Valo MAX_SCATTER_REQUESTS, MAX_SCATTER_ENTRIES_PER_REQ); 314bdcd8170SKalle Valo 315bdcd8170SKalle Valo scat_list_sz = (MAX_SCATTER_ENTRIES_PER_REQ - 1) * 316bdcd8170SKalle Valo sizeof(struct hif_scatter_item); 317bdcd8170SKalle Valo scat_req_sz = sizeof(*s_req) + scat_list_sz; 318bdcd8170SKalle Valo 319d4df7890SVasanthakumar Thiagarajan sg_sz = sizeof(struct scatterlist) * MAX_SCATTER_ENTRIES_PER_REQ; 320d4df7890SVasanthakumar Thiagarajan 321bdcd8170SKalle Valo for (i = 0; i < MAX_SCATTER_REQUESTS; i++) { 322bdcd8170SKalle Valo /* allocate the scatter request */ 323bdcd8170SKalle Valo s_req = kzalloc(scat_req_sz, GFP_KERNEL); 324bdcd8170SKalle Valo if (!s_req) 325bdcd8170SKalle Valo goto fail_setup_scat; 326bdcd8170SKalle Valo 327d4df7890SVasanthakumar Thiagarajan /* allocate sglist */ 328d4df7890SVasanthakumar Thiagarajan s_req->sgentries = kzalloc(sg_sz, GFP_KERNEL); 329bdcd8170SKalle Valo 330d4df7890SVasanthakumar Thiagarajan if (!s_req->sgentries) { 331bdcd8170SKalle Valo kfree(s_req); 332bdcd8170SKalle Valo goto fail_setup_scat; 333bdcd8170SKalle Valo } 334bdcd8170SKalle Valo 335bdcd8170SKalle Valo /* allocate a bus request for this scatter request */ 336bdcd8170SKalle Valo bus_req = ath6kl_sdio_alloc_busreq(ar_sdio); 337bdcd8170SKalle Valo if (!bus_req) { 338d4df7890SVasanthakumar Thiagarajan kfree(s_req->sgentries); 339bdcd8170SKalle Valo kfree(s_req); 340bdcd8170SKalle Valo goto fail_setup_scat; 341bdcd8170SKalle Valo } 342bdcd8170SKalle Valo 343bdcd8170SKalle Valo /* assign the scatter request to this bus request */ 344bdcd8170SKalle Valo bus_req->scat_req = s_req; 345d4df7890SVasanthakumar Thiagarajan s_req->busrequest = bus_req; 346bdcd8170SKalle Valo /* add it to the scatter pool */ 347bdcd8170SKalle Valo hif_scatter_req_add(ar_sdio->ar, s_req); 348bdcd8170SKalle Valo } 349bdcd8170SKalle Valo 350bdcd8170SKalle Valo pinfo->max_scat_entries = MAX_SCATTER_ENTRIES_PER_REQ; 351bdcd8170SKalle Valo pinfo->max_xfer_szper_scatreq = MAX_SCATTER_REQ_TRANSFER_SIZE; 352bdcd8170SKalle Valo 353bdcd8170SKalle Valo return 0; 354bdcd8170SKalle Valo 355bdcd8170SKalle Valo fail_setup_scat: 356bdcd8170SKalle Valo ath6kl_err("hif-scatter: failed to alloc scatter resources !\n"); 357bdcd8170SKalle Valo ath6kl_sdio_cleanup_scat_resource(ar_sdio); 358bdcd8170SKalle Valo 359bdcd8170SKalle Valo return -ENOMEM; 360bdcd8170SKalle Valo } 361bdcd8170SKalle Valo 362bdcd8170SKalle Valo static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf, 363bdcd8170SKalle Valo u32 len, u32 request) 364bdcd8170SKalle Valo { 365bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 366bdcd8170SKalle Valo u8 *tbuf = NULL; 367bdcd8170SKalle Valo int ret; 368bdcd8170SKalle Valo bool bounced = false; 369bdcd8170SKalle Valo 370bdcd8170SKalle Valo if (request & HIF_BLOCK_BASIS) 371bdcd8170SKalle Valo len = round_down(len, HIF_MBOX_BLOCK_SIZE); 372bdcd8170SKalle Valo 373bdcd8170SKalle Valo if (buf_needs_bounce(buf)) { 374bdcd8170SKalle Valo if (!ar_sdio->dma_buffer) 375bdcd8170SKalle Valo return -ENOMEM; 376bdcd8170SKalle Valo tbuf = ar_sdio->dma_buffer; 377bdcd8170SKalle Valo memcpy(tbuf, buf, len); 378bdcd8170SKalle Valo bounced = true; 379bdcd8170SKalle Valo } else 380bdcd8170SKalle Valo tbuf = buf; 381bdcd8170SKalle Valo 382bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 383bdcd8170SKalle Valo if (request & HIF_WRITE) { 384bdcd8170SKalle Valo if (addr >= HIF_MBOX_BASE_ADDR && 385bdcd8170SKalle Valo addr <= HIF_MBOX_END_ADDR) 386bdcd8170SKalle Valo addr += (HIF_MBOX_WIDTH - len); 387bdcd8170SKalle Valo 388bdcd8170SKalle Valo if (addr == HIF_MBOX0_EXT_BASE_ADDR) 389bdcd8170SKalle Valo addr += HIF_MBOX0_EXT_WIDTH - len; 390bdcd8170SKalle Valo 391bdcd8170SKalle Valo if (request & HIF_FIXED_ADDRESS) 392bdcd8170SKalle Valo ret = sdio_writesb(ar_sdio->func, addr, tbuf, len); 393bdcd8170SKalle Valo else 394bdcd8170SKalle Valo ret = sdio_memcpy_toio(ar_sdio->func, addr, tbuf, len); 395bdcd8170SKalle Valo } else { 396bdcd8170SKalle Valo if (request & HIF_FIXED_ADDRESS) 397bdcd8170SKalle Valo ret = sdio_readsb(ar_sdio->func, tbuf, addr, len); 398bdcd8170SKalle Valo else 399bdcd8170SKalle Valo ret = sdio_memcpy_fromio(ar_sdio->func, tbuf, 400bdcd8170SKalle Valo addr, len); 401bdcd8170SKalle Valo if (bounced) 402bdcd8170SKalle Valo memcpy(buf, tbuf, len); 403bdcd8170SKalle Valo } 404bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 405bdcd8170SKalle Valo 406bdcd8170SKalle Valo return ret; 407bdcd8170SKalle Valo } 408bdcd8170SKalle Valo 409bdcd8170SKalle Valo static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio, 410bdcd8170SKalle Valo struct bus_request *req) 411bdcd8170SKalle Valo { 412bdcd8170SKalle Valo if (req->scat_req) 413bdcd8170SKalle Valo ath6kl_sdio_scat_rw(ar_sdio, req); 414bdcd8170SKalle Valo else { 415bdcd8170SKalle Valo void *context; 416bdcd8170SKalle Valo int status; 417bdcd8170SKalle Valo 418bdcd8170SKalle Valo status = ath6kl_sdio_read_write_sync(ar_sdio->ar, req->address, 419bdcd8170SKalle Valo req->buffer, req->length, 420bdcd8170SKalle Valo req->request); 421bdcd8170SKalle Valo context = req->packet; 422bdcd8170SKalle Valo ath6kl_sdio_free_bus_req(ar_sdio, req); 423bdcd8170SKalle Valo ath6kldev_rw_comp_handler(context, status); 424bdcd8170SKalle Valo } 425bdcd8170SKalle Valo } 426bdcd8170SKalle Valo 427bdcd8170SKalle Valo static void ath6kl_sdio_write_async_work(struct work_struct *work) 428bdcd8170SKalle Valo { 429bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 430bdcd8170SKalle Valo unsigned long flags; 431bdcd8170SKalle Valo struct bus_request *req, *tmp_req; 432bdcd8170SKalle Valo 433bdcd8170SKalle Valo ar_sdio = container_of(work, struct ath6kl_sdio, wr_async_work); 434bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 435bdcd8170SKalle Valo 436bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->wr_async_lock, flags); 437bdcd8170SKalle Valo list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) { 438bdcd8170SKalle Valo list_del(&req->list); 439bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags); 440bdcd8170SKalle Valo __ath6kl_sdio_write_async(ar_sdio, req); 441bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->wr_async_lock, flags); 442bdcd8170SKalle Valo } 443bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags); 444bdcd8170SKalle Valo 445bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 446bdcd8170SKalle Valo } 447bdcd8170SKalle Valo 448bdcd8170SKalle Valo static void ath6kl_sdio_irq_handler(struct sdio_func *func) 449bdcd8170SKalle Valo { 450bdcd8170SKalle Valo int status; 451bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 452bdcd8170SKalle Valo 453bdcd8170SKalle Valo ar_sdio = sdio_get_drvdata(func); 454bdcd8170SKalle Valo atomic_set(&ar_sdio->irq_handling, 1); 455bdcd8170SKalle Valo 456bdcd8170SKalle Valo /* 457bdcd8170SKalle Valo * Release the host during interrups so we can pick it back up when 458bdcd8170SKalle Valo * we process commands. 459bdcd8170SKalle Valo */ 460bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 461bdcd8170SKalle Valo 462bdcd8170SKalle Valo status = ath6kldev_intr_bh_handler(ar_sdio->ar); 463bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 464bdcd8170SKalle Valo atomic_set(&ar_sdio->irq_handling, 0); 465bdcd8170SKalle Valo WARN_ON(status && status != -ECANCELED); 466bdcd8170SKalle Valo } 467bdcd8170SKalle Valo 468bdcd8170SKalle Valo static int ath6kl_sdio_power_on(struct ath6kl_sdio *ar_sdio) 469bdcd8170SKalle Valo { 470bdcd8170SKalle Valo struct sdio_func *func = ar_sdio->func; 471bdcd8170SKalle Valo int ret = 0; 472bdcd8170SKalle Valo 473bdcd8170SKalle Valo if (!ar_sdio->is_disabled) 474bdcd8170SKalle Valo return 0; 475bdcd8170SKalle Valo 476bdcd8170SKalle Valo sdio_claim_host(func); 477bdcd8170SKalle Valo 478bdcd8170SKalle Valo ret = sdio_enable_func(func); 479bdcd8170SKalle Valo if (ret) { 480bdcd8170SKalle Valo ath6kl_err("Unable to enable sdio func: %d)\n", ret); 481bdcd8170SKalle Valo sdio_release_host(func); 482bdcd8170SKalle Valo return ret; 483bdcd8170SKalle Valo } 484bdcd8170SKalle Valo 485bdcd8170SKalle Valo sdio_release_host(func); 486bdcd8170SKalle Valo 487bdcd8170SKalle Valo /* 488bdcd8170SKalle Valo * Wait for hardware to initialise. It should take a lot less than 489bdcd8170SKalle Valo * 10 ms but let's be conservative here. 490bdcd8170SKalle Valo */ 491bdcd8170SKalle Valo msleep(10); 492bdcd8170SKalle Valo 493bdcd8170SKalle Valo ar_sdio->is_disabled = false; 494bdcd8170SKalle Valo 495bdcd8170SKalle Valo return ret; 496bdcd8170SKalle Valo } 497bdcd8170SKalle Valo 498bdcd8170SKalle Valo static int ath6kl_sdio_power_off(struct ath6kl_sdio *ar_sdio) 499bdcd8170SKalle Valo { 500bdcd8170SKalle Valo int ret; 501bdcd8170SKalle Valo 502bdcd8170SKalle Valo if (ar_sdio->is_disabled) 503bdcd8170SKalle Valo return 0; 504bdcd8170SKalle Valo 505bdcd8170SKalle Valo /* Disable the card */ 506bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 507bdcd8170SKalle Valo ret = sdio_disable_func(ar_sdio->func); 508bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 509bdcd8170SKalle Valo 510bdcd8170SKalle Valo if (ret) 511bdcd8170SKalle Valo return ret; 512bdcd8170SKalle Valo 513bdcd8170SKalle Valo ar_sdio->is_disabled = true; 514bdcd8170SKalle Valo 515bdcd8170SKalle Valo return ret; 516bdcd8170SKalle Valo } 517bdcd8170SKalle Valo 518bdcd8170SKalle Valo static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer, 519bdcd8170SKalle Valo u32 length, u32 request, 520bdcd8170SKalle Valo struct htc_packet *packet) 521bdcd8170SKalle Valo { 522bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 523bdcd8170SKalle Valo struct bus_request *bus_req; 524bdcd8170SKalle Valo unsigned long flags; 525bdcd8170SKalle Valo 526bdcd8170SKalle Valo bus_req = ath6kl_sdio_alloc_busreq(ar_sdio); 527bdcd8170SKalle Valo 528bdcd8170SKalle Valo if (!bus_req) 529bdcd8170SKalle Valo return -ENOMEM; 530bdcd8170SKalle Valo 531bdcd8170SKalle Valo bus_req->address = address; 532bdcd8170SKalle Valo bus_req->buffer = buffer; 533bdcd8170SKalle Valo bus_req->length = length; 534bdcd8170SKalle Valo bus_req->request = request; 535bdcd8170SKalle Valo bus_req->packet = packet; 536bdcd8170SKalle Valo 537bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->wr_async_lock, flags); 538bdcd8170SKalle Valo list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq); 539bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags); 540bdcd8170SKalle Valo queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work); 541bdcd8170SKalle Valo 542bdcd8170SKalle Valo return 0; 543bdcd8170SKalle Valo } 544bdcd8170SKalle Valo 545bdcd8170SKalle Valo static void ath6kl_sdio_irq_enable(struct ath6kl *ar) 546bdcd8170SKalle Valo { 547bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 548bdcd8170SKalle Valo int ret; 549bdcd8170SKalle Valo 550bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 551bdcd8170SKalle Valo 552bdcd8170SKalle Valo /* Register the isr */ 553bdcd8170SKalle Valo ret = sdio_claim_irq(ar_sdio->func, ath6kl_sdio_irq_handler); 554bdcd8170SKalle Valo if (ret) 555bdcd8170SKalle Valo ath6kl_err("Failed to claim sdio irq: %d\n", ret); 556bdcd8170SKalle Valo 557bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 558bdcd8170SKalle Valo } 559bdcd8170SKalle Valo 560bdcd8170SKalle Valo static void ath6kl_sdio_irq_disable(struct ath6kl *ar) 561bdcd8170SKalle Valo { 562bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 563bdcd8170SKalle Valo int ret; 564bdcd8170SKalle Valo 565bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 566bdcd8170SKalle Valo 567bdcd8170SKalle Valo /* Mask our function IRQ */ 568bdcd8170SKalle Valo while (atomic_read(&ar_sdio->irq_handling)) { 569bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 570bdcd8170SKalle Valo schedule_timeout(HZ / 10); 571bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 572bdcd8170SKalle Valo } 573bdcd8170SKalle Valo 574bdcd8170SKalle Valo ret = sdio_release_irq(ar_sdio->func); 575bdcd8170SKalle Valo if (ret) 576bdcd8170SKalle Valo ath6kl_err("Failed to release sdio irq: %d\n", ret); 577bdcd8170SKalle Valo 578bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 579bdcd8170SKalle Valo } 580bdcd8170SKalle Valo 581bdcd8170SKalle Valo static struct hif_scatter_req *ath6kl_sdio_scatter_req_get(struct ath6kl *ar) 582bdcd8170SKalle Valo { 583bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 584bdcd8170SKalle Valo struct hif_scatter_req *node = NULL; 585bdcd8170SKalle Valo unsigned long flag; 586bdcd8170SKalle Valo 587bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->scat_lock, flag); 588bdcd8170SKalle Valo 589bdcd8170SKalle Valo if (!list_empty(&ar_sdio->scat_req)) { 590bdcd8170SKalle Valo node = list_first_entry(&ar_sdio->scat_req, 591bdcd8170SKalle Valo struct hif_scatter_req, list); 592bdcd8170SKalle Valo list_del(&node->list); 593bdcd8170SKalle Valo } 594bdcd8170SKalle Valo 595bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->scat_lock, flag); 596bdcd8170SKalle Valo 597bdcd8170SKalle Valo return node; 598bdcd8170SKalle Valo } 599bdcd8170SKalle Valo 600bdcd8170SKalle Valo static void ath6kl_sdio_scatter_req_add(struct ath6kl *ar, 601bdcd8170SKalle Valo struct hif_scatter_req *s_req) 602bdcd8170SKalle Valo { 603bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 604bdcd8170SKalle Valo unsigned long flag; 605bdcd8170SKalle Valo 606bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->scat_lock, flag); 607bdcd8170SKalle Valo 608bdcd8170SKalle Valo list_add_tail(&s_req->list, &ar_sdio->scat_req); 609bdcd8170SKalle Valo 610bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->scat_lock, flag); 611bdcd8170SKalle Valo 612bdcd8170SKalle Valo } 613bdcd8170SKalle Valo 614bdcd8170SKalle Valo static int ath6kl_sdio_enable_scatter(struct ath6kl *ar, 615bdcd8170SKalle Valo struct hif_dev_scat_sup_info *info) 616bdcd8170SKalle Valo { 617bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 618bdcd8170SKalle Valo int ret; 619bdcd8170SKalle Valo 620bdcd8170SKalle Valo ret = ath6kl_sdio_setup_scat_resource(ar_sdio, info); 621bdcd8170SKalle Valo 622bdcd8170SKalle Valo return ret; 623bdcd8170SKalle Valo } 624bdcd8170SKalle Valo 625c630d18aSVasanthakumar Thiagarajan /* scatter gather read write request */ 626c630d18aSVasanthakumar Thiagarajan static int ath6kl_sdio_async_rw_scatter(struct ath6kl *ar, 627c630d18aSVasanthakumar Thiagarajan struct hif_scatter_req *scat_req) 628c630d18aSVasanthakumar Thiagarajan { 629c630d18aSVasanthakumar Thiagarajan struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 630c630d18aSVasanthakumar Thiagarajan u32 request = scat_req->req; 631c630d18aSVasanthakumar Thiagarajan int status = 0; 632c630d18aSVasanthakumar Thiagarajan unsigned long flags; 633c630d18aSVasanthakumar Thiagarajan 634c630d18aSVasanthakumar Thiagarajan if (!scat_req->len) 635c630d18aSVasanthakumar Thiagarajan return -EINVAL; 636c630d18aSVasanthakumar Thiagarajan 637c630d18aSVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_SCATTER, 638c630d18aSVasanthakumar Thiagarajan "hif-scatter: total len: %d scatter entries: %d\n", 639c630d18aSVasanthakumar Thiagarajan scat_req->len, scat_req->scat_entries); 640c630d18aSVasanthakumar Thiagarajan 641c630d18aSVasanthakumar Thiagarajan if (request & HIF_SYNCHRONOUS) { 642c630d18aSVasanthakumar Thiagarajan sdio_claim_host(ar_sdio->func); 643d4df7890SVasanthakumar Thiagarajan status = ath6kl_sdio_scat_rw(ar_sdio, scat_req->busrequest); 644c630d18aSVasanthakumar Thiagarajan sdio_release_host(ar_sdio->func); 645c630d18aSVasanthakumar Thiagarajan } else { 646c630d18aSVasanthakumar Thiagarajan spin_lock_irqsave(&ar_sdio->wr_async_lock, flags); 647d4df7890SVasanthakumar Thiagarajan list_add_tail(&scat_req->busrequest->list, &ar_sdio->wr_asyncq); 648c630d18aSVasanthakumar Thiagarajan spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags); 649c630d18aSVasanthakumar Thiagarajan queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work); 650c630d18aSVasanthakumar Thiagarajan } 651c630d18aSVasanthakumar Thiagarajan 652c630d18aSVasanthakumar Thiagarajan return status; 653c630d18aSVasanthakumar Thiagarajan } 654c630d18aSVasanthakumar Thiagarajan 655bdcd8170SKalle Valo static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar) 656bdcd8170SKalle Valo { 657bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 658bdcd8170SKalle Valo 659bdcd8170SKalle Valo ath6kl_sdio_cleanup_scat_resource(ar_sdio); 660bdcd8170SKalle Valo } 661bdcd8170SKalle Valo 662bdcd8170SKalle Valo static const struct ath6kl_hif_ops ath6kl_sdio_ops = { 663bdcd8170SKalle Valo .read_write_sync = ath6kl_sdio_read_write_sync, 664bdcd8170SKalle Valo .write_async = ath6kl_sdio_write_async, 665bdcd8170SKalle Valo .irq_enable = ath6kl_sdio_irq_enable, 666bdcd8170SKalle Valo .irq_disable = ath6kl_sdio_irq_disable, 667bdcd8170SKalle Valo .scatter_req_get = ath6kl_sdio_scatter_req_get, 668bdcd8170SKalle Valo .scatter_req_add = ath6kl_sdio_scatter_req_add, 669bdcd8170SKalle Valo .enable_scatter = ath6kl_sdio_enable_scatter, 670f74a7361SVasanthakumar Thiagarajan .scat_req_rw = ath6kl_sdio_async_rw_scatter, 671bdcd8170SKalle Valo .cleanup_scatter = ath6kl_sdio_cleanup_scatter, 672bdcd8170SKalle Valo }; 673bdcd8170SKalle Valo 674bdcd8170SKalle Valo static int ath6kl_sdio_probe(struct sdio_func *func, 675bdcd8170SKalle Valo const struct sdio_device_id *id) 676bdcd8170SKalle Valo { 677bdcd8170SKalle Valo int ret; 678bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 679bdcd8170SKalle Valo struct ath6kl *ar; 680bdcd8170SKalle Valo int count; 681bdcd8170SKalle Valo 682bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, 683bdcd8170SKalle Valo "%s: func: 0x%X, vendor id: 0x%X, dev id: 0x%X, block size: 0x%X/0x%X\n", 684bdcd8170SKalle Valo __func__, func->num, func->vendor, 685bdcd8170SKalle Valo func->device, func->max_blksize, func->cur_blksize); 686bdcd8170SKalle Valo 687bdcd8170SKalle Valo ar_sdio = kzalloc(sizeof(struct ath6kl_sdio), GFP_KERNEL); 688bdcd8170SKalle Valo if (!ar_sdio) 689bdcd8170SKalle Valo return -ENOMEM; 690bdcd8170SKalle Valo 691bdcd8170SKalle Valo ar_sdio->dma_buffer = kzalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL); 692bdcd8170SKalle Valo if (!ar_sdio->dma_buffer) { 693bdcd8170SKalle Valo ret = -ENOMEM; 694bdcd8170SKalle Valo goto err_hif; 695bdcd8170SKalle Valo } 696bdcd8170SKalle Valo 697bdcd8170SKalle Valo ar_sdio->func = func; 698bdcd8170SKalle Valo sdio_set_drvdata(func, ar_sdio); 699bdcd8170SKalle Valo 700bdcd8170SKalle Valo ar_sdio->id = id; 701bdcd8170SKalle Valo ar_sdio->is_disabled = true; 702bdcd8170SKalle Valo 703bdcd8170SKalle Valo spin_lock_init(&ar_sdio->lock); 704bdcd8170SKalle Valo spin_lock_init(&ar_sdio->scat_lock); 705bdcd8170SKalle Valo spin_lock_init(&ar_sdio->wr_async_lock); 706bdcd8170SKalle Valo 707bdcd8170SKalle Valo INIT_LIST_HEAD(&ar_sdio->scat_req); 708bdcd8170SKalle Valo INIT_LIST_HEAD(&ar_sdio->bus_req_freeq); 709bdcd8170SKalle Valo INIT_LIST_HEAD(&ar_sdio->wr_asyncq); 710bdcd8170SKalle Valo 711bdcd8170SKalle Valo INIT_WORK(&ar_sdio->wr_async_work, ath6kl_sdio_write_async_work); 712bdcd8170SKalle Valo 713bdcd8170SKalle Valo for (count = 0; count < BUS_REQUEST_MAX_NUM; count++) 714bdcd8170SKalle Valo ath6kl_sdio_free_bus_req(ar_sdio, &ar_sdio->bus_req[count]); 715bdcd8170SKalle Valo 716bdcd8170SKalle Valo ar = ath6kl_core_alloc(&ar_sdio->func->dev); 717bdcd8170SKalle Valo if (!ar) { 718bdcd8170SKalle Valo ath6kl_err("Failed to alloc ath6kl core\n"); 719bdcd8170SKalle Valo ret = -ENOMEM; 720bdcd8170SKalle Valo goto err_dma; 721bdcd8170SKalle Valo } 722bdcd8170SKalle Valo 723bdcd8170SKalle Valo ar_sdio->ar = ar; 724bdcd8170SKalle Valo ar->hif_priv = ar_sdio; 725bdcd8170SKalle Valo ar->hif_ops = &ath6kl_sdio_ops; 726bdcd8170SKalle Valo 727bdcd8170SKalle Valo ath6kl_sdio_set_mbox_info(ar); 728bdcd8170SKalle Valo 729bdcd8170SKalle Valo sdio_claim_host(func); 730bdcd8170SKalle Valo 731bdcd8170SKalle Valo if ((ar_sdio->id->device & MANUFACTURER_ID_ATH6KL_BASE_MASK) >= 732bdcd8170SKalle Valo MANUFACTURER_ID_AR6003_BASE) { 733bdcd8170SKalle Valo /* enable 4-bit ASYNC interrupt on AR6003 or later */ 734bdcd8170SKalle Valo ret = ath6kl_sdio_func0_cmd52_wr_byte(func->card, 735bdcd8170SKalle Valo CCCR_SDIO_IRQ_MODE_REG, 736bdcd8170SKalle Valo SDIO_IRQ_MODE_ASYNC_4BIT_IRQ); 737bdcd8170SKalle Valo if (ret) { 738bdcd8170SKalle Valo ath6kl_err("Failed to enable 4-bit async irq mode %d\n", 739bdcd8170SKalle Valo ret); 740bdcd8170SKalle Valo sdio_release_host(func); 741bdcd8170SKalle Valo goto err_dma; 742bdcd8170SKalle Valo } 743bdcd8170SKalle Valo 744bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "4-bit async irq mode enabled\n"); 745bdcd8170SKalle Valo } 746bdcd8170SKalle Valo 747bdcd8170SKalle Valo /* give us some time to enable, in ms */ 748bdcd8170SKalle Valo func->enable_timeout = 100; 749bdcd8170SKalle Valo 750bdcd8170SKalle Valo sdio_release_host(func); 751bdcd8170SKalle Valo 752bdcd8170SKalle Valo ret = ath6kl_sdio_power_on(ar_sdio); 753bdcd8170SKalle Valo if (ret) 754bdcd8170SKalle Valo goto err_dma; 755bdcd8170SKalle Valo 756bdcd8170SKalle Valo sdio_claim_host(func); 757bdcd8170SKalle Valo 758bdcd8170SKalle Valo ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE); 759bdcd8170SKalle Valo if (ret) { 760bdcd8170SKalle Valo ath6kl_err("Set sdio block size %d failed: %d)\n", 761bdcd8170SKalle Valo HIF_MBOX_BLOCK_SIZE, ret); 762bdcd8170SKalle Valo sdio_release_host(func); 763bdcd8170SKalle Valo goto err_off; 764bdcd8170SKalle Valo } 765bdcd8170SKalle Valo 766bdcd8170SKalle Valo sdio_release_host(func); 767bdcd8170SKalle Valo 768bdcd8170SKalle Valo ret = ath6kl_core_init(ar); 769bdcd8170SKalle Valo if (ret) { 770bdcd8170SKalle Valo ath6kl_err("Failed to init ath6kl core\n"); 771bdcd8170SKalle Valo goto err_off; 772bdcd8170SKalle Valo } 773bdcd8170SKalle Valo 774bdcd8170SKalle Valo return ret; 775bdcd8170SKalle Valo 776bdcd8170SKalle Valo err_off: 777bdcd8170SKalle Valo ath6kl_sdio_power_off(ar_sdio); 778bdcd8170SKalle Valo err_dma: 779bdcd8170SKalle Valo kfree(ar_sdio->dma_buffer); 780bdcd8170SKalle Valo err_hif: 781bdcd8170SKalle Valo kfree(ar_sdio); 782bdcd8170SKalle Valo 783bdcd8170SKalle Valo return ret; 784bdcd8170SKalle Valo } 785bdcd8170SKalle Valo 786bdcd8170SKalle Valo static void ath6kl_sdio_remove(struct sdio_func *func) 787bdcd8170SKalle Valo { 788bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 789bdcd8170SKalle Valo 790bdcd8170SKalle Valo ar_sdio = sdio_get_drvdata(func); 791bdcd8170SKalle Valo 792bdcd8170SKalle Valo ath6kl_stop_txrx(ar_sdio->ar); 793bdcd8170SKalle Valo cancel_work_sync(&ar_sdio->wr_async_work); 794bdcd8170SKalle Valo 795bdcd8170SKalle Valo ath6kl_unavail_ev(ar_sdio->ar); 796bdcd8170SKalle Valo 797bdcd8170SKalle Valo ath6kl_sdio_power_off(ar_sdio); 798bdcd8170SKalle Valo 799bdcd8170SKalle Valo kfree(ar_sdio->dma_buffer); 800bdcd8170SKalle Valo kfree(ar_sdio); 801bdcd8170SKalle Valo } 802bdcd8170SKalle Valo 803bdcd8170SKalle Valo static const struct sdio_device_id ath6kl_sdio_devices[] = { 804bdcd8170SKalle Valo {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))}, 805bdcd8170SKalle Valo {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))}, 806bdcd8170SKalle Valo {}, 807bdcd8170SKalle Valo }; 808bdcd8170SKalle Valo 809bdcd8170SKalle Valo MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices); 810bdcd8170SKalle Valo 811bdcd8170SKalle Valo static struct sdio_driver ath6kl_sdio_driver = { 812bdcd8170SKalle Valo .name = "ath6kl_sdio", 813bdcd8170SKalle Valo .id_table = ath6kl_sdio_devices, 814bdcd8170SKalle Valo .probe = ath6kl_sdio_probe, 815bdcd8170SKalle Valo .remove = ath6kl_sdio_remove, 816bdcd8170SKalle Valo }; 817bdcd8170SKalle Valo 818bdcd8170SKalle Valo static int __init ath6kl_sdio_init(void) 819bdcd8170SKalle Valo { 820bdcd8170SKalle Valo int ret; 821bdcd8170SKalle Valo 822bdcd8170SKalle Valo ret = sdio_register_driver(&ath6kl_sdio_driver); 823bdcd8170SKalle Valo if (ret) 824bdcd8170SKalle Valo ath6kl_err("sdio driver registration failed: %d\n", ret); 825bdcd8170SKalle Valo 826bdcd8170SKalle Valo return ret; 827bdcd8170SKalle Valo } 828bdcd8170SKalle Valo 829bdcd8170SKalle Valo static void __exit ath6kl_sdio_exit(void) 830bdcd8170SKalle Valo { 831bdcd8170SKalle Valo sdio_unregister_driver(&ath6kl_sdio_driver); 832bdcd8170SKalle Valo } 833bdcd8170SKalle Valo 834bdcd8170SKalle Valo module_init(ath6kl_sdio_init); 835bdcd8170SKalle Valo module_exit(ath6kl_sdio_exit); 836bdcd8170SKalle Valo 837bdcd8170SKalle Valo MODULE_AUTHOR("Atheros Communications, Inc."); 838bdcd8170SKalle Valo MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices"); 839bdcd8170SKalle Valo MODULE_LICENSE("Dual BSD/GPL"); 840bdcd8170SKalle Valo 841bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_OTP_FILE); 842bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE); 843bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE); 844bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE); 845bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE); 846bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_OTP_FILE); 847bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE); 848bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE); 849bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE); 850bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE); 851