1bdcd8170SKalle Valo /* 2bdcd8170SKalle Valo * Copyright (c) 2004-2011 Atheros Communications Inc. 3bdcd8170SKalle Valo * 4bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 5bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 6bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 7bdcd8170SKalle Valo * 8bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15bdcd8170SKalle Valo */ 16bdcd8170SKalle Valo 17bdcd8170SKalle Valo #include <linux/mmc/card.h> 18bdcd8170SKalle Valo #include <linux/mmc/mmc.h> 19bdcd8170SKalle Valo #include <linux/mmc/host.h> 20bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h> 21bdcd8170SKalle Valo #include <linux/mmc/sdio_ids.h> 22bdcd8170SKalle Valo #include <linux/mmc/sdio.h> 23bdcd8170SKalle Valo #include <linux/mmc/sd.h> 24bdcd8170SKalle Valo #include "htc_hif.h" 25bdcd8170SKalle Valo #include "hif-ops.h" 26bdcd8170SKalle Valo #include "target.h" 27bdcd8170SKalle Valo #include "debug.h" 28bdcd8170SKalle Valo 29bdcd8170SKalle Valo struct ath6kl_sdio { 30bdcd8170SKalle Valo struct sdio_func *func; 31bdcd8170SKalle Valo 32bdcd8170SKalle Valo spinlock_t lock; 33bdcd8170SKalle Valo 34bdcd8170SKalle Valo /* free list */ 35bdcd8170SKalle Valo struct list_head bus_req_freeq; 36bdcd8170SKalle Valo 37bdcd8170SKalle Valo /* available bus requests */ 38bdcd8170SKalle Valo struct bus_request bus_req[BUS_REQUEST_MAX_NUM]; 39bdcd8170SKalle Valo 40bdcd8170SKalle Valo struct ath6kl *ar; 41bdcd8170SKalle Valo u8 *dma_buffer; 42bdcd8170SKalle Valo 43bdcd8170SKalle Valo /* scatter request list head */ 44bdcd8170SKalle Valo struct list_head scat_req; 45bdcd8170SKalle Valo 46bdcd8170SKalle Valo spinlock_t scat_lock; 47bdcd8170SKalle Valo bool is_disabled; 48bdcd8170SKalle Valo atomic_t irq_handling; 49bdcd8170SKalle Valo const struct sdio_device_id *id; 50bdcd8170SKalle Valo struct work_struct wr_async_work; 51bdcd8170SKalle Valo struct list_head wr_asyncq; 52bdcd8170SKalle Valo spinlock_t wr_async_lock; 53bdcd8170SKalle Valo }; 54bdcd8170SKalle Valo 55bdcd8170SKalle Valo #define CMD53_ARG_READ 0 56bdcd8170SKalle Valo #define CMD53_ARG_WRITE 1 57bdcd8170SKalle Valo #define CMD53_ARG_BLOCK_BASIS 1 58bdcd8170SKalle Valo #define CMD53_ARG_FIXED_ADDRESS 0 59bdcd8170SKalle Valo #define CMD53_ARG_INCR_ADDRESS 1 60bdcd8170SKalle Valo 61bdcd8170SKalle Valo static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar) 62bdcd8170SKalle Valo { 63bdcd8170SKalle Valo return ar->hif_priv; 64bdcd8170SKalle Valo } 65bdcd8170SKalle Valo 66bdcd8170SKalle Valo /* 67bdcd8170SKalle Valo * Macro to check if DMA buffer is WORD-aligned and DMA-able. 68bdcd8170SKalle Valo * Most host controllers assume the buffer is DMA'able and will 69bdcd8170SKalle Valo * bug-check otherwise (i.e. buffers on the stack). virt_addr_valid 70bdcd8170SKalle Valo * check fails on stack memory. 71bdcd8170SKalle Valo */ 72bdcd8170SKalle Valo static inline bool buf_needs_bounce(u8 *buf) 73bdcd8170SKalle Valo { 74bdcd8170SKalle Valo return ((unsigned long) buf & 0x3) || !virt_addr_valid(buf); 75bdcd8170SKalle Valo } 76bdcd8170SKalle Valo 77bdcd8170SKalle Valo static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar) 78bdcd8170SKalle Valo { 79bdcd8170SKalle Valo struct ath6kl_mbox_info *mbox_info = &ar->mbox_info; 80bdcd8170SKalle Valo 81bdcd8170SKalle Valo /* EP1 has an extended range */ 82bdcd8170SKalle Valo mbox_info->htc_addr = HIF_MBOX_BASE_ADDR; 83bdcd8170SKalle Valo mbox_info->htc_ext_addr = HIF_MBOX0_EXT_BASE_ADDR; 84bdcd8170SKalle Valo mbox_info->htc_ext_sz = HIF_MBOX0_EXT_WIDTH; 85bdcd8170SKalle Valo mbox_info->block_size = HIF_MBOX_BLOCK_SIZE; 86bdcd8170SKalle Valo mbox_info->gmbox_addr = HIF_GMBOX_BASE_ADDR; 87bdcd8170SKalle Valo mbox_info->gmbox_sz = HIF_GMBOX_WIDTH; 88bdcd8170SKalle Valo } 89bdcd8170SKalle Valo 90bdcd8170SKalle Valo static inline void ath6kl_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func, 91bdcd8170SKalle Valo u8 mode, u8 opcode, u32 addr, 92bdcd8170SKalle Valo u16 blksz) 93bdcd8170SKalle Valo { 94bdcd8170SKalle Valo *arg = (((rw & 1) << 31) | 95bdcd8170SKalle Valo ((func & 0x7) << 28) | 96bdcd8170SKalle Valo ((mode & 1) << 27) | 97bdcd8170SKalle Valo ((opcode & 1) << 26) | 98bdcd8170SKalle Valo ((addr & 0x1FFFF) << 9) | 99bdcd8170SKalle Valo (blksz & 0x1FF)); 100bdcd8170SKalle Valo } 101bdcd8170SKalle Valo 102bdcd8170SKalle Valo static inline void ath6kl_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw, 103bdcd8170SKalle Valo unsigned int address, 104bdcd8170SKalle Valo unsigned char val) 105bdcd8170SKalle Valo { 106bdcd8170SKalle Valo const u8 func = 0; 107bdcd8170SKalle Valo 108bdcd8170SKalle Valo *arg = ((write & 1) << 31) | 109bdcd8170SKalle Valo ((func & 0x7) << 28) | 110bdcd8170SKalle Valo ((raw & 1) << 27) | 111bdcd8170SKalle Valo (1 << 26) | 112bdcd8170SKalle Valo ((address & 0x1FFFF) << 9) | 113bdcd8170SKalle Valo (1 << 8) | 114bdcd8170SKalle Valo (val & 0xFF); 115bdcd8170SKalle Valo } 116bdcd8170SKalle Valo 117bdcd8170SKalle Valo static int ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card, 118bdcd8170SKalle Valo unsigned int address, 119bdcd8170SKalle Valo unsigned char byte) 120bdcd8170SKalle Valo { 121bdcd8170SKalle Valo struct mmc_command io_cmd; 122bdcd8170SKalle Valo 123bdcd8170SKalle Valo memset(&io_cmd, 0, sizeof(io_cmd)); 124bdcd8170SKalle Valo ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte); 125bdcd8170SKalle Valo io_cmd.opcode = SD_IO_RW_DIRECT; 126bdcd8170SKalle Valo io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC; 127bdcd8170SKalle Valo 128bdcd8170SKalle Valo return mmc_wait_for_cmd(card->host, &io_cmd, 0); 129bdcd8170SKalle Valo } 130bdcd8170SKalle Valo 131bdcd8170SKalle Valo static struct bus_request *ath6kl_sdio_alloc_busreq(struct ath6kl_sdio *ar_sdio) 132bdcd8170SKalle Valo { 133bdcd8170SKalle Valo struct bus_request *bus_req; 134bdcd8170SKalle Valo unsigned long flag; 135bdcd8170SKalle Valo 136bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->lock, flag); 137bdcd8170SKalle Valo 138bdcd8170SKalle Valo if (list_empty(&ar_sdio->bus_req_freeq)) { 139bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->lock, flag); 140bdcd8170SKalle Valo return NULL; 141bdcd8170SKalle Valo } 142bdcd8170SKalle Valo 143bdcd8170SKalle Valo bus_req = list_first_entry(&ar_sdio->bus_req_freeq, 144bdcd8170SKalle Valo struct bus_request, list); 145bdcd8170SKalle Valo list_del(&bus_req->list); 146bdcd8170SKalle Valo 147bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->lock, flag); 148bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req); 149bdcd8170SKalle Valo 150bdcd8170SKalle Valo return bus_req; 151bdcd8170SKalle Valo } 152bdcd8170SKalle Valo 153bdcd8170SKalle Valo static void ath6kl_sdio_free_bus_req(struct ath6kl_sdio *ar_sdio, 154bdcd8170SKalle Valo struct bus_request *bus_req) 155bdcd8170SKalle Valo { 156bdcd8170SKalle Valo unsigned long flag; 157bdcd8170SKalle Valo 158bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req); 159bdcd8170SKalle Valo 160bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->lock, flag); 161bdcd8170SKalle Valo list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq); 162bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->lock, flag); 163bdcd8170SKalle Valo } 164bdcd8170SKalle Valo 165bdcd8170SKalle Valo static void ath6kl_sdio_setup_scat_data(struct hif_scatter_req *scat_req, 166bdcd8170SKalle Valo struct hif_scatter_req_priv *s_req_priv, 167bdcd8170SKalle Valo struct mmc_data *data) 168bdcd8170SKalle Valo { 169bdcd8170SKalle Valo struct scatterlist *sg; 170bdcd8170SKalle Valo int i; 171bdcd8170SKalle Valo 172bdcd8170SKalle Valo data->blksz = HIF_MBOX_BLOCK_SIZE; 173bdcd8170SKalle Valo data->blocks = scat_req->len / HIF_MBOX_BLOCK_SIZE; 174bdcd8170SKalle Valo 175bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, 176bdcd8170SKalle Valo "hif-scatter: (%s) addr: 0x%X, (block len: %d, block count: %d) , (tot:%d,sg:%d)\n", 177bdcd8170SKalle Valo (scat_req->req & HIF_WRITE) ? "WR" : "RD", scat_req->addr, 178bdcd8170SKalle Valo data->blksz, data->blocks, scat_req->len, 179bdcd8170SKalle Valo scat_req->scat_entries); 180bdcd8170SKalle Valo 181bdcd8170SKalle Valo data->flags = (scat_req->req & HIF_WRITE) ? MMC_DATA_WRITE : 182bdcd8170SKalle Valo MMC_DATA_READ; 183bdcd8170SKalle Valo 184bdcd8170SKalle Valo /* fill SG entries */ 185bdcd8170SKalle Valo sg = s_req_priv->sgentries; 186bdcd8170SKalle Valo sg_init_table(sg, scat_req->scat_entries); 187bdcd8170SKalle Valo 188bdcd8170SKalle Valo /* assemble SG list */ 189bdcd8170SKalle Valo for (i = 0; i < scat_req->scat_entries; i++, sg++) { 190bdcd8170SKalle Valo if ((unsigned long)scat_req->scat_list[i].buf & 0x3) 191bdcd8170SKalle Valo /* 192bdcd8170SKalle Valo * Some scatter engines can handle unaligned 193bdcd8170SKalle Valo * buffers, print this as informational only. 194bdcd8170SKalle Valo */ 195bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, 196bdcd8170SKalle Valo "(%s) scatter buffer is unaligned 0x%p\n", 197bdcd8170SKalle Valo scat_req->req & HIF_WRITE ? "WR" : "RD", 198bdcd8170SKalle Valo scat_req->scat_list[i].buf); 199bdcd8170SKalle Valo 200bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n", 201bdcd8170SKalle Valo i, scat_req->scat_list[i].buf, 202bdcd8170SKalle Valo scat_req->scat_list[i].len); 203bdcd8170SKalle Valo 204bdcd8170SKalle Valo sg_set_buf(sg, scat_req->scat_list[i].buf, 205bdcd8170SKalle Valo scat_req->scat_list[i].len); 206bdcd8170SKalle Valo } 207bdcd8170SKalle Valo 208bdcd8170SKalle Valo /* set scatter-gather table for request */ 209bdcd8170SKalle Valo data->sg = s_req_priv->sgentries; 210bdcd8170SKalle Valo data->sg_len = scat_req->scat_entries; 211bdcd8170SKalle Valo } 212bdcd8170SKalle Valo 213bdcd8170SKalle Valo static int ath6kl_sdio_scat_rw(struct ath6kl_sdio *ar_sdio, 214bdcd8170SKalle Valo struct bus_request *req) 215bdcd8170SKalle Valo { 216bdcd8170SKalle Valo struct mmc_request mmc_req; 217bdcd8170SKalle Valo struct mmc_command cmd; 218bdcd8170SKalle Valo struct mmc_data data; 219bdcd8170SKalle Valo struct hif_scatter_req *scat_req; 220bdcd8170SKalle Valo u8 opcode, rw; 221bdcd8170SKalle Valo int status; 222bdcd8170SKalle Valo 223bdcd8170SKalle Valo scat_req = req->scat_req; 224bdcd8170SKalle Valo 225bdcd8170SKalle Valo memset(&mmc_req, 0, sizeof(struct mmc_request)); 226bdcd8170SKalle Valo memset(&cmd, 0, sizeof(struct mmc_command)); 227bdcd8170SKalle Valo memset(&data, 0, sizeof(struct mmc_data)); 228bdcd8170SKalle Valo 229bdcd8170SKalle Valo ath6kl_sdio_setup_scat_data(scat_req, scat_req->req_priv, &data); 230bdcd8170SKalle Valo 231bdcd8170SKalle Valo opcode = (scat_req->req & HIF_FIXED_ADDRESS) ? 232bdcd8170SKalle Valo CMD53_ARG_FIXED_ADDRESS : CMD53_ARG_INCR_ADDRESS; 233bdcd8170SKalle Valo 234bdcd8170SKalle Valo rw = (scat_req->req & HIF_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ; 235bdcd8170SKalle Valo 236bdcd8170SKalle Valo /* Fixup the address so that the last byte will fall on MBOX EOM */ 237bdcd8170SKalle Valo if (scat_req->req & HIF_WRITE) { 238bdcd8170SKalle Valo if (scat_req->addr == HIF_MBOX_BASE_ADDR) 239bdcd8170SKalle Valo scat_req->addr += HIF_MBOX_WIDTH - scat_req->len; 240bdcd8170SKalle Valo else 241bdcd8170SKalle Valo /* Uses extended address range */ 242bdcd8170SKalle Valo scat_req->addr += HIF_MBOX0_EXT_WIDTH - scat_req->len; 243bdcd8170SKalle Valo } 244bdcd8170SKalle Valo 245bdcd8170SKalle Valo /* set command argument */ 246bdcd8170SKalle Valo ath6kl_sdio_set_cmd53_arg(&cmd.arg, rw, ar_sdio->func->num, 247bdcd8170SKalle Valo CMD53_ARG_BLOCK_BASIS, opcode, scat_req->addr, 248bdcd8170SKalle Valo data.blocks); 249bdcd8170SKalle Valo 250bdcd8170SKalle Valo cmd.opcode = SD_IO_RW_EXTENDED; 251bdcd8170SKalle Valo cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC; 252bdcd8170SKalle Valo 253bdcd8170SKalle Valo mmc_req.cmd = &cmd; 254bdcd8170SKalle Valo mmc_req.data = &data; 255bdcd8170SKalle Valo 256bdcd8170SKalle Valo mmc_set_data_timeout(&data, ar_sdio->func->card); 257bdcd8170SKalle Valo /* synchronous call to process request */ 258bdcd8170SKalle Valo mmc_wait_for_req(ar_sdio->func->card->host, &mmc_req); 259bdcd8170SKalle Valo 260bdcd8170SKalle Valo status = cmd.error ? cmd.error : data.error; 261bdcd8170SKalle Valo scat_req->status = status; 262bdcd8170SKalle Valo 263bdcd8170SKalle Valo if (scat_req->status) 264bdcd8170SKalle Valo ath6kl_err("Scatter write request failed:%d\n", 265bdcd8170SKalle Valo scat_req->status); 266bdcd8170SKalle Valo 267bdcd8170SKalle Valo if (scat_req->req & HIF_ASYNCHRONOUS) 268bdcd8170SKalle Valo scat_req->complete(scat_req); 269bdcd8170SKalle Valo 270bdcd8170SKalle Valo return status; 271bdcd8170SKalle Valo } 272bdcd8170SKalle Valo 273bdcd8170SKalle Valo 274bdcd8170SKalle Valo /* callback to issue a read-write scatter request */ 275bdcd8170SKalle Valo static int ath6kl_sdio_async_rw_scatter(struct ath6kl *ar, 276bdcd8170SKalle Valo struct hif_scatter_req *scat_req) 277bdcd8170SKalle Valo { 278bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 279bdcd8170SKalle Valo struct hif_scatter_req_priv *req_priv = scat_req->req_priv; 280bdcd8170SKalle Valo u32 request = scat_req->req; 281bdcd8170SKalle Valo int status = 0; 282bdcd8170SKalle Valo unsigned long flags; 283bdcd8170SKalle Valo 284bdcd8170SKalle Valo if (!scat_req->len) 285bdcd8170SKalle Valo return -EINVAL; 286bdcd8170SKalle Valo 287bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, 288bdcd8170SKalle Valo "hif-scatter: total len: %d scatter entries: %d\n", 289bdcd8170SKalle Valo scat_req->len, scat_req->scat_entries); 290bdcd8170SKalle Valo 291bdcd8170SKalle Valo if (request & HIF_SYNCHRONOUS) { 292bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 293bdcd8170SKalle Valo status = ath6kl_sdio_scat_rw(ar_sdio, req_priv->busrequest); 294bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 295bdcd8170SKalle Valo } else { 296bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->wr_async_lock, flags); 297bdcd8170SKalle Valo list_add_tail(&req_priv->busrequest->list, &ar_sdio->wr_asyncq); 298bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags); 299bdcd8170SKalle Valo queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work); 300bdcd8170SKalle Valo } 301bdcd8170SKalle Valo 302bdcd8170SKalle Valo return status; 303bdcd8170SKalle Valo } 304bdcd8170SKalle Valo 305bdcd8170SKalle Valo /* clean up scatter support */ 306bdcd8170SKalle Valo static void ath6kl_sdio_cleanup_scat_resource(struct ath6kl_sdio *ar_sdio) 307bdcd8170SKalle Valo { 308bdcd8170SKalle Valo struct hif_scatter_req *s_req, *tmp_req; 309bdcd8170SKalle Valo unsigned long flag; 310bdcd8170SKalle Valo 311bdcd8170SKalle Valo /* empty the free list */ 312bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->scat_lock, flag); 313bdcd8170SKalle Valo list_for_each_entry_safe(s_req, tmp_req, &ar_sdio->scat_req, list) { 314bdcd8170SKalle Valo list_del(&s_req->list); 315bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->scat_lock, flag); 316bdcd8170SKalle Valo 317bdcd8170SKalle Valo if (s_req->req_priv && s_req->req_priv->busrequest) 318bdcd8170SKalle Valo ath6kl_sdio_free_bus_req(ar_sdio, 319bdcd8170SKalle Valo s_req->req_priv->busrequest); 320bdcd8170SKalle Valo kfree(s_req->virt_dma_buf); 321bdcd8170SKalle Valo kfree(s_req->req_priv); 322bdcd8170SKalle Valo kfree(s_req); 323bdcd8170SKalle Valo 324bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->scat_lock, flag); 325bdcd8170SKalle Valo } 326bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->scat_lock, flag); 327bdcd8170SKalle Valo } 328bdcd8170SKalle Valo 329bdcd8170SKalle Valo /* setup of HIF scatter resources */ 330bdcd8170SKalle Valo static int ath6kl_sdio_setup_scat_resource(struct ath6kl_sdio *ar_sdio, 331bdcd8170SKalle Valo struct hif_dev_scat_sup_info *pinfo) 332bdcd8170SKalle Valo { 333bdcd8170SKalle Valo struct hif_scatter_req *s_req; 334bdcd8170SKalle Valo struct bus_request *bus_req; 335bdcd8170SKalle Valo int i, scat_req_sz, scat_list_sz; 336bdcd8170SKalle Valo 337bdcd8170SKalle Valo /* check if host supports scatter and it meets our requirements */ 338bdcd8170SKalle Valo if (ar_sdio->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) { 339bdcd8170SKalle Valo ath6kl_err("hif-scatter: host only supports scatter of : %d entries, need: %d\n", 340bdcd8170SKalle Valo ar_sdio->func->card->host->max_segs, 341bdcd8170SKalle Valo MAX_SCATTER_ENTRIES_PER_REQ); 342bdcd8170SKalle Valo return -EINVAL; 343bdcd8170SKalle Valo } 344bdcd8170SKalle Valo 345bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_ANY, 346bdcd8170SKalle Valo "hif-scatter enabled: max scatter req : %d entries: %d\n", 347bdcd8170SKalle Valo MAX_SCATTER_REQUESTS, MAX_SCATTER_ENTRIES_PER_REQ); 348bdcd8170SKalle Valo 349bdcd8170SKalle Valo scat_list_sz = (MAX_SCATTER_ENTRIES_PER_REQ - 1) * 350bdcd8170SKalle Valo sizeof(struct hif_scatter_item); 351bdcd8170SKalle Valo scat_req_sz = sizeof(*s_req) + scat_list_sz; 352bdcd8170SKalle Valo 353bdcd8170SKalle Valo for (i = 0; i < MAX_SCATTER_REQUESTS; i++) { 354bdcd8170SKalle Valo /* allocate the scatter request */ 355bdcd8170SKalle Valo s_req = kzalloc(scat_req_sz, GFP_KERNEL); 356bdcd8170SKalle Valo if (!s_req) 357bdcd8170SKalle Valo goto fail_setup_scat; 358bdcd8170SKalle Valo 359bdcd8170SKalle Valo /* allocate the private request blob */ 360bdcd8170SKalle Valo s_req->req_priv = kzalloc(sizeof(*s_req->req_priv), GFP_KERNEL); 361bdcd8170SKalle Valo 362bdcd8170SKalle Valo if (!s_req->req_priv) { 363bdcd8170SKalle Valo kfree(s_req); 364bdcd8170SKalle Valo goto fail_setup_scat; 365bdcd8170SKalle Valo } 366bdcd8170SKalle Valo 367bdcd8170SKalle Valo /* allocate a bus request for this scatter request */ 368bdcd8170SKalle Valo bus_req = ath6kl_sdio_alloc_busreq(ar_sdio); 369bdcd8170SKalle Valo if (!bus_req) { 370bdcd8170SKalle Valo kfree(s_req->req_priv); 371bdcd8170SKalle Valo kfree(s_req); 372bdcd8170SKalle Valo goto fail_setup_scat; 373bdcd8170SKalle Valo } 374bdcd8170SKalle Valo 375bdcd8170SKalle Valo /* assign the scatter request to this bus request */ 376bdcd8170SKalle Valo bus_req->scat_req = s_req; 377bdcd8170SKalle Valo s_req->req_priv->busrequest = bus_req; 378bdcd8170SKalle Valo /* add it to the scatter pool */ 379bdcd8170SKalle Valo hif_scatter_req_add(ar_sdio->ar, s_req); 380bdcd8170SKalle Valo } 381bdcd8170SKalle Valo 382bdcd8170SKalle Valo /* set scatter function pointers */ 383bdcd8170SKalle Valo pinfo->rw_scat_func = ath6kl_sdio_async_rw_scatter; 384bdcd8170SKalle Valo pinfo->max_scat_entries = MAX_SCATTER_ENTRIES_PER_REQ; 385bdcd8170SKalle Valo pinfo->max_xfer_szper_scatreq = MAX_SCATTER_REQ_TRANSFER_SIZE; 386bdcd8170SKalle Valo 387bdcd8170SKalle Valo return 0; 388bdcd8170SKalle Valo 389bdcd8170SKalle Valo fail_setup_scat: 390bdcd8170SKalle Valo ath6kl_err("hif-scatter: failed to alloc scatter resources !\n"); 391bdcd8170SKalle Valo ath6kl_sdio_cleanup_scat_resource(ar_sdio); 392bdcd8170SKalle Valo 393bdcd8170SKalle Valo return -ENOMEM; 394bdcd8170SKalle Valo } 395bdcd8170SKalle Valo 396bdcd8170SKalle Valo static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf, 397bdcd8170SKalle Valo u32 len, u32 request) 398bdcd8170SKalle Valo { 399bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 400bdcd8170SKalle Valo u8 *tbuf = NULL; 401bdcd8170SKalle Valo int ret; 402bdcd8170SKalle Valo bool bounced = false; 403bdcd8170SKalle Valo 404bdcd8170SKalle Valo if (request & HIF_BLOCK_BASIS) 405bdcd8170SKalle Valo len = round_down(len, HIF_MBOX_BLOCK_SIZE); 406bdcd8170SKalle Valo 407bdcd8170SKalle Valo if (buf_needs_bounce(buf)) { 408bdcd8170SKalle Valo if (!ar_sdio->dma_buffer) 409bdcd8170SKalle Valo return -ENOMEM; 410bdcd8170SKalle Valo tbuf = ar_sdio->dma_buffer; 411bdcd8170SKalle Valo memcpy(tbuf, buf, len); 412bdcd8170SKalle Valo bounced = true; 413bdcd8170SKalle Valo } else 414bdcd8170SKalle Valo tbuf = buf; 415bdcd8170SKalle Valo 416bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 417bdcd8170SKalle Valo if (request & HIF_WRITE) { 418bdcd8170SKalle Valo if (addr >= HIF_MBOX_BASE_ADDR && 419bdcd8170SKalle Valo addr <= HIF_MBOX_END_ADDR) 420bdcd8170SKalle Valo addr += (HIF_MBOX_WIDTH - len); 421bdcd8170SKalle Valo 422bdcd8170SKalle Valo if (addr == HIF_MBOX0_EXT_BASE_ADDR) 423bdcd8170SKalle Valo addr += HIF_MBOX0_EXT_WIDTH - len; 424bdcd8170SKalle Valo 425bdcd8170SKalle Valo if (request & HIF_FIXED_ADDRESS) 426bdcd8170SKalle Valo ret = sdio_writesb(ar_sdio->func, addr, tbuf, len); 427bdcd8170SKalle Valo else 428bdcd8170SKalle Valo ret = sdio_memcpy_toio(ar_sdio->func, addr, tbuf, len); 429bdcd8170SKalle Valo } else { 430bdcd8170SKalle Valo if (request & HIF_FIXED_ADDRESS) 431bdcd8170SKalle Valo ret = sdio_readsb(ar_sdio->func, tbuf, addr, len); 432bdcd8170SKalle Valo else 433bdcd8170SKalle Valo ret = sdio_memcpy_fromio(ar_sdio->func, tbuf, 434bdcd8170SKalle Valo addr, len); 435bdcd8170SKalle Valo if (bounced) 436bdcd8170SKalle Valo memcpy(buf, tbuf, len); 437bdcd8170SKalle Valo } 438bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 439bdcd8170SKalle Valo 440bdcd8170SKalle Valo return ret; 441bdcd8170SKalle Valo } 442bdcd8170SKalle Valo 443bdcd8170SKalle Valo static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio, 444bdcd8170SKalle Valo struct bus_request *req) 445bdcd8170SKalle Valo { 446bdcd8170SKalle Valo if (req->scat_req) 447bdcd8170SKalle Valo ath6kl_sdio_scat_rw(ar_sdio, req); 448bdcd8170SKalle Valo else { 449bdcd8170SKalle Valo void *context; 450bdcd8170SKalle Valo int status; 451bdcd8170SKalle Valo 452bdcd8170SKalle Valo status = ath6kl_sdio_read_write_sync(ar_sdio->ar, req->address, 453bdcd8170SKalle Valo req->buffer, req->length, 454bdcd8170SKalle Valo req->request); 455bdcd8170SKalle Valo context = req->packet; 456bdcd8170SKalle Valo ath6kl_sdio_free_bus_req(ar_sdio, req); 457bdcd8170SKalle Valo ath6kldev_rw_comp_handler(context, status); 458bdcd8170SKalle Valo } 459bdcd8170SKalle Valo } 460bdcd8170SKalle Valo 461bdcd8170SKalle Valo static void ath6kl_sdio_write_async_work(struct work_struct *work) 462bdcd8170SKalle Valo { 463bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 464bdcd8170SKalle Valo unsigned long flags; 465bdcd8170SKalle Valo struct bus_request *req, *tmp_req; 466bdcd8170SKalle Valo 467bdcd8170SKalle Valo ar_sdio = container_of(work, struct ath6kl_sdio, wr_async_work); 468bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 469bdcd8170SKalle Valo 470bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->wr_async_lock, flags); 471bdcd8170SKalle Valo list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) { 472bdcd8170SKalle Valo list_del(&req->list); 473bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags); 474bdcd8170SKalle Valo __ath6kl_sdio_write_async(ar_sdio, req); 475bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->wr_async_lock, flags); 476bdcd8170SKalle Valo } 477bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags); 478bdcd8170SKalle Valo 479bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 480bdcd8170SKalle Valo } 481bdcd8170SKalle Valo 482bdcd8170SKalle Valo static void ath6kl_sdio_irq_handler(struct sdio_func *func) 483bdcd8170SKalle Valo { 484bdcd8170SKalle Valo int status; 485bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 486bdcd8170SKalle Valo 487bdcd8170SKalle Valo ar_sdio = sdio_get_drvdata(func); 488bdcd8170SKalle Valo atomic_set(&ar_sdio->irq_handling, 1); 489bdcd8170SKalle Valo 490bdcd8170SKalle Valo /* 491bdcd8170SKalle Valo * Release the host during interrups so we can pick it back up when 492bdcd8170SKalle Valo * we process commands. 493bdcd8170SKalle Valo */ 494bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 495bdcd8170SKalle Valo 496bdcd8170SKalle Valo status = ath6kldev_intr_bh_handler(ar_sdio->ar); 497bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 498bdcd8170SKalle Valo atomic_set(&ar_sdio->irq_handling, 0); 499bdcd8170SKalle Valo WARN_ON(status && status != -ECANCELED); 500bdcd8170SKalle Valo } 501bdcd8170SKalle Valo 502bdcd8170SKalle Valo static int ath6kl_sdio_power_on(struct ath6kl_sdio *ar_sdio) 503bdcd8170SKalle Valo { 504bdcd8170SKalle Valo struct sdio_func *func = ar_sdio->func; 505bdcd8170SKalle Valo int ret = 0; 506bdcd8170SKalle Valo 507bdcd8170SKalle Valo if (!ar_sdio->is_disabled) 508bdcd8170SKalle Valo return 0; 509bdcd8170SKalle Valo 510bdcd8170SKalle Valo sdio_claim_host(func); 511bdcd8170SKalle Valo 512bdcd8170SKalle Valo ret = sdio_enable_func(func); 513bdcd8170SKalle Valo if (ret) { 514bdcd8170SKalle Valo ath6kl_err("Unable to enable sdio func: %d)\n", ret); 515bdcd8170SKalle Valo sdio_release_host(func); 516bdcd8170SKalle Valo return ret; 517bdcd8170SKalle Valo } 518bdcd8170SKalle Valo 519bdcd8170SKalle Valo sdio_release_host(func); 520bdcd8170SKalle Valo 521bdcd8170SKalle Valo /* 522bdcd8170SKalle Valo * Wait for hardware to initialise. It should take a lot less than 523bdcd8170SKalle Valo * 10 ms but let's be conservative here. 524bdcd8170SKalle Valo */ 525bdcd8170SKalle Valo msleep(10); 526bdcd8170SKalle Valo 527bdcd8170SKalle Valo ar_sdio->is_disabled = false; 528bdcd8170SKalle Valo 529bdcd8170SKalle Valo return ret; 530bdcd8170SKalle Valo } 531bdcd8170SKalle Valo 532bdcd8170SKalle Valo static int ath6kl_sdio_power_off(struct ath6kl_sdio *ar_sdio) 533bdcd8170SKalle Valo { 534bdcd8170SKalle Valo int ret; 535bdcd8170SKalle Valo 536bdcd8170SKalle Valo if (ar_sdio->is_disabled) 537bdcd8170SKalle Valo return 0; 538bdcd8170SKalle Valo 539bdcd8170SKalle Valo /* Disable the card */ 540bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 541bdcd8170SKalle Valo ret = sdio_disable_func(ar_sdio->func); 542bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 543bdcd8170SKalle Valo 544bdcd8170SKalle Valo if (ret) 545bdcd8170SKalle Valo return ret; 546bdcd8170SKalle Valo 547bdcd8170SKalle Valo ar_sdio->is_disabled = true; 548bdcd8170SKalle Valo 549bdcd8170SKalle Valo return ret; 550bdcd8170SKalle Valo } 551bdcd8170SKalle Valo 552bdcd8170SKalle Valo static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer, 553bdcd8170SKalle Valo u32 length, u32 request, 554bdcd8170SKalle Valo struct htc_packet *packet) 555bdcd8170SKalle Valo { 556bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 557bdcd8170SKalle Valo struct bus_request *bus_req; 558bdcd8170SKalle Valo unsigned long flags; 559bdcd8170SKalle Valo 560bdcd8170SKalle Valo bus_req = ath6kl_sdio_alloc_busreq(ar_sdio); 561bdcd8170SKalle Valo 562bdcd8170SKalle Valo if (!bus_req) 563bdcd8170SKalle Valo return -ENOMEM; 564bdcd8170SKalle Valo 565bdcd8170SKalle Valo bus_req->address = address; 566bdcd8170SKalle Valo bus_req->buffer = buffer; 567bdcd8170SKalle Valo bus_req->length = length; 568bdcd8170SKalle Valo bus_req->request = request; 569bdcd8170SKalle Valo bus_req->packet = packet; 570bdcd8170SKalle Valo 571bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->wr_async_lock, flags); 572bdcd8170SKalle Valo list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq); 573bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags); 574bdcd8170SKalle Valo queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work); 575bdcd8170SKalle Valo 576bdcd8170SKalle Valo return 0; 577bdcd8170SKalle Valo } 578bdcd8170SKalle Valo 579bdcd8170SKalle Valo static void ath6kl_sdio_irq_enable(struct ath6kl *ar) 580bdcd8170SKalle Valo { 581bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 582bdcd8170SKalle Valo int ret; 583bdcd8170SKalle Valo 584bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 585bdcd8170SKalle Valo 586bdcd8170SKalle Valo /* Register the isr */ 587bdcd8170SKalle Valo ret = sdio_claim_irq(ar_sdio->func, ath6kl_sdio_irq_handler); 588bdcd8170SKalle Valo if (ret) 589bdcd8170SKalle Valo ath6kl_err("Failed to claim sdio irq: %d\n", ret); 590bdcd8170SKalle Valo 591bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 592bdcd8170SKalle Valo } 593bdcd8170SKalle Valo 594bdcd8170SKalle Valo static void ath6kl_sdio_irq_disable(struct ath6kl *ar) 595bdcd8170SKalle Valo { 596bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 597bdcd8170SKalle Valo int ret; 598bdcd8170SKalle Valo 599bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 600bdcd8170SKalle Valo 601bdcd8170SKalle Valo /* Mask our function IRQ */ 602bdcd8170SKalle Valo while (atomic_read(&ar_sdio->irq_handling)) { 603bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 604bdcd8170SKalle Valo schedule_timeout(HZ / 10); 605bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 606bdcd8170SKalle Valo } 607bdcd8170SKalle Valo 608bdcd8170SKalle Valo ret = sdio_release_irq(ar_sdio->func); 609bdcd8170SKalle Valo if (ret) 610bdcd8170SKalle Valo ath6kl_err("Failed to release sdio irq: %d\n", ret); 611bdcd8170SKalle Valo 612bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 613bdcd8170SKalle Valo } 614bdcd8170SKalle Valo 615bdcd8170SKalle Valo static struct hif_scatter_req *ath6kl_sdio_scatter_req_get(struct ath6kl *ar) 616bdcd8170SKalle Valo { 617bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 618bdcd8170SKalle Valo struct hif_scatter_req *node = NULL; 619bdcd8170SKalle Valo unsigned long flag; 620bdcd8170SKalle Valo 621bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->scat_lock, flag); 622bdcd8170SKalle Valo 623bdcd8170SKalle Valo if (!list_empty(&ar_sdio->scat_req)) { 624bdcd8170SKalle Valo node = list_first_entry(&ar_sdio->scat_req, 625bdcd8170SKalle Valo struct hif_scatter_req, list); 626bdcd8170SKalle Valo list_del(&node->list); 627bdcd8170SKalle Valo } 628bdcd8170SKalle Valo 629bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->scat_lock, flag); 630bdcd8170SKalle Valo 631bdcd8170SKalle Valo return node; 632bdcd8170SKalle Valo } 633bdcd8170SKalle Valo 634bdcd8170SKalle Valo static void ath6kl_sdio_scatter_req_add(struct ath6kl *ar, 635bdcd8170SKalle Valo struct hif_scatter_req *s_req) 636bdcd8170SKalle Valo { 637bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 638bdcd8170SKalle Valo unsigned long flag; 639bdcd8170SKalle Valo 640bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->scat_lock, flag); 641bdcd8170SKalle Valo 642bdcd8170SKalle Valo list_add_tail(&s_req->list, &ar_sdio->scat_req); 643bdcd8170SKalle Valo 644bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->scat_lock, flag); 645bdcd8170SKalle Valo 646bdcd8170SKalle Valo } 647bdcd8170SKalle Valo 648bdcd8170SKalle Valo static int ath6kl_sdio_enable_scatter(struct ath6kl *ar, 649bdcd8170SKalle Valo struct hif_dev_scat_sup_info *info) 650bdcd8170SKalle Valo { 651bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 652bdcd8170SKalle Valo int ret; 653bdcd8170SKalle Valo 654bdcd8170SKalle Valo ret = ath6kl_sdio_setup_scat_resource(ar_sdio, info); 655bdcd8170SKalle Valo 656bdcd8170SKalle Valo return ret; 657bdcd8170SKalle Valo } 658bdcd8170SKalle Valo 659bdcd8170SKalle Valo static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar) 660bdcd8170SKalle Valo { 661bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 662bdcd8170SKalle Valo 663bdcd8170SKalle Valo ath6kl_sdio_cleanup_scat_resource(ar_sdio); 664bdcd8170SKalle Valo } 665bdcd8170SKalle Valo 666bdcd8170SKalle Valo static const struct ath6kl_hif_ops ath6kl_sdio_ops = { 667bdcd8170SKalle Valo .read_write_sync = ath6kl_sdio_read_write_sync, 668bdcd8170SKalle Valo .write_async = ath6kl_sdio_write_async, 669bdcd8170SKalle Valo .irq_enable = ath6kl_sdio_irq_enable, 670bdcd8170SKalle Valo .irq_disable = ath6kl_sdio_irq_disable, 671bdcd8170SKalle Valo .scatter_req_get = ath6kl_sdio_scatter_req_get, 672bdcd8170SKalle Valo .scatter_req_add = ath6kl_sdio_scatter_req_add, 673bdcd8170SKalle Valo .enable_scatter = ath6kl_sdio_enable_scatter, 674bdcd8170SKalle Valo .cleanup_scatter = ath6kl_sdio_cleanup_scatter, 675bdcd8170SKalle Valo }; 676bdcd8170SKalle Valo 677bdcd8170SKalle Valo static int ath6kl_sdio_probe(struct sdio_func *func, 678bdcd8170SKalle Valo const struct sdio_device_id *id) 679bdcd8170SKalle Valo { 680bdcd8170SKalle Valo int ret; 681bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 682bdcd8170SKalle Valo struct ath6kl *ar; 683bdcd8170SKalle Valo int count; 684bdcd8170SKalle Valo 685bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, 686bdcd8170SKalle Valo "%s: func: 0x%X, vendor id: 0x%X, dev id: 0x%X, block size: 0x%X/0x%X\n", 687bdcd8170SKalle Valo __func__, func->num, func->vendor, 688bdcd8170SKalle Valo func->device, func->max_blksize, func->cur_blksize); 689bdcd8170SKalle Valo 690bdcd8170SKalle Valo ar_sdio = kzalloc(sizeof(struct ath6kl_sdio), GFP_KERNEL); 691bdcd8170SKalle Valo if (!ar_sdio) 692bdcd8170SKalle Valo return -ENOMEM; 693bdcd8170SKalle Valo 694bdcd8170SKalle Valo ar_sdio->dma_buffer = kzalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL); 695bdcd8170SKalle Valo if (!ar_sdio->dma_buffer) { 696bdcd8170SKalle Valo ret = -ENOMEM; 697bdcd8170SKalle Valo goto err_hif; 698bdcd8170SKalle Valo } 699bdcd8170SKalle Valo 700bdcd8170SKalle Valo ar_sdio->func = func; 701bdcd8170SKalle Valo sdio_set_drvdata(func, ar_sdio); 702bdcd8170SKalle Valo 703bdcd8170SKalle Valo ar_sdio->id = id; 704bdcd8170SKalle Valo ar_sdio->is_disabled = true; 705bdcd8170SKalle Valo 706bdcd8170SKalle Valo spin_lock_init(&ar_sdio->lock); 707bdcd8170SKalle Valo spin_lock_init(&ar_sdio->scat_lock); 708bdcd8170SKalle Valo spin_lock_init(&ar_sdio->wr_async_lock); 709bdcd8170SKalle Valo 710bdcd8170SKalle Valo INIT_LIST_HEAD(&ar_sdio->scat_req); 711bdcd8170SKalle Valo INIT_LIST_HEAD(&ar_sdio->bus_req_freeq); 712bdcd8170SKalle Valo INIT_LIST_HEAD(&ar_sdio->wr_asyncq); 713bdcd8170SKalle Valo 714bdcd8170SKalle Valo INIT_WORK(&ar_sdio->wr_async_work, ath6kl_sdio_write_async_work); 715bdcd8170SKalle Valo 716bdcd8170SKalle Valo for (count = 0; count < BUS_REQUEST_MAX_NUM; count++) 717bdcd8170SKalle Valo ath6kl_sdio_free_bus_req(ar_sdio, &ar_sdio->bus_req[count]); 718bdcd8170SKalle Valo 719bdcd8170SKalle Valo ar = ath6kl_core_alloc(&ar_sdio->func->dev); 720bdcd8170SKalle Valo if (!ar) { 721bdcd8170SKalle Valo ath6kl_err("Failed to alloc ath6kl core\n"); 722bdcd8170SKalle Valo ret = -ENOMEM; 723bdcd8170SKalle Valo goto err_dma; 724bdcd8170SKalle Valo } 725bdcd8170SKalle Valo 726bdcd8170SKalle Valo ar_sdio->ar = ar; 727bdcd8170SKalle Valo ar->hif_priv = ar_sdio; 728bdcd8170SKalle Valo ar->hif_ops = &ath6kl_sdio_ops; 729bdcd8170SKalle Valo 730bdcd8170SKalle Valo ath6kl_sdio_set_mbox_info(ar); 731bdcd8170SKalle Valo 732bdcd8170SKalle Valo sdio_claim_host(func); 733bdcd8170SKalle Valo 734bdcd8170SKalle Valo if ((ar_sdio->id->device & MANUFACTURER_ID_ATH6KL_BASE_MASK) >= 735bdcd8170SKalle Valo MANUFACTURER_ID_AR6003_BASE) { 736bdcd8170SKalle Valo /* enable 4-bit ASYNC interrupt on AR6003 or later */ 737bdcd8170SKalle Valo ret = ath6kl_sdio_func0_cmd52_wr_byte(func->card, 738bdcd8170SKalle Valo CCCR_SDIO_IRQ_MODE_REG, 739bdcd8170SKalle Valo SDIO_IRQ_MODE_ASYNC_4BIT_IRQ); 740bdcd8170SKalle Valo if (ret) { 741bdcd8170SKalle Valo ath6kl_err("Failed to enable 4-bit async irq mode %d\n", 742bdcd8170SKalle Valo ret); 743bdcd8170SKalle Valo sdio_release_host(func); 744bdcd8170SKalle Valo goto err_dma; 745bdcd8170SKalle Valo } 746bdcd8170SKalle Valo 747bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "4-bit async irq mode enabled\n"); 748bdcd8170SKalle Valo } 749bdcd8170SKalle Valo 750bdcd8170SKalle Valo /* give us some time to enable, in ms */ 751bdcd8170SKalle Valo func->enable_timeout = 100; 752bdcd8170SKalle Valo 753bdcd8170SKalle Valo sdio_release_host(func); 754bdcd8170SKalle Valo 755bdcd8170SKalle Valo ret = ath6kl_sdio_power_on(ar_sdio); 756bdcd8170SKalle Valo if (ret) 757bdcd8170SKalle Valo goto err_dma; 758bdcd8170SKalle Valo 759bdcd8170SKalle Valo sdio_claim_host(func); 760bdcd8170SKalle Valo 761bdcd8170SKalle Valo ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE); 762bdcd8170SKalle Valo if (ret) { 763bdcd8170SKalle Valo ath6kl_err("Set sdio block size %d failed: %d)\n", 764bdcd8170SKalle Valo HIF_MBOX_BLOCK_SIZE, ret); 765bdcd8170SKalle Valo sdio_release_host(func); 766bdcd8170SKalle Valo goto err_off; 767bdcd8170SKalle Valo } 768bdcd8170SKalle Valo 769bdcd8170SKalle Valo sdio_release_host(func); 770bdcd8170SKalle Valo 771bdcd8170SKalle Valo ret = ath6kl_core_init(ar); 772bdcd8170SKalle Valo if (ret) { 773bdcd8170SKalle Valo ath6kl_err("Failed to init ath6kl core\n"); 774bdcd8170SKalle Valo goto err_off; 775bdcd8170SKalle Valo } 776bdcd8170SKalle Valo 777bdcd8170SKalle Valo return ret; 778bdcd8170SKalle Valo 779bdcd8170SKalle Valo err_off: 780bdcd8170SKalle Valo ath6kl_sdio_power_off(ar_sdio); 781bdcd8170SKalle Valo err_dma: 782bdcd8170SKalle Valo kfree(ar_sdio->dma_buffer); 783bdcd8170SKalle Valo err_hif: 784bdcd8170SKalle Valo kfree(ar_sdio); 785bdcd8170SKalle Valo 786bdcd8170SKalle Valo return ret; 787bdcd8170SKalle Valo } 788bdcd8170SKalle Valo 789bdcd8170SKalle Valo static void ath6kl_sdio_remove(struct sdio_func *func) 790bdcd8170SKalle Valo { 791bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 792bdcd8170SKalle Valo 793bdcd8170SKalle Valo ar_sdio = sdio_get_drvdata(func); 794bdcd8170SKalle Valo 795bdcd8170SKalle Valo ath6kl_stop_txrx(ar_sdio->ar); 796bdcd8170SKalle Valo cancel_work_sync(&ar_sdio->wr_async_work); 797bdcd8170SKalle Valo 798bdcd8170SKalle Valo ath6kl_unavail_ev(ar_sdio->ar); 799bdcd8170SKalle Valo 800bdcd8170SKalle Valo ath6kl_sdio_power_off(ar_sdio); 801bdcd8170SKalle Valo 802bdcd8170SKalle Valo kfree(ar_sdio->dma_buffer); 803bdcd8170SKalle Valo kfree(ar_sdio); 804bdcd8170SKalle Valo } 805bdcd8170SKalle Valo 806bdcd8170SKalle Valo static const struct sdio_device_id ath6kl_sdio_devices[] = { 807bdcd8170SKalle Valo {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))}, 808bdcd8170SKalle Valo {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))}, 809bdcd8170SKalle Valo {}, 810bdcd8170SKalle Valo }; 811bdcd8170SKalle Valo 812bdcd8170SKalle Valo MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices); 813bdcd8170SKalle Valo 814bdcd8170SKalle Valo static struct sdio_driver ath6kl_sdio_driver = { 815bdcd8170SKalle Valo .name = "ath6kl_sdio", 816bdcd8170SKalle Valo .id_table = ath6kl_sdio_devices, 817bdcd8170SKalle Valo .probe = ath6kl_sdio_probe, 818bdcd8170SKalle Valo .remove = ath6kl_sdio_remove, 819bdcd8170SKalle Valo }; 820bdcd8170SKalle Valo 821bdcd8170SKalle Valo static int __init ath6kl_sdio_init(void) 822bdcd8170SKalle Valo { 823bdcd8170SKalle Valo int ret; 824bdcd8170SKalle Valo 825bdcd8170SKalle Valo ret = sdio_register_driver(&ath6kl_sdio_driver); 826bdcd8170SKalle Valo if (ret) 827bdcd8170SKalle Valo ath6kl_err("sdio driver registration failed: %d\n", ret); 828bdcd8170SKalle Valo 829bdcd8170SKalle Valo return ret; 830bdcd8170SKalle Valo } 831bdcd8170SKalle Valo 832bdcd8170SKalle Valo static void __exit ath6kl_sdio_exit(void) 833bdcd8170SKalle Valo { 834bdcd8170SKalle Valo sdio_unregister_driver(&ath6kl_sdio_driver); 835bdcd8170SKalle Valo } 836bdcd8170SKalle Valo 837bdcd8170SKalle Valo module_init(ath6kl_sdio_init); 838bdcd8170SKalle Valo module_exit(ath6kl_sdio_exit); 839bdcd8170SKalle Valo 840bdcd8170SKalle Valo MODULE_AUTHOR("Atheros Communications, Inc."); 841bdcd8170SKalle Valo MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices"); 842bdcd8170SKalle Valo MODULE_LICENSE("Dual BSD/GPL"); 843bdcd8170SKalle Valo 844bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_OTP_FILE); 845bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE); 846bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE); 847bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE); 848bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE); 849bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_OTP_FILE); 850bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE); 851bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE); 852bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE); 853bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE); 854