1bdcd8170SKalle Valo /* 2bdcd8170SKalle Valo * Copyright (c) 2004-2011 Atheros Communications Inc. 3bdcd8170SKalle Valo * 4bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 5bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 6bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 7bdcd8170SKalle Valo * 8bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15bdcd8170SKalle Valo */ 16bdcd8170SKalle Valo 17bdcd8170SKalle Valo #include <linux/mmc/card.h> 18bdcd8170SKalle Valo #include <linux/mmc/mmc.h> 19bdcd8170SKalle Valo #include <linux/mmc/host.h> 20bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h> 21bdcd8170SKalle Valo #include <linux/mmc/sdio_ids.h> 22bdcd8170SKalle Valo #include <linux/mmc/sdio.h> 23bdcd8170SKalle Valo #include <linux/mmc/sd.h> 242e1cb23cSKalle Valo #include "hif.h" 25bdcd8170SKalle Valo #include "hif-ops.h" 26bdcd8170SKalle Valo #include "target.h" 27bdcd8170SKalle Valo #include "debug.h" 289df337a1SVivek Natarajan #include "cfg80211.h" 29bdcd8170SKalle Valo 30bdcd8170SKalle Valo struct ath6kl_sdio { 31bdcd8170SKalle Valo struct sdio_func *func; 32bdcd8170SKalle Valo 33bdcd8170SKalle Valo spinlock_t lock; 34bdcd8170SKalle Valo 35bdcd8170SKalle Valo /* free list */ 36bdcd8170SKalle Valo struct list_head bus_req_freeq; 37bdcd8170SKalle Valo 38bdcd8170SKalle Valo /* available bus requests */ 39bdcd8170SKalle Valo struct bus_request bus_req[BUS_REQUEST_MAX_NUM]; 40bdcd8170SKalle Valo 41bdcd8170SKalle Valo struct ath6kl *ar; 42bdcd8170SKalle Valo u8 *dma_buffer; 43bdcd8170SKalle Valo 44bdcd8170SKalle Valo /* scatter request list head */ 45bdcd8170SKalle Valo struct list_head scat_req; 46bdcd8170SKalle Valo 47bdcd8170SKalle Valo spinlock_t scat_lock; 48bdcd8170SKalle Valo bool is_disabled; 49bdcd8170SKalle Valo atomic_t irq_handling; 50bdcd8170SKalle Valo const struct sdio_device_id *id; 51bdcd8170SKalle Valo struct work_struct wr_async_work; 52bdcd8170SKalle Valo struct list_head wr_asyncq; 53bdcd8170SKalle Valo spinlock_t wr_async_lock; 54bdcd8170SKalle Valo }; 55bdcd8170SKalle Valo 56bdcd8170SKalle Valo #define CMD53_ARG_READ 0 57bdcd8170SKalle Valo #define CMD53_ARG_WRITE 1 58bdcd8170SKalle Valo #define CMD53_ARG_BLOCK_BASIS 1 59bdcd8170SKalle Valo #define CMD53_ARG_FIXED_ADDRESS 0 60bdcd8170SKalle Valo #define CMD53_ARG_INCR_ADDRESS 1 61bdcd8170SKalle Valo 62bdcd8170SKalle Valo static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar) 63bdcd8170SKalle Valo { 64bdcd8170SKalle Valo return ar->hif_priv; 65bdcd8170SKalle Valo } 66bdcd8170SKalle Valo 67bdcd8170SKalle Valo /* 68bdcd8170SKalle Valo * Macro to check if DMA buffer is WORD-aligned and DMA-able. 69bdcd8170SKalle Valo * Most host controllers assume the buffer is DMA'able and will 70bdcd8170SKalle Valo * bug-check otherwise (i.e. buffers on the stack). virt_addr_valid 71bdcd8170SKalle Valo * check fails on stack memory. 72bdcd8170SKalle Valo */ 73bdcd8170SKalle Valo static inline bool buf_needs_bounce(u8 *buf) 74bdcd8170SKalle Valo { 75bdcd8170SKalle Valo return ((unsigned long) buf & 0x3) || !virt_addr_valid(buf); 76bdcd8170SKalle Valo } 77bdcd8170SKalle Valo 78bdcd8170SKalle Valo static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar) 79bdcd8170SKalle Valo { 80bdcd8170SKalle Valo struct ath6kl_mbox_info *mbox_info = &ar->mbox_info; 81bdcd8170SKalle Valo 82bdcd8170SKalle Valo /* EP1 has an extended range */ 83bdcd8170SKalle Valo mbox_info->htc_addr = HIF_MBOX_BASE_ADDR; 84bdcd8170SKalle Valo mbox_info->htc_ext_addr = HIF_MBOX0_EXT_BASE_ADDR; 85bdcd8170SKalle Valo mbox_info->htc_ext_sz = HIF_MBOX0_EXT_WIDTH; 86bdcd8170SKalle Valo mbox_info->block_size = HIF_MBOX_BLOCK_SIZE; 87bdcd8170SKalle Valo mbox_info->gmbox_addr = HIF_GMBOX_BASE_ADDR; 88bdcd8170SKalle Valo mbox_info->gmbox_sz = HIF_GMBOX_WIDTH; 89bdcd8170SKalle Valo } 90bdcd8170SKalle Valo 91bdcd8170SKalle Valo static inline void ath6kl_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func, 92bdcd8170SKalle Valo u8 mode, u8 opcode, u32 addr, 93bdcd8170SKalle Valo u16 blksz) 94bdcd8170SKalle Valo { 95bdcd8170SKalle Valo *arg = (((rw & 1) << 31) | 96bdcd8170SKalle Valo ((func & 0x7) << 28) | 97bdcd8170SKalle Valo ((mode & 1) << 27) | 98bdcd8170SKalle Valo ((opcode & 1) << 26) | 99bdcd8170SKalle Valo ((addr & 0x1FFFF) << 9) | 100bdcd8170SKalle Valo (blksz & 0x1FF)); 101bdcd8170SKalle Valo } 102bdcd8170SKalle Valo 103bdcd8170SKalle Valo static inline void ath6kl_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw, 104bdcd8170SKalle Valo unsigned int address, 105bdcd8170SKalle Valo unsigned char val) 106bdcd8170SKalle Valo { 107bdcd8170SKalle Valo const u8 func = 0; 108bdcd8170SKalle Valo 109bdcd8170SKalle Valo *arg = ((write & 1) << 31) | 110bdcd8170SKalle Valo ((func & 0x7) << 28) | 111bdcd8170SKalle Valo ((raw & 1) << 27) | 112bdcd8170SKalle Valo (1 << 26) | 113bdcd8170SKalle Valo ((address & 0x1FFFF) << 9) | 114bdcd8170SKalle Valo (1 << 8) | 115bdcd8170SKalle Valo (val & 0xFF); 116bdcd8170SKalle Valo } 117bdcd8170SKalle Valo 118bdcd8170SKalle Valo static int ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card, 119bdcd8170SKalle Valo unsigned int address, 120bdcd8170SKalle Valo unsigned char byte) 121bdcd8170SKalle Valo { 122bdcd8170SKalle Valo struct mmc_command io_cmd; 123bdcd8170SKalle Valo 124bdcd8170SKalle Valo memset(&io_cmd, 0, sizeof(io_cmd)); 125bdcd8170SKalle Valo ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte); 126bdcd8170SKalle Valo io_cmd.opcode = SD_IO_RW_DIRECT; 127bdcd8170SKalle Valo io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC; 128bdcd8170SKalle Valo 129bdcd8170SKalle Valo return mmc_wait_for_cmd(card->host, &io_cmd, 0); 130bdcd8170SKalle Valo } 131bdcd8170SKalle Valo 132da220695SVasanthakumar Thiagarajan static int ath6kl_sdio_io(struct sdio_func *func, u32 request, u32 addr, 133da220695SVasanthakumar Thiagarajan u8 *buf, u32 len) 134da220695SVasanthakumar Thiagarajan { 135da220695SVasanthakumar Thiagarajan int ret = 0; 136da220695SVasanthakumar Thiagarajan 137861dd058SVasanthakumar Thiagarajan sdio_claim_host(func); 138861dd058SVasanthakumar Thiagarajan 139da220695SVasanthakumar Thiagarajan if (request & HIF_WRITE) { 140f7325b85SKalle Valo /* FIXME: looks like ugly workaround for something */ 141da220695SVasanthakumar Thiagarajan if (addr >= HIF_MBOX_BASE_ADDR && 142da220695SVasanthakumar Thiagarajan addr <= HIF_MBOX_END_ADDR) 143da220695SVasanthakumar Thiagarajan addr += (HIF_MBOX_WIDTH - len); 144da220695SVasanthakumar Thiagarajan 145f7325b85SKalle Valo /* FIXME: this also looks like ugly workaround */ 146da220695SVasanthakumar Thiagarajan if (addr == HIF_MBOX0_EXT_BASE_ADDR) 147da220695SVasanthakumar Thiagarajan addr += HIF_MBOX0_EXT_WIDTH - len; 148da220695SVasanthakumar Thiagarajan 149da220695SVasanthakumar Thiagarajan if (request & HIF_FIXED_ADDRESS) 150da220695SVasanthakumar Thiagarajan ret = sdio_writesb(func, addr, buf, len); 151da220695SVasanthakumar Thiagarajan else 152da220695SVasanthakumar Thiagarajan ret = sdio_memcpy_toio(func, addr, buf, len); 153da220695SVasanthakumar Thiagarajan } else { 154da220695SVasanthakumar Thiagarajan if (request & HIF_FIXED_ADDRESS) 155da220695SVasanthakumar Thiagarajan ret = sdio_readsb(func, buf, addr, len); 156da220695SVasanthakumar Thiagarajan else 157da220695SVasanthakumar Thiagarajan ret = sdio_memcpy_fromio(func, buf, addr, len); 158da220695SVasanthakumar Thiagarajan } 159da220695SVasanthakumar Thiagarajan 160861dd058SVasanthakumar Thiagarajan sdio_release_host(func); 161861dd058SVasanthakumar Thiagarajan 162f7325b85SKalle Valo ath6kl_dbg(ATH6KL_DBG_SDIO, "%s addr 0x%x%s buf 0x%p len %d\n", 163f7325b85SKalle Valo request & HIF_WRITE ? "wr" : "rd", addr, 164f7325b85SKalle Valo request & HIF_FIXED_ADDRESS ? " (fixed)" : "", buf, len); 165f7325b85SKalle Valo ath6kl_dbg_dump(ATH6KL_DBG_SDIO_DUMP, NULL, "sdio ", buf, len); 166f7325b85SKalle Valo 167da220695SVasanthakumar Thiagarajan return ret; 168da220695SVasanthakumar Thiagarajan } 169da220695SVasanthakumar Thiagarajan 170bdcd8170SKalle Valo static struct bus_request *ath6kl_sdio_alloc_busreq(struct ath6kl_sdio *ar_sdio) 171bdcd8170SKalle Valo { 172bdcd8170SKalle Valo struct bus_request *bus_req; 173bdcd8170SKalle Valo 174151bd30bSVasanthakumar Thiagarajan spin_lock_bh(&ar_sdio->lock); 175bdcd8170SKalle Valo 176bdcd8170SKalle Valo if (list_empty(&ar_sdio->bus_req_freeq)) { 177151bd30bSVasanthakumar Thiagarajan spin_unlock_bh(&ar_sdio->lock); 178bdcd8170SKalle Valo return NULL; 179bdcd8170SKalle Valo } 180bdcd8170SKalle Valo 181bdcd8170SKalle Valo bus_req = list_first_entry(&ar_sdio->bus_req_freeq, 182bdcd8170SKalle Valo struct bus_request, list); 183bdcd8170SKalle Valo list_del(&bus_req->list); 184bdcd8170SKalle Valo 185151bd30bSVasanthakumar Thiagarajan spin_unlock_bh(&ar_sdio->lock); 186f7325b85SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, "%s: bus request 0x%p\n", 187f7325b85SKalle Valo __func__, bus_req); 188bdcd8170SKalle Valo 189bdcd8170SKalle Valo return bus_req; 190bdcd8170SKalle Valo } 191bdcd8170SKalle Valo 192bdcd8170SKalle Valo static void ath6kl_sdio_free_bus_req(struct ath6kl_sdio *ar_sdio, 193bdcd8170SKalle Valo struct bus_request *bus_req) 194bdcd8170SKalle Valo { 195f7325b85SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, "%s: bus request 0x%p\n", 196f7325b85SKalle Valo __func__, bus_req); 197bdcd8170SKalle Valo 198151bd30bSVasanthakumar Thiagarajan spin_lock_bh(&ar_sdio->lock); 199bdcd8170SKalle Valo list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq); 200151bd30bSVasanthakumar Thiagarajan spin_unlock_bh(&ar_sdio->lock); 201bdcd8170SKalle Valo } 202bdcd8170SKalle Valo 203bdcd8170SKalle Valo static void ath6kl_sdio_setup_scat_data(struct hif_scatter_req *scat_req, 204bdcd8170SKalle Valo struct mmc_data *data) 205bdcd8170SKalle Valo { 206bdcd8170SKalle Valo struct scatterlist *sg; 207bdcd8170SKalle Valo int i; 208bdcd8170SKalle Valo 209bdcd8170SKalle Valo data->blksz = HIF_MBOX_BLOCK_SIZE; 210bdcd8170SKalle Valo data->blocks = scat_req->len / HIF_MBOX_BLOCK_SIZE; 211bdcd8170SKalle Valo 212bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, 213bdcd8170SKalle Valo "hif-scatter: (%s) addr: 0x%X, (block len: %d, block count: %d) , (tot:%d,sg:%d)\n", 214bdcd8170SKalle Valo (scat_req->req & HIF_WRITE) ? "WR" : "RD", scat_req->addr, 215bdcd8170SKalle Valo data->blksz, data->blocks, scat_req->len, 216bdcd8170SKalle Valo scat_req->scat_entries); 217bdcd8170SKalle Valo 218bdcd8170SKalle Valo data->flags = (scat_req->req & HIF_WRITE) ? MMC_DATA_WRITE : 219bdcd8170SKalle Valo MMC_DATA_READ; 220bdcd8170SKalle Valo 221bdcd8170SKalle Valo /* fill SG entries */ 222d4df7890SVasanthakumar Thiagarajan sg = scat_req->sgentries; 223bdcd8170SKalle Valo sg_init_table(sg, scat_req->scat_entries); 224bdcd8170SKalle Valo 225bdcd8170SKalle Valo /* assemble SG list */ 226bdcd8170SKalle Valo for (i = 0; i < scat_req->scat_entries; i++, sg++) { 227bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n", 228bdcd8170SKalle Valo i, scat_req->scat_list[i].buf, 229bdcd8170SKalle Valo scat_req->scat_list[i].len); 230bdcd8170SKalle Valo 231bdcd8170SKalle Valo sg_set_buf(sg, scat_req->scat_list[i].buf, 232bdcd8170SKalle Valo scat_req->scat_list[i].len); 233bdcd8170SKalle Valo } 234bdcd8170SKalle Valo 235bdcd8170SKalle Valo /* set scatter-gather table for request */ 236d4df7890SVasanthakumar Thiagarajan data->sg = scat_req->sgentries; 237bdcd8170SKalle Valo data->sg_len = scat_req->scat_entries; 238bdcd8170SKalle Valo } 239bdcd8170SKalle Valo 240bdcd8170SKalle Valo static int ath6kl_sdio_scat_rw(struct ath6kl_sdio *ar_sdio, 241bdcd8170SKalle Valo struct bus_request *req) 242bdcd8170SKalle Valo { 243bdcd8170SKalle Valo struct mmc_request mmc_req; 244bdcd8170SKalle Valo struct mmc_command cmd; 245bdcd8170SKalle Valo struct mmc_data data; 246bdcd8170SKalle Valo struct hif_scatter_req *scat_req; 247bdcd8170SKalle Valo u8 opcode, rw; 248348a8fbcSVasanthakumar Thiagarajan int status, len; 249bdcd8170SKalle Valo 250bdcd8170SKalle Valo scat_req = req->scat_req; 251bdcd8170SKalle Valo 252348a8fbcSVasanthakumar Thiagarajan if (scat_req->virt_scat) { 253348a8fbcSVasanthakumar Thiagarajan len = scat_req->len; 254348a8fbcSVasanthakumar Thiagarajan if (scat_req->req & HIF_BLOCK_BASIS) 255348a8fbcSVasanthakumar Thiagarajan len = round_down(len, HIF_MBOX_BLOCK_SIZE); 256348a8fbcSVasanthakumar Thiagarajan 257348a8fbcSVasanthakumar Thiagarajan status = ath6kl_sdio_io(ar_sdio->func, scat_req->req, 258348a8fbcSVasanthakumar Thiagarajan scat_req->addr, scat_req->virt_dma_buf, 259348a8fbcSVasanthakumar Thiagarajan len); 260348a8fbcSVasanthakumar Thiagarajan goto scat_complete; 261348a8fbcSVasanthakumar Thiagarajan } 262348a8fbcSVasanthakumar Thiagarajan 263bdcd8170SKalle Valo memset(&mmc_req, 0, sizeof(struct mmc_request)); 264bdcd8170SKalle Valo memset(&cmd, 0, sizeof(struct mmc_command)); 265bdcd8170SKalle Valo memset(&data, 0, sizeof(struct mmc_data)); 266bdcd8170SKalle Valo 267d4df7890SVasanthakumar Thiagarajan ath6kl_sdio_setup_scat_data(scat_req, &data); 268bdcd8170SKalle Valo 269bdcd8170SKalle Valo opcode = (scat_req->req & HIF_FIXED_ADDRESS) ? 270bdcd8170SKalle Valo CMD53_ARG_FIXED_ADDRESS : CMD53_ARG_INCR_ADDRESS; 271bdcd8170SKalle Valo 272bdcd8170SKalle Valo rw = (scat_req->req & HIF_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ; 273bdcd8170SKalle Valo 274bdcd8170SKalle Valo /* Fixup the address so that the last byte will fall on MBOX EOM */ 275bdcd8170SKalle Valo if (scat_req->req & HIF_WRITE) { 276bdcd8170SKalle Valo if (scat_req->addr == HIF_MBOX_BASE_ADDR) 277bdcd8170SKalle Valo scat_req->addr += HIF_MBOX_WIDTH - scat_req->len; 278bdcd8170SKalle Valo else 279bdcd8170SKalle Valo /* Uses extended address range */ 280bdcd8170SKalle Valo scat_req->addr += HIF_MBOX0_EXT_WIDTH - scat_req->len; 281bdcd8170SKalle Valo } 282bdcd8170SKalle Valo 283bdcd8170SKalle Valo /* set command argument */ 284bdcd8170SKalle Valo ath6kl_sdio_set_cmd53_arg(&cmd.arg, rw, ar_sdio->func->num, 285bdcd8170SKalle Valo CMD53_ARG_BLOCK_BASIS, opcode, scat_req->addr, 286bdcd8170SKalle Valo data.blocks); 287bdcd8170SKalle Valo 288bdcd8170SKalle Valo cmd.opcode = SD_IO_RW_EXTENDED; 289bdcd8170SKalle Valo cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC; 290bdcd8170SKalle Valo 291bdcd8170SKalle Valo mmc_req.cmd = &cmd; 292bdcd8170SKalle Valo mmc_req.data = &data; 293bdcd8170SKalle Valo 294861dd058SVasanthakumar Thiagarajan sdio_claim_host(ar_sdio->func); 295861dd058SVasanthakumar Thiagarajan 296bdcd8170SKalle Valo mmc_set_data_timeout(&data, ar_sdio->func->card); 297bdcd8170SKalle Valo /* synchronous call to process request */ 298bdcd8170SKalle Valo mmc_wait_for_req(ar_sdio->func->card->host, &mmc_req); 299bdcd8170SKalle Valo 300861dd058SVasanthakumar Thiagarajan sdio_release_host(ar_sdio->func); 301861dd058SVasanthakumar Thiagarajan 302bdcd8170SKalle Valo status = cmd.error ? cmd.error : data.error; 303348a8fbcSVasanthakumar Thiagarajan 304348a8fbcSVasanthakumar Thiagarajan scat_complete: 305bdcd8170SKalle Valo scat_req->status = status; 306bdcd8170SKalle Valo 307bdcd8170SKalle Valo if (scat_req->status) 308bdcd8170SKalle Valo ath6kl_err("Scatter write request failed:%d\n", 309bdcd8170SKalle Valo scat_req->status); 310bdcd8170SKalle Valo 311bdcd8170SKalle Valo if (scat_req->req & HIF_ASYNCHRONOUS) 312e041c7f9SVasanthakumar Thiagarajan scat_req->complete(ar_sdio->ar->htc_target, scat_req); 313bdcd8170SKalle Valo 314bdcd8170SKalle Valo return status; 315bdcd8170SKalle Valo } 316bdcd8170SKalle Valo 3173df505adSVasanthakumar Thiagarajan static int ath6kl_sdio_alloc_prep_scat_req(struct ath6kl_sdio *ar_sdio, 3183df505adSVasanthakumar Thiagarajan int n_scat_entry, int n_scat_req, 3193df505adSVasanthakumar Thiagarajan bool virt_scat) 3203df505adSVasanthakumar Thiagarajan { 3213df505adSVasanthakumar Thiagarajan struct hif_scatter_req *s_req; 3223df505adSVasanthakumar Thiagarajan struct bus_request *bus_req; 323cfeab10bSVasanthakumar Thiagarajan int i, scat_req_sz, scat_list_sz, sg_sz, buf_sz; 324cfeab10bSVasanthakumar Thiagarajan u8 *virt_buf; 3253df505adSVasanthakumar Thiagarajan 3263df505adSVasanthakumar Thiagarajan scat_list_sz = (n_scat_entry - 1) * sizeof(struct hif_scatter_item); 3273df505adSVasanthakumar Thiagarajan scat_req_sz = sizeof(*s_req) + scat_list_sz; 3283df505adSVasanthakumar Thiagarajan 3293df505adSVasanthakumar Thiagarajan if (!virt_scat) 3303df505adSVasanthakumar Thiagarajan sg_sz = sizeof(struct scatterlist) * n_scat_entry; 331cfeab10bSVasanthakumar Thiagarajan else 332cfeab10bSVasanthakumar Thiagarajan buf_sz = 2 * L1_CACHE_BYTES + 333cfeab10bSVasanthakumar Thiagarajan ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER; 3343df505adSVasanthakumar Thiagarajan 3353df505adSVasanthakumar Thiagarajan for (i = 0; i < n_scat_req; i++) { 3363df505adSVasanthakumar Thiagarajan /* allocate the scatter request */ 3373df505adSVasanthakumar Thiagarajan s_req = kzalloc(scat_req_sz, GFP_KERNEL); 3383df505adSVasanthakumar Thiagarajan if (!s_req) 3393df505adSVasanthakumar Thiagarajan return -ENOMEM; 3403df505adSVasanthakumar Thiagarajan 341cfeab10bSVasanthakumar Thiagarajan if (virt_scat) { 342cfeab10bSVasanthakumar Thiagarajan virt_buf = kzalloc(buf_sz, GFP_KERNEL); 343cfeab10bSVasanthakumar Thiagarajan if (!virt_buf) { 344cfeab10bSVasanthakumar Thiagarajan kfree(s_req); 345cfeab10bSVasanthakumar Thiagarajan return -ENOMEM; 346cfeab10bSVasanthakumar Thiagarajan } 347cfeab10bSVasanthakumar Thiagarajan 348cfeab10bSVasanthakumar Thiagarajan s_req->virt_dma_buf = 349cfeab10bSVasanthakumar Thiagarajan (u8 *)L1_CACHE_ALIGN((unsigned long)virt_buf); 350cfeab10bSVasanthakumar Thiagarajan } else { 3513df505adSVasanthakumar Thiagarajan /* allocate sglist */ 3523df505adSVasanthakumar Thiagarajan s_req->sgentries = kzalloc(sg_sz, GFP_KERNEL); 3533df505adSVasanthakumar Thiagarajan 3543df505adSVasanthakumar Thiagarajan if (!s_req->sgentries) { 3553df505adSVasanthakumar Thiagarajan kfree(s_req); 3563df505adSVasanthakumar Thiagarajan return -ENOMEM; 3573df505adSVasanthakumar Thiagarajan } 3583df505adSVasanthakumar Thiagarajan } 3593df505adSVasanthakumar Thiagarajan 3603df505adSVasanthakumar Thiagarajan /* allocate a bus request for this scatter request */ 3613df505adSVasanthakumar Thiagarajan bus_req = ath6kl_sdio_alloc_busreq(ar_sdio); 3623df505adSVasanthakumar Thiagarajan if (!bus_req) { 3633df505adSVasanthakumar Thiagarajan kfree(s_req->sgentries); 364cfeab10bSVasanthakumar Thiagarajan kfree(s_req->virt_dma_buf); 3653df505adSVasanthakumar Thiagarajan kfree(s_req); 3663df505adSVasanthakumar Thiagarajan return -ENOMEM; 3673df505adSVasanthakumar Thiagarajan } 3683df505adSVasanthakumar Thiagarajan 3693df505adSVasanthakumar Thiagarajan /* assign the scatter request to this bus request */ 3703df505adSVasanthakumar Thiagarajan bus_req->scat_req = s_req; 3713df505adSVasanthakumar Thiagarajan s_req->busrequest = bus_req; 3723df505adSVasanthakumar Thiagarajan 3734a005c3eSVasanthakumar Thiagarajan s_req->virt_scat = virt_scat; 3744a005c3eSVasanthakumar Thiagarajan 3753df505adSVasanthakumar Thiagarajan /* add it to the scatter pool */ 3763df505adSVasanthakumar Thiagarajan hif_scatter_req_add(ar_sdio->ar, s_req); 3773df505adSVasanthakumar Thiagarajan } 3783df505adSVasanthakumar Thiagarajan 3793df505adSVasanthakumar Thiagarajan return 0; 3803df505adSVasanthakumar Thiagarajan } 3813df505adSVasanthakumar Thiagarajan 382bdcd8170SKalle Valo static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf, 383bdcd8170SKalle Valo u32 len, u32 request) 384bdcd8170SKalle Valo { 385bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 386bdcd8170SKalle Valo u8 *tbuf = NULL; 387bdcd8170SKalle Valo int ret; 388bdcd8170SKalle Valo bool bounced = false; 389bdcd8170SKalle Valo 390bdcd8170SKalle Valo if (request & HIF_BLOCK_BASIS) 391bdcd8170SKalle Valo len = round_down(len, HIF_MBOX_BLOCK_SIZE); 392bdcd8170SKalle Valo 393bdcd8170SKalle Valo if (buf_needs_bounce(buf)) { 394bdcd8170SKalle Valo if (!ar_sdio->dma_buffer) 395bdcd8170SKalle Valo return -ENOMEM; 396bdcd8170SKalle Valo tbuf = ar_sdio->dma_buffer; 397bdcd8170SKalle Valo memcpy(tbuf, buf, len); 398bdcd8170SKalle Valo bounced = true; 399bdcd8170SKalle Valo } else 400bdcd8170SKalle Valo tbuf = buf; 401bdcd8170SKalle Valo 402da220695SVasanthakumar Thiagarajan ret = ath6kl_sdio_io(ar_sdio->func, request, addr, tbuf, len); 403da220695SVasanthakumar Thiagarajan if ((request & HIF_READ) && bounced) 404bdcd8170SKalle Valo memcpy(buf, tbuf, len); 405bdcd8170SKalle Valo 406bdcd8170SKalle Valo return ret; 407bdcd8170SKalle Valo } 408bdcd8170SKalle Valo 409bdcd8170SKalle Valo static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio, 410bdcd8170SKalle Valo struct bus_request *req) 411bdcd8170SKalle Valo { 412bdcd8170SKalle Valo if (req->scat_req) 413bdcd8170SKalle Valo ath6kl_sdio_scat_rw(ar_sdio, req); 414bdcd8170SKalle Valo else { 415bdcd8170SKalle Valo void *context; 416bdcd8170SKalle Valo int status; 417bdcd8170SKalle Valo 418bdcd8170SKalle Valo status = ath6kl_sdio_read_write_sync(ar_sdio->ar, req->address, 419bdcd8170SKalle Valo req->buffer, req->length, 420bdcd8170SKalle Valo req->request); 421bdcd8170SKalle Valo context = req->packet; 422bdcd8170SKalle Valo ath6kl_sdio_free_bus_req(ar_sdio, req); 4238e8ddb2bSKalle Valo ath6kl_hif_rw_comp_handler(context, status); 424bdcd8170SKalle Valo } 425bdcd8170SKalle Valo } 426bdcd8170SKalle Valo 427bdcd8170SKalle Valo static void ath6kl_sdio_write_async_work(struct work_struct *work) 428bdcd8170SKalle Valo { 429bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 430bdcd8170SKalle Valo struct bus_request *req, *tmp_req; 431bdcd8170SKalle Valo 432bdcd8170SKalle Valo ar_sdio = container_of(work, struct ath6kl_sdio, wr_async_work); 433bdcd8170SKalle Valo 434151bd30bSVasanthakumar Thiagarajan spin_lock_bh(&ar_sdio->wr_async_lock); 435bdcd8170SKalle Valo list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) { 436bdcd8170SKalle Valo list_del(&req->list); 437151bd30bSVasanthakumar Thiagarajan spin_unlock_bh(&ar_sdio->wr_async_lock); 438bdcd8170SKalle Valo __ath6kl_sdio_write_async(ar_sdio, req); 439151bd30bSVasanthakumar Thiagarajan spin_lock_bh(&ar_sdio->wr_async_lock); 440bdcd8170SKalle Valo } 441151bd30bSVasanthakumar Thiagarajan spin_unlock_bh(&ar_sdio->wr_async_lock); 442bdcd8170SKalle Valo } 443bdcd8170SKalle Valo 444bdcd8170SKalle Valo static void ath6kl_sdio_irq_handler(struct sdio_func *func) 445bdcd8170SKalle Valo { 446bdcd8170SKalle Valo int status; 447bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 448bdcd8170SKalle Valo 449f7325b85SKalle Valo ath6kl_dbg(ATH6KL_DBG_SDIO, "irq\n"); 450f7325b85SKalle Valo 451bdcd8170SKalle Valo ar_sdio = sdio_get_drvdata(func); 452bdcd8170SKalle Valo atomic_set(&ar_sdio->irq_handling, 1); 453bdcd8170SKalle Valo 454bdcd8170SKalle Valo /* 455bdcd8170SKalle Valo * Release the host during interrups so we can pick it back up when 456bdcd8170SKalle Valo * we process commands. 457bdcd8170SKalle Valo */ 458bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 459bdcd8170SKalle Valo 4608e8ddb2bSKalle Valo status = ath6kl_hif_intr_bh_handler(ar_sdio->ar); 461bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 462bdcd8170SKalle Valo atomic_set(&ar_sdio->irq_handling, 0); 463bdcd8170SKalle Valo WARN_ON(status && status != -ECANCELED); 464bdcd8170SKalle Valo } 465bdcd8170SKalle Valo 466b2e75698SKalle Valo static int ath6kl_sdio_power_on(struct ath6kl *ar) 467bdcd8170SKalle Valo { 468b2e75698SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 469bdcd8170SKalle Valo struct sdio_func *func = ar_sdio->func; 470bdcd8170SKalle Valo int ret = 0; 471bdcd8170SKalle Valo 472bdcd8170SKalle Valo if (!ar_sdio->is_disabled) 473bdcd8170SKalle Valo return 0; 474bdcd8170SKalle Valo 4753ef987beSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "sdio power on\n"); 4763ef987beSKalle Valo 477bdcd8170SKalle Valo sdio_claim_host(func); 478bdcd8170SKalle Valo 479bdcd8170SKalle Valo ret = sdio_enable_func(func); 480bdcd8170SKalle Valo if (ret) { 481bdcd8170SKalle Valo ath6kl_err("Unable to enable sdio func: %d)\n", ret); 482bdcd8170SKalle Valo sdio_release_host(func); 483bdcd8170SKalle Valo return ret; 484bdcd8170SKalle Valo } 485bdcd8170SKalle Valo 486bdcd8170SKalle Valo sdio_release_host(func); 487bdcd8170SKalle Valo 488bdcd8170SKalle Valo /* 489bdcd8170SKalle Valo * Wait for hardware to initialise. It should take a lot less than 490bdcd8170SKalle Valo * 10 ms but let's be conservative here. 491bdcd8170SKalle Valo */ 492bdcd8170SKalle Valo msleep(10); 493bdcd8170SKalle Valo 494bdcd8170SKalle Valo ar_sdio->is_disabled = false; 495bdcd8170SKalle Valo 496bdcd8170SKalle Valo return ret; 497bdcd8170SKalle Valo } 498bdcd8170SKalle Valo 499b2e75698SKalle Valo static int ath6kl_sdio_power_off(struct ath6kl *ar) 500bdcd8170SKalle Valo { 501b2e75698SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 502bdcd8170SKalle Valo int ret; 503bdcd8170SKalle Valo 504bdcd8170SKalle Valo if (ar_sdio->is_disabled) 505bdcd8170SKalle Valo return 0; 506bdcd8170SKalle Valo 5073ef987beSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "sdio power off\n"); 5083ef987beSKalle Valo 509bdcd8170SKalle Valo /* Disable the card */ 510bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 511bdcd8170SKalle Valo ret = sdio_disable_func(ar_sdio->func); 512bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 513bdcd8170SKalle Valo 514bdcd8170SKalle Valo if (ret) 515bdcd8170SKalle Valo return ret; 516bdcd8170SKalle Valo 517bdcd8170SKalle Valo ar_sdio->is_disabled = true; 518bdcd8170SKalle Valo 519bdcd8170SKalle Valo return ret; 520bdcd8170SKalle Valo } 521bdcd8170SKalle Valo 522bdcd8170SKalle Valo static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer, 523bdcd8170SKalle Valo u32 length, u32 request, 524bdcd8170SKalle Valo struct htc_packet *packet) 525bdcd8170SKalle Valo { 526bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 527bdcd8170SKalle Valo struct bus_request *bus_req; 528bdcd8170SKalle Valo 529bdcd8170SKalle Valo bus_req = ath6kl_sdio_alloc_busreq(ar_sdio); 530bdcd8170SKalle Valo 531bdcd8170SKalle Valo if (!bus_req) 532bdcd8170SKalle Valo return -ENOMEM; 533bdcd8170SKalle Valo 534bdcd8170SKalle Valo bus_req->address = address; 535bdcd8170SKalle Valo bus_req->buffer = buffer; 536bdcd8170SKalle Valo bus_req->length = length; 537bdcd8170SKalle Valo bus_req->request = request; 538bdcd8170SKalle Valo bus_req->packet = packet; 539bdcd8170SKalle Valo 540151bd30bSVasanthakumar Thiagarajan spin_lock_bh(&ar_sdio->wr_async_lock); 541bdcd8170SKalle Valo list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq); 542151bd30bSVasanthakumar Thiagarajan spin_unlock_bh(&ar_sdio->wr_async_lock); 543bdcd8170SKalle Valo queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work); 544bdcd8170SKalle Valo 545bdcd8170SKalle Valo return 0; 546bdcd8170SKalle Valo } 547bdcd8170SKalle Valo 548bdcd8170SKalle Valo static void ath6kl_sdio_irq_enable(struct ath6kl *ar) 549bdcd8170SKalle Valo { 550bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 551bdcd8170SKalle Valo int ret; 552bdcd8170SKalle Valo 553bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 554bdcd8170SKalle Valo 555bdcd8170SKalle Valo /* Register the isr */ 556bdcd8170SKalle Valo ret = sdio_claim_irq(ar_sdio->func, ath6kl_sdio_irq_handler); 557bdcd8170SKalle Valo if (ret) 558bdcd8170SKalle Valo ath6kl_err("Failed to claim sdio irq: %d\n", ret); 559bdcd8170SKalle Valo 560bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 561bdcd8170SKalle Valo } 562bdcd8170SKalle Valo 563bdcd8170SKalle Valo static void ath6kl_sdio_irq_disable(struct ath6kl *ar) 564bdcd8170SKalle Valo { 565bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 566bdcd8170SKalle Valo int ret; 567bdcd8170SKalle Valo 568bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 569bdcd8170SKalle Valo 570bdcd8170SKalle Valo /* Mask our function IRQ */ 571bdcd8170SKalle Valo while (atomic_read(&ar_sdio->irq_handling)) { 572bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 573bdcd8170SKalle Valo schedule_timeout(HZ / 10); 574bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 575bdcd8170SKalle Valo } 576bdcd8170SKalle Valo 577bdcd8170SKalle Valo ret = sdio_release_irq(ar_sdio->func); 578bdcd8170SKalle Valo if (ret) 579bdcd8170SKalle Valo ath6kl_err("Failed to release sdio irq: %d\n", ret); 580bdcd8170SKalle Valo 581bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 582bdcd8170SKalle Valo } 583bdcd8170SKalle Valo 584bdcd8170SKalle Valo static struct hif_scatter_req *ath6kl_sdio_scatter_req_get(struct ath6kl *ar) 585bdcd8170SKalle Valo { 586bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 587bdcd8170SKalle Valo struct hif_scatter_req *node = NULL; 588bdcd8170SKalle Valo 589151bd30bSVasanthakumar Thiagarajan spin_lock_bh(&ar_sdio->scat_lock); 590bdcd8170SKalle Valo 591bdcd8170SKalle Valo if (!list_empty(&ar_sdio->scat_req)) { 592bdcd8170SKalle Valo node = list_first_entry(&ar_sdio->scat_req, 593bdcd8170SKalle Valo struct hif_scatter_req, list); 594bdcd8170SKalle Valo list_del(&node->list); 595bdcd8170SKalle Valo } 596bdcd8170SKalle Valo 597151bd30bSVasanthakumar Thiagarajan spin_unlock_bh(&ar_sdio->scat_lock); 598bdcd8170SKalle Valo 599bdcd8170SKalle Valo return node; 600bdcd8170SKalle Valo } 601bdcd8170SKalle Valo 602bdcd8170SKalle Valo static void ath6kl_sdio_scatter_req_add(struct ath6kl *ar, 603bdcd8170SKalle Valo struct hif_scatter_req *s_req) 604bdcd8170SKalle Valo { 605bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 606bdcd8170SKalle Valo 607151bd30bSVasanthakumar Thiagarajan spin_lock_bh(&ar_sdio->scat_lock); 608bdcd8170SKalle Valo 609bdcd8170SKalle Valo list_add_tail(&s_req->list, &ar_sdio->scat_req); 610bdcd8170SKalle Valo 611151bd30bSVasanthakumar Thiagarajan spin_unlock_bh(&ar_sdio->scat_lock); 612bdcd8170SKalle Valo 613bdcd8170SKalle Valo } 614bdcd8170SKalle Valo 615c630d18aSVasanthakumar Thiagarajan /* scatter gather read write request */ 616c630d18aSVasanthakumar Thiagarajan static int ath6kl_sdio_async_rw_scatter(struct ath6kl *ar, 617c630d18aSVasanthakumar Thiagarajan struct hif_scatter_req *scat_req) 618c630d18aSVasanthakumar Thiagarajan { 619c630d18aSVasanthakumar Thiagarajan struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 620c630d18aSVasanthakumar Thiagarajan u32 request = scat_req->req; 621c630d18aSVasanthakumar Thiagarajan int status = 0; 622c630d18aSVasanthakumar Thiagarajan 623c630d18aSVasanthakumar Thiagarajan if (!scat_req->len) 624c630d18aSVasanthakumar Thiagarajan return -EINVAL; 625c630d18aSVasanthakumar Thiagarajan 626c630d18aSVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_SCATTER, 627c630d18aSVasanthakumar Thiagarajan "hif-scatter: total len: %d scatter entries: %d\n", 628c630d18aSVasanthakumar Thiagarajan scat_req->len, scat_req->scat_entries); 629c630d18aSVasanthakumar Thiagarajan 630861dd058SVasanthakumar Thiagarajan if (request & HIF_SYNCHRONOUS) 631d4df7890SVasanthakumar Thiagarajan status = ath6kl_sdio_scat_rw(ar_sdio, scat_req->busrequest); 632861dd058SVasanthakumar Thiagarajan else { 633151bd30bSVasanthakumar Thiagarajan spin_lock_bh(&ar_sdio->wr_async_lock); 634d4df7890SVasanthakumar Thiagarajan list_add_tail(&scat_req->busrequest->list, &ar_sdio->wr_asyncq); 635151bd30bSVasanthakumar Thiagarajan spin_unlock_bh(&ar_sdio->wr_async_lock); 636c630d18aSVasanthakumar Thiagarajan queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work); 637c630d18aSVasanthakumar Thiagarajan } 638c630d18aSVasanthakumar Thiagarajan 639c630d18aSVasanthakumar Thiagarajan return status; 640c630d18aSVasanthakumar Thiagarajan } 641c630d18aSVasanthakumar Thiagarajan 64218a0f93eSVasanthakumar Thiagarajan /* clean up scatter support */ 64318a0f93eSVasanthakumar Thiagarajan static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar) 64418a0f93eSVasanthakumar Thiagarajan { 64518a0f93eSVasanthakumar Thiagarajan struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 64618a0f93eSVasanthakumar Thiagarajan struct hif_scatter_req *s_req, *tmp_req; 64718a0f93eSVasanthakumar Thiagarajan 64818a0f93eSVasanthakumar Thiagarajan /* empty the free list */ 649151bd30bSVasanthakumar Thiagarajan spin_lock_bh(&ar_sdio->scat_lock); 65018a0f93eSVasanthakumar Thiagarajan list_for_each_entry_safe(s_req, tmp_req, &ar_sdio->scat_req, list) { 65118a0f93eSVasanthakumar Thiagarajan list_del(&s_req->list); 652151bd30bSVasanthakumar Thiagarajan spin_unlock_bh(&ar_sdio->scat_lock); 65318a0f93eSVasanthakumar Thiagarajan 65418a0f93eSVasanthakumar Thiagarajan if (s_req->busrequest) 65518a0f93eSVasanthakumar Thiagarajan ath6kl_sdio_free_bus_req(ar_sdio, s_req->busrequest); 65618a0f93eSVasanthakumar Thiagarajan kfree(s_req->virt_dma_buf); 65718a0f93eSVasanthakumar Thiagarajan kfree(s_req->sgentries); 65818a0f93eSVasanthakumar Thiagarajan kfree(s_req); 65918a0f93eSVasanthakumar Thiagarajan 660151bd30bSVasanthakumar Thiagarajan spin_lock_bh(&ar_sdio->scat_lock); 66118a0f93eSVasanthakumar Thiagarajan } 662151bd30bSVasanthakumar Thiagarajan spin_unlock_bh(&ar_sdio->scat_lock); 66318a0f93eSVasanthakumar Thiagarajan } 66418a0f93eSVasanthakumar Thiagarajan 66518a0f93eSVasanthakumar Thiagarajan /* setup of HIF scatter resources */ 66650745af7SVasanthakumar Thiagarajan static int ath6kl_sdio_enable_scatter(struct ath6kl *ar) 66718a0f93eSVasanthakumar Thiagarajan { 66818a0f93eSVasanthakumar Thiagarajan struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 66950745af7SVasanthakumar Thiagarajan struct htc_target *target = ar->htc_target; 670cfeab10bSVasanthakumar Thiagarajan int ret; 671cfeab10bSVasanthakumar Thiagarajan bool virt_scat = false; 67218a0f93eSVasanthakumar Thiagarajan 67318a0f93eSVasanthakumar Thiagarajan /* check if host supports scatter and it meets our requirements */ 67418a0f93eSVasanthakumar Thiagarajan if (ar_sdio->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) { 675cfeab10bSVasanthakumar Thiagarajan ath6kl_err("host only supports scatter of :%d entries, need: %d\n", 67618a0f93eSVasanthakumar Thiagarajan ar_sdio->func->card->host->max_segs, 67718a0f93eSVasanthakumar Thiagarajan MAX_SCATTER_ENTRIES_PER_REQ); 678cfeab10bSVasanthakumar Thiagarajan virt_scat = true; 67918a0f93eSVasanthakumar Thiagarajan } 68018a0f93eSVasanthakumar Thiagarajan 681cfeab10bSVasanthakumar Thiagarajan if (!virt_scat) { 68218a0f93eSVasanthakumar Thiagarajan ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio, 68318a0f93eSVasanthakumar Thiagarajan MAX_SCATTER_ENTRIES_PER_REQ, 684cfeab10bSVasanthakumar Thiagarajan MAX_SCATTER_REQUESTS, virt_scat); 685cfeab10bSVasanthakumar Thiagarajan 686cfeab10bSVasanthakumar Thiagarajan if (!ret) { 6873ef987beSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 6883ef987beSKalle Valo "hif-scatter enabled requests %d entries %d\n", 689cfeab10bSVasanthakumar Thiagarajan MAX_SCATTER_REQUESTS, 690cfeab10bSVasanthakumar Thiagarajan MAX_SCATTER_ENTRIES_PER_REQ); 691cfeab10bSVasanthakumar Thiagarajan 69250745af7SVasanthakumar Thiagarajan target->max_scat_entries = MAX_SCATTER_ENTRIES_PER_REQ; 69350745af7SVasanthakumar Thiagarajan target->max_xfer_szper_scatreq = 694cfeab10bSVasanthakumar Thiagarajan MAX_SCATTER_REQ_TRANSFER_SIZE; 695cfeab10bSVasanthakumar Thiagarajan } else { 696cfeab10bSVasanthakumar Thiagarajan ath6kl_sdio_cleanup_scatter(ar); 697cfeab10bSVasanthakumar Thiagarajan ath6kl_warn("hif scatter resource setup failed, trying virtual scatter method\n"); 698cfeab10bSVasanthakumar Thiagarajan } 699cfeab10bSVasanthakumar Thiagarajan } 700cfeab10bSVasanthakumar Thiagarajan 701cfeab10bSVasanthakumar Thiagarajan if (virt_scat || ret) { 702cfeab10bSVasanthakumar Thiagarajan ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio, 703cfeab10bSVasanthakumar Thiagarajan ATH6KL_SCATTER_ENTRIES_PER_REQ, 704cfeab10bSVasanthakumar Thiagarajan ATH6KL_SCATTER_REQS, virt_scat); 705cfeab10bSVasanthakumar Thiagarajan 70618a0f93eSVasanthakumar Thiagarajan if (ret) { 707cfeab10bSVasanthakumar Thiagarajan ath6kl_err("failed to alloc virtual scatter resources !\n"); 70818a0f93eSVasanthakumar Thiagarajan ath6kl_sdio_cleanup_scatter(ar); 70918a0f93eSVasanthakumar Thiagarajan return ret; 71018a0f93eSVasanthakumar Thiagarajan } 71118a0f93eSVasanthakumar Thiagarajan 7123ef987beSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 7133ef987beSKalle Valo "virtual scatter enabled requests %d entries %d\n", 714cfeab10bSVasanthakumar Thiagarajan ATH6KL_SCATTER_REQS, ATH6KL_SCATTER_ENTRIES_PER_REQ); 715cfeab10bSVasanthakumar Thiagarajan 71650745af7SVasanthakumar Thiagarajan target->max_scat_entries = ATH6KL_SCATTER_ENTRIES_PER_REQ; 71750745af7SVasanthakumar Thiagarajan target->max_xfer_szper_scatreq = 718cfeab10bSVasanthakumar Thiagarajan ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER; 719cfeab10bSVasanthakumar Thiagarajan } 720cfeab10bSVasanthakumar Thiagarajan 72118a0f93eSVasanthakumar Thiagarajan return 0; 72218a0f93eSVasanthakumar Thiagarajan } 72318a0f93eSVasanthakumar Thiagarajan 724abcb344bSKalle Valo static int ath6kl_sdio_suspend(struct ath6kl *ar) 725abcb344bSKalle Valo { 726abcb344bSKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 727abcb344bSKalle Valo struct sdio_func *func = ar_sdio->func; 728abcb344bSKalle Valo mmc_pm_flag_t flags; 729abcb344bSKalle Valo int ret; 730abcb344bSKalle Valo 731abcb344bSKalle Valo flags = sdio_get_host_pm_caps(func); 732abcb344bSKalle Valo 73317380859SSam Leffler if (!(flags & MMC_PM_KEEP_POWER)) { 734abcb344bSKalle Valo /* as host doesn't support keep power we need to bail out */ 735f7325b85SKalle Valo ath6kl_dbg(ATH6KL_DBG_SDIO, 736f7325b85SKalle Valo "func %d doesn't support MMC_PM_KEEP_POWER\n", 737f7325b85SKalle Valo func->num); 738abcb344bSKalle Valo return -EINVAL; 73917380859SSam Leffler } 740abcb344bSKalle Valo 741abcb344bSKalle Valo ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); 742abcb344bSKalle Valo if (ret) { 743abcb344bSKalle Valo printk(KERN_ERR "ath6kl: set sdio pm flags failed: %d\n", 744abcb344bSKalle Valo ret); 745abcb344bSKalle Valo return ret; 746abcb344bSKalle Valo } 747abcb344bSKalle Valo 748abcb344bSKalle Valo ath6kl_deep_sleep_enable(ar); 749abcb344bSKalle Valo 750abcb344bSKalle Valo return 0; 751abcb344bSKalle Valo } 752abcb344bSKalle Valo 753aa6cffc1SChilam Ng static int ath6kl_sdio_resume(struct ath6kl *ar) 754aa6cffc1SChilam Ng { 755aa6cffc1SChilam Ng if (ar->wmi->pwr_mode != ar->wmi->saved_pwr_mode) { 756334234b5SVasanthakumar Thiagarajan if (ath6kl_wmi_powermode_cmd(ar->wmi, 0, 757aa6cffc1SChilam Ng ar->wmi->saved_pwr_mode) != 0) 758aa6cffc1SChilam Ng ath6kl_warn("ath6kl_sdio_resume: " 759aa6cffc1SChilam Ng "wmi_powermode_cmd failed\n"); 760aa6cffc1SChilam Ng } 761aa6cffc1SChilam Ng 762aa6cffc1SChilam Ng return 0; 763aa6cffc1SChilam Ng } 764aa6cffc1SChilam Ng 765bdcd8170SKalle Valo static const struct ath6kl_hif_ops ath6kl_sdio_ops = { 766bdcd8170SKalle Valo .read_write_sync = ath6kl_sdio_read_write_sync, 767bdcd8170SKalle Valo .write_async = ath6kl_sdio_write_async, 768bdcd8170SKalle Valo .irq_enable = ath6kl_sdio_irq_enable, 769bdcd8170SKalle Valo .irq_disable = ath6kl_sdio_irq_disable, 770bdcd8170SKalle Valo .scatter_req_get = ath6kl_sdio_scatter_req_get, 771bdcd8170SKalle Valo .scatter_req_add = ath6kl_sdio_scatter_req_add, 772bdcd8170SKalle Valo .enable_scatter = ath6kl_sdio_enable_scatter, 773f74a7361SVasanthakumar Thiagarajan .scat_req_rw = ath6kl_sdio_async_rw_scatter, 774bdcd8170SKalle Valo .cleanup_scatter = ath6kl_sdio_cleanup_scatter, 775abcb344bSKalle Valo .suspend = ath6kl_sdio_suspend, 776aa6cffc1SChilam Ng .resume = ath6kl_sdio_resume, 777b2e75698SKalle Valo .power_on = ath6kl_sdio_power_on, 778b2e75698SKalle Valo .power_off = ath6kl_sdio_power_off, 779bdcd8170SKalle Valo }; 780bdcd8170SKalle Valo 781bdcd8170SKalle Valo static int ath6kl_sdio_probe(struct sdio_func *func, 782bdcd8170SKalle Valo const struct sdio_device_id *id) 783bdcd8170SKalle Valo { 784bdcd8170SKalle Valo int ret; 785bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 786bdcd8170SKalle Valo struct ath6kl *ar; 787bdcd8170SKalle Valo int count; 788bdcd8170SKalle Valo 7893ef987beSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 7903ef987beSKalle Valo "sdio new func %d vendor 0x%x device 0x%x block 0x%x/0x%x\n", 791f7325b85SKalle Valo func->num, func->vendor, func->device, 792f7325b85SKalle Valo func->max_blksize, func->cur_blksize); 793bdcd8170SKalle Valo 794bdcd8170SKalle Valo ar_sdio = kzalloc(sizeof(struct ath6kl_sdio), GFP_KERNEL); 795bdcd8170SKalle Valo if (!ar_sdio) 796bdcd8170SKalle Valo return -ENOMEM; 797bdcd8170SKalle Valo 798bdcd8170SKalle Valo ar_sdio->dma_buffer = kzalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL); 799bdcd8170SKalle Valo if (!ar_sdio->dma_buffer) { 800bdcd8170SKalle Valo ret = -ENOMEM; 801bdcd8170SKalle Valo goto err_hif; 802bdcd8170SKalle Valo } 803bdcd8170SKalle Valo 804bdcd8170SKalle Valo ar_sdio->func = func; 805bdcd8170SKalle Valo sdio_set_drvdata(func, ar_sdio); 806bdcd8170SKalle Valo 807bdcd8170SKalle Valo ar_sdio->id = id; 808bdcd8170SKalle Valo ar_sdio->is_disabled = true; 809bdcd8170SKalle Valo 810bdcd8170SKalle Valo spin_lock_init(&ar_sdio->lock); 811bdcd8170SKalle Valo spin_lock_init(&ar_sdio->scat_lock); 812bdcd8170SKalle Valo spin_lock_init(&ar_sdio->wr_async_lock); 813bdcd8170SKalle Valo 814bdcd8170SKalle Valo INIT_LIST_HEAD(&ar_sdio->scat_req); 815bdcd8170SKalle Valo INIT_LIST_HEAD(&ar_sdio->bus_req_freeq); 816bdcd8170SKalle Valo INIT_LIST_HEAD(&ar_sdio->wr_asyncq); 817bdcd8170SKalle Valo 818bdcd8170SKalle Valo INIT_WORK(&ar_sdio->wr_async_work, ath6kl_sdio_write_async_work); 819bdcd8170SKalle Valo 820bdcd8170SKalle Valo for (count = 0; count < BUS_REQUEST_MAX_NUM; count++) 821bdcd8170SKalle Valo ath6kl_sdio_free_bus_req(ar_sdio, &ar_sdio->bus_req[count]); 822bdcd8170SKalle Valo 823bdcd8170SKalle Valo ar = ath6kl_core_alloc(&ar_sdio->func->dev); 824bdcd8170SKalle Valo if (!ar) { 825bdcd8170SKalle Valo ath6kl_err("Failed to alloc ath6kl core\n"); 826bdcd8170SKalle Valo ret = -ENOMEM; 827bdcd8170SKalle Valo goto err_dma; 828bdcd8170SKalle Valo } 829bdcd8170SKalle Valo 830bdcd8170SKalle Valo ar_sdio->ar = ar; 831bdcd8170SKalle Valo ar->hif_priv = ar_sdio; 832bdcd8170SKalle Valo ar->hif_ops = &ath6kl_sdio_ops; 833bdcd8170SKalle Valo 834bdcd8170SKalle Valo ath6kl_sdio_set_mbox_info(ar); 835bdcd8170SKalle Valo 836bdcd8170SKalle Valo sdio_claim_host(func); 837bdcd8170SKalle Valo 838bdcd8170SKalle Valo if ((ar_sdio->id->device & MANUFACTURER_ID_ATH6KL_BASE_MASK) >= 839bdcd8170SKalle Valo MANUFACTURER_ID_AR6003_BASE) { 840bdcd8170SKalle Valo /* enable 4-bit ASYNC interrupt on AR6003 or later */ 841bdcd8170SKalle Valo ret = ath6kl_sdio_func0_cmd52_wr_byte(func->card, 842bdcd8170SKalle Valo CCCR_SDIO_IRQ_MODE_REG, 843bdcd8170SKalle Valo SDIO_IRQ_MODE_ASYNC_4BIT_IRQ); 844bdcd8170SKalle Valo if (ret) { 845bdcd8170SKalle Valo ath6kl_err("Failed to enable 4-bit async irq mode %d\n", 846bdcd8170SKalle Valo ret); 847bdcd8170SKalle Valo sdio_release_host(func); 8488dafb70eSVasanthakumar Thiagarajan goto err_core_alloc; 849bdcd8170SKalle Valo } 850bdcd8170SKalle Valo 8513ef987beSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "4-bit async irq mode enabled\n"); 852bdcd8170SKalle Valo } 853bdcd8170SKalle Valo 854bdcd8170SKalle Valo /* give us some time to enable, in ms */ 855bdcd8170SKalle Valo func->enable_timeout = 100; 856bdcd8170SKalle Valo 857bdcd8170SKalle Valo sdio_release_host(func); 858bdcd8170SKalle Valo 859bdcd8170SKalle Valo sdio_claim_host(func); 860bdcd8170SKalle Valo 861bdcd8170SKalle Valo ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE); 862bdcd8170SKalle Valo if (ret) { 863bdcd8170SKalle Valo ath6kl_err("Set sdio block size %d failed: %d)\n", 864bdcd8170SKalle Valo HIF_MBOX_BLOCK_SIZE, ret); 865bdcd8170SKalle Valo sdio_release_host(func); 866b2e75698SKalle Valo goto err_hif; 867bdcd8170SKalle Valo } 868bdcd8170SKalle Valo 869bdcd8170SKalle Valo sdio_release_host(func); 870bdcd8170SKalle Valo 871bdcd8170SKalle Valo ret = ath6kl_core_init(ar); 872bdcd8170SKalle Valo if (ret) { 873bdcd8170SKalle Valo ath6kl_err("Failed to init ath6kl core\n"); 874b2e75698SKalle Valo goto err_hif; 875bdcd8170SKalle Valo } 876bdcd8170SKalle Valo 877bdcd8170SKalle Valo return ret; 878bdcd8170SKalle Valo 8798dafb70eSVasanthakumar Thiagarajan err_core_alloc: 8808dafb70eSVasanthakumar Thiagarajan ath6kl_core_free(ar_sdio->ar); 881bdcd8170SKalle Valo err_dma: 882bdcd8170SKalle Valo kfree(ar_sdio->dma_buffer); 883bdcd8170SKalle Valo err_hif: 884bdcd8170SKalle Valo kfree(ar_sdio); 885bdcd8170SKalle Valo 886bdcd8170SKalle Valo return ret; 887bdcd8170SKalle Valo } 888bdcd8170SKalle Valo 889bdcd8170SKalle Valo static void ath6kl_sdio_remove(struct sdio_func *func) 890bdcd8170SKalle Valo { 891bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 892bdcd8170SKalle Valo 8933ef987beSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 8943ef987beSKalle Valo "sdio removed func %d vendor 0x%x device 0x%x\n", 895f7325b85SKalle Valo func->num, func->vendor, func->device); 896f7325b85SKalle Valo 897bdcd8170SKalle Valo ar_sdio = sdio_get_drvdata(func); 898bdcd8170SKalle Valo 899bdcd8170SKalle Valo ath6kl_stop_txrx(ar_sdio->ar); 900bdcd8170SKalle Valo cancel_work_sync(&ar_sdio->wr_async_work); 901bdcd8170SKalle Valo 9026db8fa53SVasanthakumar Thiagarajan ath6kl_core_cleanup(ar_sdio->ar); 903bdcd8170SKalle Valo 904bdcd8170SKalle Valo kfree(ar_sdio->dma_buffer); 905bdcd8170SKalle Valo kfree(ar_sdio); 906bdcd8170SKalle Valo } 907bdcd8170SKalle Valo 908bdcd8170SKalle Valo static const struct sdio_device_id ath6kl_sdio_devices[] = { 909bdcd8170SKalle Valo {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))}, 910bdcd8170SKalle Valo {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))}, 911bdcd8170SKalle Valo {}, 912bdcd8170SKalle Valo }; 913bdcd8170SKalle Valo 914bdcd8170SKalle Valo MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices); 915bdcd8170SKalle Valo 916bdcd8170SKalle Valo static struct sdio_driver ath6kl_sdio_driver = { 917bdcd8170SKalle Valo .name = "ath6kl_sdio", 918bdcd8170SKalle Valo .id_table = ath6kl_sdio_devices, 919bdcd8170SKalle Valo .probe = ath6kl_sdio_probe, 920bdcd8170SKalle Valo .remove = ath6kl_sdio_remove, 921bdcd8170SKalle Valo }; 922bdcd8170SKalle Valo 923bdcd8170SKalle Valo static int __init ath6kl_sdio_init(void) 924bdcd8170SKalle Valo { 925bdcd8170SKalle Valo int ret; 926bdcd8170SKalle Valo 927bdcd8170SKalle Valo ret = sdio_register_driver(&ath6kl_sdio_driver); 928bdcd8170SKalle Valo if (ret) 929bdcd8170SKalle Valo ath6kl_err("sdio driver registration failed: %d\n", ret); 930bdcd8170SKalle Valo 931bdcd8170SKalle Valo return ret; 932bdcd8170SKalle Valo } 933bdcd8170SKalle Valo 934bdcd8170SKalle Valo static void __exit ath6kl_sdio_exit(void) 935bdcd8170SKalle Valo { 936bdcd8170SKalle Valo sdio_unregister_driver(&ath6kl_sdio_driver); 937bdcd8170SKalle Valo } 938bdcd8170SKalle Valo 939bdcd8170SKalle Valo module_init(ath6kl_sdio_init); 940bdcd8170SKalle Valo module_exit(ath6kl_sdio_exit); 941bdcd8170SKalle Valo 942bdcd8170SKalle Valo MODULE_AUTHOR("Atheros Communications, Inc."); 943bdcd8170SKalle Valo MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices"); 944bdcd8170SKalle Valo MODULE_LICENSE("Dual BSD/GPL"); 945bdcd8170SKalle Valo 946bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_OTP_FILE); 947bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE); 948bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE); 949bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE); 950bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE); 951bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_OTP_FILE); 952bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE); 953bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE); 954bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE); 955bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE); 956