1bdcd8170SKalle Valo /* 2bdcd8170SKalle Valo * Copyright (c) 2004-2011 Atheros Communications Inc. 3bdcd8170SKalle Valo * 4bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 5bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 6bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 7bdcd8170SKalle Valo * 8bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15bdcd8170SKalle Valo */ 16bdcd8170SKalle Valo 17bdcd8170SKalle Valo #include <linux/mmc/card.h> 18bdcd8170SKalle Valo #include <linux/mmc/mmc.h> 19bdcd8170SKalle Valo #include <linux/mmc/host.h> 20bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h> 21bdcd8170SKalle Valo #include <linux/mmc/sdio_ids.h> 22bdcd8170SKalle Valo #include <linux/mmc/sdio.h> 23bdcd8170SKalle Valo #include <linux/mmc/sd.h> 24bdcd8170SKalle Valo #include "htc_hif.h" 25bdcd8170SKalle Valo #include "hif-ops.h" 26bdcd8170SKalle Valo #include "target.h" 27bdcd8170SKalle Valo #include "debug.h" 28bdcd8170SKalle Valo 29bdcd8170SKalle Valo struct ath6kl_sdio { 30bdcd8170SKalle Valo struct sdio_func *func; 31bdcd8170SKalle Valo 32bdcd8170SKalle Valo spinlock_t lock; 33bdcd8170SKalle Valo 34bdcd8170SKalle Valo /* free list */ 35bdcd8170SKalle Valo struct list_head bus_req_freeq; 36bdcd8170SKalle Valo 37bdcd8170SKalle Valo /* available bus requests */ 38bdcd8170SKalle Valo struct bus_request bus_req[BUS_REQUEST_MAX_NUM]; 39bdcd8170SKalle Valo 40bdcd8170SKalle Valo struct ath6kl *ar; 41bdcd8170SKalle Valo u8 *dma_buffer; 42bdcd8170SKalle Valo 43bdcd8170SKalle Valo /* scatter request list head */ 44bdcd8170SKalle Valo struct list_head scat_req; 45bdcd8170SKalle Valo 46bdcd8170SKalle Valo spinlock_t scat_lock; 47bdcd8170SKalle Valo bool is_disabled; 48bdcd8170SKalle Valo atomic_t irq_handling; 49bdcd8170SKalle Valo const struct sdio_device_id *id; 50bdcd8170SKalle Valo struct work_struct wr_async_work; 51bdcd8170SKalle Valo struct list_head wr_asyncq; 52bdcd8170SKalle Valo spinlock_t wr_async_lock; 53bdcd8170SKalle Valo }; 54bdcd8170SKalle Valo 55bdcd8170SKalle Valo #define CMD53_ARG_READ 0 56bdcd8170SKalle Valo #define CMD53_ARG_WRITE 1 57bdcd8170SKalle Valo #define CMD53_ARG_BLOCK_BASIS 1 58bdcd8170SKalle Valo #define CMD53_ARG_FIXED_ADDRESS 0 59bdcd8170SKalle Valo #define CMD53_ARG_INCR_ADDRESS 1 60bdcd8170SKalle Valo 61bdcd8170SKalle Valo static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar) 62bdcd8170SKalle Valo { 63bdcd8170SKalle Valo return ar->hif_priv; 64bdcd8170SKalle Valo } 65bdcd8170SKalle Valo 66bdcd8170SKalle Valo /* 67bdcd8170SKalle Valo * Macro to check if DMA buffer is WORD-aligned and DMA-able. 68bdcd8170SKalle Valo * Most host controllers assume the buffer is DMA'able and will 69bdcd8170SKalle Valo * bug-check otherwise (i.e. buffers on the stack). virt_addr_valid 70bdcd8170SKalle Valo * check fails on stack memory. 71bdcd8170SKalle Valo */ 72bdcd8170SKalle Valo static inline bool buf_needs_bounce(u8 *buf) 73bdcd8170SKalle Valo { 74bdcd8170SKalle Valo return ((unsigned long) buf & 0x3) || !virt_addr_valid(buf); 75bdcd8170SKalle Valo } 76bdcd8170SKalle Valo 77bdcd8170SKalle Valo static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar) 78bdcd8170SKalle Valo { 79bdcd8170SKalle Valo struct ath6kl_mbox_info *mbox_info = &ar->mbox_info; 80bdcd8170SKalle Valo 81bdcd8170SKalle Valo /* EP1 has an extended range */ 82bdcd8170SKalle Valo mbox_info->htc_addr = HIF_MBOX_BASE_ADDR; 83bdcd8170SKalle Valo mbox_info->htc_ext_addr = HIF_MBOX0_EXT_BASE_ADDR; 84bdcd8170SKalle Valo mbox_info->htc_ext_sz = HIF_MBOX0_EXT_WIDTH; 85bdcd8170SKalle Valo mbox_info->block_size = HIF_MBOX_BLOCK_SIZE; 86bdcd8170SKalle Valo mbox_info->gmbox_addr = HIF_GMBOX_BASE_ADDR; 87bdcd8170SKalle Valo mbox_info->gmbox_sz = HIF_GMBOX_WIDTH; 88bdcd8170SKalle Valo } 89bdcd8170SKalle Valo 90bdcd8170SKalle Valo static inline void ath6kl_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func, 91bdcd8170SKalle Valo u8 mode, u8 opcode, u32 addr, 92bdcd8170SKalle Valo u16 blksz) 93bdcd8170SKalle Valo { 94bdcd8170SKalle Valo *arg = (((rw & 1) << 31) | 95bdcd8170SKalle Valo ((func & 0x7) << 28) | 96bdcd8170SKalle Valo ((mode & 1) << 27) | 97bdcd8170SKalle Valo ((opcode & 1) << 26) | 98bdcd8170SKalle Valo ((addr & 0x1FFFF) << 9) | 99bdcd8170SKalle Valo (blksz & 0x1FF)); 100bdcd8170SKalle Valo } 101bdcd8170SKalle Valo 102bdcd8170SKalle Valo static inline void ath6kl_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw, 103bdcd8170SKalle Valo unsigned int address, 104bdcd8170SKalle Valo unsigned char val) 105bdcd8170SKalle Valo { 106bdcd8170SKalle Valo const u8 func = 0; 107bdcd8170SKalle Valo 108bdcd8170SKalle Valo *arg = ((write & 1) << 31) | 109bdcd8170SKalle Valo ((func & 0x7) << 28) | 110bdcd8170SKalle Valo ((raw & 1) << 27) | 111bdcd8170SKalle Valo (1 << 26) | 112bdcd8170SKalle Valo ((address & 0x1FFFF) << 9) | 113bdcd8170SKalle Valo (1 << 8) | 114bdcd8170SKalle Valo (val & 0xFF); 115bdcd8170SKalle Valo } 116bdcd8170SKalle Valo 117bdcd8170SKalle Valo static int ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card, 118bdcd8170SKalle Valo unsigned int address, 119bdcd8170SKalle Valo unsigned char byte) 120bdcd8170SKalle Valo { 121bdcd8170SKalle Valo struct mmc_command io_cmd; 122bdcd8170SKalle Valo 123bdcd8170SKalle Valo memset(&io_cmd, 0, sizeof(io_cmd)); 124bdcd8170SKalle Valo ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte); 125bdcd8170SKalle Valo io_cmd.opcode = SD_IO_RW_DIRECT; 126bdcd8170SKalle Valo io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC; 127bdcd8170SKalle Valo 128bdcd8170SKalle Valo return mmc_wait_for_cmd(card->host, &io_cmd, 0); 129bdcd8170SKalle Valo } 130bdcd8170SKalle Valo 131bdcd8170SKalle Valo static struct bus_request *ath6kl_sdio_alloc_busreq(struct ath6kl_sdio *ar_sdio) 132bdcd8170SKalle Valo { 133bdcd8170SKalle Valo struct bus_request *bus_req; 134bdcd8170SKalle Valo unsigned long flag; 135bdcd8170SKalle Valo 136bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->lock, flag); 137bdcd8170SKalle Valo 138bdcd8170SKalle Valo if (list_empty(&ar_sdio->bus_req_freeq)) { 139bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->lock, flag); 140bdcd8170SKalle Valo return NULL; 141bdcd8170SKalle Valo } 142bdcd8170SKalle Valo 143bdcd8170SKalle Valo bus_req = list_first_entry(&ar_sdio->bus_req_freeq, 144bdcd8170SKalle Valo struct bus_request, list); 145bdcd8170SKalle Valo list_del(&bus_req->list); 146bdcd8170SKalle Valo 147bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->lock, flag); 148bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req); 149bdcd8170SKalle Valo 150bdcd8170SKalle Valo return bus_req; 151bdcd8170SKalle Valo } 152bdcd8170SKalle Valo 153bdcd8170SKalle Valo static void ath6kl_sdio_free_bus_req(struct ath6kl_sdio *ar_sdio, 154bdcd8170SKalle Valo struct bus_request *bus_req) 155bdcd8170SKalle Valo { 156bdcd8170SKalle Valo unsigned long flag; 157bdcd8170SKalle Valo 158bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req); 159bdcd8170SKalle Valo 160bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->lock, flag); 161bdcd8170SKalle Valo list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq); 162bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->lock, flag); 163bdcd8170SKalle Valo } 164bdcd8170SKalle Valo 165bdcd8170SKalle Valo static void ath6kl_sdio_setup_scat_data(struct hif_scatter_req *scat_req, 166bdcd8170SKalle Valo struct mmc_data *data) 167bdcd8170SKalle Valo { 168bdcd8170SKalle Valo struct scatterlist *sg; 169bdcd8170SKalle Valo int i; 170bdcd8170SKalle Valo 171bdcd8170SKalle Valo data->blksz = HIF_MBOX_BLOCK_SIZE; 172bdcd8170SKalle Valo data->blocks = scat_req->len / HIF_MBOX_BLOCK_SIZE; 173bdcd8170SKalle Valo 174bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, 175bdcd8170SKalle Valo "hif-scatter: (%s) addr: 0x%X, (block len: %d, block count: %d) , (tot:%d,sg:%d)\n", 176bdcd8170SKalle Valo (scat_req->req & HIF_WRITE) ? "WR" : "RD", scat_req->addr, 177bdcd8170SKalle Valo data->blksz, data->blocks, scat_req->len, 178bdcd8170SKalle Valo scat_req->scat_entries); 179bdcd8170SKalle Valo 180bdcd8170SKalle Valo data->flags = (scat_req->req & HIF_WRITE) ? MMC_DATA_WRITE : 181bdcd8170SKalle Valo MMC_DATA_READ; 182bdcd8170SKalle Valo 183bdcd8170SKalle Valo /* fill SG entries */ 184d4df7890SVasanthakumar Thiagarajan sg = scat_req->sgentries; 185bdcd8170SKalle Valo sg_init_table(sg, scat_req->scat_entries); 186bdcd8170SKalle Valo 187bdcd8170SKalle Valo /* assemble SG list */ 188bdcd8170SKalle Valo for (i = 0; i < scat_req->scat_entries; i++, sg++) { 189bdcd8170SKalle Valo if ((unsigned long)scat_req->scat_list[i].buf & 0x3) 190bdcd8170SKalle Valo /* 191bdcd8170SKalle Valo * Some scatter engines can handle unaligned 192bdcd8170SKalle Valo * buffers, print this as informational only. 193bdcd8170SKalle Valo */ 194bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, 195bdcd8170SKalle Valo "(%s) scatter buffer is unaligned 0x%p\n", 196bdcd8170SKalle Valo scat_req->req & HIF_WRITE ? "WR" : "RD", 197bdcd8170SKalle Valo scat_req->scat_list[i].buf); 198bdcd8170SKalle Valo 199bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n", 200bdcd8170SKalle Valo i, scat_req->scat_list[i].buf, 201bdcd8170SKalle Valo scat_req->scat_list[i].len); 202bdcd8170SKalle Valo 203bdcd8170SKalle Valo sg_set_buf(sg, scat_req->scat_list[i].buf, 204bdcd8170SKalle Valo scat_req->scat_list[i].len); 205bdcd8170SKalle Valo } 206bdcd8170SKalle Valo 207bdcd8170SKalle Valo /* set scatter-gather table for request */ 208d4df7890SVasanthakumar Thiagarajan data->sg = scat_req->sgentries; 209bdcd8170SKalle Valo data->sg_len = scat_req->scat_entries; 210bdcd8170SKalle Valo } 211bdcd8170SKalle Valo 212bdcd8170SKalle Valo static int ath6kl_sdio_scat_rw(struct ath6kl_sdio *ar_sdio, 213bdcd8170SKalle Valo struct bus_request *req) 214bdcd8170SKalle Valo { 215bdcd8170SKalle Valo struct mmc_request mmc_req; 216bdcd8170SKalle Valo struct mmc_command cmd; 217bdcd8170SKalle Valo struct mmc_data data; 218bdcd8170SKalle Valo struct hif_scatter_req *scat_req; 219bdcd8170SKalle Valo u8 opcode, rw; 220bdcd8170SKalle Valo int status; 221bdcd8170SKalle Valo 222bdcd8170SKalle Valo scat_req = req->scat_req; 223bdcd8170SKalle Valo 224bdcd8170SKalle Valo memset(&mmc_req, 0, sizeof(struct mmc_request)); 225bdcd8170SKalle Valo memset(&cmd, 0, sizeof(struct mmc_command)); 226bdcd8170SKalle Valo memset(&data, 0, sizeof(struct mmc_data)); 227bdcd8170SKalle Valo 228d4df7890SVasanthakumar Thiagarajan ath6kl_sdio_setup_scat_data(scat_req, &data); 229bdcd8170SKalle Valo 230bdcd8170SKalle Valo opcode = (scat_req->req & HIF_FIXED_ADDRESS) ? 231bdcd8170SKalle Valo CMD53_ARG_FIXED_ADDRESS : CMD53_ARG_INCR_ADDRESS; 232bdcd8170SKalle Valo 233bdcd8170SKalle Valo rw = (scat_req->req & HIF_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ; 234bdcd8170SKalle Valo 235bdcd8170SKalle Valo /* Fixup the address so that the last byte will fall on MBOX EOM */ 236bdcd8170SKalle Valo if (scat_req->req & HIF_WRITE) { 237bdcd8170SKalle Valo if (scat_req->addr == HIF_MBOX_BASE_ADDR) 238bdcd8170SKalle Valo scat_req->addr += HIF_MBOX_WIDTH - scat_req->len; 239bdcd8170SKalle Valo else 240bdcd8170SKalle Valo /* Uses extended address range */ 241bdcd8170SKalle Valo scat_req->addr += HIF_MBOX0_EXT_WIDTH - scat_req->len; 242bdcd8170SKalle Valo } 243bdcd8170SKalle Valo 244bdcd8170SKalle Valo /* set command argument */ 245bdcd8170SKalle Valo ath6kl_sdio_set_cmd53_arg(&cmd.arg, rw, ar_sdio->func->num, 246bdcd8170SKalle Valo CMD53_ARG_BLOCK_BASIS, opcode, scat_req->addr, 247bdcd8170SKalle Valo data.blocks); 248bdcd8170SKalle Valo 249bdcd8170SKalle Valo cmd.opcode = SD_IO_RW_EXTENDED; 250bdcd8170SKalle Valo cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC; 251bdcd8170SKalle Valo 252bdcd8170SKalle Valo mmc_req.cmd = &cmd; 253bdcd8170SKalle Valo mmc_req.data = &data; 254bdcd8170SKalle Valo 255bdcd8170SKalle Valo mmc_set_data_timeout(&data, ar_sdio->func->card); 256bdcd8170SKalle Valo /* synchronous call to process request */ 257bdcd8170SKalle Valo mmc_wait_for_req(ar_sdio->func->card->host, &mmc_req); 258bdcd8170SKalle Valo 259bdcd8170SKalle Valo status = cmd.error ? cmd.error : data.error; 260bdcd8170SKalle Valo scat_req->status = status; 261bdcd8170SKalle Valo 262bdcd8170SKalle Valo if (scat_req->status) 263bdcd8170SKalle Valo ath6kl_err("Scatter write request failed:%d\n", 264bdcd8170SKalle Valo scat_req->status); 265bdcd8170SKalle Valo 266bdcd8170SKalle Valo if (scat_req->req & HIF_ASYNCHRONOUS) 267e041c7f9SVasanthakumar Thiagarajan scat_req->complete(ar_sdio->ar->htc_target, scat_req); 268bdcd8170SKalle Valo 269bdcd8170SKalle Valo return status; 270bdcd8170SKalle Valo } 271bdcd8170SKalle Valo 2723df505adSVasanthakumar Thiagarajan static int ath6kl_sdio_alloc_prep_scat_req(struct ath6kl_sdio *ar_sdio, 2733df505adSVasanthakumar Thiagarajan int n_scat_entry, int n_scat_req, 2743df505adSVasanthakumar Thiagarajan bool virt_scat) 2753df505adSVasanthakumar Thiagarajan { 2763df505adSVasanthakumar Thiagarajan struct hif_scatter_req *s_req; 2773df505adSVasanthakumar Thiagarajan struct bus_request *bus_req; 278cfeab10bSVasanthakumar Thiagarajan int i, scat_req_sz, scat_list_sz, sg_sz, buf_sz; 279cfeab10bSVasanthakumar Thiagarajan u8 *virt_buf; 2803df505adSVasanthakumar Thiagarajan 2813df505adSVasanthakumar Thiagarajan scat_list_sz = (n_scat_entry - 1) * sizeof(struct hif_scatter_item); 2823df505adSVasanthakumar Thiagarajan scat_req_sz = sizeof(*s_req) + scat_list_sz; 2833df505adSVasanthakumar Thiagarajan 2843df505adSVasanthakumar Thiagarajan if (!virt_scat) 2853df505adSVasanthakumar Thiagarajan sg_sz = sizeof(struct scatterlist) * n_scat_entry; 286cfeab10bSVasanthakumar Thiagarajan else 287cfeab10bSVasanthakumar Thiagarajan buf_sz = 2 * L1_CACHE_BYTES + 288cfeab10bSVasanthakumar Thiagarajan ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER; 2893df505adSVasanthakumar Thiagarajan 2903df505adSVasanthakumar Thiagarajan for (i = 0; i < n_scat_req; i++) { 2913df505adSVasanthakumar Thiagarajan /* allocate the scatter request */ 2923df505adSVasanthakumar Thiagarajan s_req = kzalloc(scat_req_sz, GFP_KERNEL); 2933df505adSVasanthakumar Thiagarajan if (!s_req) 2943df505adSVasanthakumar Thiagarajan return -ENOMEM; 2953df505adSVasanthakumar Thiagarajan 296cfeab10bSVasanthakumar Thiagarajan if (virt_scat) { 297cfeab10bSVasanthakumar Thiagarajan virt_buf = kzalloc(buf_sz, GFP_KERNEL); 298cfeab10bSVasanthakumar Thiagarajan if (!virt_buf) { 299cfeab10bSVasanthakumar Thiagarajan kfree(s_req); 300cfeab10bSVasanthakumar Thiagarajan return -ENOMEM; 301cfeab10bSVasanthakumar Thiagarajan } 302cfeab10bSVasanthakumar Thiagarajan 303cfeab10bSVasanthakumar Thiagarajan s_req->virt_dma_buf = 304cfeab10bSVasanthakumar Thiagarajan (u8 *)L1_CACHE_ALIGN((unsigned long)virt_buf); 305cfeab10bSVasanthakumar Thiagarajan } else { 3063df505adSVasanthakumar Thiagarajan /* allocate sglist */ 3073df505adSVasanthakumar Thiagarajan s_req->sgentries = kzalloc(sg_sz, GFP_KERNEL); 3083df505adSVasanthakumar Thiagarajan 3093df505adSVasanthakumar Thiagarajan if (!s_req->sgentries) { 3103df505adSVasanthakumar Thiagarajan kfree(s_req); 3113df505adSVasanthakumar Thiagarajan return -ENOMEM; 3123df505adSVasanthakumar Thiagarajan } 3133df505adSVasanthakumar Thiagarajan } 3143df505adSVasanthakumar Thiagarajan 3153df505adSVasanthakumar Thiagarajan /* allocate a bus request for this scatter request */ 3163df505adSVasanthakumar Thiagarajan bus_req = ath6kl_sdio_alloc_busreq(ar_sdio); 3173df505adSVasanthakumar Thiagarajan if (!bus_req) { 3183df505adSVasanthakumar Thiagarajan kfree(s_req->sgentries); 319cfeab10bSVasanthakumar Thiagarajan kfree(s_req->virt_dma_buf); 3203df505adSVasanthakumar Thiagarajan kfree(s_req); 3213df505adSVasanthakumar Thiagarajan return -ENOMEM; 3223df505adSVasanthakumar Thiagarajan } 3233df505adSVasanthakumar Thiagarajan 3243df505adSVasanthakumar Thiagarajan /* assign the scatter request to this bus request */ 3253df505adSVasanthakumar Thiagarajan bus_req->scat_req = s_req; 3263df505adSVasanthakumar Thiagarajan s_req->busrequest = bus_req; 3273df505adSVasanthakumar Thiagarajan 3284a005c3eSVasanthakumar Thiagarajan s_req->virt_scat = virt_scat; 3294a005c3eSVasanthakumar Thiagarajan 3303df505adSVasanthakumar Thiagarajan /* add it to the scatter pool */ 3313df505adSVasanthakumar Thiagarajan hif_scatter_req_add(ar_sdio->ar, s_req); 3323df505adSVasanthakumar Thiagarajan } 3333df505adSVasanthakumar Thiagarajan 3343df505adSVasanthakumar Thiagarajan return 0; 3353df505adSVasanthakumar Thiagarajan } 3363df505adSVasanthakumar Thiagarajan 337bdcd8170SKalle Valo static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf, 338bdcd8170SKalle Valo u32 len, u32 request) 339bdcd8170SKalle Valo { 340bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 341bdcd8170SKalle Valo u8 *tbuf = NULL; 342bdcd8170SKalle Valo int ret; 343bdcd8170SKalle Valo bool bounced = false; 344bdcd8170SKalle Valo 345bdcd8170SKalle Valo if (request & HIF_BLOCK_BASIS) 346bdcd8170SKalle Valo len = round_down(len, HIF_MBOX_BLOCK_SIZE); 347bdcd8170SKalle Valo 348bdcd8170SKalle Valo if (buf_needs_bounce(buf)) { 349bdcd8170SKalle Valo if (!ar_sdio->dma_buffer) 350bdcd8170SKalle Valo return -ENOMEM; 351bdcd8170SKalle Valo tbuf = ar_sdio->dma_buffer; 352bdcd8170SKalle Valo memcpy(tbuf, buf, len); 353bdcd8170SKalle Valo bounced = true; 354bdcd8170SKalle Valo } else 355bdcd8170SKalle Valo tbuf = buf; 356bdcd8170SKalle Valo 357bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 358bdcd8170SKalle Valo if (request & HIF_WRITE) { 359bdcd8170SKalle Valo if (addr >= HIF_MBOX_BASE_ADDR && 360bdcd8170SKalle Valo addr <= HIF_MBOX_END_ADDR) 361bdcd8170SKalle Valo addr += (HIF_MBOX_WIDTH - len); 362bdcd8170SKalle Valo 363bdcd8170SKalle Valo if (addr == HIF_MBOX0_EXT_BASE_ADDR) 364bdcd8170SKalle Valo addr += HIF_MBOX0_EXT_WIDTH - len; 365bdcd8170SKalle Valo 366bdcd8170SKalle Valo if (request & HIF_FIXED_ADDRESS) 367bdcd8170SKalle Valo ret = sdio_writesb(ar_sdio->func, addr, tbuf, len); 368bdcd8170SKalle Valo else 369bdcd8170SKalle Valo ret = sdio_memcpy_toio(ar_sdio->func, addr, tbuf, len); 370bdcd8170SKalle Valo } else { 371bdcd8170SKalle Valo if (request & HIF_FIXED_ADDRESS) 372bdcd8170SKalle Valo ret = sdio_readsb(ar_sdio->func, tbuf, addr, len); 373bdcd8170SKalle Valo else 374bdcd8170SKalle Valo ret = sdio_memcpy_fromio(ar_sdio->func, tbuf, 375bdcd8170SKalle Valo addr, len); 376bdcd8170SKalle Valo if (bounced) 377bdcd8170SKalle Valo memcpy(buf, tbuf, len); 378bdcd8170SKalle Valo } 379bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 380bdcd8170SKalle Valo 381bdcd8170SKalle Valo return ret; 382bdcd8170SKalle Valo } 383bdcd8170SKalle Valo 384bdcd8170SKalle Valo static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio, 385bdcd8170SKalle Valo struct bus_request *req) 386bdcd8170SKalle Valo { 387bdcd8170SKalle Valo if (req->scat_req) 388bdcd8170SKalle Valo ath6kl_sdio_scat_rw(ar_sdio, req); 389bdcd8170SKalle Valo else { 390bdcd8170SKalle Valo void *context; 391bdcd8170SKalle Valo int status; 392bdcd8170SKalle Valo 393bdcd8170SKalle Valo status = ath6kl_sdio_read_write_sync(ar_sdio->ar, req->address, 394bdcd8170SKalle Valo req->buffer, req->length, 395bdcd8170SKalle Valo req->request); 396bdcd8170SKalle Valo context = req->packet; 397bdcd8170SKalle Valo ath6kl_sdio_free_bus_req(ar_sdio, req); 398bdcd8170SKalle Valo ath6kldev_rw_comp_handler(context, status); 399bdcd8170SKalle Valo } 400bdcd8170SKalle Valo } 401bdcd8170SKalle Valo 402bdcd8170SKalle Valo static void ath6kl_sdio_write_async_work(struct work_struct *work) 403bdcd8170SKalle Valo { 404bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 405bdcd8170SKalle Valo unsigned long flags; 406bdcd8170SKalle Valo struct bus_request *req, *tmp_req; 407bdcd8170SKalle Valo 408bdcd8170SKalle Valo ar_sdio = container_of(work, struct ath6kl_sdio, wr_async_work); 409bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 410bdcd8170SKalle Valo 411bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->wr_async_lock, flags); 412bdcd8170SKalle Valo list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) { 413bdcd8170SKalle Valo list_del(&req->list); 414bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags); 415bdcd8170SKalle Valo __ath6kl_sdio_write_async(ar_sdio, req); 416bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->wr_async_lock, flags); 417bdcd8170SKalle Valo } 418bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags); 419bdcd8170SKalle Valo 420bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 421bdcd8170SKalle Valo } 422bdcd8170SKalle Valo 423bdcd8170SKalle Valo static void ath6kl_sdio_irq_handler(struct sdio_func *func) 424bdcd8170SKalle Valo { 425bdcd8170SKalle Valo int status; 426bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 427bdcd8170SKalle Valo 428bdcd8170SKalle Valo ar_sdio = sdio_get_drvdata(func); 429bdcd8170SKalle Valo atomic_set(&ar_sdio->irq_handling, 1); 430bdcd8170SKalle Valo 431bdcd8170SKalle Valo /* 432bdcd8170SKalle Valo * Release the host during interrups so we can pick it back up when 433bdcd8170SKalle Valo * we process commands. 434bdcd8170SKalle Valo */ 435bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 436bdcd8170SKalle Valo 437bdcd8170SKalle Valo status = ath6kldev_intr_bh_handler(ar_sdio->ar); 438bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 439bdcd8170SKalle Valo atomic_set(&ar_sdio->irq_handling, 0); 440bdcd8170SKalle Valo WARN_ON(status && status != -ECANCELED); 441bdcd8170SKalle Valo } 442bdcd8170SKalle Valo 443bdcd8170SKalle Valo static int ath6kl_sdio_power_on(struct ath6kl_sdio *ar_sdio) 444bdcd8170SKalle Valo { 445bdcd8170SKalle Valo struct sdio_func *func = ar_sdio->func; 446bdcd8170SKalle Valo int ret = 0; 447bdcd8170SKalle Valo 448bdcd8170SKalle Valo if (!ar_sdio->is_disabled) 449bdcd8170SKalle Valo return 0; 450bdcd8170SKalle Valo 451bdcd8170SKalle Valo sdio_claim_host(func); 452bdcd8170SKalle Valo 453bdcd8170SKalle Valo ret = sdio_enable_func(func); 454bdcd8170SKalle Valo if (ret) { 455bdcd8170SKalle Valo ath6kl_err("Unable to enable sdio func: %d)\n", ret); 456bdcd8170SKalle Valo sdio_release_host(func); 457bdcd8170SKalle Valo return ret; 458bdcd8170SKalle Valo } 459bdcd8170SKalle Valo 460bdcd8170SKalle Valo sdio_release_host(func); 461bdcd8170SKalle Valo 462bdcd8170SKalle Valo /* 463bdcd8170SKalle Valo * Wait for hardware to initialise. It should take a lot less than 464bdcd8170SKalle Valo * 10 ms but let's be conservative here. 465bdcd8170SKalle Valo */ 466bdcd8170SKalle Valo msleep(10); 467bdcd8170SKalle Valo 468bdcd8170SKalle Valo ar_sdio->is_disabled = false; 469bdcd8170SKalle Valo 470bdcd8170SKalle Valo return ret; 471bdcd8170SKalle Valo } 472bdcd8170SKalle Valo 473bdcd8170SKalle Valo static int ath6kl_sdio_power_off(struct ath6kl_sdio *ar_sdio) 474bdcd8170SKalle Valo { 475bdcd8170SKalle Valo int ret; 476bdcd8170SKalle Valo 477bdcd8170SKalle Valo if (ar_sdio->is_disabled) 478bdcd8170SKalle Valo return 0; 479bdcd8170SKalle Valo 480bdcd8170SKalle Valo /* Disable the card */ 481bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 482bdcd8170SKalle Valo ret = sdio_disable_func(ar_sdio->func); 483bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 484bdcd8170SKalle Valo 485bdcd8170SKalle Valo if (ret) 486bdcd8170SKalle Valo return ret; 487bdcd8170SKalle Valo 488bdcd8170SKalle Valo ar_sdio->is_disabled = true; 489bdcd8170SKalle Valo 490bdcd8170SKalle Valo return ret; 491bdcd8170SKalle Valo } 492bdcd8170SKalle Valo 493bdcd8170SKalle Valo static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer, 494bdcd8170SKalle Valo u32 length, u32 request, 495bdcd8170SKalle Valo struct htc_packet *packet) 496bdcd8170SKalle Valo { 497bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 498bdcd8170SKalle Valo struct bus_request *bus_req; 499bdcd8170SKalle Valo unsigned long flags; 500bdcd8170SKalle Valo 501bdcd8170SKalle Valo bus_req = ath6kl_sdio_alloc_busreq(ar_sdio); 502bdcd8170SKalle Valo 503bdcd8170SKalle Valo if (!bus_req) 504bdcd8170SKalle Valo return -ENOMEM; 505bdcd8170SKalle Valo 506bdcd8170SKalle Valo bus_req->address = address; 507bdcd8170SKalle Valo bus_req->buffer = buffer; 508bdcd8170SKalle Valo bus_req->length = length; 509bdcd8170SKalle Valo bus_req->request = request; 510bdcd8170SKalle Valo bus_req->packet = packet; 511bdcd8170SKalle Valo 512bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->wr_async_lock, flags); 513bdcd8170SKalle Valo list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq); 514bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags); 515bdcd8170SKalle Valo queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work); 516bdcd8170SKalle Valo 517bdcd8170SKalle Valo return 0; 518bdcd8170SKalle Valo } 519bdcd8170SKalle Valo 520bdcd8170SKalle Valo static void ath6kl_sdio_irq_enable(struct ath6kl *ar) 521bdcd8170SKalle Valo { 522bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 523bdcd8170SKalle Valo int ret; 524bdcd8170SKalle Valo 525bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 526bdcd8170SKalle Valo 527bdcd8170SKalle Valo /* Register the isr */ 528bdcd8170SKalle Valo ret = sdio_claim_irq(ar_sdio->func, ath6kl_sdio_irq_handler); 529bdcd8170SKalle Valo if (ret) 530bdcd8170SKalle Valo ath6kl_err("Failed to claim sdio irq: %d\n", ret); 531bdcd8170SKalle Valo 532bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 533bdcd8170SKalle Valo } 534bdcd8170SKalle Valo 535bdcd8170SKalle Valo static void ath6kl_sdio_irq_disable(struct ath6kl *ar) 536bdcd8170SKalle Valo { 537bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 538bdcd8170SKalle Valo int ret; 539bdcd8170SKalle Valo 540bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 541bdcd8170SKalle Valo 542bdcd8170SKalle Valo /* Mask our function IRQ */ 543bdcd8170SKalle Valo while (atomic_read(&ar_sdio->irq_handling)) { 544bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 545bdcd8170SKalle Valo schedule_timeout(HZ / 10); 546bdcd8170SKalle Valo sdio_claim_host(ar_sdio->func); 547bdcd8170SKalle Valo } 548bdcd8170SKalle Valo 549bdcd8170SKalle Valo ret = sdio_release_irq(ar_sdio->func); 550bdcd8170SKalle Valo if (ret) 551bdcd8170SKalle Valo ath6kl_err("Failed to release sdio irq: %d\n", ret); 552bdcd8170SKalle Valo 553bdcd8170SKalle Valo sdio_release_host(ar_sdio->func); 554bdcd8170SKalle Valo } 555bdcd8170SKalle Valo 556bdcd8170SKalle Valo static struct hif_scatter_req *ath6kl_sdio_scatter_req_get(struct ath6kl *ar) 557bdcd8170SKalle Valo { 558bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 559bdcd8170SKalle Valo struct hif_scatter_req *node = NULL; 560bdcd8170SKalle Valo unsigned long flag; 561bdcd8170SKalle Valo 562bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->scat_lock, flag); 563bdcd8170SKalle Valo 564bdcd8170SKalle Valo if (!list_empty(&ar_sdio->scat_req)) { 565bdcd8170SKalle Valo node = list_first_entry(&ar_sdio->scat_req, 566bdcd8170SKalle Valo struct hif_scatter_req, list); 567bdcd8170SKalle Valo list_del(&node->list); 568bdcd8170SKalle Valo } 569bdcd8170SKalle Valo 570bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->scat_lock, flag); 571bdcd8170SKalle Valo 572bdcd8170SKalle Valo return node; 573bdcd8170SKalle Valo } 574bdcd8170SKalle Valo 575bdcd8170SKalle Valo static void ath6kl_sdio_scatter_req_add(struct ath6kl *ar, 576bdcd8170SKalle Valo struct hif_scatter_req *s_req) 577bdcd8170SKalle Valo { 578bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 579bdcd8170SKalle Valo unsigned long flag; 580bdcd8170SKalle Valo 581bdcd8170SKalle Valo spin_lock_irqsave(&ar_sdio->scat_lock, flag); 582bdcd8170SKalle Valo 583bdcd8170SKalle Valo list_add_tail(&s_req->list, &ar_sdio->scat_req); 584bdcd8170SKalle Valo 585bdcd8170SKalle Valo spin_unlock_irqrestore(&ar_sdio->scat_lock, flag); 586bdcd8170SKalle Valo 587bdcd8170SKalle Valo } 588bdcd8170SKalle Valo 589c630d18aSVasanthakumar Thiagarajan /* scatter gather read write request */ 590c630d18aSVasanthakumar Thiagarajan static int ath6kl_sdio_async_rw_scatter(struct ath6kl *ar, 591c630d18aSVasanthakumar Thiagarajan struct hif_scatter_req *scat_req) 592c630d18aSVasanthakumar Thiagarajan { 593c630d18aSVasanthakumar Thiagarajan struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 594c630d18aSVasanthakumar Thiagarajan u32 request = scat_req->req; 595c630d18aSVasanthakumar Thiagarajan int status = 0; 596c630d18aSVasanthakumar Thiagarajan unsigned long flags; 597c630d18aSVasanthakumar Thiagarajan 598c630d18aSVasanthakumar Thiagarajan if (!scat_req->len) 599c630d18aSVasanthakumar Thiagarajan return -EINVAL; 600c630d18aSVasanthakumar Thiagarajan 601c630d18aSVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_SCATTER, 602c630d18aSVasanthakumar Thiagarajan "hif-scatter: total len: %d scatter entries: %d\n", 603c630d18aSVasanthakumar Thiagarajan scat_req->len, scat_req->scat_entries); 604c630d18aSVasanthakumar Thiagarajan 605c630d18aSVasanthakumar Thiagarajan if (request & HIF_SYNCHRONOUS) { 606c630d18aSVasanthakumar Thiagarajan sdio_claim_host(ar_sdio->func); 607d4df7890SVasanthakumar Thiagarajan status = ath6kl_sdio_scat_rw(ar_sdio, scat_req->busrequest); 608c630d18aSVasanthakumar Thiagarajan sdio_release_host(ar_sdio->func); 609c630d18aSVasanthakumar Thiagarajan } else { 610c630d18aSVasanthakumar Thiagarajan spin_lock_irqsave(&ar_sdio->wr_async_lock, flags); 611d4df7890SVasanthakumar Thiagarajan list_add_tail(&scat_req->busrequest->list, &ar_sdio->wr_asyncq); 612c630d18aSVasanthakumar Thiagarajan spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags); 613c630d18aSVasanthakumar Thiagarajan queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work); 614c630d18aSVasanthakumar Thiagarajan } 615c630d18aSVasanthakumar Thiagarajan 616c630d18aSVasanthakumar Thiagarajan return status; 617c630d18aSVasanthakumar Thiagarajan } 618c630d18aSVasanthakumar Thiagarajan 61918a0f93eSVasanthakumar Thiagarajan /* clean up scatter support */ 62018a0f93eSVasanthakumar Thiagarajan static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar) 62118a0f93eSVasanthakumar Thiagarajan { 62218a0f93eSVasanthakumar Thiagarajan struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 62318a0f93eSVasanthakumar Thiagarajan struct hif_scatter_req *s_req, *tmp_req; 62418a0f93eSVasanthakumar Thiagarajan unsigned long flag; 62518a0f93eSVasanthakumar Thiagarajan 62618a0f93eSVasanthakumar Thiagarajan /* empty the free list */ 62718a0f93eSVasanthakumar Thiagarajan spin_lock_irqsave(&ar_sdio->scat_lock, flag); 62818a0f93eSVasanthakumar Thiagarajan list_for_each_entry_safe(s_req, tmp_req, &ar_sdio->scat_req, list) { 62918a0f93eSVasanthakumar Thiagarajan list_del(&s_req->list); 63018a0f93eSVasanthakumar Thiagarajan spin_unlock_irqrestore(&ar_sdio->scat_lock, flag); 63118a0f93eSVasanthakumar Thiagarajan 63218a0f93eSVasanthakumar Thiagarajan if (s_req->busrequest) 63318a0f93eSVasanthakumar Thiagarajan ath6kl_sdio_free_bus_req(ar_sdio, s_req->busrequest); 63418a0f93eSVasanthakumar Thiagarajan kfree(s_req->virt_dma_buf); 63518a0f93eSVasanthakumar Thiagarajan kfree(s_req->sgentries); 63618a0f93eSVasanthakumar Thiagarajan kfree(s_req); 63718a0f93eSVasanthakumar Thiagarajan 63818a0f93eSVasanthakumar Thiagarajan spin_lock_irqsave(&ar_sdio->scat_lock, flag); 63918a0f93eSVasanthakumar Thiagarajan } 64018a0f93eSVasanthakumar Thiagarajan spin_unlock_irqrestore(&ar_sdio->scat_lock, flag); 64118a0f93eSVasanthakumar Thiagarajan } 64218a0f93eSVasanthakumar Thiagarajan 64318a0f93eSVasanthakumar Thiagarajan /* setup of HIF scatter resources */ 64418a0f93eSVasanthakumar Thiagarajan static int ath6kl_sdio_enable_scatter(struct ath6kl *ar, 64518a0f93eSVasanthakumar Thiagarajan struct hif_dev_scat_sup_info *pinfo) 64618a0f93eSVasanthakumar Thiagarajan { 64718a0f93eSVasanthakumar Thiagarajan struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); 648cfeab10bSVasanthakumar Thiagarajan int ret; 649cfeab10bSVasanthakumar Thiagarajan bool virt_scat = false; 65018a0f93eSVasanthakumar Thiagarajan 65118a0f93eSVasanthakumar Thiagarajan /* check if host supports scatter and it meets our requirements */ 65218a0f93eSVasanthakumar Thiagarajan if (ar_sdio->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) { 653cfeab10bSVasanthakumar Thiagarajan ath6kl_err("host only supports scatter of :%d entries, need: %d\n", 65418a0f93eSVasanthakumar Thiagarajan ar_sdio->func->card->host->max_segs, 65518a0f93eSVasanthakumar Thiagarajan MAX_SCATTER_ENTRIES_PER_REQ); 656cfeab10bSVasanthakumar Thiagarajan virt_scat = true; 65718a0f93eSVasanthakumar Thiagarajan } 65818a0f93eSVasanthakumar Thiagarajan 659cfeab10bSVasanthakumar Thiagarajan if (!virt_scat) { 66018a0f93eSVasanthakumar Thiagarajan ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio, 66118a0f93eSVasanthakumar Thiagarajan MAX_SCATTER_ENTRIES_PER_REQ, 662cfeab10bSVasanthakumar Thiagarajan MAX_SCATTER_REQUESTS, virt_scat); 663cfeab10bSVasanthakumar Thiagarajan 664cfeab10bSVasanthakumar Thiagarajan if (!ret) { 665cfeab10bSVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_ANY, 666cfeab10bSVasanthakumar Thiagarajan "hif-scatter enabled: max scatter req : %d entries: %d\n", 667cfeab10bSVasanthakumar Thiagarajan MAX_SCATTER_REQUESTS, 668cfeab10bSVasanthakumar Thiagarajan MAX_SCATTER_ENTRIES_PER_REQ); 669cfeab10bSVasanthakumar Thiagarajan 670cfeab10bSVasanthakumar Thiagarajan pinfo->max_scat_entries = MAX_SCATTER_ENTRIES_PER_REQ; 671cfeab10bSVasanthakumar Thiagarajan pinfo->max_xfer_szper_scatreq = 672cfeab10bSVasanthakumar Thiagarajan MAX_SCATTER_REQ_TRANSFER_SIZE; 673cfeab10bSVasanthakumar Thiagarajan } else { 674cfeab10bSVasanthakumar Thiagarajan ath6kl_sdio_cleanup_scatter(ar); 675cfeab10bSVasanthakumar Thiagarajan ath6kl_warn("hif scatter resource setup failed, trying virtual scatter method\n"); 676cfeab10bSVasanthakumar Thiagarajan } 677cfeab10bSVasanthakumar Thiagarajan } 678cfeab10bSVasanthakumar Thiagarajan 679cfeab10bSVasanthakumar Thiagarajan if (virt_scat || ret) { 680cfeab10bSVasanthakumar Thiagarajan ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio, 681cfeab10bSVasanthakumar Thiagarajan ATH6KL_SCATTER_ENTRIES_PER_REQ, 682cfeab10bSVasanthakumar Thiagarajan ATH6KL_SCATTER_REQS, virt_scat); 683cfeab10bSVasanthakumar Thiagarajan 68418a0f93eSVasanthakumar Thiagarajan if (ret) { 685cfeab10bSVasanthakumar Thiagarajan ath6kl_err("failed to alloc virtual scatter resources !\n"); 68618a0f93eSVasanthakumar Thiagarajan ath6kl_sdio_cleanup_scatter(ar); 68718a0f93eSVasanthakumar Thiagarajan return ret; 68818a0f93eSVasanthakumar Thiagarajan } 68918a0f93eSVasanthakumar Thiagarajan 690cfeab10bSVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_ANY, 691cfeab10bSVasanthakumar Thiagarajan "Vitual scatter enabled, max_scat_req:%d, entries:%d\n", 692cfeab10bSVasanthakumar Thiagarajan ATH6KL_SCATTER_REQS, ATH6KL_SCATTER_ENTRIES_PER_REQ); 693cfeab10bSVasanthakumar Thiagarajan 694cfeab10bSVasanthakumar Thiagarajan pinfo->max_scat_entries = ATH6KL_SCATTER_ENTRIES_PER_REQ; 695cfeab10bSVasanthakumar Thiagarajan pinfo->max_xfer_szper_scatreq = 696cfeab10bSVasanthakumar Thiagarajan ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER; 697cfeab10bSVasanthakumar Thiagarajan } 698cfeab10bSVasanthakumar Thiagarajan 69918a0f93eSVasanthakumar Thiagarajan return 0; 70018a0f93eSVasanthakumar Thiagarajan } 70118a0f93eSVasanthakumar Thiagarajan 702bdcd8170SKalle Valo static const struct ath6kl_hif_ops ath6kl_sdio_ops = { 703bdcd8170SKalle Valo .read_write_sync = ath6kl_sdio_read_write_sync, 704bdcd8170SKalle Valo .write_async = ath6kl_sdio_write_async, 705bdcd8170SKalle Valo .irq_enable = ath6kl_sdio_irq_enable, 706bdcd8170SKalle Valo .irq_disable = ath6kl_sdio_irq_disable, 707bdcd8170SKalle Valo .scatter_req_get = ath6kl_sdio_scatter_req_get, 708bdcd8170SKalle Valo .scatter_req_add = ath6kl_sdio_scatter_req_add, 709bdcd8170SKalle Valo .enable_scatter = ath6kl_sdio_enable_scatter, 710f74a7361SVasanthakumar Thiagarajan .scat_req_rw = ath6kl_sdio_async_rw_scatter, 711bdcd8170SKalle Valo .cleanup_scatter = ath6kl_sdio_cleanup_scatter, 712bdcd8170SKalle Valo }; 713bdcd8170SKalle Valo 714bdcd8170SKalle Valo static int ath6kl_sdio_probe(struct sdio_func *func, 715bdcd8170SKalle Valo const struct sdio_device_id *id) 716bdcd8170SKalle Valo { 717bdcd8170SKalle Valo int ret; 718bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 719bdcd8170SKalle Valo struct ath6kl *ar; 720bdcd8170SKalle Valo int count; 721bdcd8170SKalle Valo 722bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, 723bdcd8170SKalle Valo "%s: func: 0x%X, vendor id: 0x%X, dev id: 0x%X, block size: 0x%X/0x%X\n", 724bdcd8170SKalle Valo __func__, func->num, func->vendor, 725bdcd8170SKalle Valo func->device, func->max_blksize, func->cur_blksize); 726bdcd8170SKalle Valo 727bdcd8170SKalle Valo ar_sdio = kzalloc(sizeof(struct ath6kl_sdio), GFP_KERNEL); 728bdcd8170SKalle Valo if (!ar_sdio) 729bdcd8170SKalle Valo return -ENOMEM; 730bdcd8170SKalle Valo 731bdcd8170SKalle Valo ar_sdio->dma_buffer = kzalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL); 732bdcd8170SKalle Valo if (!ar_sdio->dma_buffer) { 733bdcd8170SKalle Valo ret = -ENOMEM; 734bdcd8170SKalle Valo goto err_hif; 735bdcd8170SKalle Valo } 736bdcd8170SKalle Valo 737bdcd8170SKalle Valo ar_sdio->func = func; 738bdcd8170SKalle Valo sdio_set_drvdata(func, ar_sdio); 739bdcd8170SKalle Valo 740bdcd8170SKalle Valo ar_sdio->id = id; 741bdcd8170SKalle Valo ar_sdio->is_disabled = true; 742bdcd8170SKalle Valo 743bdcd8170SKalle Valo spin_lock_init(&ar_sdio->lock); 744bdcd8170SKalle Valo spin_lock_init(&ar_sdio->scat_lock); 745bdcd8170SKalle Valo spin_lock_init(&ar_sdio->wr_async_lock); 746bdcd8170SKalle Valo 747bdcd8170SKalle Valo INIT_LIST_HEAD(&ar_sdio->scat_req); 748bdcd8170SKalle Valo INIT_LIST_HEAD(&ar_sdio->bus_req_freeq); 749bdcd8170SKalle Valo INIT_LIST_HEAD(&ar_sdio->wr_asyncq); 750bdcd8170SKalle Valo 751bdcd8170SKalle Valo INIT_WORK(&ar_sdio->wr_async_work, ath6kl_sdio_write_async_work); 752bdcd8170SKalle Valo 753bdcd8170SKalle Valo for (count = 0; count < BUS_REQUEST_MAX_NUM; count++) 754bdcd8170SKalle Valo ath6kl_sdio_free_bus_req(ar_sdio, &ar_sdio->bus_req[count]); 755bdcd8170SKalle Valo 756bdcd8170SKalle Valo ar = ath6kl_core_alloc(&ar_sdio->func->dev); 757bdcd8170SKalle Valo if (!ar) { 758bdcd8170SKalle Valo ath6kl_err("Failed to alloc ath6kl core\n"); 759bdcd8170SKalle Valo ret = -ENOMEM; 760bdcd8170SKalle Valo goto err_dma; 761bdcd8170SKalle Valo } 762bdcd8170SKalle Valo 763bdcd8170SKalle Valo ar_sdio->ar = ar; 764bdcd8170SKalle Valo ar->hif_priv = ar_sdio; 765bdcd8170SKalle Valo ar->hif_ops = &ath6kl_sdio_ops; 766bdcd8170SKalle Valo 767bdcd8170SKalle Valo ath6kl_sdio_set_mbox_info(ar); 768bdcd8170SKalle Valo 769bdcd8170SKalle Valo sdio_claim_host(func); 770bdcd8170SKalle Valo 771bdcd8170SKalle Valo if ((ar_sdio->id->device & MANUFACTURER_ID_ATH6KL_BASE_MASK) >= 772bdcd8170SKalle Valo MANUFACTURER_ID_AR6003_BASE) { 773bdcd8170SKalle Valo /* enable 4-bit ASYNC interrupt on AR6003 or later */ 774bdcd8170SKalle Valo ret = ath6kl_sdio_func0_cmd52_wr_byte(func->card, 775bdcd8170SKalle Valo CCCR_SDIO_IRQ_MODE_REG, 776bdcd8170SKalle Valo SDIO_IRQ_MODE_ASYNC_4BIT_IRQ); 777bdcd8170SKalle Valo if (ret) { 778bdcd8170SKalle Valo ath6kl_err("Failed to enable 4-bit async irq mode %d\n", 779bdcd8170SKalle Valo ret); 780bdcd8170SKalle Valo sdio_release_host(func); 781bdcd8170SKalle Valo goto err_dma; 782bdcd8170SKalle Valo } 783bdcd8170SKalle Valo 784bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "4-bit async irq mode enabled\n"); 785bdcd8170SKalle Valo } 786bdcd8170SKalle Valo 787bdcd8170SKalle Valo /* give us some time to enable, in ms */ 788bdcd8170SKalle Valo func->enable_timeout = 100; 789bdcd8170SKalle Valo 790bdcd8170SKalle Valo sdio_release_host(func); 791bdcd8170SKalle Valo 792bdcd8170SKalle Valo ret = ath6kl_sdio_power_on(ar_sdio); 793bdcd8170SKalle Valo if (ret) 794bdcd8170SKalle Valo goto err_dma; 795bdcd8170SKalle Valo 796bdcd8170SKalle Valo sdio_claim_host(func); 797bdcd8170SKalle Valo 798bdcd8170SKalle Valo ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE); 799bdcd8170SKalle Valo if (ret) { 800bdcd8170SKalle Valo ath6kl_err("Set sdio block size %d failed: %d)\n", 801bdcd8170SKalle Valo HIF_MBOX_BLOCK_SIZE, ret); 802bdcd8170SKalle Valo sdio_release_host(func); 803bdcd8170SKalle Valo goto err_off; 804bdcd8170SKalle Valo } 805bdcd8170SKalle Valo 806bdcd8170SKalle Valo sdio_release_host(func); 807bdcd8170SKalle Valo 808bdcd8170SKalle Valo ret = ath6kl_core_init(ar); 809bdcd8170SKalle Valo if (ret) { 810bdcd8170SKalle Valo ath6kl_err("Failed to init ath6kl core\n"); 811bdcd8170SKalle Valo goto err_off; 812bdcd8170SKalle Valo } 813bdcd8170SKalle Valo 814bdcd8170SKalle Valo return ret; 815bdcd8170SKalle Valo 816bdcd8170SKalle Valo err_off: 817bdcd8170SKalle Valo ath6kl_sdio_power_off(ar_sdio); 818bdcd8170SKalle Valo err_dma: 819bdcd8170SKalle Valo kfree(ar_sdio->dma_buffer); 820bdcd8170SKalle Valo err_hif: 821bdcd8170SKalle Valo kfree(ar_sdio); 822bdcd8170SKalle Valo 823bdcd8170SKalle Valo return ret; 824bdcd8170SKalle Valo } 825bdcd8170SKalle Valo 826bdcd8170SKalle Valo static void ath6kl_sdio_remove(struct sdio_func *func) 827bdcd8170SKalle Valo { 828bdcd8170SKalle Valo struct ath6kl_sdio *ar_sdio; 829bdcd8170SKalle Valo 830bdcd8170SKalle Valo ar_sdio = sdio_get_drvdata(func); 831bdcd8170SKalle Valo 832bdcd8170SKalle Valo ath6kl_stop_txrx(ar_sdio->ar); 833bdcd8170SKalle Valo cancel_work_sync(&ar_sdio->wr_async_work); 834bdcd8170SKalle Valo 835bdcd8170SKalle Valo ath6kl_unavail_ev(ar_sdio->ar); 836bdcd8170SKalle Valo 837bdcd8170SKalle Valo ath6kl_sdio_power_off(ar_sdio); 838bdcd8170SKalle Valo 839bdcd8170SKalle Valo kfree(ar_sdio->dma_buffer); 840bdcd8170SKalle Valo kfree(ar_sdio); 841bdcd8170SKalle Valo } 842bdcd8170SKalle Valo 843bdcd8170SKalle Valo static const struct sdio_device_id ath6kl_sdio_devices[] = { 844bdcd8170SKalle Valo {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))}, 845bdcd8170SKalle Valo {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))}, 846bdcd8170SKalle Valo {}, 847bdcd8170SKalle Valo }; 848bdcd8170SKalle Valo 849bdcd8170SKalle Valo MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices); 850bdcd8170SKalle Valo 851bdcd8170SKalle Valo static struct sdio_driver ath6kl_sdio_driver = { 852bdcd8170SKalle Valo .name = "ath6kl_sdio", 853bdcd8170SKalle Valo .id_table = ath6kl_sdio_devices, 854bdcd8170SKalle Valo .probe = ath6kl_sdio_probe, 855bdcd8170SKalle Valo .remove = ath6kl_sdio_remove, 856bdcd8170SKalle Valo }; 857bdcd8170SKalle Valo 858bdcd8170SKalle Valo static int __init ath6kl_sdio_init(void) 859bdcd8170SKalle Valo { 860bdcd8170SKalle Valo int ret; 861bdcd8170SKalle Valo 862bdcd8170SKalle Valo ret = sdio_register_driver(&ath6kl_sdio_driver); 863bdcd8170SKalle Valo if (ret) 864bdcd8170SKalle Valo ath6kl_err("sdio driver registration failed: %d\n", ret); 865bdcd8170SKalle Valo 866bdcd8170SKalle Valo return ret; 867bdcd8170SKalle Valo } 868bdcd8170SKalle Valo 869bdcd8170SKalle Valo static void __exit ath6kl_sdio_exit(void) 870bdcd8170SKalle Valo { 871bdcd8170SKalle Valo sdio_unregister_driver(&ath6kl_sdio_driver); 872bdcd8170SKalle Valo } 873bdcd8170SKalle Valo 874bdcd8170SKalle Valo module_init(ath6kl_sdio_init); 875bdcd8170SKalle Valo module_exit(ath6kl_sdio_exit); 876bdcd8170SKalle Valo 877bdcd8170SKalle Valo MODULE_AUTHOR("Atheros Communications, Inc."); 878bdcd8170SKalle Valo MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices"); 879bdcd8170SKalle Valo MODULE_LICENSE("Dual BSD/GPL"); 880bdcd8170SKalle Valo 881bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_OTP_FILE); 882bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE); 883bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE); 884bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE); 885bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE); 886bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_OTP_FILE); 887bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE); 888bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE); 889bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE); 890bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE); 891