1bdcd8170SKalle Valo /*
2bdcd8170SKalle Valo  * Copyright (c) 2004-2011 Atheros Communications Inc.
3bdcd8170SKalle Valo  *
4bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
5bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
6bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
7bdcd8170SKalle Valo  *
8bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15bdcd8170SKalle Valo  */
16bdcd8170SKalle Valo 
17bdcd8170SKalle Valo #include <linux/mmc/card.h>
18bdcd8170SKalle Valo #include <linux/mmc/mmc.h>
19bdcd8170SKalle Valo #include <linux/mmc/host.h>
20bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h>
21bdcd8170SKalle Valo #include <linux/mmc/sdio_ids.h>
22bdcd8170SKalle Valo #include <linux/mmc/sdio.h>
23bdcd8170SKalle Valo #include <linux/mmc/sd.h>
24bdcd8170SKalle Valo #include "htc_hif.h"
25bdcd8170SKalle Valo #include "hif-ops.h"
26bdcd8170SKalle Valo #include "target.h"
27bdcd8170SKalle Valo #include "debug.h"
28bdcd8170SKalle Valo 
29bdcd8170SKalle Valo struct ath6kl_sdio {
30bdcd8170SKalle Valo 	struct sdio_func *func;
31bdcd8170SKalle Valo 
32bdcd8170SKalle Valo 	spinlock_t lock;
33bdcd8170SKalle Valo 
34bdcd8170SKalle Valo 	/* free list */
35bdcd8170SKalle Valo 	struct list_head bus_req_freeq;
36bdcd8170SKalle Valo 
37bdcd8170SKalle Valo 	/* available bus requests */
38bdcd8170SKalle Valo 	struct bus_request bus_req[BUS_REQUEST_MAX_NUM];
39bdcd8170SKalle Valo 
40bdcd8170SKalle Valo 	struct ath6kl *ar;
41bdcd8170SKalle Valo 	u8 *dma_buffer;
42bdcd8170SKalle Valo 
43bdcd8170SKalle Valo 	/* scatter request list head */
44bdcd8170SKalle Valo 	struct list_head scat_req;
45bdcd8170SKalle Valo 
46bdcd8170SKalle Valo 	spinlock_t scat_lock;
47bdcd8170SKalle Valo 	bool is_disabled;
48bdcd8170SKalle Valo 	atomic_t irq_handling;
49bdcd8170SKalle Valo 	const struct sdio_device_id *id;
50bdcd8170SKalle Valo 	struct work_struct wr_async_work;
51bdcd8170SKalle Valo 	struct list_head wr_asyncq;
52bdcd8170SKalle Valo 	spinlock_t wr_async_lock;
53bdcd8170SKalle Valo };
54bdcd8170SKalle Valo 
55bdcd8170SKalle Valo #define CMD53_ARG_READ          0
56bdcd8170SKalle Valo #define CMD53_ARG_WRITE         1
57bdcd8170SKalle Valo #define CMD53_ARG_BLOCK_BASIS   1
58bdcd8170SKalle Valo #define CMD53_ARG_FIXED_ADDRESS 0
59bdcd8170SKalle Valo #define CMD53_ARG_INCR_ADDRESS  1
60bdcd8170SKalle Valo 
61bdcd8170SKalle Valo static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar)
62bdcd8170SKalle Valo {
63bdcd8170SKalle Valo 	return ar->hif_priv;
64bdcd8170SKalle Valo }
65bdcd8170SKalle Valo 
66bdcd8170SKalle Valo /*
67bdcd8170SKalle Valo  * Macro to check if DMA buffer is WORD-aligned and DMA-able.
68bdcd8170SKalle Valo  * Most host controllers assume the buffer is DMA'able and will
69bdcd8170SKalle Valo  * bug-check otherwise (i.e. buffers on the stack). virt_addr_valid
70bdcd8170SKalle Valo  * check fails on stack memory.
71bdcd8170SKalle Valo  */
72bdcd8170SKalle Valo static inline bool buf_needs_bounce(u8 *buf)
73bdcd8170SKalle Valo {
74bdcd8170SKalle Valo 	return ((unsigned long) buf & 0x3) || !virt_addr_valid(buf);
75bdcd8170SKalle Valo }
76bdcd8170SKalle Valo 
77bdcd8170SKalle Valo static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar)
78bdcd8170SKalle Valo {
79bdcd8170SKalle Valo 	struct ath6kl_mbox_info *mbox_info = &ar->mbox_info;
80bdcd8170SKalle Valo 
81bdcd8170SKalle Valo 	/* EP1 has an extended range */
82bdcd8170SKalle Valo 	mbox_info->htc_addr = HIF_MBOX_BASE_ADDR;
83bdcd8170SKalle Valo 	mbox_info->htc_ext_addr = HIF_MBOX0_EXT_BASE_ADDR;
84bdcd8170SKalle Valo 	mbox_info->htc_ext_sz = HIF_MBOX0_EXT_WIDTH;
85bdcd8170SKalle Valo 	mbox_info->block_size = HIF_MBOX_BLOCK_SIZE;
86bdcd8170SKalle Valo 	mbox_info->gmbox_addr = HIF_GMBOX_BASE_ADDR;
87bdcd8170SKalle Valo 	mbox_info->gmbox_sz = HIF_GMBOX_WIDTH;
88bdcd8170SKalle Valo }
89bdcd8170SKalle Valo 
90bdcd8170SKalle Valo static inline void ath6kl_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func,
91bdcd8170SKalle Valo 					     u8 mode, u8 opcode, u32 addr,
92bdcd8170SKalle Valo 					     u16 blksz)
93bdcd8170SKalle Valo {
94bdcd8170SKalle Valo 	*arg = (((rw & 1) << 31) |
95bdcd8170SKalle Valo 		((func & 0x7) << 28) |
96bdcd8170SKalle Valo 		((mode & 1) << 27) |
97bdcd8170SKalle Valo 		((opcode & 1) << 26) |
98bdcd8170SKalle Valo 		((addr & 0x1FFFF) << 9) |
99bdcd8170SKalle Valo 		(blksz & 0x1FF));
100bdcd8170SKalle Valo }
101bdcd8170SKalle Valo 
102bdcd8170SKalle Valo static inline void ath6kl_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw,
103bdcd8170SKalle Valo 					     unsigned int address,
104bdcd8170SKalle Valo 					     unsigned char val)
105bdcd8170SKalle Valo {
106bdcd8170SKalle Valo 	const u8 func = 0;
107bdcd8170SKalle Valo 
108bdcd8170SKalle Valo 	*arg = ((write & 1) << 31) |
109bdcd8170SKalle Valo 	       ((func & 0x7) << 28) |
110bdcd8170SKalle Valo 	       ((raw & 1) << 27) |
111bdcd8170SKalle Valo 	       (1 << 26) |
112bdcd8170SKalle Valo 	       ((address & 0x1FFFF) << 9) |
113bdcd8170SKalle Valo 	       (1 << 8) |
114bdcd8170SKalle Valo 	       (val & 0xFF);
115bdcd8170SKalle Valo }
116bdcd8170SKalle Valo 
117bdcd8170SKalle Valo static int ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card,
118bdcd8170SKalle Valo 					   unsigned int address,
119bdcd8170SKalle Valo 					   unsigned char byte)
120bdcd8170SKalle Valo {
121bdcd8170SKalle Valo 	struct mmc_command io_cmd;
122bdcd8170SKalle Valo 
123bdcd8170SKalle Valo 	memset(&io_cmd, 0, sizeof(io_cmd));
124bdcd8170SKalle Valo 	ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte);
125bdcd8170SKalle Valo 	io_cmd.opcode = SD_IO_RW_DIRECT;
126bdcd8170SKalle Valo 	io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
127bdcd8170SKalle Valo 
128bdcd8170SKalle Valo 	return mmc_wait_for_cmd(card->host, &io_cmd, 0);
129bdcd8170SKalle Valo }
130bdcd8170SKalle Valo 
131da220695SVasanthakumar Thiagarajan static int ath6kl_sdio_io(struct sdio_func *func, u32 request, u32 addr,
132da220695SVasanthakumar Thiagarajan 			  u8 *buf, u32 len)
133da220695SVasanthakumar Thiagarajan {
134da220695SVasanthakumar Thiagarajan 	int ret = 0;
135da220695SVasanthakumar Thiagarajan 
136da220695SVasanthakumar Thiagarajan 	if (request & HIF_WRITE) {
137da220695SVasanthakumar Thiagarajan 		if (addr >= HIF_MBOX_BASE_ADDR &&
138da220695SVasanthakumar Thiagarajan 		    addr <= HIF_MBOX_END_ADDR)
139da220695SVasanthakumar Thiagarajan 			addr += (HIF_MBOX_WIDTH - len);
140da220695SVasanthakumar Thiagarajan 
141da220695SVasanthakumar Thiagarajan 		if (addr == HIF_MBOX0_EXT_BASE_ADDR)
142da220695SVasanthakumar Thiagarajan 			addr += HIF_MBOX0_EXT_WIDTH - len;
143da220695SVasanthakumar Thiagarajan 
144da220695SVasanthakumar Thiagarajan 		if (request & HIF_FIXED_ADDRESS)
145da220695SVasanthakumar Thiagarajan 			ret = sdio_writesb(func, addr, buf, len);
146da220695SVasanthakumar Thiagarajan 		else
147da220695SVasanthakumar Thiagarajan 			ret = sdio_memcpy_toio(func, addr, buf, len);
148da220695SVasanthakumar Thiagarajan 	} else {
149da220695SVasanthakumar Thiagarajan 		if (request & HIF_FIXED_ADDRESS)
150da220695SVasanthakumar Thiagarajan 			ret = sdio_readsb(func, buf, addr, len);
151da220695SVasanthakumar Thiagarajan 		else
152da220695SVasanthakumar Thiagarajan 			ret = sdio_memcpy_fromio(func, buf, addr, len);
153da220695SVasanthakumar Thiagarajan 	}
154da220695SVasanthakumar Thiagarajan 
155da220695SVasanthakumar Thiagarajan 	return ret;
156da220695SVasanthakumar Thiagarajan }
157da220695SVasanthakumar Thiagarajan 
158bdcd8170SKalle Valo static struct bus_request *ath6kl_sdio_alloc_busreq(struct ath6kl_sdio *ar_sdio)
159bdcd8170SKalle Valo {
160bdcd8170SKalle Valo 	struct bus_request *bus_req;
161bdcd8170SKalle Valo 	unsigned long flag;
162bdcd8170SKalle Valo 
163bdcd8170SKalle Valo 	spin_lock_irqsave(&ar_sdio->lock, flag);
164bdcd8170SKalle Valo 
165bdcd8170SKalle Valo 	if (list_empty(&ar_sdio->bus_req_freeq)) {
166bdcd8170SKalle Valo 		spin_unlock_irqrestore(&ar_sdio->lock, flag);
167bdcd8170SKalle Valo 		return NULL;
168bdcd8170SKalle Valo 	}
169bdcd8170SKalle Valo 
170bdcd8170SKalle Valo 	bus_req = list_first_entry(&ar_sdio->bus_req_freeq,
171bdcd8170SKalle Valo 				   struct bus_request, list);
172bdcd8170SKalle Valo 	list_del(&bus_req->list);
173bdcd8170SKalle Valo 
174bdcd8170SKalle Valo 	spin_unlock_irqrestore(&ar_sdio->lock, flag);
175bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req);
176bdcd8170SKalle Valo 
177bdcd8170SKalle Valo 	return bus_req;
178bdcd8170SKalle Valo }
179bdcd8170SKalle Valo 
180bdcd8170SKalle Valo static void ath6kl_sdio_free_bus_req(struct ath6kl_sdio *ar_sdio,
181bdcd8170SKalle Valo 				     struct bus_request *bus_req)
182bdcd8170SKalle Valo {
183bdcd8170SKalle Valo 	unsigned long flag;
184bdcd8170SKalle Valo 
185bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req);
186bdcd8170SKalle Valo 
187bdcd8170SKalle Valo 	spin_lock_irqsave(&ar_sdio->lock, flag);
188bdcd8170SKalle Valo 	list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq);
189bdcd8170SKalle Valo 	spin_unlock_irqrestore(&ar_sdio->lock, flag);
190bdcd8170SKalle Valo }
191bdcd8170SKalle Valo 
192bdcd8170SKalle Valo static void ath6kl_sdio_setup_scat_data(struct hif_scatter_req *scat_req,
193bdcd8170SKalle Valo 					struct mmc_data *data)
194bdcd8170SKalle Valo {
195bdcd8170SKalle Valo 	struct scatterlist *sg;
196bdcd8170SKalle Valo 	int i;
197bdcd8170SKalle Valo 
198bdcd8170SKalle Valo 	data->blksz = HIF_MBOX_BLOCK_SIZE;
199bdcd8170SKalle Valo 	data->blocks = scat_req->len / HIF_MBOX_BLOCK_SIZE;
200bdcd8170SKalle Valo 
201bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_SCATTER,
202bdcd8170SKalle Valo 		   "hif-scatter: (%s) addr: 0x%X, (block len: %d, block count: %d) , (tot:%d,sg:%d)\n",
203bdcd8170SKalle Valo 		   (scat_req->req & HIF_WRITE) ? "WR" : "RD", scat_req->addr,
204bdcd8170SKalle Valo 		   data->blksz, data->blocks, scat_req->len,
205bdcd8170SKalle Valo 		   scat_req->scat_entries);
206bdcd8170SKalle Valo 
207bdcd8170SKalle Valo 	data->flags = (scat_req->req & HIF_WRITE) ? MMC_DATA_WRITE :
208bdcd8170SKalle Valo 						    MMC_DATA_READ;
209bdcd8170SKalle Valo 
210bdcd8170SKalle Valo 	/* fill SG entries */
211d4df7890SVasanthakumar Thiagarajan 	sg = scat_req->sgentries;
212bdcd8170SKalle Valo 	sg_init_table(sg, scat_req->scat_entries);
213bdcd8170SKalle Valo 
214bdcd8170SKalle Valo 	/* assemble SG list */
215bdcd8170SKalle Valo 	for (i = 0; i < scat_req->scat_entries; i++, sg++) {
216bdcd8170SKalle Valo 		if ((unsigned long)scat_req->scat_list[i].buf & 0x3)
217bdcd8170SKalle Valo 			/*
218bdcd8170SKalle Valo 			 * Some scatter engines can handle unaligned
219bdcd8170SKalle Valo 			 * buffers, print this as informational only.
220bdcd8170SKalle Valo 			 */
221bdcd8170SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_SCATTER,
222bdcd8170SKalle Valo 				   "(%s) scatter buffer is unaligned 0x%p\n",
223bdcd8170SKalle Valo 				   scat_req->req & HIF_WRITE ? "WR" : "RD",
224bdcd8170SKalle Valo 				   scat_req->scat_list[i].buf);
225bdcd8170SKalle Valo 
226bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n",
227bdcd8170SKalle Valo 			   i, scat_req->scat_list[i].buf,
228bdcd8170SKalle Valo 			   scat_req->scat_list[i].len);
229bdcd8170SKalle Valo 
230bdcd8170SKalle Valo 		sg_set_buf(sg, scat_req->scat_list[i].buf,
231bdcd8170SKalle Valo 			   scat_req->scat_list[i].len);
232bdcd8170SKalle Valo 	}
233bdcd8170SKalle Valo 
234bdcd8170SKalle Valo 	/* set scatter-gather table for request */
235d4df7890SVasanthakumar Thiagarajan 	data->sg = scat_req->sgentries;
236bdcd8170SKalle Valo 	data->sg_len = scat_req->scat_entries;
237bdcd8170SKalle Valo }
238bdcd8170SKalle Valo 
239bdcd8170SKalle Valo static int ath6kl_sdio_scat_rw(struct ath6kl_sdio *ar_sdio,
240bdcd8170SKalle Valo 			       struct bus_request *req)
241bdcd8170SKalle Valo {
242bdcd8170SKalle Valo 	struct mmc_request mmc_req;
243bdcd8170SKalle Valo 	struct mmc_command cmd;
244bdcd8170SKalle Valo 	struct mmc_data data;
245bdcd8170SKalle Valo 	struct hif_scatter_req *scat_req;
246bdcd8170SKalle Valo 	u8 opcode, rw;
247348a8fbcSVasanthakumar Thiagarajan 	int status, len;
248bdcd8170SKalle Valo 
249bdcd8170SKalle Valo 	scat_req = req->scat_req;
250bdcd8170SKalle Valo 
251348a8fbcSVasanthakumar Thiagarajan 	if (scat_req->virt_scat) {
252348a8fbcSVasanthakumar Thiagarajan 		len = scat_req->len;
253348a8fbcSVasanthakumar Thiagarajan 		if (scat_req->req & HIF_BLOCK_BASIS)
254348a8fbcSVasanthakumar Thiagarajan 			len = round_down(len, HIF_MBOX_BLOCK_SIZE);
255348a8fbcSVasanthakumar Thiagarajan 
256348a8fbcSVasanthakumar Thiagarajan 		status = ath6kl_sdio_io(ar_sdio->func, scat_req->req,
257348a8fbcSVasanthakumar Thiagarajan 					scat_req->addr, scat_req->virt_dma_buf,
258348a8fbcSVasanthakumar Thiagarajan 					len);
259348a8fbcSVasanthakumar Thiagarajan 		goto scat_complete;
260348a8fbcSVasanthakumar Thiagarajan 	}
261348a8fbcSVasanthakumar Thiagarajan 
262bdcd8170SKalle Valo 	memset(&mmc_req, 0, sizeof(struct mmc_request));
263bdcd8170SKalle Valo 	memset(&cmd, 0, sizeof(struct mmc_command));
264bdcd8170SKalle Valo 	memset(&data, 0, sizeof(struct mmc_data));
265bdcd8170SKalle Valo 
266d4df7890SVasanthakumar Thiagarajan 	ath6kl_sdio_setup_scat_data(scat_req, &data);
267bdcd8170SKalle Valo 
268bdcd8170SKalle Valo 	opcode = (scat_req->req & HIF_FIXED_ADDRESS) ?
269bdcd8170SKalle Valo 		  CMD53_ARG_FIXED_ADDRESS : CMD53_ARG_INCR_ADDRESS;
270bdcd8170SKalle Valo 
271bdcd8170SKalle Valo 	rw = (scat_req->req & HIF_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ;
272bdcd8170SKalle Valo 
273bdcd8170SKalle Valo 	/* Fixup the address so that the last byte will fall on MBOX EOM */
274bdcd8170SKalle Valo 	if (scat_req->req & HIF_WRITE) {
275bdcd8170SKalle Valo 		if (scat_req->addr == HIF_MBOX_BASE_ADDR)
276bdcd8170SKalle Valo 			scat_req->addr += HIF_MBOX_WIDTH - scat_req->len;
277bdcd8170SKalle Valo 		else
278bdcd8170SKalle Valo 			/* Uses extended address range */
279bdcd8170SKalle Valo 			scat_req->addr += HIF_MBOX0_EXT_WIDTH - scat_req->len;
280bdcd8170SKalle Valo 	}
281bdcd8170SKalle Valo 
282bdcd8170SKalle Valo 	/* set command argument */
283bdcd8170SKalle Valo 	ath6kl_sdio_set_cmd53_arg(&cmd.arg, rw, ar_sdio->func->num,
284bdcd8170SKalle Valo 				  CMD53_ARG_BLOCK_BASIS, opcode, scat_req->addr,
285bdcd8170SKalle Valo 				  data.blocks);
286bdcd8170SKalle Valo 
287bdcd8170SKalle Valo 	cmd.opcode = SD_IO_RW_EXTENDED;
288bdcd8170SKalle Valo 	cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC;
289bdcd8170SKalle Valo 
290bdcd8170SKalle Valo 	mmc_req.cmd = &cmd;
291bdcd8170SKalle Valo 	mmc_req.data = &data;
292bdcd8170SKalle Valo 
293bdcd8170SKalle Valo 	mmc_set_data_timeout(&data, ar_sdio->func->card);
294bdcd8170SKalle Valo 	/* synchronous call to process request */
295bdcd8170SKalle Valo 	mmc_wait_for_req(ar_sdio->func->card->host, &mmc_req);
296bdcd8170SKalle Valo 
297bdcd8170SKalle Valo 	status = cmd.error ? cmd.error : data.error;
298348a8fbcSVasanthakumar Thiagarajan 
299348a8fbcSVasanthakumar Thiagarajan scat_complete:
300bdcd8170SKalle Valo 	scat_req->status = status;
301bdcd8170SKalle Valo 
302bdcd8170SKalle Valo 	if (scat_req->status)
303bdcd8170SKalle Valo 		ath6kl_err("Scatter write request failed:%d\n",
304bdcd8170SKalle Valo 			   scat_req->status);
305bdcd8170SKalle Valo 
306bdcd8170SKalle Valo 	if (scat_req->req & HIF_ASYNCHRONOUS)
307e041c7f9SVasanthakumar Thiagarajan 		scat_req->complete(ar_sdio->ar->htc_target, scat_req);
308bdcd8170SKalle Valo 
309bdcd8170SKalle Valo 	return status;
310bdcd8170SKalle Valo }
311bdcd8170SKalle Valo 
3123df505adSVasanthakumar Thiagarajan static int ath6kl_sdio_alloc_prep_scat_req(struct ath6kl_sdio *ar_sdio,
3133df505adSVasanthakumar Thiagarajan 					   int n_scat_entry, int n_scat_req,
3143df505adSVasanthakumar Thiagarajan 					   bool virt_scat)
3153df505adSVasanthakumar Thiagarajan {
3163df505adSVasanthakumar Thiagarajan 	struct hif_scatter_req *s_req;
3173df505adSVasanthakumar Thiagarajan 	struct bus_request *bus_req;
318cfeab10bSVasanthakumar Thiagarajan 	int i, scat_req_sz, scat_list_sz, sg_sz, buf_sz;
319cfeab10bSVasanthakumar Thiagarajan 	u8 *virt_buf;
3203df505adSVasanthakumar Thiagarajan 
3213df505adSVasanthakumar Thiagarajan 	scat_list_sz = (n_scat_entry - 1) * sizeof(struct hif_scatter_item);
3223df505adSVasanthakumar Thiagarajan 	scat_req_sz = sizeof(*s_req) + scat_list_sz;
3233df505adSVasanthakumar Thiagarajan 
3243df505adSVasanthakumar Thiagarajan 	if (!virt_scat)
3253df505adSVasanthakumar Thiagarajan 		sg_sz = sizeof(struct scatterlist) * n_scat_entry;
326cfeab10bSVasanthakumar Thiagarajan 	else
327cfeab10bSVasanthakumar Thiagarajan 		buf_sz =  2 * L1_CACHE_BYTES +
328cfeab10bSVasanthakumar Thiagarajan 			  ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER;
3293df505adSVasanthakumar Thiagarajan 
3303df505adSVasanthakumar Thiagarajan 	for (i = 0; i < n_scat_req; i++) {
3313df505adSVasanthakumar Thiagarajan 		/* allocate the scatter request */
3323df505adSVasanthakumar Thiagarajan 		s_req = kzalloc(scat_req_sz, GFP_KERNEL);
3333df505adSVasanthakumar Thiagarajan 		if (!s_req)
3343df505adSVasanthakumar Thiagarajan 			return -ENOMEM;
3353df505adSVasanthakumar Thiagarajan 
336cfeab10bSVasanthakumar Thiagarajan 		if (virt_scat) {
337cfeab10bSVasanthakumar Thiagarajan 			virt_buf = kzalloc(buf_sz, GFP_KERNEL);
338cfeab10bSVasanthakumar Thiagarajan 			if (!virt_buf) {
339cfeab10bSVasanthakumar Thiagarajan 				kfree(s_req);
340cfeab10bSVasanthakumar Thiagarajan 				return -ENOMEM;
341cfeab10bSVasanthakumar Thiagarajan 			}
342cfeab10bSVasanthakumar Thiagarajan 
343cfeab10bSVasanthakumar Thiagarajan 			s_req->virt_dma_buf =
344cfeab10bSVasanthakumar Thiagarajan 				(u8 *)L1_CACHE_ALIGN((unsigned long)virt_buf);
345cfeab10bSVasanthakumar Thiagarajan 		} else {
3463df505adSVasanthakumar Thiagarajan 			/* allocate sglist */
3473df505adSVasanthakumar Thiagarajan 			s_req->sgentries = kzalloc(sg_sz, GFP_KERNEL);
3483df505adSVasanthakumar Thiagarajan 
3493df505adSVasanthakumar Thiagarajan 			if (!s_req->sgentries) {
3503df505adSVasanthakumar Thiagarajan 				kfree(s_req);
3513df505adSVasanthakumar Thiagarajan 				return -ENOMEM;
3523df505adSVasanthakumar Thiagarajan 			}
3533df505adSVasanthakumar Thiagarajan 		}
3543df505adSVasanthakumar Thiagarajan 
3553df505adSVasanthakumar Thiagarajan 		/* allocate a bus request for this scatter request */
3563df505adSVasanthakumar Thiagarajan 		bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
3573df505adSVasanthakumar Thiagarajan 		if (!bus_req) {
3583df505adSVasanthakumar Thiagarajan 			kfree(s_req->sgentries);
359cfeab10bSVasanthakumar Thiagarajan 			kfree(s_req->virt_dma_buf);
3603df505adSVasanthakumar Thiagarajan 			kfree(s_req);
3613df505adSVasanthakumar Thiagarajan 			return -ENOMEM;
3623df505adSVasanthakumar Thiagarajan 		}
3633df505adSVasanthakumar Thiagarajan 
3643df505adSVasanthakumar Thiagarajan 		/* assign the scatter request to this bus request */
3653df505adSVasanthakumar Thiagarajan 		bus_req->scat_req = s_req;
3663df505adSVasanthakumar Thiagarajan 		s_req->busrequest = bus_req;
3673df505adSVasanthakumar Thiagarajan 
3684a005c3eSVasanthakumar Thiagarajan 		s_req->virt_scat = virt_scat;
3694a005c3eSVasanthakumar Thiagarajan 
3703df505adSVasanthakumar Thiagarajan 		/* add it to the scatter pool */
3713df505adSVasanthakumar Thiagarajan 		hif_scatter_req_add(ar_sdio->ar, s_req);
3723df505adSVasanthakumar Thiagarajan 	}
3733df505adSVasanthakumar Thiagarajan 
3743df505adSVasanthakumar Thiagarajan 	return 0;
3753df505adSVasanthakumar Thiagarajan }
3763df505adSVasanthakumar Thiagarajan 
377bdcd8170SKalle Valo static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf,
378bdcd8170SKalle Valo 				       u32 len, u32 request)
379bdcd8170SKalle Valo {
380bdcd8170SKalle Valo 	struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
381bdcd8170SKalle Valo 	u8  *tbuf = NULL;
382bdcd8170SKalle Valo 	int ret;
383bdcd8170SKalle Valo 	bool bounced = false;
384bdcd8170SKalle Valo 
385bdcd8170SKalle Valo 	if (request & HIF_BLOCK_BASIS)
386bdcd8170SKalle Valo 		len = round_down(len, HIF_MBOX_BLOCK_SIZE);
387bdcd8170SKalle Valo 
388bdcd8170SKalle Valo 	if (buf_needs_bounce(buf)) {
389bdcd8170SKalle Valo 		if (!ar_sdio->dma_buffer)
390bdcd8170SKalle Valo 			return -ENOMEM;
391bdcd8170SKalle Valo 		tbuf = ar_sdio->dma_buffer;
392bdcd8170SKalle Valo 		memcpy(tbuf, buf, len);
393bdcd8170SKalle Valo 		bounced = true;
394bdcd8170SKalle Valo 	} else
395bdcd8170SKalle Valo 		tbuf = buf;
396bdcd8170SKalle Valo 
397bdcd8170SKalle Valo 	sdio_claim_host(ar_sdio->func);
398da220695SVasanthakumar Thiagarajan 	ret = ath6kl_sdio_io(ar_sdio->func, request, addr, tbuf, len);
399da220695SVasanthakumar Thiagarajan 	if ((request & HIF_READ) && bounced)
400bdcd8170SKalle Valo 		memcpy(buf, tbuf, len);
401bdcd8170SKalle Valo 	sdio_release_host(ar_sdio->func);
402bdcd8170SKalle Valo 
403bdcd8170SKalle Valo 	return ret;
404bdcd8170SKalle Valo }
405bdcd8170SKalle Valo 
406bdcd8170SKalle Valo static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio,
407bdcd8170SKalle Valo 				      struct bus_request *req)
408bdcd8170SKalle Valo {
409bdcd8170SKalle Valo 	if (req->scat_req)
410bdcd8170SKalle Valo 		ath6kl_sdio_scat_rw(ar_sdio, req);
411bdcd8170SKalle Valo 	else {
412bdcd8170SKalle Valo 		void *context;
413bdcd8170SKalle Valo 		int status;
414bdcd8170SKalle Valo 
415bdcd8170SKalle Valo 		status = ath6kl_sdio_read_write_sync(ar_sdio->ar, req->address,
416bdcd8170SKalle Valo 						     req->buffer, req->length,
417bdcd8170SKalle Valo 						     req->request);
418bdcd8170SKalle Valo 		context = req->packet;
419bdcd8170SKalle Valo 		ath6kl_sdio_free_bus_req(ar_sdio, req);
420bdcd8170SKalle Valo 		ath6kldev_rw_comp_handler(context, status);
421bdcd8170SKalle Valo 	}
422bdcd8170SKalle Valo }
423bdcd8170SKalle Valo 
424bdcd8170SKalle Valo static void ath6kl_sdio_write_async_work(struct work_struct *work)
425bdcd8170SKalle Valo {
426bdcd8170SKalle Valo 	struct ath6kl_sdio *ar_sdio;
427bdcd8170SKalle Valo 	unsigned long flags;
428bdcd8170SKalle Valo 	struct bus_request *req, *tmp_req;
429bdcd8170SKalle Valo 
430bdcd8170SKalle Valo 	ar_sdio = container_of(work, struct ath6kl_sdio, wr_async_work);
431bdcd8170SKalle Valo 	sdio_claim_host(ar_sdio->func);
432bdcd8170SKalle Valo 
433bdcd8170SKalle Valo 	spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
434bdcd8170SKalle Valo 	list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) {
435bdcd8170SKalle Valo 		list_del(&req->list);
436bdcd8170SKalle Valo 		spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
437bdcd8170SKalle Valo 		__ath6kl_sdio_write_async(ar_sdio, req);
438bdcd8170SKalle Valo 		spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
439bdcd8170SKalle Valo 	}
440bdcd8170SKalle Valo 	spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
441bdcd8170SKalle Valo 
442bdcd8170SKalle Valo 	sdio_release_host(ar_sdio->func);
443bdcd8170SKalle Valo }
444bdcd8170SKalle Valo 
445bdcd8170SKalle Valo static void ath6kl_sdio_irq_handler(struct sdio_func *func)
446bdcd8170SKalle Valo {
447bdcd8170SKalle Valo 	int status;
448bdcd8170SKalle Valo 	struct ath6kl_sdio *ar_sdio;
449bdcd8170SKalle Valo 
450bdcd8170SKalle Valo 	ar_sdio = sdio_get_drvdata(func);
451bdcd8170SKalle Valo 	atomic_set(&ar_sdio->irq_handling, 1);
452bdcd8170SKalle Valo 
453bdcd8170SKalle Valo 	/*
454bdcd8170SKalle Valo 	 * Release the host during interrups so we can pick it back up when
455bdcd8170SKalle Valo 	 * we process commands.
456bdcd8170SKalle Valo 	 */
457bdcd8170SKalle Valo 	sdio_release_host(ar_sdio->func);
458bdcd8170SKalle Valo 
459bdcd8170SKalle Valo 	status = ath6kldev_intr_bh_handler(ar_sdio->ar);
460bdcd8170SKalle Valo 	sdio_claim_host(ar_sdio->func);
461bdcd8170SKalle Valo 	atomic_set(&ar_sdio->irq_handling, 0);
462bdcd8170SKalle Valo 	WARN_ON(status && status != -ECANCELED);
463bdcd8170SKalle Valo }
464bdcd8170SKalle Valo 
465bdcd8170SKalle Valo static int ath6kl_sdio_power_on(struct ath6kl_sdio *ar_sdio)
466bdcd8170SKalle Valo {
467bdcd8170SKalle Valo 	struct sdio_func *func = ar_sdio->func;
468bdcd8170SKalle Valo 	int ret = 0;
469bdcd8170SKalle Valo 
470bdcd8170SKalle Valo 	if (!ar_sdio->is_disabled)
471bdcd8170SKalle Valo 		return 0;
472bdcd8170SKalle Valo 
473bdcd8170SKalle Valo 	sdio_claim_host(func);
474bdcd8170SKalle Valo 
475bdcd8170SKalle Valo 	ret = sdio_enable_func(func);
476bdcd8170SKalle Valo 	if (ret) {
477bdcd8170SKalle Valo 		ath6kl_err("Unable to enable sdio func: %d)\n", ret);
478bdcd8170SKalle Valo 		sdio_release_host(func);
479bdcd8170SKalle Valo 		return ret;
480bdcd8170SKalle Valo 	}
481bdcd8170SKalle Valo 
482bdcd8170SKalle Valo 	sdio_release_host(func);
483bdcd8170SKalle Valo 
484bdcd8170SKalle Valo 	/*
485bdcd8170SKalle Valo 	 * Wait for hardware to initialise. It should take a lot less than
486bdcd8170SKalle Valo 	 * 10 ms but let's be conservative here.
487bdcd8170SKalle Valo 	 */
488bdcd8170SKalle Valo 	msleep(10);
489bdcd8170SKalle Valo 
490bdcd8170SKalle Valo 	ar_sdio->is_disabled = false;
491bdcd8170SKalle Valo 
492bdcd8170SKalle Valo 	return ret;
493bdcd8170SKalle Valo }
494bdcd8170SKalle Valo 
495bdcd8170SKalle Valo static int ath6kl_sdio_power_off(struct ath6kl_sdio *ar_sdio)
496bdcd8170SKalle Valo {
497bdcd8170SKalle Valo 	int ret;
498bdcd8170SKalle Valo 
499bdcd8170SKalle Valo 	if (ar_sdio->is_disabled)
500bdcd8170SKalle Valo 		return 0;
501bdcd8170SKalle Valo 
502bdcd8170SKalle Valo 	/* Disable the card */
503bdcd8170SKalle Valo 	sdio_claim_host(ar_sdio->func);
504bdcd8170SKalle Valo 	ret = sdio_disable_func(ar_sdio->func);
505bdcd8170SKalle Valo 	sdio_release_host(ar_sdio->func);
506bdcd8170SKalle Valo 
507bdcd8170SKalle Valo 	if (ret)
508bdcd8170SKalle Valo 		return ret;
509bdcd8170SKalle Valo 
510bdcd8170SKalle Valo 	ar_sdio->is_disabled = true;
511bdcd8170SKalle Valo 
512bdcd8170SKalle Valo 	return ret;
513bdcd8170SKalle Valo }
514bdcd8170SKalle Valo 
515bdcd8170SKalle Valo static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer,
516bdcd8170SKalle Valo 				   u32 length, u32 request,
517bdcd8170SKalle Valo 				   struct htc_packet *packet)
518bdcd8170SKalle Valo {
519bdcd8170SKalle Valo 	struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
520bdcd8170SKalle Valo 	struct bus_request *bus_req;
521bdcd8170SKalle Valo 	unsigned long flags;
522bdcd8170SKalle Valo 
523bdcd8170SKalle Valo 	bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
524bdcd8170SKalle Valo 
525bdcd8170SKalle Valo 	if (!bus_req)
526bdcd8170SKalle Valo 		return -ENOMEM;
527bdcd8170SKalle Valo 
528bdcd8170SKalle Valo 	bus_req->address = address;
529bdcd8170SKalle Valo 	bus_req->buffer = buffer;
530bdcd8170SKalle Valo 	bus_req->length = length;
531bdcd8170SKalle Valo 	bus_req->request = request;
532bdcd8170SKalle Valo 	bus_req->packet = packet;
533bdcd8170SKalle Valo 
534bdcd8170SKalle Valo 	spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
535bdcd8170SKalle Valo 	list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq);
536bdcd8170SKalle Valo 	spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
537bdcd8170SKalle Valo 	queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
538bdcd8170SKalle Valo 
539bdcd8170SKalle Valo 	return 0;
540bdcd8170SKalle Valo }
541bdcd8170SKalle Valo 
542bdcd8170SKalle Valo static void ath6kl_sdio_irq_enable(struct ath6kl *ar)
543bdcd8170SKalle Valo {
544bdcd8170SKalle Valo 	struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
545bdcd8170SKalle Valo 	int ret;
546bdcd8170SKalle Valo 
547bdcd8170SKalle Valo 	sdio_claim_host(ar_sdio->func);
548bdcd8170SKalle Valo 
549bdcd8170SKalle Valo 	/* Register the isr */
550bdcd8170SKalle Valo 	ret =  sdio_claim_irq(ar_sdio->func, ath6kl_sdio_irq_handler);
551bdcd8170SKalle Valo 	if (ret)
552bdcd8170SKalle Valo 		ath6kl_err("Failed to claim sdio irq: %d\n", ret);
553bdcd8170SKalle Valo 
554bdcd8170SKalle Valo 	sdio_release_host(ar_sdio->func);
555bdcd8170SKalle Valo }
556bdcd8170SKalle Valo 
557bdcd8170SKalle Valo static void ath6kl_sdio_irq_disable(struct ath6kl *ar)
558bdcd8170SKalle Valo {
559bdcd8170SKalle Valo 	struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
560bdcd8170SKalle Valo 	int ret;
561bdcd8170SKalle Valo 
562bdcd8170SKalle Valo 	sdio_claim_host(ar_sdio->func);
563bdcd8170SKalle Valo 
564bdcd8170SKalle Valo 	/* Mask our function IRQ */
565bdcd8170SKalle Valo 	while (atomic_read(&ar_sdio->irq_handling)) {
566bdcd8170SKalle Valo 		sdio_release_host(ar_sdio->func);
567bdcd8170SKalle Valo 		schedule_timeout(HZ / 10);
568bdcd8170SKalle Valo 		sdio_claim_host(ar_sdio->func);
569bdcd8170SKalle Valo 	}
570bdcd8170SKalle Valo 
571bdcd8170SKalle Valo 	ret = sdio_release_irq(ar_sdio->func);
572bdcd8170SKalle Valo 	if (ret)
573bdcd8170SKalle Valo 		ath6kl_err("Failed to release sdio irq: %d\n", ret);
574bdcd8170SKalle Valo 
575bdcd8170SKalle Valo 	sdio_release_host(ar_sdio->func);
576bdcd8170SKalle Valo }
577bdcd8170SKalle Valo 
578bdcd8170SKalle Valo static struct hif_scatter_req *ath6kl_sdio_scatter_req_get(struct ath6kl *ar)
579bdcd8170SKalle Valo {
580bdcd8170SKalle Valo 	struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
581bdcd8170SKalle Valo 	struct hif_scatter_req *node = NULL;
582bdcd8170SKalle Valo 	unsigned long flag;
583bdcd8170SKalle Valo 
584bdcd8170SKalle Valo 	spin_lock_irqsave(&ar_sdio->scat_lock, flag);
585bdcd8170SKalle Valo 
586bdcd8170SKalle Valo 	if (!list_empty(&ar_sdio->scat_req)) {
587bdcd8170SKalle Valo 		node = list_first_entry(&ar_sdio->scat_req,
588bdcd8170SKalle Valo 					struct hif_scatter_req, list);
589bdcd8170SKalle Valo 		list_del(&node->list);
590bdcd8170SKalle Valo 	}
591bdcd8170SKalle Valo 
592bdcd8170SKalle Valo 	spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
593bdcd8170SKalle Valo 
594bdcd8170SKalle Valo 	return node;
595bdcd8170SKalle Valo }
596bdcd8170SKalle Valo 
597bdcd8170SKalle Valo static void ath6kl_sdio_scatter_req_add(struct ath6kl *ar,
598bdcd8170SKalle Valo 					struct hif_scatter_req *s_req)
599bdcd8170SKalle Valo {
600bdcd8170SKalle Valo 	struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
601bdcd8170SKalle Valo 	unsigned long flag;
602bdcd8170SKalle Valo 
603bdcd8170SKalle Valo 	spin_lock_irqsave(&ar_sdio->scat_lock, flag);
604bdcd8170SKalle Valo 
605bdcd8170SKalle Valo 	list_add_tail(&s_req->list, &ar_sdio->scat_req);
606bdcd8170SKalle Valo 
607bdcd8170SKalle Valo 	spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
608bdcd8170SKalle Valo 
609bdcd8170SKalle Valo }
610bdcd8170SKalle Valo 
611c630d18aSVasanthakumar Thiagarajan /* scatter gather read write request */
612c630d18aSVasanthakumar Thiagarajan static int ath6kl_sdio_async_rw_scatter(struct ath6kl *ar,
613c630d18aSVasanthakumar Thiagarajan 					struct hif_scatter_req *scat_req)
614c630d18aSVasanthakumar Thiagarajan {
615c630d18aSVasanthakumar Thiagarajan 	struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
616c630d18aSVasanthakumar Thiagarajan 	u32 request = scat_req->req;
617c630d18aSVasanthakumar Thiagarajan 	int status = 0;
618c630d18aSVasanthakumar Thiagarajan 	unsigned long flags;
619c630d18aSVasanthakumar Thiagarajan 
620c630d18aSVasanthakumar Thiagarajan 	if (!scat_req->len)
621c630d18aSVasanthakumar Thiagarajan 		return -EINVAL;
622c630d18aSVasanthakumar Thiagarajan 
623c630d18aSVasanthakumar Thiagarajan 	ath6kl_dbg(ATH6KL_DBG_SCATTER,
624c630d18aSVasanthakumar Thiagarajan 		"hif-scatter: total len: %d scatter entries: %d\n",
625c630d18aSVasanthakumar Thiagarajan 		scat_req->len, scat_req->scat_entries);
626c630d18aSVasanthakumar Thiagarajan 
627c630d18aSVasanthakumar Thiagarajan 	if (request & HIF_SYNCHRONOUS) {
628c630d18aSVasanthakumar Thiagarajan 		sdio_claim_host(ar_sdio->func);
629d4df7890SVasanthakumar Thiagarajan 		status = ath6kl_sdio_scat_rw(ar_sdio, scat_req->busrequest);
630c630d18aSVasanthakumar Thiagarajan 		sdio_release_host(ar_sdio->func);
631c630d18aSVasanthakumar Thiagarajan 	} else {
632c630d18aSVasanthakumar Thiagarajan 		spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
633d4df7890SVasanthakumar Thiagarajan 		list_add_tail(&scat_req->busrequest->list, &ar_sdio->wr_asyncq);
634c630d18aSVasanthakumar Thiagarajan 		spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
635c630d18aSVasanthakumar Thiagarajan 		queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
636c630d18aSVasanthakumar Thiagarajan 	}
637c630d18aSVasanthakumar Thiagarajan 
638c630d18aSVasanthakumar Thiagarajan 	return status;
639c630d18aSVasanthakumar Thiagarajan }
640c630d18aSVasanthakumar Thiagarajan 
64118a0f93eSVasanthakumar Thiagarajan /* clean up scatter support */
64218a0f93eSVasanthakumar Thiagarajan static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar)
64318a0f93eSVasanthakumar Thiagarajan {
64418a0f93eSVasanthakumar Thiagarajan 	struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
64518a0f93eSVasanthakumar Thiagarajan 	struct hif_scatter_req *s_req, *tmp_req;
64618a0f93eSVasanthakumar Thiagarajan 	unsigned long flag;
64718a0f93eSVasanthakumar Thiagarajan 
64818a0f93eSVasanthakumar Thiagarajan 	/* empty the free list */
64918a0f93eSVasanthakumar Thiagarajan 	spin_lock_irqsave(&ar_sdio->scat_lock, flag);
65018a0f93eSVasanthakumar Thiagarajan 	list_for_each_entry_safe(s_req, tmp_req, &ar_sdio->scat_req, list) {
65118a0f93eSVasanthakumar Thiagarajan 		list_del(&s_req->list);
65218a0f93eSVasanthakumar Thiagarajan 		spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
65318a0f93eSVasanthakumar Thiagarajan 
65418a0f93eSVasanthakumar Thiagarajan 		if (s_req->busrequest)
65518a0f93eSVasanthakumar Thiagarajan 			ath6kl_sdio_free_bus_req(ar_sdio, s_req->busrequest);
65618a0f93eSVasanthakumar Thiagarajan 		kfree(s_req->virt_dma_buf);
65718a0f93eSVasanthakumar Thiagarajan 		kfree(s_req->sgentries);
65818a0f93eSVasanthakumar Thiagarajan 		kfree(s_req);
65918a0f93eSVasanthakumar Thiagarajan 
66018a0f93eSVasanthakumar Thiagarajan 		spin_lock_irqsave(&ar_sdio->scat_lock, flag);
66118a0f93eSVasanthakumar Thiagarajan 	}
66218a0f93eSVasanthakumar Thiagarajan 	spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
66318a0f93eSVasanthakumar Thiagarajan }
66418a0f93eSVasanthakumar Thiagarajan 
66518a0f93eSVasanthakumar Thiagarajan /* setup of HIF scatter resources */
66618a0f93eSVasanthakumar Thiagarajan static int ath6kl_sdio_enable_scatter(struct ath6kl *ar,
66718a0f93eSVasanthakumar Thiagarajan 				      struct hif_dev_scat_sup_info *pinfo)
66818a0f93eSVasanthakumar Thiagarajan {
66918a0f93eSVasanthakumar Thiagarajan 	struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
670cfeab10bSVasanthakumar Thiagarajan 	int ret;
671cfeab10bSVasanthakumar Thiagarajan 	bool virt_scat = false;
67218a0f93eSVasanthakumar Thiagarajan 
67318a0f93eSVasanthakumar Thiagarajan 	/* check if host supports scatter and it meets our requirements */
67418a0f93eSVasanthakumar Thiagarajan 	if (ar_sdio->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) {
675cfeab10bSVasanthakumar Thiagarajan 		ath6kl_err("host only supports scatter of :%d entries, need: %d\n",
67618a0f93eSVasanthakumar Thiagarajan 			   ar_sdio->func->card->host->max_segs,
67718a0f93eSVasanthakumar Thiagarajan 			   MAX_SCATTER_ENTRIES_PER_REQ);
678cfeab10bSVasanthakumar Thiagarajan 		virt_scat = true;
67918a0f93eSVasanthakumar Thiagarajan 	}
68018a0f93eSVasanthakumar Thiagarajan 
681cfeab10bSVasanthakumar Thiagarajan 	if (!virt_scat) {
68218a0f93eSVasanthakumar Thiagarajan 		ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio,
68318a0f93eSVasanthakumar Thiagarajan 				MAX_SCATTER_ENTRIES_PER_REQ,
684cfeab10bSVasanthakumar Thiagarajan 				MAX_SCATTER_REQUESTS, virt_scat);
685cfeab10bSVasanthakumar Thiagarajan 
686cfeab10bSVasanthakumar Thiagarajan 		if (!ret) {
687cfeab10bSVasanthakumar Thiagarajan 			ath6kl_dbg(ATH6KL_DBG_ANY,
688cfeab10bSVasanthakumar Thiagarajan 				   "hif-scatter enabled: max scatter req : %d entries: %d\n",
689cfeab10bSVasanthakumar Thiagarajan 				   MAX_SCATTER_REQUESTS,
690cfeab10bSVasanthakumar Thiagarajan 				   MAX_SCATTER_ENTRIES_PER_REQ);
691cfeab10bSVasanthakumar Thiagarajan 
692cfeab10bSVasanthakumar Thiagarajan 			pinfo->max_scat_entries = MAX_SCATTER_ENTRIES_PER_REQ;
693cfeab10bSVasanthakumar Thiagarajan 			pinfo->max_xfer_szper_scatreq =
694cfeab10bSVasanthakumar Thiagarajan 						MAX_SCATTER_REQ_TRANSFER_SIZE;
695cfeab10bSVasanthakumar Thiagarajan 		} else {
696cfeab10bSVasanthakumar Thiagarajan 			ath6kl_sdio_cleanup_scatter(ar);
697cfeab10bSVasanthakumar Thiagarajan 			ath6kl_warn("hif scatter resource setup failed, trying virtual scatter method\n");
698cfeab10bSVasanthakumar Thiagarajan 		}
699cfeab10bSVasanthakumar Thiagarajan 	}
700cfeab10bSVasanthakumar Thiagarajan 
701cfeab10bSVasanthakumar Thiagarajan 	if (virt_scat || ret) {
702cfeab10bSVasanthakumar Thiagarajan 		ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio,
703cfeab10bSVasanthakumar Thiagarajan 				ATH6KL_SCATTER_ENTRIES_PER_REQ,
704cfeab10bSVasanthakumar Thiagarajan 				ATH6KL_SCATTER_REQS, virt_scat);
705cfeab10bSVasanthakumar Thiagarajan 
70618a0f93eSVasanthakumar Thiagarajan 		if (ret) {
707cfeab10bSVasanthakumar Thiagarajan 			ath6kl_err("failed to alloc virtual scatter resources !\n");
70818a0f93eSVasanthakumar Thiagarajan 			ath6kl_sdio_cleanup_scatter(ar);
70918a0f93eSVasanthakumar Thiagarajan 			return ret;
71018a0f93eSVasanthakumar Thiagarajan 		}
71118a0f93eSVasanthakumar Thiagarajan 
712cfeab10bSVasanthakumar Thiagarajan 		ath6kl_dbg(ATH6KL_DBG_ANY,
713cfeab10bSVasanthakumar Thiagarajan 			   "Vitual scatter enabled, max_scat_req:%d, entries:%d\n",
714cfeab10bSVasanthakumar Thiagarajan 			   ATH6KL_SCATTER_REQS, ATH6KL_SCATTER_ENTRIES_PER_REQ);
715cfeab10bSVasanthakumar Thiagarajan 
716cfeab10bSVasanthakumar Thiagarajan 		pinfo->max_scat_entries = ATH6KL_SCATTER_ENTRIES_PER_REQ;
717cfeab10bSVasanthakumar Thiagarajan 		pinfo->max_xfer_szper_scatreq =
718cfeab10bSVasanthakumar Thiagarajan 					ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER;
719cfeab10bSVasanthakumar Thiagarajan 	}
720cfeab10bSVasanthakumar Thiagarajan 
72118a0f93eSVasanthakumar Thiagarajan 	return 0;
72218a0f93eSVasanthakumar Thiagarajan }
72318a0f93eSVasanthakumar Thiagarajan 
724bdcd8170SKalle Valo static const struct ath6kl_hif_ops ath6kl_sdio_ops = {
725bdcd8170SKalle Valo 	.read_write_sync = ath6kl_sdio_read_write_sync,
726bdcd8170SKalle Valo 	.write_async = ath6kl_sdio_write_async,
727bdcd8170SKalle Valo 	.irq_enable = ath6kl_sdio_irq_enable,
728bdcd8170SKalle Valo 	.irq_disable = ath6kl_sdio_irq_disable,
729bdcd8170SKalle Valo 	.scatter_req_get = ath6kl_sdio_scatter_req_get,
730bdcd8170SKalle Valo 	.scatter_req_add = ath6kl_sdio_scatter_req_add,
731bdcd8170SKalle Valo 	.enable_scatter = ath6kl_sdio_enable_scatter,
732f74a7361SVasanthakumar Thiagarajan 	.scat_req_rw = ath6kl_sdio_async_rw_scatter,
733bdcd8170SKalle Valo 	.cleanup_scatter = ath6kl_sdio_cleanup_scatter,
734bdcd8170SKalle Valo };
735bdcd8170SKalle Valo 
736bdcd8170SKalle Valo static int ath6kl_sdio_probe(struct sdio_func *func,
737bdcd8170SKalle Valo 			     const struct sdio_device_id *id)
738bdcd8170SKalle Valo {
739bdcd8170SKalle Valo 	int ret;
740bdcd8170SKalle Valo 	struct ath6kl_sdio *ar_sdio;
741bdcd8170SKalle Valo 	struct ath6kl *ar;
742bdcd8170SKalle Valo 	int count;
743bdcd8170SKalle Valo 
744bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC,
745bdcd8170SKalle Valo 		   "%s: func: 0x%X, vendor id: 0x%X, dev id: 0x%X, block size: 0x%X/0x%X\n",
746bdcd8170SKalle Valo 		   __func__, func->num, func->vendor,
747bdcd8170SKalle Valo 		   func->device, func->max_blksize, func->cur_blksize);
748bdcd8170SKalle Valo 
749bdcd8170SKalle Valo 	ar_sdio = kzalloc(sizeof(struct ath6kl_sdio), GFP_KERNEL);
750bdcd8170SKalle Valo 	if (!ar_sdio)
751bdcd8170SKalle Valo 		return -ENOMEM;
752bdcd8170SKalle Valo 
753bdcd8170SKalle Valo 	ar_sdio->dma_buffer = kzalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL);
754bdcd8170SKalle Valo 	if (!ar_sdio->dma_buffer) {
755bdcd8170SKalle Valo 		ret = -ENOMEM;
756bdcd8170SKalle Valo 		goto err_hif;
757bdcd8170SKalle Valo 	}
758bdcd8170SKalle Valo 
759bdcd8170SKalle Valo 	ar_sdio->func = func;
760bdcd8170SKalle Valo 	sdio_set_drvdata(func, ar_sdio);
761bdcd8170SKalle Valo 
762bdcd8170SKalle Valo 	ar_sdio->id = id;
763bdcd8170SKalle Valo 	ar_sdio->is_disabled = true;
764bdcd8170SKalle Valo 
765bdcd8170SKalle Valo 	spin_lock_init(&ar_sdio->lock);
766bdcd8170SKalle Valo 	spin_lock_init(&ar_sdio->scat_lock);
767bdcd8170SKalle Valo 	spin_lock_init(&ar_sdio->wr_async_lock);
768bdcd8170SKalle Valo 
769bdcd8170SKalle Valo 	INIT_LIST_HEAD(&ar_sdio->scat_req);
770bdcd8170SKalle Valo 	INIT_LIST_HEAD(&ar_sdio->bus_req_freeq);
771bdcd8170SKalle Valo 	INIT_LIST_HEAD(&ar_sdio->wr_asyncq);
772bdcd8170SKalle Valo 
773bdcd8170SKalle Valo 	INIT_WORK(&ar_sdio->wr_async_work, ath6kl_sdio_write_async_work);
774bdcd8170SKalle Valo 
775bdcd8170SKalle Valo 	for (count = 0; count < BUS_REQUEST_MAX_NUM; count++)
776bdcd8170SKalle Valo 		ath6kl_sdio_free_bus_req(ar_sdio, &ar_sdio->bus_req[count]);
777bdcd8170SKalle Valo 
778bdcd8170SKalle Valo 	ar = ath6kl_core_alloc(&ar_sdio->func->dev);
779bdcd8170SKalle Valo 	if (!ar) {
780bdcd8170SKalle Valo 		ath6kl_err("Failed to alloc ath6kl core\n");
781bdcd8170SKalle Valo 		ret = -ENOMEM;
782bdcd8170SKalle Valo 		goto err_dma;
783bdcd8170SKalle Valo 	}
784bdcd8170SKalle Valo 
785bdcd8170SKalle Valo 	ar_sdio->ar = ar;
786bdcd8170SKalle Valo 	ar->hif_priv = ar_sdio;
787bdcd8170SKalle Valo 	ar->hif_ops = &ath6kl_sdio_ops;
788bdcd8170SKalle Valo 
789bdcd8170SKalle Valo 	ath6kl_sdio_set_mbox_info(ar);
790bdcd8170SKalle Valo 
791bdcd8170SKalle Valo 	sdio_claim_host(func);
792bdcd8170SKalle Valo 
793bdcd8170SKalle Valo 	if ((ar_sdio->id->device & MANUFACTURER_ID_ATH6KL_BASE_MASK) >=
794bdcd8170SKalle Valo 	    MANUFACTURER_ID_AR6003_BASE) {
795bdcd8170SKalle Valo 		/* enable 4-bit ASYNC interrupt on AR6003 or later */
796bdcd8170SKalle Valo 		ret = ath6kl_sdio_func0_cmd52_wr_byte(func->card,
797bdcd8170SKalle Valo 						CCCR_SDIO_IRQ_MODE_REG,
798bdcd8170SKalle Valo 						SDIO_IRQ_MODE_ASYNC_4BIT_IRQ);
799bdcd8170SKalle Valo 		if (ret) {
800bdcd8170SKalle Valo 			ath6kl_err("Failed to enable 4-bit async irq mode %d\n",
801bdcd8170SKalle Valo 				   ret);
802bdcd8170SKalle Valo 			sdio_release_host(func);
803bdcd8170SKalle Valo 			goto err_dma;
804bdcd8170SKalle Valo 		}
805bdcd8170SKalle Valo 
806bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_TRC, "4-bit async irq mode enabled\n");
807bdcd8170SKalle Valo 	}
808bdcd8170SKalle Valo 
809bdcd8170SKalle Valo 	/* give us some time to enable, in ms */
810bdcd8170SKalle Valo 	func->enable_timeout = 100;
811bdcd8170SKalle Valo 
812bdcd8170SKalle Valo 	sdio_release_host(func);
813bdcd8170SKalle Valo 
814bdcd8170SKalle Valo 	ret = ath6kl_sdio_power_on(ar_sdio);
815bdcd8170SKalle Valo 	if (ret)
816bdcd8170SKalle Valo 		goto err_dma;
817bdcd8170SKalle Valo 
818bdcd8170SKalle Valo 	sdio_claim_host(func);
819bdcd8170SKalle Valo 
820bdcd8170SKalle Valo 	ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE);
821bdcd8170SKalle Valo 	if (ret) {
822bdcd8170SKalle Valo 		ath6kl_err("Set sdio block size %d failed: %d)\n",
823bdcd8170SKalle Valo 			   HIF_MBOX_BLOCK_SIZE, ret);
824bdcd8170SKalle Valo 		sdio_release_host(func);
825bdcd8170SKalle Valo 		goto err_off;
826bdcd8170SKalle Valo 	}
827bdcd8170SKalle Valo 
828bdcd8170SKalle Valo 	sdio_release_host(func);
829bdcd8170SKalle Valo 
830bdcd8170SKalle Valo 	ret = ath6kl_core_init(ar);
831bdcd8170SKalle Valo 	if (ret) {
832bdcd8170SKalle Valo 		ath6kl_err("Failed to init ath6kl core\n");
833bdcd8170SKalle Valo 		goto err_off;
834bdcd8170SKalle Valo 	}
835bdcd8170SKalle Valo 
836bdcd8170SKalle Valo 	return ret;
837bdcd8170SKalle Valo 
838bdcd8170SKalle Valo err_off:
839bdcd8170SKalle Valo 	ath6kl_sdio_power_off(ar_sdio);
840bdcd8170SKalle Valo err_dma:
841bdcd8170SKalle Valo 	kfree(ar_sdio->dma_buffer);
842bdcd8170SKalle Valo err_hif:
843bdcd8170SKalle Valo 	kfree(ar_sdio);
844bdcd8170SKalle Valo 
845bdcd8170SKalle Valo 	return ret;
846bdcd8170SKalle Valo }
847bdcd8170SKalle Valo 
848bdcd8170SKalle Valo static void ath6kl_sdio_remove(struct sdio_func *func)
849bdcd8170SKalle Valo {
850bdcd8170SKalle Valo 	struct ath6kl_sdio *ar_sdio;
851bdcd8170SKalle Valo 
852bdcd8170SKalle Valo 	ar_sdio = sdio_get_drvdata(func);
853bdcd8170SKalle Valo 
854bdcd8170SKalle Valo 	ath6kl_stop_txrx(ar_sdio->ar);
855bdcd8170SKalle Valo 	cancel_work_sync(&ar_sdio->wr_async_work);
856bdcd8170SKalle Valo 
857bdcd8170SKalle Valo 	ath6kl_unavail_ev(ar_sdio->ar);
858bdcd8170SKalle Valo 
859bdcd8170SKalle Valo 	ath6kl_sdio_power_off(ar_sdio);
860bdcd8170SKalle Valo 
861bdcd8170SKalle Valo 	kfree(ar_sdio->dma_buffer);
862bdcd8170SKalle Valo 	kfree(ar_sdio);
863bdcd8170SKalle Valo }
864bdcd8170SKalle Valo 
865bdcd8170SKalle Valo static const struct sdio_device_id ath6kl_sdio_devices[] = {
866bdcd8170SKalle Valo 	{SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))},
867bdcd8170SKalle Valo 	{SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))},
868bdcd8170SKalle Valo 	{},
869bdcd8170SKalle Valo };
870bdcd8170SKalle Valo 
871bdcd8170SKalle Valo MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices);
872bdcd8170SKalle Valo 
873bdcd8170SKalle Valo static struct sdio_driver ath6kl_sdio_driver = {
874bdcd8170SKalle Valo 	.name = "ath6kl_sdio",
875bdcd8170SKalle Valo 	.id_table = ath6kl_sdio_devices,
876bdcd8170SKalle Valo 	.probe = ath6kl_sdio_probe,
877bdcd8170SKalle Valo 	.remove = ath6kl_sdio_remove,
878bdcd8170SKalle Valo };
879bdcd8170SKalle Valo 
880bdcd8170SKalle Valo static int __init ath6kl_sdio_init(void)
881bdcd8170SKalle Valo {
882bdcd8170SKalle Valo 	int ret;
883bdcd8170SKalle Valo 
884bdcd8170SKalle Valo 	ret = sdio_register_driver(&ath6kl_sdio_driver);
885bdcd8170SKalle Valo 	if (ret)
886bdcd8170SKalle Valo 		ath6kl_err("sdio driver registration failed: %d\n", ret);
887bdcd8170SKalle Valo 
888bdcd8170SKalle Valo 	return ret;
889bdcd8170SKalle Valo }
890bdcd8170SKalle Valo 
891bdcd8170SKalle Valo static void __exit ath6kl_sdio_exit(void)
892bdcd8170SKalle Valo {
893bdcd8170SKalle Valo 	sdio_unregister_driver(&ath6kl_sdio_driver);
894bdcd8170SKalle Valo }
895bdcd8170SKalle Valo 
896bdcd8170SKalle Valo module_init(ath6kl_sdio_init);
897bdcd8170SKalle Valo module_exit(ath6kl_sdio_exit);
898bdcd8170SKalle Valo 
899bdcd8170SKalle Valo MODULE_AUTHOR("Atheros Communications, Inc.");
900bdcd8170SKalle Valo MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices");
901bdcd8170SKalle Valo MODULE_LICENSE("Dual BSD/GPL");
902bdcd8170SKalle Valo 
903bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_OTP_FILE);
904bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE);
905bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE);
906bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE);
907bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE);
908bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_OTP_FILE);
909bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE);
910bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE);
911bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE);
912bdcd8170SKalle Valo MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE);
913