1 2 /* 3 * Copyright (c) 2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 20 21 #include <linux/moduleparam.h> 22 #include <linux/errno.h> 23 #include <linux/export.h> 24 #include <linux/of.h> 25 #include <linux/mmc/sdio_func.h> 26 #include <linux/vmalloc.h> 27 28 #include "core.h" 29 #include "cfg80211.h" 30 #include "target.h" 31 #include "debug.h" 32 #include "hif-ops.h" 33 #include "htc-ops.h" 34 35 static const struct ath6kl_hw hw_list[] = { 36 { 37 .id = AR6003_HW_2_0_VERSION, 38 .name = "ar6003 hw 2.0", 39 .dataset_patch_addr = 0x57e884, 40 .app_load_addr = 0x543180, 41 .board_ext_data_addr = 0x57e500, 42 .reserved_ram_size = 6912, 43 .refclk_hz = 26000000, 44 .uarttx_pin = 8, 45 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR, 46 47 /* hw2.0 needs override address hardcoded */ 48 .app_start_override_addr = 0x944C00, 49 50 .fw = { 51 .dir = AR6003_HW_2_0_FW_DIR, 52 .otp = AR6003_HW_2_0_OTP_FILE, 53 .fw = AR6003_HW_2_0_FIRMWARE_FILE, 54 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE, 55 .patch = AR6003_HW_2_0_PATCH_FILE, 56 }, 57 58 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE, 59 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE, 60 }, 61 { 62 .id = AR6003_HW_2_1_1_VERSION, 63 .name = "ar6003 hw 2.1.1", 64 .dataset_patch_addr = 0x57ff74, 65 .app_load_addr = 0x1234, 66 .board_ext_data_addr = 0x542330, 67 .reserved_ram_size = 512, 68 .refclk_hz = 26000000, 69 .uarttx_pin = 8, 70 .testscript_addr = 0x57ef74, 71 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR, 72 73 .fw = { 74 .dir = AR6003_HW_2_1_1_FW_DIR, 75 .otp = AR6003_HW_2_1_1_OTP_FILE, 76 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE, 77 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE, 78 .patch = AR6003_HW_2_1_1_PATCH_FILE, 79 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE, 80 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE, 81 }, 82 83 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE, 84 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE, 85 }, 86 { 87 .id = AR6004_HW_1_0_VERSION, 88 .name = "ar6004 hw 1.0", 89 .dataset_patch_addr = 0x57e884, 90 .app_load_addr = 0x1234, 91 .board_ext_data_addr = 0x437000, 92 .reserved_ram_size = 19456, 93 .board_addr = 0x433900, 94 .refclk_hz = 26000000, 95 .uarttx_pin = 11, 96 .flags = 0, 97 98 .fw = { 99 .dir = AR6004_HW_1_0_FW_DIR, 100 .fw = AR6004_HW_1_0_FIRMWARE_FILE, 101 }, 102 103 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE, 104 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE, 105 }, 106 { 107 .id = AR6004_HW_1_1_VERSION, 108 .name = "ar6004 hw 1.1", 109 .dataset_patch_addr = 0x57e884, 110 .app_load_addr = 0x1234, 111 .board_ext_data_addr = 0x437000, 112 .reserved_ram_size = 11264, 113 .board_addr = 0x43d400, 114 .refclk_hz = 40000000, 115 .uarttx_pin = 11, 116 .flags = 0, 117 .fw = { 118 .dir = AR6004_HW_1_1_FW_DIR, 119 .fw = AR6004_HW_1_1_FIRMWARE_FILE, 120 }, 121 122 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, 123 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, 124 }, 125 { 126 .id = AR6004_HW_1_2_VERSION, 127 .name = "ar6004 hw 1.2", 128 .dataset_patch_addr = 0x436ecc, 129 .app_load_addr = 0x1234, 130 .board_ext_data_addr = 0x437000, 131 .reserved_ram_size = 9216, 132 .board_addr = 0x435c00, 133 .refclk_hz = 40000000, 134 .uarttx_pin = 11, 135 .flags = 0, 136 137 .fw = { 138 .dir = AR6004_HW_1_2_FW_DIR, 139 .fw = AR6004_HW_1_2_FIRMWARE_FILE, 140 }, 141 .fw_board = AR6004_HW_1_2_BOARD_DATA_FILE, 142 .fw_default_board = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE, 143 }, 144 { 145 .id = AR6004_HW_1_3_VERSION, 146 .name = "ar6004 hw 1.3", 147 .dataset_patch_addr = 0x437860, 148 .app_load_addr = 0x1234, 149 .board_ext_data_addr = 0x437000, 150 .reserved_ram_size = 7168, 151 .board_addr = 0x436400, 152 .refclk_hz = 40000000, 153 .uarttx_pin = 11, 154 .flags = 0, 155 156 .fw = { 157 .dir = AR6004_HW_1_3_FW_DIR, 158 .fw = AR6004_HW_1_3_FIRMWARE_FILE, 159 }, 160 161 .fw_board = AR6004_HW_1_3_BOARD_DATA_FILE, 162 .fw_default_board = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE, 163 }, 164 }; 165 166 /* 167 * Include definitions here that can be used to tune the WLAN module 168 * behavior. Different customers can tune the behavior as per their needs, 169 * here. 170 */ 171 172 /* 173 * This configuration item enable/disable keepalive support. 174 * Keepalive support: In the absence of any data traffic to AP, null 175 * frames will be sent to the AP at periodic interval, to keep the association 176 * active. This configuration item defines the periodic interval. 177 * Use value of zero to disable keepalive support 178 * Default: 60 seconds 179 */ 180 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 181 182 /* 183 * This configuration item sets the value of disconnect timeout 184 * Firmware delays sending the disconnec event to the host for this 185 * timeout after is gets disconnected from the current AP. 186 * If the firmware successly roams within the disconnect timeout 187 * it sends a new connect event 188 */ 189 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 190 191 192 #define ATH6KL_DATA_OFFSET 64 193 struct sk_buff *ath6kl_buf_alloc(int size) 194 { 195 struct sk_buff *skb; 196 u16 reserved; 197 198 /* Add chacheline space at front and back of buffer */ 199 reserved = roundup((2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 200 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES, 4); 201 skb = dev_alloc_skb(size + reserved); 202 203 if (skb) 204 skb_reserve(skb, reserved - L1_CACHE_BYTES); 205 return skb; 206 } 207 208 void ath6kl_init_profile_info(struct ath6kl_vif *vif) 209 { 210 vif->ssid_len = 0; 211 memset(vif->ssid, 0, sizeof(vif->ssid)); 212 213 vif->dot11_auth_mode = OPEN_AUTH; 214 vif->auth_mode = NONE_AUTH; 215 vif->prwise_crypto = NONE_CRYPT; 216 vif->prwise_crypto_len = 0; 217 vif->grp_crypto = NONE_CRYPT; 218 vif->grp_crypto_len = 0; 219 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 220 memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); 221 memset(vif->bssid, 0, sizeof(vif->bssid)); 222 vif->bss_ch = 0; 223 } 224 225 static int ath6kl_set_host_app_area(struct ath6kl *ar) 226 { 227 u32 address, data; 228 struct host_app_area host_app_area; 229 230 /* Fetch the address of the host_app_area_s 231 * instance in the host interest area */ 232 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 233 address = TARG_VTOP(ar->target_type, address); 234 235 if (ath6kl_diag_read32(ar, address, &data)) 236 return -EIO; 237 238 address = TARG_VTOP(ar->target_type, data); 239 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); 240 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 241 sizeof(struct host_app_area))) 242 return -EIO; 243 244 return 0; 245 } 246 247 static inline void set_ac2_ep_map(struct ath6kl *ar, 248 u8 ac, 249 enum htc_endpoint_id ep) 250 { 251 ar->ac2ep_map[ac] = ep; 252 ar->ep2ac_map[ep] = ac; 253 } 254 255 /* connect to a service */ 256 static int ath6kl_connectservice(struct ath6kl *ar, 257 struct htc_service_connect_req *con_req, 258 char *desc) 259 { 260 int status; 261 struct htc_service_connect_resp response; 262 263 memset(&response, 0, sizeof(response)); 264 265 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 266 if (status) { 267 ath6kl_err("failed to connect to %s service status:%d\n", 268 desc, status); 269 return status; 270 } 271 272 switch (con_req->svc_id) { 273 case WMI_CONTROL_SVC: 274 if (test_bit(WMI_ENABLED, &ar->flag)) 275 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 276 ar->ctrl_ep = response.endpoint; 277 break; 278 case WMI_DATA_BE_SVC: 279 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 280 break; 281 case WMI_DATA_BK_SVC: 282 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 283 break; 284 case WMI_DATA_VI_SVC: 285 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 286 break; 287 case WMI_DATA_VO_SVC: 288 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 289 break; 290 default: 291 ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 292 return -EINVAL; 293 } 294 295 return 0; 296 } 297 298 static int ath6kl_init_service_ep(struct ath6kl *ar) 299 { 300 struct htc_service_connect_req connect; 301 302 memset(&connect, 0, sizeof(connect)); 303 304 /* these fields are the same for all service endpoints */ 305 connect.ep_cb.tx_comp_multi = ath6kl_tx_complete; 306 connect.ep_cb.rx = ath6kl_rx; 307 connect.ep_cb.rx_refill = ath6kl_rx_refill; 308 connect.ep_cb.tx_full = ath6kl_tx_queue_full; 309 310 /* 311 * Set the max queue depth so that our ath6kl_tx_queue_full handler 312 * gets called. 313 */ 314 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 315 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 316 if (!connect.ep_cb.rx_refill_thresh) 317 connect.ep_cb.rx_refill_thresh++; 318 319 /* connect to control service */ 320 connect.svc_id = WMI_CONTROL_SVC; 321 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 322 return -EIO; 323 324 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 325 326 /* 327 * Limit the HTC message size on the send path, although e can 328 * receive A-MSDU frames of 4K, we will only send ethernet-sized 329 * (802.3) frames on the send path. 330 */ 331 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 332 333 /* 334 * To reduce the amount of committed memory for larger A_MSDU 335 * frames, use the recv-alloc threshold mechanism for larger 336 * packets. 337 */ 338 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 339 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 340 341 /* 342 * For the remaining data services set the connection flag to 343 * reduce dribbling, if configured to do so. 344 */ 345 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 346 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 347 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 348 349 connect.svc_id = WMI_DATA_BE_SVC; 350 351 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 352 return -EIO; 353 354 /* connect to back-ground map this to WMI LOW_PRI */ 355 connect.svc_id = WMI_DATA_BK_SVC; 356 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 357 return -EIO; 358 359 /* connect to Video service, map this to HI PRI */ 360 connect.svc_id = WMI_DATA_VI_SVC; 361 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 362 return -EIO; 363 364 /* 365 * Connect to VO service, this is currently not mapped to a WMI 366 * priority stream due to historical reasons. WMI originally 367 * defined 3 priorities over 3 mailboxes We can change this when 368 * WMI is reworked so that priorities are not dependent on 369 * mailboxes. 370 */ 371 connect.svc_id = WMI_DATA_VO_SVC; 372 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 373 return -EIO; 374 375 return 0; 376 } 377 378 void ath6kl_init_control_info(struct ath6kl_vif *vif) 379 { 380 ath6kl_init_profile_info(vif); 381 vif->def_txkey_index = 0; 382 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 383 vif->ch_hint = 0; 384 } 385 386 /* 387 * Set HTC/Mbox operational parameters, this can only be called when the 388 * target is in the BMI phase. 389 */ 390 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 391 u8 htc_ctrl_buf) 392 { 393 int status; 394 u32 blk_size; 395 396 blk_size = ar->mbox_info.block_size; 397 398 if (htc_ctrl_buf) 399 blk_size |= ((u32)htc_ctrl_buf) << 16; 400 401 /* set the host interest area for the block size */ 402 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size); 403 if (status) { 404 ath6kl_err("bmi_write_memory for IO block size failed\n"); 405 goto out; 406 } 407 408 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 409 blk_size, 410 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 411 412 if (mbox_isr_yield_val) { 413 /* set the host interest area for the mbox ISR yield limit */ 414 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit, 415 mbox_isr_yield_val); 416 if (status) { 417 ath6kl_err("bmi_write_memory for yield limit failed\n"); 418 goto out; 419 } 420 } 421 422 out: 423 return status; 424 } 425 426 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) 427 { 428 int ret; 429 430 /* 431 * Configure the device for rx dot11 header rules. "0,0" are the 432 * default values. Required if checksum offload is needed. Set 433 * RxMetaVersion to 2. 434 */ 435 ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, 436 ar->rx_meta_ver, 0, 0); 437 if (ret) { 438 ath6kl_err("unable to set the rx frame format: %d\n", ret); 439 return ret; 440 } 441 442 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) { 443 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, 444 IGNORE_PS_FAIL_DURING_SCAN); 445 if (ret) { 446 ath6kl_err("unable to set power save fail event policy: %d\n", 447 ret); 448 return ret; 449 } 450 } 451 452 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) { 453 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, 454 WMI_FOLLOW_BARKER_IN_ERP); 455 if (ret) { 456 ath6kl_err("unable to set barker preamble policy: %d\n", 457 ret); 458 return ret; 459 } 460 } 461 462 ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, 463 WLAN_CONFIG_KEEP_ALIVE_INTERVAL); 464 if (ret) { 465 ath6kl_err("unable to set keep alive interval: %d\n", ret); 466 return ret; 467 } 468 469 ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, 470 WLAN_CONFIG_DISCONNECT_TIMEOUT); 471 if (ret) { 472 ath6kl_err("unable to set disconnect timeout: %d\n", ret); 473 return ret; 474 } 475 476 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) { 477 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED); 478 if (ret) { 479 ath6kl_err("unable to set txop bursting: %d\n", ret); 480 return ret; 481 } 482 } 483 484 if (ar->p2p && (ar->vif_max == 1 || idx)) { 485 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, 486 P2P_FLAG_CAPABILITIES_REQ | 487 P2P_FLAG_MACADDR_REQ | 488 P2P_FLAG_HMODEL_REQ); 489 if (ret) { 490 ath6kl_dbg(ATH6KL_DBG_TRC, 491 "failed to request P2P capabilities (%d) - assuming P2P not supported\n", 492 ret); 493 ar->p2p = false; 494 } 495 } 496 497 if (ar->p2p && (ar->vif_max == 1 || idx)) { 498 /* Enable Probe Request reporting for P2P */ 499 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 500 if (ret) { 501 ath6kl_dbg(ATH6KL_DBG_TRC, 502 "failed to enable Probe Request reporting (%d)\n", 503 ret); 504 } 505 } 506 507 return ret; 508 } 509 510 int ath6kl_configure_target(struct ath6kl *ar) 511 { 512 u32 param, ram_reserved_size; 513 u8 fw_iftype, fw_mode = 0, fw_submode = 0; 514 int i, status; 515 516 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG); 517 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) { 518 ath6kl_err("bmi_write_memory for uart debug failed\n"); 519 return -EIO; 520 } 521 522 /* 523 * Note: Even though the firmware interface type is 524 * chosen as BSS_STA for all three interfaces, can 525 * be configured to IBSS/AP as long as the fw submode 526 * remains normal mode (0 - AP, STA and IBSS). But 527 * due to an target assert in firmware only one interface is 528 * configured for now. 529 */ 530 fw_iftype = HI_OPTION_FW_MODE_BSS_STA; 531 532 for (i = 0; i < ar->vif_max; i++) 533 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); 534 535 /* 536 * Submodes when fw does not support dynamic interface 537 * switching: 538 * vif[0] - AP/STA/IBSS 539 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" 540 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" 541 * Otherwise, All the interface are initialized to p2p dev. 542 */ 543 544 if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, 545 ar->fw_capabilities)) { 546 for (i = 0; i < ar->vif_max; i++) 547 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 548 (i * HI_OPTION_FW_SUBMODE_BITS); 549 } else { 550 for (i = 0; i < ar->max_norm_iface; i++) 551 fw_submode |= HI_OPTION_FW_SUBMODE_NONE << 552 (i * HI_OPTION_FW_SUBMODE_BITS); 553 554 for (i = ar->max_norm_iface; i < ar->vif_max; i++) 555 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 556 (i * HI_OPTION_FW_SUBMODE_BITS); 557 558 if (ar->p2p && ar->vif_max == 1) 559 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; 560 } 561 562 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest, 563 HTC_PROTOCOL_VERSION) != 0) { 564 ath6kl_err("bmi_write_memory for htc version failed\n"); 565 return -EIO; 566 } 567 568 /* set the firmware mode to STA/IBSS/AP */ 569 param = 0; 570 571 if (ath6kl_bmi_read_hi32(ar, hi_option_flag, ¶m) != 0) { 572 ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 573 return -EIO; 574 } 575 576 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT); 577 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; 578 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; 579 580 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 581 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 582 583 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) { 584 ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 585 return -EIO; 586 } 587 588 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 589 590 /* 591 * Hardcode the address use for the extended board data 592 * Ideally this should be pre-allocate by the OS at boot time 593 * But since it is a new feature and board data is loaded 594 * at init time, we have to workaround this from host. 595 * It is difficult to patch the firmware boot code, 596 * but possible in theory. 597 */ 598 599 if (ar->target_type == TARGET_TYPE_AR6003) { 600 param = ar->hw.board_ext_data_addr; 601 ram_reserved_size = ar->hw.reserved_ram_size; 602 603 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) { 604 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 605 return -EIO; 606 } 607 608 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 609 ram_reserved_size) != 0) { 610 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 611 return -EIO; 612 } 613 } 614 615 /* set the block size for the target */ 616 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 617 /* use default number of control buffers */ 618 return -EIO; 619 620 /* Configure GPIO AR600x UART */ 621 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin, 622 ar->hw.uarttx_pin); 623 if (status) 624 return status; 625 626 /* Configure target refclk_hz */ 627 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz); 628 if (status) 629 return status; 630 631 return 0; 632 } 633 634 /* firmware upload */ 635 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 636 u8 **fw, size_t *fw_len) 637 { 638 const struct firmware *fw_entry; 639 int ret; 640 641 ret = request_firmware(&fw_entry, filename, ar->dev); 642 if (ret) 643 return ret; 644 645 *fw_len = fw_entry->size; 646 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 647 648 if (*fw == NULL) 649 ret = -ENOMEM; 650 651 release_firmware(fw_entry); 652 653 return ret; 654 } 655 656 #ifdef CONFIG_OF 657 /* 658 * Check the device tree for a board-id and use it to construct 659 * the pathname to the firmware file. Used (for now) to find a 660 * fallback to the "bdata.bin" file--typically a symlink to the 661 * appropriate board-specific file. 662 */ 663 static bool check_device_tree(struct ath6kl *ar) 664 { 665 static const char *board_id_prop = "atheros,board-id"; 666 struct device_node *node; 667 char board_filename[64]; 668 const char *board_id; 669 int ret; 670 671 for_each_compatible_node(node, NULL, "atheros,ath6kl") { 672 board_id = of_get_property(node, board_id_prop, NULL); 673 if (board_id == NULL) { 674 ath6kl_warn("No \"%s\" property on %s node.\n", 675 board_id_prop, node->name); 676 continue; 677 } 678 snprintf(board_filename, sizeof(board_filename), 679 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id); 680 681 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 682 &ar->fw_board_len); 683 if (ret) { 684 ath6kl_err("Failed to get DT board file %s: %d\n", 685 board_filename, ret); 686 continue; 687 } 688 return true; 689 } 690 return false; 691 } 692 #else 693 static bool check_device_tree(struct ath6kl *ar) 694 { 695 return false; 696 } 697 #endif /* CONFIG_OF */ 698 699 static int ath6kl_fetch_board_file(struct ath6kl *ar) 700 { 701 const char *filename; 702 int ret; 703 704 if (ar->fw_board != NULL) 705 return 0; 706 707 if (WARN_ON(ar->hw.fw_board == NULL)) 708 return -EINVAL; 709 710 filename = ar->hw.fw_board; 711 712 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 713 &ar->fw_board_len); 714 if (ret == 0) { 715 /* managed to get proper board file */ 716 return 0; 717 } 718 719 if (check_device_tree(ar)) { 720 /* got board file from device tree */ 721 return 0; 722 } 723 724 /* there was no proper board file, try to use default instead */ 725 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 726 filename, ret); 727 728 filename = ar->hw.fw_default_board; 729 730 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 731 &ar->fw_board_len); 732 if (ret) { 733 ath6kl_err("Failed to get default board file %s: %d\n", 734 filename, ret); 735 return ret; 736 } 737 738 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 739 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 740 741 return 0; 742 } 743 744 static int ath6kl_fetch_otp_file(struct ath6kl *ar) 745 { 746 char filename[100]; 747 int ret; 748 749 if (ar->fw_otp != NULL) 750 return 0; 751 752 if (ar->hw.fw.otp == NULL) { 753 ath6kl_dbg(ATH6KL_DBG_BOOT, 754 "no OTP file configured for this hw\n"); 755 return 0; 756 } 757 758 snprintf(filename, sizeof(filename), "%s/%s", 759 ar->hw.fw.dir, ar->hw.fw.otp); 760 761 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 762 &ar->fw_otp_len); 763 if (ret) { 764 ath6kl_err("Failed to get OTP file %s: %d\n", 765 filename, ret); 766 return ret; 767 } 768 769 return 0; 770 } 771 772 static int ath6kl_fetch_testmode_file(struct ath6kl *ar) 773 { 774 char filename[100]; 775 int ret; 776 777 if (ar->testmode == 0) 778 return 0; 779 780 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode); 781 782 if (ar->testmode == 2) { 783 if (ar->hw.fw.utf == NULL) { 784 ath6kl_warn("testmode 2 not supported\n"); 785 return -EOPNOTSUPP; 786 } 787 788 snprintf(filename, sizeof(filename), "%s/%s", 789 ar->hw.fw.dir, ar->hw.fw.utf); 790 } else { 791 if (ar->hw.fw.tcmd == NULL) { 792 ath6kl_warn("testmode 1 not supported\n"); 793 return -EOPNOTSUPP; 794 } 795 796 snprintf(filename, sizeof(filename), "%s/%s", 797 ar->hw.fw.dir, ar->hw.fw.tcmd); 798 } 799 800 set_bit(TESTMODE, &ar->flag); 801 802 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 803 if (ret) { 804 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n", 805 ar->testmode, filename, ret); 806 return ret; 807 } 808 809 return 0; 810 } 811 812 static int ath6kl_fetch_fw_file(struct ath6kl *ar) 813 { 814 char filename[100]; 815 int ret; 816 817 if (ar->fw != NULL) 818 return 0; 819 820 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */ 821 if (WARN_ON(ar->hw.fw.fw == NULL)) 822 return -EINVAL; 823 824 snprintf(filename, sizeof(filename), "%s/%s", 825 ar->hw.fw.dir, ar->hw.fw.fw); 826 827 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 828 if (ret) { 829 ath6kl_err("Failed to get firmware file %s: %d\n", 830 filename, ret); 831 return ret; 832 } 833 834 return 0; 835 } 836 837 static int ath6kl_fetch_patch_file(struct ath6kl *ar) 838 { 839 char filename[100]; 840 int ret; 841 842 if (ar->fw_patch != NULL) 843 return 0; 844 845 if (ar->hw.fw.patch == NULL) 846 return 0; 847 848 snprintf(filename, sizeof(filename), "%s/%s", 849 ar->hw.fw.dir, ar->hw.fw.patch); 850 851 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 852 &ar->fw_patch_len); 853 if (ret) { 854 ath6kl_err("Failed to get patch file %s: %d\n", 855 filename, ret); 856 return ret; 857 } 858 859 return 0; 860 } 861 862 static int ath6kl_fetch_testscript_file(struct ath6kl *ar) 863 { 864 char filename[100]; 865 int ret; 866 867 if (ar->testmode != 2) 868 return 0; 869 870 if (ar->fw_testscript != NULL) 871 return 0; 872 873 if (ar->hw.fw.testscript == NULL) 874 return 0; 875 876 snprintf(filename, sizeof(filename), "%s/%s", 877 ar->hw.fw.dir, ar->hw.fw.testscript); 878 879 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript, 880 &ar->fw_testscript_len); 881 if (ret) { 882 ath6kl_err("Failed to get testscript file %s: %d\n", 883 filename, ret); 884 return ret; 885 } 886 887 return 0; 888 } 889 890 static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 891 { 892 int ret; 893 894 ret = ath6kl_fetch_otp_file(ar); 895 if (ret) 896 return ret; 897 898 ret = ath6kl_fetch_fw_file(ar); 899 if (ret) 900 return ret; 901 902 ret = ath6kl_fetch_patch_file(ar); 903 if (ret) 904 return ret; 905 906 ret = ath6kl_fetch_testscript_file(ar); 907 if (ret) 908 return ret; 909 910 return 0; 911 } 912 913 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name) 914 { 915 size_t magic_len, len, ie_len; 916 const struct firmware *fw; 917 struct ath6kl_fw_ie *hdr; 918 char filename[100]; 919 const u8 *data; 920 int ret, ie_id, i, index, bit; 921 __le32 *val; 922 923 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name); 924 925 ret = request_firmware(&fw, filename, ar->dev); 926 if (ret) 927 return ret; 928 929 data = fw->data; 930 len = fw->size; 931 932 /* magic also includes the null byte, check that as well */ 933 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 934 935 if (len < magic_len) { 936 ret = -EINVAL; 937 goto out; 938 } 939 940 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 941 ret = -EINVAL; 942 goto out; 943 } 944 945 len -= magic_len; 946 data += magic_len; 947 948 /* loop elements */ 949 while (len > sizeof(struct ath6kl_fw_ie)) { 950 /* hdr is unaligned! */ 951 hdr = (struct ath6kl_fw_ie *) data; 952 953 ie_id = le32_to_cpup(&hdr->id); 954 ie_len = le32_to_cpup(&hdr->len); 955 956 len -= sizeof(*hdr); 957 data += sizeof(*hdr); 958 959 if (len < ie_len) { 960 ret = -EINVAL; 961 goto out; 962 } 963 964 switch (ie_id) { 965 case ATH6KL_FW_IE_FW_VERSION: 966 strlcpy(ar->wiphy->fw_version, data, 967 sizeof(ar->wiphy->fw_version)); 968 969 ath6kl_dbg(ATH6KL_DBG_BOOT, 970 "found fw version %s\n", 971 ar->wiphy->fw_version); 972 break; 973 case ATH6KL_FW_IE_OTP_IMAGE: 974 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", 975 ie_len); 976 977 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 978 979 if (ar->fw_otp == NULL) { 980 ret = -ENOMEM; 981 goto out; 982 } 983 984 ar->fw_otp_len = ie_len; 985 break; 986 case ATH6KL_FW_IE_FW_IMAGE: 987 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", 988 ie_len); 989 990 /* in testmode we already might have a fw file */ 991 if (ar->fw != NULL) 992 break; 993 994 ar->fw = vmalloc(ie_len); 995 996 if (ar->fw == NULL) { 997 ret = -ENOMEM; 998 goto out; 999 } 1000 1001 memcpy(ar->fw, data, ie_len); 1002 ar->fw_len = ie_len; 1003 break; 1004 case ATH6KL_FW_IE_PATCH_IMAGE: 1005 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", 1006 ie_len); 1007 1008 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 1009 1010 if (ar->fw_patch == NULL) { 1011 ret = -ENOMEM; 1012 goto out; 1013 } 1014 1015 ar->fw_patch_len = ie_len; 1016 break; 1017 case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 1018 val = (__le32 *) data; 1019 ar->hw.reserved_ram_size = le32_to_cpup(val); 1020 1021 ath6kl_dbg(ATH6KL_DBG_BOOT, 1022 "found reserved ram size ie 0x%d\n", 1023 ar->hw.reserved_ram_size); 1024 break; 1025 case ATH6KL_FW_IE_CAPABILITIES: 1026 ath6kl_dbg(ATH6KL_DBG_BOOT, 1027 "found firmware capabilities ie (%zd B)\n", 1028 ie_len); 1029 1030 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 1031 index = i / 8; 1032 bit = i % 8; 1033 1034 if (index == ie_len) 1035 break; 1036 1037 if (data[index] & (1 << bit)) 1038 __set_bit(i, ar->fw_capabilities); 1039 } 1040 1041 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 1042 ar->fw_capabilities, 1043 sizeof(ar->fw_capabilities)); 1044 break; 1045 case ATH6KL_FW_IE_PATCH_ADDR: 1046 if (ie_len != sizeof(*val)) 1047 break; 1048 1049 val = (__le32 *) data; 1050 ar->hw.dataset_patch_addr = le32_to_cpup(val); 1051 1052 ath6kl_dbg(ATH6KL_DBG_BOOT, 1053 "found patch address ie 0x%x\n", 1054 ar->hw.dataset_patch_addr); 1055 break; 1056 case ATH6KL_FW_IE_BOARD_ADDR: 1057 if (ie_len != sizeof(*val)) 1058 break; 1059 1060 val = (__le32 *) data; 1061 ar->hw.board_addr = le32_to_cpup(val); 1062 1063 ath6kl_dbg(ATH6KL_DBG_BOOT, 1064 "found board address ie 0x%x\n", 1065 ar->hw.board_addr); 1066 break; 1067 case ATH6KL_FW_IE_VIF_MAX: 1068 if (ie_len != sizeof(*val)) 1069 break; 1070 1071 val = (__le32 *) data; 1072 ar->vif_max = min_t(unsigned int, le32_to_cpup(val), 1073 ATH6KL_VIF_MAX); 1074 1075 if (ar->vif_max > 1 && !ar->p2p) 1076 ar->max_norm_iface = 2; 1077 1078 ath6kl_dbg(ATH6KL_DBG_BOOT, 1079 "found vif max ie %d\n", ar->vif_max); 1080 break; 1081 default: 1082 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 1083 le32_to_cpup(&hdr->id)); 1084 break; 1085 } 1086 1087 len -= ie_len; 1088 data += ie_len; 1089 }; 1090 1091 ret = 0; 1092 out: 1093 release_firmware(fw); 1094 1095 return ret; 1096 } 1097 1098 int ath6kl_init_fetch_firmwares(struct ath6kl *ar) 1099 { 1100 int ret; 1101 1102 ret = ath6kl_fetch_board_file(ar); 1103 if (ret) 1104 return ret; 1105 1106 ret = ath6kl_fetch_testmode_file(ar); 1107 if (ret) 1108 return ret; 1109 1110 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE); 1111 if (ret == 0) { 1112 ar->fw_api = 4; 1113 goto out; 1114 } 1115 1116 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE); 1117 if (ret == 0) { 1118 ar->fw_api = 3; 1119 goto out; 1120 } 1121 1122 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE); 1123 if (ret == 0) { 1124 ar->fw_api = 2; 1125 goto out; 1126 } 1127 1128 ret = ath6kl_fetch_fw_api1(ar); 1129 if (ret) 1130 return ret; 1131 1132 ar->fw_api = 1; 1133 1134 out: 1135 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1136 1137 return 0; 1138 } 1139 1140 static int ath6kl_upload_board_file(struct ath6kl *ar) 1141 { 1142 u32 board_address, board_ext_address, param; 1143 u32 board_data_size, board_ext_data_size; 1144 int ret; 1145 1146 if (WARN_ON(ar->fw_board == NULL)) 1147 return -ENOENT; 1148 1149 /* 1150 * Determine where in Target RAM to write Board Data. 1151 * For AR6004, host determine Target RAM address for 1152 * writing board data. 1153 */ 1154 if (ar->hw.board_addr != 0) { 1155 board_address = ar->hw.board_addr; 1156 ath6kl_bmi_write_hi32(ar, hi_board_data, 1157 board_address); 1158 } else { 1159 ret = ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address); 1160 if (ret) { 1161 ath6kl_err("Failed to get board file target address.\n"); 1162 return ret; 1163 } 1164 } 1165 1166 /* determine where in target ram to write extended board data */ 1167 ret = ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address); 1168 if (ret) { 1169 ath6kl_err("Failed to get extended board file target address.\n"); 1170 return ret; 1171 } 1172 1173 if (ar->target_type == TARGET_TYPE_AR6003 && 1174 board_ext_address == 0) { 1175 ath6kl_err("Failed to get board file target address.\n"); 1176 return -EINVAL; 1177 } 1178 1179 switch (ar->target_type) { 1180 case TARGET_TYPE_AR6003: 1181 board_data_size = AR6003_BOARD_DATA_SZ; 1182 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 1183 if (ar->fw_board_len > (board_data_size + board_ext_data_size)) 1184 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2; 1185 break; 1186 case TARGET_TYPE_AR6004: 1187 board_data_size = AR6004_BOARD_DATA_SZ; 1188 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 1189 break; 1190 default: 1191 WARN_ON(1); 1192 return -EINVAL; 1193 break; 1194 } 1195 1196 if (board_ext_address && 1197 ar->fw_board_len == (board_data_size + board_ext_data_size)) { 1198 /* write extended board data */ 1199 ath6kl_dbg(ATH6KL_DBG_BOOT, 1200 "writing extended board data to 0x%x (%d B)\n", 1201 board_ext_address, board_ext_data_size); 1202 1203 ret = ath6kl_bmi_write(ar, board_ext_address, 1204 ar->fw_board + board_data_size, 1205 board_ext_data_size); 1206 if (ret) { 1207 ath6kl_err("Failed to write extended board data: %d\n", 1208 ret); 1209 return ret; 1210 } 1211 1212 /* record that extended board data is initialized */ 1213 param = (board_ext_data_size << 16) | 1; 1214 1215 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param); 1216 } 1217 1218 if (ar->fw_board_len < board_data_size) { 1219 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1220 ret = -EINVAL; 1221 return ret; 1222 } 1223 1224 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 1225 board_address, board_data_size); 1226 1227 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 1228 board_data_size); 1229 1230 if (ret) { 1231 ath6kl_err("Board file bmi write failed: %d\n", ret); 1232 return ret; 1233 } 1234 1235 /* record the fact that Board Data IS initialized */ 1236 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1); 1237 1238 return ret; 1239 } 1240 1241 static int ath6kl_upload_otp(struct ath6kl *ar) 1242 { 1243 u32 address, param; 1244 bool from_hw = false; 1245 int ret; 1246 1247 if (ar->fw_otp == NULL) 1248 return 0; 1249 1250 address = ar->hw.app_load_addr; 1251 1252 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, 1253 ar->fw_otp_len); 1254 1255 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1256 ar->fw_otp_len); 1257 if (ret) { 1258 ath6kl_err("Failed to upload OTP file: %d\n", ret); 1259 return ret; 1260 } 1261 1262 /* read firmware start address */ 1263 ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address); 1264 1265 if (ret) { 1266 ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1267 return ret; 1268 } 1269 1270 if (ar->hw.app_start_override_addr == 0) { 1271 ar->hw.app_start_override_addr = address; 1272 from_hw = true; 1273 } 1274 1275 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", 1276 from_hw ? " (from hw)" : "", 1277 ar->hw.app_start_override_addr); 1278 1279 /* execute the OTP code */ 1280 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", 1281 ar->hw.app_start_override_addr); 1282 param = 0; 1283 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); 1284 1285 return ret; 1286 } 1287 1288 static int ath6kl_upload_firmware(struct ath6kl *ar) 1289 { 1290 u32 address; 1291 int ret; 1292 1293 if (WARN_ON(ar->fw == NULL)) 1294 return 0; 1295 1296 address = ar->hw.app_load_addr; 1297 1298 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", 1299 address, ar->fw_len); 1300 1301 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1302 1303 if (ret) { 1304 ath6kl_err("Failed to write firmware: %d\n", ret); 1305 return ret; 1306 } 1307 1308 /* 1309 * Set starting address for firmware 1310 * Don't need to setup app_start override addr on AR6004 1311 */ 1312 if (ar->target_type != TARGET_TYPE_AR6004) { 1313 address = ar->hw.app_start_override_addr; 1314 ath6kl_bmi_set_app_start(ar, address); 1315 } 1316 return ret; 1317 } 1318 1319 static int ath6kl_upload_patch(struct ath6kl *ar) 1320 { 1321 u32 address; 1322 int ret; 1323 1324 if (ar->fw_patch == NULL) 1325 return 0; 1326 1327 address = ar->hw.dataset_patch_addr; 1328 1329 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", 1330 address, ar->fw_patch_len); 1331 1332 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1333 if (ret) { 1334 ath6kl_err("Failed to write patch file: %d\n", ret); 1335 return ret; 1336 } 1337 1338 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address); 1339 1340 return 0; 1341 } 1342 1343 static int ath6kl_upload_testscript(struct ath6kl *ar) 1344 { 1345 u32 address; 1346 int ret; 1347 1348 if (ar->testmode != 2) 1349 return 0; 1350 1351 if (ar->fw_testscript == NULL) 1352 return 0; 1353 1354 address = ar->hw.testscript_addr; 1355 1356 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n", 1357 address, ar->fw_testscript_len); 1358 1359 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript, 1360 ar->fw_testscript_len); 1361 if (ret) { 1362 ath6kl_err("Failed to write testscript file: %d\n", ret); 1363 return ret; 1364 } 1365 1366 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address); 1367 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096); 1368 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1); 1369 1370 return 0; 1371 } 1372 1373 static int ath6kl_init_upload(struct ath6kl *ar) 1374 { 1375 u32 param, options, sleep, address; 1376 int status = 0; 1377 1378 if (ar->target_type != TARGET_TYPE_AR6003 && 1379 ar->target_type != TARGET_TYPE_AR6004) 1380 return -EINVAL; 1381 1382 /* temporarily disable system sleep */ 1383 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1384 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1385 if (status) 1386 return status; 1387 1388 options = param; 1389 1390 param |= ATH6KL_OPTION_SLEEP_DISABLE; 1391 status = ath6kl_bmi_reg_write(ar, address, param); 1392 if (status) 1393 return status; 1394 1395 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1396 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1397 if (status) 1398 return status; 1399 1400 sleep = param; 1401 1402 param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1403 status = ath6kl_bmi_reg_write(ar, address, param); 1404 if (status) 1405 return status; 1406 1407 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1408 options, sleep); 1409 1410 /* program analog PLL register */ 1411 /* no need to control 40/44MHz clock on AR6004 */ 1412 if (ar->target_type != TARGET_TYPE_AR6004) { 1413 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1414 0xF9104001); 1415 1416 if (status) 1417 return status; 1418 1419 /* Run at 80/88MHz by default */ 1420 param = SM(CPU_CLOCK_STANDARD, 1); 1421 1422 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1423 status = ath6kl_bmi_reg_write(ar, address, param); 1424 if (status) 1425 return status; 1426 } 1427 1428 param = 0; 1429 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1430 param = SM(LPO_CAL_ENABLE, 1); 1431 status = ath6kl_bmi_reg_write(ar, address, param); 1432 if (status) 1433 return status; 1434 1435 /* WAR to avoid SDIO CRC err */ 1436 if (ar->hw.flags & ATH6KL_HW_SDIO_CRC_ERROR_WAR) { 1437 ath6kl_err("temporary war to avoid sdio crc error\n"); 1438 1439 param = 0x28; 1440 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS; 1441 status = ath6kl_bmi_reg_write(ar, address, param); 1442 if (status) 1443 return status; 1444 1445 param = 0x20; 1446 1447 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1448 status = ath6kl_bmi_reg_write(ar, address, param); 1449 if (status) 1450 return status; 1451 1452 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1453 status = ath6kl_bmi_reg_write(ar, address, param); 1454 if (status) 1455 return status; 1456 1457 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1458 status = ath6kl_bmi_reg_write(ar, address, param); 1459 if (status) 1460 return status; 1461 1462 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1463 status = ath6kl_bmi_reg_write(ar, address, param); 1464 if (status) 1465 return status; 1466 } 1467 1468 /* write EEPROM data to Target RAM */ 1469 status = ath6kl_upload_board_file(ar); 1470 if (status) 1471 return status; 1472 1473 /* transfer One time Programmable data */ 1474 status = ath6kl_upload_otp(ar); 1475 if (status) 1476 return status; 1477 1478 /* Download Target firmware */ 1479 status = ath6kl_upload_firmware(ar); 1480 if (status) 1481 return status; 1482 1483 status = ath6kl_upload_patch(ar); 1484 if (status) 1485 return status; 1486 1487 /* Download the test script */ 1488 status = ath6kl_upload_testscript(ar); 1489 if (status) 1490 return status; 1491 1492 /* Restore system sleep */ 1493 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1494 status = ath6kl_bmi_reg_write(ar, address, sleep); 1495 if (status) 1496 return status; 1497 1498 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1499 param = options | 0x20; 1500 status = ath6kl_bmi_reg_write(ar, address, param); 1501 if (status) 1502 return status; 1503 1504 return status; 1505 } 1506 1507 int ath6kl_init_hw_params(struct ath6kl *ar) 1508 { 1509 const struct ath6kl_hw *uninitialized_var(hw); 1510 int i; 1511 1512 for (i = 0; i < ARRAY_SIZE(hw_list); i++) { 1513 hw = &hw_list[i]; 1514 1515 if (hw->id == ar->version.target_ver) 1516 break; 1517 } 1518 1519 if (i == ARRAY_SIZE(hw_list)) { 1520 ath6kl_err("Unsupported hardware version: 0x%x\n", 1521 ar->version.target_ver); 1522 return -EINVAL; 1523 } 1524 1525 ar->hw = *hw; 1526 1527 ath6kl_dbg(ATH6KL_DBG_BOOT, 1528 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 1529 ar->version.target_ver, ar->target_type, 1530 ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 1531 ath6kl_dbg(ATH6KL_DBG_BOOT, 1532 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 1533 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 1534 ar->hw.reserved_ram_size); 1535 ath6kl_dbg(ATH6KL_DBG_BOOT, 1536 "refclk_hz %d uarttx_pin %d", 1537 ar->hw.refclk_hz, ar->hw.uarttx_pin); 1538 1539 return 0; 1540 } 1541 1542 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type) 1543 { 1544 switch (type) { 1545 case ATH6KL_HIF_TYPE_SDIO: 1546 return "sdio"; 1547 case ATH6KL_HIF_TYPE_USB: 1548 return "usb"; 1549 } 1550 1551 return NULL; 1552 } 1553 1554 1555 static const struct fw_capa_str_map { 1556 int id; 1557 const char *name; 1558 } fw_capa_map[] = { 1559 { ATH6KL_FW_CAPABILITY_HOST_P2P, "host-p2p" }, 1560 { ATH6KL_FW_CAPABILITY_SCHED_SCAN, "sched-scan" }, 1561 { ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, "sta-p2pdev-duplex" }, 1562 { ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, "inactivity-timeout" }, 1563 { ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, "rsn-cap-override" }, 1564 { ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER, "wow-mc-filter" }, 1565 { ATH6KL_FW_CAPABILITY_BMISS_ENHANCE, "bmiss-enhance" }, 1566 { ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST, "sscan-match-list" }, 1567 { ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD, "rssi-scan-thold" }, 1568 { ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR, "custom-mac-addr" }, 1569 { ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY, "tx-err-notify" }, 1570 { ATH6KL_FW_CAPABILITY_REGDOMAIN, "regdomain" }, 1571 { ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2, "sched-scan-v2" }, 1572 { ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL, "hb-poll" }, 1573 { ATH6KL_FW_CAPABILITY_64BIT_RATES, "64bit-rates" }, 1574 { ATH6KL_FW_CAPABILITY_AP_INACTIVITY_MINS, "ap-inactivity-mins" }, 1575 { ATH6KL_FW_CAPABILITY_MAP_LP_ENDPOINT, "map-lp-endpoint" }, 1576 }; 1577 1578 static const char *ath6kl_init_get_fw_capa_name(unsigned int id) 1579 { 1580 int i; 1581 1582 for (i = 0; i < ARRAY_SIZE(fw_capa_map); i++) { 1583 if (fw_capa_map[i].id == id) 1584 return fw_capa_map[i].name; 1585 } 1586 1587 return "<unknown>"; 1588 } 1589 1590 static void ath6kl_init_get_fwcaps(struct ath6kl *ar, char *buf, size_t buf_len) 1591 { 1592 u8 *data = (u8 *) ar->fw_capabilities; 1593 size_t trunc_len, len = 0; 1594 int i, index, bit; 1595 char *trunc = "..."; 1596 1597 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 1598 index = i / 8; 1599 bit = i % 8; 1600 1601 if (index >= sizeof(ar->fw_capabilities) * 4) 1602 break; 1603 1604 if (buf_len - len < 4) { 1605 ath6kl_warn("firmware capability buffer too small!\n"); 1606 1607 /* add "..." to the end of string */ 1608 trunc_len = strlen(trunc) + 1; 1609 strncpy(buf + buf_len - trunc_len, trunc, trunc_len); 1610 1611 return; 1612 } 1613 1614 if (data[index] & (1 << bit)) { 1615 len += scnprintf(buf + len, buf_len - len, "%s,", 1616 ath6kl_init_get_fw_capa_name(i)); 1617 } 1618 } 1619 1620 /* overwrite the last comma */ 1621 if (len > 0) 1622 len--; 1623 1624 buf[len] = '\0'; 1625 } 1626 1627 static int ath6kl_init_hw_reset(struct ath6kl *ar) 1628 { 1629 ath6kl_dbg(ATH6KL_DBG_BOOT, "cold resetting the device"); 1630 1631 return ath6kl_diag_write32(ar, RESET_CONTROL_ADDRESS, 1632 cpu_to_le32(RESET_CONTROL_COLD_RST)); 1633 } 1634 1635 static int __ath6kl_init_hw_start(struct ath6kl *ar) 1636 { 1637 long timeleft; 1638 int ret, i; 1639 char buf[200]; 1640 1641 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); 1642 1643 ret = ath6kl_hif_power_on(ar); 1644 if (ret) 1645 return ret; 1646 1647 ret = ath6kl_configure_target(ar); 1648 if (ret) 1649 goto err_power_off; 1650 1651 ret = ath6kl_init_upload(ar); 1652 if (ret) 1653 goto err_power_off; 1654 1655 /* Do we need to finish the BMI phase */ 1656 ret = ath6kl_bmi_done(ar); 1657 if (ret) 1658 goto err_power_off; 1659 1660 /* 1661 * The reason we have to wait for the target here is that the 1662 * driver layer has to init BMI in order to set the host block 1663 * size. 1664 */ 1665 ret = ath6kl_htc_wait_target(ar->htc_target); 1666 1667 if (ret == -ETIMEDOUT) { 1668 /* 1669 * Most likely USB target is in odd state after reboot and 1670 * needs a reset. A cold reset makes the whole device 1671 * disappear from USB bus and initialisation starts from 1672 * beginning. 1673 */ 1674 ath6kl_warn("htc wait target timed out, resetting device\n"); 1675 ath6kl_init_hw_reset(ar); 1676 goto err_power_off; 1677 } else if (ret) { 1678 ath6kl_err("htc wait target failed: %d\n", ret); 1679 goto err_power_off; 1680 } 1681 1682 ret = ath6kl_init_service_ep(ar); 1683 if (ret) { 1684 ath6kl_err("Endpoint service initilisation failed: %d\n", ret); 1685 goto err_cleanup_scatter; 1686 } 1687 1688 /* setup credit distribution */ 1689 ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info); 1690 1691 /* start HTC */ 1692 ret = ath6kl_htc_start(ar->htc_target); 1693 if (ret) { 1694 /* FIXME: call this */ 1695 ath6kl_cookie_cleanup(ar); 1696 goto err_cleanup_scatter; 1697 } 1698 1699 /* Wait for Wmi event to be ready */ 1700 timeleft = wait_event_interruptible_timeout(ar->event_wq, 1701 test_bit(WMI_READY, 1702 &ar->flag), 1703 WMI_TIMEOUT); 1704 if (timeleft <= 0) { 1705 clear_bit(WMI_READY, &ar->flag); 1706 ath6kl_err("wmi is not ready or wait was interrupted: %ld\n", 1707 timeleft); 1708 ret = -EIO; 1709 goto err_htc_stop; 1710 } 1711 1712 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 1713 1714 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) { 1715 ath6kl_info("%s %s fw %s api %d%s\n", 1716 ar->hw.name, 1717 ath6kl_init_get_hif_name(ar->hif_type), 1718 ar->wiphy->fw_version, 1719 ar->fw_api, 1720 test_bit(TESTMODE, &ar->flag) ? " testmode" : ""); 1721 ath6kl_init_get_fwcaps(ar, buf, sizeof(buf)); 1722 ath6kl_info("firmware supports: %s\n", buf); 1723 } 1724 1725 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 1726 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 1727 ATH6KL_ABI_VERSION, ar->version.abi_ver); 1728 ret = -EIO; 1729 goto err_htc_stop; 1730 } 1731 1732 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 1733 1734 /* communicate the wmi protocol verision to the target */ 1735 /* FIXME: return error */ 1736 if ((ath6kl_set_host_app_area(ar)) != 0) 1737 ath6kl_err("unable to set the host app area\n"); 1738 1739 for (i = 0; i < ar->vif_max; i++) { 1740 ret = ath6kl_target_config_wlan_params(ar, i); 1741 if (ret) 1742 goto err_htc_stop; 1743 } 1744 1745 return 0; 1746 1747 err_htc_stop: 1748 ath6kl_htc_stop(ar->htc_target); 1749 err_cleanup_scatter: 1750 ath6kl_hif_cleanup_scatter(ar); 1751 err_power_off: 1752 ath6kl_hif_power_off(ar); 1753 1754 return ret; 1755 } 1756 1757 int ath6kl_init_hw_start(struct ath6kl *ar) 1758 { 1759 int err; 1760 1761 err = __ath6kl_init_hw_start(ar); 1762 if (err) 1763 return err; 1764 ar->state = ATH6KL_STATE_ON; 1765 return 0; 1766 } 1767 1768 static int __ath6kl_init_hw_stop(struct ath6kl *ar) 1769 { 1770 int ret; 1771 1772 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); 1773 1774 ath6kl_htc_stop(ar->htc_target); 1775 1776 ath6kl_hif_stop(ar); 1777 1778 ath6kl_bmi_reset(ar); 1779 1780 ret = ath6kl_hif_power_off(ar); 1781 if (ret) 1782 ath6kl_warn("failed to power off hif: %d\n", ret); 1783 1784 return 0; 1785 } 1786 1787 int ath6kl_init_hw_stop(struct ath6kl *ar) 1788 { 1789 int err; 1790 1791 err = __ath6kl_init_hw_stop(ar); 1792 if (err) 1793 return err; 1794 ar->state = ATH6KL_STATE_OFF; 1795 return 0; 1796 } 1797 1798 void ath6kl_init_hw_restart(struct ath6kl *ar) 1799 { 1800 clear_bit(WMI_READY, &ar->flag); 1801 1802 ath6kl_cfg80211_stop_all(ar); 1803 1804 if (__ath6kl_init_hw_stop(ar)) { 1805 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to stop during fw error recovery\n"); 1806 return; 1807 } 1808 1809 if (__ath6kl_init_hw_start(ar)) { 1810 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n"); 1811 return; 1812 } 1813 } 1814 1815 void ath6kl_stop_txrx(struct ath6kl *ar) 1816 { 1817 struct ath6kl_vif *vif, *tmp_vif; 1818 int i; 1819 1820 set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1821 1822 if (down_interruptible(&ar->sem)) { 1823 ath6kl_err("down_interruptible failed\n"); 1824 return; 1825 } 1826 1827 for (i = 0; i < AP_MAX_NUM_STA; i++) 1828 aggr_reset_state(ar->sta_list[i].aggr_conn); 1829 1830 spin_lock_bh(&ar->list_lock); 1831 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { 1832 list_del(&vif->list); 1833 spin_unlock_bh(&ar->list_lock); 1834 ath6kl_cfg80211_vif_stop(vif, test_bit(WMI_READY, &ar->flag)); 1835 rtnl_lock(); 1836 ath6kl_cfg80211_vif_cleanup(vif); 1837 rtnl_unlock(); 1838 spin_lock_bh(&ar->list_lock); 1839 } 1840 spin_unlock_bh(&ar->list_lock); 1841 1842 clear_bit(WMI_READY, &ar->flag); 1843 1844 if (ar->fw_recovery.enable) 1845 del_timer_sync(&ar->fw_recovery.hb_timer); 1846 1847 /* 1848 * After wmi_shudown all WMI events will be dropped. We 1849 * need to cleanup the buffers allocated in AP mode and 1850 * give disconnect notification to stack, which usually 1851 * happens in the disconnect_event. Simulate the disconnect 1852 * event by calling the function directly. Sometimes 1853 * disconnect_event will be received when the debug logs 1854 * are collected. 1855 */ 1856 ath6kl_wmi_shutdown(ar->wmi); 1857 1858 clear_bit(WMI_ENABLED, &ar->flag); 1859 if (ar->htc_target) { 1860 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); 1861 ath6kl_htc_stop(ar->htc_target); 1862 } 1863 1864 /* 1865 * Try to reset the device if we can. The driver may have been 1866 * configure NOT to reset the target during a debug session. 1867 */ 1868 ath6kl_init_hw_reset(ar); 1869 1870 up(&ar->sem); 1871 } 1872 EXPORT_SYMBOL(ath6kl_stop_txrx); 1873