1 2 /* 3 * Copyright (c) 2011 Atheros Communications Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/moduleparam.h> 19 #include <linux/errno.h> 20 #include <linux/of.h> 21 #include <linux/mmc/sdio_func.h> 22 #include "core.h" 23 #include "cfg80211.h" 24 #include "target.h" 25 #include "debug.h" 26 #include "hif-ops.h" 27 28 unsigned int debug_mask; 29 static unsigned int testmode; 30 static bool suspend_cutpower; 31 static unsigned int uart_debug; 32 33 module_param(debug_mask, uint, 0644); 34 module_param(testmode, uint, 0644); 35 module_param(suspend_cutpower, bool, 0444); 36 module_param(uart_debug, uint, 0644); 37 38 static const struct ath6kl_hw hw_list[] = { 39 { 40 .id = AR6003_HW_2_0_VERSION, 41 .name = "ar6003 hw 2.0", 42 .dataset_patch_addr = 0x57e884, 43 .app_load_addr = 0x543180, 44 .board_ext_data_addr = 0x57e500, 45 .reserved_ram_size = 6912, 46 .refclk_hz = 26000000, 47 .uarttx_pin = 8, 48 49 /* hw2.0 needs override address hardcoded */ 50 .app_start_override_addr = 0x944C00, 51 52 .fw = { 53 .dir = AR6003_HW_2_0_FW_DIR, 54 .otp = AR6003_HW_2_0_OTP_FILE, 55 .fw = AR6003_HW_2_0_FIRMWARE_FILE, 56 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE, 57 .patch = AR6003_HW_2_0_PATCH_FILE, 58 }, 59 60 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE, 61 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE, 62 }, 63 { 64 .id = AR6003_HW_2_1_1_VERSION, 65 .name = "ar6003 hw 2.1.1", 66 .dataset_patch_addr = 0x57ff74, 67 .app_load_addr = 0x1234, 68 .board_ext_data_addr = 0x542330, 69 .reserved_ram_size = 512, 70 .refclk_hz = 26000000, 71 .uarttx_pin = 8, 72 73 .fw = { 74 .dir = AR6003_HW_2_1_1_FW_DIR, 75 .otp = AR6003_HW_2_1_1_OTP_FILE, 76 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE, 77 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE, 78 .patch = AR6003_HW_2_1_1_PATCH_FILE, 79 }, 80 81 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE, 82 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE, 83 }, 84 { 85 .id = AR6004_HW_1_0_VERSION, 86 .name = "ar6004 hw 1.0", 87 .dataset_patch_addr = 0x57e884, 88 .app_load_addr = 0x1234, 89 .board_ext_data_addr = 0x437000, 90 .reserved_ram_size = 19456, 91 .board_addr = 0x433900, 92 .refclk_hz = 26000000, 93 .uarttx_pin = 11, 94 95 .fw = { 96 .dir = AR6004_HW_1_0_FW_DIR, 97 .fw = AR6004_HW_1_0_FIRMWARE_FILE, 98 }, 99 100 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE, 101 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE, 102 }, 103 { 104 .id = AR6004_HW_1_1_VERSION, 105 .name = "ar6004 hw 1.1", 106 .dataset_patch_addr = 0x57e884, 107 .app_load_addr = 0x1234, 108 .board_ext_data_addr = 0x437000, 109 .reserved_ram_size = 11264, 110 .board_addr = 0x43d400, 111 .refclk_hz = 40000000, 112 .uarttx_pin = 11, 113 114 .fw = { 115 .dir = AR6004_HW_1_1_FW_DIR, 116 .fw = AR6004_HW_1_1_FIRMWARE_FILE, 117 }, 118 119 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, 120 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, 121 }, 122 }; 123 124 /* 125 * Include definitions here that can be used to tune the WLAN module 126 * behavior. Different customers can tune the behavior as per their needs, 127 * here. 128 */ 129 130 /* 131 * This configuration item enable/disable keepalive support. 132 * Keepalive support: In the absence of any data traffic to AP, null 133 * frames will be sent to the AP at periodic interval, to keep the association 134 * active. This configuration item defines the periodic interval. 135 * Use value of zero to disable keepalive support 136 * Default: 60 seconds 137 */ 138 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 139 140 /* 141 * This configuration item sets the value of disconnect timeout 142 * Firmware delays sending the disconnec event to the host for this 143 * timeout after is gets disconnected from the current AP. 144 * If the firmware successly roams within the disconnect timeout 145 * it sends a new connect event 146 */ 147 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 148 149 150 #define ATH6KL_DATA_OFFSET 64 151 struct sk_buff *ath6kl_buf_alloc(int size) 152 { 153 struct sk_buff *skb; 154 u16 reserved; 155 156 /* Add chacheline space at front and back of buffer */ 157 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 158 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; 159 skb = dev_alloc_skb(size + reserved); 160 161 if (skb) 162 skb_reserve(skb, reserved - L1_CACHE_BYTES); 163 return skb; 164 } 165 166 void ath6kl_init_profile_info(struct ath6kl_vif *vif) 167 { 168 vif->ssid_len = 0; 169 memset(vif->ssid, 0, sizeof(vif->ssid)); 170 171 vif->dot11_auth_mode = OPEN_AUTH; 172 vif->auth_mode = NONE_AUTH; 173 vif->prwise_crypto = NONE_CRYPT; 174 vif->prwise_crypto_len = 0; 175 vif->grp_crypto = NONE_CRYPT; 176 vif->grp_crypto_len = 0; 177 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 178 memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); 179 memset(vif->bssid, 0, sizeof(vif->bssid)); 180 vif->bss_ch = 0; 181 } 182 183 static int ath6kl_set_host_app_area(struct ath6kl *ar) 184 { 185 u32 address, data; 186 struct host_app_area host_app_area; 187 188 /* Fetch the address of the host_app_area_s 189 * instance in the host interest area */ 190 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 191 address = TARG_VTOP(ar->target_type, address); 192 193 if (ath6kl_diag_read32(ar, address, &data)) 194 return -EIO; 195 196 address = TARG_VTOP(ar->target_type, data); 197 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); 198 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 199 sizeof(struct host_app_area))) 200 return -EIO; 201 202 return 0; 203 } 204 205 static inline void set_ac2_ep_map(struct ath6kl *ar, 206 u8 ac, 207 enum htc_endpoint_id ep) 208 { 209 ar->ac2ep_map[ac] = ep; 210 ar->ep2ac_map[ep] = ac; 211 } 212 213 /* connect to a service */ 214 static int ath6kl_connectservice(struct ath6kl *ar, 215 struct htc_service_connect_req *con_req, 216 char *desc) 217 { 218 int status; 219 struct htc_service_connect_resp response; 220 221 memset(&response, 0, sizeof(response)); 222 223 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 224 if (status) { 225 ath6kl_err("failed to connect to %s service status:%d\n", 226 desc, status); 227 return status; 228 } 229 230 switch (con_req->svc_id) { 231 case WMI_CONTROL_SVC: 232 if (test_bit(WMI_ENABLED, &ar->flag)) 233 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 234 ar->ctrl_ep = response.endpoint; 235 break; 236 case WMI_DATA_BE_SVC: 237 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 238 break; 239 case WMI_DATA_BK_SVC: 240 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 241 break; 242 case WMI_DATA_VI_SVC: 243 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 244 break; 245 case WMI_DATA_VO_SVC: 246 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 247 break; 248 default: 249 ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 250 return -EINVAL; 251 } 252 253 return 0; 254 } 255 256 static int ath6kl_init_service_ep(struct ath6kl *ar) 257 { 258 struct htc_service_connect_req connect; 259 260 memset(&connect, 0, sizeof(connect)); 261 262 /* these fields are the same for all service endpoints */ 263 connect.ep_cb.rx = ath6kl_rx; 264 connect.ep_cb.rx_refill = ath6kl_rx_refill; 265 connect.ep_cb.tx_full = ath6kl_tx_queue_full; 266 267 /* 268 * Set the max queue depth so that our ath6kl_tx_queue_full handler 269 * gets called. 270 */ 271 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 272 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 273 if (!connect.ep_cb.rx_refill_thresh) 274 connect.ep_cb.rx_refill_thresh++; 275 276 /* connect to control service */ 277 connect.svc_id = WMI_CONTROL_SVC; 278 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 279 return -EIO; 280 281 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 282 283 /* 284 * Limit the HTC message size on the send path, although e can 285 * receive A-MSDU frames of 4K, we will only send ethernet-sized 286 * (802.3) frames on the send path. 287 */ 288 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 289 290 /* 291 * To reduce the amount of committed memory for larger A_MSDU 292 * frames, use the recv-alloc threshold mechanism for larger 293 * packets. 294 */ 295 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 296 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 297 298 /* 299 * For the remaining data services set the connection flag to 300 * reduce dribbling, if configured to do so. 301 */ 302 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 303 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 304 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 305 306 connect.svc_id = WMI_DATA_BE_SVC; 307 308 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 309 return -EIO; 310 311 /* connect to back-ground map this to WMI LOW_PRI */ 312 connect.svc_id = WMI_DATA_BK_SVC; 313 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 314 return -EIO; 315 316 /* connect to Video service, map this to to HI PRI */ 317 connect.svc_id = WMI_DATA_VI_SVC; 318 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 319 return -EIO; 320 321 /* 322 * Connect to VO service, this is currently not mapped to a WMI 323 * priority stream due to historical reasons. WMI originally 324 * defined 3 priorities over 3 mailboxes We can change this when 325 * WMI is reworked so that priorities are not dependent on 326 * mailboxes. 327 */ 328 connect.svc_id = WMI_DATA_VO_SVC; 329 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 330 return -EIO; 331 332 return 0; 333 } 334 335 void ath6kl_init_control_info(struct ath6kl_vif *vif) 336 { 337 ath6kl_init_profile_info(vif); 338 vif->def_txkey_index = 0; 339 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 340 vif->ch_hint = 0; 341 } 342 343 /* 344 * Set HTC/Mbox operational parameters, this can only be called when the 345 * target is in the BMI phase. 346 */ 347 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 348 u8 htc_ctrl_buf) 349 { 350 int status; 351 u32 blk_size; 352 353 blk_size = ar->mbox_info.block_size; 354 355 if (htc_ctrl_buf) 356 blk_size |= ((u32)htc_ctrl_buf) << 16; 357 358 /* set the host interest area for the block size */ 359 status = ath6kl_bmi_write(ar, 360 ath6kl_get_hi_item_addr(ar, 361 HI_ITEM(hi_mbox_io_block_sz)), 362 (u8 *)&blk_size, 363 4); 364 if (status) { 365 ath6kl_err("bmi_write_memory for IO block size failed\n"); 366 goto out; 367 } 368 369 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 370 blk_size, 371 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 372 373 if (mbox_isr_yield_val) { 374 /* set the host interest area for the mbox ISR yield limit */ 375 status = ath6kl_bmi_write(ar, 376 ath6kl_get_hi_item_addr(ar, 377 HI_ITEM(hi_mbox_isr_yield_limit)), 378 (u8 *)&mbox_isr_yield_val, 379 4); 380 if (status) { 381 ath6kl_err("bmi_write_memory for yield limit failed\n"); 382 goto out; 383 } 384 } 385 386 out: 387 return status; 388 } 389 390 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) 391 { 392 int status = 0; 393 int ret; 394 395 /* 396 * Configure the device for rx dot11 header rules. "0,0" are the 397 * default values. Required if checksum offload is needed. Set 398 * RxMetaVersion to 2. 399 */ 400 if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, 401 ar->rx_meta_ver, 0, 0)) { 402 ath6kl_err("unable to set the rx frame format\n"); 403 status = -EIO; 404 } 405 406 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) 407 if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, 408 IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { 409 ath6kl_err("unable to set power save fail event policy\n"); 410 status = -EIO; 411 } 412 413 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) 414 if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, 415 WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { 416 ath6kl_err("unable to set barker preamble policy\n"); 417 status = -EIO; 418 } 419 420 if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, 421 WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { 422 ath6kl_err("unable to set keep alive interval\n"); 423 status = -EIO; 424 } 425 426 if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, 427 WLAN_CONFIG_DISCONNECT_TIMEOUT)) { 428 ath6kl_err("unable to set disconnect timeout\n"); 429 status = -EIO; 430 } 431 432 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) 433 if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) { 434 ath6kl_err("unable to set txop bursting\n"); 435 status = -EIO; 436 } 437 438 if (ar->p2p && (ar->vif_max == 1 || idx)) { 439 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, 440 P2P_FLAG_CAPABILITIES_REQ | 441 P2P_FLAG_MACADDR_REQ | 442 P2P_FLAG_HMODEL_REQ); 443 if (ret) { 444 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " 445 "capabilities (%d) - assuming P2P not " 446 "supported\n", ret); 447 ar->p2p = 0; 448 } 449 } 450 451 if (ar->p2p && (ar->vif_max == 1 || idx)) { 452 /* Enable Probe Request reporting for P2P */ 453 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 454 if (ret) { 455 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " 456 "Request reporting (%d)\n", ret); 457 } 458 } 459 460 return status; 461 } 462 463 int ath6kl_configure_target(struct ath6kl *ar) 464 { 465 u32 param, ram_reserved_size; 466 u8 fw_iftype, fw_mode = 0, fw_submode = 0; 467 int i, status; 468 469 param = uart_debug; 470 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 471 HI_ITEM(hi_serial_enable)), (u8 *)¶m, 4)) { 472 ath6kl_err("bmi_write_memory for uart debug failed\n"); 473 return -EIO; 474 } 475 476 /* 477 * Note: Even though the firmware interface type is 478 * chosen as BSS_STA for all three interfaces, can 479 * be configured to IBSS/AP as long as the fw submode 480 * remains normal mode (0 - AP, STA and IBSS). But 481 * due to an target assert in firmware only one interface is 482 * configured for now. 483 */ 484 fw_iftype = HI_OPTION_FW_MODE_BSS_STA; 485 486 for (i = 0; i < ar->vif_max; i++) 487 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); 488 489 /* 490 * By default, submodes : 491 * vif[0] - AP/STA/IBSS 492 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" 493 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" 494 */ 495 496 for (i = 0; i < ar->max_norm_iface; i++) 497 fw_submode |= HI_OPTION_FW_SUBMODE_NONE << 498 (i * HI_OPTION_FW_SUBMODE_BITS); 499 500 for (i = ar->max_norm_iface; i < ar->vif_max; i++) 501 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 502 (i * HI_OPTION_FW_SUBMODE_BITS); 503 504 if (ar->p2p && ar->vif_max == 1) 505 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; 506 507 param = HTC_PROTOCOL_VERSION; 508 if (ath6kl_bmi_write(ar, 509 ath6kl_get_hi_item_addr(ar, 510 HI_ITEM(hi_app_host_interest)), 511 (u8 *)¶m, 4) != 0) { 512 ath6kl_err("bmi_write_memory for htc version failed\n"); 513 return -EIO; 514 } 515 516 /* set the firmware mode to STA/IBSS/AP */ 517 param = 0; 518 519 if (ath6kl_bmi_read(ar, 520 ath6kl_get_hi_item_addr(ar, 521 HI_ITEM(hi_option_flag)), 522 (u8 *)¶m, 4) != 0) { 523 ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 524 return -EIO; 525 } 526 527 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT); 528 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; 529 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; 530 531 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 532 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 533 534 if (ath6kl_bmi_write(ar, 535 ath6kl_get_hi_item_addr(ar, 536 HI_ITEM(hi_option_flag)), 537 (u8 *)¶m, 538 4) != 0) { 539 ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 540 return -EIO; 541 } 542 543 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 544 545 /* 546 * Hardcode the address use for the extended board data 547 * Ideally this should be pre-allocate by the OS at boot time 548 * But since it is a new feature and board data is loaded 549 * at init time, we have to workaround this from host. 550 * It is difficult to patch the firmware boot code, 551 * but possible in theory. 552 */ 553 554 param = ar->hw.board_ext_data_addr; 555 ram_reserved_size = ar->hw.reserved_ram_size; 556 557 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 558 HI_ITEM(hi_board_ext_data)), 559 (u8 *)¶m, 4) != 0) { 560 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 561 return -EIO; 562 } 563 564 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 565 HI_ITEM(hi_end_ram_reserve_sz)), 566 (u8 *)&ram_reserved_size, 4) != 0) { 567 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 568 return -EIO; 569 } 570 571 /* set the block size for the target */ 572 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 573 /* use default number of control buffers */ 574 return -EIO; 575 576 /* Configure GPIO AR600x UART */ 577 param = ar->hw.uarttx_pin; 578 status = ath6kl_bmi_write(ar, 579 ath6kl_get_hi_item_addr(ar, 580 HI_ITEM(hi_dbg_uart_txpin)), 581 (u8 *)¶m, 4); 582 if (status) 583 return status; 584 585 /* Configure target refclk_hz */ 586 param = ar->hw.refclk_hz; 587 status = ath6kl_bmi_write(ar, 588 ath6kl_get_hi_item_addr(ar, 589 HI_ITEM(hi_refclk_hz)), 590 (u8 *)¶m, 4); 591 if (status) 592 return status; 593 594 return 0; 595 } 596 597 void ath6kl_core_free(struct ath6kl *ar) 598 { 599 wiphy_free(ar->wiphy); 600 } 601 602 void ath6kl_core_cleanup(struct ath6kl *ar) 603 { 604 ath6kl_hif_power_off(ar); 605 606 destroy_workqueue(ar->ath6kl_wq); 607 608 if (ar->htc_target) 609 ath6kl_htc_cleanup(ar->htc_target); 610 611 ath6kl_cookie_cleanup(ar); 612 613 ath6kl_cleanup_amsdu_rxbufs(ar); 614 615 ath6kl_bmi_cleanup(ar); 616 617 ath6kl_debug_cleanup(ar); 618 619 kfree(ar->fw_board); 620 kfree(ar->fw_otp); 621 kfree(ar->fw); 622 kfree(ar->fw_patch); 623 624 ath6kl_deinit_ieee80211_hw(ar); 625 } 626 627 /* firmware upload */ 628 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 629 u8 **fw, size_t *fw_len) 630 { 631 const struct firmware *fw_entry; 632 int ret; 633 634 ret = request_firmware(&fw_entry, filename, ar->dev); 635 if (ret) 636 return ret; 637 638 *fw_len = fw_entry->size; 639 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 640 641 if (*fw == NULL) 642 ret = -ENOMEM; 643 644 release_firmware(fw_entry); 645 646 return ret; 647 } 648 649 #ifdef CONFIG_OF 650 /* 651 * Check the device tree for a board-id and use it to construct 652 * the pathname to the firmware file. Used (for now) to find a 653 * fallback to the "bdata.bin" file--typically a symlink to the 654 * appropriate board-specific file. 655 */ 656 static bool check_device_tree(struct ath6kl *ar) 657 { 658 static const char *board_id_prop = "atheros,board-id"; 659 struct device_node *node; 660 char board_filename[64]; 661 const char *board_id; 662 int ret; 663 664 for_each_compatible_node(node, NULL, "atheros,ath6kl") { 665 board_id = of_get_property(node, board_id_prop, NULL); 666 if (board_id == NULL) { 667 ath6kl_warn("No \"%s\" property on %s node.\n", 668 board_id_prop, node->name); 669 continue; 670 } 671 snprintf(board_filename, sizeof(board_filename), 672 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id); 673 674 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 675 &ar->fw_board_len); 676 if (ret) { 677 ath6kl_err("Failed to get DT board file %s: %d\n", 678 board_filename, ret); 679 continue; 680 } 681 return true; 682 } 683 return false; 684 } 685 #else 686 static bool check_device_tree(struct ath6kl *ar) 687 { 688 return false; 689 } 690 #endif /* CONFIG_OF */ 691 692 static int ath6kl_fetch_board_file(struct ath6kl *ar) 693 { 694 const char *filename; 695 int ret; 696 697 if (ar->fw_board != NULL) 698 return 0; 699 700 if (WARN_ON(ar->hw.fw_board == NULL)) 701 return -EINVAL; 702 703 filename = ar->hw.fw_board; 704 705 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 706 &ar->fw_board_len); 707 if (ret == 0) { 708 /* managed to get proper board file */ 709 return 0; 710 } 711 712 if (check_device_tree(ar)) { 713 /* got board file from device tree */ 714 return 0; 715 } 716 717 /* there was no proper board file, try to use default instead */ 718 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 719 filename, ret); 720 721 filename = ar->hw.fw_default_board; 722 723 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 724 &ar->fw_board_len); 725 if (ret) { 726 ath6kl_err("Failed to get default board file %s: %d\n", 727 filename, ret); 728 return ret; 729 } 730 731 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 732 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 733 734 return 0; 735 } 736 737 static int ath6kl_fetch_otp_file(struct ath6kl *ar) 738 { 739 char filename[100]; 740 int ret; 741 742 if (ar->fw_otp != NULL) 743 return 0; 744 745 if (ar->hw.fw.otp == NULL) { 746 ath6kl_dbg(ATH6KL_DBG_BOOT, 747 "no OTP file configured for this hw\n"); 748 return 0; 749 } 750 751 snprintf(filename, sizeof(filename), "%s/%s", 752 ar->hw.fw.dir, ar->hw.fw.otp); 753 754 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 755 &ar->fw_otp_len); 756 if (ret) { 757 ath6kl_err("Failed to get OTP file %s: %d\n", 758 filename, ret); 759 return ret; 760 } 761 762 return 0; 763 } 764 765 static int ath6kl_fetch_fw_file(struct ath6kl *ar) 766 { 767 char filename[100]; 768 int ret; 769 770 if (ar->fw != NULL) 771 return 0; 772 773 if (testmode) { 774 if (ar->hw.fw.tcmd == NULL) { 775 ath6kl_warn("testmode not supported\n"); 776 return -EOPNOTSUPP; 777 } 778 779 snprintf(filename, sizeof(filename), "%s/%s", 780 ar->hw.fw.dir, ar->hw.fw.tcmd); 781 782 set_bit(TESTMODE, &ar->flag); 783 784 goto get_fw; 785 } 786 787 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */ 788 if (WARN_ON(ar->hw.fw.fw == NULL)) 789 return -EINVAL; 790 791 snprintf(filename, sizeof(filename), "%s/%s", 792 ar->hw.fw.dir, ar->hw.fw.fw); 793 794 get_fw: 795 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 796 if (ret) { 797 ath6kl_err("Failed to get firmware file %s: %d\n", 798 filename, ret); 799 return ret; 800 } 801 802 return 0; 803 } 804 805 static int ath6kl_fetch_patch_file(struct ath6kl *ar) 806 { 807 char filename[100]; 808 int ret; 809 810 if (ar->fw_patch != NULL) 811 return 0; 812 813 if (ar->hw.fw.patch == NULL) 814 return 0; 815 816 snprintf(filename, sizeof(filename), "%s/%s", 817 ar->hw.fw.dir, ar->hw.fw.patch); 818 819 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 820 &ar->fw_patch_len); 821 if (ret) { 822 ath6kl_err("Failed to get patch file %s: %d\n", 823 filename, ret); 824 return ret; 825 } 826 827 return 0; 828 } 829 830 static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 831 { 832 int ret; 833 834 ret = ath6kl_fetch_otp_file(ar); 835 if (ret) 836 return ret; 837 838 ret = ath6kl_fetch_fw_file(ar); 839 if (ret) 840 return ret; 841 842 ret = ath6kl_fetch_patch_file(ar); 843 if (ret) 844 return ret; 845 846 return 0; 847 } 848 849 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name) 850 { 851 size_t magic_len, len, ie_len; 852 const struct firmware *fw; 853 struct ath6kl_fw_ie *hdr; 854 char filename[100]; 855 const u8 *data; 856 int ret, ie_id, i, index, bit; 857 __le32 *val; 858 859 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name); 860 861 ret = request_firmware(&fw, filename, ar->dev); 862 if (ret) 863 return ret; 864 865 data = fw->data; 866 len = fw->size; 867 868 /* magic also includes the null byte, check that as well */ 869 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 870 871 if (len < magic_len) { 872 ret = -EINVAL; 873 goto out; 874 } 875 876 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 877 ret = -EINVAL; 878 goto out; 879 } 880 881 len -= magic_len; 882 data += magic_len; 883 884 /* loop elements */ 885 while (len > sizeof(struct ath6kl_fw_ie)) { 886 /* hdr is unaligned! */ 887 hdr = (struct ath6kl_fw_ie *) data; 888 889 ie_id = le32_to_cpup(&hdr->id); 890 ie_len = le32_to_cpup(&hdr->len); 891 892 len -= sizeof(*hdr); 893 data += sizeof(*hdr); 894 895 if (len < ie_len) { 896 ret = -EINVAL; 897 goto out; 898 } 899 900 switch (ie_id) { 901 case ATH6KL_FW_IE_OTP_IMAGE: 902 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", 903 ie_len); 904 905 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 906 907 if (ar->fw_otp == NULL) { 908 ret = -ENOMEM; 909 goto out; 910 } 911 912 ar->fw_otp_len = ie_len; 913 break; 914 case ATH6KL_FW_IE_FW_IMAGE: 915 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", 916 ie_len); 917 918 ar->fw = kmemdup(data, ie_len, GFP_KERNEL); 919 920 if (ar->fw == NULL) { 921 ret = -ENOMEM; 922 goto out; 923 } 924 925 ar->fw_len = ie_len; 926 break; 927 case ATH6KL_FW_IE_PATCH_IMAGE: 928 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", 929 ie_len); 930 931 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 932 933 if (ar->fw_patch == NULL) { 934 ret = -ENOMEM; 935 goto out; 936 } 937 938 ar->fw_patch_len = ie_len; 939 break; 940 case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 941 val = (__le32 *) data; 942 ar->hw.reserved_ram_size = le32_to_cpup(val); 943 944 ath6kl_dbg(ATH6KL_DBG_BOOT, 945 "found reserved ram size ie 0x%d\n", 946 ar->hw.reserved_ram_size); 947 break; 948 case ATH6KL_FW_IE_CAPABILITIES: 949 if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8)) 950 break; 951 952 ath6kl_dbg(ATH6KL_DBG_BOOT, 953 "found firmware capabilities ie (%zd B)\n", 954 ie_len); 955 956 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 957 index = i / 8; 958 bit = i % 8; 959 960 if (data[index] & (1 << bit)) 961 __set_bit(i, ar->fw_capabilities); 962 } 963 964 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 965 ar->fw_capabilities, 966 sizeof(ar->fw_capabilities)); 967 break; 968 case ATH6KL_FW_IE_PATCH_ADDR: 969 if (ie_len != sizeof(*val)) 970 break; 971 972 val = (__le32 *) data; 973 ar->hw.dataset_patch_addr = le32_to_cpup(val); 974 975 ath6kl_dbg(ATH6KL_DBG_BOOT, 976 "found patch address ie 0x%x\n", 977 ar->hw.dataset_patch_addr); 978 break; 979 case ATH6KL_FW_IE_BOARD_ADDR: 980 if (ie_len != sizeof(*val)) 981 break; 982 983 val = (__le32 *) data; 984 ar->hw.board_addr = le32_to_cpup(val); 985 986 ath6kl_dbg(ATH6KL_DBG_BOOT, 987 "found board address ie 0x%x\n", 988 ar->hw.board_addr); 989 break; 990 case ATH6KL_FW_IE_VIF_MAX: 991 if (ie_len != sizeof(*val)) 992 break; 993 994 val = (__le32 *) data; 995 ar->vif_max = min_t(unsigned int, le32_to_cpup(val), 996 ATH6KL_VIF_MAX); 997 998 if (ar->vif_max > 1 && !ar->p2p) 999 ar->max_norm_iface = 2; 1000 1001 ath6kl_dbg(ATH6KL_DBG_BOOT, 1002 "found vif max ie %d\n", ar->vif_max); 1003 break; 1004 default: 1005 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 1006 le32_to_cpup(&hdr->id)); 1007 break; 1008 } 1009 1010 len -= ie_len; 1011 data += ie_len; 1012 }; 1013 1014 ret = 0; 1015 out: 1016 release_firmware(fw); 1017 1018 return ret; 1019 } 1020 1021 static int ath6kl_fetch_firmwares(struct ath6kl *ar) 1022 { 1023 int ret; 1024 1025 ret = ath6kl_fetch_board_file(ar); 1026 if (ret) 1027 return ret; 1028 1029 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE); 1030 if (ret == 0) { 1031 ar->fw_api = 3; 1032 goto out; 1033 } 1034 1035 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE); 1036 if (ret == 0) { 1037 ar->fw_api = 2; 1038 goto out; 1039 } 1040 1041 ret = ath6kl_fetch_fw_api1(ar); 1042 if (ret) 1043 return ret; 1044 1045 ar->fw_api = 1; 1046 1047 out: 1048 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1049 1050 return 0; 1051 } 1052 1053 static int ath6kl_upload_board_file(struct ath6kl *ar) 1054 { 1055 u32 board_address, board_ext_address, param; 1056 u32 board_data_size, board_ext_data_size; 1057 int ret; 1058 1059 if (WARN_ON(ar->fw_board == NULL)) 1060 return -ENOENT; 1061 1062 /* 1063 * Determine where in Target RAM to write Board Data. 1064 * For AR6004, host determine Target RAM address for 1065 * writing board data. 1066 */ 1067 if (ar->hw.board_addr != 0) { 1068 board_address = ar->hw.board_addr; 1069 ath6kl_bmi_write(ar, 1070 ath6kl_get_hi_item_addr(ar, 1071 HI_ITEM(hi_board_data)), 1072 (u8 *) &board_address, 4); 1073 } else { 1074 ath6kl_bmi_read(ar, 1075 ath6kl_get_hi_item_addr(ar, 1076 HI_ITEM(hi_board_data)), 1077 (u8 *) &board_address, 4); 1078 } 1079 1080 /* determine where in target ram to write extended board data */ 1081 ath6kl_bmi_read(ar, 1082 ath6kl_get_hi_item_addr(ar, 1083 HI_ITEM(hi_board_ext_data)), 1084 (u8 *) &board_ext_address, 4); 1085 1086 if (ar->target_type == TARGET_TYPE_AR6003 && 1087 board_ext_address == 0) { 1088 ath6kl_err("Failed to get board file target address.\n"); 1089 return -EINVAL; 1090 } 1091 1092 switch (ar->target_type) { 1093 case TARGET_TYPE_AR6003: 1094 board_data_size = AR6003_BOARD_DATA_SZ; 1095 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 1096 break; 1097 case TARGET_TYPE_AR6004: 1098 board_data_size = AR6004_BOARD_DATA_SZ; 1099 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 1100 break; 1101 default: 1102 WARN_ON(1); 1103 return -EINVAL; 1104 break; 1105 } 1106 1107 if (board_ext_address && 1108 ar->fw_board_len == (board_data_size + board_ext_data_size)) { 1109 1110 /* write extended board data */ 1111 ath6kl_dbg(ATH6KL_DBG_BOOT, 1112 "writing extended board data to 0x%x (%d B)\n", 1113 board_ext_address, board_ext_data_size); 1114 1115 ret = ath6kl_bmi_write(ar, board_ext_address, 1116 ar->fw_board + board_data_size, 1117 board_ext_data_size); 1118 if (ret) { 1119 ath6kl_err("Failed to write extended board data: %d\n", 1120 ret); 1121 return ret; 1122 } 1123 1124 /* record that extended board data is initialized */ 1125 param = (board_ext_data_size << 16) | 1; 1126 1127 ath6kl_bmi_write(ar, 1128 ath6kl_get_hi_item_addr(ar, 1129 HI_ITEM(hi_board_ext_data_config)), 1130 (unsigned char *) ¶m, 4); 1131 } 1132 1133 if (ar->fw_board_len < board_data_size) { 1134 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1135 ret = -EINVAL; 1136 return ret; 1137 } 1138 1139 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 1140 board_address, board_data_size); 1141 1142 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 1143 board_data_size); 1144 1145 if (ret) { 1146 ath6kl_err("Board file bmi write failed: %d\n", ret); 1147 return ret; 1148 } 1149 1150 /* record the fact that Board Data IS initialized */ 1151 param = 1; 1152 ath6kl_bmi_write(ar, 1153 ath6kl_get_hi_item_addr(ar, 1154 HI_ITEM(hi_board_data_initialized)), 1155 (u8 *)¶m, 4); 1156 1157 return ret; 1158 } 1159 1160 static int ath6kl_upload_otp(struct ath6kl *ar) 1161 { 1162 u32 address, param; 1163 bool from_hw = false; 1164 int ret; 1165 1166 if (ar->fw_otp == NULL) 1167 return 0; 1168 1169 address = ar->hw.app_load_addr; 1170 1171 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, 1172 ar->fw_otp_len); 1173 1174 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1175 ar->fw_otp_len); 1176 if (ret) { 1177 ath6kl_err("Failed to upload OTP file: %d\n", ret); 1178 return ret; 1179 } 1180 1181 /* read firmware start address */ 1182 ret = ath6kl_bmi_read(ar, 1183 ath6kl_get_hi_item_addr(ar, 1184 HI_ITEM(hi_app_start)), 1185 (u8 *) &address, sizeof(address)); 1186 1187 if (ret) { 1188 ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1189 return ret; 1190 } 1191 1192 if (ar->hw.app_start_override_addr == 0) { 1193 ar->hw.app_start_override_addr = address; 1194 from_hw = true; 1195 } 1196 1197 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", 1198 from_hw ? " (from hw)" : "", 1199 ar->hw.app_start_override_addr); 1200 1201 /* execute the OTP code */ 1202 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", 1203 ar->hw.app_start_override_addr); 1204 param = 0; 1205 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); 1206 1207 return ret; 1208 } 1209 1210 static int ath6kl_upload_firmware(struct ath6kl *ar) 1211 { 1212 u32 address; 1213 int ret; 1214 1215 if (WARN_ON(ar->fw == NULL)) 1216 return 0; 1217 1218 address = ar->hw.app_load_addr; 1219 1220 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", 1221 address, ar->fw_len); 1222 1223 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1224 1225 if (ret) { 1226 ath6kl_err("Failed to write firmware: %d\n", ret); 1227 return ret; 1228 } 1229 1230 /* 1231 * Set starting address for firmware 1232 * Don't need to setup app_start override addr on AR6004 1233 */ 1234 if (ar->target_type != TARGET_TYPE_AR6004) { 1235 address = ar->hw.app_start_override_addr; 1236 ath6kl_bmi_set_app_start(ar, address); 1237 } 1238 return ret; 1239 } 1240 1241 static int ath6kl_upload_patch(struct ath6kl *ar) 1242 { 1243 u32 address, param; 1244 int ret; 1245 1246 if (ar->fw_patch == NULL) 1247 return 0; 1248 1249 address = ar->hw.dataset_patch_addr; 1250 1251 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", 1252 address, ar->fw_patch_len); 1253 1254 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1255 if (ret) { 1256 ath6kl_err("Failed to write patch file: %d\n", ret); 1257 return ret; 1258 } 1259 1260 param = address; 1261 ath6kl_bmi_write(ar, 1262 ath6kl_get_hi_item_addr(ar, 1263 HI_ITEM(hi_dset_list_head)), 1264 (unsigned char *) ¶m, 4); 1265 1266 return 0; 1267 } 1268 1269 static int ath6kl_init_upload(struct ath6kl *ar) 1270 { 1271 u32 param, options, sleep, address; 1272 int status = 0; 1273 1274 if (ar->target_type != TARGET_TYPE_AR6003 && 1275 ar->target_type != TARGET_TYPE_AR6004) 1276 return -EINVAL; 1277 1278 /* temporarily disable system sleep */ 1279 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1280 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1281 if (status) 1282 return status; 1283 1284 options = param; 1285 1286 param |= ATH6KL_OPTION_SLEEP_DISABLE; 1287 status = ath6kl_bmi_reg_write(ar, address, param); 1288 if (status) 1289 return status; 1290 1291 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1292 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1293 if (status) 1294 return status; 1295 1296 sleep = param; 1297 1298 param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1299 status = ath6kl_bmi_reg_write(ar, address, param); 1300 if (status) 1301 return status; 1302 1303 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1304 options, sleep); 1305 1306 /* program analog PLL register */ 1307 /* no need to control 40/44MHz clock on AR6004 */ 1308 if (ar->target_type != TARGET_TYPE_AR6004) { 1309 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1310 0xF9104001); 1311 1312 if (status) 1313 return status; 1314 1315 /* Run at 80/88MHz by default */ 1316 param = SM(CPU_CLOCK_STANDARD, 1); 1317 1318 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1319 status = ath6kl_bmi_reg_write(ar, address, param); 1320 if (status) 1321 return status; 1322 } 1323 1324 param = 0; 1325 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1326 param = SM(LPO_CAL_ENABLE, 1); 1327 status = ath6kl_bmi_reg_write(ar, address, param); 1328 if (status) 1329 return status; 1330 1331 /* WAR to avoid SDIO CRC err */ 1332 if (ar->version.target_ver == AR6003_HW_2_0_VERSION) { 1333 ath6kl_err("temporary war to avoid sdio crc error\n"); 1334 1335 param = 0x20; 1336 1337 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1338 status = ath6kl_bmi_reg_write(ar, address, param); 1339 if (status) 1340 return status; 1341 1342 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1343 status = ath6kl_bmi_reg_write(ar, address, param); 1344 if (status) 1345 return status; 1346 1347 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1348 status = ath6kl_bmi_reg_write(ar, address, param); 1349 if (status) 1350 return status; 1351 1352 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1353 status = ath6kl_bmi_reg_write(ar, address, param); 1354 if (status) 1355 return status; 1356 } 1357 1358 /* write EEPROM data to Target RAM */ 1359 status = ath6kl_upload_board_file(ar); 1360 if (status) 1361 return status; 1362 1363 /* transfer One time Programmable data */ 1364 status = ath6kl_upload_otp(ar); 1365 if (status) 1366 return status; 1367 1368 /* Download Target firmware */ 1369 status = ath6kl_upload_firmware(ar); 1370 if (status) 1371 return status; 1372 1373 status = ath6kl_upload_patch(ar); 1374 if (status) 1375 return status; 1376 1377 /* Restore system sleep */ 1378 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1379 status = ath6kl_bmi_reg_write(ar, address, sleep); 1380 if (status) 1381 return status; 1382 1383 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1384 param = options | 0x20; 1385 status = ath6kl_bmi_reg_write(ar, address, param); 1386 if (status) 1387 return status; 1388 1389 return status; 1390 } 1391 1392 static int ath6kl_init_hw_params(struct ath6kl *ar) 1393 { 1394 const struct ath6kl_hw *hw; 1395 int i; 1396 1397 for (i = 0; i < ARRAY_SIZE(hw_list); i++) { 1398 hw = &hw_list[i]; 1399 1400 if (hw->id == ar->version.target_ver) 1401 break; 1402 } 1403 1404 if (i == ARRAY_SIZE(hw_list)) { 1405 ath6kl_err("Unsupported hardware version: 0x%x\n", 1406 ar->version.target_ver); 1407 return -EINVAL; 1408 } 1409 1410 ar->hw = *hw; 1411 1412 ath6kl_dbg(ATH6KL_DBG_BOOT, 1413 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 1414 ar->version.target_ver, ar->target_type, 1415 ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 1416 ath6kl_dbg(ATH6KL_DBG_BOOT, 1417 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 1418 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 1419 ar->hw.reserved_ram_size); 1420 ath6kl_dbg(ATH6KL_DBG_BOOT, 1421 "refclk_hz %d uarttx_pin %d", 1422 ar->hw.refclk_hz, ar->hw.uarttx_pin); 1423 1424 return 0; 1425 } 1426 1427 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type) 1428 { 1429 switch (type) { 1430 case ATH6KL_HIF_TYPE_SDIO: 1431 return "sdio"; 1432 case ATH6KL_HIF_TYPE_USB: 1433 return "usb"; 1434 } 1435 1436 return NULL; 1437 } 1438 1439 int ath6kl_init_hw_start(struct ath6kl *ar) 1440 { 1441 long timeleft; 1442 int ret, i; 1443 1444 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); 1445 1446 ret = ath6kl_hif_power_on(ar); 1447 if (ret) 1448 return ret; 1449 1450 ret = ath6kl_configure_target(ar); 1451 if (ret) 1452 goto err_power_off; 1453 1454 ret = ath6kl_init_upload(ar); 1455 if (ret) 1456 goto err_power_off; 1457 1458 /* Do we need to finish the BMI phase */ 1459 /* FIXME: return error from ath6kl_bmi_done() */ 1460 if (ath6kl_bmi_done(ar)) { 1461 ret = -EIO; 1462 goto err_power_off; 1463 } 1464 1465 /* 1466 * The reason we have to wait for the target here is that the 1467 * driver layer has to init BMI in order to set the host block 1468 * size. 1469 */ 1470 if (ath6kl_htc_wait_target(ar->htc_target)) { 1471 ret = -EIO; 1472 goto err_power_off; 1473 } 1474 1475 if (ath6kl_init_service_ep(ar)) { 1476 ret = -EIO; 1477 goto err_cleanup_scatter; 1478 } 1479 1480 /* setup credit distribution */ 1481 ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info); 1482 1483 /* start HTC */ 1484 ret = ath6kl_htc_start(ar->htc_target); 1485 if (ret) { 1486 /* FIXME: call this */ 1487 ath6kl_cookie_cleanup(ar); 1488 goto err_cleanup_scatter; 1489 } 1490 1491 /* Wait for Wmi event to be ready */ 1492 timeleft = wait_event_interruptible_timeout(ar->event_wq, 1493 test_bit(WMI_READY, 1494 &ar->flag), 1495 WMI_TIMEOUT); 1496 1497 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 1498 1499 1500 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) { 1501 ath6kl_info("%s %s fw %s api %d%s\n", 1502 ar->hw.name, 1503 ath6kl_init_get_hif_name(ar->hif_type), 1504 ar->wiphy->fw_version, 1505 ar->fw_api, 1506 test_bit(TESTMODE, &ar->flag) ? " testmode" : ""); 1507 } 1508 1509 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 1510 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 1511 ATH6KL_ABI_VERSION, ar->version.abi_ver); 1512 ret = -EIO; 1513 goto err_htc_stop; 1514 } 1515 1516 if (!timeleft || signal_pending(current)) { 1517 ath6kl_err("wmi is not ready or wait was interrupted\n"); 1518 ret = -EIO; 1519 goto err_htc_stop; 1520 } 1521 1522 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 1523 1524 /* communicate the wmi protocol verision to the target */ 1525 /* FIXME: return error */ 1526 if ((ath6kl_set_host_app_area(ar)) != 0) 1527 ath6kl_err("unable to set the host app area\n"); 1528 1529 for (i = 0; i < ar->vif_max; i++) { 1530 ret = ath6kl_target_config_wlan_params(ar, i); 1531 if (ret) 1532 goto err_htc_stop; 1533 } 1534 1535 ar->state = ATH6KL_STATE_ON; 1536 1537 return 0; 1538 1539 err_htc_stop: 1540 ath6kl_htc_stop(ar->htc_target); 1541 err_cleanup_scatter: 1542 ath6kl_hif_cleanup_scatter(ar); 1543 err_power_off: 1544 ath6kl_hif_power_off(ar); 1545 1546 return ret; 1547 } 1548 1549 int ath6kl_init_hw_stop(struct ath6kl *ar) 1550 { 1551 int ret; 1552 1553 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); 1554 1555 ath6kl_htc_stop(ar->htc_target); 1556 1557 ath6kl_hif_stop(ar); 1558 1559 ath6kl_bmi_reset(ar); 1560 1561 ret = ath6kl_hif_power_off(ar); 1562 if (ret) 1563 ath6kl_warn("failed to power off hif: %d\n", ret); 1564 1565 ar->state = ATH6KL_STATE_OFF; 1566 1567 return 0; 1568 } 1569 1570 int ath6kl_core_init(struct ath6kl *ar) 1571 { 1572 struct ath6kl_bmi_target_info targ_info; 1573 struct net_device *ndev; 1574 int ret = 0, i; 1575 1576 ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); 1577 if (!ar->ath6kl_wq) 1578 return -ENOMEM; 1579 1580 ret = ath6kl_bmi_init(ar); 1581 if (ret) 1582 goto err_wq; 1583 1584 /* 1585 * Turn on power to get hardware (target) version and leave power 1586 * on delibrately as we will boot the hardware anyway within few 1587 * seconds. 1588 */ 1589 ret = ath6kl_hif_power_on(ar); 1590 if (ret) 1591 goto err_bmi_cleanup; 1592 1593 ret = ath6kl_bmi_get_target_info(ar, &targ_info); 1594 if (ret) 1595 goto err_power_off; 1596 1597 ar->version.target_ver = le32_to_cpu(targ_info.version); 1598 ar->target_type = le32_to_cpu(targ_info.type); 1599 ar->wiphy->hw_version = le32_to_cpu(targ_info.version); 1600 1601 ret = ath6kl_init_hw_params(ar); 1602 if (ret) 1603 goto err_power_off; 1604 1605 ar->htc_target = ath6kl_htc_create(ar); 1606 1607 if (!ar->htc_target) { 1608 ret = -ENOMEM; 1609 goto err_power_off; 1610 } 1611 1612 ret = ath6kl_fetch_firmwares(ar); 1613 if (ret) 1614 goto err_htc_cleanup; 1615 1616 /* FIXME: we should free all firmwares in the error cases below */ 1617 1618 /* Indicate that WMI is enabled (although not ready yet) */ 1619 set_bit(WMI_ENABLED, &ar->flag); 1620 ar->wmi = ath6kl_wmi_init(ar); 1621 if (!ar->wmi) { 1622 ath6kl_err("failed to initialize wmi\n"); 1623 ret = -EIO; 1624 goto err_htc_cleanup; 1625 } 1626 1627 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); 1628 1629 ret = ath6kl_register_ieee80211_hw(ar); 1630 if (ret) 1631 goto err_node_cleanup; 1632 1633 ret = ath6kl_debug_init(ar); 1634 if (ret) { 1635 wiphy_unregister(ar->wiphy); 1636 goto err_node_cleanup; 1637 } 1638 1639 for (i = 0; i < ar->vif_max; i++) 1640 ar->avail_idx_map |= BIT(i); 1641 1642 rtnl_lock(); 1643 1644 /* Add an initial station interface */ 1645 ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0, 1646 INFRA_NETWORK); 1647 1648 rtnl_unlock(); 1649 1650 if (!ndev) { 1651 ath6kl_err("Failed to instantiate a network device\n"); 1652 ret = -ENOMEM; 1653 wiphy_unregister(ar->wiphy); 1654 goto err_debug_init; 1655 } 1656 1657 1658 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", 1659 __func__, ndev->name, ndev, ar); 1660 1661 /* setup access class priority mappings */ 1662 ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ 1663 ar->ac_stream_pri_map[WMM_AC_BE] = 1; 1664 ar->ac_stream_pri_map[WMM_AC_VI] = 2; 1665 ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ 1666 1667 /* give our connected endpoints some buffers */ 1668 ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); 1669 ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); 1670 1671 /* allocate some buffers that handle larger AMSDU frames */ 1672 ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); 1673 1674 ath6kl_cookie_init(ar); 1675 1676 ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | 1677 ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; 1678 1679 if (suspend_cutpower) 1680 ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER; 1681 1682 ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM | 1683 WIPHY_FLAG_HAVE_AP_SME | 1684 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL | 1685 WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD; 1686 1687 if (test_bit(ATH6KL_FW_CAPABILITY_SCHED_SCAN, ar->fw_capabilities)) 1688 ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN; 1689 1690 ar->wiphy->probe_resp_offload = 1691 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS | 1692 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 | 1693 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P | 1694 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U; 1695 1696 set_bit(FIRST_BOOT, &ar->flag); 1697 1698 ndev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_RXCSUM; 1699 1700 ret = ath6kl_init_hw_start(ar); 1701 if (ret) { 1702 ath6kl_err("Failed to start hardware: %d\n", ret); 1703 goto err_rxbuf_cleanup; 1704 } 1705 1706 /* 1707 * Set mac address which is received in ready event 1708 * FIXME: Move to ath6kl_interface_add() 1709 */ 1710 memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN); 1711 1712 return ret; 1713 1714 err_rxbuf_cleanup: 1715 ath6kl_htc_flush_rx_buf(ar->htc_target); 1716 ath6kl_cleanup_amsdu_rxbufs(ar); 1717 rtnl_lock(); 1718 ath6kl_deinit_if_data(netdev_priv(ndev)); 1719 rtnl_unlock(); 1720 wiphy_unregister(ar->wiphy); 1721 err_debug_init: 1722 ath6kl_debug_cleanup(ar); 1723 err_node_cleanup: 1724 ath6kl_wmi_shutdown(ar->wmi); 1725 clear_bit(WMI_ENABLED, &ar->flag); 1726 ar->wmi = NULL; 1727 err_htc_cleanup: 1728 ath6kl_htc_cleanup(ar->htc_target); 1729 err_power_off: 1730 ath6kl_hif_power_off(ar); 1731 err_bmi_cleanup: 1732 ath6kl_bmi_cleanup(ar); 1733 err_wq: 1734 destroy_workqueue(ar->ath6kl_wq); 1735 1736 return ret; 1737 } 1738 1739 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) 1740 { 1741 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 1742 bool discon_issued; 1743 1744 netif_stop_queue(vif->ndev); 1745 1746 clear_bit(WLAN_ENABLED, &vif->flags); 1747 1748 if (wmi_ready) { 1749 discon_issued = test_bit(CONNECTED, &vif->flags) || 1750 test_bit(CONNECT_PEND, &vif->flags); 1751 ath6kl_disconnect(vif); 1752 del_timer(&vif->disconnect_timer); 1753 1754 if (discon_issued) 1755 ath6kl_disconnect_event(vif, DISCONNECT_CMD, 1756 (vif->nw_type & AP_NETWORK) ? 1757 bcast_mac : vif->bssid, 1758 0, NULL, 0); 1759 } 1760 1761 if (vif->scan_req) { 1762 cfg80211_scan_done(vif->scan_req, true); 1763 vif->scan_req = NULL; 1764 } 1765 } 1766 1767 void ath6kl_stop_txrx(struct ath6kl *ar) 1768 { 1769 struct ath6kl_vif *vif, *tmp_vif; 1770 1771 set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1772 1773 if (down_interruptible(&ar->sem)) { 1774 ath6kl_err("down_interruptible failed\n"); 1775 return; 1776 } 1777 1778 spin_lock_bh(&ar->list_lock); 1779 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { 1780 list_del(&vif->list); 1781 spin_unlock_bh(&ar->list_lock); 1782 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); 1783 rtnl_lock(); 1784 ath6kl_deinit_if_data(vif); 1785 rtnl_unlock(); 1786 spin_lock_bh(&ar->list_lock); 1787 } 1788 spin_unlock_bh(&ar->list_lock); 1789 1790 clear_bit(WMI_READY, &ar->flag); 1791 1792 /* 1793 * After wmi_shudown all WMI events will be dropped. We 1794 * need to cleanup the buffers allocated in AP mode and 1795 * give disconnect notification to stack, which usually 1796 * happens in the disconnect_event. Simulate the disconnect 1797 * event by calling the function directly. Sometimes 1798 * disconnect_event will be received when the debug logs 1799 * are collected. 1800 */ 1801 ath6kl_wmi_shutdown(ar->wmi); 1802 1803 clear_bit(WMI_ENABLED, &ar->flag); 1804 if (ar->htc_target) { 1805 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); 1806 ath6kl_htc_stop(ar->htc_target); 1807 } 1808 1809 /* 1810 * Try to reset the device if we can. The driver may have been 1811 * configure NOT to reset the target during a debug session. 1812 */ 1813 ath6kl_dbg(ATH6KL_DBG_TRC, 1814 "attempting to reset target on instance destroy\n"); 1815 ath6kl_reset_device(ar, ar->target_type, true, true); 1816 1817 clear_bit(WLAN_ENABLED, &ar->flag); 1818 } 1819