1 2 /* 3 * Copyright (c) 2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 20 21 #include <linux/moduleparam.h> 22 #include <linux/errno.h> 23 #include <linux/export.h> 24 #include <linux/of.h> 25 #include <linux/mmc/sdio_func.h> 26 #include <linux/vmalloc.h> 27 28 #include "core.h" 29 #include "cfg80211.h" 30 #include "target.h" 31 #include "debug.h" 32 #include "hif-ops.h" 33 #include "htc-ops.h" 34 35 static const struct ath6kl_hw hw_list[] = { 36 { 37 .id = AR6003_HW_2_0_VERSION, 38 .name = "ar6003 hw 2.0", 39 .dataset_patch_addr = 0x57e884, 40 .app_load_addr = 0x543180, 41 .board_ext_data_addr = 0x57e500, 42 .reserved_ram_size = 6912, 43 .refclk_hz = 26000000, 44 .uarttx_pin = 8, 45 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR, 46 47 /* hw2.0 needs override address hardcoded */ 48 .app_start_override_addr = 0x944C00, 49 50 .fw = { 51 .dir = AR6003_HW_2_0_FW_DIR, 52 .otp = AR6003_HW_2_0_OTP_FILE, 53 .fw = AR6003_HW_2_0_FIRMWARE_FILE, 54 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE, 55 .patch = AR6003_HW_2_0_PATCH_FILE, 56 }, 57 58 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE, 59 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE, 60 }, 61 { 62 .id = AR6003_HW_2_1_1_VERSION, 63 .name = "ar6003 hw 2.1.1", 64 .dataset_patch_addr = 0x57ff74, 65 .app_load_addr = 0x1234, 66 .board_ext_data_addr = 0x542330, 67 .reserved_ram_size = 512, 68 .refclk_hz = 26000000, 69 .uarttx_pin = 8, 70 .testscript_addr = 0x57ef74, 71 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR, 72 73 .fw = { 74 .dir = AR6003_HW_2_1_1_FW_DIR, 75 .otp = AR6003_HW_2_1_1_OTP_FILE, 76 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE, 77 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE, 78 .patch = AR6003_HW_2_1_1_PATCH_FILE, 79 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE, 80 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE, 81 }, 82 83 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE, 84 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE, 85 }, 86 { 87 .id = AR6004_HW_1_0_VERSION, 88 .name = "ar6004 hw 1.0", 89 .dataset_patch_addr = 0x57e884, 90 .app_load_addr = 0x1234, 91 .board_ext_data_addr = 0x437000, 92 .reserved_ram_size = 19456, 93 .board_addr = 0x433900, 94 .refclk_hz = 26000000, 95 .uarttx_pin = 11, 96 .flags = 0, 97 98 .fw = { 99 .dir = AR6004_HW_1_0_FW_DIR, 100 .fw = AR6004_HW_1_0_FIRMWARE_FILE, 101 }, 102 103 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE, 104 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE, 105 }, 106 { 107 .id = AR6004_HW_1_1_VERSION, 108 .name = "ar6004 hw 1.1", 109 .dataset_patch_addr = 0x57e884, 110 .app_load_addr = 0x1234, 111 .board_ext_data_addr = 0x437000, 112 .reserved_ram_size = 11264, 113 .board_addr = 0x43d400, 114 .refclk_hz = 40000000, 115 .uarttx_pin = 11, 116 .flags = 0, 117 .fw = { 118 .dir = AR6004_HW_1_1_FW_DIR, 119 .fw = AR6004_HW_1_1_FIRMWARE_FILE, 120 }, 121 122 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, 123 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, 124 }, 125 { 126 .id = AR6004_HW_1_2_VERSION, 127 .name = "ar6004 hw 1.2", 128 .dataset_patch_addr = 0x436ecc, 129 .app_load_addr = 0x1234, 130 .board_ext_data_addr = 0x437000, 131 .reserved_ram_size = 9216, 132 .board_addr = 0x435c00, 133 .refclk_hz = 40000000, 134 .uarttx_pin = 11, 135 .flags = 0, 136 137 .fw = { 138 .dir = AR6004_HW_1_2_FW_DIR, 139 .fw = AR6004_HW_1_2_FIRMWARE_FILE, 140 }, 141 .fw_board = AR6004_HW_1_2_BOARD_DATA_FILE, 142 .fw_default_board = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE, 143 }, 144 { 145 .id = AR6004_HW_1_3_VERSION, 146 .name = "ar6004 hw 1.3", 147 .dataset_patch_addr = 0x437860, 148 .app_load_addr = 0x1234, 149 .board_ext_data_addr = 0x437000, 150 .reserved_ram_size = 7168, 151 .board_addr = 0x436400, 152 .refclk_hz = 0, 153 .uarttx_pin = 11, 154 .flags = 0, 155 156 .fw = { 157 .dir = AR6004_HW_1_3_FW_DIR, 158 .fw = AR6004_HW_1_3_FIRMWARE_FILE, 159 .tcmd = AR6004_HW_1_3_TCMD_FIRMWARE_FILE, 160 .utf = AR6004_HW_1_3_UTF_FIRMWARE_FILE, 161 .testscript = AR6004_HW_1_3_TESTSCRIPT_FILE, 162 }, 163 164 .fw_board = AR6004_HW_1_3_BOARD_DATA_FILE, 165 .fw_default_board = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE, 166 }, 167 { 168 .id = AR6004_HW_3_0_VERSION, 169 .name = "ar6004 hw 3.0", 170 .dataset_patch_addr = 0, 171 .app_load_addr = 0x1234, 172 .board_ext_data_addr = 0, 173 .reserved_ram_size = 7168, 174 .board_addr = 0x436400, 175 .testscript_addr = 0, 176 .uarttx_pin = 11, 177 .flags = 0, 178 179 .fw = { 180 .dir = AR6004_HW_3_0_FW_DIR, 181 .fw = AR6004_HW_3_0_FIRMWARE_FILE, 182 .tcmd = AR6004_HW_3_0_TCMD_FIRMWARE_FILE, 183 .utf = AR6004_HW_3_0_UTF_FIRMWARE_FILE, 184 .testscript = AR6004_HW_3_0_TESTSCRIPT_FILE, 185 }, 186 187 .fw_board = AR6004_HW_3_0_BOARD_DATA_FILE, 188 .fw_default_board = AR6004_HW_3_0_DEFAULT_BOARD_DATA_FILE, 189 }, 190 }; 191 192 /* 193 * Include definitions here that can be used to tune the WLAN module 194 * behavior. Different customers can tune the behavior as per their needs, 195 * here. 196 */ 197 198 /* 199 * This configuration item enable/disable keepalive support. 200 * Keepalive support: In the absence of any data traffic to AP, null 201 * frames will be sent to the AP at periodic interval, to keep the association 202 * active. This configuration item defines the periodic interval. 203 * Use value of zero to disable keepalive support 204 * Default: 60 seconds 205 */ 206 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 207 208 /* 209 * This configuration item sets the value of disconnect timeout 210 * Firmware delays sending the disconnec event to the host for this 211 * timeout after is gets disconnected from the current AP. 212 * If the firmware successly roams within the disconnect timeout 213 * it sends a new connect event 214 */ 215 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 216 217 218 #define ATH6KL_DATA_OFFSET 64 219 struct sk_buff *ath6kl_buf_alloc(int size) 220 { 221 struct sk_buff *skb; 222 u16 reserved; 223 224 /* Add chacheline space at front and back of buffer */ 225 reserved = roundup((2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 226 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES, 4); 227 skb = dev_alloc_skb(size + reserved); 228 229 if (skb) 230 skb_reserve(skb, reserved - L1_CACHE_BYTES); 231 return skb; 232 } 233 234 void ath6kl_init_profile_info(struct ath6kl_vif *vif) 235 { 236 vif->ssid_len = 0; 237 memset(vif->ssid, 0, sizeof(vif->ssid)); 238 239 vif->dot11_auth_mode = OPEN_AUTH; 240 vif->auth_mode = NONE_AUTH; 241 vif->prwise_crypto = NONE_CRYPT; 242 vif->prwise_crypto_len = 0; 243 vif->grp_crypto = NONE_CRYPT; 244 vif->grp_crypto_len = 0; 245 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 246 memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); 247 memset(vif->bssid, 0, sizeof(vif->bssid)); 248 vif->bss_ch = 0; 249 } 250 251 static int ath6kl_set_host_app_area(struct ath6kl *ar) 252 { 253 u32 address, data; 254 struct host_app_area host_app_area; 255 256 /* Fetch the address of the host_app_area_s 257 * instance in the host interest area */ 258 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 259 address = TARG_VTOP(ar->target_type, address); 260 261 if (ath6kl_diag_read32(ar, address, &data)) 262 return -EIO; 263 264 address = TARG_VTOP(ar->target_type, data); 265 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); 266 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 267 sizeof(struct host_app_area))) 268 return -EIO; 269 270 return 0; 271 } 272 273 static inline void set_ac2_ep_map(struct ath6kl *ar, 274 u8 ac, 275 enum htc_endpoint_id ep) 276 { 277 ar->ac2ep_map[ac] = ep; 278 ar->ep2ac_map[ep] = ac; 279 } 280 281 /* connect to a service */ 282 static int ath6kl_connectservice(struct ath6kl *ar, 283 struct htc_service_connect_req *con_req, 284 char *desc) 285 { 286 int status; 287 struct htc_service_connect_resp response; 288 289 memset(&response, 0, sizeof(response)); 290 291 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 292 if (status) { 293 ath6kl_err("failed to connect to %s service status:%d\n", 294 desc, status); 295 return status; 296 } 297 298 switch (con_req->svc_id) { 299 case WMI_CONTROL_SVC: 300 if (test_bit(WMI_ENABLED, &ar->flag)) 301 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 302 ar->ctrl_ep = response.endpoint; 303 break; 304 case WMI_DATA_BE_SVC: 305 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 306 break; 307 case WMI_DATA_BK_SVC: 308 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 309 break; 310 case WMI_DATA_VI_SVC: 311 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 312 break; 313 case WMI_DATA_VO_SVC: 314 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 315 break; 316 default: 317 ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 318 return -EINVAL; 319 } 320 321 return 0; 322 } 323 324 static int ath6kl_init_service_ep(struct ath6kl *ar) 325 { 326 struct htc_service_connect_req connect; 327 328 memset(&connect, 0, sizeof(connect)); 329 330 /* these fields are the same for all service endpoints */ 331 connect.ep_cb.tx_comp_multi = ath6kl_tx_complete; 332 connect.ep_cb.rx = ath6kl_rx; 333 connect.ep_cb.rx_refill = ath6kl_rx_refill; 334 connect.ep_cb.tx_full = ath6kl_tx_queue_full; 335 336 /* 337 * Set the max queue depth so that our ath6kl_tx_queue_full handler 338 * gets called. 339 */ 340 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 341 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 342 if (!connect.ep_cb.rx_refill_thresh) 343 connect.ep_cb.rx_refill_thresh++; 344 345 /* connect to control service */ 346 connect.svc_id = WMI_CONTROL_SVC; 347 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 348 return -EIO; 349 350 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 351 352 /* 353 * Limit the HTC message size on the send path, although e can 354 * receive A-MSDU frames of 4K, we will only send ethernet-sized 355 * (802.3) frames on the send path. 356 */ 357 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 358 359 /* 360 * To reduce the amount of committed memory for larger A_MSDU 361 * frames, use the recv-alloc threshold mechanism for larger 362 * packets. 363 */ 364 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 365 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 366 367 /* 368 * For the remaining data services set the connection flag to 369 * reduce dribbling, if configured to do so. 370 */ 371 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 372 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 373 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 374 375 connect.svc_id = WMI_DATA_BE_SVC; 376 377 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 378 return -EIO; 379 380 /* connect to back-ground map this to WMI LOW_PRI */ 381 connect.svc_id = WMI_DATA_BK_SVC; 382 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 383 return -EIO; 384 385 /* connect to Video service, map this to HI PRI */ 386 connect.svc_id = WMI_DATA_VI_SVC; 387 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 388 return -EIO; 389 390 /* 391 * Connect to VO service, this is currently not mapped to a WMI 392 * priority stream due to historical reasons. WMI originally 393 * defined 3 priorities over 3 mailboxes We can change this when 394 * WMI is reworked so that priorities are not dependent on 395 * mailboxes. 396 */ 397 connect.svc_id = WMI_DATA_VO_SVC; 398 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 399 return -EIO; 400 401 return 0; 402 } 403 404 void ath6kl_init_control_info(struct ath6kl_vif *vif) 405 { 406 ath6kl_init_profile_info(vif); 407 vif->def_txkey_index = 0; 408 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 409 vif->ch_hint = 0; 410 } 411 412 /* 413 * Set HTC/Mbox operational parameters, this can only be called when the 414 * target is in the BMI phase. 415 */ 416 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 417 u8 htc_ctrl_buf) 418 { 419 int status; 420 u32 blk_size; 421 422 blk_size = ar->mbox_info.block_size; 423 424 if (htc_ctrl_buf) 425 blk_size |= ((u32)htc_ctrl_buf) << 16; 426 427 /* set the host interest area for the block size */ 428 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size); 429 if (status) { 430 ath6kl_err("bmi_write_memory for IO block size failed\n"); 431 goto out; 432 } 433 434 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 435 blk_size, 436 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 437 438 if (mbox_isr_yield_val) { 439 /* set the host interest area for the mbox ISR yield limit */ 440 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit, 441 mbox_isr_yield_val); 442 if (status) { 443 ath6kl_err("bmi_write_memory for yield limit failed\n"); 444 goto out; 445 } 446 } 447 448 out: 449 return status; 450 } 451 452 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) 453 { 454 int ret; 455 456 /* 457 * Configure the device for rx dot11 header rules. "0,0" are the 458 * default values. Required if checksum offload is needed. Set 459 * RxMetaVersion to 2. 460 */ 461 ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, 462 ar->rx_meta_ver, 0, 0); 463 if (ret) { 464 ath6kl_err("unable to set the rx frame format: %d\n", ret); 465 return ret; 466 } 467 468 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) { 469 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, 470 IGNORE_PS_FAIL_DURING_SCAN); 471 if (ret) { 472 ath6kl_err("unable to set power save fail event policy: %d\n", 473 ret); 474 return ret; 475 } 476 } 477 478 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) { 479 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, 480 WMI_FOLLOW_BARKER_IN_ERP); 481 if (ret) { 482 ath6kl_err("unable to set barker preamble policy: %d\n", 483 ret); 484 return ret; 485 } 486 } 487 488 ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, 489 WLAN_CONFIG_KEEP_ALIVE_INTERVAL); 490 if (ret) { 491 ath6kl_err("unable to set keep alive interval: %d\n", ret); 492 return ret; 493 } 494 495 ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, 496 WLAN_CONFIG_DISCONNECT_TIMEOUT); 497 if (ret) { 498 ath6kl_err("unable to set disconnect timeout: %d\n", ret); 499 return ret; 500 } 501 502 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) { 503 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED); 504 if (ret) { 505 ath6kl_err("unable to set txop bursting: %d\n", ret); 506 return ret; 507 } 508 } 509 510 if (ar->p2p && (ar->vif_max == 1 || idx)) { 511 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, 512 P2P_FLAG_CAPABILITIES_REQ | 513 P2P_FLAG_MACADDR_REQ | 514 P2P_FLAG_HMODEL_REQ); 515 if (ret) { 516 ath6kl_dbg(ATH6KL_DBG_TRC, 517 "failed to request P2P capabilities (%d) - assuming P2P not supported\n", 518 ret); 519 ar->p2p = false; 520 } 521 } 522 523 if (ar->p2p && (ar->vif_max == 1 || idx)) { 524 /* Enable Probe Request reporting for P2P */ 525 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 526 if (ret) { 527 ath6kl_dbg(ATH6KL_DBG_TRC, 528 "failed to enable Probe Request reporting (%d)\n", 529 ret); 530 } 531 } 532 533 return ret; 534 } 535 536 int ath6kl_configure_target(struct ath6kl *ar) 537 { 538 u32 param, ram_reserved_size; 539 u8 fw_iftype, fw_mode = 0, fw_submode = 0; 540 int i, status; 541 542 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG); 543 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) { 544 ath6kl_err("bmi_write_memory for uart debug failed\n"); 545 return -EIO; 546 } 547 548 /* 549 * Note: Even though the firmware interface type is 550 * chosen as BSS_STA for all three interfaces, can 551 * be configured to IBSS/AP as long as the fw submode 552 * remains normal mode (0 - AP, STA and IBSS). But 553 * due to an target assert in firmware only one interface is 554 * configured for now. 555 */ 556 fw_iftype = HI_OPTION_FW_MODE_BSS_STA; 557 558 for (i = 0; i < ar->vif_max; i++) 559 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); 560 561 /* 562 * Submodes when fw does not support dynamic interface 563 * switching: 564 * vif[0] - AP/STA/IBSS 565 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" 566 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" 567 * Otherwise, All the interface are initialized to p2p dev. 568 */ 569 570 if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, 571 ar->fw_capabilities)) { 572 for (i = 0; i < ar->vif_max; i++) 573 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 574 (i * HI_OPTION_FW_SUBMODE_BITS); 575 } else { 576 for (i = 0; i < ar->max_norm_iface; i++) 577 fw_submode |= HI_OPTION_FW_SUBMODE_NONE << 578 (i * HI_OPTION_FW_SUBMODE_BITS); 579 580 for (i = ar->max_norm_iface; i < ar->vif_max; i++) 581 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 582 (i * HI_OPTION_FW_SUBMODE_BITS); 583 584 if (ar->p2p && ar->vif_max == 1) 585 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; 586 } 587 588 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest, 589 HTC_PROTOCOL_VERSION) != 0) { 590 ath6kl_err("bmi_write_memory for htc version failed\n"); 591 return -EIO; 592 } 593 594 /* set the firmware mode to STA/IBSS/AP */ 595 param = 0; 596 597 if (ath6kl_bmi_read_hi32(ar, hi_option_flag, ¶m) != 0) { 598 ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 599 return -EIO; 600 } 601 602 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT); 603 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; 604 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; 605 606 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 607 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 608 609 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) { 610 ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 611 return -EIO; 612 } 613 614 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 615 616 /* 617 * Hardcode the address use for the extended board data 618 * Ideally this should be pre-allocate by the OS at boot time 619 * But since it is a new feature and board data is loaded 620 * at init time, we have to workaround this from host. 621 * It is difficult to patch the firmware boot code, 622 * but possible in theory. 623 */ 624 625 if ((ar->target_type == TARGET_TYPE_AR6003) || 626 (ar->version.target_ver == AR6004_HW_1_3_VERSION) || 627 (ar->version.target_ver == AR6004_HW_3_0_VERSION)) { 628 param = ar->hw.board_ext_data_addr; 629 ram_reserved_size = ar->hw.reserved_ram_size; 630 631 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) { 632 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 633 return -EIO; 634 } 635 636 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 637 ram_reserved_size) != 0) { 638 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 639 return -EIO; 640 } 641 } 642 643 /* set the block size for the target */ 644 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 645 /* use default number of control buffers */ 646 return -EIO; 647 648 /* Configure GPIO AR600x UART */ 649 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin, 650 ar->hw.uarttx_pin); 651 if (status) 652 return status; 653 654 /* Configure target refclk_hz */ 655 if (ar->hw.refclk_hz != 0) { 656 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, 657 ar->hw.refclk_hz); 658 if (status) 659 return status; 660 } 661 662 return 0; 663 } 664 665 /* firmware upload */ 666 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 667 u8 **fw, size_t *fw_len) 668 { 669 const struct firmware *fw_entry; 670 int ret; 671 672 ret = request_firmware(&fw_entry, filename, ar->dev); 673 if (ret) 674 return ret; 675 676 *fw_len = fw_entry->size; 677 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 678 679 if (*fw == NULL) 680 ret = -ENOMEM; 681 682 release_firmware(fw_entry); 683 684 return ret; 685 } 686 687 #ifdef CONFIG_OF 688 /* 689 * Check the device tree for a board-id and use it to construct 690 * the pathname to the firmware file. Used (for now) to find a 691 * fallback to the "bdata.bin" file--typically a symlink to the 692 * appropriate board-specific file. 693 */ 694 static bool check_device_tree(struct ath6kl *ar) 695 { 696 static const char *board_id_prop = "atheros,board-id"; 697 struct device_node *node; 698 char board_filename[64]; 699 const char *board_id; 700 int ret; 701 702 for_each_compatible_node(node, NULL, "atheros,ath6kl") { 703 board_id = of_get_property(node, board_id_prop, NULL); 704 if (board_id == NULL) { 705 ath6kl_warn("No \"%s\" property on %s node.\n", 706 board_id_prop, node->name); 707 continue; 708 } 709 snprintf(board_filename, sizeof(board_filename), 710 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id); 711 712 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 713 &ar->fw_board_len); 714 if (ret) { 715 ath6kl_err("Failed to get DT board file %s: %d\n", 716 board_filename, ret); 717 continue; 718 } 719 of_node_put(node); 720 return true; 721 } 722 return false; 723 } 724 #else 725 static bool check_device_tree(struct ath6kl *ar) 726 { 727 return false; 728 } 729 #endif /* CONFIG_OF */ 730 731 static int ath6kl_fetch_board_file(struct ath6kl *ar) 732 { 733 const char *filename; 734 int ret; 735 736 if (ar->fw_board != NULL) 737 return 0; 738 739 if (WARN_ON(ar->hw.fw_board == NULL)) 740 return -EINVAL; 741 742 filename = ar->hw.fw_board; 743 744 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 745 &ar->fw_board_len); 746 if (ret == 0) { 747 /* managed to get proper board file */ 748 return 0; 749 } 750 751 if (check_device_tree(ar)) { 752 /* got board file from device tree */ 753 return 0; 754 } 755 756 /* there was no proper board file, try to use default instead */ 757 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 758 filename, ret); 759 760 filename = ar->hw.fw_default_board; 761 762 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 763 &ar->fw_board_len); 764 if (ret) { 765 ath6kl_err("Failed to get default board file %s: %d\n", 766 filename, ret); 767 return ret; 768 } 769 770 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 771 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 772 773 return 0; 774 } 775 776 static int ath6kl_fetch_otp_file(struct ath6kl *ar) 777 { 778 char filename[100]; 779 int ret; 780 781 if (ar->fw_otp != NULL) 782 return 0; 783 784 if (ar->hw.fw.otp == NULL) { 785 ath6kl_dbg(ATH6KL_DBG_BOOT, 786 "no OTP file configured for this hw\n"); 787 return 0; 788 } 789 790 snprintf(filename, sizeof(filename), "%s/%s", 791 ar->hw.fw.dir, ar->hw.fw.otp); 792 793 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 794 &ar->fw_otp_len); 795 if (ret) { 796 ath6kl_err("Failed to get OTP file %s: %d\n", 797 filename, ret); 798 return ret; 799 } 800 801 return 0; 802 } 803 804 static int ath6kl_fetch_testmode_file(struct ath6kl *ar) 805 { 806 char filename[100]; 807 int ret; 808 809 if (ar->testmode == 0) 810 return 0; 811 812 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode); 813 814 if (ar->testmode == 2) { 815 if (ar->hw.fw.utf == NULL) { 816 ath6kl_warn("testmode 2 not supported\n"); 817 return -EOPNOTSUPP; 818 } 819 820 snprintf(filename, sizeof(filename), "%s/%s", 821 ar->hw.fw.dir, ar->hw.fw.utf); 822 } else { 823 if (ar->hw.fw.tcmd == NULL) { 824 ath6kl_warn("testmode 1 not supported\n"); 825 return -EOPNOTSUPP; 826 } 827 828 snprintf(filename, sizeof(filename), "%s/%s", 829 ar->hw.fw.dir, ar->hw.fw.tcmd); 830 } 831 832 set_bit(TESTMODE, &ar->flag); 833 834 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 835 if (ret) { 836 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n", 837 ar->testmode, filename, ret); 838 return ret; 839 } 840 841 return 0; 842 } 843 844 static int ath6kl_fetch_fw_file(struct ath6kl *ar) 845 { 846 char filename[100]; 847 int ret; 848 849 if (ar->fw != NULL) 850 return 0; 851 852 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */ 853 if (WARN_ON(ar->hw.fw.fw == NULL)) 854 return -EINVAL; 855 856 snprintf(filename, sizeof(filename), "%s/%s", 857 ar->hw.fw.dir, ar->hw.fw.fw); 858 859 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 860 if (ret) { 861 ath6kl_err("Failed to get firmware file %s: %d\n", 862 filename, ret); 863 return ret; 864 } 865 866 return 0; 867 } 868 869 static int ath6kl_fetch_patch_file(struct ath6kl *ar) 870 { 871 char filename[100]; 872 int ret; 873 874 if (ar->fw_patch != NULL) 875 return 0; 876 877 if (ar->hw.fw.patch == NULL) 878 return 0; 879 880 snprintf(filename, sizeof(filename), "%s/%s", 881 ar->hw.fw.dir, ar->hw.fw.patch); 882 883 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 884 &ar->fw_patch_len); 885 if (ret) { 886 ath6kl_err("Failed to get patch file %s: %d\n", 887 filename, ret); 888 return ret; 889 } 890 891 return 0; 892 } 893 894 static int ath6kl_fetch_testscript_file(struct ath6kl *ar) 895 { 896 char filename[100]; 897 int ret; 898 899 if (ar->testmode != 2) 900 return 0; 901 902 if (ar->fw_testscript != NULL) 903 return 0; 904 905 if (ar->hw.fw.testscript == NULL) 906 return 0; 907 908 snprintf(filename, sizeof(filename), "%s/%s", 909 ar->hw.fw.dir, ar->hw.fw.testscript); 910 911 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript, 912 &ar->fw_testscript_len); 913 if (ret) { 914 ath6kl_err("Failed to get testscript file %s: %d\n", 915 filename, ret); 916 return ret; 917 } 918 919 return 0; 920 } 921 922 static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 923 { 924 int ret; 925 926 ret = ath6kl_fetch_otp_file(ar); 927 if (ret) 928 return ret; 929 930 ret = ath6kl_fetch_fw_file(ar); 931 if (ret) 932 return ret; 933 934 ret = ath6kl_fetch_patch_file(ar); 935 if (ret) 936 return ret; 937 938 ret = ath6kl_fetch_testscript_file(ar); 939 if (ret) 940 return ret; 941 942 return 0; 943 } 944 945 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name) 946 { 947 size_t magic_len, len, ie_len; 948 const struct firmware *fw; 949 struct ath6kl_fw_ie *hdr; 950 char filename[100]; 951 const u8 *data; 952 int ret, ie_id, i, index, bit; 953 __le32 *val; 954 955 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name); 956 957 ret = request_firmware(&fw, filename, ar->dev); 958 if (ret) { 959 ath6kl_err("Failed request firmware, rv: %d\n", ret); 960 return ret; 961 } 962 963 data = fw->data; 964 len = fw->size; 965 966 /* magic also includes the null byte, check that as well */ 967 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 968 969 if (len < magic_len) { 970 ath6kl_err("Magic length is invalid, len: %zd magic_len: %zd\n", 971 len, magic_len); 972 ret = -EINVAL; 973 goto out; 974 } 975 976 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 977 ath6kl_err("Magic is invalid, magic_len: %zd\n", 978 magic_len); 979 ret = -EINVAL; 980 goto out; 981 } 982 983 len -= magic_len; 984 data += magic_len; 985 986 /* loop elements */ 987 while (len > sizeof(struct ath6kl_fw_ie)) { 988 /* hdr is unaligned! */ 989 hdr = (struct ath6kl_fw_ie *) data; 990 991 ie_id = le32_to_cpup(&hdr->id); 992 ie_len = le32_to_cpup(&hdr->len); 993 994 len -= sizeof(*hdr); 995 data += sizeof(*hdr); 996 997 ath6kl_dbg(ATH6KL_DBG_BOOT, "ie-id: %d len: %zd (0x%zx)\n", 998 ie_id, ie_len, ie_len); 999 1000 if (len < ie_len) { 1001 ath6kl_err("IE len is invalid, len: %zd ie_len: %zd ie-id: %d\n", 1002 len, ie_len, ie_id); 1003 ret = -EINVAL; 1004 goto out; 1005 } 1006 1007 switch (ie_id) { 1008 case ATH6KL_FW_IE_FW_VERSION: 1009 strlcpy(ar->wiphy->fw_version, data, 1010 min(sizeof(ar->wiphy->fw_version), ie_len+1)); 1011 1012 ath6kl_dbg(ATH6KL_DBG_BOOT, 1013 "found fw version %s\n", 1014 ar->wiphy->fw_version); 1015 break; 1016 case ATH6KL_FW_IE_OTP_IMAGE: 1017 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", 1018 ie_len); 1019 1020 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 1021 1022 if (ar->fw_otp == NULL) { 1023 ath6kl_err("fw_otp cannot be allocated\n"); 1024 ret = -ENOMEM; 1025 goto out; 1026 } 1027 1028 ar->fw_otp_len = ie_len; 1029 break; 1030 case ATH6KL_FW_IE_FW_IMAGE: 1031 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", 1032 ie_len); 1033 1034 /* in testmode we already might have a fw file */ 1035 if (ar->fw != NULL) 1036 break; 1037 1038 ar->fw = vmalloc(ie_len); 1039 1040 if (ar->fw == NULL) { 1041 ath6kl_err("fw storage cannot be allocated, len: %zd\n", ie_len); 1042 ret = -ENOMEM; 1043 goto out; 1044 } 1045 1046 memcpy(ar->fw, data, ie_len); 1047 ar->fw_len = ie_len; 1048 break; 1049 case ATH6KL_FW_IE_PATCH_IMAGE: 1050 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", 1051 ie_len); 1052 1053 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 1054 1055 if (ar->fw_patch == NULL) { 1056 ath6kl_err("fw_patch storage cannot be allocated, len: %zd\n", ie_len); 1057 ret = -ENOMEM; 1058 goto out; 1059 } 1060 1061 ar->fw_patch_len = ie_len; 1062 break; 1063 case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 1064 val = (__le32 *) data; 1065 ar->hw.reserved_ram_size = le32_to_cpup(val); 1066 1067 ath6kl_dbg(ATH6KL_DBG_BOOT, 1068 "found reserved ram size ie %d\n", 1069 ar->hw.reserved_ram_size); 1070 break; 1071 case ATH6KL_FW_IE_CAPABILITIES: 1072 ath6kl_dbg(ATH6KL_DBG_BOOT, 1073 "found firmware capabilities ie (%zd B)\n", 1074 ie_len); 1075 1076 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 1077 index = i / 8; 1078 bit = i % 8; 1079 1080 if (index == ie_len) 1081 break; 1082 1083 if (data[index] & (1 << bit)) 1084 __set_bit(i, ar->fw_capabilities); 1085 } 1086 1087 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 1088 ar->fw_capabilities, 1089 sizeof(ar->fw_capabilities)); 1090 break; 1091 case ATH6KL_FW_IE_PATCH_ADDR: 1092 if (ie_len != sizeof(*val)) 1093 break; 1094 1095 val = (__le32 *) data; 1096 ar->hw.dataset_patch_addr = le32_to_cpup(val); 1097 1098 ath6kl_dbg(ATH6KL_DBG_BOOT, 1099 "found patch address ie 0x%x\n", 1100 ar->hw.dataset_patch_addr); 1101 break; 1102 case ATH6KL_FW_IE_BOARD_ADDR: 1103 if (ie_len != sizeof(*val)) 1104 break; 1105 1106 val = (__le32 *) data; 1107 ar->hw.board_addr = le32_to_cpup(val); 1108 1109 ath6kl_dbg(ATH6KL_DBG_BOOT, 1110 "found board address ie 0x%x\n", 1111 ar->hw.board_addr); 1112 break; 1113 case ATH6KL_FW_IE_VIF_MAX: 1114 if (ie_len != sizeof(*val)) 1115 break; 1116 1117 val = (__le32 *) data; 1118 ar->vif_max = min_t(unsigned int, le32_to_cpup(val), 1119 ATH6KL_VIF_MAX); 1120 1121 if (ar->vif_max > 1 && !ar->p2p) 1122 ar->max_norm_iface = 2; 1123 1124 ath6kl_dbg(ATH6KL_DBG_BOOT, 1125 "found vif max ie %d\n", ar->vif_max); 1126 break; 1127 default: 1128 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 1129 le32_to_cpup(&hdr->id)); 1130 break; 1131 } 1132 1133 len -= ie_len; 1134 data += ie_len; 1135 }; 1136 1137 ret = 0; 1138 out: 1139 release_firmware(fw); 1140 1141 return ret; 1142 } 1143 1144 int ath6kl_init_fetch_firmwares(struct ath6kl *ar) 1145 { 1146 int ret; 1147 1148 ret = ath6kl_fetch_board_file(ar); 1149 if (ret) 1150 return ret; 1151 1152 ret = ath6kl_fetch_testmode_file(ar); 1153 if (ret) 1154 return ret; 1155 1156 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API5_FILE); 1157 if (ret == 0) { 1158 ar->fw_api = 5; 1159 goto out; 1160 } 1161 1162 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE); 1163 if (ret == 0) { 1164 ar->fw_api = 4; 1165 goto out; 1166 } 1167 1168 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE); 1169 if (ret == 0) { 1170 ar->fw_api = 3; 1171 goto out; 1172 } 1173 1174 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE); 1175 if (ret == 0) { 1176 ar->fw_api = 2; 1177 goto out; 1178 } 1179 1180 ret = ath6kl_fetch_fw_api1(ar); 1181 if (ret) 1182 return ret; 1183 1184 ar->fw_api = 1; 1185 1186 out: 1187 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1188 1189 return 0; 1190 } 1191 1192 static int ath6kl_upload_board_file(struct ath6kl *ar) 1193 { 1194 u32 board_address, board_ext_address, param; 1195 u32 board_data_size, board_ext_data_size; 1196 int ret; 1197 1198 if (WARN_ON(ar->fw_board == NULL)) 1199 return -ENOENT; 1200 1201 /* 1202 * Determine where in Target RAM to write Board Data. 1203 * For AR6004, host determine Target RAM address for 1204 * writing board data. 1205 */ 1206 if (ar->hw.board_addr != 0) { 1207 board_address = ar->hw.board_addr; 1208 ath6kl_bmi_write_hi32(ar, hi_board_data, 1209 board_address); 1210 } else { 1211 ret = ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address); 1212 if (ret) { 1213 ath6kl_err("Failed to get board file target address.\n"); 1214 return ret; 1215 } 1216 } 1217 1218 /* determine where in target ram to write extended board data */ 1219 ret = ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address); 1220 if (ret) { 1221 ath6kl_err("Failed to get extended board file target address.\n"); 1222 return ret; 1223 } 1224 1225 if (ar->target_type == TARGET_TYPE_AR6003 && 1226 board_ext_address == 0) { 1227 ath6kl_err("Failed to get board file target address.\n"); 1228 return -EINVAL; 1229 } 1230 1231 switch (ar->target_type) { 1232 case TARGET_TYPE_AR6003: 1233 board_data_size = AR6003_BOARD_DATA_SZ; 1234 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 1235 if (ar->fw_board_len > (board_data_size + board_ext_data_size)) 1236 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2; 1237 break; 1238 case TARGET_TYPE_AR6004: 1239 board_data_size = AR6004_BOARD_DATA_SZ; 1240 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 1241 break; 1242 default: 1243 WARN_ON(1); 1244 return -EINVAL; 1245 } 1246 1247 if (board_ext_address && 1248 ar->fw_board_len == (board_data_size + board_ext_data_size)) { 1249 /* write extended board data */ 1250 ath6kl_dbg(ATH6KL_DBG_BOOT, 1251 "writing extended board data to 0x%x (%d B)\n", 1252 board_ext_address, board_ext_data_size); 1253 1254 ret = ath6kl_bmi_write(ar, board_ext_address, 1255 ar->fw_board + board_data_size, 1256 board_ext_data_size); 1257 if (ret) { 1258 ath6kl_err("Failed to write extended board data: %d\n", 1259 ret); 1260 return ret; 1261 } 1262 1263 /* record that extended board data is initialized */ 1264 param = (board_ext_data_size << 16) | 1; 1265 1266 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param); 1267 } 1268 1269 if (ar->fw_board_len < board_data_size) { 1270 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1271 ret = -EINVAL; 1272 return ret; 1273 } 1274 1275 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 1276 board_address, board_data_size); 1277 1278 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 1279 board_data_size); 1280 1281 if (ret) { 1282 ath6kl_err("Board file bmi write failed: %d\n", ret); 1283 return ret; 1284 } 1285 1286 /* record the fact that Board Data IS initialized */ 1287 if ((ar->version.target_ver == AR6004_HW_1_3_VERSION) || 1288 (ar->version.target_ver == AR6004_HW_3_0_VERSION)) 1289 param = board_data_size; 1290 else 1291 param = 1; 1292 1293 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, param); 1294 1295 return ret; 1296 } 1297 1298 static int ath6kl_upload_otp(struct ath6kl *ar) 1299 { 1300 u32 address, param; 1301 bool from_hw = false; 1302 int ret; 1303 1304 if (ar->fw_otp == NULL) 1305 return 0; 1306 1307 address = ar->hw.app_load_addr; 1308 1309 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, 1310 ar->fw_otp_len); 1311 1312 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1313 ar->fw_otp_len); 1314 if (ret) { 1315 ath6kl_err("Failed to upload OTP file: %d\n", ret); 1316 return ret; 1317 } 1318 1319 /* read firmware start address */ 1320 ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address); 1321 1322 if (ret) { 1323 ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1324 return ret; 1325 } 1326 1327 if (ar->hw.app_start_override_addr == 0) { 1328 ar->hw.app_start_override_addr = address; 1329 from_hw = true; 1330 } 1331 1332 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", 1333 from_hw ? " (from hw)" : "", 1334 ar->hw.app_start_override_addr); 1335 1336 /* execute the OTP code */ 1337 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", 1338 ar->hw.app_start_override_addr); 1339 param = 0; 1340 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); 1341 1342 return ret; 1343 } 1344 1345 static int ath6kl_upload_firmware(struct ath6kl *ar) 1346 { 1347 u32 address; 1348 int ret; 1349 1350 if (WARN_ON(ar->fw == NULL)) 1351 return 0; 1352 1353 address = ar->hw.app_load_addr; 1354 1355 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", 1356 address, ar->fw_len); 1357 1358 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1359 1360 if (ret) { 1361 ath6kl_err("Failed to write firmware: %d\n", ret); 1362 return ret; 1363 } 1364 1365 /* 1366 * Set starting address for firmware 1367 * Don't need to setup app_start override addr on AR6004 1368 */ 1369 if (ar->target_type != TARGET_TYPE_AR6004) { 1370 address = ar->hw.app_start_override_addr; 1371 ath6kl_bmi_set_app_start(ar, address); 1372 } 1373 return ret; 1374 } 1375 1376 static int ath6kl_upload_patch(struct ath6kl *ar) 1377 { 1378 u32 address; 1379 int ret; 1380 1381 if (ar->fw_patch == NULL) 1382 return 0; 1383 1384 address = ar->hw.dataset_patch_addr; 1385 1386 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", 1387 address, ar->fw_patch_len); 1388 1389 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1390 if (ret) { 1391 ath6kl_err("Failed to write patch file: %d\n", ret); 1392 return ret; 1393 } 1394 1395 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address); 1396 1397 return 0; 1398 } 1399 1400 static int ath6kl_upload_testscript(struct ath6kl *ar) 1401 { 1402 u32 address; 1403 int ret; 1404 1405 if (ar->testmode != 2) 1406 return 0; 1407 1408 if (ar->fw_testscript == NULL) 1409 return 0; 1410 1411 address = ar->hw.testscript_addr; 1412 1413 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n", 1414 address, ar->fw_testscript_len); 1415 1416 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript, 1417 ar->fw_testscript_len); 1418 if (ret) { 1419 ath6kl_err("Failed to write testscript file: %d\n", ret); 1420 return ret; 1421 } 1422 1423 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address); 1424 1425 if ((ar->version.target_ver != AR6004_HW_1_3_VERSION) && 1426 (ar->version.target_ver != AR6004_HW_3_0_VERSION)) 1427 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096); 1428 1429 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1); 1430 1431 return 0; 1432 } 1433 1434 static int ath6kl_init_upload(struct ath6kl *ar) 1435 { 1436 u32 param, options, sleep, address; 1437 int status = 0; 1438 1439 if (ar->target_type != TARGET_TYPE_AR6003 && 1440 ar->target_type != TARGET_TYPE_AR6004) 1441 return -EINVAL; 1442 1443 /* temporarily disable system sleep */ 1444 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1445 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1446 if (status) 1447 return status; 1448 1449 options = param; 1450 1451 param |= ATH6KL_OPTION_SLEEP_DISABLE; 1452 status = ath6kl_bmi_reg_write(ar, address, param); 1453 if (status) 1454 return status; 1455 1456 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1457 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1458 if (status) 1459 return status; 1460 1461 sleep = param; 1462 1463 param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1464 status = ath6kl_bmi_reg_write(ar, address, param); 1465 if (status) 1466 return status; 1467 1468 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1469 options, sleep); 1470 1471 /* program analog PLL register */ 1472 /* no need to control 40/44MHz clock on AR6004 */ 1473 if (ar->target_type != TARGET_TYPE_AR6004) { 1474 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1475 0xF9104001); 1476 1477 if (status) 1478 return status; 1479 1480 /* Run at 80/88MHz by default */ 1481 param = SM(CPU_CLOCK_STANDARD, 1); 1482 1483 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1484 status = ath6kl_bmi_reg_write(ar, address, param); 1485 if (status) 1486 return status; 1487 } 1488 1489 param = 0; 1490 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1491 param = SM(LPO_CAL_ENABLE, 1); 1492 status = ath6kl_bmi_reg_write(ar, address, param); 1493 if (status) 1494 return status; 1495 1496 /* WAR to avoid SDIO CRC err */ 1497 if (ar->hw.flags & ATH6KL_HW_SDIO_CRC_ERROR_WAR) { 1498 ath6kl_err("temporary war to avoid sdio crc error\n"); 1499 1500 param = 0x28; 1501 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS; 1502 status = ath6kl_bmi_reg_write(ar, address, param); 1503 if (status) 1504 return status; 1505 1506 param = 0x20; 1507 1508 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1509 status = ath6kl_bmi_reg_write(ar, address, param); 1510 if (status) 1511 return status; 1512 1513 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1514 status = ath6kl_bmi_reg_write(ar, address, param); 1515 if (status) 1516 return status; 1517 1518 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1519 status = ath6kl_bmi_reg_write(ar, address, param); 1520 if (status) 1521 return status; 1522 1523 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1524 status = ath6kl_bmi_reg_write(ar, address, param); 1525 if (status) 1526 return status; 1527 } 1528 1529 /* write EEPROM data to Target RAM */ 1530 status = ath6kl_upload_board_file(ar); 1531 if (status) 1532 return status; 1533 1534 /* transfer One time Programmable data */ 1535 status = ath6kl_upload_otp(ar); 1536 if (status) 1537 return status; 1538 1539 /* Download Target firmware */ 1540 status = ath6kl_upload_firmware(ar); 1541 if (status) 1542 return status; 1543 1544 status = ath6kl_upload_patch(ar); 1545 if (status) 1546 return status; 1547 1548 /* Download the test script */ 1549 status = ath6kl_upload_testscript(ar); 1550 if (status) 1551 return status; 1552 1553 /* Restore system sleep */ 1554 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1555 status = ath6kl_bmi_reg_write(ar, address, sleep); 1556 if (status) 1557 return status; 1558 1559 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1560 param = options | 0x20; 1561 status = ath6kl_bmi_reg_write(ar, address, param); 1562 if (status) 1563 return status; 1564 1565 return status; 1566 } 1567 1568 int ath6kl_init_hw_params(struct ath6kl *ar) 1569 { 1570 const struct ath6kl_hw *uninitialized_var(hw); 1571 int i; 1572 1573 for (i = 0; i < ARRAY_SIZE(hw_list); i++) { 1574 hw = &hw_list[i]; 1575 1576 if (hw->id == ar->version.target_ver) 1577 break; 1578 } 1579 1580 if (i == ARRAY_SIZE(hw_list)) { 1581 ath6kl_err("Unsupported hardware version: 0x%x\n", 1582 ar->version.target_ver); 1583 return -EINVAL; 1584 } 1585 1586 ar->hw = *hw; 1587 1588 ath6kl_dbg(ATH6KL_DBG_BOOT, 1589 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 1590 ar->version.target_ver, ar->target_type, 1591 ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 1592 ath6kl_dbg(ATH6KL_DBG_BOOT, 1593 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 1594 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 1595 ar->hw.reserved_ram_size); 1596 ath6kl_dbg(ATH6KL_DBG_BOOT, 1597 "refclk_hz %d uarttx_pin %d", 1598 ar->hw.refclk_hz, ar->hw.uarttx_pin); 1599 1600 return 0; 1601 } 1602 1603 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type) 1604 { 1605 switch (type) { 1606 case ATH6KL_HIF_TYPE_SDIO: 1607 return "sdio"; 1608 case ATH6KL_HIF_TYPE_USB: 1609 return "usb"; 1610 } 1611 1612 return NULL; 1613 } 1614 1615 1616 static const struct fw_capa_str_map { 1617 int id; 1618 const char *name; 1619 } fw_capa_map[] = { 1620 { ATH6KL_FW_CAPABILITY_HOST_P2P, "host-p2p" }, 1621 { ATH6KL_FW_CAPABILITY_SCHED_SCAN, "sched-scan" }, 1622 { ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, "sta-p2pdev-duplex" }, 1623 { ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, "inactivity-timeout" }, 1624 { ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, "rsn-cap-override" }, 1625 { ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER, "wow-mc-filter" }, 1626 { ATH6KL_FW_CAPABILITY_BMISS_ENHANCE, "bmiss-enhance" }, 1627 { ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST, "sscan-match-list" }, 1628 { ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD, "rssi-scan-thold" }, 1629 { ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR, "custom-mac-addr" }, 1630 { ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY, "tx-err-notify" }, 1631 { ATH6KL_FW_CAPABILITY_REGDOMAIN, "regdomain" }, 1632 { ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2, "sched-scan-v2" }, 1633 { ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL, "hb-poll" }, 1634 { ATH6KL_FW_CAPABILITY_64BIT_RATES, "64bit-rates" }, 1635 { ATH6KL_FW_CAPABILITY_AP_INACTIVITY_MINS, "ap-inactivity-mins" }, 1636 { ATH6KL_FW_CAPABILITY_MAP_LP_ENDPOINT, "map-lp-endpoint" }, 1637 { ATH6KL_FW_CAPABILITY_RATETABLE_MCS15, "ratetable-mcs15" }, 1638 { ATH6KL_FW_CAPABILITY_NO_IP_CHECKSUM, "no-ip-checksum" }, 1639 }; 1640 1641 static const char *ath6kl_init_get_fw_capa_name(unsigned int id) 1642 { 1643 int i; 1644 1645 for (i = 0; i < ARRAY_SIZE(fw_capa_map); i++) { 1646 if (fw_capa_map[i].id == id) 1647 return fw_capa_map[i].name; 1648 } 1649 1650 return "<unknown>"; 1651 } 1652 1653 static void ath6kl_init_get_fwcaps(struct ath6kl *ar, char *buf, size_t buf_len) 1654 { 1655 u8 *data = (u8 *) ar->fw_capabilities; 1656 size_t trunc_len, len = 0; 1657 int i, index, bit; 1658 char *trunc = "..."; 1659 1660 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 1661 index = i / 8; 1662 bit = i % 8; 1663 1664 if (index >= sizeof(ar->fw_capabilities) * 4) 1665 break; 1666 1667 if (buf_len - len < 4) { 1668 ath6kl_warn("firmware capability buffer too small!\n"); 1669 1670 /* add "..." to the end of string */ 1671 trunc_len = strlen(trunc) + 1; 1672 strncpy(buf + buf_len - trunc_len, trunc, trunc_len); 1673 1674 return; 1675 } 1676 1677 if (data[index] & (1 << bit)) { 1678 len += scnprintf(buf + len, buf_len - len, "%s,", 1679 ath6kl_init_get_fw_capa_name(i)); 1680 } 1681 } 1682 1683 /* overwrite the last comma */ 1684 if (len > 0) 1685 len--; 1686 1687 buf[len] = '\0'; 1688 } 1689 1690 static int ath6kl_init_hw_reset(struct ath6kl *ar) 1691 { 1692 ath6kl_dbg(ATH6KL_DBG_BOOT, "cold resetting the device"); 1693 1694 return ath6kl_diag_write32(ar, RESET_CONTROL_ADDRESS, 1695 cpu_to_le32(RESET_CONTROL_COLD_RST)); 1696 } 1697 1698 static int __ath6kl_init_hw_start(struct ath6kl *ar) 1699 { 1700 long timeleft; 1701 int ret, i; 1702 char buf[200]; 1703 1704 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); 1705 1706 ret = ath6kl_hif_power_on(ar); 1707 if (ret) 1708 return ret; 1709 1710 ret = ath6kl_configure_target(ar); 1711 if (ret) 1712 goto err_power_off; 1713 1714 ret = ath6kl_init_upload(ar); 1715 if (ret) 1716 goto err_power_off; 1717 1718 /* Do we need to finish the BMI phase */ 1719 ret = ath6kl_bmi_done(ar); 1720 if (ret) 1721 goto err_power_off; 1722 1723 /* 1724 * The reason we have to wait for the target here is that the 1725 * driver layer has to init BMI in order to set the host block 1726 * size. 1727 */ 1728 ret = ath6kl_htc_wait_target(ar->htc_target); 1729 1730 if (ret == -ETIMEDOUT) { 1731 /* 1732 * Most likely USB target is in odd state after reboot and 1733 * needs a reset. A cold reset makes the whole device 1734 * disappear from USB bus and initialisation starts from 1735 * beginning. 1736 */ 1737 ath6kl_warn("htc wait target timed out, resetting device\n"); 1738 ath6kl_init_hw_reset(ar); 1739 goto err_power_off; 1740 } else if (ret) { 1741 ath6kl_err("htc wait target failed: %d\n", ret); 1742 goto err_power_off; 1743 } 1744 1745 ret = ath6kl_init_service_ep(ar); 1746 if (ret) { 1747 ath6kl_err("Endpoint service initilisation failed: %d\n", ret); 1748 goto err_cleanup_scatter; 1749 } 1750 1751 /* setup credit distribution */ 1752 ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info); 1753 1754 /* start HTC */ 1755 ret = ath6kl_htc_start(ar->htc_target); 1756 if (ret) { 1757 /* FIXME: call this */ 1758 ath6kl_cookie_cleanup(ar); 1759 goto err_cleanup_scatter; 1760 } 1761 1762 /* Wait for Wmi event to be ready */ 1763 timeleft = wait_event_interruptible_timeout(ar->event_wq, 1764 test_bit(WMI_READY, 1765 &ar->flag), 1766 WMI_TIMEOUT); 1767 if (timeleft <= 0) { 1768 clear_bit(WMI_READY, &ar->flag); 1769 ath6kl_err("wmi is not ready or wait was interrupted: %ld\n", 1770 timeleft); 1771 ret = -EIO; 1772 goto err_htc_stop; 1773 } 1774 1775 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 1776 1777 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) { 1778 ath6kl_info("%s %s fw %s api %d%s\n", 1779 ar->hw.name, 1780 ath6kl_init_get_hif_name(ar->hif_type), 1781 ar->wiphy->fw_version, 1782 ar->fw_api, 1783 test_bit(TESTMODE, &ar->flag) ? " testmode" : ""); 1784 ath6kl_init_get_fwcaps(ar, buf, sizeof(buf)); 1785 ath6kl_info("firmware supports: %s\n", buf); 1786 } 1787 1788 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 1789 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 1790 ATH6KL_ABI_VERSION, ar->version.abi_ver); 1791 ret = -EIO; 1792 goto err_htc_stop; 1793 } 1794 1795 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 1796 1797 /* communicate the wmi protocol verision to the target */ 1798 /* FIXME: return error */ 1799 if ((ath6kl_set_host_app_area(ar)) != 0) 1800 ath6kl_err("unable to set the host app area\n"); 1801 1802 for (i = 0; i < ar->vif_max; i++) { 1803 ret = ath6kl_target_config_wlan_params(ar, i); 1804 if (ret) 1805 goto err_htc_stop; 1806 } 1807 1808 return 0; 1809 1810 err_htc_stop: 1811 ath6kl_htc_stop(ar->htc_target); 1812 err_cleanup_scatter: 1813 ath6kl_hif_cleanup_scatter(ar); 1814 err_power_off: 1815 ath6kl_hif_power_off(ar); 1816 1817 return ret; 1818 } 1819 1820 int ath6kl_init_hw_start(struct ath6kl *ar) 1821 { 1822 int err; 1823 1824 err = __ath6kl_init_hw_start(ar); 1825 if (err) 1826 return err; 1827 ar->state = ATH6KL_STATE_ON; 1828 return 0; 1829 } 1830 1831 static int __ath6kl_init_hw_stop(struct ath6kl *ar) 1832 { 1833 int ret; 1834 1835 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); 1836 1837 ath6kl_htc_stop(ar->htc_target); 1838 1839 ath6kl_hif_stop(ar); 1840 1841 ath6kl_bmi_reset(ar); 1842 1843 ret = ath6kl_hif_power_off(ar); 1844 if (ret) 1845 ath6kl_warn("failed to power off hif: %d\n", ret); 1846 1847 return 0; 1848 } 1849 1850 int ath6kl_init_hw_stop(struct ath6kl *ar) 1851 { 1852 int err; 1853 1854 err = __ath6kl_init_hw_stop(ar); 1855 if (err) 1856 return err; 1857 ar->state = ATH6KL_STATE_OFF; 1858 return 0; 1859 } 1860 1861 void ath6kl_init_hw_restart(struct ath6kl *ar) 1862 { 1863 clear_bit(WMI_READY, &ar->flag); 1864 1865 ath6kl_cfg80211_stop_all(ar); 1866 1867 if (__ath6kl_init_hw_stop(ar)) { 1868 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to stop during fw error recovery\n"); 1869 return; 1870 } 1871 1872 if (__ath6kl_init_hw_start(ar)) { 1873 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n"); 1874 return; 1875 } 1876 } 1877 1878 void ath6kl_stop_txrx(struct ath6kl *ar) 1879 { 1880 struct ath6kl_vif *vif, *tmp_vif; 1881 int i; 1882 1883 set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1884 1885 if (down_interruptible(&ar->sem)) { 1886 ath6kl_err("down_interruptible failed\n"); 1887 return; 1888 } 1889 1890 for (i = 0; i < AP_MAX_NUM_STA; i++) 1891 aggr_reset_state(ar->sta_list[i].aggr_conn); 1892 1893 spin_lock_bh(&ar->list_lock); 1894 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { 1895 list_del(&vif->list); 1896 spin_unlock_bh(&ar->list_lock); 1897 ath6kl_cfg80211_vif_stop(vif, test_bit(WMI_READY, &ar->flag)); 1898 rtnl_lock(); 1899 ath6kl_cfg80211_vif_cleanup(vif); 1900 rtnl_unlock(); 1901 spin_lock_bh(&ar->list_lock); 1902 } 1903 spin_unlock_bh(&ar->list_lock); 1904 1905 clear_bit(WMI_READY, &ar->flag); 1906 1907 if (ar->fw_recovery.enable) 1908 del_timer_sync(&ar->fw_recovery.hb_timer); 1909 1910 /* 1911 * After wmi_shudown all WMI events will be dropped. We 1912 * need to cleanup the buffers allocated in AP mode and 1913 * give disconnect notification to stack, which usually 1914 * happens in the disconnect_event. Simulate the disconnect 1915 * event by calling the function directly. Sometimes 1916 * disconnect_event will be received when the debug logs 1917 * are collected. 1918 */ 1919 ath6kl_wmi_shutdown(ar->wmi); 1920 1921 clear_bit(WMI_ENABLED, &ar->flag); 1922 if (ar->htc_target) { 1923 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); 1924 ath6kl_htc_stop(ar->htc_target); 1925 } 1926 1927 /* 1928 * Try to reset the device if we can. The driver may have been 1929 * configure NOT to reset the target during a debug session. 1930 */ 1931 ath6kl_init_hw_reset(ar); 1932 1933 up(&ar->sem); 1934 } 1935 EXPORT_SYMBOL(ath6kl_stop_txrx); 1936