1 2 /* 3 * Copyright (c) 2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 20 21 #include <linux/moduleparam.h> 22 #include <linux/errno.h> 23 #include <linux/export.h> 24 #include <linux/of.h> 25 #include <linux/mmc/sdio_func.h> 26 #include <linux/vmalloc.h> 27 28 #include "core.h" 29 #include "cfg80211.h" 30 #include "target.h" 31 #include "debug.h" 32 #include "hif-ops.h" 33 #include "htc-ops.h" 34 35 static const struct ath6kl_hw hw_list[] = { 36 { 37 .id = AR6003_HW_2_0_VERSION, 38 .name = "ar6003 hw 2.0", 39 .dataset_patch_addr = 0x57e884, 40 .app_load_addr = 0x543180, 41 .board_ext_data_addr = 0x57e500, 42 .reserved_ram_size = 6912, 43 .refclk_hz = 26000000, 44 .uarttx_pin = 8, 45 .flags = 0, 46 47 /* hw2.0 needs override address hardcoded */ 48 .app_start_override_addr = 0x944C00, 49 50 .fw = { 51 .dir = AR6003_HW_2_0_FW_DIR, 52 .otp = AR6003_HW_2_0_OTP_FILE, 53 .fw = AR6003_HW_2_0_FIRMWARE_FILE, 54 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE, 55 .patch = AR6003_HW_2_0_PATCH_FILE, 56 }, 57 58 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE, 59 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE, 60 }, 61 { 62 .id = AR6003_HW_2_1_1_VERSION, 63 .name = "ar6003 hw 2.1.1", 64 .dataset_patch_addr = 0x57ff74, 65 .app_load_addr = 0x1234, 66 .board_ext_data_addr = 0x542330, 67 .reserved_ram_size = 512, 68 .refclk_hz = 26000000, 69 .uarttx_pin = 8, 70 .testscript_addr = 0x57ef74, 71 .flags = 0, 72 73 .fw = { 74 .dir = AR6003_HW_2_1_1_FW_DIR, 75 .otp = AR6003_HW_2_1_1_OTP_FILE, 76 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE, 77 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE, 78 .patch = AR6003_HW_2_1_1_PATCH_FILE, 79 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE, 80 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE, 81 }, 82 83 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE, 84 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE, 85 }, 86 { 87 .id = AR6004_HW_1_0_VERSION, 88 .name = "ar6004 hw 1.0", 89 .dataset_patch_addr = 0x57e884, 90 .app_load_addr = 0x1234, 91 .board_ext_data_addr = 0x437000, 92 .reserved_ram_size = 19456, 93 .board_addr = 0x433900, 94 .refclk_hz = 26000000, 95 .uarttx_pin = 11, 96 .flags = ATH6KL_HW_FLAG_64BIT_RATES, 97 98 .fw = { 99 .dir = AR6004_HW_1_0_FW_DIR, 100 .fw = AR6004_HW_1_0_FIRMWARE_FILE, 101 }, 102 103 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE, 104 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE, 105 }, 106 { 107 .id = AR6004_HW_1_1_VERSION, 108 .name = "ar6004 hw 1.1", 109 .dataset_patch_addr = 0x57e884, 110 .app_load_addr = 0x1234, 111 .board_ext_data_addr = 0x437000, 112 .reserved_ram_size = 11264, 113 .board_addr = 0x43d400, 114 .refclk_hz = 40000000, 115 .uarttx_pin = 11, 116 .flags = ATH6KL_HW_FLAG_64BIT_RATES, 117 118 .fw = { 119 .dir = AR6004_HW_1_1_FW_DIR, 120 .fw = AR6004_HW_1_1_FIRMWARE_FILE, 121 }, 122 123 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, 124 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, 125 }, 126 { 127 .id = AR6004_HW_1_2_VERSION, 128 .name = "ar6004 hw 1.2", 129 .dataset_patch_addr = 0x436ecc, 130 .app_load_addr = 0x1234, 131 .board_ext_data_addr = 0x437000, 132 .reserved_ram_size = 9216, 133 .board_addr = 0x435c00, 134 .refclk_hz = 40000000, 135 .uarttx_pin = 11, 136 .flags = ATH6KL_HW_FLAG_64BIT_RATES, 137 138 .fw = { 139 .dir = AR6004_HW_1_2_FW_DIR, 140 .fw = AR6004_HW_1_2_FIRMWARE_FILE, 141 }, 142 .fw_board = AR6004_HW_1_2_BOARD_DATA_FILE, 143 .fw_default_board = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE, 144 }, 145 { 146 .id = AR6004_HW_1_3_VERSION, 147 .name = "ar6004 hw 1.3", 148 .dataset_patch_addr = 0x437860, 149 .app_load_addr = 0x1234, 150 .board_ext_data_addr = 0x437000, 151 .reserved_ram_size = 7168, 152 .board_addr = 0x436400, 153 .refclk_hz = 40000000, 154 .uarttx_pin = 11, 155 .flags = ATH6KL_HW_FLAG_64BIT_RATES, 156 157 .fw = { 158 .dir = AR6004_HW_1_3_FW_DIR, 159 .fw = AR6004_HW_1_3_FIRMWARE_FILE, 160 }, 161 162 .fw_board = AR6004_HW_1_3_BOARD_DATA_FILE, 163 .fw_default_board = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE, 164 }, 165 }; 166 167 /* 168 * Include definitions here that can be used to tune the WLAN module 169 * behavior. Different customers can tune the behavior as per their needs, 170 * here. 171 */ 172 173 /* 174 * This configuration item enable/disable keepalive support. 175 * Keepalive support: In the absence of any data traffic to AP, null 176 * frames will be sent to the AP at periodic interval, to keep the association 177 * active. This configuration item defines the periodic interval. 178 * Use value of zero to disable keepalive support 179 * Default: 60 seconds 180 */ 181 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 182 183 /* 184 * This configuration item sets the value of disconnect timeout 185 * Firmware delays sending the disconnec event to the host for this 186 * timeout after is gets disconnected from the current AP. 187 * If the firmware successly roams within the disconnect timeout 188 * it sends a new connect event 189 */ 190 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 191 192 193 #define ATH6KL_DATA_OFFSET 64 194 struct sk_buff *ath6kl_buf_alloc(int size) 195 { 196 struct sk_buff *skb; 197 u16 reserved; 198 199 /* Add chacheline space at front and back of buffer */ 200 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 201 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; 202 skb = dev_alloc_skb(size + reserved); 203 204 if (skb) 205 skb_reserve(skb, reserved - L1_CACHE_BYTES); 206 return skb; 207 } 208 209 void ath6kl_init_profile_info(struct ath6kl_vif *vif) 210 { 211 vif->ssid_len = 0; 212 memset(vif->ssid, 0, sizeof(vif->ssid)); 213 214 vif->dot11_auth_mode = OPEN_AUTH; 215 vif->auth_mode = NONE_AUTH; 216 vif->prwise_crypto = NONE_CRYPT; 217 vif->prwise_crypto_len = 0; 218 vif->grp_crypto = NONE_CRYPT; 219 vif->grp_crypto_len = 0; 220 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 221 memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); 222 memset(vif->bssid, 0, sizeof(vif->bssid)); 223 vif->bss_ch = 0; 224 } 225 226 static int ath6kl_set_host_app_area(struct ath6kl *ar) 227 { 228 u32 address, data; 229 struct host_app_area host_app_area; 230 231 /* Fetch the address of the host_app_area_s 232 * instance in the host interest area */ 233 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 234 address = TARG_VTOP(ar->target_type, address); 235 236 if (ath6kl_diag_read32(ar, address, &data)) 237 return -EIO; 238 239 address = TARG_VTOP(ar->target_type, data); 240 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); 241 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 242 sizeof(struct host_app_area))) 243 return -EIO; 244 245 return 0; 246 } 247 248 static inline void set_ac2_ep_map(struct ath6kl *ar, 249 u8 ac, 250 enum htc_endpoint_id ep) 251 { 252 ar->ac2ep_map[ac] = ep; 253 ar->ep2ac_map[ep] = ac; 254 } 255 256 /* connect to a service */ 257 static int ath6kl_connectservice(struct ath6kl *ar, 258 struct htc_service_connect_req *con_req, 259 char *desc) 260 { 261 int status; 262 struct htc_service_connect_resp response; 263 264 memset(&response, 0, sizeof(response)); 265 266 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 267 if (status) { 268 ath6kl_err("failed to connect to %s service status:%d\n", 269 desc, status); 270 return status; 271 } 272 273 switch (con_req->svc_id) { 274 case WMI_CONTROL_SVC: 275 if (test_bit(WMI_ENABLED, &ar->flag)) 276 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 277 ar->ctrl_ep = response.endpoint; 278 break; 279 case WMI_DATA_BE_SVC: 280 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 281 break; 282 case WMI_DATA_BK_SVC: 283 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 284 break; 285 case WMI_DATA_VI_SVC: 286 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 287 break; 288 case WMI_DATA_VO_SVC: 289 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 290 break; 291 default: 292 ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 293 return -EINVAL; 294 } 295 296 return 0; 297 } 298 299 static int ath6kl_init_service_ep(struct ath6kl *ar) 300 { 301 struct htc_service_connect_req connect; 302 303 memset(&connect, 0, sizeof(connect)); 304 305 /* these fields are the same for all service endpoints */ 306 connect.ep_cb.tx_comp_multi = ath6kl_tx_complete; 307 connect.ep_cb.rx = ath6kl_rx; 308 connect.ep_cb.rx_refill = ath6kl_rx_refill; 309 connect.ep_cb.tx_full = ath6kl_tx_queue_full; 310 311 /* 312 * Set the max queue depth so that our ath6kl_tx_queue_full handler 313 * gets called. 314 */ 315 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 316 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 317 if (!connect.ep_cb.rx_refill_thresh) 318 connect.ep_cb.rx_refill_thresh++; 319 320 /* connect to control service */ 321 connect.svc_id = WMI_CONTROL_SVC; 322 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 323 return -EIO; 324 325 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 326 327 /* 328 * Limit the HTC message size on the send path, although e can 329 * receive A-MSDU frames of 4K, we will only send ethernet-sized 330 * (802.3) frames on the send path. 331 */ 332 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 333 334 /* 335 * To reduce the amount of committed memory for larger A_MSDU 336 * frames, use the recv-alloc threshold mechanism for larger 337 * packets. 338 */ 339 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 340 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 341 342 /* 343 * For the remaining data services set the connection flag to 344 * reduce dribbling, if configured to do so. 345 */ 346 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 347 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 348 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 349 350 connect.svc_id = WMI_DATA_BE_SVC; 351 352 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 353 return -EIO; 354 355 /* connect to back-ground map this to WMI LOW_PRI */ 356 connect.svc_id = WMI_DATA_BK_SVC; 357 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 358 return -EIO; 359 360 /* connect to Video service, map this to to HI PRI */ 361 connect.svc_id = WMI_DATA_VI_SVC; 362 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 363 return -EIO; 364 365 /* 366 * Connect to VO service, this is currently not mapped to a WMI 367 * priority stream due to historical reasons. WMI originally 368 * defined 3 priorities over 3 mailboxes We can change this when 369 * WMI is reworked so that priorities are not dependent on 370 * mailboxes. 371 */ 372 connect.svc_id = WMI_DATA_VO_SVC; 373 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 374 return -EIO; 375 376 return 0; 377 } 378 379 void ath6kl_init_control_info(struct ath6kl_vif *vif) 380 { 381 ath6kl_init_profile_info(vif); 382 vif->def_txkey_index = 0; 383 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 384 vif->ch_hint = 0; 385 } 386 387 /* 388 * Set HTC/Mbox operational parameters, this can only be called when the 389 * target is in the BMI phase. 390 */ 391 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 392 u8 htc_ctrl_buf) 393 { 394 int status; 395 u32 blk_size; 396 397 blk_size = ar->mbox_info.block_size; 398 399 if (htc_ctrl_buf) 400 blk_size |= ((u32)htc_ctrl_buf) << 16; 401 402 /* set the host interest area for the block size */ 403 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size); 404 if (status) { 405 ath6kl_err("bmi_write_memory for IO block size failed\n"); 406 goto out; 407 } 408 409 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 410 blk_size, 411 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 412 413 if (mbox_isr_yield_val) { 414 /* set the host interest area for the mbox ISR yield limit */ 415 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit, 416 mbox_isr_yield_val); 417 if (status) { 418 ath6kl_err("bmi_write_memory for yield limit failed\n"); 419 goto out; 420 } 421 } 422 423 out: 424 return status; 425 } 426 427 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) 428 { 429 int ret; 430 431 /* 432 * Configure the device for rx dot11 header rules. "0,0" are the 433 * default values. Required if checksum offload is needed. Set 434 * RxMetaVersion to 2. 435 */ 436 ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, 437 ar->rx_meta_ver, 0, 0); 438 if (ret) { 439 ath6kl_err("unable to set the rx frame format: %d\n", ret); 440 return ret; 441 } 442 443 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) { 444 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, 445 IGNORE_PS_FAIL_DURING_SCAN); 446 if (ret) { 447 ath6kl_err("unable to set power save fail event policy: %d\n", 448 ret); 449 return ret; 450 } 451 } 452 453 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) { 454 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, 455 WMI_FOLLOW_BARKER_IN_ERP); 456 if (ret) { 457 ath6kl_err("unable to set barker preamble policy: %d\n", 458 ret); 459 return ret; 460 } 461 } 462 463 ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, 464 WLAN_CONFIG_KEEP_ALIVE_INTERVAL); 465 if (ret) { 466 ath6kl_err("unable to set keep alive interval: %d\n", ret); 467 return ret; 468 } 469 470 ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, 471 WLAN_CONFIG_DISCONNECT_TIMEOUT); 472 if (ret) { 473 ath6kl_err("unable to set disconnect timeout: %d\n", ret); 474 return ret; 475 } 476 477 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) { 478 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED); 479 if (ret) { 480 ath6kl_err("unable to set txop bursting: %d\n", ret); 481 return ret; 482 } 483 } 484 485 if (ar->p2p && (ar->vif_max == 1 || idx)) { 486 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, 487 P2P_FLAG_CAPABILITIES_REQ | 488 P2P_FLAG_MACADDR_REQ | 489 P2P_FLAG_HMODEL_REQ); 490 if (ret) { 491 ath6kl_dbg(ATH6KL_DBG_TRC, 492 "failed to request P2P capabilities (%d) - assuming P2P not supported\n", 493 ret); 494 ar->p2p = false; 495 } 496 } 497 498 if (ar->p2p && (ar->vif_max == 1 || idx)) { 499 /* Enable Probe Request reporting for P2P */ 500 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 501 if (ret) { 502 ath6kl_dbg(ATH6KL_DBG_TRC, 503 "failed to enable Probe Request reporting (%d)\n", 504 ret); 505 } 506 } 507 508 return ret; 509 } 510 511 int ath6kl_configure_target(struct ath6kl *ar) 512 { 513 u32 param, ram_reserved_size; 514 u8 fw_iftype, fw_mode = 0, fw_submode = 0; 515 int i, status; 516 517 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG); 518 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) { 519 ath6kl_err("bmi_write_memory for uart debug failed\n"); 520 return -EIO; 521 } 522 523 /* 524 * Note: Even though the firmware interface type is 525 * chosen as BSS_STA for all three interfaces, can 526 * be configured to IBSS/AP as long as the fw submode 527 * remains normal mode (0 - AP, STA and IBSS). But 528 * due to an target assert in firmware only one interface is 529 * configured for now. 530 */ 531 fw_iftype = HI_OPTION_FW_MODE_BSS_STA; 532 533 for (i = 0; i < ar->vif_max; i++) 534 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); 535 536 /* 537 * Submodes when fw does not support dynamic interface 538 * switching: 539 * vif[0] - AP/STA/IBSS 540 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" 541 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" 542 * Otherwise, All the interface are initialized to p2p dev. 543 */ 544 545 if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, 546 ar->fw_capabilities)) { 547 for (i = 0; i < ar->vif_max; i++) 548 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 549 (i * HI_OPTION_FW_SUBMODE_BITS); 550 } else { 551 for (i = 0; i < ar->max_norm_iface; i++) 552 fw_submode |= HI_OPTION_FW_SUBMODE_NONE << 553 (i * HI_OPTION_FW_SUBMODE_BITS); 554 555 for (i = ar->max_norm_iface; i < ar->vif_max; i++) 556 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 557 (i * HI_OPTION_FW_SUBMODE_BITS); 558 559 if (ar->p2p && ar->vif_max == 1) 560 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; 561 } 562 563 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest, 564 HTC_PROTOCOL_VERSION) != 0) { 565 ath6kl_err("bmi_write_memory for htc version failed\n"); 566 return -EIO; 567 } 568 569 /* set the firmware mode to STA/IBSS/AP */ 570 param = 0; 571 572 if (ath6kl_bmi_read_hi32(ar, hi_option_flag, ¶m) != 0) { 573 ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 574 return -EIO; 575 } 576 577 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT); 578 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; 579 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; 580 581 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 582 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 583 584 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) { 585 ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 586 return -EIO; 587 } 588 589 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 590 591 /* 592 * Hardcode the address use for the extended board data 593 * Ideally this should be pre-allocate by the OS at boot time 594 * But since it is a new feature and board data is loaded 595 * at init time, we have to workaround this from host. 596 * It is difficult to patch the firmware boot code, 597 * but possible in theory. 598 */ 599 600 if (ar->target_type == TARGET_TYPE_AR6003) { 601 param = ar->hw.board_ext_data_addr; 602 ram_reserved_size = ar->hw.reserved_ram_size; 603 604 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) { 605 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 606 return -EIO; 607 } 608 609 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 610 ram_reserved_size) != 0) { 611 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 612 return -EIO; 613 } 614 } 615 616 /* set the block size for the target */ 617 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 618 /* use default number of control buffers */ 619 return -EIO; 620 621 /* Configure GPIO AR600x UART */ 622 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin, 623 ar->hw.uarttx_pin); 624 if (status) 625 return status; 626 627 /* Configure target refclk_hz */ 628 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz); 629 if (status) 630 return status; 631 632 return 0; 633 } 634 635 /* firmware upload */ 636 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 637 u8 **fw, size_t *fw_len) 638 { 639 const struct firmware *fw_entry; 640 int ret; 641 642 ret = request_firmware(&fw_entry, filename, ar->dev); 643 if (ret) 644 return ret; 645 646 *fw_len = fw_entry->size; 647 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 648 649 if (*fw == NULL) 650 ret = -ENOMEM; 651 652 release_firmware(fw_entry); 653 654 return ret; 655 } 656 657 #ifdef CONFIG_OF 658 /* 659 * Check the device tree for a board-id and use it to construct 660 * the pathname to the firmware file. Used (for now) to find a 661 * fallback to the "bdata.bin" file--typically a symlink to the 662 * appropriate board-specific file. 663 */ 664 static bool check_device_tree(struct ath6kl *ar) 665 { 666 static const char *board_id_prop = "atheros,board-id"; 667 struct device_node *node; 668 char board_filename[64]; 669 const char *board_id; 670 int ret; 671 672 for_each_compatible_node(node, NULL, "atheros,ath6kl") { 673 board_id = of_get_property(node, board_id_prop, NULL); 674 if (board_id == NULL) { 675 ath6kl_warn("No \"%s\" property on %s node.\n", 676 board_id_prop, node->name); 677 continue; 678 } 679 snprintf(board_filename, sizeof(board_filename), 680 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id); 681 682 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 683 &ar->fw_board_len); 684 if (ret) { 685 ath6kl_err("Failed to get DT board file %s: %d\n", 686 board_filename, ret); 687 continue; 688 } 689 return true; 690 } 691 return false; 692 } 693 #else 694 static bool check_device_tree(struct ath6kl *ar) 695 { 696 return false; 697 } 698 #endif /* CONFIG_OF */ 699 700 static int ath6kl_fetch_board_file(struct ath6kl *ar) 701 { 702 const char *filename; 703 int ret; 704 705 if (ar->fw_board != NULL) 706 return 0; 707 708 if (WARN_ON(ar->hw.fw_board == NULL)) 709 return -EINVAL; 710 711 filename = ar->hw.fw_board; 712 713 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 714 &ar->fw_board_len); 715 if (ret == 0) { 716 /* managed to get proper board file */ 717 return 0; 718 } 719 720 if (check_device_tree(ar)) { 721 /* got board file from device tree */ 722 return 0; 723 } 724 725 /* there was no proper board file, try to use default instead */ 726 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 727 filename, ret); 728 729 filename = ar->hw.fw_default_board; 730 731 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 732 &ar->fw_board_len); 733 if (ret) { 734 ath6kl_err("Failed to get default board file %s: %d\n", 735 filename, ret); 736 return ret; 737 } 738 739 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 740 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 741 742 return 0; 743 } 744 745 static int ath6kl_fetch_otp_file(struct ath6kl *ar) 746 { 747 char filename[100]; 748 int ret; 749 750 if (ar->fw_otp != NULL) 751 return 0; 752 753 if (ar->hw.fw.otp == NULL) { 754 ath6kl_dbg(ATH6KL_DBG_BOOT, 755 "no OTP file configured for this hw\n"); 756 return 0; 757 } 758 759 snprintf(filename, sizeof(filename), "%s/%s", 760 ar->hw.fw.dir, ar->hw.fw.otp); 761 762 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 763 &ar->fw_otp_len); 764 if (ret) { 765 ath6kl_err("Failed to get OTP file %s: %d\n", 766 filename, ret); 767 return ret; 768 } 769 770 return 0; 771 } 772 773 static int ath6kl_fetch_testmode_file(struct ath6kl *ar) 774 { 775 char filename[100]; 776 int ret; 777 778 if (ar->testmode == 0) 779 return 0; 780 781 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode); 782 783 if (ar->testmode == 2) { 784 if (ar->hw.fw.utf == NULL) { 785 ath6kl_warn("testmode 2 not supported\n"); 786 return -EOPNOTSUPP; 787 } 788 789 snprintf(filename, sizeof(filename), "%s/%s", 790 ar->hw.fw.dir, ar->hw.fw.utf); 791 } else { 792 if (ar->hw.fw.tcmd == NULL) { 793 ath6kl_warn("testmode 1 not supported\n"); 794 return -EOPNOTSUPP; 795 } 796 797 snprintf(filename, sizeof(filename), "%s/%s", 798 ar->hw.fw.dir, ar->hw.fw.tcmd); 799 } 800 801 set_bit(TESTMODE, &ar->flag); 802 803 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 804 if (ret) { 805 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n", 806 ar->testmode, filename, ret); 807 return ret; 808 } 809 810 return 0; 811 } 812 813 static int ath6kl_fetch_fw_file(struct ath6kl *ar) 814 { 815 char filename[100]; 816 int ret; 817 818 if (ar->fw != NULL) 819 return 0; 820 821 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */ 822 if (WARN_ON(ar->hw.fw.fw == NULL)) 823 return -EINVAL; 824 825 snprintf(filename, sizeof(filename), "%s/%s", 826 ar->hw.fw.dir, ar->hw.fw.fw); 827 828 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 829 if (ret) { 830 ath6kl_err("Failed to get firmware file %s: %d\n", 831 filename, ret); 832 return ret; 833 } 834 835 return 0; 836 } 837 838 static int ath6kl_fetch_patch_file(struct ath6kl *ar) 839 { 840 char filename[100]; 841 int ret; 842 843 if (ar->fw_patch != NULL) 844 return 0; 845 846 if (ar->hw.fw.patch == NULL) 847 return 0; 848 849 snprintf(filename, sizeof(filename), "%s/%s", 850 ar->hw.fw.dir, ar->hw.fw.patch); 851 852 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 853 &ar->fw_patch_len); 854 if (ret) { 855 ath6kl_err("Failed to get patch file %s: %d\n", 856 filename, ret); 857 return ret; 858 } 859 860 return 0; 861 } 862 863 static int ath6kl_fetch_testscript_file(struct ath6kl *ar) 864 { 865 char filename[100]; 866 int ret; 867 868 if (ar->testmode != 2) 869 return 0; 870 871 if (ar->fw_testscript != NULL) 872 return 0; 873 874 if (ar->hw.fw.testscript == NULL) 875 return 0; 876 877 snprintf(filename, sizeof(filename), "%s/%s", 878 ar->hw.fw.dir, ar->hw.fw.testscript); 879 880 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript, 881 &ar->fw_testscript_len); 882 if (ret) { 883 ath6kl_err("Failed to get testscript file %s: %d\n", 884 filename, ret); 885 return ret; 886 } 887 888 return 0; 889 } 890 891 static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 892 { 893 int ret; 894 895 ret = ath6kl_fetch_otp_file(ar); 896 if (ret) 897 return ret; 898 899 ret = ath6kl_fetch_fw_file(ar); 900 if (ret) 901 return ret; 902 903 ret = ath6kl_fetch_patch_file(ar); 904 if (ret) 905 return ret; 906 907 ret = ath6kl_fetch_testscript_file(ar); 908 if (ret) 909 return ret; 910 911 return 0; 912 } 913 914 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name) 915 { 916 size_t magic_len, len, ie_len; 917 const struct firmware *fw; 918 struct ath6kl_fw_ie *hdr; 919 char filename[100]; 920 const u8 *data; 921 int ret, ie_id, i, index, bit; 922 __le32 *val; 923 924 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name); 925 926 ret = request_firmware(&fw, filename, ar->dev); 927 if (ret) 928 return ret; 929 930 data = fw->data; 931 len = fw->size; 932 933 /* magic also includes the null byte, check that as well */ 934 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 935 936 if (len < magic_len) { 937 ret = -EINVAL; 938 goto out; 939 } 940 941 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 942 ret = -EINVAL; 943 goto out; 944 } 945 946 len -= magic_len; 947 data += magic_len; 948 949 /* loop elements */ 950 while (len > sizeof(struct ath6kl_fw_ie)) { 951 /* hdr is unaligned! */ 952 hdr = (struct ath6kl_fw_ie *) data; 953 954 ie_id = le32_to_cpup(&hdr->id); 955 ie_len = le32_to_cpup(&hdr->len); 956 957 len -= sizeof(*hdr); 958 data += sizeof(*hdr); 959 960 if (len < ie_len) { 961 ret = -EINVAL; 962 goto out; 963 } 964 965 switch (ie_id) { 966 case ATH6KL_FW_IE_FW_VERSION: 967 strlcpy(ar->wiphy->fw_version, data, 968 sizeof(ar->wiphy->fw_version)); 969 970 ath6kl_dbg(ATH6KL_DBG_BOOT, 971 "found fw version %s\n", 972 ar->wiphy->fw_version); 973 break; 974 case ATH6KL_FW_IE_OTP_IMAGE: 975 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", 976 ie_len); 977 978 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 979 980 if (ar->fw_otp == NULL) { 981 ret = -ENOMEM; 982 goto out; 983 } 984 985 ar->fw_otp_len = ie_len; 986 break; 987 case ATH6KL_FW_IE_FW_IMAGE: 988 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", 989 ie_len); 990 991 /* in testmode we already might have a fw file */ 992 if (ar->fw != NULL) 993 break; 994 995 ar->fw = vmalloc(ie_len); 996 997 if (ar->fw == NULL) { 998 ret = -ENOMEM; 999 goto out; 1000 } 1001 1002 memcpy(ar->fw, data, ie_len); 1003 ar->fw_len = ie_len; 1004 break; 1005 case ATH6KL_FW_IE_PATCH_IMAGE: 1006 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", 1007 ie_len); 1008 1009 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 1010 1011 if (ar->fw_patch == NULL) { 1012 ret = -ENOMEM; 1013 goto out; 1014 } 1015 1016 ar->fw_patch_len = ie_len; 1017 break; 1018 case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 1019 val = (__le32 *) data; 1020 ar->hw.reserved_ram_size = le32_to_cpup(val); 1021 1022 ath6kl_dbg(ATH6KL_DBG_BOOT, 1023 "found reserved ram size ie 0x%d\n", 1024 ar->hw.reserved_ram_size); 1025 break; 1026 case ATH6KL_FW_IE_CAPABILITIES: 1027 ath6kl_dbg(ATH6KL_DBG_BOOT, 1028 "found firmware capabilities ie (%zd B)\n", 1029 ie_len); 1030 1031 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 1032 index = i / 8; 1033 bit = i % 8; 1034 1035 if (index == ie_len) 1036 break; 1037 1038 if (data[index] & (1 << bit)) 1039 __set_bit(i, ar->fw_capabilities); 1040 } 1041 1042 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 1043 ar->fw_capabilities, 1044 sizeof(ar->fw_capabilities)); 1045 break; 1046 case ATH6KL_FW_IE_PATCH_ADDR: 1047 if (ie_len != sizeof(*val)) 1048 break; 1049 1050 val = (__le32 *) data; 1051 ar->hw.dataset_patch_addr = le32_to_cpup(val); 1052 1053 ath6kl_dbg(ATH6KL_DBG_BOOT, 1054 "found patch address ie 0x%x\n", 1055 ar->hw.dataset_patch_addr); 1056 break; 1057 case ATH6KL_FW_IE_BOARD_ADDR: 1058 if (ie_len != sizeof(*val)) 1059 break; 1060 1061 val = (__le32 *) data; 1062 ar->hw.board_addr = le32_to_cpup(val); 1063 1064 ath6kl_dbg(ATH6KL_DBG_BOOT, 1065 "found board address ie 0x%x\n", 1066 ar->hw.board_addr); 1067 break; 1068 case ATH6KL_FW_IE_VIF_MAX: 1069 if (ie_len != sizeof(*val)) 1070 break; 1071 1072 val = (__le32 *) data; 1073 ar->vif_max = min_t(unsigned int, le32_to_cpup(val), 1074 ATH6KL_VIF_MAX); 1075 1076 if (ar->vif_max > 1 && !ar->p2p) 1077 ar->max_norm_iface = 2; 1078 1079 ath6kl_dbg(ATH6KL_DBG_BOOT, 1080 "found vif max ie %d\n", ar->vif_max); 1081 break; 1082 default: 1083 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 1084 le32_to_cpup(&hdr->id)); 1085 break; 1086 } 1087 1088 len -= ie_len; 1089 data += ie_len; 1090 }; 1091 1092 ret = 0; 1093 out: 1094 release_firmware(fw); 1095 1096 return ret; 1097 } 1098 1099 int ath6kl_init_fetch_firmwares(struct ath6kl *ar) 1100 { 1101 int ret; 1102 1103 ret = ath6kl_fetch_board_file(ar); 1104 if (ret) 1105 return ret; 1106 1107 ret = ath6kl_fetch_testmode_file(ar); 1108 if (ret) 1109 return ret; 1110 1111 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE); 1112 if (ret == 0) { 1113 ar->fw_api = 4; 1114 goto out; 1115 } 1116 1117 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE); 1118 if (ret == 0) { 1119 ar->fw_api = 3; 1120 goto out; 1121 } 1122 1123 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE); 1124 if (ret == 0) { 1125 ar->fw_api = 2; 1126 goto out; 1127 } 1128 1129 ret = ath6kl_fetch_fw_api1(ar); 1130 if (ret) 1131 return ret; 1132 1133 ar->fw_api = 1; 1134 1135 out: 1136 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1137 1138 return 0; 1139 } 1140 1141 static int ath6kl_upload_board_file(struct ath6kl *ar) 1142 { 1143 u32 board_address, board_ext_address, param; 1144 u32 board_data_size, board_ext_data_size; 1145 int ret; 1146 1147 if (WARN_ON(ar->fw_board == NULL)) 1148 return -ENOENT; 1149 1150 /* 1151 * Determine where in Target RAM to write Board Data. 1152 * For AR6004, host determine Target RAM address for 1153 * writing board data. 1154 */ 1155 if (ar->hw.board_addr != 0) { 1156 board_address = ar->hw.board_addr; 1157 ath6kl_bmi_write_hi32(ar, hi_board_data, 1158 board_address); 1159 } else { 1160 ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address); 1161 } 1162 1163 /* determine where in target ram to write extended board data */ 1164 ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address); 1165 1166 if (ar->target_type == TARGET_TYPE_AR6003 && 1167 board_ext_address == 0) { 1168 ath6kl_err("Failed to get board file target address.\n"); 1169 return -EINVAL; 1170 } 1171 1172 switch (ar->target_type) { 1173 case TARGET_TYPE_AR6003: 1174 board_data_size = AR6003_BOARD_DATA_SZ; 1175 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 1176 if (ar->fw_board_len > (board_data_size + board_ext_data_size)) 1177 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2; 1178 break; 1179 case TARGET_TYPE_AR6004: 1180 board_data_size = AR6004_BOARD_DATA_SZ; 1181 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 1182 break; 1183 default: 1184 WARN_ON(1); 1185 return -EINVAL; 1186 break; 1187 } 1188 1189 if (board_ext_address && 1190 ar->fw_board_len == (board_data_size + board_ext_data_size)) { 1191 1192 /* write extended board data */ 1193 ath6kl_dbg(ATH6KL_DBG_BOOT, 1194 "writing extended board data to 0x%x (%d B)\n", 1195 board_ext_address, board_ext_data_size); 1196 1197 ret = ath6kl_bmi_write(ar, board_ext_address, 1198 ar->fw_board + board_data_size, 1199 board_ext_data_size); 1200 if (ret) { 1201 ath6kl_err("Failed to write extended board data: %d\n", 1202 ret); 1203 return ret; 1204 } 1205 1206 /* record that extended board data is initialized */ 1207 param = (board_ext_data_size << 16) | 1; 1208 1209 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param); 1210 } 1211 1212 if (ar->fw_board_len < board_data_size) { 1213 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1214 ret = -EINVAL; 1215 return ret; 1216 } 1217 1218 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 1219 board_address, board_data_size); 1220 1221 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 1222 board_data_size); 1223 1224 if (ret) { 1225 ath6kl_err("Board file bmi write failed: %d\n", ret); 1226 return ret; 1227 } 1228 1229 /* record the fact that Board Data IS initialized */ 1230 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1); 1231 1232 return ret; 1233 } 1234 1235 static int ath6kl_upload_otp(struct ath6kl *ar) 1236 { 1237 u32 address, param; 1238 bool from_hw = false; 1239 int ret; 1240 1241 if (ar->fw_otp == NULL) 1242 return 0; 1243 1244 address = ar->hw.app_load_addr; 1245 1246 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, 1247 ar->fw_otp_len); 1248 1249 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1250 ar->fw_otp_len); 1251 if (ret) { 1252 ath6kl_err("Failed to upload OTP file: %d\n", ret); 1253 return ret; 1254 } 1255 1256 /* read firmware start address */ 1257 ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address); 1258 1259 if (ret) { 1260 ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1261 return ret; 1262 } 1263 1264 if (ar->hw.app_start_override_addr == 0) { 1265 ar->hw.app_start_override_addr = address; 1266 from_hw = true; 1267 } 1268 1269 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", 1270 from_hw ? " (from hw)" : "", 1271 ar->hw.app_start_override_addr); 1272 1273 /* execute the OTP code */ 1274 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", 1275 ar->hw.app_start_override_addr); 1276 param = 0; 1277 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); 1278 1279 return ret; 1280 } 1281 1282 static int ath6kl_upload_firmware(struct ath6kl *ar) 1283 { 1284 u32 address; 1285 int ret; 1286 1287 if (WARN_ON(ar->fw == NULL)) 1288 return 0; 1289 1290 address = ar->hw.app_load_addr; 1291 1292 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", 1293 address, ar->fw_len); 1294 1295 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1296 1297 if (ret) { 1298 ath6kl_err("Failed to write firmware: %d\n", ret); 1299 return ret; 1300 } 1301 1302 /* 1303 * Set starting address for firmware 1304 * Don't need to setup app_start override addr on AR6004 1305 */ 1306 if (ar->target_type != TARGET_TYPE_AR6004) { 1307 address = ar->hw.app_start_override_addr; 1308 ath6kl_bmi_set_app_start(ar, address); 1309 } 1310 return ret; 1311 } 1312 1313 static int ath6kl_upload_patch(struct ath6kl *ar) 1314 { 1315 u32 address; 1316 int ret; 1317 1318 if (ar->fw_patch == NULL) 1319 return 0; 1320 1321 address = ar->hw.dataset_patch_addr; 1322 1323 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", 1324 address, ar->fw_patch_len); 1325 1326 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1327 if (ret) { 1328 ath6kl_err("Failed to write patch file: %d\n", ret); 1329 return ret; 1330 } 1331 1332 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address); 1333 1334 return 0; 1335 } 1336 1337 static int ath6kl_upload_testscript(struct ath6kl *ar) 1338 { 1339 u32 address; 1340 int ret; 1341 1342 if (ar->testmode != 2) 1343 return 0; 1344 1345 if (ar->fw_testscript == NULL) 1346 return 0; 1347 1348 address = ar->hw.testscript_addr; 1349 1350 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n", 1351 address, ar->fw_testscript_len); 1352 1353 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript, 1354 ar->fw_testscript_len); 1355 if (ret) { 1356 ath6kl_err("Failed to write testscript file: %d\n", ret); 1357 return ret; 1358 } 1359 1360 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address); 1361 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096); 1362 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1); 1363 1364 return 0; 1365 } 1366 1367 static int ath6kl_init_upload(struct ath6kl *ar) 1368 { 1369 u32 param, options, sleep, address; 1370 int status = 0; 1371 1372 if (ar->target_type != TARGET_TYPE_AR6003 && 1373 ar->target_type != TARGET_TYPE_AR6004) 1374 return -EINVAL; 1375 1376 /* temporarily disable system sleep */ 1377 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1378 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1379 if (status) 1380 return status; 1381 1382 options = param; 1383 1384 param |= ATH6KL_OPTION_SLEEP_DISABLE; 1385 status = ath6kl_bmi_reg_write(ar, address, param); 1386 if (status) 1387 return status; 1388 1389 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1390 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1391 if (status) 1392 return status; 1393 1394 sleep = param; 1395 1396 param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1397 status = ath6kl_bmi_reg_write(ar, address, param); 1398 if (status) 1399 return status; 1400 1401 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1402 options, sleep); 1403 1404 /* program analog PLL register */ 1405 /* no need to control 40/44MHz clock on AR6004 */ 1406 if (ar->target_type != TARGET_TYPE_AR6004) { 1407 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1408 0xF9104001); 1409 1410 if (status) 1411 return status; 1412 1413 /* Run at 80/88MHz by default */ 1414 param = SM(CPU_CLOCK_STANDARD, 1); 1415 1416 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1417 status = ath6kl_bmi_reg_write(ar, address, param); 1418 if (status) 1419 return status; 1420 } 1421 1422 param = 0; 1423 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1424 param = SM(LPO_CAL_ENABLE, 1); 1425 status = ath6kl_bmi_reg_write(ar, address, param); 1426 if (status) 1427 return status; 1428 1429 /* WAR to avoid SDIO CRC err */ 1430 if (ar->version.target_ver == AR6003_HW_2_0_VERSION || 1431 ar->version.target_ver == AR6003_HW_2_1_1_VERSION) { 1432 ath6kl_err("temporary war to avoid sdio crc error\n"); 1433 1434 param = 0x28; 1435 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS; 1436 status = ath6kl_bmi_reg_write(ar, address, param); 1437 if (status) 1438 return status; 1439 1440 param = 0x20; 1441 1442 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1443 status = ath6kl_bmi_reg_write(ar, address, param); 1444 if (status) 1445 return status; 1446 1447 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1448 status = ath6kl_bmi_reg_write(ar, address, param); 1449 if (status) 1450 return status; 1451 1452 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1453 status = ath6kl_bmi_reg_write(ar, address, param); 1454 if (status) 1455 return status; 1456 1457 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1458 status = ath6kl_bmi_reg_write(ar, address, param); 1459 if (status) 1460 return status; 1461 } 1462 1463 /* write EEPROM data to Target RAM */ 1464 status = ath6kl_upload_board_file(ar); 1465 if (status) 1466 return status; 1467 1468 /* transfer One time Programmable data */ 1469 status = ath6kl_upload_otp(ar); 1470 if (status) 1471 return status; 1472 1473 /* Download Target firmware */ 1474 status = ath6kl_upload_firmware(ar); 1475 if (status) 1476 return status; 1477 1478 status = ath6kl_upload_patch(ar); 1479 if (status) 1480 return status; 1481 1482 /* Download the test script */ 1483 status = ath6kl_upload_testscript(ar); 1484 if (status) 1485 return status; 1486 1487 /* Restore system sleep */ 1488 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1489 status = ath6kl_bmi_reg_write(ar, address, sleep); 1490 if (status) 1491 return status; 1492 1493 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1494 param = options | 0x20; 1495 status = ath6kl_bmi_reg_write(ar, address, param); 1496 if (status) 1497 return status; 1498 1499 return status; 1500 } 1501 1502 int ath6kl_init_hw_params(struct ath6kl *ar) 1503 { 1504 const struct ath6kl_hw *uninitialized_var(hw); 1505 int i; 1506 1507 for (i = 0; i < ARRAY_SIZE(hw_list); i++) { 1508 hw = &hw_list[i]; 1509 1510 if (hw->id == ar->version.target_ver) 1511 break; 1512 } 1513 1514 if (i == ARRAY_SIZE(hw_list)) { 1515 ath6kl_err("Unsupported hardware version: 0x%x\n", 1516 ar->version.target_ver); 1517 return -EINVAL; 1518 } 1519 1520 ar->hw = *hw; 1521 1522 ath6kl_dbg(ATH6KL_DBG_BOOT, 1523 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 1524 ar->version.target_ver, ar->target_type, 1525 ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 1526 ath6kl_dbg(ATH6KL_DBG_BOOT, 1527 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 1528 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 1529 ar->hw.reserved_ram_size); 1530 ath6kl_dbg(ATH6KL_DBG_BOOT, 1531 "refclk_hz %d uarttx_pin %d", 1532 ar->hw.refclk_hz, ar->hw.uarttx_pin); 1533 1534 return 0; 1535 } 1536 1537 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type) 1538 { 1539 switch (type) { 1540 case ATH6KL_HIF_TYPE_SDIO: 1541 return "sdio"; 1542 case ATH6KL_HIF_TYPE_USB: 1543 return "usb"; 1544 } 1545 1546 return NULL; 1547 } 1548 1549 static int __ath6kl_init_hw_start(struct ath6kl *ar) 1550 { 1551 long timeleft; 1552 int ret, i; 1553 1554 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); 1555 1556 ret = ath6kl_hif_power_on(ar); 1557 if (ret) 1558 return ret; 1559 1560 ret = ath6kl_configure_target(ar); 1561 if (ret) 1562 goto err_power_off; 1563 1564 ret = ath6kl_init_upload(ar); 1565 if (ret) 1566 goto err_power_off; 1567 1568 /* Do we need to finish the BMI phase */ 1569 /* FIXME: return error from ath6kl_bmi_done() */ 1570 if (ath6kl_bmi_done(ar)) { 1571 ret = -EIO; 1572 goto err_power_off; 1573 } 1574 1575 /* 1576 * The reason we have to wait for the target here is that the 1577 * driver layer has to init BMI in order to set the host block 1578 * size. 1579 */ 1580 if (ath6kl_htc_wait_target(ar->htc_target)) { 1581 ret = -EIO; 1582 goto err_power_off; 1583 } 1584 1585 if (ath6kl_init_service_ep(ar)) { 1586 ret = -EIO; 1587 goto err_cleanup_scatter; 1588 } 1589 1590 /* setup credit distribution */ 1591 ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info); 1592 1593 /* start HTC */ 1594 ret = ath6kl_htc_start(ar->htc_target); 1595 if (ret) { 1596 /* FIXME: call this */ 1597 ath6kl_cookie_cleanup(ar); 1598 goto err_cleanup_scatter; 1599 } 1600 1601 /* Wait for Wmi event to be ready */ 1602 timeleft = wait_event_interruptible_timeout(ar->event_wq, 1603 test_bit(WMI_READY, 1604 &ar->flag), 1605 WMI_TIMEOUT); 1606 1607 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 1608 1609 1610 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) { 1611 ath6kl_info("%s %s fw %s api %d%s\n", 1612 ar->hw.name, 1613 ath6kl_init_get_hif_name(ar->hif_type), 1614 ar->wiphy->fw_version, 1615 ar->fw_api, 1616 test_bit(TESTMODE, &ar->flag) ? " testmode" : ""); 1617 } 1618 1619 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 1620 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 1621 ATH6KL_ABI_VERSION, ar->version.abi_ver); 1622 ret = -EIO; 1623 goto err_htc_stop; 1624 } 1625 1626 if (!timeleft || signal_pending(current)) { 1627 ath6kl_err("wmi is not ready or wait was interrupted\n"); 1628 ret = -EIO; 1629 goto err_htc_stop; 1630 } 1631 1632 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 1633 1634 /* communicate the wmi protocol verision to the target */ 1635 /* FIXME: return error */ 1636 if ((ath6kl_set_host_app_area(ar)) != 0) 1637 ath6kl_err("unable to set the host app area\n"); 1638 1639 for (i = 0; i < ar->vif_max; i++) { 1640 ret = ath6kl_target_config_wlan_params(ar, i); 1641 if (ret) 1642 goto err_htc_stop; 1643 } 1644 1645 return 0; 1646 1647 err_htc_stop: 1648 ath6kl_htc_stop(ar->htc_target); 1649 err_cleanup_scatter: 1650 ath6kl_hif_cleanup_scatter(ar); 1651 err_power_off: 1652 ath6kl_hif_power_off(ar); 1653 1654 return ret; 1655 } 1656 1657 int ath6kl_init_hw_start(struct ath6kl *ar) 1658 { 1659 int err; 1660 1661 err = __ath6kl_init_hw_start(ar); 1662 if (err) 1663 return err; 1664 ar->state = ATH6KL_STATE_ON; 1665 return 0; 1666 } 1667 1668 static int __ath6kl_init_hw_stop(struct ath6kl *ar) 1669 { 1670 int ret; 1671 1672 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); 1673 1674 ath6kl_htc_stop(ar->htc_target); 1675 1676 ath6kl_hif_stop(ar); 1677 1678 ath6kl_bmi_reset(ar); 1679 1680 ret = ath6kl_hif_power_off(ar); 1681 if (ret) 1682 ath6kl_warn("failed to power off hif: %d\n", ret); 1683 1684 return 0; 1685 } 1686 1687 int ath6kl_init_hw_stop(struct ath6kl *ar) 1688 { 1689 int err; 1690 1691 err = __ath6kl_init_hw_stop(ar); 1692 if (err) 1693 return err; 1694 ar->state = ATH6KL_STATE_OFF; 1695 return 0; 1696 } 1697 1698 void ath6kl_init_hw_restart(struct ath6kl *ar) 1699 { 1700 1701 ar->state = ATH6KL_STATE_RECOVERY; 1702 1703 ath6kl_cfg80211_stop_all(ar); 1704 1705 if (__ath6kl_init_hw_stop(ar)) 1706 return; 1707 1708 if (__ath6kl_init_hw_start(ar)) { 1709 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n"); 1710 return; 1711 } 1712 1713 ar->state = ATH6KL_STATE_ON; 1714 ar->fw_recovery.err_reason = 0; 1715 } 1716 1717 /* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */ 1718 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) 1719 { 1720 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 1721 bool discon_issued; 1722 1723 netif_stop_queue(vif->ndev); 1724 1725 clear_bit(WLAN_ENABLED, &vif->flags); 1726 1727 if (wmi_ready) { 1728 discon_issued = test_bit(CONNECTED, &vif->flags) || 1729 test_bit(CONNECT_PEND, &vif->flags); 1730 ath6kl_disconnect(vif); 1731 del_timer(&vif->disconnect_timer); 1732 1733 if (discon_issued) 1734 ath6kl_disconnect_event(vif, DISCONNECT_CMD, 1735 (vif->nw_type & AP_NETWORK) ? 1736 bcast_mac : vif->bssid, 1737 0, NULL, 0); 1738 } 1739 1740 if (vif->scan_req) { 1741 cfg80211_scan_done(vif->scan_req, true); 1742 vif->scan_req = NULL; 1743 } 1744 1745 /* need to clean up enhanced bmiss detection fw state */ 1746 ath6kl_cfg80211_sta_bmiss_enhance(vif, false); 1747 } 1748 1749 void ath6kl_stop_txrx(struct ath6kl *ar) 1750 { 1751 struct ath6kl_vif *vif, *tmp_vif; 1752 int i; 1753 1754 set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1755 1756 if (down_interruptible(&ar->sem)) { 1757 ath6kl_err("down_interruptible failed\n"); 1758 return; 1759 } 1760 1761 for (i = 0; i < AP_MAX_NUM_STA; i++) 1762 aggr_reset_state(ar->sta_list[i].aggr_conn); 1763 1764 spin_lock_bh(&ar->list_lock); 1765 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { 1766 list_del(&vif->list); 1767 spin_unlock_bh(&ar->list_lock); 1768 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); 1769 rtnl_lock(); 1770 ath6kl_cfg80211_vif_cleanup(vif); 1771 rtnl_unlock(); 1772 spin_lock_bh(&ar->list_lock); 1773 } 1774 spin_unlock_bh(&ar->list_lock); 1775 1776 clear_bit(WMI_READY, &ar->flag); 1777 1778 /* 1779 * After wmi_shudown all WMI events will be dropped. We 1780 * need to cleanup the buffers allocated in AP mode and 1781 * give disconnect notification to stack, which usually 1782 * happens in the disconnect_event. Simulate the disconnect 1783 * event by calling the function directly. Sometimes 1784 * disconnect_event will be received when the debug logs 1785 * are collected. 1786 */ 1787 ath6kl_wmi_shutdown(ar->wmi); 1788 1789 clear_bit(WMI_ENABLED, &ar->flag); 1790 if (ar->htc_target) { 1791 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); 1792 ath6kl_htc_stop(ar->htc_target); 1793 } 1794 1795 /* 1796 * Try to reset the device if we can. The driver may have been 1797 * configure NOT to reset the target during a debug session. 1798 */ 1799 ath6kl_dbg(ATH6KL_DBG_TRC, 1800 "attempting to reset target on instance destroy\n"); 1801 ath6kl_reset_device(ar, ar->target_type, true, true); 1802 1803 clear_bit(WLAN_ENABLED, &ar->flag); 1804 1805 up(&ar->sem); 1806 } 1807 EXPORT_SYMBOL(ath6kl_stop_txrx); 1808