1 2 /* 3 * Copyright (c) 2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <linux/moduleparam.h> 20 #include <linux/errno.h> 21 #include <linux/export.h> 22 #include <linux/of.h> 23 #include <linux/mmc/sdio_func.h> 24 #include <linux/vmalloc.h> 25 26 #include "core.h" 27 #include "cfg80211.h" 28 #include "target.h" 29 #include "debug.h" 30 #include "hif-ops.h" 31 #include "htc-ops.h" 32 33 static const struct ath6kl_hw hw_list[] = { 34 { 35 .id = AR6003_HW_2_0_VERSION, 36 .name = "ar6003 hw 2.0", 37 .dataset_patch_addr = 0x57e884, 38 .app_load_addr = 0x543180, 39 .board_ext_data_addr = 0x57e500, 40 .reserved_ram_size = 6912, 41 .refclk_hz = 26000000, 42 .uarttx_pin = 8, 43 44 /* hw2.0 needs override address hardcoded */ 45 .app_start_override_addr = 0x944C00, 46 47 .fw = { 48 .dir = AR6003_HW_2_0_FW_DIR, 49 .otp = AR6003_HW_2_0_OTP_FILE, 50 .fw = AR6003_HW_2_0_FIRMWARE_FILE, 51 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE, 52 .patch = AR6003_HW_2_0_PATCH_FILE, 53 }, 54 55 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE, 56 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE, 57 }, 58 { 59 .id = AR6003_HW_2_1_1_VERSION, 60 .name = "ar6003 hw 2.1.1", 61 .dataset_patch_addr = 0x57ff74, 62 .app_load_addr = 0x1234, 63 .board_ext_data_addr = 0x542330, 64 .reserved_ram_size = 512, 65 .refclk_hz = 26000000, 66 .uarttx_pin = 8, 67 .testscript_addr = 0x57ef74, 68 69 .fw = { 70 .dir = AR6003_HW_2_1_1_FW_DIR, 71 .otp = AR6003_HW_2_1_1_OTP_FILE, 72 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE, 73 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE, 74 .patch = AR6003_HW_2_1_1_PATCH_FILE, 75 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE, 76 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE, 77 }, 78 79 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE, 80 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE, 81 }, 82 { 83 .id = AR6004_HW_1_0_VERSION, 84 .name = "ar6004 hw 1.0", 85 .dataset_patch_addr = 0x57e884, 86 .app_load_addr = 0x1234, 87 .board_ext_data_addr = 0x437000, 88 .reserved_ram_size = 19456, 89 .board_addr = 0x433900, 90 .refclk_hz = 26000000, 91 .uarttx_pin = 11, 92 93 .fw = { 94 .dir = AR6004_HW_1_0_FW_DIR, 95 .fw = AR6004_HW_1_0_FIRMWARE_FILE, 96 }, 97 98 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE, 99 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE, 100 }, 101 { 102 .id = AR6004_HW_1_1_VERSION, 103 .name = "ar6004 hw 1.1", 104 .dataset_patch_addr = 0x57e884, 105 .app_load_addr = 0x1234, 106 .board_ext_data_addr = 0x437000, 107 .reserved_ram_size = 11264, 108 .board_addr = 0x43d400, 109 .refclk_hz = 40000000, 110 .uarttx_pin = 11, 111 112 .fw = { 113 .dir = AR6004_HW_1_1_FW_DIR, 114 .fw = AR6004_HW_1_1_FIRMWARE_FILE, 115 }, 116 117 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, 118 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, 119 }, 120 }; 121 122 /* 123 * Include definitions here that can be used to tune the WLAN module 124 * behavior. Different customers can tune the behavior as per their needs, 125 * here. 126 */ 127 128 /* 129 * This configuration item enable/disable keepalive support. 130 * Keepalive support: In the absence of any data traffic to AP, null 131 * frames will be sent to the AP at periodic interval, to keep the association 132 * active. This configuration item defines the periodic interval. 133 * Use value of zero to disable keepalive support 134 * Default: 60 seconds 135 */ 136 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 137 138 /* 139 * This configuration item sets the value of disconnect timeout 140 * Firmware delays sending the disconnec event to the host for this 141 * timeout after is gets disconnected from the current AP. 142 * If the firmware successly roams within the disconnect timeout 143 * it sends a new connect event 144 */ 145 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 146 147 148 #define ATH6KL_DATA_OFFSET 64 149 struct sk_buff *ath6kl_buf_alloc(int size) 150 { 151 struct sk_buff *skb; 152 u16 reserved; 153 154 /* Add chacheline space at front and back of buffer */ 155 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 156 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; 157 skb = dev_alloc_skb(size + reserved); 158 159 if (skb) 160 skb_reserve(skb, reserved - L1_CACHE_BYTES); 161 return skb; 162 } 163 164 void ath6kl_init_profile_info(struct ath6kl_vif *vif) 165 { 166 vif->ssid_len = 0; 167 memset(vif->ssid, 0, sizeof(vif->ssid)); 168 169 vif->dot11_auth_mode = OPEN_AUTH; 170 vif->auth_mode = NONE_AUTH; 171 vif->prwise_crypto = NONE_CRYPT; 172 vif->prwise_crypto_len = 0; 173 vif->grp_crypto = NONE_CRYPT; 174 vif->grp_crypto_len = 0; 175 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 176 memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); 177 memset(vif->bssid, 0, sizeof(vif->bssid)); 178 vif->bss_ch = 0; 179 } 180 181 static int ath6kl_set_host_app_area(struct ath6kl *ar) 182 { 183 u32 address, data; 184 struct host_app_area host_app_area; 185 186 /* Fetch the address of the host_app_area_s 187 * instance in the host interest area */ 188 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 189 address = TARG_VTOP(ar->target_type, address); 190 191 if (ath6kl_diag_read32(ar, address, &data)) 192 return -EIO; 193 194 address = TARG_VTOP(ar->target_type, data); 195 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); 196 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 197 sizeof(struct host_app_area))) 198 return -EIO; 199 200 return 0; 201 } 202 203 static inline void set_ac2_ep_map(struct ath6kl *ar, 204 u8 ac, 205 enum htc_endpoint_id ep) 206 { 207 ar->ac2ep_map[ac] = ep; 208 ar->ep2ac_map[ep] = ac; 209 } 210 211 /* connect to a service */ 212 static int ath6kl_connectservice(struct ath6kl *ar, 213 struct htc_service_connect_req *con_req, 214 char *desc) 215 { 216 int status; 217 struct htc_service_connect_resp response; 218 219 memset(&response, 0, sizeof(response)); 220 221 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 222 if (status) { 223 ath6kl_err("failed to connect to %s service status:%d\n", 224 desc, status); 225 return status; 226 } 227 228 switch (con_req->svc_id) { 229 case WMI_CONTROL_SVC: 230 if (test_bit(WMI_ENABLED, &ar->flag)) 231 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 232 ar->ctrl_ep = response.endpoint; 233 break; 234 case WMI_DATA_BE_SVC: 235 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 236 break; 237 case WMI_DATA_BK_SVC: 238 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 239 break; 240 case WMI_DATA_VI_SVC: 241 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 242 break; 243 case WMI_DATA_VO_SVC: 244 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 245 break; 246 default: 247 ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 248 return -EINVAL; 249 } 250 251 return 0; 252 } 253 254 static int ath6kl_init_service_ep(struct ath6kl *ar) 255 { 256 struct htc_service_connect_req connect; 257 258 memset(&connect, 0, sizeof(connect)); 259 260 /* these fields are the same for all service endpoints */ 261 connect.ep_cb.tx_comp_multi = ath6kl_tx_complete; 262 connect.ep_cb.rx = ath6kl_rx; 263 connect.ep_cb.rx_refill = ath6kl_rx_refill; 264 connect.ep_cb.tx_full = ath6kl_tx_queue_full; 265 266 /* 267 * Set the max queue depth so that our ath6kl_tx_queue_full handler 268 * gets called. 269 */ 270 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 271 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 272 if (!connect.ep_cb.rx_refill_thresh) 273 connect.ep_cb.rx_refill_thresh++; 274 275 /* connect to control service */ 276 connect.svc_id = WMI_CONTROL_SVC; 277 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 278 return -EIO; 279 280 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 281 282 /* 283 * Limit the HTC message size on the send path, although e can 284 * receive A-MSDU frames of 4K, we will only send ethernet-sized 285 * (802.3) frames on the send path. 286 */ 287 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 288 289 /* 290 * To reduce the amount of committed memory for larger A_MSDU 291 * frames, use the recv-alloc threshold mechanism for larger 292 * packets. 293 */ 294 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 295 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 296 297 /* 298 * For the remaining data services set the connection flag to 299 * reduce dribbling, if configured to do so. 300 */ 301 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 302 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 303 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 304 305 connect.svc_id = WMI_DATA_BE_SVC; 306 307 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 308 return -EIO; 309 310 /* connect to back-ground map this to WMI LOW_PRI */ 311 connect.svc_id = WMI_DATA_BK_SVC; 312 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 313 return -EIO; 314 315 /* connect to Video service, map this to to HI PRI */ 316 connect.svc_id = WMI_DATA_VI_SVC; 317 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 318 return -EIO; 319 320 /* 321 * Connect to VO service, this is currently not mapped to a WMI 322 * priority stream due to historical reasons. WMI originally 323 * defined 3 priorities over 3 mailboxes We can change this when 324 * WMI is reworked so that priorities are not dependent on 325 * mailboxes. 326 */ 327 connect.svc_id = WMI_DATA_VO_SVC; 328 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 329 return -EIO; 330 331 return 0; 332 } 333 334 void ath6kl_init_control_info(struct ath6kl_vif *vif) 335 { 336 ath6kl_init_profile_info(vif); 337 vif->def_txkey_index = 0; 338 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 339 vif->ch_hint = 0; 340 } 341 342 /* 343 * Set HTC/Mbox operational parameters, this can only be called when the 344 * target is in the BMI phase. 345 */ 346 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 347 u8 htc_ctrl_buf) 348 { 349 int status; 350 u32 blk_size; 351 352 blk_size = ar->mbox_info.block_size; 353 354 if (htc_ctrl_buf) 355 blk_size |= ((u32)htc_ctrl_buf) << 16; 356 357 /* set the host interest area for the block size */ 358 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size); 359 if (status) { 360 ath6kl_err("bmi_write_memory for IO block size failed\n"); 361 goto out; 362 } 363 364 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 365 blk_size, 366 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 367 368 if (mbox_isr_yield_val) { 369 /* set the host interest area for the mbox ISR yield limit */ 370 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit, 371 mbox_isr_yield_val); 372 if (status) { 373 ath6kl_err("bmi_write_memory for yield limit failed\n"); 374 goto out; 375 } 376 } 377 378 out: 379 return status; 380 } 381 382 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) 383 { 384 int ret; 385 386 /* 387 * Configure the device for rx dot11 header rules. "0,0" are the 388 * default values. Required if checksum offload is needed. Set 389 * RxMetaVersion to 2. 390 */ 391 ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, 392 ar->rx_meta_ver, 0, 0); 393 if (ret) { 394 ath6kl_err("unable to set the rx frame format: %d\n", ret); 395 return ret; 396 } 397 398 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) { 399 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, 400 IGNORE_PS_FAIL_DURING_SCAN); 401 if (ret) { 402 ath6kl_err("unable to set power save fail event policy: %d\n", 403 ret); 404 return ret; 405 } 406 } 407 408 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) { 409 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, 410 WMI_FOLLOW_BARKER_IN_ERP); 411 if (ret) { 412 ath6kl_err("unable to set barker preamble policy: %d\n", 413 ret); 414 return ret; 415 } 416 } 417 418 ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, 419 WLAN_CONFIG_KEEP_ALIVE_INTERVAL); 420 if (ret) { 421 ath6kl_err("unable to set keep alive interval: %d\n", ret); 422 return ret; 423 } 424 425 ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, 426 WLAN_CONFIG_DISCONNECT_TIMEOUT); 427 if (ret) { 428 ath6kl_err("unable to set disconnect timeout: %d\n", ret); 429 return ret; 430 } 431 432 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) { 433 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED); 434 if (ret) { 435 ath6kl_err("unable to set txop bursting: %d\n", ret); 436 return ret; 437 } 438 } 439 440 if (ar->p2p && (ar->vif_max == 1 || idx)) { 441 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, 442 P2P_FLAG_CAPABILITIES_REQ | 443 P2P_FLAG_MACADDR_REQ | 444 P2P_FLAG_HMODEL_REQ); 445 if (ret) { 446 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " 447 "capabilities (%d) - assuming P2P not " 448 "supported\n", ret); 449 ar->p2p = false; 450 } 451 } 452 453 if (ar->p2p && (ar->vif_max == 1 || idx)) { 454 /* Enable Probe Request reporting for P2P */ 455 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 456 if (ret) { 457 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " 458 "Request reporting (%d)\n", ret); 459 } 460 } 461 462 return ret; 463 } 464 465 int ath6kl_configure_target(struct ath6kl *ar) 466 { 467 u32 param, ram_reserved_size; 468 u8 fw_iftype, fw_mode = 0, fw_submode = 0; 469 int i, status; 470 471 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG); 472 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) { 473 ath6kl_err("bmi_write_memory for uart debug failed\n"); 474 return -EIO; 475 } 476 477 /* 478 * Note: Even though the firmware interface type is 479 * chosen as BSS_STA for all three interfaces, can 480 * be configured to IBSS/AP as long as the fw submode 481 * remains normal mode (0 - AP, STA and IBSS). But 482 * due to an target assert in firmware only one interface is 483 * configured for now. 484 */ 485 fw_iftype = HI_OPTION_FW_MODE_BSS_STA; 486 487 for (i = 0; i < ar->vif_max; i++) 488 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); 489 490 /* 491 * By default, submodes : 492 * vif[0] - AP/STA/IBSS 493 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" 494 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" 495 */ 496 497 for (i = 0; i < ar->max_norm_iface; i++) 498 fw_submode |= HI_OPTION_FW_SUBMODE_NONE << 499 (i * HI_OPTION_FW_SUBMODE_BITS); 500 501 for (i = ar->max_norm_iface; i < ar->vif_max; i++) 502 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 503 (i * HI_OPTION_FW_SUBMODE_BITS); 504 505 if (ar->p2p && ar->vif_max == 1) 506 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; 507 508 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest, 509 HTC_PROTOCOL_VERSION) != 0) { 510 ath6kl_err("bmi_write_memory for htc version failed\n"); 511 return -EIO; 512 } 513 514 /* set the firmware mode to STA/IBSS/AP */ 515 param = 0; 516 517 if (ath6kl_bmi_read_hi32(ar, hi_option_flag, ¶m) != 0) { 518 ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 519 return -EIO; 520 } 521 522 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT); 523 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; 524 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; 525 526 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 527 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 528 529 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) { 530 ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 531 return -EIO; 532 } 533 534 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 535 536 /* 537 * Hardcode the address use for the extended board data 538 * Ideally this should be pre-allocate by the OS at boot time 539 * But since it is a new feature and board data is loaded 540 * at init time, we have to workaround this from host. 541 * It is difficult to patch the firmware boot code, 542 * but possible in theory. 543 */ 544 545 if (ar->target_type == TARGET_TYPE_AR6003) { 546 param = ar->hw.board_ext_data_addr; 547 ram_reserved_size = ar->hw.reserved_ram_size; 548 549 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) { 550 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 551 return -EIO; 552 } 553 554 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 555 ram_reserved_size) != 0) { 556 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 557 return -EIO; 558 } 559 } 560 561 /* set the block size for the target */ 562 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 563 /* use default number of control buffers */ 564 return -EIO; 565 566 /* Configure GPIO AR600x UART */ 567 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin, 568 ar->hw.uarttx_pin); 569 if (status) 570 return status; 571 572 /* Configure target refclk_hz */ 573 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz); 574 if (status) 575 return status; 576 577 return 0; 578 } 579 580 /* firmware upload */ 581 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 582 u8 **fw, size_t *fw_len) 583 { 584 const struct firmware *fw_entry; 585 int ret; 586 587 ret = request_firmware(&fw_entry, filename, ar->dev); 588 if (ret) 589 return ret; 590 591 *fw_len = fw_entry->size; 592 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 593 594 if (*fw == NULL) 595 ret = -ENOMEM; 596 597 release_firmware(fw_entry); 598 599 return ret; 600 } 601 602 #ifdef CONFIG_OF 603 /* 604 * Check the device tree for a board-id and use it to construct 605 * the pathname to the firmware file. Used (for now) to find a 606 * fallback to the "bdata.bin" file--typically a symlink to the 607 * appropriate board-specific file. 608 */ 609 static bool check_device_tree(struct ath6kl *ar) 610 { 611 static const char *board_id_prop = "atheros,board-id"; 612 struct device_node *node; 613 char board_filename[64]; 614 const char *board_id; 615 int ret; 616 617 for_each_compatible_node(node, NULL, "atheros,ath6kl") { 618 board_id = of_get_property(node, board_id_prop, NULL); 619 if (board_id == NULL) { 620 ath6kl_warn("No \"%s\" property on %s node.\n", 621 board_id_prop, node->name); 622 continue; 623 } 624 snprintf(board_filename, sizeof(board_filename), 625 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id); 626 627 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 628 &ar->fw_board_len); 629 if (ret) { 630 ath6kl_err("Failed to get DT board file %s: %d\n", 631 board_filename, ret); 632 continue; 633 } 634 return true; 635 } 636 return false; 637 } 638 #else 639 static bool check_device_tree(struct ath6kl *ar) 640 { 641 return false; 642 } 643 #endif /* CONFIG_OF */ 644 645 static int ath6kl_fetch_board_file(struct ath6kl *ar) 646 { 647 const char *filename; 648 int ret; 649 650 if (ar->fw_board != NULL) 651 return 0; 652 653 if (WARN_ON(ar->hw.fw_board == NULL)) 654 return -EINVAL; 655 656 filename = ar->hw.fw_board; 657 658 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 659 &ar->fw_board_len); 660 if (ret == 0) { 661 /* managed to get proper board file */ 662 return 0; 663 } 664 665 if (check_device_tree(ar)) { 666 /* got board file from device tree */ 667 return 0; 668 } 669 670 /* there was no proper board file, try to use default instead */ 671 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 672 filename, ret); 673 674 filename = ar->hw.fw_default_board; 675 676 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 677 &ar->fw_board_len); 678 if (ret) { 679 ath6kl_err("Failed to get default board file %s: %d\n", 680 filename, ret); 681 return ret; 682 } 683 684 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 685 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 686 687 return 0; 688 } 689 690 static int ath6kl_fetch_otp_file(struct ath6kl *ar) 691 { 692 char filename[100]; 693 int ret; 694 695 if (ar->fw_otp != NULL) 696 return 0; 697 698 if (ar->hw.fw.otp == NULL) { 699 ath6kl_dbg(ATH6KL_DBG_BOOT, 700 "no OTP file configured for this hw\n"); 701 return 0; 702 } 703 704 snprintf(filename, sizeof(filename), "%s/%s", 705 ar->hw.fw.dir, ar->hw.fw.otp); 706 707 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 708 &ar->fw_otp_len); 709 if (ret) { 710 ath6kl_err("Failed to get OTP file %s: %d\n", 711 filename, ret); 712 return ret; 713 } 714 715 return 0; 716 } 717 718 static int ath6kl_fetch_testmode_file(struct ath6kl *ar) 719 { 720 char filename[100]; 721 int ret; 722 723 if (ar->testmode == 0) 724 return 0; 725 726 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode); 727 728 if (ar->testmode == 2) { 729 if (ar->hw.fw.utf == NULL) { 730 ath6kl_warn("testmode 2 not supported\n"); 731 return -EOPNOTSUPP; 732 } 733 734 snprintf(filename, sizeof(filename), "%s/%s", 735 ar->hw.fw.dir, ar->hw.fw.utf); 736 } else { 737 if (ar->hw.fw.tcmd == NULL) { 738 ath6kl_warn("testmode 1 not supported\n"); 739 return -EOPNOTSUPP; 740 } 741 742 snprintf(filename, sizeof(filename), "%s/%s", 743 ar->hw.fw.dir, ar->hw.fw.tcmd); 744 } 745 746 set_bit(TESTMODE, &ar->flag); 747 748 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 749 if (ret) { 750 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n", 751 ar->testmode, filename, ret); 752 return ret; 753 } 754 755 return 0; 756 } 757 758 static int ath6kl_fetch_fw_file(struct ath6kl *ar) 759 { 760 char filename[100]; 761 int ret; 762 763 if (ar->fw != NULL) 764 return 0; 765 766 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */ 767 if (WARN_ON(ar->hw.fw.fw == NULL)) 768 return -EINVAL; 769 770 snprintf(filename, sizeof(filename), "%s/%s", 771 ar->hw.fw.dir, ar->hw.fw.fw); 772 773 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 774 if (ret) { 775 ath6kl_err("Failed to get firmware file %s: %d\n", 776 filename, ret); 777 return ret; 778 } 779 780 return 0; 781 } 782 783 static int ath6kl_fetch_patch_file(struct ath6kl *ar) 784 { 785 char filename[100]; 786 int ret; 787 788 if (ar->fw_patch != NULL) 789 return 0; 790 791 if (ar->hw.fw.patch == NULL) 792 return 0; 793 794 snprintf(filename, sizeof(filename), "%s/%s", 795 ar->hw.fw.dir, ar->hw.fw.patch); 796 797 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 798 &ar->fw_patch_len); 799 if (ret) { 800 ath6kl_err("Failed to get patch file %s: %d\n", 801 filename, ret); 802 return ret; 803 } 804 805 return 0; 806 } 807 808 static int ath6kl_fetch_testscript_file(struct ath6kl *ar) 809 { 810 char filename[100]; 811 int ret; 812 813 if (ar->testmode != 2) 814 return 0; 815 816 if (ar->fw_testscript != NULL) 817 return 0; 818 819 if (ar->hw.fw.testscript == NULL) 820 return 0; 821 822 snprintf(filename, sizeof(filename), "%s/%s", 823 ar->hw.fw.dir, ar->hw.fw.testscript); 824 825 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript, 826 &ar->fw_testscript_len); 827 if (ret) { 828 ath6kl_err("Failed to get testscript file %s: %d\n", 829 filename, ret); 830 return ret; 831 } 832 833 return 0; 834 } 835 836 static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 837 { 838 int ret; 839 840 ret = ath6kl_fetch_otp_file(ar); 841 if (ret) 842 return ret; 843 844 ret = ath6kl_fetch_fw_file(ar); 845 if (ret) 846 return ret; 847 848 ret = ath6kl_fetch_patch_file(ar); 849 if (ret) 850 return ret; 851 852 ret = ath6kl_fetch_testscript_file(ar); 853 if (ret) 854 return ret; 855 856 return 0; 857 } 858 859 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name) 860 { 861 size_t magic_len, len, ie_len; 862 const struct firmware *fw; 863 struct ath6kl_fw_ie *hdr; 864 char filename[100]; 865 const u8 *data; 866 int ret, ie_id, i, index, bit; 867 __le32 *val; 868 869 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name); 870 871 ret = request_firmware(&fw, filename, ar->dev); 872 if (ret) 873 return ret; 874 875 data = fw->data; 876 len = fw->size; 877 878 /* magic also includes the null byte, check that as well */ 879 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 880 881 if (len < magic_len) { 882 ret = -EINVAL; 883 goto out; 884 } 885 886 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 887 ret = -EINVAL; 888 goto out; 889 } 890 891 len -= magic_len; 892 data += magic_len; 893 894 /* loop elements */ 895 while (len > sizeof(struct ath6kl_fw_ie)) { 896 /* hdr is unaligned! */ 897 hdr = (struct ath6kl_fw_ie *) data; 898 899 ie_id = le32_to_cpup(&hdr->id); 900 ie_len = le32_to_cpup(&hdr->len); 901 902 len -= sizeof(*hdr); 903 data += sizeof(*hdr); 904 905 if (len < ie_len) { 906 ret = -EINVAL; 907 goto out; 908 } 909 910 switch (ie_id) { 911 case ATH6KL_FW_IE_OTP_IMAGE: 912 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", 913 ie_len); 914 915 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 916 917 if (ar->fw_otp == NULL) { 918 ret = -ENOMEM; 919 goto out; 920 } 921 922 ar->fw_otp_len = ie_len; 923 break; 924 case ATH6KL_FW_IE_FW_IMAGE: 925 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", 926 ie_len); 927 928 /* in testmode we already might have a fw file */ 929 if (ar->fw != NULL) 930 break; 931 932 ar->fw = vmalloc(ie_len); 933 934 if (ar->fw == NULL) { 935 ret = -ENOMEM; 936 goto out; 937 } 938 939 memcpy(ar->fw, data, ie_len); 940 ar->fw_len = ie_len; 941 break; 942 case ATH6KL_FW_IE_PATCH_IMAGE: 943 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", 944 ie_len); 945 946 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 947 948 if (ar->fw_patch == NULL) { 949 ret = -ENOMEM; 950 goto out; 951 } 952 953 ar->fw_patch_len = ie_len; 954 break; 955 case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 956 val = (__le32 *) data; 957 ar->hw.reserved_ram_size = le32_to_cpup(val); 958 959 ath6kl_dbg(ATH6KL_DBG_BOOT, 960 "found reserved ram size ie 0x%d\n", 961 ar->hw.reserved_ram_size); 962 break; 963 case ATH6KL_FW_IE_CAPABILITIES: 964 if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8)) 965 break; 966 967 ath6kl_dbg(ATH6KL_DBG_BOOT, 968 "found firmware capabilities ie (%zd B)\n", 969 ie_len); 970 971 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 972 index = i / 8; 973 bit = i % 8; 974 975 if (data[index] & (1 << bit)) 976 __set_bit(i, ar->fw_capabilities); 977 } 978 979 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 980 ar->fw_capabilities, 981 sizeof(ar->fw_capabilities)); 982 break; 983 case ATH6KL_FW_IE_PATCH_ADDR: 984 if (ie_len != sizeof(*val)) 985 break; 986 987 val = (__le32 *) data; 988 ar->hw.dataset_patch_addr = le32_to_cpup(val); 989 990 ath6kl_dbg(ATH6KL_DBG_BOOT, 991 "found patch address ie 0x%x\n", 992 ar->hw.dataset_patch_addr); 993 break; 994 case ATH6KL_FW_IE_BOARD_ADDR: 995 if (ie_len != sizeof(*val)) 996 break; 997 998 val = (__le32 *) data; 999 ar->hw.board_addr = le32_to_cpup(val); 1000 1001 ath6kl_dbg(ATH6KL_DBG_BOOT, 1002 "found board address ie 0x%x\n", 1003 ar->hw.board_addr); 1004 break; 1005 case ATH6KL_FW_IE_VIF_MAX: 1006 if (ie_len != sizeof(*val)) 1007 break; 1008 1009 val = (__le32 *) data; 1010 ar->vif_max = min_t(unsigned int, le32_to_cpup(val), 1011 ATH6KL_VIF_MAX); 1012 1013 if (ar->vif_max > 1 && !ar->p2p) 1014 ar->max_norm_iface = 2; 1015 1016 ath6kl_dbg(ATH6KL_DBG_BOOT, 1017 "found vif max ie %d\n", ar->vif_max); 1018 break; 1019 default: 1020 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 1021 le32_to_cpup(&hdr->id)); 1022 break; 1023 } 1024 1025 len -= ie_len; 1026 data += ie_len; 1027 }; 1028 1029 ret = 0; 1030 out: 1031 release_firmware(fw); 1032 1033 return ret; 1034 } 1035 1036 int ath6kl_init_fetch_firmwares(struct ath6kl *ar) 1037 { 1038 int ret; 1039 1040 ret = ath6kl_fetch_board_file(ar); 1041 if (ret) 1042 return ret; 1043 1044 ret = ath6kl_fetch_testmode_file(ar); 1045 if (ret) 1046 return ret; 1047 1048 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE); 1049 if (ret == 0) { 1050 ar->fw_api = 3; 1051 goto out; 1052 } 1053 1054 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE); 1055 if (ret == 0) { 1056 ar->fw_api = 2; 1057 goto out; 1058 } 1059 1060 ret = ath6kl_fetch_fw_api1(ar); 1061 if (ret) 1062 return ret; 1063 1064 ar->fw_api = 1; 1065 1066 out: 1067 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1068 1069 return 0; 1070 } 1071 1072 static int ath6kl_upload_board_file(struct ath6kl *ar) 1073 { 1074 u32 board_address, board_ext_address, param; 1075 u32 board_data_size, board_ext_data_size; 1076 int ret; 1077 1078 if (WARN_ON(ar->fw_board == NULL)) 1079 return -ENOENT; 1080 1081 /* 1082 * Determine where in Target RAM to write Board Data. 1083 * For AR6004, host determine Target RAM address for 1084 * writing board data. 1085 */ 1086 if (ar->hw.board_addr != 0) { 1087 board_address = ar->hw.board_addr; 1088 ath6kl_bmi_write_hi32(ar, hi_board_data, 1089 board_address); 1090 } else { 1091 ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address); 1092 } 1093 1094 /* determine where in target ram to write extended board data */ 1095 ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address); 1096 1097 if (ar->target_type == TARGET_TYPE_AR6003 && 1098 board_ext_address == 0) { 1099 ath6kl_err("Failed to get board file target address.\n"); 1100 return -EINVAL; 1101 } 1102 1103 switch (ar->target_type) { 1104 case TARGET_TYPE_AR6003: 1105 board_data_size = AR6003_BOARD_DATA_SZ; 1106 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 1107 if (ar->fw_board_len > (board_data_size + board_ext_data_size)) 1108 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2; 1109 break; 1110 case TARGET_TYPE_AR6004: 1111 board_data_size = AR6004_BOARD_DATA_SZ; 1112 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 1113 break; 1114 default: 1115 WARN_ON(1); 1116 return -EINVAL; 1117 break; 1118 } 1119 1120 if (board_ext_address && 1121 ar->fw_board_len == (board_data_size + board_ext_data_size)) { 1122 1123 /* write extended board data */ 1124 ath6kl_dbg(ATH6KL_DBG_BOOT, 1125 "writing extended board data to 0x%x (%d B)\n", 1126 board_ext_address, board_ext_data_size); 1127 1128 ret = ath6kl_bmi_write(ar, board_ext_address, 1129 ar->fw_board + board_data_size, 1130 board_ext_data_size); 1131 if (ret) { 1132 ath6kl_err("Failed to write extended board data: %d\n", 1133 ret); 1134 return ret; 1135 } 1136 1137 /* record that extended board data is initialized */ 1138 param = (board_ext_data_size << 16) | 1; 1139 1140 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param); 1141 } 1142 1143 if (ar->fw_board_len < board_data_size) { 1144 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1145 ret = -EINVAL; 1146 return ret; 1147 } 1148 1149 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 1150 board_address, board_data_size); 1151 1152 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 1153 board_data_size); 1154 1155 if (ret) { 1156 ath6kl_err("Board file bmi write failed: %d\n", ret); 1157 return ret; 1158 } 1159 1160 /* record the fact that Board Data IS initialized */ 1161 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1); 1162 1163 return ret; 1164 } 1165 1166 static int ath6kl_upload_otp(struct ath6kl *ar) 1167 { 1168 u32 address, param; 1169 bool from_hw = false; 1170 int ret; 1171 1172 if (ar->fw_otp == NULL) 1173 return 0; 1174 1175 address = ar->hw.app_load_addr; 1176 1177 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, 1178 ar->fw_otp_len); 1179 1180 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1181 ar->fw_otp_len); 1182 if (ret) { 1183 ath6kl_err("Failed to upload OTP file: %d\n", ret); 1184 return ret; 1185 } 1186 1187 /* read firmware start address */ 1188 ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address); 1189 1190 if (ret) { 1191 ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1192 return ret; 1193 } 1194 1195 if (ar->hw.app_start_override_addr == 0) { 1196 ar->hw.app_start_override_addr = address; 1197 from_hw = true; 1198 } 1199 1200 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", 1201 from_hw ? " (from hw)" : "", 1202 ar->hw.app_start_override_addr); 1203 1204 /* execute the OTP code */ 1205 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", 1206 ar->hw.app_start_override_addr); 1207 param = 0; 1208 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); 1209 1210 return ret; 1211 } 1212 1213 static int ath6kl_upload_firmware(struct ath6kl *ar) 1214 { 1215 u32 address; 1216 int ret; 1217 1218 if (WARN_ON(ar->fw == NULL)) 1219 return 0; 1220 1221 address = ar->hw.app_load_addr; 1222 1223 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", 1224 address, ar->fw_len); 1225 1226 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1227 1228 if (ret) { 1229 ath6kl_err("Failed to write firmware: %d\n", ret); 1230 return ret; 1231 } 1232 1233 /* 1234 * Set starting address for firmware 1235 * Don't need to setup app_start override addr on AR6004 1236 */ 1237 if (ar->target_type != TARGET_TYPE_AR6004) { 1238 address = ar->hw.app_start_override_addr; 1239 ath6kl_bmi_set_app_start(ar, address); 1240 } 1241 return ret; 1242 } 1243 1244 static int ath6kl_upload_patch(struct ath6kl *ar) 1245 { 1246 u32 address; 1247 int ret; 1248 1249 if (ar->fw_patch == NULL) 1250 return 0; 1251 1252 address = ar->hw.dataset_patch_addr; 1253 1254 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", 1255 address, ar->fw_patch_len); 1256 1257 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1258 if (ret) { 1259 ath6kl_err("Failed to write patch file: %d\n", ret); 1260 return ret; 1261 } 1262 1263 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address); 1264 1265 return 0; 1266 } 1267 1268 static int ath6kl_upload_testscript(struct ath6kl *ar) 1269 { 1270 u32 address; 1271 int ret; 1272 1273 if (ar->testmode != 2) 1274 return 0; 1275 1276 if (ar->fw_testscript == NULL) 1277 return 0; 1278 1279 address = ar->hw.testscript_addr; 1280 1281 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n", 1282 address, ar->fw_testscript_len); 1283 1284 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript, 1285 ar->fw_testscript_len); 1286 if (ret) { 1287 ath6kl_err("Failed to write testscript file: %d\n", ret); 1288 return ret; 1289 } 1290 1291 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address); 1292 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096); 1293 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1); 1294 1295 return 0; 1296 } 1297 1298 static int ath6kl_init_upload(struct ath6kl *ar) 1299 { 1300 u32 param, options, sleep, address; 1301 int status = 0; 1302 1303 if (ar->target_type != TARGET_TYPE_AR6003 && 1304 ar->target_type != TARGET_TYPE_AR6004) 1305 return -EINVAL; 1306 1307 /* temporarily disable system sleep */ 1308 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1309 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1310 if (status) 1311 return status; 1312 1313 options = param; 1314 1315 param |= ATH6KL_OPTION_SLEEP_DISABLE; 1316 status = ath6kl_bmi_reg_write(ar, address, param); 1317 if (status) 1318 return status; 1319 1320 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1321 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1322 if (status) 1323 return status; 1324 1325 sleep = param; 1326 1327 param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1328 status = ath6kl_bmi_reg_write(ar, address, param); 1329 if (status) 1330 return status; 1331 1332 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1333 options, sleep); 1334 1335 /* program analog PLL register */ 1336 /* no need to control 40/44MHz clock on AR6004 */ 1337 if (ar->target_type != TARGET_TYPE_AR6004) { 1338 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1339 0xF9104001); 1340 1341 if (status) 1342 return status; 1343 1344 /* Run at 80/88MHz by default */ 1345 param = SM(CPU_CLOCK_STANDARD, 1); 1346 1347 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1348 status = ath6kl_bmi_reg_write(ar, address, param); 1349 if (status) 1350 return status; 1351 } 1352 1353 param = 0; 1354 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1355 param = SM(LPO_CAL_ENABLE, 1); 1356 status = ath6kl_bmi_reg_write(ar, address, param); 1357 if (status) 1358 return status; 1359 1360 /* WAR to avoid SDIO CRC err */ 1361 if (ar->version.target_ver == AR6003_HW_2_0_VERSION || 1362 ar->version.target_ver == AR6003_HW_2_1_1_VERSION) { 1363 ath6kl_err("temporary war to avoid sdio crc error\n"); 1364 1365 param = 0x20; 1366 1367 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1368 status = ath6kl_bmi_reg_write(ar, address, param); 1369 if (status) 1370 return status; 1371 1372 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1373 status = ath6kl_bmi_reg_write(ar, address, param); 1374 if (status) 1375 return status; 1376 1377 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1378 status = ath6kl_bmi_reg_write(ar, address, param); 1379 if (status) 1380 return status; 1381 1382 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1383 status = ath6kl_bmi_reg_write(ar, address, param); 1384 if (status) 1385 return status; 1386 } 1387 1388 /* write EEPROM data to Target RAM */ 1389 status = ath6kl_upload_board_file(ar); 1390 if (status) 1391 return status; 1392 1393 /* transfer One time Programmable data */ 1394 status = ath6kl_upload_otp(ar); 1395 if (status) 1396 return status; 1397 1398 /* Download Target firmware */ 1399 status = ath6kl_upload_firmware(ar); 1400 if (status) 1401 return status; 1402 1403 status = ath6kl_upload_patch(ar); 1404 if (status) 1405 return status; 1406 1407 /* Download the test script */ 1408 status = ath6kl_upload_testscript(ar); 1409 if (status) 1410 return status; 1411 1412 /* Restore system sleep */ 1413 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1414 status = ath6kl_bmi_reg_write(ar, address, sleep); 1415 if (status) 1416 return status; 1417 1418 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1419 param = options | 0x20; 1420 status = ath6kl_bmi_reg_write(ar, address, param); 1421 if (status) 1422 return status; 1423 1424 return status; 1425 } 1426 1427 int ath6kl_init_hw_params(struct ath6kl *ar) 1428 { 1429 const struct ath6kl_hw *uninitialized_var(hw); 1430 int i; 1431 1432 for (i = 0; i < ARRAY_SIZE(hw_list); i++) { 1433 hw = &hw_list[i]; 1434 1435 if (hw->id == ar->version.target_ver) 1436 break; 1437 } 1438 1439 if (i == ARRAY_SIZE(hw_list)) { 1440 ath6kl_err("Unsupported hardware version: 0x%x\n", 1441 ar->version.target_ver); 1442 return -EINVAL; 1443 } 1444 1445 ar->hw = *hw; 1446 1447 ath6kl_dbg(ATH6KL_DBG_BOOT, 1448 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 1449 ar->version.target_ver, ar->target_type, 1450 ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 1451 ath6kl_dbg(ATH6KL_DBG_BOOT, 1452 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 1453 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 1454 ar->hw.reserved_ram_size); 1455 ath6kl_dbg(ATH6KL_DBG_BOOT, 1456 "refclk_hz %d uarttx_pin %d", 1457 ar->hw.refclk_hz, ar->hw.uarttx_pin); 1458 1459 return 0; 1460 } 1461 1462 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type) 1463 { 1464 switch (type) { 1465 case ATH6KL_HIF_TYPE_SDIO: 1466 return "sdio"; 1467 case ATH6KL_HIF_TYPE_USB: 1468 return "usb"; 1469 } 1470 1471 return NULL; 1472 } 1473 1474 int ath6kl_init_hw_start(struct ath6kl *ar) 1475 { 1476 long timeleft; 1477 int ret, i; 1478 1479 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); 1480 1481 ret = ath6kl_hif_power_on(ar); 1482 if (ret) 1483 return ret; 1484 1485 ret = ath6kl_configure_target(ar); 1486 if (ret) 1487 goto err_power_off; 1488 1489 ret = ath6kl_init_upload(ar); 1490 if (ret) 1491 goto err_power_off; 1492 1493 /* Do we need to finish the BMI phase */ 1494 /* FIXME: return error from ath6kl_bmi_done() */ 1495 if (ath6kl_bmi_done(ar)) { 1496 ret = -EIO; 1497 goto err_power_off; 1498 } 1499 1500 /* 1501 * The reason we have to wait for the target here is that the 1502 * driver layer has to init BMI in order to set the host block 1503 * size. 1504 */ 1505 if (ath6kl_htc_wait_target(ar->htc_target)) { 1506 ret = -EIO; 1507 goto err_power_off; 1508 } 1509 1510 if (ath6kl_init_service_ep(ar)) { 1511 ret = -EIO; 1512 goto err_cleanup_scatter; 1513 } 1514 1515 /* setup credit distribution */ 1516 ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info); 1517 1518 /* start HTC */ 1519 ret = ath6kl_htc_start(ar->htc_target); 1520 if (ret) { 1521 /* FIXME: call this */ 1522 ath6kl_cookie_cleanup(ar); 1523 goto err_cleanup_scatter; 1524 } 1525 1526 /* Wait for Wmi event to be ready */ 1527 timeleft = wait_event_interruptible_timeout(ar->event_wq, 1528 test_bit(WMI_READY, 1529 &ar->flag), 1530 WMI_TIMEOUT); 1531 1532 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 1533 1534 1535 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) { 1536 ath6kl_info("%s %s fw %s api %d%s\n", 1537 ar->hw.name, 1538 ath6kl_init_get_hif_name(ar->hif_type), 1539 ar->wiphy->fw_version, 1540 ar->fw_api, 1541 test_bit(TESTMODE, &ar->flag) ? " testmode" : ""); 1542 } 1543 1544 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 1545 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 1546 ATH6KL_ABI_VERSION, ar->version.abi_ver); 1547 ret = -EIO; 1548 goto err_htc_stop; 1549 } 1550 1551 if (!timeleft || signal_pending(current)) { 1552 ath6kl_err("wmi is not ready or wait was interrupted\n"); 1553 ret = -EIO; 1554 goto err_htc_stop; 1555 } 1556 1557 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 1558 1559 /* communicate the wmi protocol verision to the target */ 1560 /* FIXME: return error */ 1561 if ((ath6kl_set_host_app_area(ar)) != 0) 1562 ath6kl_err("unable to set the host app area\n"); 1563 1564 for (i = 0; i < ar->vif_max; i++) { 1565 ret = ath6kl_target_config_wlan_params(ar, i); 1566 if (ret) 1567 goto err_htc_stop; 1568 } 1569 1570 ar->state = ATH6KL_STATE_ON; 1571 1572 return 0; 1573 1574 err_htc_stop: 1575 ath6kl_htc_stop(ar->htc_target); 1576 err_cleanup_scatter: 1577 ath6kl_hif_cleanup_scatter(ar); 1578 err_power_off: 1579 ath6kl_hif_power_off(ar); 1580 1581 return ret; 1582 } 1583 1584 int ath6kl_init_hw_stop(struct ath6kl *ar) 1585 { 1586 int ret; 1587 1588 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); 1589 1590 ath6kl_htc_stop(ar->htc_target); 1591 1592 ath6kl_hif_stop(ar); 1593 1594 ath6kl_bmi_reset(ar); 1595 1596 ret = ath6kl_hif_power_off(ar); 1597 if (ret) 1598 ath6kl_warn("failed to power off hif: %d\n", ret); 1599 1600 ar->state = ATH6KL_STATE_OFF; 1601 1602 return 0; 1603 } 1604 1605 /* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */ 1606 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) 1607 { 1608 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 1609 bool discon_issued; 1610 1611 netif_stop_queue(vif->ndev); 1612 1613 clear_bit(WLAN_ENABLED, &vif->flags); 1614 1615 if (wmi_ready) { 1616 discon_issued = test_bit(CONNECTED, &vif->flags) || 1617 test_bit(CONNECT_PEND, &vif->flags); 1618 ath6kl_disconnect(vif); 1619 del_timer(&vif->disconnect_timer); 1620 1621 if (discon_issued) 1622 ath6kl_disconnect_event(vif, DISCONNECT_CMD, 1623 (vif->nw_type & AP_NETWORK) ? 1624 bcast_mac : vif->bssid, 1625 0, NULL, 0); 1626 } 1627 1628 if (vif->scan_req) { 1629 cfg80211_scan_done(vif->scan_req, true); 1630 vif->scan_req = NULL; 1631 } 1632 } 1633 1634 void ath6kl_stop_txrx(struct ath6kl *ar) 1635 { 1636 struct ath6kl_vif *vif, *tmp_vif; 1637 int i; 1638 1639 set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1640 1641 if (down_interruptible(&ar->sem)) { 1642 ath6kl_err("down_interruptible failed\n"); 1643 return; 1644 } 1645 1646 for (i = 0; i < AP_MAX_NUM_STA; i++) 1647 aggr_reset_state(ar->sta_list[i].aggr_conn); 1648 1649 spin_lock_bh(&ar->list_lock); 1650 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { 1651 list_del(&vif->list); 1652 spin_unlock_bh(&ar->list_lock); 1653 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); 1654 rtnl_lock(); 1655 ath6kl_cfg80211_vif_cleanup(vif); 1656 rtnl_unlock(); 1657 spin_lock_bh(&ar->list_lock); 1658 } 1659 spin_unlock_bh(&ar->list_lock); 1660 1661 clear_bit(WMI_READY, &ar->flag); 1662 1663 /* 1664 * After wmi_shudown all WMI events will be dropped. We 1665 * need to cleanup the buffers allocated in AP mode and 1666 * give disconnect notification to stack, which usually 1667 * happens in the disconnect_event. Simulate the disconnect 1668 * event by calling the function directly. Sometimes 1669 * disconnect_event will be received when the debug logs 1670 * are collected. 1671 */ 1672 ath6kl_wmi_shutdown(ar->wmi); 1673 1674 clear_bit(WMI_ENABLED, &ar->flag); 1675 if (ar->htc_target) { 1676 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); 1677 ath6kl_htc_stop(ar->htc_target); 1678 } 1679 1680 /* 1681 * Try to reset the device if we can. The driver may have been 1682 * configure NOT to reset the target during a debug session. 1683 */ 1684 ath6kl_dbg(ATH6KL_DBG_TRC, 1685 "attempting to reset target on instance destroy\n"); 1686 ath6kl_reset_device(ar, ar->target_type, true, true); 1687 1688 clear_bit(WLAN_ENABLED, &ar->flag); 1689 1690 up(&ar->sem); 1691 } 1692 EXPORT_SYMBOL(ath6kl_stop_txrx); 1693