1 2 /* 3 * Copyright (c) 2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <linux/moduleparam.h> 20 #include <linux/errno.h> 21 #include <linux/export.h> 22 #include <linux/of.h> 23 #include <linux/mmc/sdio_func.h> 24 25 #include "core.h" 26 #include "cfg80211.h" 27 #include "target.h" 28 #include "debug.h" 29 #include "hif-ops.h" 30 31 static const struct ath6kl_hw hw_list[] = { 32 { 33 .id = AR6003_HW_2_0_VERSION, 34 .name = "ar6003 hw 2.0", 35 .dataset_patch_addr = 0x57e884, 36 .app_load_addr = 0x543180, 37 .board_ext_data_addr = 0x57e500, 38 .reserved_ram_size = 6912, 39 .refclk_hz = 26000000, 40 .uarttx_pin = 8, 41 42 /* hw2.0 needs override address hardcoded */ 43 .app_start_override_addr = 0x944C00, 44 45 .fw = { 46 .dir = AR6003_HW_2_0_FW_DIR, 47 .otp = AR6003_HW_2_0_OTP_FILE, 48 .fw = AR6003_HW_2_0_FIRMWARE_FILE, 49 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE, 50 .patch = AR6003_HW_2_0_PATCH_FILE, 51 }, 52 53 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE, 54 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE, 55 }, 56 { 57 .id = AR6003_HW_2_1_1_VERSION, 58 .name = "ar6003 hw 2.1.1", 59 .dataset_patch_addr = 0x57ff74, 60 .app_load_addr = 0x1234, 61 .board_ext_data_addr = 0x542330, 62 .reserved_ram_size = 512, 63 .refclk_hz = 26000000, 64 .uarttx_pin = 8, 65 .testscript_addr = 0x57ef74, 66 67 .fw = { 68 .dir = AR6003_HW_2_1_1_FW_DIR, 69 .otp = AR6003_HW_2_1_1_OTP_FILE, 70 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE, 71 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE, 72 .patch = AR6003_HW_2_1_1_PATCH_FILE, 73 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE, 74 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE, 75 }, 76 77 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE, 78 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE, 79 }, 80 { 81 .id = AR6004_HW_1_0_VERSION, 82 .name = "ar6004 hw 1.0", 83 .dataset_patch_addr = 0x57e884, 84 .app_load_addr = 0x1234, 85 .board_ext_data_addr = 0x437000, 86 .reserved_ram_size = 19456, 87 .board_addr = 0x433900, 88 .refclk_hz = 26000000, 89 .uarttx_pin = 11, 90 91 .fw = { 92 .dir = AR6004_HW_1_0_FW_DIR, 93 .fw = AR6004_HW_1_0_FIRMWARE_FILE, 94 }, 95 96 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE, 97 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE, 98 }, 99 { 100 .id = AR6004_HW_1_1_VERSION, 101 .name = "ar6004 hw 1.1", 102 .dataset_patch_addr = 0x57e884, 103 .app_load_addr = 0x1234, 104 .board_ext_data_addr = 0x437000, 105 .reserved_ram_size = 11264, 106 .board_addr = 0x43d400, 107 .refclk_hz = 40000000, 108 .uarttx_pin = 11, 109 110 .fw = { 111 .dir = AR6004_HW_1_1_FW_DIR, 112 .fw = AR6004_HW_1_1_FIRMWARE_FILE, 113 }, 114 115 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, 116 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, 117 }, 118 }; 119 120 /* 121 * Include definitions here that can be used to tune the WLAN module 122 * behavior. Different customers can tune the behavior as per their needs, 123 * here. 124 */ 125 126 /* 127 * This configuration item enable/disable keepalive support. 128 * Keepalive support: In the absence of any data traffic to AP, null 129 * frames will be sent to the AP at periodic interval, to keep the association 130 * active. This configuration item defines the periodic interval. 131 * Use value of zero to disable keepalive support 132 * Default: 60 seconds 133 */ 134 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 135 136 /* 137 * This configuration item sets the value of disconnect timeout 138 * Firmware delays sending the disconnec event to the host for this 139 * timeout after is gets disconnected from the current AP. 140 * If the firmware successly roams within the disconnect timeout 141 * it sends a new connect event 142 */ 143 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 144 145 146 #define ATH6KL_DATA_OFFSET 64 147 struct sk_buff *ath6kl_buf_alloc(int size) 148 { 149 struct sk_buff *skb; 150 u16 reserved; 151 152 /* Add chacheline space at front and back of buffer */ 153 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 154 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; 155 skb = dev_alloc_skb(size + reserved); 156 157 if (skb) 158 skb_reserve(skb, reserved - L1_CACHE_BYTES); 159 return skb; 160 } 161 162 void ath6kl_init_profile_info(struct ath6kl_vif *vif) 163 { 164 vif->ssid_len = 0; 165 memset(vif->ssid, 0, sizeof(vif->ssid)); 166 167 vif->dot11_auth_mode = OPEN_AUTH; 168 vif->auth_mode = NONE_AUTH; 169 vif->prwise_crypto = NONE_CRYPT; 170 vif->prwise_crypto_len = 0; 171 vif->grp_crypto = NONE_CRYPT; 172 vif->grp_crypto_len = 0; 173 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 174 memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); 175 memset(vif->bssid, 0, sizeof(vif->bssid)); 176 vif->bss_ch = 0; 177 } 178 179 static int ath6kl_set_host_app_area(struct ath6kl *ar) 180 { 181 u32 address, data; 182 struct host_app_area host_app_area; 183 184 /* Fetch the address of the host_app_area_s 185 * instance in the host interest area */ 186 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 187 address = TARG_VTOP(ar->target_type, address); 188 189 if (ath6kl_diag_read32(ar, address, &data)) 190 return -EIO; 191 192 address = TARG_VTOP(ar->target_type, data); 193 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); 194 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 195 sizeof(struct host_app_area))) 196 return -EIO; 197 198 return 0; 199 } 200 201 static inline void set_ac2_ep_map(struct ath6kl *ar, 202 u8 ac, 203 enum htc_endpoint_id ep) 204 { 205 ar->ac2ep_map[ac] = ep; 206 ar->ep2ac_map[ep] = ac; 207 } 208 209 /* connect to a service */ 210 static int ath6kl_connectservice(struct ath6kl *ar, 211 struct htc_service_connect_req *con_req, 212 char *desc) 213 { 214 int status; 215 struct htc_service_connect_resp response; 216 217 memset(&response, 0, sizeof(response)); 218 219 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 220 if (status) { 221 ath6kl_err("failed to connect to %s service status:%d\n", 222 desc, status); 223 return status; 224 } 225 226 switch (con_req->svc_id) { 227 case WMI_CONTROL_SVC: 228 if (test_bit(WMI_ENABLED, &ar->flag)) 229 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 230 ar->ctrl_ep = response.endpoint; 231 break; 232 case WMI_DATA_BE_SVC: 233 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 234 break; 235 case WMI_DATA_BK_SVC: 236 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 237 break; 238 case WMI_DATA_VI_SVC: 239 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 240 break; 241 case WMI_DATA_VO_SVC: 242 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 243 break; 244 default: 245 ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 246 return -EINVAL; 247 } 248 249 return 0; 250 } 251 252 static int ath6kl_init_service_ep(struct ath6kl *ar) 253 { 254 struct htc_service_connect_req connect; 255 256 memset(&connect, 0, sizeof(connect)); 257 258 /* these fields are the same for all service endpoints */ 259 connect.ep_cb.rx = ath6kl_rx; 260 connect.ep_cb.rx_refill = ath6kl_rx_refill; 261 connect.ep_cb.tx_full = ath6kl_tx_queue_full; 262 263 /* 264 * Set the max queue depth so that our ath6kl_tx_queue_full handler 265 * gets called. 266 */ 267 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 268 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 269 if (!connect.ep_cb.rx_refill_thresh) 270 connect.ep_cb.rx_refill_thresh++; 271 272 /* connect to control service */ 273 connect.svc_id = WMI_CONTROL_SVC; 274 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 275 return -EIO; 276 277 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 278 279 /* 280 * Limit the HTC message size on the send path, although e can 281 * receive A-MSDU frames of 4K, we will only send ethernet-sized 282 * (802.3) frames on the send path. 283 */ 284 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 285 286 /* 287 * To reduce the amount of committed memory for larger A_MSDU 288 * frames, use the recv-alloc threshold mechanism for larger 289 * packets. 290 */ 291 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 292 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 293 294 /* 295 * For the remaining data services set the connection flag to 296 * reduce dribbling, if configured to do so. 297 */ 298 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 299 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 300 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 301 302 connect.svc_id = WMI_DATA_BE_SVC; 303 304 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 305 return -EIO; 306 307 /* connect to back-ground map this to WMI LOW_PRI */ 308 connect.svc_id = WMI_DATA_BK_SVC; 309 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 310 return -EIO; 311 312 /* connect to Video service, map this to to HI PRI */ 313 connect.svc_id = WMI_DATA_VI_SVC; 314 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 315 return -EIO; 316 317 /* 318 * Connect to VO service, this is currently not mapped to a WMI 319 * priority stream due to historical reasons. WMI originally 320 * defined 3 priorities over 3 mailboxes We can change this when 321 * WMI is reworked so that priorities are not dependent on 322 * mailboxes. 323 */ 324 connect.svc_id = WMI_DATA_VO_SVC; 325 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 326 return -EIO; 327 328 return 0; 329 } 330 331 void ath6kl_init_control_info(struct ath6kl_vif *vif) 332 { 333 ath6kl_init_profile_info(vif); 334 vif->def_txkey_index = 0; 335 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 336 vif->ch_hint = 0; 337 } 338 339 /* 340 * Set HTC/Mbox operational parameters, this can only be called when the 341 * target is in the BMI phase. 342 */ 343 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 344 u8 htc_ctrl_buf) 345 { 346 int status; 347 u32 blk_size; 348 349 blk_size = ar->mbox_info.block_size; 350 351 if (htc_ctrl_buf) 352 blk_size |= ((u32)htc_ctrl_buf) << 16; 353 354 /* set the host interest area for the block size */ 355 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size); 356 if (status) { 357 ath6kl_err("bmi_write_memory for IO block size failed\n"); 358 goto out; 359 } 360 361 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 362 blk_size, 363 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 364 365 if (mbox_isr_yield_val) { 366 /* set the host interest area for the mbox ISR yield limit */ 367 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit, 368 mbox_isr_yield_val); 369 if (status) { 370 ath6kl_err("bmi_write_memory for yield limit failed\n"); 371 goto out; 372 } 373 } 374 375 out: 376 return status; 377 } 378 379 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) 380 { 381 int ret; 382 383 /* 384 * Configure the device for rx dot11 header rules. "0,0" are the 385 * default values. Required if checksum offload is needed. Set 386 * RxMetaVersion to 2. 387 */ 388 ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, 389 ar->rx_meta_ver, 0, 0); 390 if (ret) { 391 ath6kl_err("unable to set the rx frame format: %d\n", ret); 392 return ret; 393 } 394 395 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) { 396 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, 397 IGNORE_PS_FAIL_DURING_SCAN); 398 if (ret) { 399 ath6kl_err("unable to set power save fail event policy: %d\n", 400 ret); 401 return ret; 402 } 403 } 404 405 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) { 406 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, 407 WMI_FOLLOW_BARKER_IN_ERP); 408 if (ret) { 409 ath6kl_err("unable to set barker preamble policy: %d\n", 410 ret); 411 return ret; 412 } 413 } 414 415 ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, 416 WLAN_CONFIG_KEEP_ALIVE_INTERVAL); 417 if (ret) { 418 ath6kl_err("unable to set keep alive interval: %d\n", ret); 419 return ret; 420 } 421 422 ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, 423 WLAN_CONFIG_DISCONNECT_TIMEOUT); 424 if (ret) { 425 ath6kl_err("unable to set disconnect timeout: %d\n", ret); 426 return ret; 427 } 428 429 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) { 430 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED); 431 if (ret) { 432 ath6kl_err("unable to set txop bursting: %d\n", ret); 433 return ret; 434 } 435 } 436 437 if (ar->p2p && (ar->vif_max == 1 || idx)) { 438 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, 439 P2P_FLAG_CAPABILITIES_REQ | 440 P2P_FLAG_MACADDR_REQ | 441 P2P_FLAG_HMODEL_REQ); 442 if (ret) { 443 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " 444 "capabilities (%d) - assuming P2P not " 445 "supported\n", ret); 446 ar->p2p = false; 447 } 448 } 449 450 if (ar->p2p && (ar->vif_max == 1 || idx)) { 451 /* Enable Probe Request reporting for P2P */ 452 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 453 if (ret) { 454 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " 455 "Request reporting (%d)\n", ret); 456 } 457 } 458 459 return ret; 460 } 461 462 int ath6kl_configure_target(struct ath6kl *ar) 463 { 464 u32 param, ram_reserved_size; 465 u8 fw_iftype, fw_mode = 0, fw_submode = 0; 466 int i, status; 467 468 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG); 469 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) { 470 ath6kl_err("bmi_write_memory for uart debug failed\n"); 471 return -EIO; 472 } 473 474 /* 475 * Note: Even though the firmware interface type is 476 * chosen as BSS_STA for all three interfaces, can 477 * be configured to IBSS/AP as long as the fw submode 478 * remains normal mode (0 - AP, STA and IBSS). But 479 * due to an target assert in firmware only one interface is 480 * configured for now. 481 */ 482 fw_iftype = HI_OPTION_FW_MODE_BSS_STA; 483 484 for (i = 0; i < ar->vif_max; i++) 485 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); 486 487 /* 488 * By default, submodes : 489 * vif[0] - AP/STA/IBSS 490 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" 491 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" 492 */ 493 494 for (i = 0; i < ar->max_norm_iface; i++) 495 fw_submode |= HI_OPTION_FW_SUBMODE_NONE << 496 (i * HI_OPTION_FW_SUBMODE_BITS); 497 498 for (i = ar->max_norm_iface; i < ar->vif_max; i++) 499 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 500 (i * HI_OPTION_FW_SUBMODE_BITS); 501 502 if (ar->p2p && ar->vif_max == 1) 503 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; 504 505 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest, 506 HTC_PROTOCOL_VERSION) != 0) { 507 ath6kl_err("bmi_write_memory for htc version failed\n"); 508 return -EIO; 509 } 510 511 /* set the firmware mode to STA/IBSS/AP */ 512 param = 0; 513 514 if (ath6kl_bmi_read_hi32(ar, hi_option_flag, ¶m) != 0) { 515 ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 516 return -EIO; 517 } 518 519 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT); 520 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; 521 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; 522 523 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 524 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 525 526 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) { 527 ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 528 return -EIO; 529 } 530 531 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 532 533 /* 534 * Hardcode the address use for the extended board data 535 * Ideally this should be pre-allocate by the OS at boot time 536 * But since it is a new feature and board data is loaded 537 * at init time, we have to workaround this from host. 538 * It is difficult to patch the firmware boot code, 539 * but possible in theory. 540 */ 541 542 param = ar->hw.board_ext_data_addr; 543 ram_reserved_size = ar->hw.reserved_ram_size; 544 545 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) { 546 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 547 return -EIO; 548 } 549 550 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 551 ram_reserved_size) != 0) { 552 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 553 return -EIO; 554 } 555 556 /* set the block size for the target */ 557 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 558 /* use default number of control buffers */ 559 return -EIO; 560 561 /* Configure GPIO AR600x UART */ 562 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin, 563 ar->hw.uarttx_pin); 564 if (status) 565 return status; 566 567 /* Configure target refclk_hz */ 568 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz); 569 if (status) 570 return status; 571 572 return 0; 573 } 574 575 /* firmware upload */ 576 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 577 u8 **fw, size_t *fw_len) 578 { 579 const struct firmware *fw_entry; 580 int ret; 581 582 ret = request_firmware(&fw_entry, filename, ar->dev); 583 if (ret) 584 return ret; 585 586 *fw_len = fw_entry->size; 587 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 588 589 if (*fw == NULL) 590 ret = -ENOMEM; 591 592 release_firmware(fw_entry); 593 594 return ret; 595 } 596 597 #ifdef CONFIG_OF 598 /* 599 * Check the device tree for a board-id and use it to construct 600 * the pathname to the firmware file. Used (for now) to find a 601 * fallback to the "bdata.bin" file--typically a symlink to the 602 * appropriate board-specific file. 603 */ 604 static bool check_device_tree(struct ath6kl *ar) 605 { 606 static const char *board_id_prop = "atheros,board-id"; 607 struct device_node *node; 608 char board_filename[64]; 609 const char *board_id; 610 int ret; 611 612 for_each_compatible_node(node, NULL, "atheros,ath6kl") { 613 board_id = of_get_property(node, board_id_prop, NULL); 614 if (board_id == NULL) { 615 ath6kl_warn("No \"%s\" property on %s node.\n", 616 board_id_prop, node->name); 617 continue; 618 } 619 snprintf(board_filename, sizeof(board_filename), 620 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id); 621 622 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 623 &ar->fw_board_len); 624 if (ret) { 625 ath6kl_err("Failed to get DT board file %s: %d\n", 626 board_filename, ret); 627 continue; 628 } 629 return true; 630 } 631 return false; 632 } 633 #else 634 static bool check_device_tree(struct ath6kl *ar) 635 { 636 return false; 637 } 638 #endif /* CONFIG_OF */ 639 640 static int ath6kl_fetch_board_file(struct ath6kl *ar) 641 { 642 const char *filename; 643 int ret; 644 645 if (ar->fw_board != NULL) 646 return 0; 647 648 if (WARN_ON(ar->hw.fw_board == NULL)) 649 return -EINVAL; 650 651 filename = ar->hw.fw_board; 652 653 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 654 &ar->fw_board_len); 655 if (ret == 0) { 656 /* managed to get proper board file */ 657 return 0; 658 } 659 660 if (check_device_tree(ar)) { 661 /* got board file from device tree */ 662 return 0; 663 } 664 665 /* there was no proper board file, try to use default instead */ 666 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 667 filename, ret); 668 669 filename = ar->hw.fw_default_board; 670 671 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 672 &ar->fw_board_len); 673 if (ret) { 674 ath6kl_err("Failed to get default board file %s: %d\n", 675 filename, ret); 676 return ret; 677 } 678 679 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 680 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 681 682 return 0; 683 } 684 685 static int ath6kl_fetch_otp_file(struct ath6kl *ar) 686 { 687 char filename[100]; 688 int ret; 689 690 if (ar->fw_otp != NULL) 691 return 0; 692 693 if (ar->hw.fw.otp == NULL) { 694 ath6kl_dbg(ATH6KL_DBG_BOOT, 695 "no OTP file configured for this hw\n"); 696 return 0; 697 } 698 699 snprintf(filename, sizeof(filename), "%s/%s", 700 ar->hw.fw.dir, ar->hw.fw.otp); 701 702 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 703 &ar->fw_otp_len); 704 if (ret) { 705 ath6kl_err("Failed to get OTP file %s: %d\n", 706 filename, ret); 707 return ret; 708 } 709 710 return 0; 711 } 712 713 static int ath6kl_fetch_testmode_file(struct ath6kl *ar) 714 { 715 char filename[100]; 716 int ret; 717 718 if (ar->testmode == 0) 719 return 0; 720 721 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode); 722 723 if (ar->testmode == 2) { 724 if (ar->hw.fw.utf == NULL) { 725 ath6kl_warn("testmode 2 not supported\n"); 726 return -EOPNOTSUPP; 727 } 728 729 snprintf(filename, sizeof(filename), "%s/%s", 730 ar->hw.fw.dir, ar->hw.fw.utf); 731 } else { 732 if (ar->hw.fw.tcmd == NULL) { 733 ath6kl_warn("testmode 1 not supported\n"); 734 return -EOPNOTSUPP; 735 } 736 737 snprintf(filename, sizeof(filename), "%s/%s", 738 ar->hw.fw.dir, ar->hw.fw.tcmd); 739 } 740 741 set_bit(TESTMODE, &ar->flag); 742 743 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 744 if (ret) { 745 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n", 746 ar->testmode, filename, ret); 747 return ret; 748 } 749 750 return 0; 751 } 752 753 static int ath6kl_fetch_fw_file(struct ath6kl *ar) 754 { 755 char filename[100]; 756 int ret; 757 758 if (ar->fw != NULL) 759 return 0; 760 761 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */ 762 if (WARN_ON(ar->hw.fw.fw == NULL)) 763 return -EINVAL; 764 765 snprintf(filename, sizeof(filename), "%s/%s", 766 ar->hw.fw.dir, ar->hw.fw.fw); 767 768 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 769 if (ret) { 770 ath6kl_err("Failed to get firmware file %s: %d\n", 771 filename, ret); 772 return ret; 773 } 774 775 return 0; 776 } 777 778 static int ath6kl_fetch_patch_file(struct ath6kl *ar) 779 { 780 char filename[100]; 781 int ret; 782 783 if (ar->fw_patch != NULL) 784 return 0; 785 786 if (ar->hw.fw.patch == NULL) 787 return 0; 788 789 snprintf(filename, sizeof(filename), "%s/%s", 790 ar->hw.fw.dir, ar->hw.fw.patch); 791 792 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 793 &ar->fw_patch_len); 794 if (ret) { 795 ath6kl_err("Failed to get patch file %s: %d\n", 796 filename, ret); 797 return ret; 798 } 799 800 return 0; 801 } 802 803 static int ath6kl_fetch_testscript_file(struct ath6kl *ar) 804 { 805 char filename[100]; 806 int ret; 807 808 if (ar->testmode != 2) 809 return 0; 810 811 if (ar->fw_testscript != NULL) 812 return 0; 813 814 if (ar->hw.fw.testscript == NULL) 815 return 0; 816 817 snprintf(filename, sizeof(filename), "%s/%s", 818 ar->hw.fw.dir, ar->hw.fw.testscript); 819 820 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript, 821 &ar->fw_testscript_len); 822 if (ret) { 823 ath6kl_err("Failed to get testscript file %s: %d\n", 824 filename, ret); 825 return ret; 826 } 827 828 return 0; 829 } 830 831 static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 832 { 833 int ret; 834 835 ret = ath6kl_fetch_otp_file(ar); 836 if (ret) 837 return ret; 838 839 ret = ath6kl_fetch_fw_file(ar); 840 if (ret) 841 return ret; 842 843 ret = ath6kl_fetch_patch_file(ar); 844 if (ret) 845 return ret; 846 847 ret = ath6kl_fetch_testscript_file(ar); 848 if (ret) 849 return ret; 850 851 return 0; 852 } 853 854 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name) 855 { 856 size_t magic_len, len, ie_len; 857 const struct firmware *fw; 858 struct ath6kl_fw_ie *hdr; 859 char filename[100]; 860 const u8 *data; 861 int ret, ie_id, i, index, bit; 862 __le32 *val; 863 864 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name); 865 866 ret = request_firmware(&fw, filename, ar->dev); 867 if (ret) 868 return ret; 869 870 data = fw->data; 871 len = fw->size; 872 873 /* magic also includes the null byte, check that as well */ 874 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 875 876 if (len < magic_len) { 877 ret = -EINVAL; 878 goto out; 879 } 880 881 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 882 ret = -EINVAL; 883 goto out; 884 } 885 886 len -= magic_len; 887 data += magic_len; 888 889 /* loop elements */ 890 while (len > sizeof(struct ath6kl_fw_ie)) { 891 /* hdr is unaligned! */ 892 hdr = (struct ath6kl_fw_ie *) data; 893 894 ie_id = le32_to_cpup(&hdr->id); 895 ie_len = le32_to_cpup(&hdr->len); 896 897 len -= sizeof(*hdr); 898 data += sizeof(*hdr); 899 900 if (len < ie_len) { 901 ret = -EINVAL; 902 goto out; 903 } 904 905 switch (ie_id) { 906 case ATH6KL_FW_IE_OTP_IMAGE: 907 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", 908 ie_len); 909 910 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 911 912 if (ar->fw_otp == NULL) { 913 ret = -ENOMEM; 914 goto out; 915 } 916 917 ar->fw_otp_len = ie_len; 918 break; 919 case ATH6KL_FW_IE_FW_IMAGE: 920 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", 921 ie_len); 922 923 /* in testmode we already might have a fw file */ 924 if (ar->fw != NULL) 925 break; 926 927 ar->fw = kmemdup(data, ie_len, GFP_KERNEL); 928 929 if (ar->fw == NULL) { 930 ret = -ENOMEM; 931 goto out; 932 } 933 934 ar->fw_len = ie_len; 935 break; 936 case ATH6KL_FW_IE_PATCH_IMAGE: 937 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", 938 ie_len); 939 940 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 941 942 if (ar->fw_patch == NULL) { 943 ret = -ENOMEM; 944 goto out; 945 } 946 947 ar->fw_patch_len = ie_len; 948 break; 949 case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 950 val = (__le32 *) data; 951 ar->hw.reserved_ram_size = le32_to_cpup(val); 952 953 ath6kl_dbg(ATH6KL_DBG_BOOT, 954 "found reserved ram size ie 0x%d\n", 955 ar->hw.reserved_ram_size); 956 break; 957 case ATH6KL_FW_IE_CAPABILITIES: 958 if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8)) 959 break; 960 961 ath6kl_dbg(ATH6KL_DBG_BOOT, 962 "found firmware capabilities ie (%zd B)\n", 963 ie_len); 964 965 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 966 index = i / 8; 967 bit = i % 8; 968 969 if (data[index] & (1 << bit)) 970 __set_bit(i, ar->fw_capabilities); 971 } 972 973 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 974 ar->fw_capabilities, 975 sizeof(ar->fw_capabilities)); 976 break; 977 case ATH6KL_FW_IE_PATCH_ADDR: 978 if (ie_len != sizeof(*val)) 979 break; 980 981 val = (__le32 *) data; 982 ar->hw.dataset_patch_addr = le32_to_cpup(val); 983 984 ath6kl_dbg(ATH6KL_DBG_BOOT, 985 "found patch address ie 0x%x\n", 986 ar->hw.dataset_patch_addr); 987 break; 988 case ATH6KL_FW_IE_BOARD_ADDR: 989 if (ie_len != sizeof(*val)) 990 break; 991 992 val = (__le32 *) data; 993 ar->hw.board_addr = le32_to_cpup(val); 994 995 ath6kl_dbg(ATH6KL_DBG_BOOT, 996 "found board address ie 0x%x\n", 997 ar->hw.board_addr); 998 break; 999 case ATH6KL_FW_IE_VIF_MAX: 1000 if (ie_len != sizeof(*val)) 1001 break; 1002 1003 val = (__le32 *) data; 1004 ar->vif_max = min_t(unsigned int, le32_to_cpup(val), 1005 ATH6KL_VIF_MAX); 1006 1007 if (ar->vif_max > 1 && !ar->p2p) 1008 ar->max_norm_iface = 2; 1009 1010 ath6kl_dbg(ATH6KL_DBG_BOOT, 1011 "found vif max ie %d\n", ar->vif_max); 1012 break; 1013 default: 1014 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 1015 le32_to_cpup(&hdr->id)); 1016 break; 1017 } 1018 1019 len -= ie_len; 1020 data += ie_len; 1021 }; 1022 1023 ret = 0; 1024 out: 1025 release_firmware(fw); 1026 1027 return ret; 1028 } 1029 1030 int ath6kl_init_fetch_firmwares(struct ath6kl *ar) 1031 { 1032 int ret; 1033 1034 ret = ath6kl_fetch_board_file(ar); 1035 if (ret) 1036 return ret; 1037 1038 ret = ath6kl_fetch_testmode_file(ar); 1039 if (ret) 1040 return ret; 1041 1042 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE); 1043 if (ret == 0) { 1044 ar->fw_api = 3; 1045 goto out; 1046 } 1047 1048 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE); 1049 if (ret == 0) { 1050 ar->fw_api = 2; 1051 goto out; 1052 } 1053 1054 ret = ath6kl_fetch_fw_api1(ar); 1055 if (ret) 1056 return ret; 1057 1058 ar->fw_api = 1; 1059 1060 out: 1061 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1062 1063 return 0; 1064 } 1065 1066 static int ath6kl_upload_board_file(struct ath6kl *ar) 1067 { 1068 u32 board_address, board_ext_address, param; 1069 u32 board_data_size, board_ext_data_size; 1070 int ret; 1071 1072 if (WARN_ON(ar->fw_board == NULL)) 1073 return -ENOENT; 1074 1075 /* 1076 * Determine where in Target RAM to write Board Data. 1077 * For AR6004, host determine Target RAM address for 1078 * writing board data. 1079 */ 1080 if (ar->hw.board_addr != 0) { 1081 board_address = ar->hw.board_addr; 1082 ath6kl_bmi_write_hi32(ar, hi_board_data, 1083 board_address); 1084 } else { 1085 ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address); 1086 } 1087 1088 /* determine where in target ram to write extended board data */ 1089 ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address); 1090 1091 if (ar->target_type == TARGET_TYPE_AR6003 && 1092 board_ext_address == 0) { 1093 ath6kl_err("Failed to get board file target address.\n"); 1094 return -EINVAL; 1095 } 1096 1097 switch (ar->target_type) { 1098 case TARGET_TYPE_AR6003: 1099 board_data_size = AR6003_BOARD_DATA_SZ; 1100 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 1101 if (ar->fw_board_len > (board_data_size + board_ext_data_size)) 1102 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2; 1103 break; 1104 case TARGET_TYPE_AR6004: 1105 board_data_size = AR6004_BOARD_DATA_SZ; 1106 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 1107 break; 1108 default: 1109 WARN_ON(1); 1110 return -EINVAL; 1111 break; 1112 } 1113 1114 if (board_ext_address && 1115 ar->fw_board_len == (board_data_size + board_ext_data_size)) { 1116 1117 /* write extended board data */ 1118 ath6kl_dbg(ATH6KL_DBG_BOOT, 1119 "writing extended board data to 0x%x (%d B)\n", 1120 board_ext_address, board_ext_data_size); 1121 1122 ret = ath6kl_bmi_write(ar, board_ext_address, 1123 ar->fw_board + board_data_size, 1124 board_ext_data_size); 1125 if (ret) { 1126 ath6kl_err("Failed to write extended board data: %d\n", 1127 ret); 1128 return ret; 1129 } 1130 1131 /* record that extended board data is initialized */ 1132 param = (board_ext_data_size << 16) | 1; 1133 1134 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param); 1135 } 1136 1137 if (ar->fw_board_len < board_data_size) { 1138 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1139 ret = -EINVAL; 1140 return ret; 1141 } 1142 1143 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 1144 board_address, board_data_size); 1145 1146 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 1147 board_data_size); 1148 1149 if (ret) { 1150 ath6kl_err("Board file bmi write failed: %d\n", ret); 1151 return ret; 1152 } 1153 1154 /* record the fact that Board Data IS initialized */ 1155 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1); 1156 1157 return ret; 1158 } 1159 1160 static int ath6kl_upload_otp(struct ath6kl *ar) 1161 { 1162 u32 address, param; 1163 bool from_hw = false; 1164 int ret; 1165 1166 if (ar->fw_otp == NULL) 1167 return 0; 1168 1169 address = ar->hw.app_load_addr; 1170 1171 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, 1172 ar->fw_otp_len); 1173 1174 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1175 ar->fw_otp_len); 1176 if (ret) { 1177 ath6kl_err("Failed to upload OTP file: %d\n", ret); 1178 return ret; 1179 } 1180 1181 /* read firmware start address */ 1182 ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address); 1183 1184 if (ret) { 1185 ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1186 return ret; 1187 } 1188 1189 if (ar->hw.app_start_override_addr == 0) { 1190 ar->hw.app_start_override_addr = address; 1191 from_hw = true; 1192 } 1193 1194 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", 1195 from_hw ? " (from hw)" : "", 1196 ar->hw.app_start_override_addr); 1197 1198 /* execute the OTP code */ 1199 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", 1200 ar->hw.app_start_override_addr); 1201 param = 0; 1202 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); 1203 1204 return ret; 1205 } 1206 1207 static int ath6kl_upload_firmware(struct ath6kl *ar) 1208 { 1209 u32 address; 1210 int ret; 1211 1212 if (WARN_ON(ar->fw == NULL)) 1213 return 0; 1214 1215 address = ar->hw.app_load_addr; 1216 1217 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", 1218 address, ar->fw_len); 1219 1220 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1221 1222 if (ret) { 1223 ath6kl_err("Failed to write firmware: %d\n", ret); 1224 return ret; 1225 } 1226 1227 /* 1228 * Set starting address for firmware 1229 * Don't need to setup app_start override addr on AR6004 1230 */ 1231 if (ar->target_type != TARGET_TYPE_AR6004) { 1232 address = ar->hw.app_start_override_addr; 1233 ath6kl_bmi_set_app_start(ar, address); 1234 } 1235 return ret; 1236 } 1237 1238 static int ath6kl_upload_patch(struct ath6kl *ar) 1239 { 1240 u32 address; 1241 int ret; 1242 1243 if (ar->fw_patch == NULL) 1244 return 0; 1245 1246 address = ar->hw.dataset_patch_addr; 1247 1248 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", 1249 address, ar->fw_patch_len); 1250 1251 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1252 if (ret) { 1253 ath6kl_err("Failed to write patch file: %d\n", ret); 1254 return ret; 1255 } 1256 1257 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address); 1258 1259 return 0; 1260 } 1261 1262 static int ath6kl_upload_testscript(struct ath6kl *ar) 1263 { 1264 u32 address; 1265 int ret; 1266 1267 if (ar->testmode != 2) 1268 return 0; 1269 1270 if (ar->fw_testscript == NULL) 1271 return 0; 1272 1273 address = ar->hw.testscript_addr; 1274 1275 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n", 1276 address, ar->fw_testscript_len); 1277 1278 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript, 1279 ar->fw_testscript_len); 1280 if (ret) { 1281 ath6kl_err("Failed to write testscript file: %d\n", ret); 1282 return ret; 1283 } 1284 1285 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address); 1286 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096); 1287 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1); 1288 1289 return 0; 1290 } 1291 1292 static int ath6kl_init_upload(struct ath6kl *ar) 1293 { 1294 u32 param, options, sleep, address; 1295 int status = 0; 1296 1297 if (ar->target_type != TARGET_TYPE_AR6003 && 1298 ar->target_type != TARGET_TYPE_AR6004) 1299 return -EINVAL; 1300 1301 /* temporarily disable system sleep */ 1302 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1303 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1304 if (status) 1305 return status; 1306 1307 options = param; 1308 1309 param |= ATH6KL_OPTION_SLEEP_DISABLE; 1310 status = ath6kl_bmi_reg_write(ar, address, param); 1311 if (status) 1312 return status; 1313 1314 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1315 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1316 if (status) 1317 return status; 1318 1319 sleep = param; 1320 1321 param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1322 status = ath6kl_bmi_reg_write(ar, address, param); 1323 if (status) 1324 return status; 1325 1326 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1327 options, sleep); 1328 1329 /* program analog PLL register */ 1330 /* no need to control 40/44MHz clock on AR6004 */ 1331 if (ar->target_type != TARGET_TYPE_AR6004) { 1332 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1333 0xF9104001); 1334 1335 if (status) 1336 return status; 1337 1338 /* Run at 80/88MHz by default */ 1339 param = SM(CPU_CLOCK_STANDARD, 1); 1340 1341 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1342 status = ath6kl_bmi_reg_write(ar, address, param); 1343 if (status) 1344 return status; 1345 } 1346 1347 param = 0; 1348 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1349 param = SM(LPO_CAL_ENABLE, 1); 1350 status = ath6kl_bmi_reg_write(ar, address, param); 1351 if (status) 1352 return status; 1353 1354 /* WAR to avoid SDIO CRC err */ 1355 if (ar->version.target_ver == AR6003_HW_2_0_VERSION || 1356 ar->version.target_ver == AR6003_HW_2_1_1_VERSION) { 1357 ath6kl_err("temporary war to avoid sdio crc error\n"); 1358 1359 param = 0x20; 1360 1361 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1362 status = ath6kl_bmi_reg_write(ar, address, param); 1363 if (status) 1364 return status; 1365 1366 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1367 status = ath6kl_bmi_reg_write(ar, address, param); 1368 if (status) 1369 return status; 1370 1371 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1372 status = ath6kl_bmi_reg_write(ar, address, param); 1373 if (status) 1374 return status; 1375 1376 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1377 status = ath6kl_bmi_reg_write(ar, address, param); 1378 if (status) 1379 return status; 1380 } 1381 1382 /* write EEPROM data to Target RAM */ 1383 status = ath6kl_upload_board_file(ar); 1384 if (status) 1385 return status; 1386 1387 /* transfer One time Programmable data */ 1388 status = ath6kl_upload_otp(ar); 1389 if (status) 1390 return status; 1391 1392 /* Download Target firmware */ 1393 status = ath6kl_upload_firmware(ar); 1394 if (status) 1395 return status; 1396 1397 status = ath6kl_upload_patch(ar); 1398 if (status) 1399 return status; 1400 1401 /* Download the test script */ 1402 status = ath6kl_upload_testscript(ar); 1403 if (status) 1404 return status; 1405 1406 /* Restore system sleep */ 1407 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1408 status = ath6kl_bmi_reg_write(ar, address, sleep); 1409 if (status) 1410 return status; 1411 1412 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1413 param = options | 0x20; 1414 status = ath6kl_bmi_reg_write(ar, address, param); 1415 if (status) 1416 return status; 1417 1418 return status; 1419 } 1420 1421 int ath6kl_init_hw_params(struct ath6kl *ar) 1422 { 1423 const struct ath6kl_hw *uninitialized_var(hw); 1424 int i; 1425 1426 for (i = 0; i < ARRAY_SIZE(hw_list); i++) { 1427 hw = &hw_list[i]; 1428 1429 if (hw->id == ar->version.target_ver) 1430 break; 1431 } 1432 1433 if (i == ARRAY_SIZE(hw_list)) { 1434 ath6kl_err("Unsupported hardware version: 0x%x\n", 1435 ar->version.target_ver); 1436 return -EINVAL; 1437 } 1438 1439 ar->hw = *hw; 1440 1441 ath6kl_dbg(ATH6KL_DBG_BOOT, 1442 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 1443 ar->version.target_ver, ar->target_type, 1444 ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 1445 ath6kl_dbg(ATH6KL_DBG_BOOT, 1446 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 1447 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 1448 ar->hw.reserved_ram_size); 1449 ath6kl_dbg(ATH6KL_DBG_BOOT, 1450 "refclk_hz %d uarttx_pin %d", 1451 ar->hw.refclk_hz, ar->hw.uarttx_pin); 1452 1453 return 0; 1454 } 1455 1456 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type) 1457 { 1458 switch (type) { 1459 case ATH6KL_HIF_TYPE_SDIO: 1460 return "sdio"; 1461 case ATH6KL_HIF_TYPE_USB: 1462 return "usb"; 1463 } 1464 1465 return NULL; 1466 } 1467 1468 int ath6kl_init_hw_start(struct ath6kl *ar) 1469 { 1470 long timeleft; 1471 int ret, i; 1472 1473 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); 1474 1475 ret = ath6kl_hif_power_on(ar); 1476 if (ret) 1477 return ret; 1478 1479 ret = ath6kl_configure_target(ar); 1480 if (ret) 1481 goto err_power_off; 1482 1483 ret = ath6kl_init_upload(ar); 1484 if (ret) 1485 goto err_power_off; 1486 1487 /* Do we need to finish the BMI phase */ 1488 /* FIXME: return error from ath6kl_bmi_done() */ 1489 if (ath6kl_bmi_done(ar)) { 1490 ret = -EIO; 1491 goto err_power_off; 1492 } 1493 1494 /* 1495 * The reason we have to wait for the target here is that the 1496 * driver layer has to init BMI in order to set the host block 1497 * size. 1498 */ 1499 if (ath6kl_htc_wait_target(ar->htc_target)) { 1500 ret = -EIO; 1501 goto err_power_off; 1502 } 1503 1504 if (ath6kl_init_service_ep(ar)) { 1505 ret = -EIO; 1506 goto err_cleanup_scatter; 1507 } 1508 1509 /* setup credit distribution */ 1510 ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info); 1511 1512 /* start HTC */ 1513 ret = ath6kl_htc_start(ar->htc_target); 1514 if (ret) { 1515 /* FIXME: call this */ 1516 ath6kl_cookie_cleanup(ar); 1517 goto err_cleanup_scatter; 1518 } 1519 1520 /* Wait for Wmi event to be ready */ 1521 timeleft = wait_event_interruptible_timeout(ar->event_wq, 1522 test_bit(WMI_READY, 1523 &ar->flag), 1524 WMI_TIMEOUT); 1525 1526 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 1527 1528 1529 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) { 1530 ath6kl_info("%s %s fw %s api %d%s\n", 1531 ar->hw.name, 1532 ath6kl_init_get_hif_name(ar->hif_type), 1533 ar->wiphy->fw_version, 1534 ar->fw_api, 1535 test_bit(TESTMODE, &ar->flag) ? " testmode" : ""); 1536 } 1537 1538 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 1539 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 1540 ATH6KL_ABI_VERSION, ar->version.abi_ver); 1541 ret = -EIO; 1542 goto err_htc_stop; 1543 } 1544 1545 if (!timeleft || signal_pending(current)) { 1546 ath6kl_err("wmi is not ready or wait was interrupted\n"); 1547 ret = -EIO; 1548 goto err_htc_stop; 1549 } 1550 1551 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 1552 1553 /* communicate the wmi protocol verision to the target */ 1554 /* FIXME: return error */ 1555 if ((ath6kl_set_host_app_area(ar)) != 0) 1556 ath6kl_err("unable to set the host app area\n"); 1557 1558 for (i = 0; i < ar->vif_max; i++) { 1559 ret = ath6kl_target_config_wlan_params(ar, i); 1560 if (ret) 1561 goto err_htc_stop; 1562 } 1563 1564 ar->state = ATH6KL_STATE_ON; 1565 1566 return 0; 1567 1568 err_htc_stop: 1569 ath6kl_htc_stop(ar->htc_target); 1570 err_cleanup_scatter: 1571 ath6kl_hif_cleanup_scatter(ar); 1572 err_power_off: 1573 ath6kl_hif_power_off(ar); 1574 1575 return ret; 1576 } 1577 1578 int ath6kl_init_hw_stop(struct ath6kl *ar) 1579 { 1580 int ret; 1581 1582 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); 1583 1584 ath6kl_htc_stop(ar->htc_target); 1585 1586 ath6kl_hif_stop(ar); 1587 1588 ath6kl_bmi_reset(ar); 1589 1590 ret = ath6kl_hif_power_off(ar); 1591 if (ret) 1592 ath6kl_warn("failed to power off hif: %d\n", ret); 1593 1594 ar->state = ATH6KL_STATE_OFF; 1595 1596 return 0; 1597 } 1598 1599 /* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */ 1600 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) 1601 { 1602 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 1603 bool discon_issued; 1604 1605 netif_stop_queue(vif->ndev); 1606 1607 clear_bit(WLAN_ENABLED, &vif->flags); 1608 1609 if (wmi_ready) { 1610 discon_issued = test_bit(CONNECTED, &vif->flags) || 1611 test_bit(CONNECT_PEND, &vif->flags); 1612 ath6kl_disconnect(vif); 1613 del_timer(&vif->disconnect_timer); 1614 1615 if (discon_issued) 1616 ath6kl_disconnect_event(vif, DISCONNECT_CMD, 1617 (vif->nw_type & AP_NETWORK) ? 1618 bcast_mac : vif->bssid, 1619 0, NULL, 0); 1620 } 1621 1622 if (vif->scan_req) { 1623 cfg80211_scan_done(vif->scan_req, true); 1624 vif->scan_req = NULL; 1625 } 1626 } 1627 1628 void ath6kl_stop_txrx(struct ath6kl *ar) 1629 { 1630 struct ath6kl_vif *vif, *tmp_vif; 1631 int i; 1632 1633 set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1634 1635 if (down_interruptible(&ar->sem)) { 1636 ath6kl_err("down_interruptible failed\n"); 1637 return; 1638 } 1639 1640 for (i = 0; i < AP_MAX_NUM_STA; i++) 1641 aggr_reset_state(ar->sta_list[i].aggr_conn); 1642 1643 spin_lock_bh(&ar->list_lock); 1644 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { 1645 list_del(&vif->list); 1646 spin_unlock_bh(&ar->list_lock); 1647 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); 1648 rtnl_lock(); 1649 ath6kl_cfg80211_vif_cleanup(vif); 1650 rtnl_unlock(); 1651 spin_lock_bh(&ar->list_lock); 1652 } 1653 spin_unlock_bh(&ar->list_lock); 1654 1655 clear_bit(WMI_READY, &ar->flag); 1656 1657 /* 1658 * After wmi_shudown all WMI events will be dropped. We 1659 * need to cleanup the buffers allocated in AP mode and 1660 * give disconnect notification to stack, which usually 1661 * happens in the disconnect_event. Simulate the disconnect 1662 * event by calling the function directly. Sometimes 1663 * disconnect_event will be received when the debug logs 1664 * are collected. 1665 */ 1666 ath6kl_wmi_shutdown(ar->wmi); 1667 1668 clear_bit(WMI_ENABLED, &ar->flag); 1669 if (ar->htc_target) { 1670 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); 1671 ath6kl_htc_stop(ar->htc_target); 1672 } 1673 1674 /* 1675 * Try to reset the device if we can. The driver may have been 1676 * configure NOT to reset the target during a debug session. 1677 */ 1678 ath6kl_dbg(ATH6KL_DBG_TRC, 1679 "attempting to reset target on instance destroy\n"); 1680 ath6kl_reset_device(ar, ar->target_type, true, true); 1681 1682 clear_bit(WLAN_ENABLED, &ar->flag); 1683 1684 up(&ar->sem); 1685 } 1686 EXPORT_SYMBOL(ath6kl_stop_txrx); 1687