1 2 /* 3 * Copyright (c) 2011 Atheros Communications Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/moduleparam.h> 19 #include <linux/errno.h> 20 #include <linux/export.h> 21 #include <linux/of.h> 22 #include <linux/mmc/sdio_func.h> 23 24 #include "core.h" 25 #include "cfg80211.h" 26 #include "target.h" 27 #include "debug.h" 28 #include "hif-ops.h" 29 30 static const struct ath6kl_hw hw_list[] = { 31 { 32 .id = AR6003_HW_2_0_VERSION, 33 .name = "ar6003 hw 2.0", 34 .dataset_patch_addr = 0x57e884, 35 .app_load_addr = 0x543180, 36 .board_ext_data_addr = 0x57e500, 37 .reserved_ram_size = 6912, 38 .refclk_hz = 26000000, 39 .uarttx_pin = 8, 40 41 /* hw2.0 needs override address hardcoded */ 42 .app_start_override_addr = 0x944C00, 43 44 .fw = { 45 .dir = AR6003_HW_2_0_FW_DIR, 46 .otp = AR6003_HW_2_0_OTP_FILE, 47 .fw = AR6003_HW_2_0_FIRMWARE_FILE, 48 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE, 49 .patch = AR6003_HW_2_0_PATCH_FILE, 50 }, 51 52 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE, 53 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE, 54 }, 55 { 56 .id = AR6003_HW_2_1_1_VERSION, 57 .name = "ar6003 hw 2.1.1", 58 .dataset_patch_addr = 0x57ff74, 59 .app_load_addr = 0x1234, 60 .board_ext_data_addr = 0x542330, 61 .reserved_ram_size = 512, 62 .refclk_hz = 26000000, 63 .uarttx_pin = 8, 64 .testscript_addr = 0x57ef74, 65 66 .fw = { 67 .dir = AR6003_HW_2_1_1_FW_DIR, 68 .otp = AR6003_HW_2_1_1_OTP_FILE, 69 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE, 70 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE, 71 .patch = AR6003_HW_2_1_1_PATCH_FILE, 72 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE, 73 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE, 74 }, 75 76 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE, 77 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE, 78 }, 79 { 80 .id = AR6004_HW_1_0_VERSION, 81 .name = "ar6004 hw 1.0", 82 .dataset_patch_addr = 0x57e884, 83 .app_load_addr = 0x1234, 84 .board_ext_data_addr = 0x437000, 85 .reserved_ram_size = 19456, 86 .board_addr = 0x433900, 87 .refclk_hz = 26000000, 88 .uarttx_pin = 11, 89 90 .fw = { 91 .dir = AR6004_HW_1_0_FW_DIR, 92 .fw = AR6004_HW_1_0_FIRMWARE_FILE, 93 }, 94 95 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE, 96 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE, 97 }, 98 { 99 .id = AR6004_HW_1_1_VERSION, 100 .name = "ar6004 hw 1.1", 101 .dataset_patch_addr = 0x57e884, 102 .app_load_addr = 0x1234, 103 .board_ext_data_addr = 0x437000, 104 .reserved_ram_size = 11264, 105 .board_addr = 0x43d400, 106 .refclk_hz = 40000000, 107 .uarttx_pin = 11, 108 109 .fw = { 110 .dir = AR6004_HW_1_1_FW_DIR, 111 .fw = AR6004_HW_1_1_FIRMWARE_FILE, 112 }, 113 114 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, 115 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, 116 }, 117 }; 118 119 /* 120 * Include definitions here that can be used to tune the WLAN module 121 * behavior. Different customers can tune the behavior as per their needs, 122 * here. 123 */ 124 125 /* 126 * This configuration item enable/disable keepalive support. 127 * Keepalive support: In the absence of any data traffic to AP, null 128 * frames will be sent to the AP at periodic interval, to keep the association 129 * active. This configuration item defines the periodic interval. 130 * Use value of zero to disable keepalive support 131 * Default: 60 seconds 132 */ 133 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 134 135 /* 136 * This configuration item sets the value of disconnect timeout 137 * Firmware delays sending the disconnec event to the host for this 138 * timeout after is gets disconnected from the current AP. 139 * If the firmware successly roams within the disconnect timeout 140 * it sends a new connect event 141 */ 142 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 143 144 145 #define ATH6KL_DATA_OFFSET 64 146 struct sk_buff *ath6kl_buf_alloc(int size) 147 { 148 struct sk_buff *skb; 149 u16 reserved; 150 151 /* Add chacheline space at front and back of buffer */ 152 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 153 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; 154 skb = dev_alloc_skb(size + reserved); 155 156 if (skb) 157 skb_reserve(skb, reserved - L1_CACHE_BYTES); 158 return skb; 159 } 160 161 void ath6kl_init_profile_info(struct ath6kl_vif *vif) 162 { 163 vif->ssid_len = 0; 164 memset(vif->ssid, 0, sizeof(vif->ssid)); 165 166 vif->dot11_auth_mode = OPEN_AUTH; 167 vif->auth_mode = NONE_AUTH; 168 vif->prwise_crypto = NONE_CRYPT; 169 vif->prwise_crypto_len = 0; 170 vif->grp_crypto = NONE_CRYPT; 171 vif->grp_crypto_len = 0; 172 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 173 memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); 174 memset(vif->bssid, 0, sizeof(vif->bssid)); 175 vif->bss_ch = 0; 176 } 177 178 static int ath6kl_set_host_app_area(struct ath6kl *ar) 179 { 180 u32 address, data; 181 struct host_app_area host_app_area; 182 183 /* Fetch the address of the host_app_area_s 184 * instance in the host interest area */ 185 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 186 address = TARG_VTOP(ar->target_type, address); 187 188 if (ath6kl_diag_read32(ar, address, &data)) 189 return -EIO; 190 191 address = TARG_VTOP(ar->target_type, data); 192 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); 193 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 194 sizeof(struct host_app_area))) 195 return -EIO; 196 197 return 0; 198 } 199 200 static inline void set_ac2_ep_map(struct ath6kl *ar, 201 u8 ac, 202 enum htc_endpoint_id ep) 203 { 204 ar->ac2ep_map[ac] = ep; 205 ar->ep2ac_map[ep] = ac; 206 } 207 208 /* connect to a service */ 209 static int ath6kl_connectservice(struct ath6kl *ar, 210 struct htc_service_connect_req *con_req, 211 char *desc) 212 { 213 int status; 214 struct htc_service_connect_resp response; 215 216 memset(&response, 0, sizeof(response)); 217 218 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 219 if (status) { 220 ath6kl_err("failed to connect to %s service status:%d\n", 221 desc, status); 222 return status; 223 } 224 225 switch (con_req->svc_id) { 226 case WMI_CONTROL_SVC: 227 if (test_bit(WMI_ENABLED, &ar->flag)) 228 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 229 ar->ctrl_ep = response.endpoint; 230 break; 231 case WMI_DATA_BE_SVC: 232 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 233 break; 234 case WMI_DATA_BK_SVC: 235 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 236 break; 237 case WMI_DATA_VI_SVC: 238 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 239 break; 240 case WMI_DATA_VO_SVC: 241 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 242 break; 243 default: 244 ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 245 return -EINVAL; 246 } 247 248 return 0; 249 } 250 251 static int ath6kl_init_service_ep(struct ath6kl *ar) 252 { 253 struct htc_service_connect_req connect; 254 255 memset(&connect, 0, sizeof(connect)); 256 257 /* these fields are the same for all service endpoints */ 258 connect.ep_cb.rx = ath6kl_rx; 259 connect.ep_cb.rx_refill = ath6kl_rx_refill; 260 connect.ep_cb.tx_full = ath6kl_tx_queue_full; 261 262 /* 263 * Set the max queue depth so that our ath6kl_tx_queue_full handler 264 * gets called. 265 */ 266 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 267 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 268 if (!connect.ep_cb.rx_refill_thresh) 269 connect.ep_cb.rx_refill_thresh++; 270 271 /* connect to control service */ 272 connect.svc_id = WMI_CONTROL_SVC; 273 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 274 return -EIO; 275 276 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 277 278 /* 279 * Limit the HTC message size on the send path, although e can 280 * receive A-MSDU frames of 4K, we will only send ethernet-sized 281 * (802.3) frames on the send path. 282 */ 283 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 284 285 /* 286 * To reduce the amount of committed memory for larger A_MSDU 287 * frames, use the recv-alloc threshold mechanism for larger 288 * packets. 289 */ 290 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 291 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 292 293 /* 294 * For the remaining data services set the connection flag to 295 * reduce dribbling, if configured to do so. 296 */ 297 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 298 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 299 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 300 301 connect.svc_id = WMI_DATA_BE_SVC; 302 303 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 304 return -EIO; 305 306 /* connect to back-ground map this to WMI LOW_PRI */ 307 connect.svc_id = WMI_DATA_BK_SVC; 308 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 309 return -EIO; 310 311 /* connect to Video service, map this to to HI PRI */ 312 connect.svc_id = WMI_DATA_VI_SVC; 313 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 314 return -EIO; 315 316 /* 317 * Connect to VO service, this is currently not mapped to a WMI 318 * priority stream due to historical reasons. WMI originally 319 * defined 3 priorities over 3 mailboxes We can change this when 320 * WMI is reworked so that priorities are not dependent on 321 * mailboxes. 322 */ 323 connect.svc_id = WMI_DATA_VO_SVC; 324 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 325 return -EIO; 326 327 return 0; 328 } 329 330 void ath6kl_init_control_info(struct ath6kl_vif *vif) 331 { 332 ath6kl_init_profile_info(vif); 333 vif->def_txkey_index = 0; 334 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 335 vif->ch_hint = 0; 336 } 337 338 /* 339 * Set HTC/Mbox operational parameters, this can only be called when the 340 * target is in the BMI phase. 341 */ 342 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 343 u8 htc_ctrl_buf) 344 { 345 int status; 346 u32 blk_size; 347 348 blk_size = ar->mbox_info.block_size; 349 350 if (htc_ctrl_buf) 351 blk_size |= ((u32)htc_ctrl_buf) << 16; 352 353 /* set the host interest area for the block size */ 354 status = ath6kl_bmi_write(ar, 355 ath6kl_get_hi_item_addr(ar, 356 HI_ITEM(hi_mbox_io_block_sz)), 357 (u8 *)&blk_size, 358 4); 359 if (status) { 360 ath6kl_err("bmi_write_memory for IO block size failed\n"); 361 goto out; 362 } 363 364 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 365 blk_size, 366 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 367 368 if (mbox_isr_yield_val) { 369 /* set the host interest area for the mbox ISR yield limit */ 370 status = ath6kl_bmi_write(ar, 371 ath6kl_get_hi_item_addr(ar, 372 HI_ITEM(hi_mbox_isr_yield_limit)), 373 (u8 *)&mbox_isr_yield_val, 374 4); 375 if (status) { 376 ath6kl_err("bmi_write_memory for yield limit failed\n"); 377 goto out; 378 } 379 } 380 381 out: 382 return status; 383 } 384 385 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) 386 { 387 int status = 0; 388 int ret; 389 390 /* 391 * Configure the device for rx dot11 header rules. "0,0" are the 392 * default values. Required if checksum offload is needed. Set 393 * RxMetaVersion to 2. 394 */ 395 if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, 396 ar->rx_meta_ver, 0, 0)) { 397 ath6kl_err("unable to set the rx frame format\n"); 398 status = -EIO; 399 } 400 401 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) 402 if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, 403 IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { 404 ath6kl_err("unable to set power save fail event policy\n"); 405 status = -EIO; 406 } 407 408 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) 409 if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, 410 WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { 411 ath6kl_err("unable to set barker preamble policy\n"); 412 status = -EIO; 413 } 414 415 if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, 416 WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { 417 ath6kl_err("unable to set keep alive interval\n"); 418 status = -EIO; 419 } 420 421 if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, 422 WLAN_CONFIG_DISCONNECT_TIMEOUT)) { 423 ath6kl_err("unable to set disconnect timeout\n"); 424 status = -EIO; 425 } 426 427 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) 428 if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) { 429 ath6kl_err("unable to set txop bursting\n"); 430 status = -EIO; 431 } 432 433 if (ar->p2p && (ar->vif_max == 1 || idx)) { 434 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, 435 P2P_FLAG_CAPABILITIES_REQ | 436 P2P_FLAG_MACADDR_REQ | 437 P2P_FLAG_HMODEL_REQ); 438 if (ret) { 439 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " 440 "capabilities (%d) - assuming P2P not " 441 "supported\n", ret); 442 ar->p2p = false; 443 } 444 } 445 446 if (ar->p2p && (ar->vif_max == 1 || idx)) { 447 /* Enable Probe Request reporting for P2P */ 448 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 449 if (ret) { 450 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " 451 "Request reporting (%d)\n", ret); 452 } 453 } 454 455 return status; 456 } 457 458 int ath6kl_configure_target(struct ath6kl *ar) 459 { 460 u32 param, ram_reserved_size; 461 u8 fw_iftype, fw_mode = 0, fw_submode = 0; 462 int i, status; 463 464 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG); 465 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 466 HI_ITEM(hi_serial_enable)), (u8 *)¶m, 4)) { 467 ath6kl_err("bmi_write_memory for uart debug failed\n"); 468 return -EIO; 469 } 470 471 /* 472 * Note: Even though the firmware interface type is 473 * chosen as BSS_STA for all three interfaces, can 474 * be configured to IBSS/AP as long as the fw submode 475 * remains normal mode (0 - AP, STA and IBSS). But 476 * due to an target assert in firmware only one interface is 477 * configured for now. 478 */ 479 fw_iftype = HI_OPTION_FW_MODE_BSS_STA; 480 481 for (i = 0; i < ar->vif_max; i++) 482 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); 483 484 /* 485 * By default, submodes : 486 * vif[0] - AP/STA/IBSS 487 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" 488 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" 489 */ 490 491 for (i = 0; i < ar->max_norm_iface; i++) 492 fw_submode |= HI_OPTION_FW_SUBMODE_NONE << 493 (i * HI_OPTION_FW_SUBMODE_BITS); 494 495 for (i = ar->max_norm_iface; i < ar->vif_max; i++) 496 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 497 (i * HI_OPTION_FW_SUBMODE_BITS); 498 499 if (ar->p2p && ar->vif_max == 1) 500 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; 501 502 param = HTC_PROTOCOL_VERSION; 503 if (ath6kl_bmi_write(ar, 504 ath6kl_get_hi_item_addr(ar, 505 HI_ITEM(hi_app_host_interest)), 506 (u8 *)¶m, 4) != 0) { 507 ath6kl_err("bmi_write_memory for htc version failed\n"); 508 return -EIO; 509 } 510 511 /* set the firmware mode to STA/IBSS/AP */ 512 param = 0; 513 514 if (ath6kl_bmi_read(ar, 515 ath6kl_get_hi_item_addr(ar, 516 HI_ITEM(hi_option_flag)), 517 (u8 *)¶m, 4) != 0) { 518 ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 519 return -EIO; 520 } 521 522 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT); 523 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; 524 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; 525 526 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 527 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 528 529 if (ath6kl_bmi_write(ar, 530 ath6kl_get_hi_item_addr(ar, 531 HI_ITEM(hi_option_flag)), 532 (u8 *)¶m, 533 4) != 0) { 534 ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 535 return -EIO; 536 } 537 538 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 539 540 /* 541 * Hardcode the address use for the extended board data 542 * Ideally this should be pre-allocate by the OS at boot time 543 * But since it is a new feature and board data is loaded 544 * at init time, we have to workaround this from host. 545 * It is difficult to patch the firmware boot code, 546 * but possible in theory. 547 */ 548 549 param = ar->hw.board_ext_data_addr; 550 ram_reserved_size = ar->hw.reserved_ram_size; 551 552 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 553 HI_ITEM(hi_board_ext_data)), 554 (u8 *)¶m, 4) != 0) { 555 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 556 return -EIO; 557 } 558 559 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 560 HI_ITEM(hi_end_ram_reserve_sz)), 561 (u8 *)&ram_reserved_size, 4) != 0) { 562 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 563 return -EIO; 564 } 565 566 /* set the block size for the target */ 567 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 568 /* use default number of control buffers */ 569 return -EIO; 570 571 /* Configure GPIO AR600x UART */ 572 param = ar->hw.uarttx_pin; 573 status = ath6kl_bmi_write(ar, 574 ath6kl_get_hi_item_addr(ar, 575 HI_ITEM(hi_dbg_uart_txpin)), 576 (u8 *)¶m, 4); 577 if (status) 578 return status; 579 580 /* Configure target refclk_hz */ 581 param = ar->hw.refclk_hz; 582 status = ath6kl_bmi_write(ar, 583 ath6kl_get_hi_item_addr(ar, 584 HI_ITEM(hi_refclk_hz)), 585 (u8 *)¶m, 4); 586 if (status) 587 return status; 588 589 return 0; 590 } 591 592 /* firmware upload */ 593 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 594 u8 **fw, size_t *fw_len) 595 { 596 const struct firmware *fw_entry; 597 int ret; 598 599 ret = request_firmware(&fw_entry, filename, ar->dev); 600 if (ret) 601 return ret; 602 603 *fw_len = fw_entry->size; 604 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 605 606 if (*fw == NULL) 607 ret = -ENOMEM; 608 609 release_firmware(fw_entry); 610 611 return ret; 612 } 613 614 #ifdef CONFIG_OF 615 /* 616 * Check the device tree for a board-id and use it to construct 617 * the pathname to the firmware file. Used (for now) to find a 618 * fallback to the "bdata.bin" file--typically a symlink to the 619 * appropriate board-specific file. 620 */ 621 static bool check_device_tree(struct ath6kl *ar) 622 { 623 static const char *board_id_prop = "atheros,board-id"; 624 struct device_node *node; 625 char board_filename[64]; 626 const char *board_id; 627 int ret; 628 629 for_each_compatible_node(node, NULL, "atheros,ath6kl") { 630 board_id = of_get_property(node, board_id_prop, NULL); 631 if (board_id == NULL) { 632 ath6kl_warn("No \"%s\" property on %s node.\n", 633 board_id_prop, node->name); 634 continue; 635 } 636 snprintf(board_filename, sizeof(board_filename), 637 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id); 638 639 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 640 &ar->fw_board_len); 641 if (ret) { 642 ath6kl_err("Failed to get DT board file %s: %d\n", 643 board_filename, ret); 644 continue; 645 } 646 return true; 647 } 648 return false; 649 } 650 #else 651 static bool check_device_tree(struct ath6kl *ar) 652 { 653 return false; 654 } 655 #endif /* CONFIG_OF */ 656 657 static int ath6kl_fetch_board_file(struct ath6kl *ar) 658 { 659 const char *filename; 660 int ret; 661 662 if (ar->fw_board != NULL) 663 return 0; 664 665 if (WARN_ON(ar->hw.fw_board == NULL)) 666 return -EINVAL; 667 668 filename = ar->hw.fw_board; 669 670 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 671 &ar->fw_board_len); 672 if (ret == 0) { 673 /* managed to get proper board file */ 674 return 0; 675 } 676 677 if (check_device_tree(ar)) { 678 /* got board file from device tree */ 679 return 0; 680 } 681 682 /* there was no proper board file, try to use default instead */ 683 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 684 filename, ret); 685 686 filename = ar->hw.fw_default_board; 687 688 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 689 &ar->fw_board_len); 690 if (ret) { 691 ath6kl_err("Failed to get default board file %s: %d\n", 692 filename, ret); 693 return ret; 694 } 695 696 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 697 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 698 699 return 0; 700 } 701 702 static int ath6kl_fetch_otp_file(struct ath6kl *ar) 703 { 704 char filename[100]; 705 int ret; 706 707 if (ar->fw_otp != NULL) 708 return 0; 709 710 if (ar->hw.fw.otp == NULL) { 711 ath6kl_dbg(ATH6KL_DBG_BOOT, 712 "no OTP file configured for this hw\n"); 713 return 0; 714 } 715 716 snprintf(filename, sizeof(filename), "%s/%s", 717 ar->hw.fw.dir, ar->hw.fw.otp); 718 719 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 720 &ar->fw_otp_len); 721 if (ret) { 722 ath6kl_err("Failed to get OTP file %s: %d\n", 723 filename, ret); 724 return ret; 725 } 726 727 return 0; 728 } 729 730 static int ath6kl_fetch_testmode_file(struct ath6kl *ar) 731 { 732 char filename[100]; 733 int ret; 734 735 if (ar->testmode == 0) 736 return 0; 737 738 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode); 739 740 if (ar->testmode == 2) { 741 if (ar->hw.fw.utf == NULL) { 742 ath6kl_warn("testmode 2 not supported\n"); 743 return -EOPNOTSUPP; 744 } 745 746 snprintf(filename, sizeof(filename), "%s/%s", 747 ar->hw.fw.dir, ar->hw.fw.utf); 748 } else { 749 if (ar->hw.fw.tcmd == NULL) { 750 ath6kl_warn("testmode 1 not supported\n"); 751 return -EOPNOTSUPP; 752 } 753 754 snprintf(filename, sizeof(filename), "%s/%s", 755 ar->hw.fw.dir, ar->hw.fw.tcmd); 756 } 757 758 set_bit(TESTMODE, &ar->flag); 759 760 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 761 if (ret) { 762 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n", 763 ar->testmode, filename, ret); 764 return ret; 765 } 766 767 return 0; 768 } 769 770 static int ath6kl_fetch_fw_file(struct ath6kl *ar) 771 { 772 char filename[100]; 773 int ret; 774 775 if (ar->fw != NULL) 776 return 0; 777 778 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */ 779 if (WARN_ON(ar->hw.fw.fw == NULL)) 780 return -EINVAL; 781 782 snprintf(filename, sizeof(filename), "%s/%s", 783 ar->hw.fw.dir, ar->hw.fw.fw); 784 785 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 786 if (ret) { 787 ath6kl_err("Failed to get firmware file %s: %d\n", 788 filename, ret); 789 return ret; 790 } 791 792 return 0; 793 } 794 795 static int ath6kl_fetch_patch_file(struct ath6kl *ar) 796 { 797 char filename[100]; 798 int ret; 799 800 if (ar->fw_patch != NULL) 801 return 0; 802 803 if (ar->hw.fw.patch == NULL) 804 return 0; 805 806 snprintf(filename, sizeof(filename), "%s/%s", 807 ar->hw.fw.dir, ar->hw.fw.patch); 808 809 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 810 &ar->fw_patch_len); 811 if (ret) { 812 ath6kl_err("Failed to get patch file %s: %d\n", 813 filename, ret); 814 return ret; 815 } 816 817 return 0; 818 } 819 820 static int ath6kl_fetch_testscript_file(struct ath6kl *ar) 821 { 822 char filename[100]; 823 int ret; 824 825 if (ar->testmode != 2) 826 return 0; 827 828 if (ar->fw_testscript != NULL) 829 return 0; 830 831 if (ar->hw.fw.testscript == NULL) 832 return 0; 833 834 snprintf(filename, sizeof(filename), "%s/%s", 835 ar->hw.fw.dir, ar->hw.fw.testscript); 836 837 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript, 838 &ar->fw_testscript_len); 839 if (ret) { 840 ath6kl_err("Failed to get testscript file %s: %d\n", 841 filename, ret); 842 return ret; 843 } 844 845 return 0; 846 } 847 848 static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 849 { 850 int ret; 851 852 ret = ath6kl_fetch_otp_file(ar); 853 if (ret) 854 return ret; 855 856 ret = ath6kl_fetch_fw_file(ar); 857 if (ret) 858 return ret; 859 860 ret = ath6kl_fetch_patch_file(ar); 861 if (ret) 862 return ret; 863 864 ret = ath6kl_fetch_testscript_file(ar); 865 if (ret) 866 return ret; 867 868 return 0; 869 } 870 871 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name) 872 { 873 size_t magic_len, len, ie_len; 874 const struct firmware *fw; 875 struct ath6kl_fw_ie *hdr; 876 char filename[100]; 877 const u8 *data; 878 int ret, ie_id, i, index, bit; 879 __le32 *val; 880 881 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name); 882 883 ret = request_firmware(&fw, filename, ar->dev); 884 if (ret) 885 return ret; 886 887 data = fw->data; 888 len = fw->size; 889 890 /* magic also includes the null byte, check that as well */ 891 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 892 893 if (len < magic_len) { 894 ret = -EINVAL; 895 goto out; 896 } 897 898 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 899 ret = -EINVAL; 900 goto out; 901 } 902 903 len -= magic_len; 904 data += magic_len; 905 906 /* loop elements */ 907 while (len > sizeof(struct ath6kl_fw_ie)) { 908 /* hdr is unaligned! */ 909 hdr = (struct ath6kl_fw_ie *) data; 910 911 ie_id = le32_to_cpup(&hdr->id); 912 ie_len = le32_to_cpup(&hdr->len); 913 914 len -= sizeof(*hdr); 915 data += sizeof(*hdr); 916 917 if (len < ie_len) { 918 ret = -EINVAL; 919 goto out; 920 } 921 922 switch (ie_id) { 923 case ATH6KL_FW_IE_OTP_IMAGE: 924 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", 925 ie_len); 926 927 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 928 929 if (ar->fw_otp == NULL) { 930 ret = -ENOMEM; 931 goto out; 932 } 933 934 ar->fw_otp_len = ie_len; 935 break; 936 case ATH6KL_FW_IE_FW_IMAGE: 937 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", 938 ie_len); 939 940 /* in testmode we already might have a fw file */ 941 if (ar->fw != NULL) 942 break; 943 944 ar->fw = kmemdup(data, ie_len, GFP_KERNEL); 945 946 if (ar->fw == NULL) { 947 ret = -ENOMEM; 948 goto out; 949 } 950 951 ar->fw_len = ie_len; 952 break; 953 case ATH6KL_FW_IE_PATCH_IMAGE: 954 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", 955 ie_len); 956 957 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 958 959 if (ar->fw_patch == NULL) { 960 ret = -ENOMEM; 961 goto out; 962 } 963 964 ar->fw_patch_len = ie_len; 965 break; 966 case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 967 val = (__le32 *) data; 968 ar->hw.reserved_ram_size = le32_to_cpup(val); 969 970 ath6kl_dbg(ATH6KL_DBG_BOOT, 971 "found reserved ram size ie 0x%d\n", 972 ar->hw.reserved_ram_size); 973 break; 974 case ATH6KL_FW_IE_CAPABILITIES: 975 if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8)) 976 break; 977 978 ath6kl_dbg(ATH6KL_DBG_BOOT, 979 "found firmware capabilities ie (%zd B)\n", 980 ie_len); 981 982 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 983 index = i / 8; 984 bit = i % 8; 985 986 if (data[index] & (1 << bit)) 987 __set_bit(i, ar->fw_capabilities); 988 } 989 990 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 991 ar->fw_capabilities, 992 sizeof(ar->fw_capabilities)); 993 break; 994 case ATH6KL_FW_IE_PATCH_ADDR: 995 if (ie_len != sizeof(*val)) 996 break; 997 998 val = (__le32 *) data; 999 ar->hw.dataset_patch_addr = le32_to_cpup(val); 1000 1001 ath6kl_dbg(ATH6KL_DBG_BOOT, 1002 "found patch address ie 0x%x\n", 1003 ar->hw.dataset_patch_addr); 1004 break; 1005 case ATH6KL_FW_IE_BOARD_ADDR: 1006 if (ie_len != sizeof(*val)) 1007 break; 1008 1009 val = (__le32 *) data; 1010 ar->hw.board_addr = le32_to_cpup(val); 1011 1012 ath6kl_dbg(ATH6KL_DBG_BOOT, 1013 "found board address ie 0x%x\n", 1014 ar->hw.board_addr); 1015 break; 1016 case ATH6KL_FW_IE_VIF_MAX: 1017 if (ie_len != sizeof(*val)) 1018 break; 1019 1020 val = (__le32 *) data; 1021 ar->vif_max = min_t(unsigned int, le32_to_cpup(val), 1022 ATH6KL_VIF_MAX); 1023 1024 if (ar->vif_max > 1 && !ar->p2p) 1025 ar->max_norm_iface = 2; 1026 1027 ath6kl_dbg(ATH6KL_DBG_BOOT, 1028 "found vif max ie %d\n", ar->vif_max); 1029 break; 1030 default: 1031 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 1032 le32_to_cpup(&hdr->id)); 1033 break; 1034 } 1035 1036 len -= ie_len; 1037 data += ie_len; 1038 }; 1039 1040 ret = 0; 1041 out: 1042 release_firmware(fw); 1043 1044 return ret; 1045 } 1046 1047 int ath6kl_init_fetch_firmwares(struct ath6kl *ar) 1048 { 1049 int ret; 1050 1051 ret = ath6kl_fetch_board_file(ar); 1052 if (ret) 1053 return ret; 1054 1055 ret = ath6kl_fetch_testmode_file(ar); 1056 if (ret) 1057 return ret; 1058 1059 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE); 1060 if (ret == 0) { 1061 ar->fw_api = 3; 1062 goto out; 1063 } 1064 1065 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE); 1066 if (ret == 0) { 1067 ar->fw_api = 2; 1068 goto out; 1069 } 1070 1071 ret = ath6kl_fetch_fw_api1(ar); 1072 if (ret) 1073 return ret; 1074 1075 ar->fw_api = 1; 1076 1077 out: 1078 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1079 1080 return 0; 1081 } 1082 1083 static int ath6kl_upload_board_file(struct ath6kl *ar) 1084 { 1085 u32 board_address, board_ext_address, param; 1086 u32 board_data_size, board_ext_data_size; 1087 int ret; 1088 1089 if (WARN_ON(ar->fw_board == NULL)) 1090 return -ENOENT; 1091 1092 /* 1093 * Determine where in Target RAM to write Board Data. 1094 * For AR6004, host determine Target RAM address for 1095 * writing board data. 1096 */ 1097 if (ar->hw.board_addr != 0) { 1098 board_address = ar->hw.board_addr; 1099 ath6kl_bmi_write(ar, 1100 ath6kl_get_hi_item_addr(ar, 1101 HI_ITEM(hi_board_data)), 1102 (u8 *) &board_address, 4); 1103 } else { 1104 ath6kl_bmi_read(ar, 1105 ath6kl_get_hi_item_addr(ar, 1106 HI_ITEM(hi_board_data)), 1107 (u8 *) &board_address, 4); 1108 } 1109 1110 /* determine where in target ram to write extended board data */ 1111 ath6kl_bmi_read(ar, 1112 ath6kl_get_hi_item_addr(ar, 1113 HI_ITEM(hi_board_ext_data)), 1114 (u8 *) &board_ext_address, 4); 1115 1116 if (ar->target_type == TARGET_TYPE_AR6003 && 1117 board_ext_address == 0) { 1118 ath6kl_err("Failed to get board file target address.\n"); 1119 return -EINVAL; 1120 } 1121 1122 switch (ar->target_type) { 1123 case TARGET_TYPE_AR6003: 1124 board_data_size = AR6003_BOARD_DATA_SZ; 1125 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 1126 break; 1127 case TARGET_TYPE_AR6004: 1128 board_data_size = AR6004_BOARD_DATA_SZ; 1129 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 1130 break; 1131 default: 1132 WARN_ON(1); 1133 return -EINVAL; 1134 break; 1135 } 1136 1137 if (board_ext_address && 1138 ar->fw_board_len == (board_data_size + board_ext_data_size)) { 1139 1140 /* write extended board data */ 1141 ath6kl_dbg(ATH6KL_DBG_BOOT, 1142 "writing extended board data to 0x%x (%d B)\n", 1143 board_ext_address, board_ext_data_size); 1144 1145 ret = ath6kl_bmi_write(ar, board_ext_address, 1146 ar->fw_board + board_data_size, 1147 board_ext_data_size); 1148 if (ret) { 1149 ath6kl_err("Failed to write extended board data: %d\n", 1150 ret); 1151 return ret; 1152 } 1153 1154 /* record that extended board data is initialized */ 1155 param = (board_ext_data_size << 16) | 1; 1156 1157 ath6kl_bmi_write(ar, 1158 ath6kl_get_hi_item_addr(ar, 1159 HI_ITEM(hi_board_ext_data_config)), 1160 (unsigned char *) ¶m, 4); 1161 } 1162 1163 if (ar->fw_board_len < board_data_size) { 1164 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1165 ret = -EINVAL; 1166 return ret; 1167 } 1168 1169 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 1170 board_address, board_data_size); 1171 1172 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 1173 board_data_size); 1174 1175 if (ret) { 1176 ath6kl_err("Board file bmi write failed: %d\n", ret); 1177 return ret; 1178 } 1179 1180 /* record the fact that Board Data IS initialized */ 1181 param = 1; 1182 ath6kl_bmi_write(ar, 1183 ath6kl_get_hi_item_addr(ar, 1184 HI_ITEM(hi_board_data_initialized)), 1185 (u8 *)¶m, 4); 1186 1187 return ret; 1188 } 1189 1190 static int ath6kl_upload_otp(struct ath6kl *ar) 1191 { 1192 u32 address, param; 1193 bool from_hw = false; 1194 int ret; 1195 1196 if (ar->fw_otp == NULL) 1197 return 0; 1198 1199 address = ar->hw.app_load_addr; 1200 1201 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, 1202 ar->fw_otp_len); 1203 1204 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1205 ar->fw_otp_len); 1206 if (ret) { 1207 ath6kl_err("Failed to upload OTP file: %d\n", ret); 1208 return ret; 1209 } 1210 1211 /* read firmware start address */ 1212 ret = ath6kl_bmi_read(ar, 1213 ath6kl_get_hi_item_addr(ar, 1214 HI_ITEM(hi_app_start)), 1215 (u8 *) &address, sizeof(address)); 1216 1217 if (ret) { 1218 ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1219 return ret; 1220 } 1221 1222 if (ar->hw.app_start_override_addr == 0) { 1223 ar->hw.app_start_override_addr = address; 1224 from_hw = true; 1225 } 1226 1227 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", 1228 from_hw ? " (from hw)" : "", 1229 ar->hw.app_start_override_addr); 1230 1231 /* execute the OTP code */ 1232 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", 1233 ar->hw.app_start_override_addr); 1234 param = 0; 1235 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); 1236 1237 return ret; 1238 } 1239 1240 static int ath6kl_upload_firmware(struct ath6kl *ar) 1241 { 1242 u32 address; 1243 int ret; 1244 1245 if (WARN_ON(ar->fw == NULL)) 1246 return 0; 1247 1248 address = ar->hw.app_load_addr; 1249 1250 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", 1251 address, ar->fw_len); 1252 1253 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1254 1255 if (ret) { 1256 ath6kl_err("Failed to write firmware: %d\n", ret); 1257 return ret; 1258 } 1259 1260 /* 1261 * Set starting address for firmware 1262 * Don't need to setup app_start override addr on AR6004 1263 */ 1264 if (ar->target_type != TARGET_TYPE_AR6004) { 1265 address = ar->hw.app_start_override_addr; 1266 ath6kl_bmi_set_app_start(ar, address); 1267 } 1268 return ret; 1269 } 1270 1271 static int ath6kl_upload_patch(struct ath6kl *ar) 1272 { 1273 u32 address, param; 1274 int ret; 1275 1276 if (ar->fw_patch == NULL) 1277 return 0; 1278 1279 address = ar->hw.dataset_patch_addr; 1280 1281 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", 1282 address, ar->fw_patch_len); 1283 1284 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1285 if (ret) { 1286 ath6kl_err("Failed to write patch file: %d\n", ret); 1287 return ret; 1288 } 1289 1290 param = address; 1291 ath6kl_bmi_write(ar, 1292 ath6kl_get_hi_item_addr(ar, 1293 HI_ITEM(hi_dset_list_head)), 1294 (unsigned char *) ¶m, 4); 1295 1296 return 0; 1297 } 1298 1299 static int ath6kl_upload_testscript(struct ath6kl *ar) 1300 { 1301 u32 address, param; 1302 int ret; 1303 1304 if (ar->testmode != 2) 1305 return 0; 1306 1307 if (ar->fw_testscript == NULL) 1308 return 0; 1309 1310 address = ar->hw.testscript_addr; 1311 1312 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n", 1313 address, ar->fw_testscript_len); 1314 1315 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript, 1316 ar->fw_testscript_len); 1317 if (ret) { 1318 ath6kl_err("Failed to write testscript file: %d\n", ret); 1319 return ret; 1320 } 1321 1322 param = address; 1323 ath6kl_bmi_write(ar, 1324 ath6kl_get_hi_item_addr(ar, 1325 HI_ITEM(hi_ota_testscript)), 1326 (unsigned char *) ¶m, 4); 1327 1328 param = 4096; 1329 ath6kl_bmi_write(ar, 1330 ath6kl_get_hi_item_addr(ar, 1331 HI_ITEM(hi_end_ram_reserve_sz)), 1332 (unsigned char *) ¶m, 4); 1333 1334 param = 1; 1335 ath6kl_bmi_write(ar, 1336 ath6kl_get_hi_item_addr(ar, 1337 HI_ITEM(hi_test_apps_related)), 1338 (unsigned char *) ¶m, 4); 1339 1340 return 0; 1341 } 1342 1343 static int ath6kl_init_upload(struct ath6kl *ar) 1344 { 1345 u32 param, options, sleep, address; 1346 int status = 0; 1347 1348 if (ar->target_type != TARGET_TYPE_AR6003 && 1349 ar->target_type != TARGET_TYPE_AR6004) 1350 return -EINVAL; 1351 1352 /* temporarily disable system sleep */ 1353 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1354 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1355 if (status) 1356 return status; 1357 1358 options = param; 1359 1360 param |= ATH6KL_OPTION_SLEEP_DISABLE; 1361 status = ath6kl_bmi_reg_write(ar, address, param); 1362 if (status) 1363 return status; 1364 1365 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1366 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1367 if (status) 1368 return status; 1369 1370 sleep = param; 1371 1372 param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1373 status = ath6kl_bmi_reg_write(ar, address, param); 1374 if (status) 1375 return status; 1376 1377 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1378 options, sleep); 1379 1380 /* program analog PLL register */ 1381 /* no need to control 40/44MHz clock on AR6004 */ 1382 if (ar->target_type != TARGET_TYPE_AR6004) { 1383 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1384 0xF9104001); 1385 1386 if (status) 1387 return status; 1388 1389 /* Run at 80/88MHz by default */ 1390 param = SM(CPU_CLOCK_STANDARD, 1); 1391 1392 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1393 status = ath6kl_bmi_reg_write(ar, address, param); 1394 if (status) 1395 return status; 1396 } 1397 1398 param = 0; 1399 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1400 param = SM(LPO_CAL_ENABLE, 1); 1401 status = ath6kl_bmi_reg_write(ar, address, param); 1402 if (status) 1403 return status; 1404 1405 /* WAR to avoid SDIO CRC err */ 1406 if (ar->version.target_ver == AR6003_HW_2_0_VERSION) { 1407 ath6kl_err("temporary war to avoid sdio crc error\n"); 1408 1409 param = 0x20; 1410 1411 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1412 status = ath6kl_bmi_reg_write(ar, address, param); 1413 if (status) 1414 return status; 1415 1416 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1417 status = ath6kl_bmi_reg_write(ar, address, param); 1418 if (status) 1419 return status; 1420 1421 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1422 status = ath6kl_bmi_reg_write(ar, address, param); 1423 if (status) 1424 return status; 1425 1426 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1427 status = ath6kl_bmi_reg_write(ar, address, param); 1428 if (status) 1429 return status; 1430 } 1431 1432 /* write EEPROM data to Target RAM */ 1433 status = ath6kl_upload_board_file(ar); 1434 if (status) 1435 return status; 1436 1437 /* transfer One time Programmable data */ 1438 status = ath6kl_upload_otp(ar); 1439 if (status) 1440 return status; 1441 1442 /* Download Target firmware */ 1443 status = ath6kl_upload_firmware(ar); 1444 if (status) 1445 return status; 1446 1447 status = ath6kl_upload_patch(ar); 1448 if (status) 1449 return status; 1450 1451 /* Download the test script */ 1452 status = ath6kl_upload_testscript(ar); 1453 if (status) 1454 return status; 1455 1456 /* Restore system sleep */ 1457 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1458 status = ath6kl_bmi_reg_write(ar, address, sleep); 1459 if (status) 1460 return status; 1461 1462 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1463 param = options | 0x20; 1464 status = ath6kl_bmi_reg_write(ar, address, param); 1465 if (status) 1466 return status; 1467 1468 return status; 1469 } 1470 1471 int ath6kl_init_hw_params(struct ath6kl *ar) 1472 { 1473 const struct ath6kl_hw *uninitialized_var(hw); 1474 int i; 1475 1476 for (i = 0; i < ARRAY_SIZE(hw_list); i++) { 1477 hw = &hw_list[i]; 1478 1479 if (hw->id == ar->version.target_ver) 1480 break; 1481 } 1482 1483 if (i == ARRAY_SIZE(hw_list)) { 1484 ath6kl_err("Unsupported hardware version: 0x%x\n", 1485 ar->version.target_ver); 1486 return -EINVAL; 1487 } 1488 1489 ar->hw = *hw; 1490 1491 ath6kl_dbg(ATH6KL_DBG_BOOT, 1492 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 1493 ar->version.target_ver, ar->target_type, 1494 ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 1495 ath6kl_dbg(ATH6KL_DBG_BOOT, 1496 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 1497 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 1498 ar->hw.reserved_ram_size); 1499 ath6kl_dbg(ATH6KL_DBG_BOOT, 1500 "refclk_hz %d uarttx_pin %d", 1501 ar->hw.refclk_hz, ar->hw.uarttx_pin); 1502 1503 return 0; 1504 } 1505 1506 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type) 1507 { 1508 switch (type) { 1509 case ATH6KL_HIF_TYPE_SDIO: 1510 return "sdio"; 1511 case ATH6KL_HIF_TYPE_USB: 1512 return "usb"; 1513 } 1514 1515 return NULL; 1516 } 1517 1518 int ath6kl_init_hw_start(struct ath6kl *ar) 1519 { 1520 long timeleft; 1521 int ret, i; 1522 1523 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); 1524 1525 ret = ath6kl_hif_power_on(ar); 1526 if (ret) 1527 return ret; 1528 1529 ret = ath6kl_configure_target(ar); 1530 if (ret) 1531 goto err_power_off; 1532 1533 ret = ath6kl_init_upload(ar); 1534 if (ret) 1535 goto err_power_off; 1536 1537 /* Do we need to finish the BMI phase */ 1538 /* FIXME: return error from ath6kl_bmi_done() */ 1539 if (ath6kl_bmi_done(ar)) { 1540 ret = -EIO; 1541 goto err_power_off; 1542 } 1543 1544 /* 1545 * The reason we have to wait for the target here is that the 1546 * driver layer has to init BMI in order to set the host block 1547 * size. 1548 */ 1549 if (ath6kl_htc_wait_target(ar->htc_target)) { 1550 ret = -EIO; 1551 goto err_power_off; 1552 } 1553 1554 if (ath6kl_init_service_ep(ar)) { 1555 ret = -EIO; 1556 goto err_cleanup_scatter; 1557 } 1558 1559 /* setup credit distribution */ 1560 ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info); 1561 1562 /* start HTC */ 1563 ret = ath6kl_htc_start(ar->htc_target); 1564 if (ret) { 1565 /* FIXME: call this */ 1566 ath6kl_cookie_cleanup(ar); 1567 goto err_cleanup_scatter; 1568 } 1569 1570 /* Wait for Wmi event to be ready */ 1571 timeleft = wait_event_interruptible_timeout(ar->event_wq, 1572 test_bit(WMI_READY, 1573 &ar->flag), 1574 WMI_TIMEOUT); 1575 1576 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 1577 1578 1579 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) { 1580 ath6kl_info("%s %s fw %s api %d%s\n", 1581 ar->hw.name, 1582 ath6kl_init_get_hif_name(ar->hif_type), 1583 ar->wiphy->fw_version, 1584 ar->fw_api, 1585 test_bit(TESTMODE, &ar->flag) ? " testmode" : ""); 1586 } 1587 1588 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 1589 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 1590 ATH6KL_ABI_VERSION, ar->version.abi_ver); 1591 ret = -EIO; 1592 goto err_htc_stop; 1593 } 1594 1595 if (!timeleft || signal_pending(current)) { 1596 ath6kl_err("wmi is not ready or wait was interrupted\n"); 1597 ret = -EIO; 1598 goto err_htc_stop; 1599 } 1600 1601 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 1602 1603 /* communicate the wmi protocol verision to the target */ 1604 /* FIXME: return error */ 1605 if ((ath6kl_set_host_app_area(ar)) != 0) 1606 ath6kl_err("unable to set the host app area\n"); 1607 1608 for (i = 0; i < ar->vif_max; i++) { 1609 ret = ath6kl_target_config_wlan_params(ar, i); 1610 if (ret) 1611 goto err_htc_stop; 1612 } 1613 1614 ar->state = ATH6KL_STATE_ON; 1615 1616 return 0; 1617 1618 err_htc_stop: 1619 ath6kl_htc_stop(ar->htc_target); 1620 err_cleanup_scatter: 1621 ath6kl_hif_cleanup_scatter(ar); 1622 err_power_off: 1623 ath6kl_hif_power_off(ar); 1624 1625 return ret; 1626 } 1627 1628 int ath6kl_init_hw_stop(struct ath6kl *ar) 1629 { 1630 int ret; 1631 1632 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); 1633 1634 ath6kl_htc_stop(ar->htc_target); 1635 1636 ath6kl_hif_stop(ar); 1637 1638 ath6kl_bmi_reset(ar); 1639 1640 ret = ath6kl_hif_power_off(ar); 1641 if (ret) 1642 ath6kl_warn("failed to power off hif: %d\n", ret); 1643 1644 ar->state = ATH6KL_STATE_OFF; 1645 1646 return 0; 1647 } 1648 1649 /* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */ 1650 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) 1651 { 1652 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 1653 bool discon_issued; 1654 1655 netif_stop_queue(vif->ndev); 1656 1657 clear_bit(WLAN_ENABLED, &vif->flags); 1658 1659 if (wmi_ready) { 1660 discon_issued = test_bit(CONNECTED, &vif->flags) || 1661 test_bit(CONNECT_PEND, &vif->flags); 1662 ath6kl_disconnect(vif); 1663 del_timer(&vif->disconnect_timer); 1664 1665 if (discon_issued) 1666 ath6kl_disconnect_event(vif, DISCONNECT_CMD, 1667 (vif->nw_type & AP_NETWORK) ? 1668 bcast_mac : vif->bssid, 1669 0, NULL, 0); 1670 } 1671 1672 if (vif->scan_req) { 1673 cfg80211_scan_done(vif->scan_req, true); 1674 vif->scan_req = NULL; 1675 } 1676 } 1677 1678 void ath6kl_stop_txrx(struct ath6kl *ar) 1679 { 1680 struct ath6kl_vif *vif, *tmp_vif; 1681 int i; 1682 1683 set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1684 1685 if (down_interruptible(&ar->sem)) { 1686 ath6kl_err("down_interruptible failed\n"); 1687 return; 1688 } 1689 1690 for (i = 0; i < AP_MAX_NUM_STA; i++) 1691 aggr_reset_state(ar->sta_list[i].aggr_conn); 1692 1693 spin_lock_bh(&ar->list_lock); 1694 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { 1695 list_del(&vif->list); 1696 spin_unlock_bh(&ar->list_lock); 1697 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); 1698 rtnl_lock(); 1699 ath6kl_cfg80211_vif_cleanup(vif); 1700 rtnl_unlock(); 1701 spin_lock_bh(&ar->list_lock); 1702 } 1703 spin_unlock_bh(&ar->list_lock); 1704 1705 clear_bit(WMI_READY, &ar->flag); 1706 1707 /* 1708 * After wmi_shudown all WMI events will be dropped. We 1709 * need to cleanup the buffers allocated in AP mode and 1710 * give disconnect notification to stack, which usually 1711 * happens in the disconnect_event. Simulate the disconnect 1712 * event by calling the function directly. Sometimes 1713 * disconnect_event will be received when the debug logs 1714 * are collected. 1715 */ 1716 ath6kl_wmi_shutdown(ar->wmi); 1717 1718 clear_bit(WMI_ENABLED, &ar->flag); 1719 if (ar->htc_target) { 1720 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); 1721 ath6kl_htc_stop(ar->htc_target); 1722 } 1723 1724 /* 1725 * Try to reset the device if we can. The driver may have been 1726 * configure NOT to reset the target during a debug session. 1727 */ 1728 ath6kl_dbg(ATH6KL_DBG_TRC, 1729 "attempting to reset target on instance destroy\n"); 1730 ath6kl_reset_device(ar, ar->target_type, true, true); 1731 1732 clear_bit(WLAN_ENABLED, &ar->flag); 1733 } 1734 EXPORT_SYMBOL(ath6kl_stop_txrx); 1735