1bdcd8170SKalle Valo 2bdcd8170SKalle Valo /* 3bdcd8170SKalle Valo * Copyright (c) 2011 Atheros Communications Inc. 4bdcd8170SKalle Valo * 5bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 6bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 7bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 8bdcd8170SKalle Valo * 9bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16bdcd8170SKalle Valo */ 17bdcd8170SKalle Valo 18c6efe578SStephen Rothwell #include <linux/moduleparam.h> 19f7830202SSangwook Lee #include <linux/errno.h> 2092ecbff4SSam Leffler #include <linux/of.h> 21bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h> 22bdcd8170SKalle Valo #include "core.h" 23bdcd8170SKalle Valo #include "cfg80211.h" 24bdcd8170SKalle Valo #include "target.h" 25bdcd8170SKalle Valo #include "debug.h" 26bdcd8170SKalle Valo #include "hif-ops.h" 27bdcd8170SKalle Valo 28bdcd8170SKalle Valo unsigned int debug_mask; 29003353b0SKalle Valo static unsigned int testmode; 308277de15SKalle Valo static bool suspend_cutpower; 31bdcd8170SKalle Valo 32bdcd8170SKalle Valo module_param(debug_mask, uint, 0644); 33003353b0SKalle Valo module_param(testmode, uint, 0644); 348277de15SKalle Valo module_param(suspend_cutpower, bool, 0444); 35bdcd8170SKalle Valo 36856f4b31SKalle Valo static const struct ath6kl_hw hw_list[] = { 37856f4b31SKalle Valo { 38856f4b31SKalle Valo .id = AR6003_REV2_VERSION, 39856f4b31SKalle Valo .dataset_patch_addr = 0x57e884, 40856f4b31SKalle Valo .app_load_addr = 0x543180, 41856f4b31SKalle Valo .board_ext_data_addr = 0x57e500, 42856f4b31SKalle Valo .reserved_ram_size = 6912, 43856f4b31SKalle Valo 44856f4b31SKalle Valo /* hw2.0 needs override address hardcoded */ 45856f4b31SKalle Valo .app_start_override_addr = 0x944C00, 46856f4b31SKalle Valo }, 47856f4b31SKalle Valo { 48856f4b31SKalle Valo .id = AR6003_REV3_VERSION, 49856f4b31SKalle Valo .dataset_patch_addr = 0x57ff74, 50856f4b31SKalle Valo .app_load_addr = 0x1234, 51856f4b31SKalle Valo .board_ext_data_addr = 0x542330, 52856f4b31SKalle Valo .reserved_ram_size = 512, 53856f4b31SKalle Valo }, 54856f4b31SKalle Valo { 55856f4b31SKalle Valo .id = AR6004_REV1_VERSION, 56856f4b31SKalle Valo .dataset_patch_addr = 0x57e884, 57856f4b31SKalle Valo .app_load_addr = 0x1234, 58856f4b31SKalle Valo .board_ext_data_addr = 0x437000, 59856f4b31SKalle Valo .reserved_ram_size = 19456, 60856f4b31SKalle Valo }, 61856f4b31SKalle Valo { 62856f4b31SKalle Valo .id = AR6004_REV2_VERSION, 63856f4b31SKalle Valo .dataset_patch_addr = 0x57e884, 64856f4b31SKalle Valo .app_load_addr = 0x1234, 65856f4b31SKalle Valo .board_ext_data_addr = 0x437000, 66856f4b31SKalle Valo .reserved_ram_size = 11264, 67856f4b31SKalle Valo }, 68856f4b31SKalle Valo }; 69856f4b31SKalle Valo 70bdcd8170SKalle Valo /* 71bdcd8170SKalle Valo * Include definitions here that can be used to tune the WLAN module 72bdcd8170SKalle Valo * behavior. Different customers can tune the behavior as per their needs, 73bdcd8170SKalle Valo * here. 74bdcd8170SKalle Valo */ 75bdcd8170SKalle Valo 76bdcd8170SKalle Valo /* 77bdcd8170SKalle Valo * This configuration item enable/disable keepalive support. 78bdcd8170SKalle Valo * Keepalive support: In the absence of any data traffic to AP, null 79bdcd8170SKalle Valo * frames will be sent to the AP at periodic interval, to keep the association 80bdcd8170SKalle Valo * active. This configuration item defines the periodic interval. 81bdcd8170SKalle Valo * Use value of zero to disable keepalive support 82bdcd8170SKalle Valo * Default: 60 seconds 83bdcd8170SKalle Valo */ 84bdcd8170SKalle Valo #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 85bdcd8170SKalle Valo 86bdcd8170SKalle Valo /* 87bdcd8170SKalle Valo * This configuration item sets the value of disconnect timeout 88bdcd8170SKalle Valo * Firmware delays sending the disconnec event to the host for this 89bdcd8170SKalle Valo * timeout after is gets disconnected from the current AP. 90bdcd8170SKalle Valo * If the firmware successly roams within the disconnect timeout 91bdcd8170SKalle Valo * it sends a new connect event 92bdcd8170SKalle Valo */ 93bdcd8170SKalle Valo #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 94bdcd8170SKalle Valo 95bdcd8170SKalle Valo #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8 96bdcd8170SKalle Valo 97bdcd8170SKalle Valo #define ATH6KL_DATA_OFFSET 64 98bdcd8170SKalle Valo struct sk_buff *ath6kl_buf_alloc(int size) 99bdcd8170SKalle Valo { 100bdcd8170SKalle Valo struct sk_buff *skb; 101bdcd8170SKalle Valo u16 reserved; 102bdcd8170SKalle Valo 103bdcd8170SKalle Valo /* Add chacheline space at front and back of buffer */ 104bdcd8170SKalle Valo reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 1051df94a85SVasanthakumar Thiagarajan sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; 106bdcd8170SKalle Valo skb = dev_alloc_skb(size + reserved); 107bdcd8170SKalle Valo 108bdcd8170SKalle Valo if (skb) 109bdcd8170SKalle Valo skb_reserve(skb, reserved - L1_CACHE_BYTES); 110bdcd8170SKalle Valo return skb; 111bdcd8170SKalle Valo } 112bdcd8170SKalle Valo 113e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif) 114bdcd8170SKalle Valo { 1153450334fSVasanthakumar Thiagarajan vif->ssid_len = 0; 1163450334fSVasanthakumar Thiagarajan memset(vif->ssid, 0, sizeof(vif->ssid)); 1173450334fSVasanthakumar Thiagarajan 1183450334fSVasanthakumar Thiagarajan vif->dot11_auth_mode = OPEN_AUTH; 1193450334fSVasanthakumar Thiagarajan vif->auth_mode = NONE_AUTH; 1203450334fSVasanthakumar Thiagarajan vif->prwise_crypto = NONE_CRYPT; 1213450334fSVasanthakumar Thiagarajan vif->prwise_crypto_len = 0; 1223450334fSVasanthakumar Thiagarajan vif->grp_crypto = NONE_CRYPT; 1233450334fSVasanthakumar Thiagarajan vif->grp_crypto_len = 0; 1246f2a73f9SVasanthakumar Thiagarajan memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 1258c8b65e3SVasanthakumar Thiagarajan memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); 1268c8b65e3SVasanthakumar Thiagarajan memset(vif->bssid, 0, sizeof(vif->bssid)); 127f74bac54SVasanthakumar Thiagarajan vif->bss_ch = 0; 128bdcd8170SKalle Valo } 129bdcd8170SKalle Valo 130bdcd8170SKalle Valo static int ath6kl_set_host_app_area(struct ath6kl *ar) 131bdcd8170SKalle Valo { 132bdcd8170SKalle Valo u32 address, data; 133bdcd8170SKalle Valo struct host_app_area host_app_area; 134bdcd8170SKalle Valo 135bdcd8170SKalle Valo /* Fetch the address of the host_app_area_s 136bdcd8170SKalle Valo * instance in the host interest area */ 137bdcd8170SKalle Valo address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 13831024d99SKevin Fang address = TARG_VTOP(ar->target_type, address); 139bdcd8170SKalle Valo 140addb44beSKalle Valo if (ath6kl_diag_read32(ar, address, &data)) 141bdcd8170SKalle Valo return -EIO; 142bdcd8170SKalle Valo 14331024d99SKevin Fang address = TARG_VTOP(ar->target_type, data); 144cbf49a6fSKalle Valo host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); 145addb44beSKalle Valo if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 146addb44beSKalle Valo sizeof(struct host_app_area))) 147bdcd8170SKalle Valo return -EIO; 148bdcd8170SKalle Valo 149bdcd8170SKalle Valo return 0; 150bdcd8170SKalle Valo } 151bdcd8170SKalle Valo 152bdcd8170SKalle Valo static inline void set_ac2_ep_map(struct ath6kl *ar, 153bdcd8170SKalle Valo u8 ac, 154bdcd8170SKalle Valo enum htc_endpoint_id ep) 155bdcd8170SKalle Valo { 156bdcd8170SKalle Valo ar->ac2ep_map[ac] = ep; 157bdcd8170SKalle Valo ar->ep2ac_map[ep] = ac; 158bdcd8170SKalle Valo } 159bdcd8170SKalle Valo 160bdcd8170SKalle Valo /* connect to a service */ 161bdcd8170SKalle Valo static int ath6kl_connectservice(struct ath6kl *ar, 162bdcd8170SKalle Valo struct htc_service_connect_req *con_req, 163bdcd8170SKalle Valo char *desc) 164bdcd8170SKalle Valo { 165bdcd8170SKalle Valo int status; 166bdcd8170SKalle Valo struct htc_service_connect_resp response; 167bdcd8170SKalle Valo 168bdcd8170SKalle Valo memset(&response, 0, sizeof(response)); 169bdcd8170SKalle Valo 170ad226ec2SKalle Valo status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 171bdcd8170SKalle Valo if (status) { 172bdcd8170SKalle Valo ath6kl_err("failed to connect to %s service status:%d\n", 173bdcd8170SKalle Valo desc, status); 174bdcd8170SKalle Valo return status; 175bdcd8170SKalle Valo } 176bdcd8170SKalle Valo 177bdcd8170SKalle Valo switch (con_req->svc_id) { 178bdcd8170SKalle Valo case WMI_CONTROL_SVC: 179bdcd8170SKalle Valo if (test_bit(WMI_ENABLED, &ar->flag)) 180bdcd8170SKalle Valo ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 181bdcd8170SKalle Valo ar->ctrl_ep = response.endpoint; 182bdcd8170SKalle Valo break; 183bdcd8170SKalle Valo case WMI_DATA_BE_SVC: 184bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 185bdcd8170SKalle Valo break; 186bdcd8170SKalle Valo case WMI_DATA_BK_SVC: 187bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 188bdcd8170SKalle Valo break; 189bdcd8170SKalle Valo case WMI_DATA_VI_SVC: 190bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 191bdcd8170SKalle Valo break; 192bdcd8170SKalle Valo case WMI_DATA_VO_SVC: 193bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 194bdcd8170SKalle Valo break; 195bdcd8170SKalle Valo default: 196bdcd8170SKalle Valo ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 197bdcd8170SKalle Valo return -EINVAL; 198bdcd8170SKalle Valo } 199bdcd8170SKalle Valo 200bdcd8170SKalle Valo return 0; 201bdcd8170SKalle Valo } 202bdcd8170SKalle Valo 203bdcd8170SKalle Valo static int ath6kl_init_service_ep(struct ath6kl *ar) 204bdcd8170SKalle Valo { 205bdcd8170SKalle Valo struct htc_service_connect_req connect; 206bdcd8170SKalle Valo 207bdcd8170SKalle Valo memset(&connect, 0, sizeof(connect)); 208bdcd8170SKalle Valo 209bdcd8170SKalle Valo /* these fields are the same for all service endpoints */ 210bdcd8170SKalle Valo connect.ep_cb.rx = ath6kl_rx; 211bdcd8170SKalle Valo connect.ep_cb.rx_refill = ath6kl_rx_refill; 212bdcd8170SKalle Valo connect.ep_cb.tx_full = ath6kl_tx_queue_full; 213bdcd8170SKalle Valo 214bdcd8170SKalle Valo /* 215bdcd8170SKalle Valo * Set the max queue depth so that our ath6kl_tx_queue_full handler 216bdcd8170SKalle Valo * gets called. 217bdcd8170SKalle Valo */ 218bdcd8170SKalle Valo connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 219bdcd8170SKalle Valo connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 220bdcd8170SKalle Valo if (!connect.ep_cb.rx_refill_thresh) 221bdcd8170SKalle Valo connect.ep_cb.rx_refill_thresh++; 222bdcd8170SKalle Valo 223bdcd8170SKalle Valo /* connect to control service */ 224bdcd8170SKalle Valo connect.svc_id = WMI_CONTROL_SVC; 225bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 226bdcd8170SKalle Valo return -EIO; 227bdcd8170SKalle Valo 228bdcd8170SKalle Valo connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 229bdcd8170SKalle Valo 230bdcd8170SKalle Valo /* 231bdcd8170SKalle Valo * Limit the HTC message size on the send path, although e can 232bdcd8170SKalle Valo * receive A-MSDU frames of 4K, we will only send ethernet-sized 233bdcd8170SKalle Valo * (802.3) frames on the send path. 234bdcd8170SKalle Valo */ 235bdcd8170SKalle Valo connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 236bdcd8170SKalle Valo 237bdcd8170SKalle Valo /* 238bdcd8170SKalle Valo * To reduce the amount of committed memory for larger A_MSDU 239bdcd8170SKalle Valo * frames, use the recv-alloc threshold mechanism for larger 240bdcd8170SKalle Valo * packets. 241bdcd8170SKalle Valo */ 242bdcd8170SKalle Valo connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 243bdcd8170SKalle Valo connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 244bdcd8170SKalle Valo 245bdcd8170SKalle Valo /* 246bdcd8170SKalle Valo * For the remaining data services set the connection flag to 247bdcd8170SKalle Valo * reduce dribbling, if configured to do so. 248bdcd8170SKalle Valo */ 249bdcd8170SKalle Valo connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 250bdcd8170SKalle Valo connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 251bdcd8170SKalle Valo connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 252bdcd8170SKalle Valo 253bdcd8170SKalle Valo connect.svc_id = WMI_DATA_BE_SVC; 254bdcd8170SKalle Valo 255bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 256bdcd8170SKalle Valo return -EIO; 257bdcd8170SKalle Valo 258bdcd8170SKalle Valo /* connect to back-ground map this to WMI LOW_PRI */ 259bdcd8170SKalle Valo connect.svc_id = WMI_DATA_BK_SVC; 260bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 261bdcd8170SKalle Valo return -EIO; 262bdcd8170SKalle Valo 263bdcd8170SKalle Valo /* connect to Video service, map this to to HI PRI */ 264bdcd8170SKalle Valo connect.svc_id = WMI_DATA_VI_SVC; 265bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 266bdcd8170SKalle Valo return -EIO; 267bdcd8170SKalle Valo 268bdcd8170SKalle Valo /* 269bdcd8170SKalle Valo * Connect to VO service, this is currently not mapped to a WMI 270bdcd8170SKalle Valo * priority stream due to historical reasons. WMI originally 271bdcd8170SKalle Valo * defined 3 priorities over 3 mailboxes We can change this when 272bdcd8170SKalle Valo * WMI is reworked so that priorities are not dependent on 273bdcd8170SKalle Valo * mailboxes. 274bdcd8170SKalle Valo */ 275bdcd8170SKalle Valo connect.svc_id = WMI_DATA_VO_SVC; 276bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 277bdcd8170SKalle Valo return -EIO; 278bdcd8170SKalle Valo 279bdcd8170SKalle Valo return 0; 280bdcd8170SKalle Valo } 281bdcd8170SKalle Valo 282e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif) 283bdcd8170SKalle Valo { 284e29f25f5SVasanthakumar Thiagarajan ath6kl_init_profile_info(vif); 2853450334fSVasanthakumar Thiagarajan vif->def_txkey_index = 0; 2866f2a73f9SVasanthakumar Thiagarajan memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 287f74bac54SVasanthakumar Thiagarajan vif->ch_hint = 0; 288bdcd8170SKalle Valo } 289bdcd8170SKalle Valo 290bdcd8170SKalle Valo /* 291bdcd8170SKalle Valo * Set HTC/Mbox operational parameters, this can only be called when the 292bdcd8170SKalle Valo * target is in the BMI phase. 293bdcd8170SKalle Valo */ 294bdcd8170SKalle Valo static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 295bdcd8170SKalle Valo u8 htc_ctrl_buf) 296bdcd8170SKalle Valo { 297bdcd8170SKalle Valo int status; 298bdcd8170SKalle Valo u32 blk_size; 299bdcd8170SKalle Valo 300bdcd8170SKalle Valo blk_size = ar->mbox_info.block_size; 301bdcd8170SKalle Valo 302bdcd8170SKalle Valo if (htc_ctrl_buf) 303bdcd8170SKalle Valo blk_size |= ((u32)htc_ctrl_buf) << 16; 304bdcd8170SKalle Valo 305bdcd8170SKalle Valo /* set the host interest area for the block size */ 306bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 307bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 308bdcd8170SKalle Valo HI_ITEM(hi_mbox_io_block_sz)), 309bdcd8170SKalle Valo (u8 *)&blk_size, 310bdcd8170SKalle Valo 4); 311bdcd8170SKalle Valo if (status) { 312bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for IO block size failed\n"); 313bdcd8170SKalle Valo goto out; 314bdcd8170SKalle Valo } 315bdcd8170SKalle Valo 316bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 317bdcd8170SKalle Valo blk_size, 318bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 319bdcd8170SKalle Valo 320bdcd8170SKalle Valo if (mbox_isr_yield_val) { 321bdcd8170SKalle Valo /* set the host interest area for the mbox ISR yield limit */ 322bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 323bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 324bdcd8170SKalle Valo HI_ITEM(hi_mbox_isr_yield_limit)), 325bdcd8170SKalle Valo (u8 *)&mbox_isr_yield_val, 326bdcd8170SKalle Valo 4); 327bdcd8170SKalle Valo if (status) { 328bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for yield limit failed\n"); 329bdcd8170SKalle Valo goto out; 330bdcd8170SKalle Valo } 331bdcd8170SKalle Valo } 332bdcd8170SKalle Valo 333bdcd8170SKalle Valo out: 334bdcd8170SKalle Valo return status; 335bdcd8170SKalle Valo } 336bdcd8170SKalle Valo 3370ce59445SVasanthakumar Thiagarajan static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) 338bdcd8170SKalle Valo { 339bdcd8170SKalle Valo int status = 0; 3404dea08e0SJouni Malinen int ret; 341bdcd8170SKalle Valo 342bdcd8170SKalle Valo /* 343bdcd8170SKalle Valo * Configure the device for rx dot11 header rules. "0,0" are the 344bdcd8170SKalle Valo * default values. Required if checksum offload is needed. Set 345bdcd8170SKalle Valo * RxMetaVersion to 2. 346bdcd8170SKalle Valo */ 3470ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, 348bdcd8170SKalle Valo ar->rx_meta_ver, 0, 0)) { 349bdcd8170SKalle Valo ath6kl_err("unable to set the rx frame format\n"); 350bdcd8170SKalle Valo status = -EIO; 351bdcd8170SKalle Valo } 352bdcd8170SKalle Valo 353bdcd8170SKalle Valo if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) 3540ce59445SVasanthakumar Thiagarajan if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, 355bdcd8170SKalle Valo IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { 356bdcd8170SKalle Valo ath6kl_err("unable to set power save fail event policy\n"); 357bdcd8170SKalle Valo status = -EIO; 358bdcd8170SKalle Valo } 359bdcd8170SKalle Valo 360bdcd8170SKalle Valo if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) 3610ce59445SVasanthakumar Thiagarajan if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, 362bdcd8170SKalle Valo WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { 363bdcd8170SKalle Valo ath6kl_err("unable to set barker preamble policy\n"); 364bdcd8170SKalle Valo status = -EIO; 365bdcd8170SKalle Valo } 366bdcd8170SKalle Valo 3670ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, 368bdcd8170SKalle Valo WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { 369bdcd8170SKalle Valo ath6kl_err("unable to set keep alive interval\n"); 370bdcd8170SKalle Valo status = -EIO; 371bdcd8170SKalle Valo } 372bdcd8170SKalle Valo 3730ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, 374bdcd8170SKalle Valo WLAN_CONFIG_DISCONNECT_TIMEOUT)) { 375bdcd8170SKalle Valo ath6kl_err("unable to set disconnect timeout\n"); 376bdcd8170SKalle Valo status = -EIO; 377bdcd8170SKalle Valo } 378bdcd8170SKalle Valo 379bdcd8170SKalle Valo if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) 3800ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) { 381bdcd8170SKalle Valo ath6kl_err("unable to set txop bursting\n"); 382bdcd8170SKalle Valo status = -EIO; 383bdcd8170SKalle Valo } 384bdcd8170SKalle Valo 3850ce59445SVasanthakumar Thiagarajan /* 3860ce59445SVasanthakumar Thiagarajan * FIXME: Make sure p2p configurations are not applied to 3870ce59445SVasanthakumar Thiagarajan * non-p2p capable interfaces when multivif support is enabled. 3880ce59445SVasanthakumar Thiagarajan */ 3896bbc7c35SJouni Malinen if (ar->p2p) { 3900ce59445SVasanthakumar Thiagarajan ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, 3916bbc7c35SJouni Malinen P2P_FLAG_CAPABILITIES_REQ | 3924dea08e0SJouni Malinen P2P_FLAG_MACADDR_REQ | 3934dea08e0SJouni Malinen P2P_FLAG_HMODEL_REQ); 3944dea08e0SJouni Malinen if (ret) { 3954dea08e0SJouni Malinen ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " 3966bbc7c35SJouni Malinen "capabilities (%d) - assuming P2P not " 3976bbc7c35SJouni Malinen "supported\n", ret); 3986bbc7c35SJouni Malinen ar->p2p = 0; 3996bbc7c35SJouni Malinen } 4006bbc7c35SJouni Malinen } 4016bbc7c35SJouni Malinen 4020ce59445SVasanthakumar Thiagarajan /* 4030ce59445SVasanthakumar Thiagarajan * FIXME: Make sure p2p configurations are not applied to 4040ce59445SVasanthakumar Thiagarajan * non-p2p capable interfaces when multivif support is enabled. 4050ce59445SVasanthakumar Thiagarajan */ 4066bbc7c35SJouni Malinen if (ar->p2p) { 4076bbc7c35SJouni Malinen /* Enable Probe Request reporting for P2P */ 4080ce59445SVasanthakumar Thiagarajan ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 4096bbc7c35SJouni Malinen if (ret) { 4106bbc7c35SJouni Malinen ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " 4116bbc7c35SJouni Malinen "Request reporting (%d)\n", ret); 4126bbc7c35SJouni Malinen } 4134dea08e0SJouni Malinen } 4144dea08e0SJouni Malinen 415bdcd8170SKalle Valo return status; 416bdcd8170SKalle Valo } 417bdcd8170SKalle Valo 418bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar) 419bdcd8170SKalle Valo { 420bdcd8170SKalle Valo u32 param, ram_reserved_size; 4213226f68aSVasanthakumar Thiagarajan u8 fw_iftype, fw_mode = 0, fw_submode = 0; 4227b85832dSVasanthakumar Thiagarajan int i; 423bdcd8170SKalle Valo 4247b85832dSVasanthakumar Thiagarajan /* 4257b85832dSVasanthakumar Thiagarajan * Note: Even though the firmware interface type is 4267b85832dSVasanthakumar Thiagarajan * chosen as BSS_STA for all three interfaces, can 4277b85832dSVasanthakumar Thiagarajan * be configured to IBSS/AP as long as the fw submode 4287b85832dSVasanthakumar Thiagarajan * remains normal mode (0 - AP, STA and IBSS). But 4297b85832dSVasanthakumar Thiagarajan * due to an target assert in firmware only one interface is 4307b85832dSVasanthakumar Thiagarajan * configured for now. 4317b85832dSVasanthakumar Thiagarajan */ 432dd3751f7SVasanthakumar Thiagarajan fw_iftype = HI_OPTION_FW_MODE_BSS_STA; 433bdcd8170SKalle Valo 4347b85832dSVasanthakumar Thiagarajan for (i = 0; i < MAX_NUM_VIF; i++) 4357b85832dSVasanthakumar Thiagarajan fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); 4367b85832dSVasanthakumar Thiagarajan 4377b85832dSVasanthakumar Thiagarajan /* 4383226f68aSVasanthakumar Thiagarajan * By default, submodes : 4393226f68aSVasanthakumar Thiagarajan * vif[0] - AP/STA/IBSS 4407b85832dSVasanthakumar Thiagarajan * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" 4417b85832dSVasanthakumar Thiagarajan * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" 4427b85832dSVasanthakumar Thiagarajan */ 4433226f68aSVasanthakumar Thiagarajan 4443226f68aSVasanthakumar Thiagarajan for (i = 0; i < ar->max_norm_iface; i++) 4453226f68aSVasanthakumar Thiagarajan fw_submode |= HI_OPTION_FW_SUBMODE_NONE << 4463226f68aSVasanthakumar Thiagarajan (i * HI_OPTION_FW_SUBMODE_BITS); 4473226f68aSVasanthakumar Thiagarajan 4483226f68aSVasanthakumar Thiagarajan for (i = ar->max_norm_iface; i < MAX_NUM_VIF; i++) 4493226f68aSVasanthakumar Thiagarajan fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 4503226f68aSVasanthakumar Thiagarajan (i * HI_OPTION_FW_SUBMODE_BITS); 4517b85832dSVasanthakumar Thiagarajan 4527b85832dSVasanthakumar Thiagarajan /* 4537b85832dSVasanthakumar Thiagarajan * FIXME: This needs to be removed once the multivif 4547b85832dSVasanthakumar Thiagarajan * support is enabled. 4557b85832dSVasanthakumar Thiagarajan */ 4567b85832dSVasanthakumar Thiagarajan if (ar->p2p) 4577b85832dSVasanthakumar Thiagarajan fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; 4587b85832dSVasanthakumar Thiagarajan 459bdcd8170SKalle Valo param = HTC_PROTOCOL_VERSION; 460bdcd8170SKalle Valo if (ath6kl_bmi_write(ar, 461bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 462bdcd8170SKalle Valo HI_ITEM(hi_app_host_interest)), 463bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 464bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for htc version failed\n"); 465bdcd8170SKalle Valo return -EIO; 466bdcd8170SKalle Valo } 467bdcd8170SKalle Valo 468bdcd8170SKalle Valo /* set the firmware mode to STA/IBSS/AP */ 469bdcd8170SKalle Valo param = 0; 470bdcd8170SKalle Valo 471bdcd8170SKalle Valo if (ath6kl_bmi_read(ar, 472bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 473bdcd8170SKalle Valo HI_ITEM(hi_option_flag)), 474bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 475bdcd8170SKalle Valo ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 476bdcd8170SKalle Valo return -EIO; 477bdcd8170SKalle Valo } 478bdcd8170SKalle Valo 4797b85832dSVasanthakumar Thiagarajan param |= (MAX_NUM_VIF << HI_OPTION_NUM_DEV_SHIFT); 4807b85832dSVasanthakumar Thiagarajan param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; 4817b85832dSVasanthakumar Thiagarajan param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; 4827b85832dSVasanthakumar Thiagarajan 483bdcd8170SKalle Valo param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 484bdcd8170SKalle Valo param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 485bdcd8170SKalle Valo 486bdcd8170SKalle Valo if (ath6kl_bmi_write(ar, 487bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 488bdcd8170SKalle Valo HI_ITEM(hi_option_flag)), 489bdcd8170SKalle Valo (u8 *)¶m, 490bdcd8170SKalle Valo 4) != 0) { 491bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 492bdcd8170SKalle Valo return -EIO; 493bdcd8170SKalle Valo } 494bdcd8170SKalle Valo 495bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 496bdcd8170SKalle Valo 497bdcd8170SKalle Valo /* 498bdcd8170SKalle Valo * Hardcode the address use for the extended board data 499bdcd8170SKalle Valo * Ideally this should be pre-allocate by the OS at boot time 500bdcd8170SKalle Valo * But since it is a new feature and board data is loaded 501bdcd8170SKalle Valo * at init time, we have to workaround this from host. 502bdcd8170SKalle Valo * It is difficult to patch the firmware boot code, 503bdcd8170SKalle Valo * but possible in theory. 504bdcd8170SKalle Valo */ 505bdcd8170SKalle Valo 506991b27eaSKalle Valo param = ar->hw.board_ext_data_addr; 507991b27eaSKalle Valo ram_reserved_size = ar->hw.reserved_ram_size; 508bdcd8170SKalle Valo 509991b27eaSKalle Valo if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 510bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data)), 511bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 512bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 513bdcd8170SKalle Valo return -EIO; 514bdcd8170SKalle Valo } 515991b27eaSKalle Valo 516991b27eaSKalle Valo if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 517bdcd8170SKalle Valo HI_ITEM(hi_end_ram_reserve_sz)), 518bdcd8170SKalle Valo (u8 *)&ram_reserved_size, 4) != 0) { 519bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 520bdcd8170SKalle Valo return -EIO; 521bdcd8170SKalle Valo } 522bdcd8170SKalle Valo 523bdcd8170SKalle Valo /* set the block size for the target */ 524bdcd8170SKalle Valo if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 525bdcd8170SKalle Valo /* use default number of control buffers */ 526bdcd8170SKalle Valo return -EIO; 527bdcd8170SKalle Valo 528bdcd8170SKalle Valo return 0; 529bdcd8170SKalle Valo } 530bdcd8170SKalle Valo 5318dafb70eSVasanthakumar Thiagarajan void ath6kl_core_free(struct ath6kl *ar) 532bdcd8170SKalle Valo { 5338dafb70eSVasanthakumar Thiagarajan wiphy_free(ar->wiphy); 534bdcd8170SKalle Valo } 535bdcd8170SKalle Valo 5366db8fa53SVasanthakumar Thiagarajan void ath6kl_core_cleanup(struct ath6kl *ar) 537bdcd8170SKalle Valo { 538b2e75698SKalle Valo ath6kl_hif_power_off(ar); 539b2e75698SKalle Valo 5406db8fa53SVasanthakumar Thiagarajan destroy_workqueue(ar->ath6kl_wq); 541bdcd8170SKalle Valo 5426db8fa53SVasanthakumar Thiagarajan if (ar->htc_target) 5436db8fa53SVasanthakumar Thiagarajan ath6kl_htc_cleanup(ar->htc_target); 5446db8fa53SVasanthakumar Thiagarajan 5456db8fa53SVasanthakumar Thiagarajan ath6kl_cookie_cleanup(ar); 5466db8fa53SVasanthakumar Thiagarajan 5476db8fa53SVasanthakumar Thiagarajan ath6kl_cleanup_amsdu_rxbufs(ar); 5486db8fa53SVasanthakumar Thiagarajan 5496db8fa53SVasanthakumar Thiagarajan ath6kl_bmi_cleanup(ar); 5506db8fa53SVasanthakumar Thiagarajan 5516db8fa53SVasanthakumar Thiagarajan ath6kl_debug_cleanup(ar); 5526db8fa53SVasanthakumar Thiagarajan 5536db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_board); 5546db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_otp); 5556db8fa53SVasanthakumar Thiagarajan kfree(ar->fw); 5566db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_patch); 5576db8fa53SVasanthakumar Thiagarajan 5586db8fa53SVasanthakumar Thiagarajan ath6kl_deinit_ieee80211_hw(ar); 559bdcd8170SKalle Valo } 560bdcd8170SKalle Valo 561bdcd8170SKalle Valo /* firmware upload */ 562bdcd8170SKalle Valo static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 563bdcd8170SKalle Valo u8 **fw, size_t *fw_len) 564bdcd8170SKalle Valo { 565bdcd8170SKalle Valo const struct firmware *fw_entry; 566bdcd8170SKalle Valo int ret; 567bdcd8170SKalle Valo 568bdcd8170SKalle Valo ret = request_firmware(&fw_entry, filename, ar->dev); 569bdcd8170SKalle Valo if (ret) 570bdcd8170SKalle Valo return ret; 571bdcd8170SKalle Valo 572bdcd8170SKalle Valo *fw_len = fw_entry->size; 573bdcd8170SKalle Valo *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 574bdcd8170SKalle Valo 575bdcd8170SKalle Valo if (*fw == NULL) 576bdcd8170SKalle Valo ret = -ENOMEM; 577bdcd8170SKalle Valo 578bdcd8170SKalle Valo release_firmware(fw_entry); 579bdcd8170SKalle Valo 580bdcd8170SKalle Valo return ret; 581bdcd8170SKalle Valo } 582bdcd8170SKalle Valo 58392ecbff4SSam Leffler #ifdef CONFIG_OF 58492ecbff4SSam Leffler static const char *get_target_ver_dir(const struct ath6kl *ar) 58592ecbff4SSam Leffler { 58692ecbff4SSam Leffler switch (ar->version.target_ver) { 58792ecbff4SSam Leffler case AR6003_REV1_VERSION: 58892ecbff4SSam Leffler return "ath6k/AR6003/hw1.0"; 58992ecbff4SSam Leffler case AR6003_REV2_VERSION: 59092ecbff4SSam Leffler return "ath6k/AR6003/hw2.0"; 59192ecbff4SSam Leffler case AR6003_REV3_VERSION: 59292ecbff4SSam Leffler return "ath6k/AR6003/hw2.1.1"; 59392ecbff4SSam Leffler } 59492ecbff4SSam Leffler ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__, 59592ecbff4SSam Leffler ar->version.target_ver); 59692ecbff4SSam Leffler return NULL; 59792ecbff4SSam Leffler } 59892ecbff4SSam Leffler 59992ecbff4SSam Leffler /* 60092ecbff4SSam Leffler * Check the device tree for a board-id and use it to construct 60192ecbff4SSam Leffler * the pathname to the firmware file. Used (for now) to find a 60292ecbff4SSam Leffler * fallback to the "bdata.bin" file--typically a symlink to the 60392ecbff4SSam Leffler * appropriate board-specific file. 60492ecbff4SSam Leffler */ 60592ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar) 60692ecbff4SSam Leffler { 60792ecbff4SSam Leffler static const char *board_id_prop = "atheros,board-id"; 60892ecbff4SSam Leffler struct device_node *node; 60992ecbff4SSam Leffler char board_filename[64]; 61092ecbff4SSam Leffler const char *board_id; 61192ecbff4SSam Leffler int ret; 61292ecbff4SSam Leffler 61392ecbff4SSam Leffler for_each_compatible_node(node, NULL, "atheros,ath6kl") { 61492ecbff4SSam Leffler board_id = of_get_property(node, board_id_prop, NULL); 61592ecbff4SSam Leffler if (board_id == NULL) { 61692ecbff4SSam Leffler ath6kl_warn("No \"%s\" property on %s node.\n", 61792ecbff4SSam Leffler board_id_prop, node->name); 61892ecbff4SSam Leffler continue; 61992ecbff4SSam Leffler } 62092ecbff4SSam Leffler snprintf(board_filename, sizeof(board_filename), 62192ecbff4SSam Leffler "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id); 62292ecbff4SSam Leffler 62392ecbff4SSam Leffler ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 62492ecbff4SSam Leffler &ar->fw_board_len); 62592ecbff4SSam Leffler if (ret) { 62692ecbff4SSam Leffler ath6kl_err("Failed to get DT board file %s: %d\n", 62792ecbff4SSam Leffler board_filename, ret); 62892ecbff4SSam Leffler continue; 62992ecbff4SSam Leffler } 63092ecbff4SSam Leffler return true; 63192ecbff4SSam Leffler } 63292ecbff4SSam Leffler return false; 63392ecbff4SSam Leffler } 63492ecbff4SSam Leffler #else 63592ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar) 63692ecbff4SSam Leffler { 63792ecbff4SSam Leffler return false; 63892ecbff4SSam Leffler } 63992ecbff4SSam Leffler #endif /* CONFIG_OF */ 64092ecbff4SSam Leffler 641bdcd8170SKalle Valo static int ath6kl_fetch_board_file(struct ath6kl *ar) 642bdcd8170SKalle Valo { 643bdcd8170SKalle Valo const char *filename; 644bdcd8170SKalle Valo int ret; 645bdcd8170SKalle Valo 646772c31eeSKalle Valo if (ar->fw_board != NULL) 647772c31eeSKalle Valo return 0; 648772c31eeSKalle Valo 649bdcd8170SKalle Valo switch (ar->version.target_ver) { 650bdcd8170SKalle Valo case AR6003_REV2_VERSION: 651bdcd8170SKalle Valo filename = AR6003_REV2_BOARD_DATA_FILE; 652bdcd8170SKalle Valo break; 65331024d99SKevin Fang case AR6004_REV1_VERSION: 65431024d99SKevin Fang filename = AR6004_REV1_BOARD_DATA_FILE; 65531024d99SKevin Fang break; 656bdcd8170SKalle Valo default: 657bdcd8170SKalle Valo filename = AR6003_REV3_BOARD_DATA_FILE; 658bdcd8170SKalle Valo break; 659bdcd8170SKalle Valo } 660bdcd8170SKalle Valo 661bdcd8170SKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 662bdcd8170SKalle Valo &ar->fw_board_len); 663bdcd8170SKalle Valo if (ret == 0) { 664bdcd8170SKalle Valo /* managed to get proper board file */ 665bdcd8170SKalle Valo return 0; 666bdcd8170SKalle Valo } 667bdcd8170SKalle Valo 66892ecbff4SSam Leffler if (check_device_tree(ar)) { 66992ecbff4SSam Leffler /* got board file from device tree */ 67092ecbff4SSam Leffler return 0; 67192ecbff4SSam Leffler } 67292ecbff4SSam Leffler 673bdcd8170SKalle Valo /* there was no proper board file, try to use default instead */ 674bdcd8170SKalle Valo ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 675bdcd8170SKalle Valo filename, ret); 676bdcd8170SKalle Valo 677bdcd8170SKalle Valo switch (ar->version.target_ver) { 678bdcd8170SKalle Valo case AR6003_REV2_VERSION: 679bdcd8170SKalle Valo filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE; 680bdcd8170SKalle Valo break; 68131024d99SKevin Fang case AR6004_REV1_VERSION: 68231024d99SKevin Fang filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE; 68331024d99SKevin Fang break; 684bdcd8170SKalle Valo default: 685bdcd8170SKalle Valo filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE; 686bdcd8170SKalle Valo break; 687bdcd8170SKalle Valo } 688bdcd8170SKalle Valo 689bdcd8170SKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 690bdcd8170SKalle Valo &ar->fw_board_len); 691bdcd8170SKalle Valo if (ret) { 692bdcd8170SKalle Valo ath6kl_err("Failed to get default board file %s: %d\n", 693bdcd8170SKalle Valo filename, ret); 694bdcd8170SKalle Valo return ret; 695bdcd8170SKalle Valo } 696bdcd8170SKalle Valo 697bdcd8170SKalle Valo ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 698bdcd8170SKalle Valo ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 699bdcd8170SKalle Valo 700bdcd8170SKalle Valo return 0; 701bdcd8170SKalle Valo } 702bdcd8170SKalle Valo 703772c31eeSKalle Valo static int ath6kl_fetch_otp_file(struct ath6kl *ar) 704772c31eeSKalle Valo { 705772c31eeSKalle Valo const char *filename; 706772c31eeSKalle Valo int ret; 707772c31eeSKalle Valo 708772c31eeSKalle Valo if (ar->fw_otp != NULL) 709772c31eeSKalle Valo return 0; 710772c31eeSKalle Valo 711772c31eeSKalle Valo switch (ar->version.target_ver) { 712772c31eeSKalle Valo case AR6003_REV2_VERSION: 713772c31eeSKalle Valo filename = AR6003_REV2_OTP_FILE; 714772c31eeSKalle Valo break; 715772c31eeSKalle Valo case AR6004_REV1_VERSION: 716772c31eeSKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n"); 717772c31eeSKalle Valo return 0; 718772c31eeSKalle Valo break; 719772c31eeSKalle Valo default: 720772c31eeSKalle Valo filename = AR6003_REV3_OTP_FILE; 721772c31eeSKalle Valo break; 722772c31eeSKalle Valo } 723772c31eeSKalle Valo 724772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 725772c31eeSKalle Valo &ar->fw_otp_len); 726772c31eeSKalle Valo if (ret) { 727772c31eeSKalle Valo ath6kl_err("Failed to get OTP file %s: %d\n", 728772c31eeSKalle Valo filename, ret); 729772c31eeSKalle Valo return ret; 730772c31eeSKalle Valo } 731772c31eeSKalle Valo 732772c31eeSKalle Valo return 0; 733772c31eeSKalle Valo } 734772c31eeSKalle Valo 735772c31eeSKalle Valo static int ath6kl_fetch_fw_file(struct ath6kl *ar) 736772c31eeSKalle Valo { 737772c31eeSKalle Valo const char *filename; 738772c31eeSKalle Valo int ret; 739772c31eeSKalle Valo 740772c31eeSKalle Valo if (ar->fw != NULL) 741772c31eeSKalle Valo return 0; 742772c31eeSKalle Valo 743772c31eeSKalle Valo if (testmode) { 744772c31eeSKalle Valo switch (ar->version.target_ver) { 745772c31eeSKalle Valo case AR6003_REV2_VERSION: 746772c31eeSKalle Valo filename = AR6003_REV2_TCMD_FIRMWARE_FILE; 747772c31eeSKalle Valo break; 748772c31eeSKalle Valo case AR6003_REV3_VERSION: 749772c31eeSKalle Valo filename = AR6003_REV3_TCMD_FIRMWARE_FILE; 750772c31eeSKalle Valo break; 751772c31eeSKalle Valo case AR6004_REV1_VERSION: 752772c31eeSKalle Valo ath6kl_warn("testmode not supported with ar6004\n"); 753772c31eeSKalle Valo return -EOPNOTSUPP; 754772c31eeSKalle Valo default: 755772c31eeSKalle Valo ath6kl_warn("unknown target version: 0x%x\n", 756772c31eeSKalle Valo ar->version.target_ver); 757772c31eeSKalle Valo return -EINVAL; 758772c31eeSKalle Valo } 759772c31eeSKalle Valo 760772c31eeSKalle Valo set_bit(TESTMODE, &ar->flag); 761772c31eeSKalle Valo 762772c31eeSKalle Valo goto get_fw; 763772c31eeSKalle Valo } 764772c31eeSKalle Valo 765772c31eeSKalle Valo switch (ar->version.target_ver) { 766772c31eeSKalle Valo case AR6003_REV2_VERSION: 767772c31eeSKalle Valo filename = AR6003_REV2_FIRMWARE_FILE; 768772c31eeSKalle Valo break; 769772c31eeSKalle Valo case AR6004_REV1_VERSION: 770772c31eeSKalle Valo filename = AR6004_REV1_FIRMWARE_FILE; 771772c31eeSKalle Valo break; 772772c31eeSKalle Valo default: 773772c31eeSKalle Valo filename = AR6003_REV3_FIRMWARE_FILE; 774772c31eeSKalle Valo break; 775772c31eeSKalle Valo } 776772c31eeSKalle Valo 777772c31eeSKalle Valo get_fw: 778772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 779772c31eeSKalle Valo if (ret) { 780772c31eeSKalle Valo ath6kl_err("Failed to get firmware file %s: %d\n", 781772c31eeSKalle Valo filename, ret); 782772c31eeSKalle Valo return ret; 783772c31eeSKalle Valo } 784772c31eeSKalle Valo 785772c31eeSKalle Valo return 0; 786772c31eeSKalle Valo } 787772c31eeSKalle Valo 788772c31eeSKalle Valo static int ath6kl_fetch_patch_file(struct ath6kl *ar) 789772c31eeSKalle Valo { 790772c31eeSKalle Valo const char *filename; 791772c31eeSKalle Valo int ret; 792772c31eeSKalle Valo 793772c31eeSKalle Valo switch (ar->version.target_ver) { 794772c31eeSKalle Valo case AR6003_REV2_VERSION: 795772c31eeSKalle Valo filename = AR6003_REV2_PATCH_FILE; 796772c31eeSKalle Valo break; 797772c31eeSKalle Valo case AR6004_REV1_VERSION: 798772c31eeSKalle Valo /* FIXME: implement for AR6004 */ 799772c31eeSKalle Valo return 0; 800772c31eeSKalle Valo break; 801772c31eeSKalle Valo default: 802772c31eeSKalle Valo filename = AR6003_REV3_PATCH_FILE; 803772c31eeSKalle Valo break; 804772c31eeSKalle Valo } 805772c31eeSKalle Valo 806772c31eeSKalle Valo if (ar->fw_patch == NULL) { 807772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 808772c31eeSKalle Valo &ar->fw_patch_len); 809772c31eeSKalle Valo if (ret) { 810772c31eeSKalle Valo ath6kl_err("Failed to get patch file %s: %d\n", 811772c31eeSKalle Valo filename, ret); 812772c31eeSKalle Valo return ret; 813772c31eeSKalle Valo } 814772c31eeSKalle Valo } 815772c31eeSKalle Valo 816772c31eeSKalle Valo return 0; 817772c31eeSKalle Valo } 818772c31eeSKalle Valo 81950d41234SKalle Valo static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 820772c31eeSKalle Valo { 821772c31eeSKalle Valo int ret; 822772c31eeSKalle Valo 823772c31eeSKalle Valo ret = ath6kl_fetch_otp_file(ar); 824772c31eeSKalle Valo if (ret) 825772c31eeSKalle Valo return ret; 826772c31eeSKalle Valo 827772c31eeSKalle Valo ret = ath6kl_fetch_fw_file(ar); 828772c31eeSKalle Valo if (ret) 829772c31eeSKalle Valo return ret; 830772c31eeSKalle Valo 831772c31eeSKalle Valo ret = ath6kl_fetch_patch_file(ar); 832772c31eeSKalle Valo if (ret) 833772c31eeSKalle Valo return ret; 834772c31eeSKalle Valo 835772c31eeSKalle Valo return 0; 836772c31eeSKalle Valo } 837bdcd8170SKalle Valo 83850d41234SKalle Valo static int ath6kl_fetch_fw_api2(struct ath6kl *ar) 83950d41234SKalle Valo { 84050d41234SKalle Valo size_t magic_len, len, ie_len; 84150d41234SKalle Valo const struct firmware *fw; 84250d41234SKalle Valo struct ath6kl_fw_ie *hdr; 84350d41234SKalle Valo const char *filename; 84450d41234SKalle Valo const u8 *data; 84597e0496dSKalle Valo int ret, ie_id, i, index, bit; 8468a137480SKalle Valo __le32 *val; 84750d41234SKalle Valo 84850d41234SKalle Valo switch (ar->version.target_ver) { 84950d41234SKalle Valo case AR6003_REV2_VERSION: 85050d41234SKalle Valo filename = AR6003_REV2_FIRMWARE_2_FILE; 85150d41234SKalle Valo break; 85250d41234SKalle Valo case AR6003_REV3_VERSION: 85350d41234SKalle Valo filename = AR6003_REV3_FIRMWARE_2_FILE; 85450d41234SKalle Valo break; 85550d41234SKalle Valo case AR6004_REV1_VERSION: 85650d41234SKalle Valo filename = AR6004_REV1_FIRMWARE_2_FILE; 85750d41234SKalle Valo break; 85850e2740bSKalle Valo case AR6004_REV2_VERSION: 85950e2740bSKalle Valo filename = AR6004_REV2_FIRMWARE_2_FILE; 86050e2740bSKalle Valo break; 86150d41234SKalle Valo default: 86250d41234SKalle Valo return -EOPNOTSUPP; 86350d41234SKalle Valo } 86450d41234SKalle Valo 86550d41234SKalle Valo ret = request_firmware(&fw, filename, ar->dev); 86650d41234SKalle Valo if (ret) 86750d41234SKalle Valo return ret; 86850d41234SKalle Valo 86950d41234SKalle Valo data = fw->data; 87050d41234SKalle Valo len = fw->size; 87150d41234SKalle Valo 87250d41234SKalle Valo /* magic also includes the null byte, check that as well */ 87350d41234SKalle Valo magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 87450d41234SKalle Valo 87550d41234SKalle Valo if (len < magic_len) { 87650d41234SKalle Valo ret = -EINVAL; 87750d41234SKalle Valo goto out; 87850d41234SKalle Valo } 87950d41234SKalle Valo 88050d41234SKalle Valo if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 88150d41234SKalle Valo ret = -EINVAL; 88250d41234SKalle Valo goto out; 88350d41234SKalle Valo } 88450d41234SKalle Valo 88550d41234SKalle Valo len -= magic_len; 88650d41234SKalle Valo data += magic_len; 88750d41234SKalle Valo 88850d41234SKalle Valo /* loop elements */ 88950d41234SKalle Valo while (len > sizeof(struct ath6kl_fw_ie)) { 89050d41234SKalle Valo /* hdr is unaligned! */ 89150d41234SKalle Valo hdr = (struct ath6kl_fw_ie *) data; 89250d41234SKalle Valo 89350d41234SKalle Valo ie_id = le32_to_cpup(&hdr->id); 89450d41234SKalle Valo ie_len = le32_to_cpup(&hdr->len); 89550d41234SKalle Valo 89650d41234SKalle Valo len -= sizeof(*hdr); 89750d41234SKalle Valo data += sizeof(*hdr); 89850d41234SKalle Valo 89950d41234SKalle Valo if (len < ie_len) { 90050d41234SKalle Valo ret = -EINVAL; 90150d41234SKalle Valo goto out; 90250d41234SKalle Valo } 90350d41234SKalle Valo 90450d41234SKalle Valo switch (ie_id) { 90550d41234SKalle Valo case ATH6KL_FW_IE_OTP_IMAGE: 906ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", 9076bc36431SKalle Valo ie_len); 9086bc36431SKalle Valo 90950d41234SKalle Valo ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 91050d41234SKalle Valo 91150d41234SKalle Valo if (ar->fw_otp == NULL) { 91250d41234SKalle Valo ret = -ENOMEM; 91350d41234SKalle Valo goto out; 91450d41234SKalle Valo } 91550d41234SKalle Valo 91650d41234SKalle Valo ar->fw_otp_len = ie_len; 91750d41234SKalle Valo break; 91850d41234SKalle Valo case ATH6KL_FW_IE_FW_IMAGE: 919ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", 9206bc36431SKalle Valo ie_len); 9216bc36431SKalle Valo 92250d41234SKalle Valo ar->fw = kmemdup(data, ie_len, GFP_KERNEL); 92350d41234SKalle Valo 92450d41234SKalle Valo if (ar->fw == NULL) { 92550d41234SKalle Valo ret = -ENOMEM; 92650d41234SKalle Valo goto out; 92750d41234SKalle Valo } 92850d41234SKalle Valo 92950d41234SKalle Valo ar->fw_len = ie_len; 93050d41234SKalle Valo break; 93150d41234SKalle Valo case ATH6KL_FW_IE_PATCH_IMAGE: 932ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", 9336bc36431SKalle Valo ie_len); 9346bc36431SKalle Valo 93550d41234SKalle Valo ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 93650d41234SKalle Valo 93750d41234SKalle Valo if (ar->fw_patch == NULL) { 93850d41234SKalle Valo ret = -ENOMEM; 93950d41234SKalle Valo goto out; 94050d41234SKalle Valo } 94150d41234SKalle Valo 94250d41234SKalle Valo ar->fw_patch_len = ie_len; 94350d41234SKalle Valo break; 9448a137480SKalle Valo case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 9458a137480SKalle Valo val = (__le32 *) data; 9468a137480SKalle Valo ar->hw.reserved_ram_size = le32_to_cpup(val); 9476bc36431SKalle Valo 9486bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 9496bc36431SKalle Valo "found reserved ram size ie 0x%d\n", 9506bc36431SKalle Valo ar->hw.reserved_ram_size); 9518a137480SKalle Valo break; 95297e0496dSKalle Valo case ATH6KL_FW_IE_CAPABILITIES: 9536bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 954ef548626SKalle Valo "found firmware capabilities ie (%zd B)\n", 9556bc36431SKalle Valo ie_len); 9566bc36431SKalle Valo 95797e0496dSKalle Valo for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 95897e0496dSKalle Valo index = ALIGN(i, 8) / 8; 95997e0496dSKalle Valo bit = i % 8; 96097e0496dSKalle Valo 96197e0496dSKalle Valo if (data[index] & (1 << bit)) 96297e0496dSKalle Valo __set_bit(i, ar->fw_capabilities); 96397e0496dSKalle Valo } 9646bc36431SKalle Valo 9656bc36431SKalle Valo ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 9666bc36431SKalle Valo ar->fw_capabilities, 9676bc36431SKalle Valo sizeof(ar->fw_capabilities)); 96897e0496dSKalle Valo break; 9691b4304daSKalle Valo case ATH6KL_FW_IE_PATCH_ADDR: 9701b4304daSKalle Valo if (ie_len != sizeof(*val)) 9711b4304daSKalle Valo break; 9721b4304daSKalle Valo 9731b4304daSKalle Valo val = (__le32 *) data; 9741b4304daSKalle Valo ar->hw.dataset_patch_addr = le32_to_cpup(val); 9756bc36431SKalle Valo 9766bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 9776bc36431SKalle Valo "found patch address ie 0x%d\n", 9786bc36431SKalle Valo ar->hw.dataset_patch_addr); 9791b4304daSKalle Valo break; 98050d41234SKalle Valo default: 9816bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 98250d41234SKalle Valo le32_to_cpup(&hdr->id)); 98350d41234SKalle Valo break; 98450d41234SKalle Valo } 98550d41234SKalle Valo 98650d41234SKalle Valo len -= ie_len; 98750d41234SKalle Valo data += ie_len; 98850d41234SKalle Valo }; 98950d41234SKalle Valo 99050d41234SKalle Valo ret = 0; 99150d41234SKalle Valo out: 99250d41234SKalle Valo release_firmware(fw); 99350d41234SKalle Valo 99450d41234SKalle Valo return ret; 99550d41234SKalle Valo } 99650d41234SKalle Valo 99750d41234SKalle Valo static int ath6kl_fetch_firmwares(struct ath6kl *ar) 99850d41234SKalle Valo { 99950d41234SKalle Valo int ret; 100050d41234SKalle Valo 100150d41234SKalle Valo ret = ath6kl_fetch_board_file(ar); 100250d41234SKalle Valo if (ret) 100350d41234SKalle Valo return ret; 100450d41234SKalle Valo 100550d41234SKalle Valo ret = ath6kl_fetch_fw_api2(ar); 10066bc36431SKalle Valo if (ret == 0) { 10076bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n"); 100850d41234SKalle Valo return 0; 10096bc36431SKalle Valo } 101050d41234SKalle Valo 101150d41234SKalle Valo ret = ath6kl_fetch_fw_api1(ar); 101250d41234SKalle Valo if (ret) 101350d41234SKalle Valo return ret; 101450d41234SKalle Valo 10156bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n"); 10166bc36431SKalle Valo 101750d41234SKalle Valo return 0; 101850d41234SKalle Valo } 101950d41234SKalle Valo 1020bdcd8170SKalle Valo static int ath6kl_upload_board_file(struct ath6kl *ar) 1021bdcd8170SKalle Valo { 1022bdcd8170SKalle Valo u32 board_address, board_ext_address, param; 102331024d99SKevin Fang u32 board_data_size, board_ext_data_size; 1024bdcd8170SKalle Valo int ret; 1025bdcd8170SKalle Valo 1026772c31eeSKalle Valo if (WARN_ON(ar->fw_board == NULL)) 1027772c31eeSKalle Valo return -ENOENT; 1028bdcd8170SKalle Valo 102931024d99SKevin Fang /* 103031024d99SKevin Fang * Determine where in Target RAM to write Board Data. 103131024d99SKevin Fang * For AR6004, host determine Target RAM address for 103231024d99SKevin Fang * writing board data. 103331024d99SKevin Fang */ 103431024d99SKevin Fang if (ar->target_type == TARGET_TYPE_AR6004) { 103550e2740bSKalle Valo if (ar->version.target_ver == AR6004_REV1_VERSION) 103631024d99SKevin Fang board_address = AR6004_REV1_BOARD_DATA_ADDRESS; 103750e2740bSKalle Valo else 103850e2740bSKalle Valo board_address = AR6004_REV2_BOARD_DATA_ADDRESS; 103950e2740bSKalle Valo 104031024d99SKevin Fang ath6kl_bmi_write(ar, 104131024d99SKevin Fang ath6kl_get_hi_item_addr(ar, 104231024d99SKevin Fang HI_ITEM(hi_board_data)), 104331024d99SKevin Fang (u8 *) &board_address, 4); 104431024d99SKevin Fang } else { 1045bdcd8170SKalle Valo ath6kl_bmi_read(ar, 1046bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1047bdcd8170SKalle Valo HI_ITEM(hi_board_data)), 1048bdcd8170SKalle Valo (u8 *) &board_address, 4); 104931024d99SKevin Fang } 105031024d99SKevin Fang 1051bdcd8170SKalle Valo /* determine where in target ram to write extended board data */ 1052bdcd8170SKalle Valo ath6kl_bmi_read(ar, 1053bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1054bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data)), 1055bdcd8170SKalle Valo (u8 *) &board_ext_address, 4); 1056bdcd8170SKalle Valo 105750e2740bSKalle Valo if (ar->target_type == TARGET_TYPE_AR6003 && 105850e2740bSKalle Valo board_ext_address == 0) { 1059bdcd8170SKalle Valo ath6kl_err("Failed to get board file target address.\n"); 1060bdcd8170SKalle Valo return -EINVAL; 1061bdcd8170SKalle Valo } 1062bdcd8170SKalle Valo 106331024d99SKevin Fang switch (ar->target_type) { 106431024d99SKevin Fang case TARGET_TYPE_AR6003: 106531024d99SKevin Fang board_data_size = AR6003_BOARD_DATA_SZ; 106631024d99SKevin Fang board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 106731024d99SKevin Fang break; 106831024d99SKevin Fang case TARGET_TYPE_AR6004: 106931024d99SKevin Fang board_data_size = AR6004_BOARD_DATA_SZ; 107031024d99SKevin Fang board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 107131024d99SKevin Fang break; 107231024d99SKevin Fang default: 107331024d99SKevin Fang WARN_ON(1); 107431024d99SKevin Fang return -EINVAL; 107531024d99SKevin Fang break; 107631024d99SKevin Fang } 107731024d99SKevin Fang 107850e2740bSKalle Valo if (board_ext_address && 107950e2740bSKalle Valo ar->fw_board_len == (board_data_size + board_ext_data_size)) { 108031024d99SKevin Fang 1081bdcd8170SKalle Valo /* write extended board data */ 10826bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 10836bc36431SKalle Valo "writing extended board data to 0x%x (%d B)\n", 10846bc36431SKalle Valo board_ext_address, board_ext_data_size); 10856bc36431SKalle Valo 1086bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, board_ext_address, 108731024d99SKevin Fang ar->fw_board + board_data_size, 108831024d99SKevin Fang board_ext_data_size); 1089bdcd8170SKalle Valo if (ret) { 1090bdcd8170SKalle Valo ath6kl_err("Failed to write extended board data: %d\n", 1091bdcd8170SKalle Valo ret); 1092bdcd8170SKalle Valo return ret; 1093bdcd8170SKalle Valo } 1094bdcd8170SKalle Valo 1095bdcd8170SKalle Valo /* record that extended board data is initialized */ 109631024d99SKevin Fang param = (board_ext_data_size << 16) | 1; 109731024d99SKevin Fang 1098bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1099bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1100bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data_config)), 1101bdcd8170SKalle Valo (unsigned char *) ¶m, 4); 1102bdcd8170SKalle Valo } 1103bdcd8170SKalle Valo 110431024d99SKevin Fang if (ar->fw_board_len < board_data_size) { 1105bdcd8170SKalle Valo ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1106bdcd8170SKalle Valo ret = -EINVAL; 1107bdcd8170SKalle Valo return ret; 1108bdcd8170SKalle Valo } 1109bdcd8170SKalle Valo 11106bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 11116bc36431SKalle Valo board_address, board_data_size); 11126bc36431SKalle Valo 1113bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 111431024d99SKevin Fang board_data_size); 1115bdcd8170SKalle Valo 1116bdcd8170SKalle Valo if (ret) { 1117bdcd8170SKalle Valo ath6kl_err("Board file bmi write failed: %d\n", ret); 1118bdcd8170SKalle Valo return ret; 1119bdcd8170SKalle Valo } 1120bdcd8170SKalle Valo 1121bdcd8170SKalle Valo /* record the fact that Board Data IS initialized */ 1122bdcd8170SKalle Valo param = 1; 1123bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1124bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1125bdcd8170SKalle Valo HI_ITEM(hi_board_data_initialized)), 1126bdcd8170SKalle Valo (u8 *)¶m, 4); 1127bdcd8170SKalle Valo 1128bdcd8170SKalle Valo return ret; 1129bdcd8170SKalle Valo } 1130bdcd8170SKalle Valo 1131bdcd8170SKalle Valo static int ath6kl_upload_otp(struct ath6kl *ar) 1132bdcd8170SKalle Valo { 1133bdcd8170SKalle Valo u32 address, param; 1134bef26a7fSKalle Valo bool from_hw = false; 1135bdcd8170SKalle Valo int ret; 1136bdcd8170SKalle Valo 113750e2740bSKalle Valo if (ar->fw_otp == NULL) 113850e2740bSKalle Valo return 0; 1139bdcd8170SKalle Valo 1140a01ac414SKalle Valo address = ar->hw.app_load_addr; 1141bdcd8170SKalle Valo 1142ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, 11436bc36431SKalle Valo ar->fw_otp_len); 11446bc36431SKalle Valo 1145bdcd8170SKalle Valo ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1146bdcd8170SKalle Valo ar->fw_otp_len); 1147bdcd8170SKalle Valo if (ret) { 1148bdcd8170SKalle Valo ath6kl_err("Failed to upload OTP file: %d\n", ret); 1149bdcd8170SKalle Valo return ret; 1150bdcd8170SKalle Valo } 1151bdcd8170SKalle Valo 1152639d0b89SKalle Valo /* read firmware start address */ 1153639d0b89SKalle Valo ret = ath6kl_bmi_read(ar, 1154639d0b89SKalle Valo ath6kl_get_hi_item_addr(ar, 1155639d0b89SKalle Valo HI_ITEM(hi_app_start)), 1156639d0b89SKalle Valo (u8 *) &address, sizeof(address)); 1157639d0b89SKalle Valo 1158639d0b89SKalle Valo if (ret) { 1159639d0b89SKalle Valo ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1160639d0b89SKalle Valo return ret; 1161639d0b89SKalle Valo } 1162639d0b89SKalle Valo 1163bef26a7fSKalle Valo if (ar->hw.app_start_override_addr == 0) { 1164639d0b89SKalle Valo ar->hw.app_start_override_addr = address; 1165bef26a7fSKalle Valo from_hw = true; 1166bef26a7fSKalle Valo } 1167639d0b89SKalle Valo 1168bef26a7fSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", 1169bef26a7fSKalle Valo from_hw ? " (from hw)" : "", 11706bc36431SKalle Valo ar->hw.app_start_override_addr); 11716bc36431SKalle Valo 1172bdcd8170SKalle Valo /* execute the OTP code */ 1173bef26a7fSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", 1174bef26a7fSKalle Valo ar->hw.app_start_override_addr); 1175bdcd8170SKalle Valo param = 0; 1176bef26a7fSKalle Valo ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); 1177bdcd8170SKalle Valo 1178bdcd8170SKalle Valo return ret; 1179bdcd8170SKalle Valo } 1180bdcd8170SKalle Valo 1181bdcd8170SKalle Valo static int ath6kl_upload_firmware(struct ath6kl *ar) 1182bdcd8170SKalle Valo { 1183bdcd8170SKalle Valo u32 address; 1184bdcd8170SKalle Valo int ret; 1185bdcd8170SKalle Valo 1186772c31eeSKalle Valo if (WARN_ON(ar->fw == NULL)) 118750e2740bSKalle Valo return 0; 1188bdcd8170SKalle Valo 1189a01ac414SKalle Valo address = ar->hw.app_load_addr; 1190bdcd8170SKalle Valo 1191ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", 11926bc36431SKalle Valo address, ar->fw_len); 11936bc36431SKalle Valo 1194bdcd8170SKalle Valo ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1195bdcd8170SKalle Valo 1196bdcd8170SKalle Valo if (ret) { 1197bdcd8170SKalle Valo ath6kl_err("Failed to write firmware: %d\n", ret); 1198bdcd8170SKalle Valo return ret; 1199bdcd8170SKalle Valo } 1200bdcd8170SKalle Valo 120131024d99SKevin Fang /* 120231024d99SKevin Fang * Set starting address for firmware 120331024d99SKevin Fang * Don't need to setup app_start override addr on AR6004 120431024d99SKevin Fang */ 120531024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6004) { 1206a01ac414SKalle Valo address = ar->hw.app_start_override_addr; 1207bdcd8170SKalle Valo ath6kl_bmi_set_app_start(ar, address); 120831024d99SKevin Fang } 1209bdcd8170SKalle Valo return ret; 1210bdcd8170SKalle Valo } 1211bdcd8170SKalle Valo 1212bdcd8170SKalle Valo static int ath6kl_upload_patch(struct ath6kl *ar) 1213bdcd8170SKalle Valo { 1214bdcd8170SKalle Valo u32 address, param; 1215bdcd8170SKalle Valo int ret; 1216bdcd8170SKalle Valo 121750e2740bSKalle Valo if (ar->fw_patch == NULL) 121850e2740bSKalle Valo return 0; 1219bdcd8170SKalle Valo 1220a01ac414SKalle Valo address = ar->hw.dataset_patch_addr; 1221bdcd8170SKalle Valo 1222ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", 12236bc36431SKalle Valo address, ar->fw_patch_len); 12246bc36431SKalle Valo 1225bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1226bdcd8170SKalle Valo if (ret) { 1227bdcd8170SKalle Valo ath6kl_err("Failed to write patch file: %d\n", ret); 1228bdcd8170SKalle Valo return ret; 1229bdcd8170SKalle Valo } 1230bdcd8170SKalle Valo 1231bdcd8170SKalle Valo param = address; 1232bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1233bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1234bdcd8170SKalle Valo HI_ITEM(hi_dset_list_head)), 1235bdcd8170SKalle Valo (unsigned char *) ¶m, 4); 1236bdcd8170SKalle Valo 1237bdcd8170SKalle Valo return 0; 1238bdcd8170SKalle Valo } 1239bdcd8170SKalle Valo 1240bdcd8170SKalle Valo static int ath6kl_init_upload(struct ath6kl *ar) 1241bdcd8170SKalle Valo { 1242bdcd8170SKalle Valo u32 param, options, sleep, address; 1243bdcd8170SKalle Valo int status = 0; 1244bdcd8170SKalle Valo 124531024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6003 && 124631024d99SKevin Fang ar->target_type != TARGET_TYPE_AR6004) 1247bdcd8170SKalle Valo return -EINVAL; 1248bdcd8170SKalle Valo 1249bdcd8170SKalle Valo /* temporarily disable system sleep */ 1250bdcd8170SKalle Valo address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1251bdcd8170SKalle Valo status = ath6kl_bmi_reg_read(ar, address, ¶m); 1252bdcd8170SKalle Valo if (status) 1253bdcd8170SKalle Valo return status; 1254bdcd8170SKalle Valo 1255bdcd8170SKalle Valo options = param; 1256bdcd8170SKalle Valo 1257bdcd8170SKalle Valo param |= ATH6KL_OPTION_SLEEP_DISABLE; 1258bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1259bdcd8170SKalle Valo if (status) 1260bdcd8170SKalle Valo return status; 1261bdcd8170SKalle Valo 1262bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1263bdcd8170SKalle Valo status = ath6kl_bmi_reg_read(ar, address, ¶m); 1264bdcd8170SKalle Valo if (status) 1265bdcd8170SKalle Valo return status; 1266bdcd8170SKalle Valo 1267bdcd8170SKalle Valo sleep = param; 1268bdcd8170SKalle Valo 1269bdcd8170SKalle Valo param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1270bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1271bdcd8170SKalle Valo if (status) 1272bdcd8170SKalle Valo return status; 1273bdcd8170SKalle Valo 1274bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1275bdcd8170SKalle Valo options, sleep); 1276bdcd8170SKalle Valo 1277bdcd8170SKalle Valo /* program analog PLL register */ 127831024d99SKevin Fang /* no need to control 40/44MHz clock on AR6004 */ 127931024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6004) { 1280bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1281bdcd8170SKalle Valo 0xF9104001); 128231024d99SKevin Fang 1283bdcd8170SKalle Valo if (status) 1284bdcd8170SKalle Valo return status; 1285bdcd8170SKalle Valo 1286bdcd8170SKalle Valo /* Run at 80/88MHz by default */ 1287bdcd8170SKalle Valo param = SM(CPU_CLOCK_STANDARD, 1); 1288bdcd8170SKalle Valo 1289bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1290bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1291bdcd8170SKalle Valo if (status) 1292bdcd8170SKalle Valo return status; 129331024d99SKevin Fang } 1294bdcd8170SKalle Valo 1295bdcd8170SKalle Valo param = 0; 1296bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1297bdcd8170SKalle Valo param = SM(LPO_CAL_ENABLE, 1); 1298bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1299bdcd8170SKalle Valo if (status) 1300bdcd8170SKalle Valo return status; 1301bdcd8170SKalle Valo 1302bdcd8170SKalle Valo /* WAR to avoid SDIO CRC err */ 1303bdcd8170SKalle Valo if (ar->version.target_ver == AR6003_REV2_VERSION) { 1304bdcd8170SKalle Valo ath6kl_err("temporary war to avoid sdio crc error\n"); 1305bdcd8170SKalle Valo 1306bdcd8170SKalle Valo param = 0x20; 1307bdcd8170SKalle Valo 1308bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1309bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1310bdcd8170SKalle Valo if (status) 1311bdcd8170SKalle Valo return status; 1312bdcd8170SKalle Valo 1313bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1314bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1315bdcd8170SKalle Valo if (status) 1316bdcd8170SKalle Valo return status; 1317bdcd8170SKalle Valo 1318bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1319bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1320bdcd8170SKalle Valo if (status) 1321bdcd8170SKalle Valo return status; 1322bdcd8170SKalle Valo 1323bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1324bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1325bdcd8170SKalle Valo if (status) 1326bdcd8170SKalle Valo return status; 1327bdcd8170SKalle Valo } 1328bdcd8170SKalle Valo 1329bdcd8170SKalle Valo /* write EEPROM data to Target RAM */ 1330bdcd8170SKalle Valo status = ath6kl_upload_board_file(ar); 1331bdcd8170SKalle Valo if (status) 1332bdcd8170SKalle Valo return status; 1333bdcd8170SKalle Valo 1334bdcd8170SKalle Valo /* transfer One time Programmable data */ 1335bdcd8170SKalle Valo status = ath6kl_upload_otp(ar); 1336bdcd8170SKalle Valo if (status) 1337bdcd8170SKalle Valo return status; 1338bdcd8170SKalle Valo 1339bdcd8170SKalle Valo /* Download Target firmware */ 1340bdcd8170SKalle Valo status = ath6kl_upload_firmware(ar); 1341bdcd8170SKalle Valo if (status) 1342bdcd8170SKalle Valo return status; 1343bdcd8170SKalle Valo 1344bdcd8170SKalle Valo status = ath6kl_upload_patch(ar); 1345bdcd8170SKalle Valo if (status) 1346bdcd8170SKalle Valo return status; 1347bdcd8170SKalle Valo 1348bdcd8170SKalle Valo /* Restore system sleep */ 1349bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1350bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, sleep); 1351bdcd8170SKalle Valo if (status) 1352bdcd8170SKalle Valo return status; 1353bdcd8170SKalle Valo 1354bdcd8170SKalle Valo address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1355bdcd8170SKalle Valo param = options | 0x20; 1356bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1357bdcd8170SKalle Valo if (status) 1358bdcd8170SKalle Valo return status; 1359bdcd8170SKalle Valo 1360bdcd8170SKalle Valo /* Configure GPIO AR6003 UART */ 1361bdcd8170SKalle Valo param = CONFIG_AR600x_DEBUG_UART_TX_PIN; 1362bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 1363bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1364bdcd8170SKalle Valo HI_ITEM(hi_dbg_uart_txpin)), 1365bdcd8170SKalle Valo (u8 *)¶m, 4); 1366bdcd8170SKalle Valo 1367bdcd8170SKalle Valo return status; 1368bdcd8170SKalle Valo } 1369bdcd8170SKalle Valo 1370a01ac414SKalle Valo static int ath6kl_init_hw_params(struct ath6kl *ar) 1371a01ac414SKalle Valo { 1372856f4b31SKalle Valo const struct ath6kl_hw *hw; 1373856f4b31SKalle Valo int i; 1374bef26a7fSKalle Valo 1375856f4b31SKalle Valo for (i = 0; i < ARRAY_SIZE(hw_list); i++) { 1376856f4b31SKalle Valo hw = &hw_list[i]; 1377bef26a7fSKalle Valo 1378856f4b31SKalle Valo if (hw->id == ar->version.target_ver) 1379a01ac414SKalle Valo break; 1380856f4b31SKalle Valo } 1381856f4b31SKalle Valo 1382856f4b31SKalle Valo if (i == ARRAY_SIZE(hw_list)) { 1383a01ac414SKalle Valo ath6kl_err("Unsupported hardware version: 0x%x\n", 1384a01ac414SKalle Valo ar->version.target_ver); 1385a01ac414SKalle Valo return -EINVAL; 1386a01ac414SKalle Valo } 1387a01ac414SKalle Valo 1388856f4b31SKalle Valo ar->hw = *hw; 1389856f4b31SKalle Valo 13906bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 13916bc36431SKalle Valo "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 13926bc36431SKalle Valo ar->version.target_ver, ar->target_type, 13936bc36431SKalle Valo ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 13946bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 13956bc36431SKalle Valo "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 13966bc36431SKalle Valo ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 13976bc36431SKalle Valo ar->hw.reserved_ram_size); 13986bc36431SKalle Valo 1399a01ac414SKalle Valo return 0; 1400a01ac414SKalle Valo } 1401a01ac414SKalle Valo 14025fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar) 140320459ee2SKalle Valo { 140420459ee2SKalle Valo long timeleft; 140520459ee2SKalle Valo int ret, i; 140620459ee2SKalle Valo 14075fe4dffbSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); 14085fe4dffbSKalle Valo 140920459ee2SKalle Valo ret = ath6kl_hif_power_on(ar); 141020459ee2SKalle Valo if (ret) 141120459ee2SKalle Valo return ret; 141220459ee2SKalle Valo 141320459ee2SKalle Valo ret = ath6kl_configure_target(ar); 141420459ee2SKalle Valo if (ret) 141520459ee2SKalle Valo goto err_power_off; 141620459ee2SKalle Valo 141720459ee2SKalle Valo ret = ath6kl_init_upload(ar); 141820459ee2SKalle Valo if (ret) 141920459ee2SKalle Valo goto err_power_off; 142020459ee2SKalle Valo 142120459ee2SKalle Valo /* Do we need to finish the BMI phase */ 142220459ee2SKalle Valo /* FIXME: return error from ath6kl_bmi_done() */ 142320459ee2SKalle Valo if (ath6kl_bmi_done(ar)) { 142420459ee2SKalle Valo ret = -EIO; 142520459ee2SKalle Valo goto err_power_off; 142620459ee2SKalle Valo } 142720459ee2SKalle Valo 142820459ee2SKalle Valo /* 142920459ee2SKalle Valo * The reason we have to wait for the target here is that the 143020459ee2SKalle Valo * driver layer has to init BMI in order to set the host block 143120459ee2SKalle Valo * size. 143220459ee2SKalle Valo */ 143320459ee2SKalle Valo if (ath6kl_htc_wait_target(ar->htc_target)) { 143420459ee2SKalle Valo ret = -EIO; 143520459ee2SKalle Valo goto err_power_off; 143620459ee2SKalle Valo } 143720459ee2SKalle Valo 143820459ee2SKalle Valo if (ath6kl_init_service_ep(ar)) { 143920459ee2SKalle Valo ret = -EIO; 144020459ee2SKalle Valo goto err_cleanup_scatter; 144120459ee2SKalle Valo } 144220459ee2SKalle Valo 144320459ee2SKalle Valo /* setup credit distribution */ 144420459ee2SKalle Valo ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info); 144520459ee2SKalle Valo 144620459ee2SKalle Valo /* start HTC */ 144720459ee2SKalle Valo ret = ath6kl_htc_start(ar->htc_target); 144820459ee2SKalle Valo if (ret) { 144920459ee2SKalle Valo /* FIXME: call this */ 145020459ee2SKalle Valo ath6kl_cookie_cleanup(ar); 145120459ee2SKalle Valo goto err_cleanup_scatter; 145220459ee2SKalle Valo } 145320459ee2SKalle Valo 145420459ee2SKalle Valo /* Wait for Wmi event to be ready */ 145520459ee2SKalle Valo timeleft = wait_event_interruptible_timeout(ar->event_wq, 145620459ee2SKalle Valo test_bit(WMI_READY, 145720459ee2SKalle Valo &ar->flag), 145820459ee2SKalle Valo WMI_TIMEOUT); 145920459ee2SKalle Valo 146020459ee2SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 146120459ee2SKalle Valo 146220459ee2SKalle Valo if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 146320459ee2SKalle Valo ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 146420459ee2SKalle Valo ATH6KL_ABI_VERSION, ar->version.abi_ver); 146520459ee2SKalle Valo ret = -EIO; 146620459ee2SKalle Valo goto err_htc_stop; 146720459ee2SKalle Valo } 146820459ee2SKalle Valo 146920459ee2SKalle Valo if (!timeleft || signal_pending(current)) { 147020459ee2SKalle Valo ath6kl_err("wmi is not ready or wait was interrupted\n"); 147120459ee2SKalle Valo ret = -EIO; 147220459ee2SKalle Valo goto err_htc_stop; 147320459ee2SKalle Valo } 147420459ee2SKalle Valo 147520459ee2SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 147620459ee2SKalle Valo 147720459ee2SKalle Valo /* communicate the wmi protocol verision to the target */ 147820459ee2SKalle Valo /* FIXME: return error */ 147920459ee2SKalle Valo if ((ath6kl_set_host_app_area(ar)) != 0) 148020459ee2SKalle Valo ath6kl_err("unable to set the host app area\n"); 148120459ee2SKalle Valo 148220459ee2SKalle Valo for (i = 0; i < MAX_NUM_VIF; i++) { 148320459ee2SKalle Valo ret = ath6kl_target_config_wlan_params(ar, i); 148420459ee2SKalle Valo if (ret) 148520459ee2SKalle Valo goto err_htc_stop; 148620459ee2SKalle Valo } 148720459ee2SKalle Valo 148876a9fbe2SKalle Valo ar->state = ATH6KL_STATE_ON; 148976a9fbe2SKalle Valo 149020459ee2SKalle Valo return 0; 149120459ee2SKalle Valo 149220459ee2SKalle Valo err_htc_stop: 149320459ee2SKalle Valo ath6kl_htc_stop(ar->htc_target); 149420459ee2SKalle Valo err_cleanup_scatter: 149520459ee2SKalle Valo ath6kl_hif_cleanup_scatter(ar); 149620459ee2SKalle Valo err_power_off: 149720459ee2SKalle Valo ath6kl_hif_power_off(ar); 149820459ee2SKalle Valo 149920459ee2SKalle Valo return ret; 150020459ee2SKalle Valo } 150120459ee2SKalle Valo 15025fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar) 15035fe4dffbSKalle Valo { 15045fe4dffbSKalle Valo int ret; 15055fe4dffbSKalle Valo 15065fe4dffbSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); 15075fe4dffbSKalle Valo 15085fe4dffbSKalle Valo ath6kl_htc_stop(ar->htc_target); 15095fe4dffbSKalle Valo 15105fe4dffbSKalle Valo ath6kl_hif_stop(ar); 15115fe4dffbSKalle Valo 15125fe4dffbSKalle Valo ath6kl_bmi_reset(ar); 15135fe4dffbSKalle Valo 15145fe4dffbSKalle Valo ret = ath6kl_hif_power_off(ar); 15155fe4dffbSKalle Valo if (ret) 15165fe4dffbSKalle Valo ath6kl_warn("failed to power off hif: %d\n", ret); 15175fe4dffbSKalle Valo 151876a9fbe2SKalle Valo ar->state = ATH6KL_STATE_OFF; 151976a9fbe2SKalle Valo 15205fe4dffbSKalle Valo return 0; 15215fe4dffbSKalle Valo } 15225fe4dffbSKalle Valo 1523bdcd8170SKalle Valo int ath6kl_core_init(struct ath6kl *ar) 1524bdcd8170SKalle Valo { 1525bdcd8170SKalle Valo struct ath6kl_bmi_target_info targ_info; 152661448a93SKalle Valo struct net_device *ndev; 152720459ee2SKalle Valo int ret = 0, i; 1528bdcd8170SKalle Valo 1529bdcd8170SKalle Valo ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); 1530bdcd8170SKalle Valo if (!ar->ath6kl_wq) 1531bdcd8170SKalle Valo return -ENOMEM; 1532bdcd8170SKalle Valo 1533bdcd8170SKalle Valo ret = ath6kl_bmi_init(ar); 1534bdcd8170SKalle Valo if (ret) 1535bdcd8170SKalle Valo goto err_wq; 1536bdcd8170SKalle Valo 153720459ee2SKalle Valo /* 153820459ee2SKalle Valo * Turn on power to get hardware (target) version and leave power 153920459ee2SKalle Valo * on delibrately as we will boot the hardware anyway within few 154020459ee2SKalle Valo * seconds. 154120459ee2SKalle Valo */ 1542b2e75698SKalle Valo ret = ath6kl_hif_power_on(ar); 1543bdcd8170SKalle Valo if (ret) 1544bdcd8170SKalle Valo goto err_bmi_cleanup; 1545bdcd8170SKalle Valo 1546b2e75698SKalle Valo ret = ath6kl_bmi_get_target_info(ar, &targ_info); 1547b2e75698SKalle Valo if (ret) 1548b2e75698SKalle Valo goto err_power_off; 1549b2e75698SKalle Valo 1550bdcd8170SKalle Valo ar->version.target_ver = le32_to_cpu(targ_info.version); 1551bdcd8170SKalle Valo ar->target_type = le32_to_cpu(targ_info.type); 1552be98e3a4SVasanthakumar Thiagarajan ar->wiphy->hw_version = le32_to_cpu(targ_info.version); 1553bdcd8170SKalle Valo 1554a01ac414SKalle Valo ret = ath6kl_init_hw_params(ar); 1555a01ac414SKalle Valo if (ret) 1556b2e75698SKalle Valo goto err_power_off; 1557a01ac414SKalle Valo 1558ad226ec2SKalle Valo ar->htc_target = ath6kl_htc_create(ar); 1559bdcd8170SKalle Valo 1560bdcd8170SKalle Valo if (!ar->htc_target) { 1561bdcd8170SKalle Valo ret = -ENOMEM; 1562b2e75698SKalle Valo goto err_power_off; 1563bdcd8170SKalle Valo } 1564bdcd8170SKalle Valo 1565772c31eeSKalle Valo ret = ath6kl_fetch_firmwares(ar); 1566772c31eeSKalle Valo if (ret) 1567772c31eeSKalle Valo goto err_htc_cleanup; 1568772c31eeSKalle Valo 156961448a93SKalle Valo /* FIXME: we should free all firmwares in the error cases below */ 157061448a93SKalle Valo 157161448a93SKalle Valo /* Indicate that WMI is enabled (although not ready yet) */ 157261448a93SKalle Valo set_bit(WMI_ENABLED, &ar->flag); 157361448a93SKalle Valo ar->wmi = ath6kl_wmi_init(ar); 157461448a93SKalle Valo if (!ar->wmi) { 157561448a93SKalle Valo ath6kl_err("failed to initialize wmi\n"); 157661448a93SKalle Valo ret = -EIO; 157761448a93SKalle Valo goto err_htc_cleanup; 157861448a93SKalle Valo } 157961448a93SKalle Valo 158061448a93SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); 158161448a93SKalle Valo 158261448a93SKalle Valo ret = ath6kl_register_ieee80211_hw(ar); 158361448a93SKalle Valo if (ret) 158461448a93SKalle Valo goto err_node_cleanup; 158561448a93SKalle Valo 158661448a93SKalle Valo ret = ath6kl_debug_init(ar); 158761448a93SKalle Valo if (ret) { 158861448a93SKalle Valo wiphy_unregister(ar->wiphy); 158961448a93SKalle Valo goto err_node_cleanup; 159061448a93SKalle Valo } 159161448a93SKalle Valo 159261448a93SKalle Valo for (i = 0; i < MAX_NUM_VIF; i++) 159361448a93SKalle Valo ar->avail_idx_map |= BIT(i); 159461448a93SKalle Valo 159561448a93SKalle Valo rtnl_lock(); 159661448a93SKalle Valo 159761448a93SKalle Valo /* Add an initial station interface */ 159861448a93SKalle Valo ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0, 159961448a93SKalle Valo INFRA_NETWORK); 160061448a93SKalle Valo 160161448a93SKalle Valo rtnl_unlock(); 160261448a93SKalle Valo 160361448a93SKalle Valo if (!ndev) { 160461448a93SKalle Valo ath6kl_err("Failed to instantiate a network device\n"); 160561448a93SKalle Valo ret = -ENOMEM; 160661448a93SKalle Valo wiphy_unregister(ar->wiphy); 160761448a93SKalle Valo goto err_debug_init; 160861448a93SKalle Valo } 160961448a93SKalle Valo 161061448a93SKalle Valo 161161448a93SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", 161261448a93SKalle Valo __func__, ndev->name, ndev, ar); 161361448a93SKalle Valo 161461448a93SKalle Valo /* setup access class priority mappings */ 161561448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ 161661448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_BE] = 1; 161761448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_VI] = 2; 161861448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ 161961448a93SKalle Valo 162061448a93SKalle Valo /* give our connected endpoints some buffers */ 162161448a93SKalle Valo ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); 162261448a93SKalle Valo ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); 162361448a93SKalle Valo 162461448a93SKalle Valo /* allocate some buffers that handle larger AMSDU frames */ 162561448a93SKalle Valo ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); 162661448a93SKalle Valo 162761448a93SKalle Valo ath6kl_cookie_init(ar); 162861448a93SKalle Valo 162961448a93SKalle Valo ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | 163061448a93SKalle Valo ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; 163161448a93SKalle Valo 16328277de15SKalle Valo if (suspend_cutpower) 16338277de15SKalle Valo ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER; 16348277de15SKalle Valo 163561448a93SKalle Valo ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM | 163661448a93SKalle Valo WIPHY_FLAG_HAVE_AP_SME; 163761448a93SKalle Valo 16385fe4dffbSKalle Valo set_bit(FIRST_BOOT, &ar->flag); 16395fe4dffbSKalle Valo 16405fe4dffbSKalle Valo ret = ath6kl_init_hw_start(ar); 164120459ee2SKalle Valo if (ret) { 16425fe4dffbSKalle Valo ath6kl_err("Failed to start hardware: %d\n", ret); 164320459ee2SKalle Valo goto err_rxbuf_cleanup; 164461448a93SKalle Valo } 164561448a93SKalle Valo 164661448a93SKalle Valo /* 164761448a93SKalle Valo * Set mac address which is received in ready event 164861448a93SKalle Valo * FIXME: Move to ath6kl_interface_add() 164961448a93SKalle Valo */ 165061448a93SKalle Valo memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN); 1651bdcd8170SKalle Valo 1652bdcd8170SKalle Valo return ret; 1653bdcd8170SKalle Valo 165461448a93SKalle Valo err_rxbuf_cleanup: 165561448a93SKalle Valo ath6kl_htc_flush_rx_buf(ar->htc_target); 165661448a93SKalle Valo ath6kl_cleanup_amsdu_rxbufs(ar); 165761448a93SKalle Valo rtnl_lock(); 165861448a93SKalle Valo ath6kl_deinit_if_data(netdev_priv(ndev)); 165961448a93SKalle Valo rtnl_unlock(); 166061448a93SKalle Valo wiphy_unregister(ar->wiphy); 166161448a93SKalle Valo err_debug_init: 166261448a93SKalle Valo ath6kl_debug_cleanup(ar); 166361448a93SKalle Valo err_node_cleanup: 166461448a93SKalle Valo ath6kl_wmi_shutdown(ar->wmi); 166561448a93SKalle Valo clear_bit(WMI_ENABLED, &ar->flag); 166661448a93SKalle Valo ar->wmi = NULL; 1667bdcd8170SKalle Valo err_htc_cleanup: 1668ad226ec2SKalle Valo ath6kl_htc_cleanup(ar->htc_target); 1669b2e75698SKalle Valo err_power_off: 1670b2e75698SKalle Valo ath6kl_hif_power_off(ar); 1671bdcd8170SKalle Valo err_bmi_cleanup: 1672bdcd8170SKalle Valo ath6kl_bmi_cleanup(ar); 1673bdcd8170SKalle Valo err_wq: 1674bdcd8170SKalle Valo destroy_workqueue(ar->ath6kl_wq); 16758dafb70eSVasanthakumar Thiagarajan 1676bdcd8170SKalle Valo return ret; 1677bdcd8170SKalle Valo } 1678bdcd8170SKalle Valo 167955055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) 16806db8fa53SVasanthakumar Thiagarajan { 16816db8fa53SVasanthakumar Thiagarajan static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 16826db8fa53SVasanthakumar Thiagarajan bool discon_issued; 16836db8fa53SVasanthakumar Thiagarajan 16846db8fa53SVasanthakumar Thiagarajan netif_stop_queue(vif->ndev); 16856db8fa53SVasanthakumar Thiagarajan 16866db8fa53SVasanthakumar Thiagarajan clear_bit(WLAN_ENABLED, &vif->flags); 16876db8fa53SVasanthakumar Thiagarajan 16886db8fa53SVasanthakumar Thiagarajan if (wmi_ready) { 16896db8fa53SVasanthakumar Thiagarajan discon_issued = test_bit(CONNECTED, &vif->flags) || 16906db8fa53SVasanthakumar Thiagarajan test_bit(CONNECT_PEND, &vif->flags); 16916db8fa53SVasanthakumar Thiagarajan ath6kl_disconnect(vif); 16926db8fa53SVasanthakumar Thiagarajan del_timer(&vif->disconnect_timer); 16936db8fa53SVasanthakumar Thiagarajan 16946db8fa53SVasanthakumar Thiagarajan if (discon_issued) 16956db8fa53SVasanthakumar Thiagarajan ath6kl_disconnect_event(vif, DISCONNECT_CMD, 16966db8fa53SVasanthakumar Thiagarajan (vif->nw_type & AP_NETWORK) ? 16976db8fa53SVasanthakumar Thiagarajan bcast_mac : vif->bssid, 16986db8fa53SVasanthakumar Thiagarajan 0, NULL, 0); 16996db8fa53SVasanthakumar Thiagarajan } 17006db8fa53SVasanthakumar Thiagarajan 17016db8fa53SVasanthakumar Thiagarajan if (vif->scan_req) { 17026db8fa53SVasanthakumar Thiagarajan cfg80211_scan_done(vif->scan_req, true); 17036db8fa53SVasanthakumar Thiagarajan vif->scan_req = NULL; 17046db8fa53SVasanthakumar Thiagarajan } 17056db8fa53SVasanthakumar Thiagarajan } 17066db8fa53SVasanthakumar Thiagarajan 1707bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar) 1708bdcd8170SKalle Valo { 1709990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *vif, *tmp_vif; 1710bdcd8170SKalle Valo 1711bdcd8170SKalle Valo set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1712bdcd8170SKalle Valo 1713bdcd8170SKalle Valo if (down_interruptible(&ar->sem)) { 1714bdcd8170SKalle Valo ath6kl_err("down_interruptible failed\n"); 1715bdcd8170SKalle Valo return; 1716bdcd8170SKalle Valo } 1717bdcd8170SKalle Valo 171811f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 1719990bd915SVasanthakumar Thiagarajan list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { 1720990bd915SVasanthakumar Thiagarajan list_del(&vif->list); 172111f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 1722990bd915SVasanthakumar Thiagarajan ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); 172327929723SVasanthakumar Thiagarajan rtnl_lock(); 172427929723SVasanthakumar Thiagarajan ath6kl_deinit_if_data(vif); 172527929723SVasanthakumar Thiagarajan rtnl_unlock(); 172611f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 1727990bd915SVasanthakumar Thiagarajan } 172811f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 1729bdcd8170SKalle Valo 17306db8fa53SVasanthakumar Thiagarajan clear_bit(WMI_READY, &ar->flag); 17316db8fa53SVasanthakumar Thiagarajan 17326db8fa53SVasanthakumar Thiagarajan /* 17336db8fa53SVasanthakumar Thiagarajan * After wmi_shudown all WMI events will be dropped. We 17346db8fa53SVasanthakumar Thiagarajan * need to cleanup the buffers allocated in AP mode and 17356db8fa53SVasanthakumar Thiagarajan * give disconnect notification to stack, which usually 17366db8fa53SVasanthakumar Thiagarajan * happens in the disconnect_event. Simulate the disconnect 17376db8fa53SVasanthakumar Thiagarajan * event by calling the function directly. Sometimes 17386db8fa53SVasanthakumar Thiagarajan * disconnect_event will be received when the debug logs 17396db8fa53SVasanthakumar Thiagarajan * are collected. 17406db8fa53SVasanthakumar Thiagarajan */ 17416db8fa53SVasanthakumar Thiagarajan ath6kl_wmi_shutdown(ar->wmi); 17426db8fa53SVasanthakumar Thiagarajan 17436db8fa53SVasanthakumar Thiagarajan clear_bit(WMI_ENABLED, &ar->flag); 17446db8fa53SVasanthakumar Thiagarajan if (ar->htc_target) { 17456db8fa53SVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); 17466db8fa53SVasanthakumar Thiagarajan ath6kl_htc_stop(ar->htc_target); 1747bdcd8170SKalle Valo } 1748bdcd8170SKalle Valo 1749bdcd8170SKalle Valo /* 17506db8fa53SVasanthakumar Thiagarajan * Try to reset the device if we can. The driver may have been 17516db8fa53SVasanthakumar Thiagarajan * configure NOT to reset the target during a debug session. 1752bdcd8170SKalle Valo */ 17536db8fa53SVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_TRC, 17546db8fa53SVasanthakumar Thiagarajan "attempting to reset target on instance destroy\n"); 17556db8fa53SVasanthakumar Thiagarajan ath6kl_reset_device(ar, ar->target_type, true, true); 1756bdcd8170SKalle Valo 17576db8fa53SVasanthakumar Thiagarajan clear_bit(WLAN_ENABLED, &ar->flag); 1758bdcd8170SKalle Valo } 1759