1bdcd8170SKalle Valo 2bdcd8170SKalle Valo /* 3bdcd8170SKalle Valo * Copyright (c) 2011 Atheros Communications Inc. 4bdcd8170SKalle Valo * 5bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 6bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 7bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 8bdcd8170SKalle Valo * 9bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16bdcd8170SKalle Valo */ 17bdcd8170SKalle Valo 1892ecbff4SSam Leffler #include <linux/of.h> 19bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h> 20bdcd8170SKalle Valo #include "core.h" 21bdcd8170SKalle Valo #include "cfg80211.h" 22bdcd8170SKalle Valo #include "target.h" 23bdcd8170SKalle Valo #include "debug.h" 24bdcd8170SKalle Valo #include "hif-ops.h" 25bdcd8170SKalle Valo 26bdcd8170SKalle Valo unsigned int debug_mask; 27003353b0SKalle Valo static unsigned int testmode; 28bdcd8170SKalle Valo 29bdcd8170SKalle Valo module_param(debug_mask, uint, 0644); 30003353b0SKalle Valo module_param(testmode, uint, 0644); 31bdcd8170SKalle Valo 32bdcd8170SKalle Valo /* 33bdcd8170SKalle Valo * Include definitions here that can be used to tune the WLAN module 34bdcd8170SKalle Valo * behavior. Different customers can tune the behavior as per their needs, 35bdcd8170SKalle Valo * here. 36bdcd8170SKalle Valo */ 37bdcd8170SKalle Valo 38bdcd8170SKalle Valo /* 39bdcd8170SKalle Valo * This configuration item enable/disable keepalive support. 40bdcd8170SKalle Valo * Keepalive support: In the absence of any data traffic to AP, null 41bdcd8170SKalle Valo * frames will be sent to the AP at periodic interval, to keep the association 42bdcd8170SKalle Valo * active. This configuration item defines the periodic interval. 43bdcd8170SKalle Valo * Use value of zero to disable keepalive support 44bdcd8170SKalle Valo * Default: 60 seconds 45bdcd8170SKalle Valo */ 46bdcd8170SKalle Valo #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 47bdcd8170SKalle Valo 48bdcd8170SKalle Valo /* 49bdcd8170SKalle Valo * This configuration item sets the value of disconnect timeout 50bdcd8170SKalle Valo * Firmware delays sending the disconnec event to the host for this 51bdcd8170SKalle Valo * timeout after is gets disconnected from the current AP. 52bdcd8170SKalle Valo * If the firmware successly roams within the disconnect timeout 53bdcd8170SKalle Valo * it sends a new connect event 54bdcd8170SKalle Valo */ 55bdcd8170SKalle Valo #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 56bdcd8170SKalle Valo 57bdcd8170SKalle Valo #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8 58bdcd8170SKalle Valo 59bdcd8170SKalle Valo #define ATH6KL_DATA_OFFSET 64 60bdcd8170SKalle Valo struct sk_buff *ath6kl_buf_alloc(int size) 61bdcd8170SKalle Valo { 62bdcd8170SKalle Valo struct sk_buff *skb; 63bdcd8170SKalle Valo u16 reserved; 64bdcd8170SKalle Valo 65bdcd8170SKalle Valo /* Add chacheline space at front and back of buffer */ 66bdcd8170SKalle Valo reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 671df94a85SVasanthakumar Thiagarajan sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; 68bdcd8170SKalle Valo skb = dev_alloc_skb(size + reserved); 69bdcd8170SKalle Valo 70bdcd8170SKalle Valo if (skb) 71bdcd8170SKalle Valo skb_reserve(skb, reserved - L1_CACHE_BYTES); 72bdcd8170SKalle Valo return skb; 73bdcd8170SKalle Valo } 74bdcd8170SKalle Valo 75bdcd8170SKalle Valo void ath6kl_init_profile_info(struct ath6kl *ar) 76bdcd8170SKalle Valo { 77bdcd8170SKalle Valo ar->ssid_len = 0; 78bdcd8170SKalle Valo memset(ar->ssid, 0, sizeof(ar->ssid)); 79bdcd8170SKalle Valo 80bdcd8170SKalle Valo ar->dot11_auth_mode = OPEN_AUTH; 81bdcd8170SKalle Valo ar->auth_mode = NONE_AUTH; 82bdcd8170SKalle Valo ar->prwise_crypto = NONE_CRYPT; 83bdcd8170SKalle Valo ar->prwise_crypto_len = 0; 84bdcd8170SKalle Valo ar->grp_crypto = NONE_CRYPT; 8538acde3cSEdward Lu ar->grp_crypto_len = 0; 86bdcd8170SKalle Valo memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list)); 87bdcd8170SKalle Valo memset(ar->req_bssid, 0, sizeof(ar->req_bssid)); 88bdcd8170SKalle Valo memset(ar->bssid, 0, sizeof(ar->bssid)); 89bdcd8170SKalle Valo ar->bss_ch = 0; 90bdcd8170SKalle Valo ar->nw_type = ar->next_mode = INFRA_NETWORK; 91bdcd8170SKalle Valo } 92bdcd8170SKalle Valo 93bdcd8170SKalle Valo static u8 ath6kl_get_fw_iftype(struct ath6kl *ar) 94bdcd8170SKalle Valo { 95bdcd8170SKalle Valo switch (ar->nw_type) { 96bdcd8170SKalle Valo case INFRA_NETWORK: 97bdcd8170SKalle Valo return HI_OPTION_FW_MODE_BSS_STA; 98bdcd8170SKalle Valo case ADHOC_NETWORK: 99bdcd8170SKalle Valo return HI_OPTION_FW_MODE_IBSS; 100bdcd8170SKalle Valo case AP_NETWORK: 101bdcd8170SKalle Valo return HI_OPTION_FW_MODE_AP; 102bdcd8170SKalle Valo default: 103bdcd8170SKalle Valo ath6kl_err("Unsupported interface type :%d\n", ar->nw_type); 104bdcd8170SKalle Valo return 0xff; 105bdcd8170SKalle Valo } 106bdcd8170SKalle Valo } 107bdcd8170SKalle Valo 108bdcd8170SKalle Valo static int ath6kl_set_host_app_area(struct ath6kl *ar) 109bdcd8170SKalle Valo { 110bdcd8170SKalle Valo u32 address, data; 111bdcd8170SKalle Valo struct host_app_area host_app_area; 112bdcd8170SKalle Valo 113bdcd8170SKalle Valo /* Fetch the address of the host_app_area_s 114bdcd8170SKalle Valo * instance in the host interest area */ 115bdcd8170SKalle Valo address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 11631024d99SKevin Fang address = TARG_VTOP(ar->target_type, address); 117bdcd8170SKalle Valo 118addb44beSKalle Valo if (ath6kl_diag_read32(ar, address, &data)) 119bdcd8170SKalle Valo return -EIO; 120bdcd8170SKalle Valo 12131024d99SKevin Fang address = TARG_VTOP(ar->target_type, data); 122bdcd8170SKalle Valo host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION; 123addb44beSKalle Valo if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 124addb44beSKalle Valo sizeof(struct host_app_area))) 125bdcd8170SKalle Valo return -EIO; 126bdcd8170SKalle Valo 127bdcd8170SKalle Valo return 0; 128bdcd8170SKalle Valo } 129bdcd8170SKalle Valo 130bdcd8170SKalle Valo static inline void set_ac2_ep_map(struct ath6kl *ar, 131bdcd8170SKalle Valo u8 ac, 132bdcd8170SKalle Valo enum htc_endpoint_id ep) 133bdcd8170SKalle Valo { 134bdcd8170SKalle Valo ar->ac2ep_map[ac] = ep; 135bdcd8170SKalle Valo ar->ep2ac_map[ep] = ac; 136bdcd8170SKalle Valo } 137bdcd8170SKalle Valo 138bdcd8170SKalle Valo /* connect to a service */ 139bdcd8170SKalle Valo static int ath6kl_connectservice(struct ath6kl *ar, 140bdcd8170SKalle Valo struct htc_service_connect_req *con_req, 141bdcd8170SKalle Valo char *desc) 142bdcd8170SKalle Valo { 143bdcd8170SKalle Valo int status; 144bdcd8170SKalle Valo struct htc_service_connect_resp response; 145bdcd8170SKalle Valo 146bdcd8170SKalle Valo memset(&response, 0, sizeof(response)); 147bdcd8170SKalle Valo 148ad226ec2SKalle Valo status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 149bdcd8170SKalle Valo if (status) { 150bdcd8170SKalle Valo ath6kl_err("failed to connect to %s service status:%d\n", 151bdcd8170SKalle Valo desc, status); 152bdcd8170SKalle Valo return status; 153bdcd8170SKalle Valo } 154bdcd8170SKalle Valo 155bdcd8170SKalle Valo switch (con_req->svc_id) { 156bdcd8170SKalle Valo case WMI_CONTROL_SVC: 157bdcd8170SKalle Valo if (test_bit(WMI_ENABLED, &ar->flag)) 158bdcd8170SKalle Valo ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 159bdcd8170SKalle Valo ar->ctrl_ep = response.endpoint; 160bdcd8170SKalle Valo break; 161bdcd8170SKalle Valo case WMI_DATA_BE_SVC: 162bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 163bdcd8170SKalle Valo break; 164bdcd8170SKalle Valo case WMI_DATA_BK_SVC: 165bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 166bdcd8170SKalle Valo break; 167bdcd8170SKalle Valo case WMI_DATA_VI_SVC: 168bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 169bdcd8170SKalle Valo break; 170bdcd8170SKalle Valo case WMI_DATA_VO_SVC: 171bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 172bdcd8170SKalle Valo break; 173bdcd8170SKalle Valo default: 174bdcd8170SKalle Valo ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 175bdcd8170SKalle Valo return -EINVAL; 176bdcd8170SKalle Valo } 177bdcd8170SKalle Valo 178bdcd8170SKalle Valo return 0; 179bdcd8170SKalle Valo } 180bdcd8170SKalle Valo 181bdcd8170SKalle Valo static int ath6kl_init_service_ep(struct ath6kl *ar) 182bdcd8170SKalle Valo { 183bdcd8170SKalle Valo struct htc_service_connect_req connect; 184bdcd8170SKalle Valo 185bdcd8170SKalle Valo memset(&connect, 0, sizeof(connect)); 186bdcd8170SKalle Valo 187bdcd8170SKalle Valo /* these fields are the same for all service endpoints */ 188bdcd8170SKalle Valo connect.ep_cb.rx = ath6kl_rx; 189bdcd8170SKalle Valo connect.ep_cb.rx_refill = ath6kl_rx_refill; 190bdcd8170SKalle Valo connect.ep_cb.tx_full = ath6kl_tx_queue_full; 191bdcd8170SKalle Valo 192bdcd8170SKalle Valo /* 193bdcd8170SKalle Valo * Set the max queue depth so that our ath6kl_tx_queue_full handler 194bdcd8170SKalle Valo * gets called. 195bdcd8170SKalle Valo */ 196bdcd8170SKalle Valo connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 197bdcd8170SKalle Valo connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 198bdcd8170SKalle Valo if (!connect.ep_cb.rx_refill_thresh) 199bdcd8170SKalle Valo connect.ep_cb.rx_refill_thresh++; 200bdcd8170SKalle Valo 201bdcd8170SKalle Valo /* connect to control service */ 202bdcd8170SKalle Valo connect.svc_id = WMI_CONTROL_SVC; 203bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 204bdcd8170SKalle Valo return -EIO; 205bdcd8170SKalle Valo 206bdcd8170SKalle Valo connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 207bdcd8170SKalle Valo 208bdcd8170SKalle Valo /* 209bdcd8170SKalle Valo * Limit the HTC message size on the send path, although e can 210bdcd8170SKalle Valo * receive A-MSDU frames of 4K, we will only send ethernet-sized 211bdcd8170SKalle Valo * (802.3) frames on the send path. 212bdcd8170SKalle Valo */ 213bdcd8170SKalle Valo connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 214bdcd8170SKalle Valo 215bdcd8170SKalle Valo /* 216bdcd8170SKalle Valo * To reduce the amount of committed memory for larger A_MSDU 217bdcd8170SKalle Valo * frames, use the recv-alloc threshold mechanism for larger 218bdcd8170SKalle Valo * packets. 219bdcd8170SKalle Valo */ 220bdcd8170SKalle Valo connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 221bdcd8170SKalle Valo connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 222bdcd8170SKalle Valo 223bdcd8170SKalle Valo /* 224bdcd8170SKalle Valo * For the remaining data services set the connection flag to 225bdcd8170SKalle Valo * reduce dribbling, if configured to do so. 226bdcd8170SKalle Valo */ 227bdcd8170SKalle Valo connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 228bdcd8170SKalle Valo connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 229bdcd8170SKalle Valo connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 230bdcd8170SKalle Valo 231bdcd8170SKalle Valo connect.svc_id = WMI_DATA_BE_SVC; 232bdcd8170SKalle Valo 233bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 234bdcd8170SKalle Valo return -EIO; 235bdcd8170SKalle Valo 236bdcd8170SKalle Valo /* connect to back-ground map this to WMI LOW_PRI */ 237bdcd8170SKalle Valo connect.svc_id = WMI_DATA_BK_SVC; 238bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 239bdcd8170SKalle Valo return -EIO; 240bdcd8170SKalle Valo 241bdcd8170SKalle Valo /* connect to Video service, map this to to HI PRI */ 242bdcd8170SKalle Valo connect.svc_id = WMI_DATA_VI_SVC; 243bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 244bdcd8170SKalle Valo return -EIO; 245bdcd8170SKalle Valo 246bdcd8170SKalle Valo /* 247bdcd8170SKalle Valo * Connect to VO service, this is currently not mapped to a WMI 248bdcd8170SKalle Valo * priority stream due to historical reasons. WMI originally 249bdcd8170SKalle Valo * defined 3 priorities over 3 mailboxes We can change this when 250bdcd8170SKalle Valo * WMI is reworked so that priorities are not dependent on 251bdcd8170SKalle Valo * mailboxes. 252bdcd8170SKalle Valo */ 253bdcd8170SKalle Valo connect.svc_id = WMI_DATA_VO_SVC; 254bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 255bdcd8170SKalle Valo return -EIO; 256bdcd8170SKalle Valo 257bdcd8170SKalle Valo return 0; 258bdcd8170SKalle Valo } 259bdcd8170SKalle Valo 260bdcd8170SKalle Valo static void ath6kl_init_control_info(struct ath6kl *ar) 261bdcd8170SKalle Valo { 262bdcd8170SKalle Valo u8 ctr; 263bdcd8170SKalle Valo 264bdcd8170SKalle Valo clear_bit(WMI_ENABLED, &ar->flag); 265bdcd8170SKalle Valo ath6kl_init_profile_info(ar); 266bdcd8170SKalle Valo ar->def_txkey_index = 0; 267bdcd8170SKalle Valo memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list)); 268bdcd8170SKalle Valo ar->ch_hint = 0; 269bdcd8170SKalle Valo ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL; 270bdcd8170SKalle Valo ar->listen_intvl_b = 0; 271bdcd8170SKalle Valo ar->tx_pwr = 0; 272bdcd8170SKalle Valo clear_bit(SKIP_SCAN, &ar->flag); 273bdcd8170SKalle Valo set_bit(WMM_ENABLED, &ar->flag); 274bdcd8170SKalle Valo ar->intra_bss = 1; 275bdcd8170SKalle Valo memset(&ar->sc_params, 0, sizeof(ar->sc_params)); 276bdcd8170SKalle Valo ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT; 277bdcd8170SKalle Valo ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS; 278e5090444SVivek Natarajan ar->lrssi_roam_threshold = DEF_LRSSI_ROAM_THRESHOLD; 279bdcd8170SKalle Valo 280bdcd8170SKalle Valo memset((u8 *)ar->sta_list, 0, 281bdcd8170SKalle Valo AP_MAX_NUM_STA * sizeof(struct ath6kl_sta)); 282bdcd8170SKalle Valo 283bdcd8170SKalle Valo spin_lock_init(&ar->mcastpsq_lock); 284bdcd8170SKalle Valo 285bdcd8170SKalle Valo /* Init the PS queues */ 286bdcd8170SKalle Valo for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) { 287bdcd8170SKalle Valo spin_lock_init(&ar->sta_list[ctr].psq_lock); 288bdcd8170SKalle Valo skb_queue_head_init(&ar->sta_list[ctr].psq); 289bdcd8170SKalle Valo } 290bdcd8170SKalle Valo 291bdcd8170SKalle Valo skb_queue_head_init(&ar->mcastpsq); 292bdcd8170SKalle Valo 293bdcd8170SKalle Valo memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3); 294bdcd8170SKalle Valo } 295bdcd8170SKalle Valo 296bdcd8170SKalle Valo /* 297bdcd8170SKalle Valo * Set HTC/Mbox operational parameters, this can only be called when the 298bdcd8170SKalle Valo * target is in the BMI phase. 299bdcd8170SKalle Valo */ 300bdcd8170SKalle Valo static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 301bdcd8170SKalle Valo u8 htc_ctrl_buf) 302bdcd8170SKalle Valo { 303bdcd8170SKalle Valo int status; 304bdcd8170SKalle Valo u32 blk_size; 305bdcd8170SKalle Valo 306bdcd8170SKalle Valo blk_size = ar->mbox_info.block_size; 307bdcd8170SKalle Valo 308bdcd8170SKalle Valo if (htc_ctrl_buf) 309bdcd8170SKalle Valo blk_size |= ((u32)htc_ctrl_buf) << 16; 310bdcd8170SKalle Valo 311bdcd8170SKalle Valo /* set the host interest area for the block size */ 312bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 313bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 314bdcd8170SKalle Valo HI_ITEM(hi_mbox_io_block_sz)), 315bdcd8170SKalle Valo (u8 *)&blk_size, 316bdcd8170SKalle Valo 4); 317bdcd8170SKalle Valo if (status) { 318bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for IO block size failed\n"); 319bdcd8170SKalle Valo goto out; 320bdcd8170SKalle Valo } 321bdcd8170SKalle Valo 322bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 323bdcd8170SKalle Valo blk_size, 324bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 325bdcd8170SKalle Valo 326bdcd8170SKalle Valo if (mbox_isr_yield_val) { 327bdcd8170SKalle Valo /* set the host interest area for the mbox ISR yield limit */ 328bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 329bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 330bdcd8170SKalle Valo HI_ITEM(hi_mbox_isr_yield_limit)), 331bdcd8170SKalle Valo (u8 *)&mbox_isr_yield_val, 332bdcd8170SKalle Valo 4); 333bdcd8170SKalle Valo if (status) { 334bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for yield limit failed\n"); 335bdcd8170SKalle Valo goto out; 336bdcd8170SKalle Valo } 337bdcd8170SKalle Valo } 338bdcd8170SKalle Valo 339bdcd8170SKalle Valo out: 340bdcd8170SKalle Valo return status; 341bdcd8170SKalle Valo } 342bdcd8170SKalle Valo 343bdcd8170SKalle Valo #define REG_DUMP_COUNT_AR6003 60 344bdcd8170SKalle Valo #define REGISTER_DUMP_LEN_MAX 60 345bdcd8170SKalle Valo 346bdcd8170SKalle Valo static void ath6kl_dump_target_assert_info(struct ath6kl *ar) 347bdcd8170SKalle Valo { 348bdcd8170SKalle Valo u32 address; 349bdcd8170SKalle Valo u32 regdump_loc = 0; 350bdcd8170SKalle Valo int status; 351bdcd8170SKalle Valo u32 regdump_val[REGISTER_DUMP_LEN_MAX]; 352bdcd8170SKalle Valo u32 i; 353bdcd8170SKalle Valo 354bdcd8170SKalle Valo if (ar->target_type != TARGET_TYPE_AR6003) 355bdcd8170SKalle Valo return; 356bdcd8170SKalle Valo 357bdcd8170SKalle Valo /* the reg dump pointer is copied to the host interest area */ 358bdcd8170SKalle Valo address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state)); 35931024d99SKevin Fang address = TARG_VTOP(ar->target_type, address); 360bdcd8170SKalle Valo 361bdcd8170SKalle Valo /* read RAM location through diagnostic window */ 362addb44beSKalle Valo status = ath6kl_diag_read32(ar, address, ®dump_loc); 363bdcd8170SKalle Valo 364bdcd8170SKalle Valo if (status || !regdump_loc) { 365bdcd8170SKalle Valo ath6kl_err("failed to get ptr to register dump area\n"); 366bdcd8170SKalle Valo return; 367bdcd8170SKalle Valo } 368bdcd8170SKalle Valo 369bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n", 370bdcd8170SKalle Valo regdump_loc); 37131024d99SKevin Fang regdump_loc = TARG_VTOP(ar->target_type, regdump_loc); 372bdcd8170SKalle Valo 373bdcd8170SKalle Valo /* fetch register dump data */ 374addb44beSKalle Valo status = ath6kl_diag_read(ar, regdump_loc, (u8 *)®dump_val[0], 375addb44beSKalle Valo REG_DUMP_COUNT_AR6003 * (sizeof(u32))); 376bdcd8170SKalle Valo 377bdcd8170SKalle Valo if (status) { 378bdcd8170SKalle Valo ath6kl_err("failed to get register dump\n"); 379bdcd8170SKalle Valo return; 380bdcd8170SKalle Valo } 381bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n"); 382bdcd8170SKalle Valo 383bdcd8170SKalle Valo for (i = 0; i < REG_DUMP_COUNT_AR6003; i++) 384bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n", 385bdcd8170SKalle Valo i, regdump_val[i]); 386bdcd8170SKalle Valo 387bdcd8170SKalle Valo } 388bdcd8170SKalle Valo 389bdcd8170SKalle Valo void ath6kl_target_failure(struct ath6kl *ar) 390bdcd8170SKalle Valo { 391bdcd8170SKalle Valo ath6kl_err("target asserted\n"); 392bdcd8170SKalle Valo 393bdcd8170SKalle Valo /* try dumping target assertion information (if any) */ 394bdcd8170SKalle Valo ath6kl_dump_target_assert_info(ar); 395bdcd8170SKalle Valo 396bdcd8170SKalle Valo } 397bdcd8170SKalle Valo 398bdcd8170SKalle Valo static int ath6kl_target_config_wlan_params(struct ath6kl *ar) 399bdcd8170SKalle Valo { 400bdcd8170SKalle Valo int status = 0; 4014dea08e0SJouni Malinen int ret; 402bdcd8170SKalle Valo 403bdcd8170SKalle Valo /* 404bdcd8170SKalle Valo * Configure the device for rx dot11 header rules. "0,0" are the 405bdcd8170SKalle Valo * default values. Required if checksum offload is needed. Set 406bdcd8170SKalle Valo * RxMetaVersion to 2. 407bdcd8170SKalle Valo */ 408bdcd8170SKalle Valo if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, 409bdcd8170SKalle Valo ar->rx_meta_ver, 0, 0)) { 410bdcd8170SKalle Valo ath6kl_err("unable to set the rx frame format\n"); 411bdcd8170SKalle Valo status = -EIO; 412bdcd8170SKalle Valo } 413bdcd8170SKalle Valo 414bdcd8170SKalle Valo if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) 415bdcd8170SKalle Valo if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1, 416bdcd8170SKalle Valo IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { 417bdcd8170SKalle Valo ath6kl_err("unable to set power save fail event policy\n"); 418bdcd8170SKalle Valo status = -EIO; 419bdcd8170SKalle Valo } 420bdcd8170SKalle Valo 421bdcd8170SKalle Valo if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) 422bdcd8170SKalle Valo if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0, 423bdcd8170SKalle Valo WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { 424bdcd8170SKalle Valo ath6kl_err("unable to set barker preamble policy\n"); 425bdcd8170SKalle Valo status = -EIO; 426bdcd8170SKalle Valo } 427bdcd8170SKalle Valo 428bdcd8170SKalle Valo if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, 429bdcd8170SKalle Valo WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { 430bdcd8170SKalle Valo ath6kl_err("unable to set keep alive interval\n"); 431bdcd8170SKalle Valo status = -EIO; 432bdcd8170SKalle Valo } 433bdcd8170SKalle Valo 434bdcd8170SKalle Valo if (ath6kl_wmi_disctimeout_cmd(ar->wmi, 435bdcd8170SKalle Valo WLAN_CONFIG_DISCONNECT_TIMEOUT)) { 436bdcd8170SKalle Valo ath6kl_err("unable to set disconnect timeout\n"); 437bdcd8170SKalle Valo status = -EIO; 438bdcd8170SKalle Valo } 439bdcd8170SKalle Valo 440bdcd8170SKalle Valo if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) 441bdcd8170SKalle Valo if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) { 442bdcd8170SKalle Valo ath6kl_err("unable to set txop bursting\n"); 443bdcd8170SKalle Valo status = -EIO; 444bdcd8170SKalle Valo } 445bdcd8170SKalle Valo 4466bbc7c35SJouni Malinen if (ar->p2p) { 4476bbc7c35SJouni Malinen ret = ath6kl_wmi_info_req_cmd(ar->wmi, 4486bbc7c35SJouni Malinen P2P_FLAG_CAPABILITIES_REQ | 4494dea08e0SJouni Malinen P2P_FLAG_MACADDR_REQ | 4504dea08e0SJouni Malinen P2P_FLAG_HMODEL_REQ); 4514dea08e0SJouni Malinen if (ret) { 4524dea08e0SJouni Malinen ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " 4536bbc7c35SJouni Malinen "capabilities (%d) - assuming P2P not " 4546bbc7c35SJouni Malinen "supported\n", ret); 4556bbc7c35SJouni Malinen ar->p2p = 0; 4566bbc7c35SJouni Malinen } 4576bbc7c35SJouni Malinen } 4586bbc7c35SJouni Malinen 4596bbc7c35SJouni Malinen if (ar->p2p) { 4606bbc7c35SJouni Malinen /* Enable Probe Request reporting for P2P */ 4616bbc7c35SJouni Malinen ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, true); 4626bbc7c35SJouni Malinen if (ret) { 4636bbc7c35SJouni Malinen ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " 4646bbc7c35SJouni Malinen "Request reporting (%d)\n", ret); 4656bbc7c35SJouni Malinen } 4664dea08e0SJouni Malinen } 4674dea08e0SJouni Malinen 468bdcd8170SKalle Valo return status; 469bdcd8170SKalle Valo } 470bdcd8170SKalle Valo 471bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar) 472bdcd8170SKalle Valo { 473bdcd8170SKalle Valo u32 param, ram_reserved_size; 474bdcd8170SKalle Valo u8 fw_iftype; 475bdcd8170SKalle Valo 476bdcd8170SKalle Valo fw_iftype = ath6kl_get_fw_iftype(ar); 477bdcd8170SKalle Valo if (fw_iftype == 0xff) 478bdcd8170SKalle Valo return -EINVAL; 479bdcd8170SKalle Valo 480bdcd8170SKalle Valo /* Tell target which HTC version it is used*/ 481bdcd8170SKalle Valo param = HTC_PROTOCOL_VERSION; 482bdcd8170SKalle Valo if (ath6kl_bmi_write(ar, 483bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 484bdcd8170SKalle Valo HI_ITEM(hi_app_host_interest)), 485bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 486bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for htc version failed\n"); 487bdcd8170SKalle Valo return -EIO; 488bdcd8170SKalle Valo } 489bdcd8170SKalle Valo 490bdcd8170SKalle Valo /* set the firmware mode to STA/IBSS/AP */ 491bdcd8170SKalle Valo param = 0; 492bdcd8170SKalle Valo 493bdcd8170SKalle Valo if (ath6kl_bmi_read(ar, 494bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 495bdcd8170SKalle Valo HI_ITEM(hi_option_flag)), 496bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 497bdcd8170SKalle Valo ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 498bdcd8170SKalle Valo return -EIO; 499bdcd8170SKalle Valo } 500bdcd8170SKalle Valo 501bdcd8170SKalle Valo param |= (1 << HI_OPTION_NUM_DEV_SHIFT); 502bdcd8170SKalle Valo param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT); 5036bbc7c35SJouni Malinen if (ar->p2p && fw_iftype == HI_OPTION_FW_MODE_BSS_STA) { 5046bbc7c35SJouni Malinen param |= HI_OPTION_FW_SUBMODE_P2PDEV << 5056bbc7c35SJouni Malinen HI_OPTION_FW_SUBMODE_SHIFT; 5066bbc7c35SJouni Malinen } 507bdcd8170SKalle Valo param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 508bdcd8170SKalle Valo param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 509bdcd8170SKalle Valo 510bdcd8170SKalle Valo if (ath6kl_bmi_write(ar, 511bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 512bdcd8170SKalle Valo HI_ITEM(hi_option_flag)), 513bdcd8170SKalle Valo (u8 *)¶m, 514bdcd8170SKalle Valo 4) != 0) { 515bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 516bdcd8170SKalle Valo return -EIO; 517bdcd8170SKalle Valo } 518bdcd8170SKalle Valo 519bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 520bdcd8170SKalle Valo 521bdcd8170SKalle Valo /* 522bdcd8170SKalle Valo * Hardcode the address use for the extended board data 523bdcd8170SKalle Valo * Ideally this should be pre-allocate by the OS at boot time 524bdcd8170SKalle Valo * But since it is a new feature and board data is loaded 525bdcd8170SKalle Valo * at init time, we have to workaround this from host. 526bdcd8170SKalle Valo * It is difficult to patch the firmware boot code, 527bdcd8170SKalle Valo * but possible in theory. 528bdcd8170SKalle Valo */ 529bdcd8170SKalle Valo 530991b27eaSKalle Valo param = ar->hw.board_ext_data_addr; 531991b27eaSKalle Valo ram_reserved_size = ar->hw.reserved_ram_size; 532bdcd8170SKalle Valo 533991b27eaSKalle Valo if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 534bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data)), 535bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 536bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 537bdcd8170SKalle Valo return -EIO; 538bdcd8170SKalle Valo } 539991b27eaSKalle Valo 540991b27eaSKalle Valo if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 541bdcd8170SKalle Valo HI_ITEM(hi_end_ram_reserve_sz)), 542bdcd8170SKalle Valo (u8 *)&ram_reserved_size, 4) != 0) { 543bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 544bdcd8170SKalle Valo return -EIO; 545bdcd8170SKalle Valo } 546bdcd8170SKalle Valo 547bdcd8170SKalle Valo /* set the block size for the target */ 548bdcd8170SKalle Valo if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 549bdcd8170SKalle Valo /* use default number of control buffers */ 550bdcd8170SKalle Valo return -EIO; 551bdcd8170SKalle Valo 552bdcd8170SKalle Valo return 0; 553bdcd8170SKalle Valo } 554bdcd8170SKalle Valo 555bdcd8170SKalle Valo struct ath6kl *ath6kl_core_alloc(struct device *sdev) 556bdcd8170SKalle Valo { 557bdcd8170SKalle Valo struct net_device *dev; 558bdcd8170SKalle Valo struct ath6kl *ar; 559bdcd8170SKalle Valo struct wireless_dev *wdev; 560bdcd8170SKalle Valo 561bdcd8170SKalle Valo wdev = ath6kl_cfg80211_init(sdev); 562bdcd8170SKalle Valo if (!wdev) { 563bdcd8170SKalle Valo ath6kl_err("ath6kl_cfg80211_init failed\n"); 564bdcd8170SKalle Valo return NULL; 565bdcd8170SKalle Valo } 566bdcd8170SKalle Valo 567bdcd8170SKalle Valo ar = wdev_priv(wdev); 568bdcd8170SKalle Valo ar->dev = sdev; 569bdcd8170SKalle Valo ar->wdev = wdev; 570bdcd8170SKalle Valo wdev->iftype = NL80211_IFTYPE_STATION; 571bdcd8170SKalle Valo 572d999ba3eSVasanthakumar Thiagarajan if (ath6kl_debug_init(ar)) { 573d999ba3eSVasanthakumar Thiagarajan ath6kl_err("Failed to initialize debugfs\n"); 574d999ba3eSVasanthakumar Thiagarajan ath6kl_cfg80211_deinit(ar); 575d999ba3eSVasanthakumar Thiagarajan return NULL; 576d999ba3eSVasanthakumar Thiagarajan } 577d999ba3eSVasanthakumar Thiagarajan 578bdcd8170SKalle Valo dev = alloc_netdev(0, "wlan%d", ether_setup); 579bdcd8170SKalle Valo if (!dev) { 580bdcd8170SKalle Valo ath6kl_err("no memory for network device instance\n"); 581bdcd8170SKalle Valo ath6kl_cfg80211_deinit(ar); 582bdcd8170SKalle Valo return NULL; 583bdcd8170SKalle Valo } 584bdcd8170SKalle Valo 585bdcd8170SKalle Valo dev->ieee80211_ptr = wdev; 586bdcd8170SKalle Valo SET_NETDEV_DEV(dev, wiphy_dev(wdev->wiphy)); 587bdcd8170SKalle Valo wdev->netdev = dev; 588bdcd8170SKalle Valo ar->sme_state = SME_DISCONNECTED; 589bdcd8170SKalle Valo 590bdcd8170SKalle Valo init_netdev(dev); 591bdcd8170SKalle Valo 592bdcd8170SKalle Valo ar->net_dev = dev; 593575b5f34SRaja Mani set_bit(WLAN_ENABLED, &ar->flag); 594bdcd8170SKalle Valo 595bdcd8170SKalle Valo ar->wlan_pwr_state = WLAN_POWER_STATE_ON; 596bdcd8170SKalle Valo 597bdcd8170SKalle Valo spin_lock_init(&ar->lock); 598bdcd8170SKalle Valo 599bdcd8170SKalle Valo ath6kl_init_control_info(ar); 600bdcd8170SKalle Valo init_waitqueue_head(&ar->event_wq); 601bdcd8170SKalle Valo sema_init(&ar->sem, 1); 602bdcd8170SKalle Valo clear_bit(DESTROY_IN_PROGRESS, &ar->flag); 603bdcd8170SKalle Valo 604bdcd8170SKalle Valo INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue); 605bdcd8170SKalle Valo 606bdcd8170SKalle Valo setup_timer(&ar->disconnect_timer, disconnect_timer_handler, 607bdcd8170SKalle Valo (unsigned long) dev); 608bdcd8170SKalle Valo 609bdcd8170SKalle Valo return ar; 610bdcd8170SKalle Valo } 611bdcd8170SKalle Valo 612bdcd8170SKalle Valo int ath6kl_unavail_ev(struct ath6kl *ar) 613bdcd8170SKalle Valo { 614bdcd8170SKalle Valo ath6kl_destroy(ar->net_dev, 1); 615bdcd8170SKalle Valo 616bdcd8170SKalle Valo return 0; 617bdcd8170SKalle Valo } 618bdcd8170SKalle Valo 619bdcd8170SKalle Valo /* firmware upload */ 620bdcd8170SKalle Valo static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 621bdcd8170SKalle Valo u8 **fw, size_t *fw_len) 622bdcd8170SKalle Valo { 623bdcd8170SKalle Valo const struct firmware *fw_entry; 624bdcd8170SKalle Valo int ret; 625bdcd8170SKalle Valo 626bdcd8170SKalle Valo ret = request_firmware(&fw_entry, filename, ar->dev); 627bdcd8170SKalle Valo if (ret) 628bdcd8170SKalle Valo return ret; 629bdcd8170SKalle Valo 630bdcd8170SKalle Valo *fw_len = fw_entry->size; 631bdcd8170SKalle Valo *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 632bdcd8170SKalle Valo 633bdcd8170SKalle Valo if (*fw == NULL) 634bdcd8170SKalle Valo ret = -ENOMEM; 635bdcd8170SKalle Valo 636bdcd8170SKalle Valo release_firmware(fw_entry); 637bdcd8170SKalle Valo 638bdcd8170SKalle Valo return ret; 639bdcd8170SKalle Valo } 640bdcd8170SKalle Valo 64192ecbff4SSam Leffler #ifdef CONFIG_OF 64292ecbff4SSam Leffler static const char *get_target_ver_dir(const struct ath6kl *ar) 64392ecbff4SSam Leffler { 64492ecbff4SSam Leffler switch (ar->version.target_ver) { 64592ecbff4SSam Leffler case AR6003_REV1_VERSION: 64692ecbff4SSam Leffler return "ath6k/AR6003/hw1.0"; 64792ecbff4SSam Leffler case AR6003_REV2_VERSION: 64892ecbff4SSam Leffler return "ath6k/AR6003/hw2.0"; 64992ecbff4SSam Leffler case AR6003_REV3_VERSION: 65092ecbff4SSam Leffler return "ath6k/AR6003/hw2.1.1"; 65192ecbff4SSam Leffler } 65292ecbff4SSam Leffler ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__, 65392ecbff4SSam Leffler ar->version.target_ver); 65492ecbff4SSam Leffler return NULL; 65592ecbff4SSam Leffler } 65692ecbff4SSam Leffler 65792ecbff4SSam Leffler /* 65892ecbff4SSam Leffler * Check the device tree for a board-id and use it to construct 65992ecbff4SSam Leffler * the pathname to the firmware file. Used (for now) to find a 66092ecbff4SSam Leffler * fallback to the "bdata.bin" file--typically a symlink to the 66192ecbff4SSam Leffler * appropriate board-specific file. 66292ecbff4SSam Leffler */ 66392ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar) 66492ecbff4SSam Leffler { 66592ecbff4SSam Leffler static const char *board_id_prop = "atheros,board-id"; 66692ecbff4SSam Leffler struct device_node *node; 66792ecbff4SSam Leffler char board_filename[64]; 66892ecbff4SSam Leffler const char *board_id; 66992ecbff4SSam Leffler int ret; 67092ecbff4SSam Leffler 67192ecbff4SSam Leffler for_each_compatible_node(node, NULL, "atheros,ath6kl") { 67292ecbff4SSam Leffler board_id = of_get_property(node, board_id_prop, NULL); 67392ecbff4SSam Leffler if (board_id == NULL) { 67492ecbff4SSam Leffler ath6kl_warn("No \"%s\" property on %s node.\n", 67592ecbff4SSam Leffler board_id_prop, node->name); 67692ecbff4SSam Leffler continue; 67792ecbff4SSam Leffler } 67892ecbff4SSam Leffler snprintf(board_filename, sizeof(board_filename), 67992ecbff4SSam Leffler "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id); 68092ecbff4SSam Leffler 68192ecbff4SSam Leffler ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 68292ecbff4SSam Leffler &ar->fw_board_len); 68392ecbff4SSam Leffler if (ret) { 68492ecbff4SSam Leffler ath6kl_err("Failed to get DT board file %s: %d\n", 68592ecbff4SSam Leffler board_filename, ret); 68692ecbff4SSam Leffler continue; 68792ecbff4SSam Leffler } 68892ecbff4SSam Leffler return true; 68992ecbff4SSam Leffler } 69092ecbff4SSam Leffler return false; 69192ecbff4SSam Leffler } 69292ecbff4SSam Leffler #else 69392ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar) 69492ecbff4SSam Leffler { 69592ecbff4SSam Leffler return false; 69692ecbff4SSam Leffler } 69792ecbff4SSam Leffler #endif /* CONFIG_OF */ 69892ecbff4SSam Leffler 699bdcd8170SKalle Valo static int ath6kl_fetch_board_file(struct ath6kl *ar) 700bdcd8170SKalle Valo { 701bdcd8170SKalle Valo const char *filename; 702bdcd8170SKalle Valo int ret; 703bdcd8170SKalle Valo 704772c31eeSKalle Valo if (ar->fw_board != NULL) 705772c31eeSKalle Valo return 0; 706772c31eeSKalle Valo 707bdcd8170SKalle Valo switch (ar->version.target_ver) { 708bdcd8170SKalle Valo case AR6003_REV2_VERSION: 709bdcd8170SKalle Valo filename = AR6003_REV2_BOARD_DATA_FILE; 710bdcd8170SKalle Valo break; 71131024d99SKevin Fang case AR6004_REV1_VERSION: 71231024d99SKevin Fang filename = AR6004_REV1_BOARD_DATA_FILE; 71331024d99SKevin Fang break; 714bdcd8170SKalle Valo default: 715bdcd8170SKalle Valo filename = AR6003_REV3_BOARD_DATA_FILE; 716bdcd8170SKalle Valo break; 717bdcd8170SKalle Valo } 718bdcd8170SKalle Valo 719bdcd8170SKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 720bdcd8170SKalle Valo &ar->fw_board_len); 721bdcd8170SKalle Valo if (ret == 0) { 722bdcd8170SKalle Valo /* managed to get proper board file */ 723bdcd8170SKalle Valo return 0; 724bdcd8170SKalle Valo } 725bdcd8170SKalle Valo 72692ecbff4SSam Leffler if (check_device_tree(ar)) { 72792ecbff4SSam Leffler /* got board file from device tree */ 72892ecbff4SSam Leffler return 0; 72992ecbff4SSam Leffler } 73092ecbff4SSam Leffler 731bdcd8170SKalle Valo /* there was no proper board file, try to use default instead */ 732bdcd8170SKalle Valo ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 733bdcd8170SKalle Valo filename, ret); 734bdcd8170SKalle Valo 735bdcd8170SKalle Valo switch (ar->version.target_ver) { 736bdcd8170SKalle Valo case AR6003_REV2_VERSION: 737bdcd8170SKalle Valo filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE; 738bdcd8170SKalle Valo break; 73931024d99SKevin Fang case AR6004_REV1_VERSION: 74031024d99SKevin Fang filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE; 74131024d99SKevin Fang break; 742bdcd8170SKalle Valo default: 743bdcd8170SKalle Valo filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE; 744bdcd8170SKalle Valo break; 745bdcd8170SKalle Valo } 746bdcd8170SKalle Valo 747bdcd8170SKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 748bdcd8170SKalle Valo &ar->fw_board_len); 749bdcd8170SKalle Valo if (ret) { 750bdcd8170SKalle Valo ath6kl_err("Failed to get default board file %s: %d\n", 751bdcd8170SKalle Valo filename, ret); 752bdcd8170SKalle Valo return ret; 753bdcd8170SKalle Valo } 754bdcd8170SKalle Valo 755bdcd8170SKalle Valo ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 756bdcd8170SKalle Valo ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 757bdcd8170SKalle Valo 758bdcd8170SKalle Valo return 0; 759bdcd8170SKalle Valo } 760bdcd8170SKalle Valo 761772c31eeSKalle Valo static int ath6kl_fetch_otp_file(struct ath6kl *ar) 762772c31eeSKalle Valo { 763772c31eeSKalle Valo const char *filename; 764772c31eeSKalle Valo int ret; 765772c31eeSKalle Valo 766772c31eeSKalle Valo if (ar->fw_otp != NULL) 767772c31eeSKalle Valo return 0; 768772c31eeSKalle Valo 769772c31eeSKalle Valo switch (ar->version.target_ver) { 770772c31eeSKalle Valo case AR6003_REV2_VERSION: 771772c31eeSKalle Valo filename = AR6003_REV2_OTP_FILE; 772772c31eeSKalle Valo break; 773772c31eeSKalle Valo case AR6004_REV1_VERSION: 774772c31eeSKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n"); 775772c31eeSKalle Valo return 0; 776772c31eeSKalle Valo break; 777772c31eeSKalle Valo default: 778772c31eeSKalle Valo filename = AR6003_REV3_OTP_FILE; 779772c31eeSKalle Valo break; 780772c31eeSKalle Valo } 781772c31eeSKalle Valo 782772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 783772c31eeSKalle Valo &ar->fw_otp_len); 784772c31eeSKalle Valo if (ret) { 785772c31eeSKalle Valo ath6kl_err("Failed to get OTP file %s: %d\n", 786772c31eeSKalle Valo filename, ret); 787772c31eeSKalle Valo return ret; 788772c31eeSKalle Valo } 789772c31eeSKalle Valo 790772c31eeSKalle Valo return 0; 791772c31eeSKalle Valo } 792772c31eeSKalle Valo 793772c31eeSKalle Valo static int ath6kl_fetch_fw_file(struct ath6kl *ar) 794772c31eeSKalle Valo { 795772c31eeSKalle Valo const char *filename; 796772c31eeSKalle Valo int ret; 797772c31eeSKalle Valo 798772c31eeSKalle Valo if (ar->fw != NULL) 799772c31eeSKalle Valo return 0; 800772c31eeSKalle Valo 801772c31eeSKalle Valo if (testmode) { 802772c31eeSKalle Valo switch (ar->version.target_ver) { 803772c31eeSKalle Valo case AR6003_REV2_VERSION: 804772c31eeSKalle Valo filename = AR6003_REV2_TCMD_FIRMWARE_FILE; 805772c31eeSKalle Valo break; 806772c31eeSKalle Valo case AR6003_REV3_VERSION: 807772c31eeSKalle Valo filename = AR6003_REV3_TCMD_FIRMWARE_FILE; 808772c31eeSKalle Valo break; 809772c31eeSKalle Valo case AR6004_REV1_VERSION: 810772c31eeSKalle Valo ath6kl_warn("testmode not supported with ar6004\n"); 811772c31eeSKalle Valo return -EOPNOTSUPP; 812772c31eeSKalle Valo default: 813772c31eeSKalle Valo ath6kl_warn("unknown target version: 0x%x\n", 814772c31eeSKalle Valo ar->version.target_ver); 815772c31eeSKalle Valo return -EINVAL; 816772c31eeSKalle Valo } 817772c31eeSKalle Valo 818772c31eeSKalle Valo set_bit(TESTMODE, &ar->flag); 819772c31eeSKalle Valo 820772c31eeSKalle Valo goto get_fw; 821772c31eeSKalle Valo } 822772c31eeSKalle Valo 823772c31eeSKalle Valo switch (ar->version.target_ver) { 824772c31eeSKalle Valo case AR6003_REV2_VERSION: 825772c31eeSKalle Valo filename = AR6003_REV2_FIRMWARE_FILE; 826772c31eeSKalle Valo break; 827772c31eeSKalle Valo case AR6004_REV1_VERSION: 828772c31eeSKalle Valo filename = AR6004_REV1_FIRMWARE_FILE; 829772c31eeSKalle Valo break; 830772c31eeSKalle Valo default: 831772c31eeSKalle Valo filename = AR6003_REV3_FIRMWARE_FILE; 832772c31eeSKalle Valo break; 833772c31eeSKalle Valo } 834772c31eeSKalle Valo 835772c31eeSKalle Valo get_fw: 836772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 837772c31eeSKalle Valo if (ret) { 838772c31eeSKalle Valo ath6kl_err("Failed to get firmware file %s: %d\n", 839772c31eeSKalle Valo filename, ret); 840772c31eeSKalle Valo return ret; 841772c31eeSKalle Valo } 842772c31eeSKalle Valo 843772c31eeSKalle Valo return 0; 844772c31eeSKalle Valo } 845772c31eeSKalle Valo 846772c31eeSKalle Valo static int ath6kl_fetch_patch_file(struct ath6kl *ar) 847772c31eeSKalle Valo { 848772c31eeSKalle Valo const char *filename; 849772c31eeSKalle Valo int ret; 850772c31eeSKalle Valo 851772c31eeSKalle Valo switch (ar->version.target_ver) { 852772c31eeSKalle Valo case AR6003_REV2_VERSION: 853772c31eeSKalle Valo filename = AR6003_REV2_PATCH_FILE; 854772c31eeSKalle Valo break; 855772c31eeSKalle Valo case AR6004_REV1_VERSION: 856772c31eeSKalle Valo /* FIXME: implement for AR6004 */ 857772c31eeSKalle Valo return 0; 858772c31eeSKalle Valo break; 859772c31eeSKalle Valo default: 860772c31eeSKalle Valo filename = AR6003_REV3_PATCH_FILE; 861772c31eeSKalle Valo break; 862772c31eeSKalle Valo } 863772c31eeSKalle Valo 864772c31eeSKalle Valo if (ar->fw_patch == NULL) { 865772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 866772c31eeSKalle Valo &ar->fw_patch_len); 867772c31eeSKalle Valo if (ret) { 868772c31eeSKalle Valo ath6kl_err("Failed to get patch file %s: %d\n", 869772c31eeSKalle Valo filename, ret); 870772c31eeSKalle Valo return ret; 871772c31eeSKalle Valo } 872772c31eeSKalle Valo } 873772c31eeSKalle Valo 874772c31eeSKalle Valo return 0; 875772c31eeSKalle Valo } 876772c31eeSKalle Valo 87750d41234SKalle Valo static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 878772c31eeSKalle Valo { 879772c31eeSKalle Valo int ret; 880772c31eeSKalle Valo 881772c31eeSKalle Valo ret = ath6kl_fetch_otp_file(ar); 882772c31eeSKalle Valo if (ret) 883772c31eeSKalle Valo return ret; 884772c31eeSKalle Valo 885772c31eeSKalle Valo ret = ath6kl_fetch_fw_file(ar); 886772c31eeSKalle Valo if (ret) 887772c31eeSKalle Valo return ret; 888772c31eeSKalle Valo 889772c31eeSKalle Valo ret = ath6kl_fetch_patch_file(ar); 890772c31eeSKalle Valo if (ret) 891772c31eeSKalle Valo return ret; 892772c31eeSKalle Valo 893772c31eeSKalle Valo return 0; 894772c31eeSKalle Valo } 895bdcd8170SKalle Valo 89650d41234SKalle Valo static int ath6kl_fetch_fw_api2(struct ath6kl *ar) 89750d41234SKalle Valo { 89850d41234SKalle Valo size_t magic_len, len, ie_len; 89950d41234SKalle Valo const struct firmware *fw; 90050d41234SKalle Valo struct ath6kl_fw_ie *hdr; 90150d41234SKalle Valo const char *filename; 90250d41234SKalle Valo const u8 *data; 90397e0496dSKalle Valo int ret, ie_id, i, index, bit; 9048a137480SKalle Valo __le32 *val; 90550d41234SKalle Valo 90650d41234SKalle Valo switch (ar->version.target_ver) { 90750d41234SKalle Valo case AR6003_REV2_VERSION: 90850d41234SKalle Valo filename = AR6003_REV2_FIRMWARE_2_FILE; 90950d41234SKalle Valo break; 91050d41234SKalle Valo case AR6003_REV3_VERSION: 91150d41234SKalle Valo filename = AR6003_REV3_FIRMWARE_2_FILE; 91250d41234SKalle Valo break; 91350d41234SKalle Valo case AR6004_REV1_VERSION: 91450d41234SKalle Valo filename = AR6004_REV1_FIRMWARE_2_FILE; 91550d41234SKalle Valo break; 91650d41234SKalle Valo default: 91750d41234SKalle Valo return -EOPNOTSUPP; 91850d41234SKalle Valo } 91950d41234SKalle Valo 92050d41234SKalle Valo ret = request_firmware(&fw, filename, ar->dev); 92150d41234SKalle Valo if (ret) 92250d41234SKalle Valo return ret; 92350d41234SKalle Valo 92450d41234SKalle Valo data = fw->data; 92550d41234SKalle Valo len = fw->size; 92650d41234SKalle Valo 92750d41234SKalle Valo /* magic also includes the null byte, check that as well */ 92850d41234SKalle Valo magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 92950d41234SKalle Valo 93050d41234SKalle Valo if (len < magic_len) { 93150d41234SKalle Valo ret = -EINVAL; 93250d41234SKalle Valo goto out; 93350d41234SKalle Valo } 93450d41234SKalle Valo 93550d41234SKalle Valo if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 93650d41234SKalle Valo ret = -EINVAL; 93750d41234SKalle Valo goto out; 93850d41234SKalle Valo } 93950d41234SKalle Valo 94050d41234SKalle Valo len -= magic_len; 94150d41234SKalle Valo data += magic_len; 94250d41234SKalle Valo 94350d41234SKalle Valo /* loop elements */ 94450d41234SKalle Valo while (len > sizeof(struct ath6kl_fw_ie)) { 94550d41234SKalle Valo /* hdr is unaligned! */ 94650d41234SKalle Valo hdr = (struct ath6kl_fw_ie *) data; 94750d41234SKalle Valo 94850d41234SKalle Valo ie_id = le32_to_cpup(&hdr->id); 94950d41234SKalle Valo ie_len = le32_to_cpup(&hdr->len); 95050d41234SKalle Valo 95150d41234SKalle Valo len -= sizeof(*hdr); 95250d41234SKalle Valo data += sizeof(*hdr); 95350d41234SKalle Valo 95450d41234SKalle Valo if (len < ie_len) { 95550d41234SKalle Valo ret = -EINVAL; 95650d41234SKalle Valo goto out; 95750d41234SKalle Valo } 95850d41234SKalle Valo 95950d41234SKalle Valo switch (ie_id) { 96050d41234SKalle Valo case ATH6KL_FW_IE_OTP_IMAGE: 9616bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%d B)\n", 9626bc36431SKalle Valo ie_len); 9636bc36431SKalle Valo 96450d41234SKalle Valo ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 96550d41234SKalle Valo 96650d41234SKalle Valo if (ar->fw_otp == NULL) { 96750d41234SKalle Valo ret = -ENOMEM; 96850d41234SKalle Valo goto out; 96950d41234SKalle Valo } 97050d41234SKalle Valo 97150d41234SKalle Valo ar->fw_otp_len = ie_len; 97250d41234SKalle Valo break; 97350d41234SKalle Valo case ATH6KL_FW_IE_FW_IMAGE: 9746bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%d B)\n", 9756bc36431SKalle Valo ie_len); 9766bc36431SKalle Valo 97750d41234SKalle Valo ar->fw = kmemdup(data, ie_len, GFP_KERNEL); 97850d41234SKalle Valo 97950d41234SKalle Valo if (ar->fw == NULL) { 98050d41234SKalle Valo ret = -ENOMEM; 98150d41234SKalle Valo goto out; 98250d41234SKalle Valo } 98350d41234SKalle Valo 98450d41234SKalle Valo ar->fw_len = ie_len; 98550d41234SKalle Valo break; 98650d41234SKalle Valo case ATH6KL_FW_IE_PATCH_IMAGE: 9876bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%d B)\n", 9886bc36431SKalle Valo ie_len); 9896bc36431SKalle Valo 99050d41234SKalle Valo ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 99150d41234SKalle Valo 99250d41234SKalle Valo if (ar->fw_patch == NULL) { 99350d41234SKalle Valo ret = -ENOMEM; 99450d41234SKalle Valo goto out; 99550d41234SKalle Valo } 99650d41234SKalle Valo 99750d41234SKalle Valo ar->fw_patch_len = ie_len; 99850d41234SKalle Valo break; 9998a137480SKalle Valo case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 10008a137480SKalle Valo val = (__le32 *) data; 10018a137480SKalle Valo ar->hw.reserved_ram_size = le32_to_cpup(val); 10026bc36431SKalle Valo 10036bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 10046bc36431SKalle Valo "found reserved ram size ie 0x%d\n", 10056bc36431SKalle Valo ar->hw.reserved_ram_size); 10068a137480SKalle Valo break; 100797e0496dSKalle Valo case ATH6KL_FW_IE_CAPABILITIES: 10086bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 10096bc36431SKalle Valo "found firmware capabilities ie (%d B)\n", 10106bc36431SKalle Valo ie_len); 10116bc36431SKalle Valo 101297e0496dSKalle Valo for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 101397e0496dSKalle Valo index = ALIGN(i, 8) / 8; 101497e0496dSKalle Valo bit = i % 8; 101597e0496dSKalle Valo 101697e0496dSKalle Valo if (data[index] & (1 << bit)) 101797e0496dSKalle Valo __set_bit(i, ar->fw_capabilities); 101897e0496dSKalle Valo } 10196bc36431SKalle Valo 10206bc36431SKalle Valo ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 10216bc36431SKalle Valo ar->fw_capabilities, 10226bc36431SKalle Valo sizeof(ar->fw_capabilities)); 102397e0496dSKalle Valo break; 10241b4304daSKalle Valo case ATH6KL_FW_IE_PATCH_ADDR: 10251b4304daSKalle Valo if (ie_len != sizeof(*val)) 10261b4304daSKalle Valo break; 10271b4304daSKalle Valo 10281b4304daSKalle Valo val = (__le32 *) data; 10291b4304daSKalle Valo ar->hw.dataset_patch_addr = le32_to_cpup(val); 10306bc36431SKalle Valo 10316bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 10326bc36431SKalle Valo "found patch address ie 0x%d\n", 10336bc36431SKalle Valo ar->hw.dataset_patch_addr); 10341b4304daSKalle Valo break; 103550d41234SKalle Valo default: 10366bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 103750d41234SKalle Valo le32_to_cpup(&hdr->id)); 103850d41234SKalle Valo break; 103950d41234SKalle Valo } 104050d41234SKalle Valo 104150d41234SKalle Valo len -= ie_len; 104250d41234SKalle Valo data += ie_len; 104350d41234SKalle Valo }; 104450d41234SKalle Valo 104550d41234SKalle Valo ret = 0; 104650d41234SKalle Valo out: 104750d41234SKalle Valo release_firmware(fw); 104850d41234SKalle Valo 104950d41234SKalle Valo return ret; 105050d41234SKalle Valo } 105150d41234SKalle Valo 105250d41234SKalle Valo static int ath6kl_fetch_firmwares(struct ath6kl *ar) 105350d41234SKalle Valo { 105450d41234SKalle Valo int ret; 105550d41234SKalle Valo 105650d41234SKalle Valo ret = ath6kl_fetch_board_file(ar); 105750d41234SKalle Valo if (ret) 105850d41234SKalle Valo return ret; 105950d41234SKalle Valo 106050d41234SKalle Valo ret = ath6kl_fetch_fw_api2(ar); 10616bc36431SKalle Valo if (ret == 0) { 10626bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n"); 106350d41234SKalle Valo return 0; 10646bc36431SKalle Valo } 106550d41234SKalle Valo 106650d41234SKalle Valo ret = ath6kl_fetch_fw_api1(ar); 106750d41234SKalle Valo if (ret) 106850d41234SKalle Valo return ret; 106950d41234SKalle Valo 10706bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n"); 10716bc36431SKalle Valo 107250d41234SKalle Valo return 0; 107350d41234SKalle Valo } 107450d41234SKalle Valo 1075bdcd8170SKalle Valo static int ath6kl_upload_board_file(struct ath6kl *ar) 1076bdcd8170SKalle Valo { 1077bdcd8170SKalle Valo u32 board_address, board_ext_address, param; 107831024d99SKevin Fang u32 board_data_size, board_ext_data_size; 1079bdcd8170SKalle Valo int ret; 1080bdcd8170SKalle Valo 1081772c31eeSKalle Valo if (WARN_ON(ar->fw_board == NULL)) 1082772c31eeSKalle Valo return -ENOENT; 1083bdcd8170SKalle Valo 108431024d99SKevin Fang /* 108531024d99SKevin Fang * Determine where in Target RAM to write Board Data. 108631024d99SKevin Fang * For AR6004, host determine Target RAM address for 108731024d99SKevin Fang * writing board data. 108831024d99SKevin Fang */ 108931024d99SKevin Fang if (ar->target_type == TARGET_TYPE_AR6004) { 109031024d99SKevin Fang board_address = AR6004_REV1_BOARD_DATA_ADDRESS; 109131024d99SKevin Fang ath6kl_bmi_write(ar, 109231024d99SKevin Fang ath6kl_get_hi_item_addr(ar, 109331024d99SKevin Fang HI_ITEM(hi_board_data)), 109431024d99SKevin Fang (u8 *) &board_address, 4); 109531024d99SKevin Fang } else { 1096bdcd8170SKalle Valo ath6kl_bmi_read(ar, 1097bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1098bdcd8170SKalle Valo HI_ITEM(hi_board_data)), 1099bdcd8170SKalle Valo (u8 *) &board_address, 4); 110031024d99SKevin Fang } 110131024d99SKevin Fang 1102bdcd8170SKalle Valo /* determine where in target ram to write extended board data */ 1103bdcd8170SKalle Valo ath6kl_bmi_read(ar, 1104bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1105bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data)), 1106bdcd8170SKalle Valo (u8 *) &board_ext_address, 4); 1107bdcd8170SKalle Valo 1108bdcd8170SKalle Valo if (board_ext_address == 0) { 1109bdcd8170SKalle Valo ath6kl_err("Failed to get board file target address.\n"); 1110bdcd8170SKalle Valo return -EINVAL; 1111bdcd8170SKalle Valo } 1112bdcd8170SKalle Valo 111331024d99SKevin Fang switch (ar->target_type) { 111431024d99SKevin Fang case TARGET_TYPE_AR6003: 111531024d99SKevin Fang board_data_size = AR6003_BOARD_DATA_SZ; 111631024d99SKevin Fang board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 111731024d99SKevin Fang break; 111831024d99SKevin Fang case TARGET_TYPE_AR6004: 111931024d99SKevin Fang board_data_size = AR6004_BOARD_DATA_SZ; 112031024d99SKevin Fang board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 112131024d99SKevin Fang break; 112231024d99SKevin Fang default: 112331024d99SKevin Fang WARN_ON(1); 112431024d99SKevin Fang return -EINVAL; 112531024d99SKevin Fang break; 112631024d99SKevin Fang } 112731024d99SKevin Fang 112831024d99SKevin Fang if (ar->fw_board_len == (board_data_size + 112931024d99SKevin Fang board_ext_data_size)) { 113031024d99SKevin Fang 1131bdcd8170SKalle Valo /* write extended board data */ 11326bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 11336bc36431SKalle Valo "writing extended board data to 0x%x (%d B)\n", 11346bc36431SKalle Valo board_ext_address, board_ext_data_size); 11356bc36431SKalle Valo 1136bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, board_ext_address, 113731024d99SKevin Fang ar->fw_board + board_data_size, 113831024d99SKevin Fang board_ext_data_size); 1139bdcd8170SKalle Valo if (ret) { 1140bdcd8170SKalle Valo ath6kl_err("Failed to write extended board data: %d\n", 1141bdcd8170SKalle Valo ret); 1142bdcd8170SKalle Valo return ret; 1143bdcd8170SKalle Valo } 1144bdcd8170SKalle Valo 1145bdcd8170SKalle Valo /* record that extended board data is initialized */ 114631024d99SKevin Fang param = (board_ext_data_size << 16) | 1; 114731024d99SKevin Fang 1148bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1149bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1150bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data_config)), 1151bdcd8170SKalle Valo (unsigned char *) ¶m, 4); 1152bdcd8170SKalle Valo } 1153bdcd8170SKalle Valo 115431024d99SKevin Fang if (ar->fw_board_len < board_data_size) { 1155bdcd8170SKalle Valo ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1156bdcd8170SKalle Valo ret = -EINVAL; 1157bdcd8170SKalle Valo return ret; 1158bdcd8170SKalle Valo } 1159bdcd8170SKalle Valo 11606bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 11616bc36431SKalle Valo board_address, board_data_size); 11626bc36431SKalle Valo 1163bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 116431024d99SKevin Fang board_data_size); 1165bdcd8170SKalle Valo 1166bdcd8170SKalle Valo if (ret) { 1167bdcd8170SKalle Valo ath6kl_err("Board file bmi write failed: %d\n", ret); 1168bdcd8170SKalle Valo return ret; 1169bdcd8170SKalle Valo } 1170bdcd8170SKalle Valo 1171bdcd8170SKalle Valo /* record the fact that Board Data IS initialized */ 1172bdcd8170SKalle Valo param = 1; 1173bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1174bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1175bdcd8170SKalle Valo HI_ITEM(hi_board_data_initialized)), 1176bdcd8170SKalle Valo (u8 *)¶m, 4); 1177bdcd8170SKalle Valo 1178bdcd8170SKalle Valo return ret; 1179bdcd8170SKalle Valo } 1180bdcd8170SKalle Valo 1181bdcd8170SKalle Valo static int ath6kl_upload_otp(struct ath6kl *ar) 1182bdcd8170SKalle Valo { 1183bdcd8170SKalle Valo u32 address, param; 1184bdcd8170SKalle Valo int ret; 1185bdcd8170SKalle Valo 1186772c31eeSKalle Valo if (WARN_ON(ar->fw_otp == NULL)) 1187772c31eeSKalle Valo return -ENOENT; 1188bdcd8170SKalle Valo 1189a01ac414SKalle Valo address = ar->hw.app_load_addr; 1190bdcd8170SKalle Valo 11916bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%d B)\n", address, 11926bc36431SKalle Valo ar->fw_otp_len); 11936bc36431SKalle Valo 1194bdcd8170SKalle Valo ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1195bdcd8170SKalle Valo ar->fw_otp_len); 1196bdcd8170SKalle Valo if (ret) { 1197bdcd8170SKalle Valo ath6kl_err("Failed to upload OTP file: %d\n", ret); 1198bdcd8170SKalle Valo return ret; 1199bdcd8170SKalle Valo } 1200bdcd8170SKalle Valo 1201639d0b89SKalle Valo /* read firmware start address */ 1202639d0b89SKalle Valo ret = ath6kl_bmi_read(ar, 1203639d0b89SKalle Valo ath6kl_get_hi_item_addr(ar, 1204639d0b89SKalle Valo HI_ITEM(hi_app_start)), 1205639d0b89SKalle Valo (u8 *) &address, sizeof(address)); 1206639d0b89SKalle Valo 1207639d0b89SKalle Valo if (ret) { 1208639d0b89SKalle Valo ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1209639d0b89SKalle Valo return ret; 1210639d0b89SKalle Valo } 1211639d0b89SKalle Valo 1212639d0b89SKalle Valo ar->hw.app_start_override_addr = address; 1213639d0b89SKalle Valo 12146bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr 0x%x\n", 12156bc36431SKalle Valo ar->hw.app_start_override_addr); 12166bc36431SKalle Valo 1217bdcd8170SKalle Valo /* execute the OTP code */ 12186bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", address); 1219bdcd8170SKalle Valo param = 0; 1220bdcd8170SKalle Valo ath6kl_bmi_execute(ar, address, ¶m); 1221bdcd8170SKalle Valo 1222bdcd8170SKalle Valo return ret; 1223bdcd8170SKalle Valo } 1224bdcd8170SKalle Valo 1225bdcd8170SKalle Valo static int ath6kl_upload_firmware(struct ath6kl *ar) 1226bdcd8170SKalle Valo { 1227bdcd8170SKalle Valo u32 address; 1228bdcd8170SKalle Valo int ret; 1229bdcd8170SKalle Valo 1230772c31eeSKalle Valo if (WARN_ON(ar->fw == NULL)) 1231772c31eeSKalle Valo return -ENOENT; 1232bdcd8170SKalle Valo 1233a01ac414SKalle Valo address = ar->hw.app_load_addr; 1234bdcd8170SKalle Valo 12356bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%d B)\n", 12366bc36431SKalle Valo address, ar->fw_len); 12376bc36431SKalle Valo 1238bdcd8170SKalle Valo ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1239bdcd8170SKalle Valo 1240bdcd8170SKalle Valo if (ret) { 1241bdcd8170SKalle Valo ath6kl_err("Failed to write firmware: %d\n", ret); 1242bdcd8170SKalle Valo return ret; 1243bdcd8170SKalle Valo } 1244bdcd8170SKalle Valo 124531024d99SKevin Fang /* 124631024d99SKevin Fang * Set starting address for firmware 124731024d99SKevin Fang * Don't need to setup app_start override addr on AR6004 124831024d99SKevin Fang */ 124931024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6004) { 1250a01ac414SKalle Valo address = ar->hw.app_start_override_addr; 1251bdcd8170SKalle Valo ath6kl_bmi_set_app_start(ar, address); 125231024d99SKevin Fang } 1253bdcd8170SKalle Valo return ret; 1254bdcd8170SKalle Valo } 1255bdcd8170SKalle Valo 1256bdcd8170SKalle Valo static int ath6kl_upload_patch(struct ath6kl *ar) 1257bdcd8170SKalle Valo { 1258bdcd8170SKalle Valo u32 address, param; 1259bdcd8170SKalle Valo int ret; 1260bdcd8170SKalle Valo 1261772c31eeSKalle Valo if (WARN_ON(ar->fw_patch == NULL)) 1262772c31eeSKalle Valo return -ENOENT; 1263bdcd8170SKalle Valo 1264a01ac414SKalle Valo address = ar->hw.dataset_patch_addr; 1265bdcd8170SKalle Valo 12666bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%d B)\n", 12676bc36431SKalle Valo address, ar->fw_patch_len); 12686bc36431SKalle Valo 1269bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1270bdcd8170SKalle Valo if (ret) { 1271bdcd8170SKalle Valo ath6kl_err("Failed to write patch file: %d\n", ret); 1272bdcd8170SKalle Valo return ret; 1273bdcd8170SKalle Valo } 1274bdcd8170SKalle Valo 1275bdcd8170SKalle Valo param = address; 1276bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1277bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1278bdcd8170SKalle Valo HI_ITEM(hi_dset_list_head)), 1279bdcd8170SKalle Valo (unsigned char *) ¶m, 4); 1280bdcd8170SKalle Valo 1281bdcd8170SKalle Valo return 0; 1282bdcd8170SKalle Valo } 1283bdcd8170SKalle Valo 1284bdcd8170SKalle Valo static int ath6kl_init_upload(struct ath6kl *ar) 1285bdcd8170SKalle Valo { 1286bdcd8170SKalle Valo u32 param, options, sleep, address; 1287bdcd8170SKalle Valo int status = 0; 1288bdcd8170SKalle Valo 128931024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6003 && 129031024d99SKevin Fang ar->target_type != TARGET_TYPE_AR6004) 1291bdcd8170SKalle Valo return -EINVAL; 1292bdcd8170SKalle Valo 1293bdcd8170SKalle Valo /* temporarily disable system sleep */ 1294bdcd8170SKalle Valo address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1295bdcd8170SKalle Valo status = ath6kl_bmi_reg_read(ar, address, ¶m); 1296bdcd8170SKalle Valo if (status) 1297bdcd8170SKalle Valo return status; 1298bdcd8170SKalle Valo 1299bdcd8170SKalle Valo options = param; 1300bdcd8170SKalle Valo 1301bdcd8170SKalle Valo param |= ATH6KL_OPTION_SLEEP_DISABLE; 1302bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1303bdcd8170SKalle Valo if (status) 1304bdcd8170SKalle Valo return status; 1305bdcd8170SKalle Valo 1306bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1307bdcd8170SKalle Valo status = ath6kl_bmi_reg_read(ar, address, ¶m); 1308bdcd8170SKalle Valo if (status) 1309bdcd8170SKalle Valo return status; 1310bdcd8170SKalle Valo 1311bdcd8170SKalle Valo sleep = param; 1312bdcd8170SKalle Valo 1313bdcd8170SKalle Valo param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1314bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1315bdcd8170SKalle Valo if (status) 1316bdcd8170SKalle Valo return status; 1317bdcd8170SKalle Valo 1318bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1319bdcd8170SKalle Valo options, sleep); 1320bdcd8170SKalle Valo 1321bdcd8170SKalle Valo /* program analog PLL register */ 132231024d99SKevin Fang /* no need to control 40/44MHz clock on AR6004 */ 132331024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6004) { 1324bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1325bdcd8170SKalle Valo 0xF9104001); 132631024d99SKevin Fang 1327bdcd8170SKalle Valo if (status) 1328bdcd8170SKalle Valo return status; 1329bdcd8170SKalle Valo 1330bdcd8170SKalle Valo /* Run at 80/88MHz by default */ 1331bdcd8170SKalle Valo param = SM(CPU_CLOCK_STANDARD, 1); 1332bdcd8170SKalle Valo 1333bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1334bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1335bdcd8170SKalle Valo if (status) 1336bdcd8170SKalle Valo return status; 133731024d99SKevin Fang } 1338bdcd8170SKalle Valo 1339bdcd8170SKalle Valo param = 0; 1340bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1341bdcd8170SKalle Valo param = SM(LPO_CAL_ENABLE, 1); 1342bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1343bdcd8170SKalle Valo if (status) 1344bdcd8170SKalle Valo return status; 1345bdcd8170SKalle Valo 1346bdcd8170SKalle Valo /* WAR to avoid SDIO CRC err */ 1347bdcd8170SKalle Valo if (ar->version.target_ver == AR6003_REV2_VERSION) { 1348bdcd8170SKalle Valo ath6kl_err("temporary war to avoid sdio crc error\n"); 1349bdcd8170SKalle Valo 1350bdcd8170SKalle Valo param = 0x20; 1351bdcd8170SKalle Valo 1352bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1353bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1354bdcd8170SKalle Valo if (status) 1355bdcd8170SKalle Valo return status; 1356bdcd8170SKalle Valo 1357bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1358bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1359bdcd8170SKalle Valo if (status) 1360bdcd8170SKalle Valo return status; 1361bdcd8170SKalle Valo 1362bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1363bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1364bdcd8170SKalle Valo if (status) 1365bdcd8170SKalle Valo return status; 1366bdcd8170SKalle Valo 1367bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1368bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1369bdcd8170SKalle Valo if (status) 1370bdcd8170SKalle Valo return status; 1371bdcd8170SKalle Valo } 1372bdcd8170SKalle Valo 1373bdcd8170SKalle Valo /* write EEPROM data to Target RAM */ 1374bdcd8170SKalle Valo status = ath6kl_upload_board_file(ar); 1375bdcd8170SKalle Valo if (status) 1376bdcd8170SKalle Valo return status; 1377bdcd8170SKalle Valo 1378bdcd8170SKalle Valo /* transfer One time Programmable data */ 1379bdcd8170SKalle Valo status = ath6kl_upload_otp(ar); 1380bdcd8170SKalle Valo if (status) 1381bdcd8170SKalle Valo return status; 1382bdcd8170SKalle Valo 1383bdcd8170SKalle Valo /* Download Target firmware */ 1384bdcd8170SKalle Valo status = ath6kl_upload_firmware(ar); 1385bdcd8170SKalle Valo if (status) 1386bdcd8170SKalle Valo return status; 1387bdcd8170SKalle Valo 1388bdcd8170SKalle Valo status = ath6kl_upload_patch(ar); 1389bdcd8170SKalle Valo if (status) 1390bdcd8170SKalle Valo return status; 1391bdcd8170SKalle Valo 1392bdcd8170SKalle Valo /* Restore system sleep */ 1393bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1394bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, sleep); 1395bdcd8170SKalle Valo if (status) 1396bdcd8170SKalle Valo return status; 1397bdcd8170SKalle Valo 1398bdcd8170SKalle Valo address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1399bdcd8170SKalle Valo param = options | 0x20; 1400bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1401bdcd8170SKalle Valo if (status) 1402bdcd8170SKalle Valo return status; 1403bdcd8170SKalle Valo 1404bdcd8170SKalle Valo /* Configure GPIO AR6003 UART */ 1405bdcd8170SKalle Valo param = CONFIG_AR600x_DEBUG_UART_TX_PIN; 1406bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 1407bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1408bdcd8170SKalle Valo HI_ITEM(hi_dbg_uart_txpin)), 1409bdcd8170SKalle Valo (u8 *)¶m, 4); 1410bdcd8170SKalle Valo 1411bdcd8170SKalle Valo return status; 1412bdcd8170SKalle Valo } 1413bdcd8170SKalle Valo 1414a01ac414SKalle Valo static int ath6kl_init_hw_params(struct ath6kl *ar) 1415a01ac414SKalle Valo { 1416a01ac414SKalle Valo switch (ar->version.target_ver) { 1417a01ac414SKalle Valo case AR6003_REV2_VERSION: 1418a01ac414SKalle Valo ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS; 1419a01ac414SKalle Valo ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS; 1420991b27eaSKalle Valo ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS; 1421991b27eaSKalle Valo ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE; 1422a01ac414SKalle Valo break; 1423a01ac414SKalle Valo case AR6003_REV3_VERSION: 1424a01ac414SKalle Valo ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS; 1425a01ac414SKalle Valo ar->hw.app_load_addr = 0x1234; 1426991b27eaSKalle Valo ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS; 1427991b27eaSKalle Valo ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE; 1428a01ac414SKalle Valo break; 1429a01ac414SKalle Valo case AR6004_REV1_VERSION: 1430a01ac414SKalle Valo ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS; 1431a01ac414SKalle Valo ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS; 1432991b27eaSKalle Valo ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS; 1433991b27eaSKalle Valo ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE; 1434a01ac414SKalle Valo break; 1435a01ac414SKalle Valo default: 1436a01ac414SKalle Valo ath6kl_err("Unsupported hardware version: 0x%x\n", 1437a01ac414SKalle Valo ar->version.target_ver); 1438a01ac414SKalle Valo return -EINVAL; 1439a01ac414SKalle Valo } 1440a01ac414SKalle Valo 14416bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 14426bc36431SKalle Valo "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 14436bc36431SKalle Valo ar->version.target_ver, ar->target_type, 14446bc36431SKalle Valo ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 14456bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 14466bc36431SKalle Valo "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 14476bc36431SKalle Valo ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 14486bc36431SKalle Valo ar->hw.reserved_ram_size); 14496bc36431SKalle Valo 1450a01ac414SKalle Valo return 0; 1451a01ac414SKalle Valo } 1452a01ac414SKalle Valo 1453bdcd8170SKalle Valo static int ath6kl_init(struct net_device *dev) 1454bdcd8170SKalle Valo { 1455bdcd8170SKalle Valo struct ath6kl *ar = ath6kl_priv(dev); 1456bdcd8170SKalle Valo int status = 0; 1457bdcd8170SKalle Valo s32 timeleft; 1458bdcd8170SKalle Valo 1459bdcd8170SKalle Valo if (!ar) 1460bdcd8170SKalle Valo return -EIO; 1461bdcd8170SKalle Valo 1462bdcd8170SKalle Valo /* Do we need to finish the BMI phase */ 1463bdcd8170SKalle Valo if (ath6kl_bmi_done(ar)) { 1464bdcd8170SKalle Valo status = -EIO; 1465bdcd8170SKalle Valo goto ath6kl_init_done; 1466bdcd8170SKalle Valo } 1467bdcd8170SKalle Valo 1468bdcd8170SKalle Valo /* Indicate that WMI is enabled (although not ready yet) */ 1469bdcd8170SKalle Valo set_bit(WMI_ENABLED, &ar->flag); 14702865785eSVasanthakumar Thiagarajan ar->wmi = ath6kl_wmi_init(ar); 1471bdcd8170SKalle Valo if (!ar->wmi) { 1472bdcd8170SKalle Valo ath6kl_err("failed to initialize wmi\n"); 1473bdcd8170SKalle Valo status = -EIO; 1474bdcd8170SKalle Valo goto ath6kl_init_done; 1475bdcd8170SKalle Valo } 1476bdcd8170SKalle Valo 1477bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); 1478bdcd8170SKalle Valo 1479bdcd8170SKalle Valo /* 1480bdcd8170SKalle Valo * The reason we have to wait for the target here is that the 1481bdcd8170SKalle Valo * driver layer has to init BMI in order to set the host block 1482bdcd8170SKalle Valo * size. 1483bdcd8170SKalle Valo */ 1484ad226ec2SKalle Valo if (ath6kl_htc_wait_target(ar->htc_target)) { 1485bdcd8170SKalle Valo status = -EIO; 1486852bd9d9SVasanthakumar Thiagarajan goto err_node_cleanup; 1487bdcd8170SKalle Valo } 1488bdcd8170SKalle Valo 1489bdcd8170SKalle Valo if (ath6kl_init_service_ep(ar)) { 1490bdcd8170SKalle Valo status = -EIO; 1491bdcd8170SKalle Valo goto err_cleanup_scatter; 1492bdcd8170SKalle Valo } 1493bdcd8170SKalle Valo 1494bdcd8170SKalle Valo /* setup access class priority mappings */ 1495bdcd8170SKalle Valo ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ 1496bdcd8170SKalle Valo ar->ac_stream_pri_map[WMM_AC_BE] = 1; 1497bdcd8170SKalle Valo ar->ac_stream_pri_map[WMM_AC_VI] = 2; 1498bdcd8170SKalle Valo ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ 1499bdcd8170SKalle Valo 1500bdcd8170SKalle Valo /* give our connected endpoints some buffers */ 1501bdcd8170SKalle Valo ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); 1502bdcd8170SKalle Valo ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); 1503bdcd8170SKalle Valo 1504bdcd8170SKalle Valo /* allocate some buffers that handle larger AMSDU frames */ 1505bdcd8170SKalle Valo ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); 1506bdcd8170SKalle Valo 1507bdcd8170SKalle Valo /* setup credit distribution */ 1508bdcd8170SKalle Valo ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info); 1509bdcd8170SKalle Valo 1510bdcd8170SKalle Valo ath6kl_cookie_init(ar); 1511bdcd8170SKalle Valo 1512bdcd8170SKalle Valo /* start HTC */ 1513ad226ec2SKalle Valo status = ath6kl_htc_start(ar->htc_target); 1514bdcd8170SKalle Valo 1515bdcd8170SKalle Valo if (status) { 1516bdcd8170SKalle Valo ath6kl_cookie_cleanup(ar); 1517bdcd8170SKalle Valo goto err_rxbuf_cleanup; 1518bdcd8170SKalle Valo } 1519bdcd8170SKalle Valo 1520bdcd8170SKalle Valo /* Wait for Wmi event to be ready */ 1521bdcd8170SKalle Valo timeleft = wait_event_interruptible_timeout(ar->event_wq, 1522bdcd8170SKalle Valo test_bit(WMI_READY, 1523bdcd8170SKalle Valo &ar->flag), 1524bdcd8170SKalle Valo WMI_TIMEOUT); 1525bdcd8170SKalle Valo 15266bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 15276bc36431SKalle Valo 1528bdcd8170SKalle Valo if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 1529bdcd8170SKalle Valo ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 1530bdcd8170SKalle Valo ATH6KL_ABI_VERSION, ar->version.abi_ver); 1531bdcd8170SKalle Valo status = -EIO; 1532bdcd8170SKalle Valo goto err_htc_stop; 1533bdcd8170SKalle Valo } 1534bdcd8170SKalle Valo 1535bdcd8170SKalle Valo if (!timeleft || signal_pending(current)) { 1536bdcd8170SKalle Valo ath6kl_err("wmi is not ready or wait was interrupted\n"); 1537bdcd8170SKalle Valo status = -EIO; 1538bdcd8170SKalle Valo goto err_htc_stop; 1539bdcd8170SKalle Valo } 1540bdcd8170SKalle Valo 1541bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 1542bdcd8170SKalle Valo 1543bdcd8170SKalle Valo /* communicate the wmi protocol verision to the target */ 1544bdcd8170SKalle Valo if ((ath6kl_set_host_app_area(ar)) != 0) 1545bdcd8170SKalle Valo ath6kl_err("unable to set the host app area\n"); 1546bdcd8170SKalle Valo 1547bdcd8170SKalle Valo ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | 1548bdcd8170SKalle Valo ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; 1549bdcd8170SKalle Valo 1550011a36e1SVivek Natarajan ar->wdev->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM; 1551011a36e1SVivek Natarajan 1552bdcd8170SKalle Valo status = ath6kl_target_config_wlan_params(ar); 1553bdcd8170SKalle Valo if (!status) 1554bdcd8170SKalle Valo goto ath6kl_init_done; 1555bdcd8170SKalle Valo 1556bdcd8170SKalle Valo err_htc_stop: 1557ad226ec2SKalle Valo ath6kl_htc_stop(ar->htc_target); 1558bdcd8170SKalle Valo err_rxbuf_cleanup: 1559ad226ec2SKalle Valo ath6kl_htc_flush_rx_buf(ar->htc_target); 1560bdcd8170SKalle Valo ath6kl_cleanup_amsdu_rxbufs(ar); 1561bdcd8170SKalle Valo err_cleanup_scatter: 1562bdcd8170SKalle Valo ath6kl_hif_cleanup_scatter(ar); 1563852bd9d9SVasanthakumar Thiagarajan err_node_cleanup: 1564bdcd8170SKalle Valo ath6kl_wmi_shutdown(ar->wmi); 1565bdcd8170SKalle Valo clear_bit(WMI_ENABLED, &ar->flag); 1566bdcd8170SKalle Valo ar->wmi = NULL; 1567bdcd8170SKalle Valo 1568bdcd8170SKalle Valo ath6kl_init_done: 1569bdcd8170SKalle Valo return status; 1570bdcd8170SKalle Valo } 1571bdcd8170SKalle Valo 1572bdcd8170SKalle Valo int ath6kl_core_init(struct ath6kl *ar) 1573bdcd8170SKalle Valo { 1574bdcd8170SKalle Valo int ret = 0; 1575bdcd8170SKalle Valo struct ath6kl_bmi_target_info targ_info; 1576bdcd8170SKalle Valo 1577bdcd8170SKalle Valo ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); 1578bdcd8170SKalle Valo if (!ar->ath6kl_wq) 1579bdcd8170SKalle Valo return -ENOMEM; 1580bdcd8170SKalle Valo 1581bdcd8170SKalle Valo ret = ath6kl_bmi_init(ar); 1582bdcd8170SKalle Valo if (ret) 1583bdcd8170SKalle Valo goto err_wq; 1584bdcd8170SKalle Valo 1585bdcd8170SKalle Valo ret = ath6kl_bmi_get_target_info(ar, &targ_info); 1586bdcd8170SKalle Valo if (ret) 1587bdcd8170SKalle Valo goto err_bmi_cleanup; 1588bdcd8170SKalle Valo 1589bdcd8170SKalle Valo ar->version.target_ver = le32_to_cpu(targ_info.version); 1590bdcd8170SKalle Valo ar->target_type = le32_to_cpu(targ_info.type); 1591bdcd8170SKalle Valo ar->wdev->wiphy->hw_version = le32_to_cpu(targ_info.version); 1592bdcd8170SKalle Valo 1593a01ac414SKalle Valo ret = ath6kl_init_hw_params(ar); 1594a01ac414SKalle Valo if (ret) 1595a01ac414SKalle Valo goto err_bmi_cleanup; 1596a01ac414SKalle Valo 1597bdcd8170SKalle Valo ret = ath6kl_configure_target(ar); 1598bdcd8170SKalle Valo if (ret) 1599bdcd8170SKalle Valo goto err_bmi_cleanup; 1600bdcd8170SKalle Valo 1601ad226ec2SKalle Valo ar->htc_target = ath6kl_htc_create(ar); 1602bdcd8170SKalle Valo 1603bdcd8170SKalle Valo if (!ar->htc_target) { 1604bdcd8170SKalle Valo ret = -ENOMEM; 1605bdcd8170SKalle Valo goto err_bmi_cleanup; 1606bdcd8170SKalle Valo } 1607bdcd8170SKalle Valo 1608bdcd8170SKalle Valo ar->aggr_cntxt = aggr_init(ar->net_dev); 1609bdcd8170SKalle Valo if (!ar->aggr_cntxt) { 1610bdcd8170SKalle Valo ath6kl_err("failed to initialize aggr\n"); 1611bdcd8170SKalle Valo ret = -ENOMEM; 1612bdcd8170SKalle Valo goto err_htc_cleanup; 1613bdcd8170SKalle Valo } 1614bdcd8170SKalle Valo 1615772c31eeSKalle Valo ret = ath6kl_fetch_firmwares(ar); 1616772c31eeSKalle Valo if (ret) 1617772c31eeSKalle Valo goto err_htc_cleanup; 1618772c31eeSKalle Valo 1619bdcd8170SKalle Valo ret = ath6kl_init_upload(ar); 1620bdcd8170SKalle Valo if (ret) 1621bdcd8170SKalle Valo goto err_htc_cleanup; 1622bdcd8170SKalle Valo 1623bdcd8170SKalle Valo ret = ath6kl_init(ar->net_dev); 1624bdcd8170SKalle Valo if (ret) 1625bdcd8170SKalle Valo goto err_htc_cleanup; 1626bdcd8170SKalle Valo 1627bdcd8170SKalle Valo /* This runs the init function if registered */ 1628bdcd8170SKalle Valo ret = register_netdev(ar->net_dev); 1629bdcd8170SKalle Valo if (ret) { 1630bdcd8170SKalle Valo ath6kl_err("register_netdev failed\n"); 1631bdcd8170SKalle Valo ath6kl_destroy(ar->net_dev, 0); 1632bdcd8170SKalle Valo return ret; 1633bdcd8170SKalle Valo } 1634bdcd8170SKalle Valo 1635bdcd8170SKalle Valo set_bit(NETDEV_REGISTERED, &ar->flag); 1636bdcd8170SKalle Valo 1637bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", 1638bdcd8170SKalle Valo __func__, ar->net_dev->name, ar->net_dev, ar); 1639bdcd8170SKalle Valo 1640bdcd8170SKalle Valo return ret; 1641bdcd8170SKalle Valo 1642bdcd8170SKalle Valo err_htc_cleanup: 1643ad226ec2SKalle Valo ath6kl_htc_cleanup(ar->htc_target); 1644bdcd8170SKalle Valo err_bmi_cleanup: 1645bdcd8170SKalle Valo ath6kl_bmi_cleanup(ar); 1646bdcd8170SKalle Valo err_wq: 1647bdcd8170SKalle Valo destroy_workqueue(ar->ath6kl_wq); 1648bdcd8170SKalle Valo return ret; 1649bdcd8170SKalle Valo } 1650bdcd8170SKalle Valo 1651bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar) 1652bdcd8170SKalle Valo { 1653bdcd8170SKalle Valo struct net_device *ndev = ar->net_dev; 1654bdcd8170SKalle Valo 1655bdcd8170SKalle Valo if (!ndev) 1656bdcd8170SKalle Valo return; 1657bdcd8170SKalle Valo 1658bdcd8170SKalle Valo set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1659bdcd8170SKalle Valo 1660bdcd8170SKalle Valo if (down_interruptible(&ar->sem)) { 1661bdcd8170SKalle Valo ath6kl_err("down_interruptible failed\n"); 1662bdcd8170SKalle Valo return; 1663bdcd8170SKalle Valo } 1664bdcd8170SKalle Valo 1665bdcd8170SKalle Valo if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR) 1666bdcd8170SKalle Valo ath6kl_stop_endpoint(ndev, false, true); 1667bdcd8170SKalle Valo 1668575b5f34SRaja Mani clear_bit(WLAN_ENABLED, &ar->flag); 1669bdcd8170SKalle Valo } 1670bdcd8170SKalle Valo 1671bdcd8170SKalle Valo /* 1672bdcd8170SKalle Valo * We need to differentiate between the surprise and planned removal of the 1673bdcd8170SKalle Valo * device because of the following consideration: 1674bdcd8170SKalle Valo * 1675bdcd8170SKalle Valo * - In case of surprise removal, the hcd already frees up the pending 1676bdcd8170SKalle Valo * for the device and hence there is no need to unregister the function 1677bdcd8170SKalle Valo * driver inorder to get these requests. For planned removal, the function 1678bdcd8170SKalle Valo * driver has to explicitly unregister itself to have the hcd return all the 1679bdcd8170SKalle Valo * pending requests before the data structures for the devices are freed up. 1680bdcd8170SKalle Valo * Note that as per the current implementation, the function driver will 1681bdcd8170SKalle Valo * end up releasing all the devices since there is no API to selectively 1682bdcd8170SKalle Valo * release a particular device. 1683bdcd8170SKalle Valo * 1684bdcd8170SKalle Valo * - Certain commands issued to the target can be skipped for surprise 1685bdcd8170SKalle Valo * removal since they will anyway not go through. 1686bdcd8170SKalle Valo */ 1687bdcd8170SKalle Valo void ath6kl_destroy(struct net_device *dev, unsigned int unregister) 1688bdcd8170SKalle Valo { 1689bdcd8170SKalle Valo struct ath6kl *ar; 1690bdcd8170SKalle Valo 1691bdcd8170SKalle Valo if (!dev || !ath6kl_priv(dev)) { 1692bdcd8170SKalle Valo ath6kl_err("failed to get device structure\n"); 1693bdcd8170SKalle Valo return; 1694bdcd8170SKalle Valo } 1695bdcd8170SKalle Valo 1696bdcd8170SKalle Valo ar = ath6kl_priv(dev); 1697bdcd8170SKalle Valo 1698bdcd8170SKalle Valo destroy_workqueue(ar->ath6kl_wq); 1699bdcd8170SKalle Valo 1700bdcd8170SKalle Valo if (ar->htc_target) 1701ad226ec2SKalle Valo ath6kl_htc_cleanup(ar->htc_target); 1702bdcd8170SKalle Valo 1703bdcd8170SKalle Valo aggr_module_destroy(ar->aggr_cntxt); 1704bdcd8170SKalle Valo 1705bdcd8170SKalle Valo ath6kl_cookie_cleanup(ar); 1706bdcd8170SKalle Valo 1707bdcd8170SKalle Valo ath6kl_cleanup_amsdu_rxbufs(ar); 1708bdcd8170SKalle Valo 1709bdcd8170SKalle Valo ath6kl_bmi_cleanup(ar); 1710bdcd8170SKalle Valo 1711bdf5396bSKalle Valo ath6kl_debug_cleanup(ar); 1712bdf5396bSKalle Valo 1713bdcd8170SKalle Valo if (unregister && test_bit(NETDEV_REGISTERED, &ar->flag)) { 1714bdcd8170SKalle Valo unregister_netdev(dev); 1715bdcd8170SKalle Valo clear_bit(NETDEV_REGISTERED, &ar->flag); 1716bdcd8170SKalle Valo } 1717bdcd8170SKalle Valo 1718bdcd8170SKalle Valo free_netdev(dev); 1719bdcd8170SKalle Valo 172019703573SRaja Mani kfree(ar->fw_board); 172119703573SRaja Mani kfree(ar->fw_otp); 172219703573SRaja Mani kfree(ar->fw); 172319703573SRaja Mani kfree(ar->fw_patch); 172419703573SRaja Mani 1725bdcd8170SKalle Valo ath6kl_cfg80211_deinit(ar); 1726bdcd8170SKalle Valo } 1727