1bdcd8170SKalle Valo 
2bdcd8170SKalle Valo /*
3bdcd8170SKalle Valo  * Copyright (c) 2011 Atheros Communications Inc.
4bdcd8170SKalle Valo  *
5bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
6bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
7bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
8bdcd8170SKalle Valo  *
9bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16bdcd8170SKalle Valo  */
17bdcd8170SKalle Valo 
18c6efe578SStephen Rothwell #include <linux/moduleparam.h>
19f7830202SSangwook Lee #include <linux/errno.h>
2092ecbff4SSam Leffler #include <linux/of.h>
21bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h>
22bdcd8170SKalle Valo #include "core.h"
23bdcd8170SKalle Valo #include "cfg80211.h"
24bdcd8170SKalle Valo #include "target.h"
25bdcd8170SKalle Valo #include "debug.h"
26bdcd8170SKalle Valo #include "hif-ops.h"
27bdcd8170SKalle Valo 
28bdcd8170SKalle Valo unsigned int debug_mask;
29003353b0SKalle Valo static unsigned int testmode;
308277de15SKalle Valo static bool suspend_cutpower;
31bdcd8170SKalle Valo 
32bdcd8170SKalle Valo module_param(debug_mask, uint, 0644);
33003353b0SKalle Valo module_param(testmode, uint, 0644);
348277de15SKalle Valo module_param(suspend_cutpower, bool, 0444);
35bdcd8170SKalle Valo 
36856f4b31SKalle Valo static const struct ath6kl_hw hw_list[] = {
37856f4b31SKalle Valo 	{
380d0192baSKalle Valo 		.id				= AR6003_HW_2_0_VERSION,
39293badf4SKalle Valo 		.name				= "ar6003 hw 2.0",
40856f4b31SKalle Valo 		.dataset_patch_addr		= 0x57e884,
41856f4b31SKalle Valo 		.app_load_addr			= 0x543180,
42856f4b31SKalle Valo 		.board_ext_data_addr		= 0x57e500,
43856f4b31SKalle Valo 		.reserved_ram_size		= 6912,
4439586bf2SRyan Hsu 		.refclk_hz			= 26000000,
4539586bf2SRyan Hsu 		.uarttx_pin			= 8,
46856f4b31SKalle Valo 
47856f4b31SKalle Valo 		/* hw2.0 needs override address hardcoded */
48856f4b31SKalle Valo 		.app_start_override_addr	= 0x944C00,
49d1a9421dSKalle Valo 
50d1a9421dSKalle Valo 		.fw_otp			= AR6003_HW_2_0_OTP_FILE,
51d1a9421dSKalle Valo 		.fw			= AR6003_HW_2_0_FIRMWARE_FILE,
52d1a9421dSKalle Valo 		.fw_tcmd		= AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
53d1a9421dSKalle Valo 		.fw_patch		= AR6003_HW_2_0_PATCH_FILE,
54d1a9421dSKalle Valo 		.fw_api2		= AR6003_HW_2_0_FIRMWARE_2_FILE,
55d1a9421dSKalle Valo 		.fw_board		= AR6003_HW_2_0_BOARD_DATA_FILE,
56d1a9421dSKalle Valo 		.fw_default_board	= AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
57856f4b31SKalle Valo 	},
58856f4b31SKalle Valo 	{
590d0192baSKalle Valo 		.id				= AR6003_HW_2_1_1_VERSION,
60293badf4SKalle Valo 		.name				= "ar6003 hw 2.1.1",
61856f4b31SKalle Valo 		.dataset_patch_addr		= 0x57ff74,
62856f4b31SKalle Valo 		.app_load_addr			= 0x1234,
63856f4b31SKalle Valo 		.board_ext_data_addr		= 0x542330,
64856f4b31SKalle Valo 		.reserved_ram_size		= 512,
6539586bf2SRyan Hsu 		.refclk_hz			= 26000000,
6639586bf2SRyan Hsu 		.uarttx_pin			= 8,
67d1a9421dSKalle Valo 
68d1a9421dSKalle Valo 		.fw_otp			= AR6003_HW_2_1_1_OTP_FILE,
69d1a9421dSKalle Valo 		.fw			= AR6003_HW_2_1_1_FIRMWARE_FILE,
70d1a9421dSKalle Valo 		.fw_tcmd		= AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
71d1a9421dSKalle Valo 		.fw_patch		= AR6003_HW_2_1_1_PATCH_FILE,
72d1a9421dSKalle Valo 		.fw_api2		= AR6003_HW_2_1_1_FIRMWARE_2_FILE,
73d1a9421dSKalle Valo 		.fw_board		= AR6003_HW_2_1_1_BOARD_DATA_FILE,
74d1a9421dSKalle Valo 		.fw_default_board	= AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
75856f4b31SKalle Valo 	},
76856f4b31SKalle Valo 	{
770d0192baSKalle Valo 		.id				= AR6004_HW_1_0_VERSION,
78293badf4SKalle Valo 		.name				= "ar6004 hw 1.0",
79856f4b31SKalle Valo 		.dataset_patch_addr		= 0x57e884,
80856f4b31SKalle Valo 		.app_load_addr			= 0x1234,
81856f4b31SKalle Valo 		.board_ext_data_addr		= 0x437000,
82856f4b31SKalle Valo 		.reserved_ram_size		= 19456,
830d4d72bfSKalle Valo 		.board_addr			= 0x433900,
8439586bf2SRyan Hsu 		.refclk_hz			= 26000000,
8539586bf2SRyan Hsu 		.uarttx_pin			= 11,
86d1a9421dSKalle Valo 
87d1a9421dSKalle Valo 		.fw			= AR6004_HW_1_0_FIRMWARE_FILE,
88d1a9421dSKalle Valo 		.fw_api2		= AR6004_HW_1_0_FIRMWARE_2_FILE,
89d1a9421dSKalle Valo 		.fw_board		= AR6004_HW_1_0_BOARD_DATA_FILE,
90d1a9421dSKalle Valo 		.fw_default_board	= AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
91856f4b31SKalle Valo 	},
92856f4b31SKalle Valo 	{
930d0192baSKalle Valo 		.id				= AR6004_HW_1_1_VERSION,
94293badf4SKalle Valo 		.name				= "ar6004 hw 1.1",
95856f4b31SKalle Valo 		.dataset_patch_addr		= 0x57e884,
96856f4b31SKalle Valo 		.app_load_addr			= 0x1234,
97856f4b31SKalle Valo 		.board_ext_data_addr		= 0x437000,
98856f4b31SKalle Valo 		.reserved_ram_size		= 11264,
990d4d72bfSKalle Valo 		.board_addr			= 0x43d400,
10039586bf2SRyan Hsu 		.refclk_hz			= 40000000,
10139586bf2SRyan Hsu 		.uarttx_pin			= 11,
102d1a9421dSKalle Valo 
103d1a9421dSKalle Valo 		.fw			= AR6004_HW_1_1_FIRMWARE_FILE,
104d1a9421dSKalle Valo 		.fw_api2		= AR6004_HW_1_1_FIRMWARE_2_FILE,
105d1a9421dSKalle Valo 		.fw_board		= AR6004_HW_1_1_BOARD_DATA_FILE,
106d1a9421dSKalle Valo 		.fw_default_board	= AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
107856f4b31SKalle Valo 	},
108856f4b31SKalle Valo };
109856f4b31SKalle Valo 
110bdcd8170SKalle Valo /*
111bdcd8170SKalle Valo  * Include definitions here that can be used to tune the WLAN module
112bdcd8170SKalle Valo  * behavior. Different customers can tune the behavior as per their needs,
113bdcd8170SKalle Valo  * here.
114bdcd8170SKalle Valo  */
115bdcd8170SKalle Valo 
116bdcd8170SKalle Valo /*
117bdcd8170SKalle Valo  * This configuration item enable/disable keepalive support.
118bdcd8170SKalle Valo  * Keepalive support: In the absence of any data traffic to AP, null
119bdcd8170SKalle Valo  * frames will be sent to the AP at periodic interval, to keep the association
120bdcd8170SKalle Valo  * active. This configuration item defines the periodic interval.
121bdcd8170SKalle Valo  * Use value of zero to disable keepalive support
122bdcd8170SKalle Valo  * Default: 60 seconds
123bdcd8170SKalle Valo  */
124bdcd8170SKalle Valo #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
125bdcd8170SKalle Valo 
126bdcd8170SKalle Valo /*
127bdcd8170SKalle Valo  * This configuration item sets the value of disconnect timeout
128bdcd8170SKalle Valo  * Firmware delays sending the disconnec event to the host for this
129bdcd8170SKalle Valo  * timeout after is gets disconnected from the current AP.
130bdcd8170SKalle Valo  * If the firmware successly roams within the disconnect timeout
131bdcd8170SKalle Valo  * it sends a new connect event
132bdcd8170SKalle Valo  */
133bdcd8170SKalle Valo #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
134bdcd8170SKalle Valo 
135bdcd8170SKalle Valo 
136bdcd8170SKalle Valo #define ATH6KL_DATA_OFFSET    64
137bdcd8170SKalle Valo struct sk_buff *ath6kl_buf_alloc(int size)
138bdcd8170SKalle Valo {
139bdcd8170SKalle Valo 	struct sk_buff *skb;
140bdcd8170SKalle Valo 	u16 reserved;
141bdcd8170SKalle Valo 
142bdcd8170SKalle Valo 	/* Add chacheline space at front and back of buffer */
143bdcd8170SKalle Valo 	reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
1441df94a85SVasanthakumar Thiagarajan 		   sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
145bdcd8170SKalle Valo 	skb = dev_alloc_skb(size + reserved);
146bdcd8170SKalle Valo 
147bdcd8170SKalle Valo 	if (skb)
148bdcd8170SKalle Valo 		skb_reserve(skb, reserved - L1_CACHE_BYTES);
149bdcd8170SKalle Valo 	return skb;
150bdcd8170SKalle Valo }
151bdcd8170SKalle Valo 
152e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif)
153bdcd8170SKalle Valo {
1543450334fSVasanthakumar Thiagarajan 	vif->ssid_len = 0;
1553450334fSVasanthakumar Thiagarajan 	memset(vif->ssid, 0, sizeof(vif->ssid));
1563450334fSVasanthakumar Thiagarajan 
1573450334fSVasanthakumar Thiagarajan 	vif->dot11_auth_mode = OPEN_AUTH;
1583450334fSVasanthakumar Thiagarajan 	vif->auth_mode = NONE_AUTH;
1593450334fSVasanthakumar Thiagarajan 	vif->prwise_crypto = NONE_CRYPT;
1603450334fSVasanthakumar Thiagarajan 	vif->prwise_crypto_len = 0;
1613450334fSVasanthakumar Thiagarajan 	vif->grp_crypto = NONE_CRYPT;
1623450334fSVasanthakumar Thiagarajan 	vif->grp_crypto_len = 0;
1636f2a73f9SVasanthakumar Thiagarajan 	memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
1648c8b65e3SVasanthakumar Thiagarajan 	memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
1658c8b65e3SVasanthakumar Thiagarajan 	memset(vif->bssid, 0, sizeof(vif->bssid));
166f74bac54SVasanthakumar Thiagarajan 	vif->bss_ch = 0;
167bdcd8170SKalle Valo }
168bdcd8170SKalle Valo 
169bdcd8170SKalle Valo static int ath6kl_set_host_app_area(struct ath6kl *ar)
170bdcd8170SKalle Valo {
171bdcd8170SKalle Valo 	u32 address, data;
172bdcd8170SKalle Valo 	struct host_app_area host_app_area;
173bdcd8170SKalle Valo 
174bdcd8170SKalle Valo 	/* Fetch the address of the host_app_area_s
175bdcd8170SKalle Valo 	 * instance in the host interest area */
176bdcd8170SKalle Valo 	address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
17731024d99SKevin Fang 	address = TARG_VTOP(ar->target_type, address);
178bdcd8170SKalle Valo 
179addb44beSKalle Valo 	if (ath6kl_diag_read32(ar, address, &data))
180bdcd8170SKalle Valo 		return -EIO;
181bdcd8170SKalle Valo 
18231024d99SKevin Fang 	address = TARG_VTOP(ar->target_type, data);
183cbf49a6fSKalle Valo 	host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
184addb44beSKalle Valo 	if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
185addb44beSKalle Valo 			      sizeof(struct host_app_area)))
186bdcd8170SKalle Valo 		return -EIO;
187bdcd8170SKalle Valo 
188bdcd8170SKalle Valo 	return 0;
189bdcd8170SKalle Valo }
190bdcd8170SKalle Valo 
191bdcd8170SKalle Valo static inline void set_ac2_ep_map(struct ath6kl *ar,
192bdcd8170SKalle Valo 				  u8 ac,
193bdcd8170SKalle Valo 				  enum htc_endpoint_id ep)
194bdcd8170SKalle Valo {
195bdcd8170SKalle Valo 	ar->ac2ep_map[ac] = ep;
196bdcd8170SKalle Valo 	ar->ep2ac_map[ep] = ac;
197bdcd8170SKalle Valo }
198bdcd8170SKalle Valo 
199bdcd8170SKalle Valo /* connect to a service */
200bdcd8170SKalle Valo static int ath6kl_connectservice(struct ath6kl *ar,
201bdcd8170SKalle Valo 				 struct htc_service_connect_req  *con_req,
202bdcd8170SKalle Valo 				 char *desc)
203bdcd8170SKalle Valo {
204bdcd8170SKalle Valo 	int status;
205bdcd8170SKalle Valo 	struct htc_service_connect_resp response;
206bdcd8170SKalle Valo 
207bdcd8170SKalle Valo 	memset(&response, 0, sizeof(response));
208bdcd8170SKalle Valo 
209ad226ec2SKalle Valo 	status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
210bdcd8170SKalle Valo 	if (status) {
211bdcd8170SKalle Valo 		ath6kl_err("failed to connect to %s service status:%d\n",
212bdcd8170SKalle Valo 			   desc, status);
213bdcd8170SKalle Valo 		return status;
214bdcd8170SKalle Valo 	}
215bdcd8170SKalle Valo 
216bdcd8170SKalle Valo 	switch (con_req->svc_id) {
217bdcd8170SKalle Valo 	case WMI_CONTROL_SVC:
218bdcd8170SKalle Valo 		if (test_bit(WMI_ENABLED, &ar->flag))
219bdcd8170SKalle Valo 			ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
220bdcd8170SKalle Valo 		ar->ctrl_ep = response.endpoint;
221bdcd8170SKalle Valo 		break;
222bdcd8170SKalle Valo 	case WMI_DATA_BE_SVC:
223bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
224bdcd8170SKalle Valo 		break;
225bdcd8170SKalle Valo 	case WMI_DATA_BK_SVC:
226bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
227bdcd8170SKalle Valo 		break;
228bdcd8170SKalle Valo 	case WMI_DATA_VI_SVC:
229bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
230bdcd8170SKalle Valo 		break;
231bdcd8170SKalle Valo 	case WMI_DATA_VO_SVC:
232bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
233bdcd8170SKalle Valo 		break;
234bdcd8170SKalle Valo 	default:
235bdcd8170SKalle Valo 		ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
236bdcd8170SKalle Valo 		return -EINVAL;
237bdcd8170SKalle Valo 	}
238bdcd8170SKalle Valo 
239bdcd8170SKalle Valo 	return 0;
240bdcd8170SKalle Valo }
241bdcd8170SKalle Valo 
242bdcd8170SKalle Valo static int ath6kl_init_service_ep(struct ath6kl *ar)
243bdcd8170SKalle Valo {
244bdcd8170SKalle Valo 	struct htc_service_connect_req connect;
245bdcd8170SKalle Valo 
246bdcd8170SKalle Valo 	memset(&connect, 0, sizeof(connect));
247bdcd8170SKalle Valo 
248bdcd8170SKalle Valo 	/* these fields are the same for all service endpoints */
249bdcd8170SKalle Valo 	connect.ep_cb.rx = ath6kl_rx;
250bdcd8170SKalle Valo 	connect.ep_cb.rx_refill = ath6kl_rx_refill;
251bdcd8170SKalle Valo 	connect.ep_cb.tx_full = ath6kl_tx_queue_full;
252bdcd8170SKalle Valo 
253bdcd8170SKalle Valo 	/*
254bdcd8170SKalle Valo 	 * Set the max queue depth so that our ath6kl_tx_queue_full handler
255bdcd8170SKalle Valo 	 * gets called.
256bdcd8170SKalle Valo 	*/
257bdcd8170SKalle Valo 	connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
258bdcd8170SKalle Valo 	connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
259bdcd8170SKalle Valo 	if (!connect.ep_cb.rx_refill_thresh)
260bdcd8170SKalle Valo 		connect.ep_cb.rx_refill_thresh++;
261bdcd8170SKalle Valo 
262bdcd8170SKalle Valo 	/* connect to control service */
263bdcd8170SKalle Valo 	connect.svc_id = WMI_CONTROL_SVC;
264bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
265bdcd8170SKalle Valo 		return -EIO;
266bdcd8170SKalle Valo 
267bdcd8170SKalle Valo 	connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
268bdcd8170SKalle Valo 
269bdcd8170SKalle Valo 	/*
270bdcd8170SKalle Valo 	 * Limit the HTC message size on the send path, although e can
271bdcd8170SKalle Valo 	 * receive A-MSDU frames of 4K, we will only send ethernet-sized
272bdcd8170SKalle Valo 	 * (802.3) frames on the send path.
273bdcd8170SKalle Valo 	 */
274bdcd8170SKalle Valo 	connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
275bdcd8170SKalle Valo 
276bdcd8170SKalle Valo 	/*
277bdcd8170SKalle Valo 	 * To reduce the amount of committed memory for larger A_MSDU
278bdcd8170SKalle Valo 	 * frames, use the recv-alloc threshold mechanism for larger
279bdcd8170SKalle Valo 	 * packets.
280bdcd8170SKalle Valo 	 */
281bdcd8170SKalle Valo 	connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
282bdcd8170SKalle Valo 	connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
283bdcd8170SKalle Valo 
284bdcd8170SKalle Valo 	/*
285bdcd8170SKalle Valo 	 * For the remaining data services set the connection flag to
286bdcd8170SKalle Valo 	 * reduce dribbling, if configured to do so.
287bdcd8170SKalle Valo 	 */
288bdcd8170SKalle Valo 	connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
289bdcd8170SKalle Valo 	connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
290bdcd8170SKalle Valo 	connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
291bdcd8170SKalle Valo 
292bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_BE_SVC;
293bdcd8170SKalle Valo 
294bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
295bdcd8170SKalle Valo 		return -EIO;
296bdcd8170SKalle Valo 
297bdcd8170SKalle Valo 	/* connect to back-ground map this to WMI LOW_PRI */
298bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_BK_SVC;
299bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
300bdcd8170SKalle Valo 		return -EIO;
301bdcd8170SKalle Valo 
302bdcd8170SKalle Valo 	/* connect to Video service, map this to to HI PRI */
303bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_VI_SVC;
304bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
305bdcd8170SKalle Valo 		return -EIO;
306bdcd8170SKalle Valo 
307bdcd8170SKalle Valo 	/*
308bdcd8170SKalle Valo 	 * Connect to VO service, this is currently not mapped to a WMI
309bdcd8170SKalle Valo 	 * priority stream due to historical reasons. WMI originally
310bdcd8170SKalle Valo 	 * defined 3 priorities over 3 mailboxes We can change this when
311bdcd8170SKalle Valo 	 * WMI is reworked so that priorities are not dependent on
312bdcd8170SKalle Valo 	 * mailboxes.
313bdcd8170SKalle Valo 	 */
314bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_VO_SVC;
315bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
316bdcd8170SKalle Valo 		return -EIO;
317bdcd8170SKalle Valo 
318bdcd8170SKalle Valo 	return 0;
319bdcd8170SKalle Valo }
320bdcd8170SKalle Valo 
321e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif)
322bdcd8170SKalle Valo {
323e29f25f5SVasanthakumar Thiagarajan 	ath6kl_init_profile_info(vif);
3243450334fSVasanthakumar Thiagarajan 	vif->def_txkey_index = 0;
3256f2a73f9SVasanthakumar Thiagarajan 	memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
326f74bac54SVasanthakumar Thiagarajan 	vif->ch_hint = 0;
327bdcd8170SKalle Valo }
328bdcd8170SKalle Valo 
329bdcd8170SKalle Valo /*
330bdcd8170SKalle Valo  * Set HTC/Mbox operational parameters, this can only be called when the
331bdcd8170SKalle Valo  * target is in the BMI phase.
332bdcd8170SKalle Valo  */
333bdcd8170SKalle Valo static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
334bdcd8170SKalle Valo 				 u8 htc_ctrl_buf)
335bdcd8170SKalle Valo {
336bdcd8170SKalle Valo 	int status;
337bdcd8170SKalle Valo 	u32 blk_size;
338bdcd8170SKalle Valo 
339bdcd8170SKalle Valo 	blk_size = ar->mbox_info.block_size;
340bdcd8170SKalle Valo 
341bdcd8170SKalle Valo 	if (htc_ctrl_buf)
342bdcd8170SKalle Valo 		blk_size |=  ((u32)htc_ctrl_buf) << 16;
343bdcd8170SKalle Valo 
344bdcd8170SKalle Valo 	/* set the host interest area for the block size */
345bdcd8170SKalle Valo 	status = ath6kl_bmi_write(ar,
346bdcd8170SKalle Valo 			ath6kl_get_hi_item_addr(ar,
347bdcd8170SKalle Valo 			HI_ITEM(hi_mbox_io_block_sz)),
348bdcd8170SKalle Valo 			(u8 *)&blk_size,
349bdcd8170SKalle Valo 			4);
350bdcd8170SKalle Valo 	if (status) {
351bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for IO block size failed\n");
352bdcd8170SKalle Valo 		goto out;
353bdcd8170SKalle Valo 	}
354bdcd8170SKalle Valo 
355bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
356bdcd8170SKalle Valo 		   blk_size,
357bdcd8170SKalle Valo 		   ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
358bdcd8170SKalle Valo 
359bdcd8170SKalle Valo 	if (mbox_isr_yield_val) {
360bdcd8170SKalle Valo 		/* set the host interest area for the mbox ISR yield limit */
361bdcd8170SKalle Valo 		status = ath6kl_bmi_write(ar,
362bdcd8170SKalle Valo 				ath6kl_get_hi_item_addr(ar,
363bdcd8170SKalle Valo 				HI_ITEM(hi_mbox_isr_yield_limit)),
364bdcd8170SKalle Valo 				(u8 *)&mbox_isr_yield_val,
365bdcd8170SKalle Valo 				4);
366bdcd8170SKalle Valo 		if (status) {
367bdcd8170SKalle Valo 			ath6kl_err("bmi_write_memory for yield limit failed\n");
368bdcd8170SKalle Valo 			goto out;
369bdcd8170SKalle Valo 		}
370bdcd8170SKalle Valo 	}
371bdcd8170SKalle Valo 
372bdcd8170SKalle Valo out:
373bdcd8170SKalle Valo 	return status;
374bdcd8170SKalle Valo }
375bdcd8170SKalle Valo 
3760ce59445SVasanthakumar Thiagarajan static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
377bdcd8170SKalle Valo {
378bdcd8170SKalle Valo 	int status = 0;
3794dea08e0SJouni Malinen 	int ret;
380bdcd8170SKalle Valo 
381bdcd8170SKalle Valo 	/*
382bdcd8170SKalle Valo 	 * Configure the device for rx dot11 header rules. "0,0" are the
383bdcd8170SKalle Valo 	 * default values. Required if checksum offload is needed. Set
384bdcd8170SKalle Valo 	 * RxMetaVersion to 2.
385bdcd8170SKalle Valo 	 */
3860ce59445SVasanthakumar Thiagarajan 	if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
387bdcd8170SKalle Valo 					       ar->rx_meta_ver, 0, 0)) {
388bdcd8170SKalle Valo 		ath6kl_err("unable to set the rx frame format\n");
389bdcd8170SKalle Valo 		status = -EIO;
390bdcd8170SKalle Valo 	}
391bdcd8170SKalle Valo 
392bdcd8170SKalle Valo 	if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
3930ce59445SVasanthakumar Thiagarajan 		if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
394bdcd8170SKalle Valo 		     IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
395bdcd8170SKalle Valo 			ath6kl_err("unable to set power save fail event policy\n");
396bdcd8170SKalle Valo 			status = -EIO;
397bdcd8170SKalle Valo 		}
398bdcd8170SKalle Valo 
399bdcd8170SKalle Valo 	if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
4000ce59445SVasanthakumar Thiagarajan 		if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
401bdcd8170SKalle Valo 		     WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
402bdcd8170SKalle Valo 			ath6kl_err("unable to set barker preamble policy\n");
403bdcd8170SKalle Valo 			status = -EIO;
404bdcd8170SKalle Valo 		}
405bdcd8170SKalle Valo 
4060ce59445SVasanthakumar Thiagarajan 	if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
407bdcd8170SKalle Valo 			WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
408bdcd8170SKalle Valo 		ath6kl_err("unable to set keep alive interval\n");
409bdcd8170SKalle Valo 		status = -EIO;
410bdcd8170SKalle Valo 	}
411bdcd8170SKalle Valo 
4120ce59445SVasanthakumar Thiagarajan 	if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
413bdcd8170SKalle Valo 			WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
414bdcd8170SKalle Valo 		ath6kl_err("unable to set disconnect timeout\n");
415bdcd8170SKalle Valo 		status = -EIO;
416bdcd8170SKalle Valo 	}
417bdcd8170SKalle Valo 
418bdcd8170SKalle Valo 	if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
4190ce59445SVasanthakumar Thiagarajan 		if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
420bdcd8170SKalle Valo 			ath6kl_err("unable to set txop bursting\n");
421bdcd8170SKalle Valo 			status = -EIO;
422bdcd8170SKalle Valo 		}
423bdcd8170SKalle Valo 
424b64de356SVasanthakumar Thiagarajan 	if (ar->p2p && (ar->vif_max == 1 || idx)) {
4250ce59445SVasanthakumar Thiagarajan 		ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
4266bbc7c35SJouni Malinen 					      P2P_FLAG_CAPABILITIES_REQ |
4274dea08e0SJouni Malinen 					      P2P_FLAG_MACADDR_REQ |
4284dea08e0SJouni Malinen 					      P2P_FLAG_HMODEL_REQ);
4294dea08e0SJouni Malinen 		if (ret) {
4304dea08e0SJouni Malinen 			ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
4316bbc7c35SJouni Malinen 				   "capabilities (%d) - assuming P2P not "
4326bbc7c35SJouni Malinen 				   "supported\n", ret);
4336bbc7c35SJouni Malinen 			ar->p2p = 0;
4346bbc7c35SJouni Malinen 		}
4356bbc7c35SJouni Malinen 	}
4366bbc7c35SJouni Malinen 
437b64de356SVasanthakumar Thiagarajan 	if (ar->p2p && (ar->vif_max == 1 || idx)) {
4386bbc7c35SJouni Malinen 		/* Enable Probe Request reporting for P2P */
4390ce59445SVasanthakumar Thiagarajan 		ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
4406bbc7c35SJouni Malinen 		if (ret) {
4416bbc7c35SJouni Malinen 			ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
4426bbc7c35SJouni Malinen 				   "Request reporting (%d)\n", ret);
4436bbc7c35SJouni Malinen 		}
4444dea08e0SJouni Malinen 	}
4454dea08e0SJouni Malinen 
446bdcd8170SKalle Valo 	return status;
447bdcd8170SKalle Valo }
448bdcd8170SKalle Valo 
449bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar)
450bdcd8170SKalle Valo {
451bdcd8170SKalle Valo 	u32 param, ram_reserved_size;
4523226f68aSVasanthakumar Thiagarajan 	u8 fw_iftype, fw_mode = 0, fw_submode = 0;
45339586bf2SRyan Hsu 	int i, status;
454bdcd8170SKalle Valo 
4557b85832dSVasanthakumar Thiagarajan 	/*
4567b85832dSVasanthakumar Thiagarajan 	 * Note: Even though the firmware interface type is
4577b85832dSVasanthakumar Thiagarajan 	 * chosen as BSS_STA for all three interfaces, can
4587b85832dSVasanthakumar Thiagarajan 	 * be configured to IBSS/AP as long as the fw submode
4597b85832dSVasanthakumar Thiagarajan 	 * remains normal mode (0 - AP, STA and IBSS). But
4607b85832dSVasanthakumar Thiagarajan 	 * due to an target assert in firmware only one interface is
4617b85832dSVasanthakumar Thiagarajan 	 * configured for now.
4627b85832dSVasanthakumar Thiagarajan 	 */
463dd3751f7SVasanthakumar Thiagarajan 	fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
464bdcd8170SKalle Valo 
46571f96ee6SKalle Valo 	for (i = 0; i < ar->vif_max; i++)
4667b85832dSVasanthakumar Thiagarajan 		fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
4677b85832dSVasanthakumar Thiagarajan 
4687b85832dSVasanthakumar Thiagarajan 	/*
4693226f68aSVasanthakumar Thiagarajan 	 * By default, submodes :
4703226f68aSVasanthakumar Thiagarajan 	 *		vif[0] - AP/STA/IBSS
4717b85832dSVasanthakumar Thiagarajan 	 *		vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
4727b85832dSVasanthakumar Thiagarajan 	 *		vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
4737b85832dSVasanthakumar Thiagarajan 	 */
4743226f68aSVasanthakumar Thiagarajan 
4753226f68aSVasanthakumar Thiagarajan 	for (i = 0; i < ar->max_norm_iface; i++)
4763226f68aSVasanthakumar Thiagarajan 		fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
4773226f68aSVasanthakumar Thiagarajan 			      (i * HI_OPTION_FW_SUBMODE_BITS);
4783226f68aSVasanthakumar Thiagarajan 
47971f96ee6SKalle Valo 	for (i = ar->max_norm_iface; i < ar->vif_max; i++)
4803226f68aSVasanthakumar Thiagarajan 		fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
4813226f68aSVasanthakumar Thiagarajan 			      (i * HI_OPTION_FW_SUBMODE_BITS);
4827b85832dSVasanthakumar Thiagarajan 
483b64de356SVasanthakumar Thiagarajan 	if (ar->p2p && ar->vif_max == 1)
4847b85832dSVasanthakumar Thiagarajan 		fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
4857b85832dSVasanthakumar Thiagarajan 
486bdcd8170SKalle Valo 	param = HTC_PROTOCOL_VERSION;
487bdcd8170SKalle Valo 	if (ath6kl_bmi_write(ar,
488bdcd8170SKalle Valo 			     ath6kl_get_hi_item_addr(ar,
489bdcd8170SKalle Valo 			     HI_ITEM(hi_app_host_interest)),
490bdcd8170SKalle Valo 			     (u8 *)&param, 4) != 0) {
491bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for htc version failed\n");
492bdcd8170SKalle Valo 		return -EIO;
493bdcd8170SKalle Valo 	}
494bdcd8170SKalle Valo 
495bdcd8170SKalle Valo 	/* set the firmware mode to STA/IBSS/AP */
496bdcd8170SKalle Valo 	param = 0;
497bdcd8170SKalle Valo 
498bdcd8170SKalle Valo 	if (ath6kl_bmi_read(ar,
499bdcd8170SKalle Valo 			    ath6kl_get_hi_item_addr(ar,
500bdcd8170SKalle Valo 			    HI_ITEM(hi_option_flag)),
501bdcd8170SKalle Valo 			    (u8 *)&param, 4) != 0) {
502bdcd8170SKalle Valo 		ath6kl_err("bmi_read_memory for setting fwmode failed\n");
503bdcd8170SKalle Valo 		return -EIO;
504bdcd8170SKalle Valo 	}
505bdcd8170SKalle Valo 
50671f96ee6SKalle Valo 	param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
5077b85832dSVasanthakumar Thiagarajan 	param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
5087b85832dSVasanthakumar Thiagarajan 	param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
5097b85832dSVasanthakumar Thiagarajan 
510bdcd8170SKalle Valo 	param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
511bdcd8170SKalle Valo 	param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
512bdcd8170SKalle Valo 
513bdcd8170SKalle Valo 	if (ath6kl_bmi_write(ar,
514bdcd8170SKalle Valo 			     ath6kl_get_hi_item_addr(ar,
515bdcd8170SKalle Valo 			     HI_ITEM(hi_option_flag)),
516bdcd8170SKalle Valo 			     (u8 *)&param,
517bdcd8170SKalle Valo 			     4) != 0) {
518bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for setting fwmode failed\n");
519bdcd8170SKalle Valo 		return -EIO;
520bdcd8170SKalle Valo 	}
521bdcd8170SKalle Valo 
522bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
523bdcd8170SKalle Valo 
524bdcd8170SKalle Valo 	/*
525bdcd8170SKalle Valo 	 * Hardcode the address use for the extended board data
526bdcd8170SKalle Valo 	 * Ideally this should be pre-allocate by the OS at boot time
527bdcd8170SKalle Valo 	 * But since it is a new feature and board data is loaded
528bdcd8170SKalle Valo 	 * at init time, we have to workaround this from host.
529bdcd8170SKalle Valo 	 * It is difficult to patch the firmware boot code,
530bdcd8170SKalle Valo 	 * but possible in theory.
531bdcd8170SKalle Valo 	 */
532bdcd8170SKalle Valo 
533991b27eaSKalle Valo 	param = ar->hw.board_ext_data_addr;
534991b27eaSKalle Valo 	ram_reserved_size = ar->hw.reserved_ram_size;
535bdcd8170SKalle Valo 
536991b27eaSKalle Valo 	if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
537bdcd8170SKalle Valo 					HI_ITEM(hi_board_ext_data)),
538bdcd8170SKalle Valo 			     (u8 *)&param, 4) != 0) {
539bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
540bdcd8170SKalle Valo 		return -EIO;
541bdcd8170SKalle Valo 	}
542991b27eaSKalle Valo 
543991b27eaSKalle Valo 	if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
544bdcd8170SKalle Valo 					HI_ITEM(hi_end_ram_reserve_sz)),
545bdcd8170SKalle Valo 			     (u8 *)&ram_reserved_size, 4) != 0) {
546bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
547bdcd8170SKalle Valo 		return -EIO;
548bdcd8170SKalle Valo 	}
549bdcd8170SKalle Valo 
550bdcd8170SKalle Valo 	/* set the block size for the target */
551bdcd8170SKalle Valo 	if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
552bdcd8170SKalle Valo 		/* use default number of control buffers */
553bdcd8170SKalle Valo 		return -EIO;
554bdcd8170SKalle Valo 
55539586bf2SRyan Hsu 	/* Configure GPIO AR600x UART */
55639586bf2SRyan Hsu 	param = ar->hw.uarttx_pin;
55739586bf2SRyan Hsu 	status = ath6kl_bmi_write(ar,
55839586bf2SRyan Hsu 				ath6kl_get_hi_item_addr(ar,
55939586bf2SRyan Hsu 				HI_ITEM(hi_dbg_uart_txpin)),
56039586bf2SRyan Hsu 				(u8 *)&param, 4);
56139586bf2SRyan Hsu 	if (status)
56239586bf2SRyan Hsu 		return status;
56339586bf2SRyan Hsu 
56439586bf2SRyan Hsu 	/* Configure target refclk_hz */
56539586bf2SRyan Hsu 	param =  ar->hw.refclk_hz;
56639586bf2SRyan Hsu 	status = ath6kl_bmi_write(ar,
56739586bf2SRyan Hsu 				ath6kl_get_hi_item_addr(ar,
56839586bf2SRyan Hsu 				HI_ITEM(hi_refclk_hz)),
56939586bf2SRyan Hsu 				(u8 *)&param, 4);
57039586bf2SRyan Hsu 	if (status)
57139586bf2SRyan Hsu 		return status;
57239586bf2SRyan Hsu 
573bdcd8170SKalle Valo 	return 0;
574bdcd8170SKalle Valo }
575bdcd8170SKalle Valo 
5768dafb70eSVasanthakumar Thiagarajan void ath6kl_core_free(struct ath6kl *ar)
577bdcd8170SKalle Valo {
5788dafb70eSVasanthakumar Thiagarajan 	wiphy_free(ar->wiphy);
579bdcd8170SKalle Valo }
580bdcd8170SKalle Valo 
5816db8fa53SVasanthakumar Thiagarajan void ath6kl_core_cleanup(struct ath6kl *ar)
582bdcd8170SKalle Valo {
583b2e75698SKalle Valo 	ath6kl_hif_power_off(ar);
584b2e75698SKalle Valo 
5856db8fa53SVasanthakumar Thiagarajan 	destroy_workqueue(ar->ath6kl_wq);
586bdcd8170SKalle Valo 
5876db8fa53SVasanthakumar Thiagarajan 	if (ar->htc_target)
5886db8fa53SVasanthakumar Thiagarajan 		ath6kl_htc_cleanup(ar->htc_target);
5896db8fa53SVasanthakumar Thiagarajan 
5906db8fa53SVasanthakumar Thiagarajan 	ath6kl_cookie_cleanup(ar);
5916db8fa53SVasanthakumar Thiagarajan 
5926db8fa53SVasanthakumar Thiagarajan 	ath6kl_cleanup_amsdu_rxbufs(ar);
5936db8fa53SVasanthakumar Thiagarajan 
5946db8fa53SVasanthakumar Thiagarajan 	ath6kl_bmi_cleanup(ar);
5956db8fa53SVasanthakumar Thiagarajan 
5966db8fa53SVasanthakumar Thiagarajan 	ath6kl_debug_cleanup(ar);
5976db8fa53SVasanthakumar Thiagarajan 
5986db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw_board);
5996db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw_otp);
6006db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw);
6016db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw_patch);
6026db8fa53SVasanthakumar Thiagarajan 
6036db8fa53SVasanthakumar Thiagarajan 	ath6kl_deinit_ieee80211_hw(ar);
604bdcd8170SKalle Valo }
605bdcd8170SKalle Valo 
606bdcd8170SKalle Valo /* firmware upload */
607bdcd8170SKalle Valo static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
608bdcd8170SKalle Valo 			 u8 **fw, size_t *fw_len)
609bdcd8170SKalle Valo {
610bdcd8170SKalle Valo 	const struct firmware *fw_entry;
611bdcd8170SKalle Valo 	int ret;
612bdcd8170SKalle Valo 
613bdcd8170SKalle Valo 	ret = request_firmware(&fw_entry, filename, ar->dev);
614bdcd8170SKalle Valo 	if (ret)
615bdcd8170SKalle Valo 		return ret;
616bdcd8170SKalle Valo 
617bdcd8170SKalle Valo 	*fw_len = fw_entry->size;
618bdcd8170SKalle Valo 	*fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
619bdcd8170SKalle Valo 
620bdcd8170SKalle Valo 	if (*fw == NULL)
621bdcd8170SKalle Valo 		ret = -ENOMEM;
622bdcd8170SKalle Valo 
623bdcd8170SKalle Valo 	release_firmware(fw_entry);
624bdcd8170SKalle Valo 
625bdcd8170SKalle Valo 	return ret;
626bdcd8170SKalle Valo }
627bdcd8170SKalle Valo 
62892ecbff4SSam Leffler #ifdef CONFIG_OF
62992ecbff4SSam Leffler static const char *get_target_ver_dir(const struct ath6kl *ar)
63092ecbff4SSam Leffler {
63192ecbff4SSam Leffler 	switch (ar->version.target_ver) {
6320d0192baSKalle Valo 	case AR6003_HW_1_0_VERSION:
63392ecbff4SSam Leffler 		return "ath6k/AR6003/hw1.0";
6340d0192baSKalle Valo 	case AR6003_HW_2_0_VERSION:
63592ecbff4SSam Leffler 		return "ath6k/AR6003/hw2.0";
6360d0192baSKalle Valo 	case AR6003_HW_2_1_1_VERSION:
63792ecbff4SSam Leffler 		return "ath6k/AR6003/hw2.1.1";
63892ecbff4SSam Leffler 	}
63992ecbff4SSam Leffler 	ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
64092ecbff4SSam Leffler 		    ar->version.target_ver);
64192ecbff4SSam Leffler 	return NULL;
64292ecbff4SSam Leffler }
64392ecbff4SSam Leffler 
64492ecbff4SSam Leffler /*
64592ecbff4SSam Leffler  * Check the device tree for a board-id and use it to construct
64692ecbff4SSam Leffler  * the pathname to the firmware file.  Used (for now) to find a
64792ecbff4SSam Leffler  * fallback to the "bdata.bin" file--typically a symlink to the
64892ecbff4SSam Leffler  * appropriate board-specific file.
64992ecbff4SSam Leffler  */
65092ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar)
65192ecbff4SSam Leffler {
65292ecbff4SSam Leffler 	static const char *board_id_prop = "atheros,board-id";
65392ecbff4SSam Leffler 	struct device_node *node;
65492ecbff4SSam Leffler 	char board_filename[64];
65592ecbff4SSam Leffler 	const char *board_id;
65692ecbff4SSam Leffler 	int ret;
65792ecbff4SSam Leffler 
65892ecbff4SSam Leffler 	for_each_compatible_node(node, NULL, "atheros,ath6kl") {
65992ecbff4SSam Leffler 		board_id = of_get_property(node, board_id_prop, NULL);
66092ecbff4SSam Leffler 		if (board_id == NULL) {
66192ecbff4SSam Leffler 			ath6kl_warn("No \"%s\" property on %s node.\n",
66292ecbff4SSam Leffler 				    board_id_prop, node->name);
66392ecbff4SSam Leffler 			continue;
66492ecbff4SSam Leffler 		}
66592ecbff4SSam Leffler 		snprintf(board_filename, sizeof(board_filename),
66692ecbff4SSam Leffler 			 "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
66792ecbff4SSam Leffler 
66892ecbff4SSam Leffler 		ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
66992ecbff4SSam Leffler 				    &ar->fw_board_len);
67092ecbff4SSam Leffler 		if (ret) {
67192ecbff4SSam Leffler 			ath6kl_err("Failed to get DT board file %s: %d\n",
67292ecbff4SSam Leffler 				   board_filename, ret);
67392ecbff4SSam Leffler 			continue;
67492ecbff4SSam Leffler 		}
67592ecbff4SSam Leffler 		return true;
67692ecbff4SSam Leffler 	}
67792ecbff4SSam Leffler 	return false;
67892ecbff4SSam Leffler }
67992ecbff4SSam Leffler #else
68092ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar)
68192ecbff4SSam Leffler {
68292ecbff4SSam Leffler 	return false;
68392ecbff4SSam Leffler }
68492ecbff4SSam Leffler #endif /* CONFIG_OF */
68592ecbff4SSam Leffler 
686bdcd8170SKalle Valo static int ath6kl_fetch_board_file(struct ath6kl *ar)
687bdcd8170SKalle Valo {
688bdcd8170SKalle Valo 	const char *filename;
689bdcd8170SKalle Valo 	int ret;
690bdcd8170SKalle Valo 
691772c31eeSKalle Valo 	if (ar->fw_board != NULL)
692772c31eeSKalle Valo 		return 0;
693772c31eeSKalle Valo 
694d1a9421dSKalle Valo 	if (WARN_ON(ar->hw.fw_board == NULL))
695d1a9421dSKalle Valo 		return -EINVAL;
696d1a9421dSKalle Valo 
697d1a9421dSKalle Valo 	filename = ar->hw.fw_board;
698bdcd8170SKalle Valo 
699bdcd8170SKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
700bdcd8170SKalle Valo 			    &ar->fw_board_len);
701bdcd8170SKalle Valo 	if (ret == 0) {
702bdcd8170SKalle Valo 		/* managed to get proper board file */
703bdcd8170SKalle Valo 		return 0;
704bdcd8170SKalle Valo 	}
705bdcd8170SKalle Valo 
70692ecbff4SSam Leffler 	if (check_device_tree(ar)) {
70792ecbff4SSam Leffler 		/* got board file from device tree */
70892ecbff4SSam Leffler 		return 0;
70992ecbff4SSam Leffler 	}
71092ecbff4SSam Leffler 
711bdcd8170SKalle Valo 	/* there was no proper board file, try to use default instead */
712bdcd8170SKalle Valo 	ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
713bdcd8170SKalle Valo 		    filename, ret);
714bdcd8170SKalle Valo 
715d1a9421dSKalle Valo 	filename = ar->hw.fw_default_board;
716bdcd8170SKalle Valo 
717bdcd8170SKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
718bdcd8170SKalle Valo 			    &ar->fw_board_len);
719bdcd8170SKalle Valo 	if (ret) {
720bdcd8170SKalle Valo 		ath6kl_err("Failed to get default board file %s: %d\n",
721bdcd8170SKalle Valo 			   filename, ret);
722bdcd8170SKalle Valo 		return ret;
723bdcd8170SKalle Valo 	}
724bdcd8170SKalle Valo 
725bdcd8170SKalle Valo 	ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
726bdcd8170SKalle Valo 	ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
727bdcd8170SKalle Valo 
728bdcd8170SKalle Valo 	return 0;
729bdcd8170SKalle Valo }
730bdcd8170SKalle Valo 
731772c31eeSKalle Valo static int ath6kl_fetch_otp_file(struct ath6kl *ar)
732772c31eeSKalle Valo {
733772c31eeSKalle Valo 	const char *filename;
734772c31eeSKalle Valo 	int ret;
735772c31eeSKalle Valo 
736772c31eeSKalle Valo 	if (ar->fw_otp != NULL)
737772c31eeSKalle Valo 		return 0;
738772c31eeSKalle Valo 
739d1a9421dSKalle Valo 	if (ar->hw.fw_otp == NULL) {
740d1a9421dSKalle Valo 		ath6kl_dbg(ATH6KL_DBG_BOOT,
741d1a9421dSKalle Valo 			   "no OTP file configured for this hw\n");
742772c31eeSKalle Valo 		return 0;
743772c31eeSKalle Valo 	}
744772c31eeSKalle Valo 
745d1a9421dSKalle Valo 	filename = ar->hw.fw_otp;
746d1a9421dSKalle Valo 
747772c31eeSKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
748772c31eeSKalle Valo 			    &ar->fw_otp_len);
749772c31eeSKalle Valo 	if (ret) {
750772c31eeSKalle Valo 		ath6kl_err("Failed to get OTP file %s: %d\n",
751772c31eeSKalle Valo 			   filename, ret);
752772c31eeSKalle Valo 		return ret;
753772c31eeSKalle Valo 	}
754772c31eeSKalle Valo 
755772c31eeSKalle Valo 	return 0;
756772c31eeSKalle Valo }
757772c31eeSKalle Valo 
758772c31eeSKalle Valo static int ath6kl_fetch_fw_file(struct ath6kl *ar)
759772c31eeSKalle Valo {
760772c31eeSKalle Valo 	const char *filename;
761772c31eeSKalle Valo 	int ret;
762772c31eeSKalle Valo 
763772c31eeSKalle Valo 	if (ar->fw != NULL)
764772c31eeSKalle Valo 		return 0;
765772c31eeSKalle Valo 
766772c31eeSKalle Valo 	if (testmode) {
767d1a9421dSKalle Valo 		if (ar->hw.fw_tcmd == NULL) {
768d1a9421dSKalle Valo 			ath6kl_warn("testmode not supported\n");
769772c31eeSKalle Valo 			return -EOPNOTSUPP;
770772c31eeSKalle Valo 		}
771772c31eeSKalle Valo 
772d1a9421dSKalle Valo 		filename = ar->hw.fw_tcmd;
773d1a9421dSKalle Valo 
774772c31eeSKalle Valo 		set_bit(TESTMODE, &ar->flag);
775772c31eeSKalle Valo 
776772c31eeSKalle Valo 		goto get_fw;
777772c31eeSKalle Valo 	}
778772c31eeSKalle Valo 
779d1a9421dSKalle Valo 	if (WARN_ON(ar->hw.fw == NULL))
780d1a9421dSKalle Valo 		return -EINVAL;
781d1a9421dSKalle Valo 
782d1a9421dSKalle Valo 	filename = ar->hw.fw;
783772c31eeSKalle Valo 
784772c31eeSKalle Valo get_fw:
785772c31eeSKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
786772c31eeSKalle Valo 	if (ret) {
787772c31eeSKalle Valo 		ath6kl_err("Failed to get firmware file %s: %d\n",
788772c31eeSKalle Valo 			   filename, ret);
789772c31eeSKalle Valo 		return ret;
790772c31eeSKalle Valo 	}
791772c31eeSKalle Valo 
792772c31eeSKalle Valo 	return 0;
793772c31eeSKalle Valo }
794772c31eeSKalle Valo 
795772c31eeSKalle Valo static int ath6kl_fetch_patch_file(struct ath6kl *ar)
796772c31eeSKalle Valo {
797772c31eeSKalle Valo 	const char *filename;
798772c31eeSKalle Valo 	int ret;
799772c31eeSKalle Valo 
800d1a9421dSKalle Valo 	if (ar->fw_patch != NULL)
801772c31eeSKalle Valo 		return 0;
802772c31eeSKalle Valo 
803d1a9421dSKalle Valo 	if (ar->hw.fw_patch == NULL)
804d1a9421dSKalle Valo 		return 0;
805d1a9421dSKalle Valo 
806d1a9421dSKalle Valo 	filename = ar->hw.fw_patch;
807d1a9421dSKalle Valo 
808772c31eeSKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
809772c31eeSKalle Valo 			    &ar->fw_patch_len);
810772c31eeSKalle Valo 	if (ret) {
811772c31eeSKalle Valo 		ath6kl_err("Failed to get patch file %s: %d\n",
812772c31eeSKalle Valo 			   filename, ret);
813772c31eeSKalle Valo 		return ret;
814772c31eeSKalle Valo 	}
815772c31eeSKalle Valo 
816772c31eeSKalle Valo 	return 0;
817772c31eeSKalle Valo }
818772c31eeSKalle Valo 
81950d41234SKalle Valo static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
820772c31eeSKalle Valo {
821772c31eeSKalle Valo 	int ret;
822772c31eeSKalle Valo 
823772c31eeSKalle Valo 	ret = ath6kl_fetch_otp_file(ar);
824772c31eeSKalle Valo 	if (ret)
825772c31eeSKalle Valo 		return ret;
826772c31eeSKalle Valo 
827772c31eeSKalle Valo 	ret = ath6kl_fetch_fw_file(ar);
828772c31eeSKalle Valo 	if (ret)
829772c31eeSKalle Valo 		return ret;
830772c31eeSKalle Valo 
831772c31eeSKalle Valo 	ret = ath6kl_fetch_patch_file(ar);
832772c31eeSKalle Valo 	if (ret)
833772c31eeSKalle Valo 		return ret;
834772c31eeSKalle Valo 
835772c31eeSKalle Valo 	return 0;
836772c31eeSKalle Valo }
837bdcd8170SKalle Valo 
83850d41234SKalle Valo static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
83950d41234SKalle Valo {
84050d41234SKalle Valo 	size_t magic_len, len, ie_len;
84150d41234SKalle Valo 	const struct firmware *fw;
84250d41234SKalle Valo 	struct ath6kl_fw_ie *hdr;
84350d41234SKalle Valo 	const char *filename;
84450d41234SKalle Valo 	const u8 *data;
84597e0496dSKalle Valo 	int ret, ie_id, i, index, bit;
8468a137480SKalle Valo 	__le32 *val;
84750d41234SKalle Valo 
848d1a9421dSKalle Valo 	if (ar->hw.fw_api2 == NULL)
84950d41234SKalle Valo 		return -EOPNOTSUPP;
850d1a9421dSKalle Valo 
851d1a9421dSKalle Valo 	filename = ar->hw.fw_api2;
85250d41234SKalle Valo 
85350d41234SKalle Valo 	ret = request_firmware(&fw, filename, ar->dev);
85450d41234SKalle Valo 	if (ret)
85550d41234SKalle Valo 		return ret;
85650d41234SKalle Valo 
85750d41234SKalle Valo 	data = fw->data;
85850d41234SKalle Valo 	len = fw->size;
85950d41234SKalle Valo 
86050d41234SKalle Valo 	/* magic also includes the null byte, check that as well */
86150d41234SKalle Valo 	magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
86250d41234SKalle Valo 
86350d41234SKalle Valo 	if (len < magic_len) {
86450d41234SKalle Valo 		ret = -EINVAL;
86550d41234SKalle Valo 		goto out;
86650d41234SKalle Valo 	}
86750d41234SKalle Valo 
86850d41234SKalle Valo 	if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
86950d41234SKalle Valo 		ret = -EINVAL;
87050d41234SKalle Valo 		goto out;
87150d41234SKalle Valo 	}
87250d41234SKalle Valo 
87350d41234SKalle Valo 	len -= magic_len;
87450d41234SKalle Valo 	data += magic_len;
87550d41234SKalle Valo 
87650d41234SKalle Valo 	/* loop elements */
87750d41234SKalle Valo 	while (len > sizeof(struct ath6kl_fw_ie)) {
87850d41234SKalle Valo 		/* hdr is unaligned! */
87950d41234SKalle Valo 		hdr = (struct ath6kl_fw_ie *) data;
88050d41234SKalle Valo 
88150d41234SKalle Valo 		ie_id = le32_to_cpup(&hdr->id);
88250d41234SKalle Valo 		ie_len = le32_to_cpup(&hdr->len);
88350d41234SKalle Valo 
88450d41234SKalle Valo 		len -= sizeof(*hdr);
88550d41234SKalle Valo 		data += sizeof(*hdr);
88650d41234SKalle Valo 
88750d41234SKalle Valo 		if (len < ie_len) {
88850d41234SKalle Valo 			ret = -EINVAL;
88950d41234SKalle Valo 			goto out;
89050d41234SKalle Valo 		}
89150d41234SKalle Valo 
89250d41234SKalle Valo 		switch (ie_id) {
89350d41234SKalle Valo 		case ATH6KL_FW_IE_OTP_IMAGE:
894ef548626SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
8956bc36431SKalle Valo 				ie_len);
8966bc36431SKalle Valo 
89750d41234SKalle Valo 			ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
89850d41234SKalle Valo 
89950d41234SKalle Valo 			if (ar->fw_otp == NULL) {
90050d41234SKalle Valo 				ret = -ENOMEM;
90150d41234SKalle Valo 				goto out;
90250d41234SKalle Valo 			}
90350d41234SKalle Valo 
90450d41234SKalle Valo 			ar->fw_otp_len = ie_len;
90550d41234SKalle Valo 			break;
90650d41234SKalle Valo 		case ATH6KL_FW_IE_FW_IMAGE:
907ef548626SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
9086bc36431SKalle Valo 				ie_len);
9096bc36431SKalle Valo 
91050d41234SKalle Valo 			ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
91150d41234SKalle Valo 
91250d41234SKalle Valo 			if (ar->fw == NULL) {
91350d41234SKalle Valo 				ret = -ENOMEM;
91450d41234SKalle Valo 				goto out;
91550d41234SKalle Valo 			}
91650d41234SKalle Valo 
91750d41234SKalle Valo 			ar->fw_len = ie_len;
91850d41234SKalle Valo 			break;
91950d41234SKalle Valo 		case ATH6KL_FW_IE_PATCH_IMAGE:
920ef548626SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
9216bc36431SKalle Valo 				ie_len);
9226bc36431SKalle Valo 
92350d41234SKalle Valo 			ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
92450d41234SKalle Valo 
92550d41234SKalle Valo 			if (ar->fw_patch == NULL) {
92650d41234SKalle Valo 				ret = -ENOMEM;
92750d41234SKalle Valo 				goto out;
92850d41234SKalle Valo 			}
92950d41234SKalle Valo 
93050d41234SKalle Valo 			ar->fw_patch_len = ie_len;
93150d41234SKalle Valo 			break;
9328a137480SKalle Valo 		case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
9338a137480SKalle Valo 			val = (__le32 *) data;
9348a137480SKalle Valo 			ar->hw.reserved_ram_size = le32_to_cpup(val);
9356bc36431SKalle Valo 
9366bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
9376bc36431SKalle Valo 				   "found reserved ram size ie 0x%d\n",
9386bc36431SKalle Valo 				   ar->hw.reserved_ram_size);
9398a137480SKalle Valo 			break;
94097e0496dSKalle Valo 		case ATH6KL_FW_IE_CAPABILITIES:
941277d90f4SKalle Valo 			if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
942277d90f4SKalle Valo 				break;
943277d90f4SKalle Valo 
9446bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
945ef548626SKalle Valo 				   "found firmware capabilities ie (%zd B)\n",
9466bc36431SKalle Valo 				   ie_len);
9476bc36431SKalle Valo 
94897e0496dSKalle Valo 			for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
949277d90f4SKalle Valo 				index = i / 8;
95097e0496dSKalle Valo 				bit = i % 8;
95197e0496dSKalle Valo 
95297e0496dSKalle Valo 				if (data[index] & (1 << bit))
95397e0496dSKalle Valo 					__set_bit(i, ar->fw_capabilities);
95497e0496dSKalle Valo 			}
9556bc36431SKalle Valo 
9566bc36431SKalle Valo 			ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
9576bc36431SKalle Valo 					ar->fw_capabilities,
9586bc36431SKalle Valo 					sizeof(ar->fw_capabilities));
95997e0496dSKalle Valo 			break;
9601b4304daSKalle Valo 		case ATH6KL_FW_IE_PATCH_ADDR:
9611b4304daSKalle Valo 			if (ie_len != sizeof(*val))
9621b4304daSKalle Valo 				break;
9631b4304daSKalle Valo 
9641b4304daSKalle Valo 			val = (__le32 *) data;
9651b4304daSKalle Valo 			ar->hw.dataset_patch_addr = le32_to_cpup(val);
9666bc36431SKalle Valo 
9676bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
96803ef0250SKalle Valo 				   "found patch address ie 0x%x\n",
9696bc36431SKalle Valo 				   ar->hw.dataset_patch_addr);
9701b4304daSKalle Valo 			break;
97103ef0250SKalle Valo 		case ATH6KL_FW_IE_BOARD_ADDR:
97203ef0250SKalle Valo 			if (ie_len != sizeof(*val))
97303ef0250SKalle Valo 				break;
97403ef0250SKalle Valo 
97503ef0250SKalle Valo 			val = (__le32 *) data;
97603ef0250SKalle Valo 			ar->hw.board_addr = le32_to_cpup(val);
97703ef0250SKalle Valo 
97803ef0250SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
97903ef0250SKalle Valo 				   "found board address ie 0x%x\n",
98003ef0250SKalle Valo 				   ar->hw.board_addr);
98103ef0250SKalle Valo 			break;
982368b1b0fSKalle Valo 		case ATH6KL_FW_IE_VIF_MAX:
983368b1b0fSKalle Valo 			if (ie_len != sizeof(*val))
984368b1b0fSKalle Valo 				break;
985368b1b0fSKalle Valo 
986368b1b0fSKalle Valo 			val = (__le32 *) data;
987368b1b0fSKalle Valo 			ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
988368b1b0fSKalle Valo 					    ATH6KL_VIF_MAX);
989368b1b0fSKalle Valo 
990f143379dSVasanthakumar Thiagarajan 			if (ar->vif_max > 1 && !ar->p2p)
991f143379dSVasanthakumar Thiagarajan 				ar->max_norm_iface = 2;
992f143379dSVasanthakumar Thiagarajan 
993368b1b0fSKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
994368b1b0fSKalle Valo 				   "found vif max ie %d\n", ar->vif_max);
995368b1b0fSKalle Valo 			break;
99650d41234SKalle Valo 		default:
9976bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
99850d41234SKalle Valo 				   le32_to_cpup(&hdr->id));
99950d41234SKalle Valo 			break;
100050d41234SKalle Valo 		}
100150d41234SKalle Valo 
100250d41234SKalle Valo 		len -= ie_len;
100350d41234SKalle Valo 		data += ie_len;
100450d41234SKalle Valo 	};
100550d41234SKalle Valo 
100650d41234SKalle Valo 	ret = 0;
100750d41234SKalle Valo out:
100850d41234SKalle Valo 	release_firmware(fw);
100950d41234SKalle Valo 
101050d41234SKalle Valo 	return ret;
101150d41234SKalle Valo }
101250d41234SKalle Valo 
101350d41234SKalle Valo static int ath6kl_fetch_firmwares(struct ath6kl *ar)
101450d41234SKalle Valo {
101550d41234SKalle Valo 	int ret;
101650d41234SKalle Valo 
101750d41234SKalle Valo 	ret = ath6kl_fetch_board_file(ar);
101850d41234SKalle Valo 	if (ret)
101950d41234SKalle Valo 		return ret;
102050d41234SKalle Valo 
102150d41234SKalle Valo 	ret = ath6kl_fetch_fw_api2(ar);
10226bc36431SKalle Valo 	if (ret == 0) {
10236bc36431SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
102450d41234SKalle Valo 		return 0;
10256bc36431SKalle Valo 	}
102650d41234SKalle Valo 
102750d41234SKalle Valo 	ret = ath6kl_fetch_fw_api1(ar);
102850d41234SKalle Valo 	if (ret)
102950d41234SKalle Valo 		return ret;
103050d41234SKalle Valo 
10316bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
10326bc36431SKalle Valo 
103350d41234SKalle Valo 	return 0;
103450d41234SKalle Valo }
103550d41234SKalle Valo 
1036bdcd8170SKalle Valo static int ath6kl_upload_board_file(struct ath6kl *ar)
1037bdcd8170SKalle Valo {
1038bdcd8170SKalle Valo 	u32 board_address, board_ext_address, param;
103931024d99SKevin Fang 	u32 board_data_size, board_ext_data_size;
1040bdcd8170SKalle Valo 	int ret;
1041bdcd8170SKalle Valo 
1042772c31eeSKalle Valo 	if (WARN_ON(ar->fw_board == NULL))
1043772c31eeSKalle Valo 		return -ENOENT;
1044bdcd8170SKalle Valo 
104531024d99SKevin Fang 	/*
104631024d99SKevin Fang 	 * Determine where in Target RAM to write Board Data.
104731024d99SKevin Fang 	 * For AR6004, host determine Target RAM address for
104831024d99SKevin Fang 	 * writing board data.
104931024d99SKevin Fang 	 */
10500d4d72bfSKalle Valo 	if (ar->hw.board_addr != 0) {
10510d4d72bfSKalle Valo 		board_address = ar->hw.board_addr;
105231024d99SKevin Fang 		ath6kl_bmi_write(ar,
105331024d99SKevin Fang 				ath6kl_get_hi_item_addr(ar,
105431024d99SKevin Fang 				HI_ITEM(hi_board_data)),
105531024d99SKevin Fang 				(u8 *) &board_address, 4);
105631024d99SKevin Fang 	} else {
1057bdcd8170SKalle Valo 		ath6kl_bmi_read(ar,
1058bdcd8170SKalle Valo 				ath6kl_get_hi_item_addr(ar,
1059bdcd8170SKalle Valo 				HI_ITEM(hi_board_data)),
1060bdcd8170SKalle Valo 				(u8 *) &board_address, 4);
106131024d99SKevin Fang 	}
106231024d99SKevin Fang 
1063bdcd8170SKalle Valo 	/* determine where in target ram to write extended board data */
1064bdcd8170SKalle Valo 	ath6kl_bmi_read(ar,
1065bdcd8170SKalle Valo 			ath6kl_get_hi_item_addr(ar,
1066bdcd8170SKalle Valo 			HI_ITEM(hi_board_ext_data)),
1067bdcd8170SKalle Valo 			(u8 *) &board_ext_address, 4);
1068bdcd8170SKalle Valo 
106950e2740bSKalle Valo 	if (ar->target_type == TARGET_TYPE_AR6003 &&
107050e2740bSKalle Valo 	    board_ext_address == 0) {
1071bdcd8170SKalle Valo 		ath6kl_err("Failed to get board file target address.\n");
1072bdcd8170SKalle Valo 		return -EINVAL;
1073bdcd8170SKalle Valo 	}
1074bdcd8170SKalle Valo 
107531024d99SKevin Fang 	switch (ar->target_type) {
107631024d99SKevin Fang 	case TARGET_TYPE_AR6003:
107731024d99SKevin Fang 		board_data_size = AR6003_BOARD_DATA_SZ;
107831024d99SKevin Fang 		board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
107931024d99SKevin Fang 		break;
108031024d99SKevin Fang 	case TARGET_TYPE_AR6004:
108131024d99SKevin Fang 		board_data_size = AR6004_BOARD_DATA_SZ;
108231024d99SKevin Fang 		board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
108331024d99SKevin Fang 		break;
108431024d99SKevin Fang 	default:
108531024d99SKevin Fang 		WARN_ON(1);
108631024d99SKevin Fang 		return -EINVAL;
108731024d99SKevin Fang 		break;
108831024d99SKevin Fang 	}
108931024d99SKevin Fang 
109050e2740bSKalle Valo 	if (board_ext_address &&
109150e2740bSKalle Valo 	    ar->fw_board_len == (board_data_size + board_ext_data_size)) {
109231024d99SKevin Fang 
1093bdcd8170SKalle Valo 		/* write extended board data */
10946bc36431SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_BOOT,
10956bc36431SKalle Valo 			   "writing extended board data to 0x%x (%d B)\n",
10966bc36431SKalle Valo 			   board_ext_address, board_ext_data_size);
10976bc36431SKalle Valo 
1098bdcd8170SKalle Valo 		ret = ath6kl_bmi_write(ar, board_ext_address,
109931024d99SKevin Fang 				       ar->fw_board + board_data_size,
110031024d99SKevin Fang 				       board_ext_data_size);
1101bdcd8170SKalle Valo 		if (ret) {
1102bdcd8170SKalle Valo 			ath6kl_err("Failed to write extended board data: %d\n",
1103bdcd8170SKalle Valo 				   ret);
1104bdcd8170SKalle Valo 			return ret;
1105bdcd8170SKalle Valo 		}
1106bdcd8170SKalle Valo 
1107bdcd8170SKalle Valo 		/* record that extended board data is initialized */
110831024d99SKevin Fang 		param = (board_ext_data_size << 16) | 1;
110931024d99SKevin Fang 
1110bdcd8170SKalle Valo 		ath6kl_bmi_write(ar,
1111bdcd8170SKalle Valo 				 ath6kl_get_hi_item_addr(ar,
1112bdcd8170SKalle Valo 				 HI_ITEM(hi_board_ext_data_config)),
1113bdcd8170SKalle Valo 				 (unsigned char *) &param, 4);
1114bdcd8170SKalle Valo 	}
1115bdcd8170SKalle Valo 
111631024d99SKevin Fang 	if (ar->fw_board_len < board_data_size) {
1117bdcd8170SKalle Valo 		ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1118bdcd8170SKalle Valo 		ret = -EINVAL;
1119bdcd8170SKalle Valo 		return ret;
1120bdcd8170SKalle Valo 	}
1121bdcd8170SKalle Valo 
11226bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
11236bc36431SKalle Valo 		   board_address, board_data_size);
11246bc36431SKalle Valo 
1125bdcd8170SKalle Valo 	ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
112631024d99SKevin Fang 			       board_data_size);
1127bdcd8170SKalle Valo 
1128bdcd8170SKalle Valo 	if (ret) {
1129bdcd8170SKalle Valo 		ath6kl_err("Board file bmi write failed: %d\n", ret);
1130bdcd8170SKalle Valo 		return ret;
1131bdcd8170SKalle Valo 	}
1132bdcd8170SKalle Valo 
1133bdcd8170SKalle Valo 	/* record the fact that Board Data IS initialized */
1134bdcd8170SKalle Valo 	param = 1;
1135bdcd8170SKalle Valo 	ath6kl_bmi_write(ar,
1136bdcd8170SKalle Valo 			 ath6kl_get_hi_item_addr(ar,
1137bdcd8170SKalle Valo 			 HI_ITEM(hi_board_data_initialized)),
1138bdcd8170SKalle Valo 			 (u8 *)&param, 4);
1139bdcd8170SKalle Valo 
1140bdcd8170SKalle Valo 	return ret;
1141bdcd8170SKalle Valo }
1142bdcd8170SKalle Valo 
1143bdcd8170SKalle Valo static int ath6kl_upload_otp(struct ath6kl *ar)
1144bdcd8170SKalle Valo {
1145bdcd8170SKalle Valo 	u32 address, param;
1146bef26a7fSKalle Valo 	bool from_hw = false;
1147bdcd8170SKalle Valo 	int ret;
1148bdcd8170SKalle Valo 
114950e2740bSKalle Valo 	if (ar->fw_otp == NULL)
115050e2740bSKalle Valo 		return 0;
1151bdcd8170SKalle Valo 
1152a01ac414SKalle Valo 	address = ar->hw.app_load_addr;
1153bdcd8170SKalle Valo 
1154ef548626SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
11556bc36431SKalle Valo 		   ar->fw_otp_len);
11566bc36431SKalle Valo 
1157bdcd8170SKalle Valo 	ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1158bdcd8170SKalle Valo 				       ar->fw_otp_len);
1159bdcd8170SKalle Valo 	if (ret) {
1160bdcd8170SKalle Valo 		ath6kl_err("Failed to upload OTP file: %d\n", ret);
1161bdcd8170SKalle Valo 		return ret;
1162bdcd8170SKalle Valo 	}
1163bdcd8170SKalle Valo 
1164639d0b89SKalle Valo 	/* read firmware start address */
1165639d0b89SKalle Valo 	ret = ath6kl_bmi_read(ar,
1166639d0b89SKalle Valo 			      ath6kl_get_hi_item_addr(ar,
1167639d0b89SKalle Valo 						      HI_ITEM(hi_app_start)),
1168639d0b89SKalle Valo 			      (u8 *) &address, sizeof(address));
1169639d0b89SKalle Valo 
1170639d0b89SKalle Valo 	if (ret) {
1171639d0b89SKalle Valo 		ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1172639d0b89SKalle Valo 		return ret;
1173639d0b89SKalle Valo 	}
1174639d0b89SKalle Valo 
1175bef26a7fSKalle Valo 	if (ar->hw.app_start_override_addr == 0) {
1176639d0b89SKalle Valo 		ar->hw.app_start_override_addr = address;
1177bef26a7fSKalle Valo 		from_hw = true;
1178bef26a7fSKalle Valo 	}
1179639d0b89SKalle Valo 
1180bef26a7fSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1181bef26a7fSKalle Valo 		   from_hw ? " (from hw)" : "",
11826bc36431SKalle Valo 		   ar->hw.app_start_override_addr);
11836bc36431SKalle Valo 
1184bdcd8170SKalle Valo 	/* execute the OTP code */
1185bef26a7fSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1186bef26a7fSKalle Valo 		   ar->hw.app_start_override_addr);
1187bdcd8170SKalle Valo 	param = 0;
1188bef26a7fSKalle Valo 	ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1189bdcd8170SKalle Valo 
1190bdcd8170SKalle Valo 	return ret;
1191bdcd8170SKalle Valo }
1192bdcd8170SKalle Valo 
1193bdcd8170SKalle Valo static int ath6kl_upload_firmware(struct ath6kl *ar)
1194bdcd8170SKalle Valo {
1195bdcd8170SKalle Valo 	u32 address;
1196bdcd8170SKalle Valo 	int ret;
1197bdcd8170SKalle Valo 
1198772c31eeSKalle Valo 	if (WARN_ON(ar->fw == NULL))
119950e2740bSKalle Valo 		return 0;
1200bdcd8170SKalle Valo 
1201a01ac414SKalle Valo 	address = ar->hw.app_load_addr;
1202bdcd8170SKalle Valo 
1203ef548626SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
12046bc36431SKalle Valo 		   address, ar->fw_len);
12056bc36431SKalle Valo 
1206bdcd8170SKalle Valo 	ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1207bdcd8170SKalle Valo 
1208bdcd8170SKalle Valo 	if (ret) {
1209bdcd8170SKalle Valo 		ath6kl_err("Failed to write firmware: %d\n", ret);
1210bdcd8170SKalle Valo 		return ret;
1211bdcd8170SKalle Valo 	}
1212bdcd8170SKalle Valo 
121331024d99SKevin Fang 	/*
121431024d99SKevin Fang 	 * Set starting address for firmware
121531024d99SKevin Fang 	 * Don't need to setup app_start override addr on AR6004
121631024d99SKevin Fang 	 */
121731024d99SKevin Fang 	if (ar->target_type != TARGET_TYPE_AR6004) {
1218a01ac414SKalle Valo 		address = ar->hw.app_start_override_addr;
1219bdcd8170SKalle Valo 		ath6kl_bmi_set_app_start(ar, address);
122031024d99SKevin Fang 	}
1221bdcd8170SKalle Valo 	return ret;
1222bdcd8170SKalle Valo }
1223bdcd8170SKalle Valo 
1224bdcd8170SKalle Valo static int ath6kl_upload_patch(struct ath6kl *ar)
1225bdcd8170SKalle Valo {
1226bdcd8170SKalle Valo 	u32 address, param;
1227bdcd8170SKalle Valo 	int ret;
1228bdcd8170SKalle Valo 
122950e2740bSKalle Valo 	if (ar->fw_patch == NULL)
123050e2740bSKalle Valo 		return 0;
1231bdcd8170SKalle Valo 
1232a01ac414SKalle Valo 	address = ar->hw.dataset_patch_addr;
1233bdcd8170SKalle Valo 
1234ef548626SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
12356bc36431SKalle Valo 		   address, ar->fw_patch_len);
12366bc36431SKalle Valo 
1237bdcd8170SKalle Valo 	ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1238bdcd8170SKalle Valo 	if (ret) {
1239bdcd8170SKalle Valo 		ath6kl_err("Failed to write patch file: %d\n", ret);
1240bdcd8170SKalle Valo 		return ret;
1241bdcd8170SKalle Valo 	}
1242bdcd8170SKalle Valo 
1243bdcd8170SKalle Valo 	param = address;
1244bdcd8170SKalle Valo 	ath6kl_bmi_write(ar,
1245bdcd8170SKalle Valo 			 ath6kl_get_hi_item_addr(ar,
1246bdcd8170SKalle Valo 			 HI_ITEM(hi_dset_list_head)),
1247bdcd8170SKalle Valo 			 (unsigned char *) &param, 4);
1248bdcd8170SKalle Valo 
1249bdcd8170SKalle Valo 	return 0;
1250bdcd8170SKalle Valo }
1251bdcd8170SKalle Valo 
1252bdcd8170SKalle Valo static int ath6kl_init_upload(struct ath6kl *ar)
1253bdcd8170SKalle Valo {
1254bdcd8170SKalle Valo 	u32 param, options, sleep, address;
1255bdcd8170SKalle Valo 	int status = 0;
1256bdcd8170SKalle Valo 
125731024d99SKevin Fang 	if (ar->target_type != TARGET_TYPE_AR6003 &&
125831024d99SKevin Fang 		ar->target_type != TARGET_TYPE_AR6004)
1259bdcd8170SKalle Valo 		return -EINVAL;
1260bdcd8170SKalle Valo 
1261bdcd8170SKalle Valo 	/* temporarily disable system sleep */
1262bdcd8170SKalle Valo 	address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1263bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_read(ar, address, &param);
1264bdcd8170SKalle Valo 	if (status)
1265bdcd8170SKalle Valo 		return status;
1266bdcd8170SKalle Valo 
1267bdcd8170SKalle Valo 	options = param;
1268bdcd8170SKalle Valo 
1269bdcd8170SKalle Valo 	param |= ATH6KL_OPTION_SLEEP_DISABLE;
1270bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1271bdcd8170SKalle Valo 	if (status)
1272bdcd8170SKalle Valo 		return status;
1273bdcd8170SKalle Valo 
1274bdcd8170SKalle Valo 	address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1275bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_read(ar, address, &param);
1276bdcd8170SKalle Valo 	if (status)
1277bdcd8170SKalle Valo 		return status;
1278bdcd8170SKalle Valo 
1279bdcd8170SKalle Valo 	sleep = param;
1280bdcd8170SKalle Valo 
1281bdcd8170SKalle Valo 	param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1282bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1283bdcd8170SKalle Valo 	if (status)
1284bdcd8170SKalle Valo 		return status;
1285bdcd8170SKalle Valo 
1286bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1287bdcd8170SKalle Valo 		   options, sleep);
1288bdcd8170SKalle Valo 
1289bdcd8170SKalle Valo 	/* program analog PLL register */
129031024d99SKevin Fang 	/* no need to control 40/44MHz clock on AR6004 */
129131024d99SKevin Fang 	if (ar->target_type != TARGET_TYPE_AR6004) {
1292bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1293bdcd8170SKalle Valo 					      0xF9104001);
129431024d99SKevin Fang 
1295bdcd8170SKalle Valo 		if (status)
1296bdcd8170SKalle Valo 			return status;
1297bdcd8170SKalle Valo 
1298bdcd8170SKalle Valo 		/* Run at 80/88MHz by default */
1299bdcd8170SKalle Valo 		param = SM(CPU_CLOCK_STANDARD, 1);
1300bdcd8170SKalle Valo 
1301bdcd8170SKalle Valo 		address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1302bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1303bdcd8170SKalle Valo 		if (status)
1304bdcd8170SKalle Valo 			return status;
130531024d99SKevin Fang 	}
1306bdcd8170SKalle Valo 
1307bdcd8170SKalle Valo 	param = 0;
1308bdcd8170SKalle Valo 	address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1309bdcd8170SKalle Valo 	param = SM(LPO_CAL_ENABLE, 1);
1310bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1311bdcd8170SKalle Valo 	if (status)
1312bdcd8170SKalle Valo 		return status;
1313bdcd8170SKalle Valo 
1314bdcd8170SKalle Valo 	/* WAR to avoid SDIO CRC err */
13150d0192baSKalle Valo 	if (ar->version.target_ver == AR6003_HW_2_0_VERSION) {
1316bdcd8170SKalle Valo 		ath6kl_err("temporary war to avoid sdio crc error\n");
1317bdcd8170SKalle Valo 
1318bdcd8170SKalle Valo 		param = 0x20;
1319bdcd8170SKalle Valo 
1320bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1321bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1322bdcd8170SKalle Valo 		if (status)
1323bdcd8170SKalle Valo 			return status;
1324bdcd8170SKalle Valo 
1325bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1326bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1327bdcd8170SKalle Valo 		if (status)
1328bdcd8170SKalle Valo 			return status;
1329bdcd8170SKalle Valo 
1330bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1331bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1332bdcd8170SKalle Valo 		if (status)
1333bdcd8170SKalle Valo 			return status;
1334bdcd8170SKalle Valo 
1335bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1336bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1337bdcd8170SKalle Valo 		if (status)
1338bdcd8170SKalle Valo 			return status;
1339bdcd8170SKalle Valo 	}
1340bdcd8170SKalle Valo 
1341bdcd8170SKalle Valo 	/* write EEPROM data to Target RAM */
1342bdcd8170SKalle Valo 	status = ath6kl_upload_board_file(ar);
1343bdcd8170SKalle Valo 	if (status)
1344bdcd8170SKalle Valo 		return status;
1345bdcd8170SKalle Valo 
1346bdcd8170SKalle Valo 	/* transfer One time Programmable data */
1347bdcd8170SKalle Valo 	status = ath6kl_upload_otp(ar);
1348bdcd8170SKalle Valo 	if (status)
1349bdcd8170SKalle Valo 		return status;
1350bdcd8170SKalle Valo 
1351bdcd8170SKalle Valo 	/* Download Target firmware */
1352bdcd8170SKalle Valo 	status = ath6kl_upload_firmware(ar);
1353bdcd8170SKalle Valo 	if (status)
1354bdcd8170SKalle Valo 		return status;
1355bdcd8170SKalle Valo 
1356bdcd8170SKalle Valo 	status = ath6kl_upload_patch(ar);
1357bdcd8170SKalle Valo 	if (status)
1358bdcd8170SKalle Valo 		return status;
1359bdcd8170SKalle Valo 
1360bdcd8170SKalle Valo 	/* Restore system sleep */
1361bdcd8170SKalle Valo 	address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1362bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, sleep);
1363bdcd8170SKalle Valo 	if (status)
1364bdcd8170SKalle Valo 		return status;
1365bdcd8170SKalle Valo 
1366bdcd8170SKalle Valo 	address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1367bdcd8170SKalle Valo 	param = options | 0x20;
1368bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1369bdcd8170SKalle Valo 	if (status)
1370bdcd8170SKalle Valo 		return status;
1371bdcd8170SKalle Valo 
1372bdcd8170SKalle Valo 	return status;
1373bdcd8170SKalle Valo }
1374bdcd8170SKalle Valo 
1375a01ac414SKalle Valo static int ath6kl_init_hw_params(struct ath6kl *ar)
1376a01ac414SKalle Valo {
1377856f4b31SKalle Valo 	const struct ath6kl_hw *hw;
1378856f4b31SKalle Valo 	int i;
1379bef26a7fSKalle Valo 
1380856f4b31SKalle Valo 	for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1381856f4b31SKalle Valo 		hw = &hw_list[i];
1382bef26a7fSKalle Valo 
1383856f4b31SKalle Valo 		if (hw->id == ar->version.target_ver)
1384a01ac414SKalle Valo 			break;
1385856f4b31SKalle Valo 	}
1386856f4b31SKalle Valo 
1387856f4b31SKalle Valo 	if (i == ARRAY_SIZE(hw_list)) {
1388a01ac414SKalle Valo 		ath6kl_err("Unsupported hardware version: 0x%x\n",
1389a01ac414SKalle Valo 			   ar->version.target_ver);
1390a01ac414SKalle Valo 		return -EINVAL;
1391a01ac414SKalle Valo 	}
1392a01ac414SKalle Valo 
1393856f4b31SKalle Valo 	ar->hw = *hw;
1394856f4b31SKalle Valo 
13956bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT,
13966bc36431SKalle Valo 		   "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
13976bc36431SKalle Valo 		   ar->version.target_ver, ar->target_type,
13986bc36431SKalle Valo 		   ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
13996bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT,
14006bc36431SKalle Valo 		   "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
14016bc36431SKalle Valo 		   ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
14026bc36431SKalle Valo 		   ar->hw.reserved_ram_size);
140339586bf2SRyan Hsu 	ath6kl_dbg(ATH6KL_DBG_BOOT,
140439586bf2SRyan Hsu 		   "refclk_hz %d uarttx_pin %d",
140539586bf2SRyan Hsu 		   ar->hw.refclk_hz, ar->hw.uarttx_pin);
14066bc36431SKalle Valo 
1407a01ac414SKalle Valo 	return 0;
1408a01ac414SKalle Valo }
1409a01ac414SKalle Valo 
1410293badf4SKalle Valo static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1411293badf4SKalle Valo {
1412293badf4SKalle Valo 	switch (type) {
1413293badf4SKalle Valo 	case ATH6KL_HIF_TYPE_SDIO:
1414293badf4SKalle Valo 		return "sdio";
1415293badf4SKalle Valo 	case ATH6KL_HIF_TYPE_USB:
1416293badf4SKalle Valo 		return "usb";
1417293badf4SKalle Valo 	}
1418293badf4SKalle Valo 
1419293badf4SKalle Valo 	return NULL;
1420293badf4SKalle Valo }
1421293badf4SKalle Valo 
14225fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar)
142320459ee2SKalle Valo {
142420459ee2SKalle Valo 	long timeleft;
142520459ee2SKalle Valo 	int ret, i;
142620459ee2SKalle Valo 
14275fe4dffbSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
14285fe4dffbSKalle Valo 
142920459ee2SKalle Valo 	ret = ath6kl_hif_power_on(ar);
143020459ee2SKalle Valo 	if (ret)
143120459ee2SKalle Valo 		return ret;
143220459ee2SKalle Valo 
143320459ee2SKalle Valo 	ret = ath6kl_configure_target(ar);
143420459ee2SKalle Valo 	if (ret)
143520459ee2SKalle Valo 		goto err_power_off;
143620459ee2SKalle Valo 
143720459ee2SKalle Valo 	ret = ath6kl_init_upload(ar);
143820459ee2SKalle Valo 	if (ret)
143920459ee2SKalle Valo 		goto err_power_off;
144020459ee2SKalle Valo 
144120459ee2SKalle Valo 	/* Do we need to finish the BMI phase */
144220459ee2SKalle Valo 	/* FIXME: return error from ath6kl_bmi_done() */
144320459ee2SKalle Valo 	if (ath6kl_bmi_done(ar)) {
144420459ee2SKalle Valo 		ret = -EIO;
144520459ee2SKalle Valo 		goto err_power_off;
144620459ee2SKalle Valo 	}
144720459ee2SKalle Valo 
144820459ee2SKalle Valo 	/*
144920459ee2SKalle Valo 	 * The reason we have to wait for the target here is that the
145020459ee2SKalle Valo 	 * driver layer has to init BMI in order to set the host block
145120459ee2SKalle Valo 	 * size.
145220459ee2SKalle Valo 	 */
145320459ee2SKalle Valo 	if (ath6kl_htc_wait_target(ar->htc_target)) {
145420459ee2SKalle Valo 		ret = -EIO;
145520459ee2SKalle Valo 		goto err_power_off;
145620459ee2SKalle Valo 	}
145720459ee2SKalle Valo 
145820459ee2SKalle Valo 	if (ath6kl_init_service_ep(ar)) {
145920459ee2SKalle Valo 		ret = -EIO;
146020459ee2SKalle Valo 		goto err_cleanup_scatter;
146120459ee2SKalle Valo 	}
146220459ee2SKalle Valo 
146320459ee2SKalle Valo 	/* setup credit distribution */
146420459ee2SKalle Valo 	ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
146520459ee2SKalle Valo 
146620459ee2SKalle Valo 	/* start HTC */
146720459ee2SKalle Valo 	ret = ath6kl_htc_start(ar->htc_target);
146820459ee2SKalle Valo 	if (ret) {
146920459ee2SKalle Valo 		/* FIXME: call this */
147020459ee2SKalle Valo 		ath6kl_cookie_cleanup(ar);
147120459ee2SKalle Valo 		goto err_cleanup_scatter;
147220459ee2SKalle Valo 	}
147320459ee2SKalle Valo 
147420459ee2SKalle Valo 	/* Wait for Wmi event to be ready */
147520459ee2SKalle Valo 	timeleft = wait_event_interruptible_timeout(ar->event_wq,
147620459ee2SKalle Valo 						    test_bit(WMI_READY,
147720459ee2SKalle Valo 							     &ar->flag),
147820459ee2SKalle Valo 						    WMI_TIMEOUT);
147920459ee2SKalle Valo 
148020459ee2SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
148120459ee2SKalle Valo 
1482293badf4SKalle Valo 
1483293badf4SKalle Valo 	if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1484293badf4SKalle Valo 		ath6kl_info("%s %s fw %s%s\n",
1485293badf4SKalle Valo 			    ar->hw.name,
1486293badf4SKalle Valo 			    ath6kl_init_get_hif_name(ar->hif_type),
1487293badf4SKalle Valo 			    ar->wiphy->fw_version,
1488293badf4SKalle Valo 			    test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1489293badf4SKalle Valo 	}
1490293badf4SKalle Valo 
149120459ee2SKalle Valo 	if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
149220459ee2SKalle Valo 		ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
149320459ee2SKalle Valo 			   ATH6KL_ABI_VERSION, ar->version.abi_ver);
149420459ee2SKalle Valo 		ret = -EIO;
149520459ee2SKalle Valo 		goto err_htc_stop;
149620459ee2SKalle Valo 	}
149720459ee2SKalle Valo 
149820459ee2SKalle Valo 	if (!timeleft || signal_pending(current)) {
149920459ee2SKalle Valo 		ath6kl_err("wmi is not ready or wait was interrupted\n");
150020459ee2SKalle Valo 		ret = -EIO;
150120459ee2SKalle Valo 		goto err_htc_stop;
150220459ee2SKalle Valo 	}
150320459ee2SKalle Valo 
150420459ee2SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
150520459ee2SKalle Valo 
150620459ee2SKalle Valo 	/* communicate the wmi protocol verision to the target */
150720459ee2SKalle Valo 	/* FIXME: return error */
150820459ee2SKalle Valo 	if ((ath6kl_set_host_app_area(ar)) != 0)
150920459ee2SKalle Valo 		ath6kl_err("unable to set the host app area\n");
151020459ee2SKalle Valo 
151171f96ee6SKalle Valo 	for (i = 0; i < ar->vif_max; i++) {
151220459ee2SKalle Valo 		ret = ath6kl_target_config_wlan_params(ar, i);
151320459ee2SKalle Valo 		if (ret)
151420459ee2SKalle Valo 			goto err_htc_stop;
151520459ee2SKalle Valo 	}
151620459ee2SKalle Valo 
151776a9fbe2SKalle Valo 	ar->state = ATH6KL_STATE_ON;
151876a9fbe2SKalle Valo 
151920459ee2SKalle Valo 	return 0;
152020459ee2SKalle Valo 
152120459ee2SKalle Valo err_htc_stop:
152220459ee2SKalle Valo 	ath6kl_htc_stop(ar->htc_target);
152320459ee2SKalle Valo err_cleanup_scatter:
152420459ee2SKalle Valo 	ath6kl_hif_cleanup_scatter(ar);
152520459ee2SKalle Valo err_power_off:
152620459ee2SKalle Valo 	ath6kl_hif_power_off(ar);
152720459ee2SKalle Valo 
152820459ee2SKalle Valo 	return ret;
152920459ee2SKalle Valo }
153020459ee2SKalle Valo 
15315fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar)
15325fe4dffbSKalle Valo {
15335fe4dffbSKalle Valo 	int ret;
15345fe4dffbSKalle Valo 
15355fe4dffbSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
15365fe4dffbSKalle Valo 
15375fe4dffbSKalle Valo 	ath6kl_htc_stop(ar->htc_target);
15385fe4dffbSKalle Valo 
15395fe4dffbSKalle Valo 	ath6kl_hif_stop(ar);
15405fe4dffbSKalle Valo 
15415fe4dffbSKalle Valo 	ath6kl_bmi_reset(ar);
15425fe4dffbSKalle Valo 
15435fe4dffbSKalle Valo 	ret = ath6kl_hif_power_off(ar);
15445fe4dffbSKalle Valo 	if (ret)
15455fe4dffbSKalle Valo 		ath6kl_warn("failed to power off hif: %d\n", ret);
15465fe4dffbSKalle Valo 
154776a9fbe2SKalle Valo 	ar->state = ATH6KL_STATE_OFF;
154876a9fbe2SKalle Valo 
15495fe4dffbSKalle Valo 	return 0;
15505fe4dffbSKalle Valo }
15515fe4dffbSKalle Valo 
1552bdcd8170SKalle Valo int ath6kl_core_init(struct ath6kl *ar)
1553bdcd8170SKalle Valo {
1554bdcd8170SKalle Valo 	struct ath6kl_bmi_target_info targ_info;
155561448a93SKalle Valo 	struct net_device *ndev;
155620459ee2SKalle Valo 	int ret = 0, i;
1557bdcd8170SKalle Valo 
1558bdcd8170SKalle Valo 	ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
1559bdcd8170SKalle Valo 	if (!ar->ath6kl_wq)
1560bdcd8170SKalle Valo 		return -ENOMEM;
1561bdcd8170SKalle Valo 
1562bdcd8170SKalle Valo 	ret = ath6kl_bmi_init(ar);
1563bdcd8170SKalle Valo 	if (ret)
1564bdcd8170SKalle Valo 		goto err_wq;
1565bdcd8170SKalle Valo 
156620459ee2SKalle Valo 	/*
156720459ee2SKalle Valo 	 * Turn on power to get hardware (target) version and leave power
156820459ee2SKalle Valo 	 * on delibrately as we will boot the hardware anyway within few
156920459ee2SKalle Valo 	 * seconds.
157020459ee2SKalle Valo 	 */
1571b2e75698SKalle Valo 	ret = ath6kl_hif_power_on(ar);
1572bdcd8170SKalle Valo 	if (ret)
1573bdcd8170SKalle Valo 		goto err_bmi_cleanup;
1574bdcd8170SKalle Valo 
1575b2e75698SKalle Valo 	ret = ath6kl_bmi_get_target_info(ar, &targ_info);
1576b2e75698SKalle Valo 	if (ret)
1577b2e75698SKalle Valo 		goto err_power_off;
1578b2e75698SKalle Valo 
1579bdcd8170SKalle Valo 	ar->version.target_ver = le32_to_cpu(targ_info.version);
1580bdcd8170SKalle Valo 	ar->target_type = le32_to_cpu(targ_info.type);
1581be98e3a4SVasanthakumar Thiagarajan 	ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
1582bdcd8170SKalle Valo 
1583a01ac414SKalle Valo 	ret = ath6kl_init_hw_params(ar);
1584a01ac414SKalle Valo 	if (ret)
1585b2e75698SKalle Valo 		goto err_power_off;
1586a01ac414SKalle Valo 
1587ad226ec2SKalle Valo 	ar->htc_target = ath6kl_htc_create(ar);
1588bdcd8170SKalle Valo 
1589bdcd8170SKalle Valo 	if (!ar->htc_target) {
1590bdcd8170SKalle Valo 		ret = -ENOMEM;
1591b2e75698SKalle Valo 		goto err_power_off;
1592bdcd8170SKalle Valo 	}
1593bdcd8170SKalle Valo 
1594772c31eeSKalle Valo 	ret = ath6kl_fetch_firmwares(ar);
1595772c31eeSKalle Valo 	if (ret)
1596772c31eeSKalle Valo 		goto err_htc_cleanup;
1597772c31eeSKalle Valo 
159861448a93SKalle Valo 	/* FIXME: we should free all firmwares in the error cases below */
159961448a93SKalle Valo 
160061448a93SKalle Valo 	/* Indicate that WMI is enabled (although not ready yet) */
160161448a93SKalle Valo 	set_bit(WMI_ENABLED, &ar->flag);
160261448a93SKalle Valo 	ar->wmi = ath6kl_wmi_init(ar);
160361448a93SKalle Valo 	if (!ar->wmi) {
160461448a93SKalle Valo 		ath6kl_err("failed to initialize wmi\n");
160561448a93SKalle Valo 		ret = -EIO;
160661448a93SKalle Valo 		goto err_htc_cleanup;
160761448a93SKalle Valo 	}
160861448a93SKalle Valo 
160961448a93SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
161061448a93SKalle Valo 
161161448a93SKalle Valo 	ret = ath6kl_register_ieee80211_hw(ar);
161261448a93SKalle Valo 	if (ret)
161361448a93SKalle Valo 		goto err_node_cleanup;
161461448a93SKalle Valo 
161561448a93SKalle Valo 	ret = ath6kl_debug_init(ar);
161661448a93SKalle Valo 	if (ret) {
161761448a93SKalle Valo 		wiphy_unregister(ar->wiphy);
161861448a93SKalle Valo 		goto err_node_cleanup;
161961448a93SKalle Valo 	}
162061448a93SKalle Valo 
162171f96ee6SKalle Valo 	for (i = 0; i < ar->vif_max; i++)
162261448a93SKalle Valo 		ar->avail_idx_map |= BIT(i);
162361448a93SKalle Valo 
162461448a93SKalle Valo 	rtnl_lock();
162561448a93SKalle Valo 
162661448a93SKalle Valo 	/* Add an initial station interface */
162761448a93SKalle Valo 	ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
162861448a93SKalle Valo 				    INFRA_NETWORK);
162961448a93SKalle Valo 
163061448a93SKalle Valo 	rtnl_unlock();
163161448a93SKalle Valo 
163261448a93SKalle Valo 	if (!ndev) {
163361448a93SKalle Valo 		ath6kl_err("Failed to instantiate a network device\n");
163461448a93SKalle Valo 		ret = -ENOMEM;
163561448a93SKalle Valo 		wiphy_unregister(ar->wiphy);
163661448a93SKalle Valo 		goto err_debug_init;
163761448a93SKalle Valo 	}
163861448a93SKalle Valo 
163961448a93SKalle Valo 
164061448a93SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
164161448a93SKalle Valo 			__func__, ndev->name, ndev, ar);
164261448a93SKalle Valo 
164361448a93SKalle Valo 	/* setup access class priority mappings */
164461448a93SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest  */
164561448a93SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_BE] = 1;
164661448a93SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_VI] = 2;
164761448a93SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
164861448a93SKalle Valo 
164961448a93SKalle Valo 	/* give our connected endpoints some buffers */
165061448a93SKalle Valo 	ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
165161448a93SKalle Valo 	ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
165261448a93SKalle Valo 
165361448a93SKalle Valo 	/* allocate some buffers that handle larger AMSDU frames */
165461448a93SKalle Valo 	ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
165561448a93SKalle Valo 
165661448a93SKalle Valo 	ath6kl_cookie_init(ar);
165761448a93SKalle Valo 
165861448a93SKalle Valo 	ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
165961448a93SKalle Valo 			 ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
166061448a93SKalle Valo 
16618277de15SKalle Valo 	if (suspend_cutpower)
16628277de15SKalle Valo 		ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER;
16638277de15SKalle Valo 
166461448a93SKalle Valo 	ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
1665fb94333aSArik Nemtsov 			    WIPHY_FLAG_HAVE_AP_SME |
1666fb94333aSArik Nemtsov 			    WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD;
1667fb94333aSArik Nemtsov 
166810509f90SKalle Valo 	if (test_bit(ATH6KL_FW_CAPABILITY_SCHED_SCAN, ar->fw_capabilities))
166910509f90SKalle Valo 		ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN;
167010509f90SKalle Valo 
1671fb94333aSArik Nemtsov 	ar->wiphy->probe_resp_offload =
1672fb94333aSArik Nemtsov 		NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS |
1673fb94333aSArik Nemtsov 		NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 |
1674fb94333aSArik Nemtsov 		NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P |
1675fb94333aSArik Nemtsov 		NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U;
167661448a93SKalle Valo 
16775fe4dffbSKalle Valo 	set_bit(FIRST_BOOT, &ar->flag);
16785fe4dffbSKalle Valo 
16795fe4dffbSKalle Valo 	ret = ath6kl_init_hw_start(ar);
168020459ee2SKalle Valo 	if (ret) {
16815fe4dffbSKalle Valo 		ath6kl_err("Failed to start hardware: %d\n", ret);
168220459ee2SKalle Valo 		goto err_rxbuf_cleanup;
168361448a93SKalle Valo 	}
168461448a93SKalle Valo 
168561448a93SKalle Valo 	/*
168661448a93SKalle Valo 	 * Set mac address which is received in ready event
168761448a93SKalle Valo 	 * FIXME: Move to ath6kl_interface_add()
168861448a93SKalle Valo 	 */
168961448a93SKalle Valo 	memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
1690bdcd8170SKalle Valo 
1691bdcd8170SKalle Valo 	return ret;
1692bdcd8170SKalle Valo 
169361448a93SKalle Valo err_rxbuf_cleanup:
169461448a93SKalle Valo 	ath6kl_htc_flush_rx_buf(ar->htc_target);
169561448a93SKalle Valo 	ath6kl_cleanup_amsdu_rxbufs(ar);
169661448a93SKalle Valo 	rtnl_lock();
169761448a93SKalle Valo 	ath6kl_deinit_if_data(netdev_priv(ndev));
169861448a93SKalle Valo 	rtnl_unlock();
169961448a93SKalle Valo 	wiphy_unregister(ar->wiphy);
170061448a93SKalle Valo err_debug_init:
170161448a93SKalle Valo 	ath6kl_debug_cleanup(ar);
170261448a93SKalle Valo err_node_cleanup:
170361448a93SKalle Valo 	ath6kl_wmi_shutdown(ar->wmi);
170461448a93SKalle Valo 	clear_bit(WMI_ENABLED, &ar->flag);
170561448a93SKalle Valo 	ar->wmi = NULL;
1706bdcd8170SKalle Valo err_htc_cleanup:
1707ad226ec2SKalle Valo 	ath6kl_htc_cleanup(ar->htc_target);
1708b2e75698SKalle Valo err_power_off:
1709b2e75698SKalle Valo 	ath6kl_hif_power_off(ar);
1710bdcd8170SKalle Valo err_bmi_cleanup:
1711bdcd8170SKalle Valo 	ath6kl_bmi_cleanup(ar);
1712bdcd8170SKalle Valo err_wq:
1713bdcd8170SKalle Valo 	destroy_workqueue(ar->ath6kl_wq);
17148dafb70eSVasanthakumar Thiagarajan 
1715bdcd8170SKalle Valo 	return ret;
1716bdcd8170SKalle Valo }
1717bdcd8170SKalle Valo 
171855055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
17196db8fa53SVasanthakumar Thiagarajan {
17206db8fa53SVasanthakumar Thiagarajan 	static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
17216db8fa53SVasanthakumar Thiagarajan 	bool discon_issued;
17226db8fa53SVasanthakumar Thiagarajan 
17236db8fa53SVasanthakumar Thiagarajan 	netif_stop_queue(vif->ndev);
17246db8fa53SVasanthakumar Thiagarajan 
17256db8fa53SVasanthakumar Thiagarajan 	clear_bit(WLAN_ENABLED, &vif->flags);
17266db8fa53SVasanthakumar Thiagarajan 
17276db8fa53SVasanthakumar Thiagarajan 	if (wmi_ready) {
17286db8fa53SVasanthakumar Thiagarajan 		discon_issued = test_bit(CONNECTED, &vif->flags) ||
17296db8fa53SVasanthakumar Thiagarajan 				test_bit(CONNECT_PEND, &vif->flags);
17306db8fa53SVasanthakumar Thiagarajan 		ath6kl_disconnect(vif);
17316db8fa53SVasanthakumar Thiagarajan 		del_timer(&vif->disconnect_timer);
17326db8fa53SVasanthakumar Thiagarajan 
17336db8fa53SVasanthakumar Thiagarajan 		if (discon_issued)
17346db8fa53SVasanthakumar Thiagarajan 			ath6kl_disconnect_event(vif, DISCONNECT_CMD,
17356db8fa53SVasanthakumar Thiagarajan 						(vif->nw_type & AP_NETWORK) ?
17366db8fa53SVasanthakumar Thiagarajan 						bcast_mac : vif->bssid,
17376db8fa53SVasanthakumar Thiagarajan 						0, NULL, 0);
17386db8fa53SVasanthakumar Thiagarajan 	}
17396db8fa53SVasanthakumar Thiagarajan 
17406db8fa53SVasanthakumar Thiagarajan 	if (vif->scan_req) {
17416db8fa53SVasanthakumar Thiagarajan 		cfg80211_scan_done(vif->scan_req, true);
17426db8fa53SVasanthakumar Thiagarajan 		vif->scan_req = NULL;
17436db8fa53SVasanthakumar Thiagarajan 	}
17446db8fa53SVasanthakumar Thiagarajan }
17456db8fa53SVasanthakumar Thiagarajan 
1746bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar)
1747bdcd8170SKalle Valo {
1748990bd915SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif, *tmp_vif;
1749bdcd8170SKalle Valo 
1750bdcd8170SKalle Valo 	set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1751bdcd8170SKalle Valo 
1752bdcd8170SKalle Valo 	if (down_interruptible(&ar->sem)) {
1753bdcd8170SKalle Valo 		ath6kl_err("down_interruptible failed\n");
1754bdcd8170SKalle Valo 		return;
1755bdcd8170SKalle Valo 	}
1756bdcd8170SKalle Valo 
175711f6e40dSVasanthakumar Thiagarajan 	spin_lock_bh(&ar->list_lock);
1758990bd915SVasanthakumar Thiagarajan 	list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1759990bd915SVasanthakumar Thiagarajan 		list_del(&vif->list);
176011f6e40dSVasanthakumar Thiagarajan 		spin_unlock_bh(&ar->list_lock);
1761990bd915SVasanthakumar Thiagarajan 		ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
176227929723SVasanthakumar Thiagarajan 		rtnl_lock();
176327929723SVasanthakumar Thiagarajan 		ath6kl_deinit_if_data(vif);
176427929723SVasanthakumar Thiagarajan 		rtnl_unlock();
176511f6e40dSVasanthakumar Thiagarajan 		spin_lock_bh(&ar->list_lock);
1766990bd915SVasanthakumar Thiagarajan 	}
176711f6e40dSVasanthakumar Thiagarajan 	spin_unlock_bh(&ar->list_lock);
1768bdcd8170SKalle Valo 
17696db8fa53SVasanthakumar Thiagarajan 	clear_bit(WMI_READY, &ar->flag);
17706db8fa53SVasanthakumar Thiagarajan 
17716db8fa53SVasanthakumar Thiagarajan 	/*
17726db8fa53SVasanthakumar Thiagarajan 	 * After wmi_shudown all WMI events will be dropped. We
17736db8fa53SVasanthakumar Thiagarajan 	 * need to cleanup the buffers allocated in AP mode and
17746db8fa53SVasanthakumar Thiagarajan 	 * give disconnect notification to stack, which usually
17756db8fa53SVasanthakumar Thiagarajan 	 * happens in the disconnect_event. Simulate the disconnect
17766db8fa53SVasanthakumar Thiagarajan 	 * event by calling the function directly. Sometimes
17776db8fa53SVasanthakumar Thiagarajan 	 * disconnect_event will be received when the debug logs
17786db8fa53SVasanthakumar Thiagarajan 	 * are collected.
17796db8fa53SVasanthakumar Thiagarajan 	 */
17806db8fa53SVasanthakumar Thiagarajan 	ath6kl_wmi_shutdown(ar->wmi);
17816db8fa53SVasanthakumar Thiagarajan 
17826db8fa53SVasanthakumar Thiagarajan 	clear_bit(WMI_ENABLED, &ar->flag);
17836db8fa53SVasanthakumar Thiagarajan 	if (ar->htc_target) {
17846db8fa53SVasanthakumar Thiagarajan 		ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
17856db8fa53SVasanthakumar Thiagarajan 		ath6kl_htc_stop(ar->htc_target);
1786bdcd8170SKalle Valo 	}
1787bdcd8170SKalle Valo 
1788bdcd8170SKalle Valo 	/*
17896db8fa53SVasanthakumar Thiagarajan 	 * Try to reset the device if we can. The driver may have been
17906db8fa53SVasanthakumar Thiagarajan 	 * configure NOT to reset the target during a debug session.
1791bdcd8170SKalle Valo 	 */
17926db8fa53SVasanthakumar Thiagarajan 	ath6kl_dbg(ATH6KL_DBG_TRC,
17936db8fa53SVasanthakumar Thiagarajan 			"attempting to reset target on instance destroy\n");
17946db8fa53SVasanthakumar Thiagarajan 	ath6kl_reset_device(ar, ar->target_type, true, true);
1795bdcd8170SKalle Valo 
17966db8fa53SVasanthakumar Thiagarajan 	clear_bit(WLAN_ENABLED, &ar->flag);
1797bdcd8170SKalle Valo }
1798