1bdcd8170SKalle Valo 2bdcd8170SKalle Valo /* 3bdcd8170SKalle Valo * Copyright (c) 2011 Atheros Communications Inc. 4bdcd8170SKalle Valo * 5bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 6bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 7bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 8bdcd8170SKalle Valo * 9bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16bdcd8170SKalle Valo */ 17bdcd8170SKalle Valo 18c6efe578SStephen Rothwell #include <linux/moduleparam.h> 19f7830202SSangwook Lee #include <linux/errno.h> 2092ecbff4SSam Leffler #include <linux/of.h> 21bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h> 22bdcd8170SKalle Valo #include "core.h" 23bdcd8170SKalle Valo #include "cfg80211.h" 24bdcd8170SKalle Valo #include "target.h" 25bdcd8170SKalle Valo #include "debug.h" 26bdcd8170SKalle Valo #include "hif-ops.h" 27bdcd8170SKalle Valo 28bdcd8170SKalle Valo unsigned int debug_mask; 29003353b0SKalle Valo static unsigned int testmode; 308277de15SKalle Valo static bool suspend_cutpower; 31bdcd8170SKalle Valo 32bdcd8170SKalle Valo module_param(debug_mask, uint, 0644); 33003353b0SKalle Valo module_param(testmode, uint, 0644); 348277de15SKalle Valo module_param(suspend_cutpower, bool, 0444); 35bdcd8170SKalle Valo 36856f4b31SKalle Valo static const struct ath6kl_hw hw_list[] = { 37856f4b31SKalle Valo { 380d0192baSKalle Valo .id = AR6003_HW_2_0_VERSION, 39293badf4SKalle Valo .name = "ar6003 hw 2.0", 40856f4b31SKalle Valo .dataset_patch_addr = 0x57e884, 41856f4b31SKalle Valo .app_load_addr = 0x543180, 42856f4b31SKalle Valo .board_ext_data_addr = 0x57e500, 43856f4b31SKalle Valo .reserved_ram_size = 6912, 44856f4b31SKalle Valo 45856f4b31SKalle Valo /* hw2.0 needs override address hardcoded */ 46856f4b31SKalle Valo .app_start_override_addr = 0x944C00, 47d1a9421dSKalle Valo 48d1a9421dSKalle Valo .fw_otp = AR6003_HW_2_0_OTP_FILE, 49d1a9421dSKalle Valo .fw = AR6003_HW_2_0_FIRMWARE_FILE, 50d1a9421dSKalle Valo .fw_tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE, 51d1a9421dSKalle Valo .fw_patch = AR6003_HW_2_0_PATCH_FILE, 52d1a9421dSKalle Valo .fw_api2 = AR6003_HW_2_0_FIRMWARE_2_FILE, 53d1a9421dSKalle Valo .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE, 54d1a9421dSKalle Valo .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE, 55856f4b31SKalle Valo }, 56856f4b31SKalle Valo { 570d0192baSKalle Valo .id = AR6003_HW_2_1_1_VERSION, 58293badf4SKalle Valo .name = "ar6003 hw 2.1.1", 59856f4b31SKalle Valo .dataset_patch_addr = 0x57ff74, 60856f4b31SKalle Valo .app_load_addr = 0x1234, 61856f4b31SKalle Valo .board_ext_data_addr = 0x542330, 62856f4b31SKalle Valo .reserved_ram_size = 512, 63d1a9421dSKalle Valo 64d1a9421dSKalle Valo .fw_otp = AR6003_HW_2_1_1_OTP_FILE, 65d1a9421dSKalle Valo .fw = AR6003_HW_2_1_1_FIRMWARE_FILE, 66d1a9421dSKalle Valo .fw_tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE, 67d1a9421dSKalle Valo .fw_patch = AR6003_HW_2_1_1_PATCH_FILE, 68d1a9421dSKalle Valo .fw_api2 = AR6003_HW_2_1_1_FIRMWARE_2_FILE, 69d1a9421dSKalle Valo .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE, 70d1a9421dSKalle Valo .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE, 71856f4b31SKalle Valo }, 72856f4b31SKalle Valo { 730d0192baSKalle Valo .id = AR6004_HW_1_0_VERSION, 74293badf4SKalle Valo .name = "ar6004 hw 1.0", 75856f4b31SKalle Valo .dataset_patch_addr = 0x57e884, 76856f4b31SKalle Valo .app_load_addr = 0x1234, 77856f4b31SKalle Valo .board_ext_data_addr = 0x437000, 78856f4b31SKalle Valo .reserved_ram_size = 19456, 790d4d72bfSKalle Valo .board_addr = 0x433900, 80d1a9421dSKalle Valo 81d1a9421dSKalle Valo .fw = AR6004_HW_1_0_FIRMWARE_FILE, 82d1a9421dSKalle Valo .fw_api2 = AR6004_HW_1_0_FIRMWARE_2_FILE, 83d1a9421dSKalle Valo .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE, 84d1a9421dSKalle Valo .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE, 85856f4b31SKalle Valo }, 86856f4b31SKalle Valo { 870d0192baSKalle Valo .id = AR6004_HW_1_1_VERSION, 88293badf4SKalle Valo .name = "ar6004 hw 1.1", 89856f4b31SKalle Valo .dataset_patch_addr = 0x57e884, 90856f4b31SKalle Valo .app_load_addr = 0x1234, 91856f4b31SKalle Valo .board_ext_data_addr = 0x437000, 92856f4b31SKalle Valo .reserved_ram_size = 11264, 930d4d72bfSKalle Valo .board_addr = 0x43d400, 94d1a9421dSKalle Valo 95d1a9421dSKalle Valo .fw = AR6004_HW_1_1_FIRMWARE_FILE, 96d1a9421dSKalle Valo .fw_api2 = AR6004_HW_1_1_FIRMWARE_2_FILE, 97d1a9421dSKalle Valo .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, 98d1a9421dSKalle Valo .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, 99856f4b31SKalle Valo }, 100856f4b31SKalle Valo }; 101856f4b31SKalle Valo 102bdcd8170SKalle Valo /* 103bdcd8170SKalle Valo * Include definitions here that can be used to tune the WLAN module 104bdcd8170SKalle Valo * behavior. Different customers can tune the behavior as per their needs, 105bdcd8170SKalle Valo * here. 106bdcd8170SKalle Valo */ 107bdcd8170SKalle Valo 108bdcd8170SKalle Valo /* 109bdcd8170SKalle Valo * This configuration item enable/disable keepalive support. 110bdcd8170SKalle Valo * Keepalive support: In the absence of any data traffic to AP, null 111bdcd8170SKalle Valo * frames will be sent to the AP at periodic interval, to keep the association 112bdcd8170SKalle Valo * active. This configuration item defines the periodic interval. 113bdcd8170SKalle Valo * Use value of zero to disable keepalive support 114bdcd8170SKalle Valo * Default: 60 seconds 115bdcd8170SKalle Valo */ 116bdcd8170SKalle Valo #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 117bdcd8170SKalle Valo 118bdcd8170SKalle Valo /* 119bdcd8170SKalle Valo * This configuration item sets the value of disconnect timeout 120bdcd8170SKalle Valo * Firmware delays sending the disconnec event to the host for this 121bdcd8170SKalle Valo * timeout after is gets disconnected from the current AP. 122bdcd8170SKalle Valo * If the firmware successly roams within the disconnect timeout 123bdcd8170SKalle Valo * it sends a new connect event 124bdcd8170SKalle Valo */ 125bdcd8170SKalle Valo #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 126bdcd8170SKalle Valo 127bdcd8170SKalle Valo #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8 128bdcd8170SKalle Valo 129bdcd8170SKalle Valo #define ATH6KL_DATA_OFFSET 64 130bdcd8170SKalle Valo struct sk_buff *ath6kl_buf_alloc(int size) 131bdcd8170SKalle Valo { 132bdcd8170SKalle Valo struct sk_buff *skb; 133bdcd8170SKalle Valo u16 reserved; 134bdcd8170SKalle Valo 135bdcd8170SKalle Valo /* Add chacheline space at front and back of buffer */ 136bdcd8170SKalle Valo reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 1371df94a85SVasanthakumar Thiagarajan sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; 138bdcd8170SKalle Valo skb = dev_alloc_skb(size + reserved); 139bdcd8170SKalle Valo 140bdcd8170SKalle Valo if (skb) 141bdcd8170SKalle Valo skb_reserve(skb, reserved - L1_CACHE_BYTES); 142bdcd8170SKalle Valo return skb; 143bdcd8170SKalle Valo } 144bdcd8170SKalle Valo 145e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif) 146bdcd8170SKalle Valo { 1473450334fSVasanthakumar Thiagarajan vif->ssid_len = 0; 1483450334fSVasanthakumar Thiagarajan memset(vif->ssid, 0, sizeof(vif->ssid)); 1493450334fSVasanthakumar Thiagarajan 1503450334fSVasanthakumar Thiagarajan vif->dot11_auth_mode = OPEN_AUTH; 1513450334fSVasanthakumar Thiagarajan vif->auth_mode = NONE_AUTH; 1523450334fSVasanthakumar Thiagarajan vif->prwise_crypto = NONE_CRYPT; 1533450334fSVasanthakumar Thiagarajan vif->prwise_crypto_len = 0; 1543450334fSVasanthakumar Thiagarajan vif->grp_crypto = NONE_CRYPT; 1553450334fSVasanthakumar Thiagarajan vif->grp_crypto_len = 0; 1566f2a73f9SVasanthakumar Thiagarajan memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 1578c8b65e3SVasanthakumar Thiagarajan memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); 1588c8b65e3SVasanthakumar Thiagarajan memset(vif->bssid, 0, sizeof(vif->bssid)); 159f74bac54SVasanthakumar Thiagarajan vif->bss_ch = 0; 160bdcd8170SKalle Valo } 161bdcd8170SKalle Valo 162bdcd8170SKalle Valo static int ath6kl_set_host_app_area(struct ath6kl *ar) 163bdcd8170SKalle Valo { 164bdcd8170SKalle Valo u32 address, data; 165bdcd8170SKalle Valo struct host_app_area host_app_area; 166bdcd8170SKalle Valo 167bdcd8170SKalle Valo /* Fetch the address of the host_app_area_s 168bdcd8170SKalle Valo * instance in the host interest area */ 169bdcd8170SKalle Valo address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 17031024d99SKevin Fang address = TARG_VTOP(ar->target_type, address); 171bdcd8170SKalle Valo 172addb44beSKalle Valo if (ath6kl_diag_read32(ar, address, &data)) 173bdcd8170SKalle Valo return -EIO; 174bdcd8170SKalle Valo 17531024d99SKevin Fang address = TARG_VTOP(ar->target_type, data); 176cbf49a6fSKalle Valo host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); 177addb44beSKalle Valo if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 178addb44beSKalle Valo sizeof(struct host_app_area))) 179bdcd8170SKalle Valo return -EIO; 180bdcd8170SKalle Valo 181bdcd8170SKalle Valo return 0; 182bdcd8170SKalle Valo } 183bdcd8170SKalle Valo 184bdcd8170SKalle Valo static inline void set_ac2_ep_map(struct ath6kl *ar, 185bdcd8170SKalle Valo u8 ac, 186bdcd8170SKalle Valo enum htc_endpoint_id ep) 187bdcd8170SKalle Valo { 188bdcd8170SKalle Valo ar->ac2ep_map[ac] = ep; 189bdcd8170SKalle Valo ar->ep2ac_map[ep] = ac; 190bdcd8170SKalle Valo } 191bdcd8170SKalle Valo 192bdcd8170SKalle Valo /* connect to a service */ 193bdcd8170SKalle Valo static int ath6kl_connectservice(struct ath6kl *ar, 194bdcd8170SKalle Valo struct htc_service_connect_req *con_req, 195bdcd8170SKalle Valo char *desc) 196bdcd8170SKalle Valo { 197bdcd8170SKalle Valo int status; 198bdcd8170SKalle Valo struct htc_service_connect_resp response; 199bdcd8170SKalle Valo 200bdcd8170SKalle Valo memset(&response, 0, sizeof(response)); 201bdcd8170SKalle Valo 202ad226ec2SKalle Valo status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 203bdcd8170SKalle Valo if (status) { 204bdcd8170SKalle Valo ath6kl_err("failed to connect to %s service status:%d\n", 205bdcd8170SKalle Valo desc, status); 206bdcd8170SKalle Valo return status; 207bdcd8170SKalle Valo } 208bdcd8170SKalle Valo 209bdcd8170SKalle Valo switch (con_req->svc_id) { 210bdcd8170SKalle Valo case WMI_CONTROL_SVC: 211bdcd8170SKalle Valo if (test_bit(WMI_ENABLED, &ar->flag)) 212bdcd8170SKalle Valo ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 213bdcd8170SKalle Valo ar->ctrl_ep = response.endpoint; 214bdcd8170SKalle Valo break; 215bdcd8170SKalle Valo case WMI_DATA_BE_SVC: 216bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 217bdcd8170SKalle Valo break; 218bdcd8170SKalle Valo case WMI_DATA_BK_SVC: 219bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 220bdcd8170SKalle Valo break; 221bdcd8170SKalle Valo case WMI_DATA_VI_SVC: 222bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 223bdcd8170SKalle Valo break; 224bdcd8170SKalle Valo case WMI_DATA_VO_SVC: 225bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 226bdcd8170SKalle Valo break; 227bdcd8170SKalle Valo default: 228bdcd8170SKalle Valo ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 229bdcd8170SKalle Valo return -EINVAL; 230bdcd8170SKalle Valo } 231bdcd8170SKalle Valo 232bdcd8170SKalle Valo return 0; 233bdcd8170SKalle Valo } 234bdcd8170SKalle Valo 235bdcd8170SKalle Valo static int ath6kl_init_service_ep(struct ath6kl *ar) 236bdcd8170SKalle Valo { 237bdcd8170SKalle Valo struct htc_service_connect_req connect; 238bdcd8170SKalle Valo 239bdcd8170SKalle Valo memset(&connect, 0, sizeof(connect)); 240bdcd8170SKalle Valo 241bdcd8170SKalle Valo /* these fields are the same for all service endpoints */ 242bdcd8170SKalle Valo connect.ep_cb.rx = ath6kl_rx; 243bdcd8170SKalle Valo connect.ep_cb.rx_refill = ath6kl_rx_refill; 244bdcd8170SKalle Valo connect.ep_cb.tx_full = ath6kl_tx_queue_full; 245bdcd8170SKalle Valo 246bdcd8170SKalle Valo /* 247bdcd8170SKalle Valo * Set the max queue depth so that our ath6kl_tx_queue_full handler 248bdcd8170SKalle Valo * gets called. 249bdcd8170SKalle Valo */ 250bdcd8170SKalle Valo connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 251bdcd8170SKalle Valo connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 252bdcd8170SKalle Valo if (!connect.ep_cb.rx_refill_thresh) 253bdcd8170SKalle Valo connect.ep_cb.rx_refill_thresh++; 254bdcd8170SKalle Valo 255bdcd8170SKalle Valo /* connect to control service */ 256bdcd8170SKalle Valo connect.svc_id = WMI_CONTROL_SVC; 257bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 258bdcd8170SKalle Valo return -EIO; 259bdcd8170SKalle Valo 260bdcd8170SKalle Valo connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 261bdcd8170SKalle Valo 262bdcd8170SKalle Valo /* 263bdcd8170SKalle Valo * Limit the HTC message size on the send path, although e can 264bdcd8170SKalle Valo * receive A-MSDU frames of 4K, we will only send ethernet-sized 265bdcd8170SKalle Valo * (802.3) frames on the send path. 266bdcd8170SKalle Valo */ 267bdcd8170SKalle Valo connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 268bdcd8170SKalle Valo 269bdcd8170SKalle Valo /* 270bdcd8170SKalle Valo * To reduce the amount of committed memory for larger A_MSDU 271bdcd8170SKalle Valo * frames, use the recv-alloc threshold mechanism for larger 272bdcd8170SKalle Valo * packets. 273bdcd8170SKalle Valo */ 274bdcd8170SKalle Valo connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 275bdcd8170SKalle Valo connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 276bdcd8170SKalle Valo 277bdcd8170SKalle Valo /* 278bdcd8170SKalle Valo * For the remaining data services set the connection flag to 279bdcd8170SKalle Valo * reduce dribbling, if configured to do so. 280bdcd8170SKalle Valo */ 281bdcd8170SKalle Valo connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 282bdcd8170SKalle Valo connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 283bdcd8170SKalle Valo connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 284bdcd8170SKalle Valo 285bdcd8170SKalle Valo connect.svc_id = WMI_DATA_BE_SVC; 286bdcd8170SKalle Valo 287bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 288bdcd8170SKalle Valo return -EIO; 289bdcd8170SKalle Valo 290bdcd8170SKalle Valo /* connect to back-ground map this to WMI LOW_PRI */ 291bdcd8170SKalle Valo connect.svc_id = WMI_DATA_BK_SVC; 292bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 293bdcd8170SKalle Valo return -EIO; 294bdcd8170SKalle Valo 295bdcd8170SKalle Valo /* connect to Video service, map this to to HI PRI */ 296bdcd8170SKalle Valo connect.svc_id = WMI_DATA_VI_SVC; 297bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 298bdcd8170SKalle Valo return -EIO; 299bdcd8170SKalle Valo 300bdcd8170SKalle Valo /* 301bdcd8170SKalle Valo * Connect to VO service, this is currently not mapped to a WMI 302bdcd8170SKalle Valo * priority stream due to historical reasons. WMI originally 303bdcd8170SKalle Valo * defined 3 priorities over 3 mailboxes We can change this when 304bdcd8170SKalle Valo * WMI is reworked so that priorities are not dependent on 305bdcd8170SKalle Valo * mailboxes. 306bdcd8170SKalle Valo */ 307bdcd8170SKalle Valo connect.svc_id = WMI_DATA_VO_SVC; 308bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 309bdcd8170SKalle Valo return -EIO; 310bdcd8170SKalle Valo 311bdcd8170SKalle Valo return 0; 312bdcd8170SKalle Valo } 313bdcd8170SKalle Valo 314e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif) 315bdcd8170SKalle Valo { 316e29f25f5SVasanthakumar Thiagarajan ath6kl_init_profile_info(vif); 3173450334fSVasanthakumar Thiagarajan vif->def_txkey_index = 0; 3186f2a73f9SVasanthakumar Thiagarajan memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 319f74bac54SVasanthakumar Thiagarajan vif->ch_hint = 0; 320bdcd8170SKalle Valo } 321bdcd8170SKalle Valo 322bdcd8170SKalle Valo /* 323bdcd8170SKalle Valo * Set HTC/Mbox operational parameters, this can only be called when the 324bdcd8170SKalle Valo * target is in the BMI phase. 325bdcd8170SKalle Valo */ 326bdcd8170SKalle Valo static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 327bdcd8170SKalle Valo u8 htc_ctrl_buf) 328bdcd8170SKalle Valo { 329bdcd8170SKalle Valo int status; 330bdcd8170SKalle Valo u32 blk_size; 331bdcd8170SKalle Valo 332bdcd8170SKalle Valo blk_size = ar->mbox_info.block_size; 333bdcd8170SKalle Valo 334bdcd8170SKalle Valo if (htc_ctrl_buf) 335bdcd8170SKalle Valo blk_size |= ((u32)htc_ctrl_buf) << 16; 336bdcd8170SKalle Valo 337bdcd8170SKalle Valo /* set the host interest area for the block size */ 338bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 339bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 340bdcd8170SKalle Valo HI_ITEM(hi_mbox_io_block_sz)), 341bdcd8170SKalle Valo (u8 *)&blk_size, 342bdcd8170SKalle Valo 4); 343bdcd8170SKalle Valo if (status) { 344bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for IO block size failed\n"); 345bdcd8170SKalle Valo goto out; 346bdcd8170SKalle Valo } 347bdcd8170SKalle Valo 348bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 349bdcd8170SKalle Valo blk_size, 350bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 351bdcd8170SKalle Valo 352bdcd8170SKalle Valo if (mbox_isr_yield_val) { 353bdcd8170SKalle Valo /* set the host interest area for the mbox ISR yield limit */ 354bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 355bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 356bdcd8170SKalle Valo HI_ITEM(hi_mbox_isr_yield_limit)), 357bdcd8170SKalle Valo (u8 *)&mbox_isr_yield_val, 358bdcd8170SKalle Valo 4); 359bdcd8170SKalle Valo if (status) { 360bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for yield limit failed\n"); 361bdcd8170SKalle Valo goto out; 362bdcd8170SKalle Valo } 363bdcd8170SKalle Valo } 364bdcd8170SKalle Valo 365bdcd8170SKalle Valo out: 366bdcd8170SKalle Valo return status; 367bdcd8170SKalle Valo } 368bdcd8170SKalle Valo 3690ce59445SVasanthakumar Thiagarajan static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) 370bdcd8170SKalle Valo { 371bdcd8170SKalle Valo int status = 0; 3724dea08e0SJouni Malinen int ret; 373bdcd8170SKalle Valo 374bdcd8170SKalle Valo /* 375bdcd8170SKalle Valo * Configure the device for rx dot11 header rules. "0,0" are the 376bdcd8170SKalle Valo * default values. Required if checksum offload is needed. Set 377bdcd8170SKalle Valo * RxMetaVersion to 2. 378bdcd8170SKalle Valo */ 3790ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, 380bdcd8170SKalle Valo ar->rx_meta_ver, 0, 0)) { 381bdcd8170SKalle Valo ath6kl_err("unable to set the rx frame format\n"); 382bdcd8170SKalle Valo status = -EIO; 383bdcd8170SKalle Valo } 384bdcd8170SKalle Valo 385bdcd8170SKalle Valo if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) 3860ce59445SVasanthakumar Thiagarajan if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, 387bdcd8170SKalle Valo IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { 388bdcd8170SKalle Valo ath6kl_err("unable to set power save fail event policy\n"); 389bdcd8170SKalle Valo status = -EIO; 390bdcd8170SKalle Valo } 391bdcd8170SKalle Valo 392bdcd8170SKalle Valo if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) 3930ce59445SVasanthakumar Thiagarajan if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, 394bdcd8170SKalle Valo WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { 395bdcd8170SKalle Valo ath6kl_err("unable to set barker preamble policy\n"); 396bdcd8170SKalle Valo status = -EIO; 397bdcd8170SKalle Valo } 398bdcd8170SKalle Valo 3990ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, 400bdcd8170SKalle Valo WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { 401bdcd8170SKalle Valo ath6kl_err("unable to set keep alive interval\n"); 402bdcd8170SKalle Valo status = -EIO; 403bdcd8170SKalle Valo } 404bdcd8170SKalle Valo 4050ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, 406bdcd8170SKalle Valo WLAN_CONFIG_DISCONNECT_TIMEOUT)) { 407bdcd8170SKalle Valo ath6kl_err("unable to set disconnect timeout\n"); 408bdcd8170SKalle Valo status = -EIO; 409bdcd8170SKalle Valo } 410bdcd8170SKalle Valo 411bdcd8170SKalle Valo if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) 4120ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) { 413bdcd8170SKalle Valo ath6kl_err("unable to set txop bursting\n"); 414bdcd8170SKalle Valo status = -EIO; 415bdcd8170SKalle Valo } 416bdcd8170SKalle Valo 4170ce59445SVasanthakumar Thiagarajan /* 4180ce59445SVasanthakumar Thiagarajan * FIXME: Make sure p2p configurations are not applied to 4190ce59445SVasanthakumar Thiagarajan * non-p2p capable interfaces when multivif support is enabled. 4200ce59445SVasanthakumar Thiagarajan */ 4216bbc7c35SJouni Malinen if (ar->p2p) { 4220ce59445SVasanthakumar Thiagarajan ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, 4236bbc7c35SJouni Malinen P2P_FLAG_CAPABILITIES_REQ | 4244dea08e0SJouni Malinen P2P_FLAG_MACADDR_REQ | 4254dea08e0SJouni Malinen P2P_FLAG_HMODEL_REQ); 4264dea08e0SJouni Malinen if (ret) { 4274dea08e0SJouni Malinen ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " 4286bbc7c35SJouni Malinen "capabilities (%d) - assuming P2P not " 4296bbc7c35SJouni Malinen "supported\n", ret); 4306bbc7c35SJouni Malinen ar->p2p = 0; 4316bbc7c35SJouni Malinen } 4326bbc7c35SJouni Malinen } 4336bbc7c35SJouni Malinen 4340ce59445SVasanthakumar Thiagarajan /* 4350ce59445SVasanthakumar Thiagarajan * FIXME: Make sure p2p configurations are not applied to 4360ce59445SVasanthakumar Thiagarajan * non-p2p capable interfaces when multivif support is enabled. 4370ce59445SVasanthakumar Thiagarajan */ 4386bbc7c35SJouni Malinen if (ar->p2p) { 4396bbc7c35SJouni Malinen /* Enable Probe Request reporting for P2P */ 4400ce59445SVasanthakumar Thiagarajan ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 4416bbc7c35SJouni Malinen if (ret) { 4426bbc7c35SJouni Malinen ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " 4436bbc7c35SJouni Malinen "Request reporting (%d)\n", ret); 4446bbc7c35SJouni Malinen } 4454dea08e0SJouni Malinen } 4464dea08e0SJouni Malinen 447bdcd8170SKalle Valo return status; 448bdcd8170SKalle Valo } 449bdcd8170SKalle Valo 450bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar) 451bdcd8170SKalle Valo { 452bdcd8170SKalle Valo u32 param, ram_reserved_size; 4533226f68aSVasanthakumar Thiagarajan u8 fw_iftype, fw_mode = 0, fw_submode = 0; 4547b85832dSVasanthakumar Thiagarajan int i; 455bdcd8170SKalle Valo 4567b85832dSVasanthakumar Thiagarajan /* 4577b85832dSVasanthakumar Thiagarajan * Note: Even though the firmware interface type is 4587b85832dSVasanthakumar Thiagarajan * chosen as BSS_STA for all three interfaces, can 4597b85832dSVasanthakumar Thiagarajan * be configured to IBSS/AP as long as the fw submode 4607b85832dSVasanthakumar Thiagarajan * remains normal mode (0 - AP, STA and IBSS). But 4617b85832dSVasanthakumar Thiagarajan * due to an target assert in firmware only one interface is 4627b85832dSVasanthakumar Thiagarajan * configured for now. 4637b85832dSVasanthakumar Thiagarajan */ 464dd3751f7SVasanthakumar Thiagarajan fw_iftype = HI_OPTION_FW_MODE_BSS_STA; 465bdcd8170SKalle Valo 46671f96ee6SKalle Valo for (i = 0; i < ar->vif_max; i++) 4677b85832dSVasanthakumar Thiagarajan fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); 4687b85832dSVasanthakumar Thiagarajan 4697b85832dSVasanthakumar Thiagarajan /* 4703226f68aSVasanthakumar Thiagarajan * By default, submodes : 4713226f68aSVasanthakumar Thiagarajan * vif[0] - AP/STA/IBSS 4727b85832dSVasanthakumar Thiagarajan * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" 4737b85832dSVasanthakumar Thiagarajan * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" 4747b85832dSVasanthakumar Thiagarajan */ 4753226f68aSVasanthakumar Thiagarajan 4763226f68aSVasanthakumar Thiagarajan for (i = 0; i < ar->max_norm_iface; i++) 4773226f68aSVasanthakumar Thiagarajan fw_submode |= HI_OPTION_FW_SUBMODE_NONE << 4783226f68aSVasanthakumar Thiagarajan (i * HI_OPTION_FW_SUBMODE_BITS); 4793226f68aSVasanthakumar Thiagarajan 48071f96ee6SKalle Valo for (i = ar->max_norm_iface; i < ar->vif_max; i++) 4813226f68aSVasanthakumar Thiagarajan fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 4823226f68aSVasanthakumar Thiagarajan (i * HI_OPTION_FW_SUBMODE_BITS); 4837b85832dSVasanthakumar Thiagarajan 4847b85832dSVasanthakumar Thiagarajan /* 4857b85832dSVasanthakumar Thiagarajan * FIXME: This needs to be removed once the multivif 4867b85832dSVasanthakumar Thiagarajan * support is enabled. 4877b85832dSVasanthakumar Thiagarajan */ 4887b85832dSVasanthakumar Thiagarajan if (ar->p2p) 4897b85832dSVasanthakumar Thiagarajan fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; 4907b85832dSVasanthakumar Thiagarajan 491bdcd8170SKalle Valo param = HTC_PROTOCOL_VERSION; 492bdcd8170SKalle Valo if (ath6kl_bmi_write(ar, 493bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 494bdcd8170SKalle Valo HI_ITEM(hi_app_host_interest)), 495bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 496bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for htc version failed\n"); 497bdcd8170SKalle Valo return -EIO; 498bdcd8170SKalle Valo } 499bdcd8170SKalle Valo 500bdcd8170SKalle Valo /* set the firmware mode to STA/IBSS/AP */ 501bdcd8170SKalle Valo param = 0; 502bdcd8170SKalle Valo 503bdcd8170SKalle Valo if (ath6kl_bmi_read(ar, 504bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 505bdcd8170SKalle Valo HI_ITEM(hi_option_flag)), 506bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 507bdcd8170SKalle Valo ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 508bdcd8170SKalle Valo return -EIO; 509bdcd8170SKalle Valo } 510bdcd8170SKalle Valo 51171f96ee6SKalle Valo param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT); 5127b85832dSVasanthakumar Thiagarajan param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; 5137b85832dSVasanthakumar Thiagarajan param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; 5147b85832dSVasanthakumar Thiagarajan 515bdcd8170SKalle Valo param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 516bdcd8170SKalle Valo param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 517bdcd8170SKalle Valo 518bdcd8170SKalle Valo if (ath6kl_bmi_write(ar, 519bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 520bdcd8170SKalle Valo HI_ITEM(hi_option_flag)), 521bdcd8170SKalle Valo (u8 *)¶m, 522bdcd8170SKalle Valo 4) != 0) { 523bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 524bdcd8170SKalle Valo return -EIO; 525bdcd8170SKalle Valo } 526bdcd8170SKalle Valo 527bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 528bdcd8170SKalle Valo 529bdcd8170SKalle Valo /* 530bdcd8170SKalle Valo * Hardcode the address use for the extended board data 531bdcd8170SKalle Valo * Ideally this should be pre-allocate by the OS at boot time 532bdcd8170SKalle Valo * But since it is a new feature and board data is loaded 533bdcd8170SKalle Valo * at init time, we have to workaround this from host. 534bdcd8170SKalle Valo * It is difficult to patch the firmware boot code, 535bdcd8170SKalle Valo * but possible in theory. 536bdcd8170SKalle Valo */ 537bdcd8170SKalle Valo 538991b27eaSKalle Valo param = ar->hw.board_ext_data_addr; 539991b27eaSKalle Valo ram_reserved_size = ar->hw.reserved_ram_size; 540bdcd8170SKalle Valo 541991b27eaSKalle Valo if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 542bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data)), 543bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 544bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 545bdcd8170SKalle Valo return -EIO; 546bdcd8170SKalle Valo } 547991b27eaSKalle Valo 548991b27eaSKalle Valo if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 549bdcd8170SKalle Valo HI_ITEM(hi_end_ram_reserve_sz)), 550bdcd8170SKalle Valo (u8 *)&ram_reserved_size, 4) != 0) { 551bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 552bdcd8170SKalle Valo return -EIO; 553bdcd8170SKalle Valo } 554bdcd8170SKalle Valo 555bdcd8170SKalle Valo /* set the block size for the target */ 556bdcd8170SKalle Valo if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 557bdcd8170SKalle Valo /* use default number of control buffers */ 558bdcd8170SKalle Valo return -EIO; 559bdcd8170SKalle Valo 560bdcd8170SKalle Valo return 0; 561bdcd8170SKalle Valo } 562bdcd8170SKalle Valo 5638dafb70eSVasanthakumar Thiagarajan void ath6kl_core_free(struct ath6kl *ar) 564bdcd8170SKalle Valo { 5658dafb70eSVasanthakumar Thiagarajan wiphy_free(ar->wiphy); 566bdcd8170SKalle Valo } 567bdcd8170SKalle Valo 5686db8fa53SVasanthakumar Thiagarajan void ath6kl_core_cleanup(struct ath6kl *ar) 569bdcd8170SKalle Valo { 570b2e75698SKalle Valo ath6kl_hif_power_off(ar); 571b2e75698SKalle Valo 5726db8fa53SVasanthakumar Thiagarajan destroy_workqueue(ar->ath6kl_wq); 573bdcd8170SKalle Valo 5746db8fa53SVasanthakumar Thiagarajan if (ar->htc_target) 5756db8fa53SVasanthakumar Thiagarajan ath6kl_htc_cleanup(ar->htc_target); 5766db8fa53SVasanthakumar Thiagarajan 5776db8fa53SVasanthakumar Thiagarajan ath6kl_cookie_cleanup(ar); 5786db8fa53SVasanthakumar Thiagarajan 5796db8fa53SVasanthakumar Thiagarajan ath6kl_cleanup_amsdu_rxbufs(ar); 5806db8fa53SVasanthakumar Thiagarajan 5816db8fa53SVasanthakumar Thiagarajan ath6kl_bmi_cleanup(ar); 5826db8fa53SVasanthakumar Thiagarajan 5836db8fa53SVasanthakumar Thiagarajan ath6kl_debug_cleanup(ar); 5846db8fa53SVasanthakumar Thiagarajan 5856db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_board); 5866db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_otp); 5876db8fa53SVasanthakumar Thiagarajan kfree(ar->fw); 5886db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_patch); 5896db8fa53SVasanthakumar Thiagarajan 5906db8fa53SVasanthakumar Thiagarajan ath6kl_deinit_ieee80211_hw(ar); 591bdcd8170SKalle Valo } 592bdcd8170SKalle Valo 593bdcd8170SKalle Valo /* firmware upload */ 594bdcd8170SKalle Valo static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 595bdcd8170SKalle Valo u8 **fw, size_t *fw_len) 596bdcd8170SKalle Valo { 597bdcd8170SKalle Valo const struct firmware *fw_entry; 598bdcd8170SKalle Valo int ret; 599bdcd8170SKalle Valo 600bdcd8170SKalle Valo ret = request_firmware(&fw_entry, filename, ar->dev); 601bdcd8170SKalle Valo if (ret) 602bdcd8170SKalle Valo return ret; 603bdcd8170SKalle Valo 604bdcd8170SKalle Valo *fw_len = fw_entry->size; 605bdcd8170SKalle Valo *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 606bdcd8170SKalle Valo 607bdcd8170SKalle Valo if (*fw == NULL) 608bdcd8170SKalle Valo ret = -ENOMEM; 609bdcd8170SKalle Valo 610bdcd8170SKalle Valo release_firmware(fw_entry); 611bdcd8170SKalle Valo 612bdcd8170SKalle Valo return ret; 613bdcd8170SKalle Valo } 614bdcd8170SKalle Valo 61592ecbff4SSam Leffler #ifdef CONFIG_OF 61692ecbff4SSam Leffler static const char *get_target_ver_dir(const struct ath6kl *ar) 61792ecbff4SSam Leffler { 61892ecbff4SSam Leffler switch (ar->version.target_ver) { 6190d0192baSKalle Valo case AR6003_HW_1_0_VERSION: 62092ecbff4SSam Leffler return "ath6k/AR6003/hw1.0"; 6210d0192baSKalle Valo case AR6003_HW_2_0_VERSION: 62292ecbff4SSam Leffler return "ath6k/AR6003/hw2.0"; 6230d0192baSKalle Valo case AR6003_HW_2_1_1_VERSION: 62492ecbff4SSam Leffler return "ath6k/AR6003/hw2.1.1"; 62592ecbff4SSam Leffler } 62692ecbff4SSam Leffler ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__, 62792ecbff4SSam Leffler ar->version.target_ver); 62892ecbff4SSam Leffler return NULL; 62992ecbff4SSam Leffler } 63092ecbff4SSam Leffler 63192ecbff4SSam Leffler /* 63292ecbff4SSam Leffler * Check the device tree for a board-id and use it to construct 63392ecbff4SSam Leffler * the pathname to the firmware file. Used (for now) to find a 63492ecbff4SSam Leffler * fallback to the "bdata.bin" file--typically a symlink to the 63592ecbff4SSam Leffler * appropriate board-specific file. 63692ecbff4SSam Leffler */ 63792ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar) 63892ecbff4SSam Leffler { 63992ecbff4SSam Leffler static const char *board_id_prop = "atheros,board-id"; 64092ecbff4SSam Leffler struct device_node *node; 64192ecbff4SSam Leffler char board_filename[64]; 64292ecbff4SSam Leffler const char *board_id; 64392ecbff4SSam Leffler int ret; 64492ecbff4SSam Leffler 64592ecbff4SSam Leffler for_each_compatible_node(node, NULL, "atheros,ath6kl") { 64692ecbff4SSam Leffler board_id = of_get_property(node, board_id_prop, NULL); 64792ecbff4SSam Leffler if (board_id == NULL) { 64892ecbff4SSam Leffler ath6kl_warn("No \"%s\" property on %s node.\n", 64992ecbff4SSam Leffler board_id_prop, node->name); 65092ecbff4SSam Leffler continue; 65192ecbff4SSam Leffler } 65292ecbff4SSam Leffler snprintf(board_filename, sizeof(board_filename), 65392ecbff4SSam Leffler "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id); 65492ecbff4SSam Leffler 65592ecbff4SSam Leffler ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 65692ecbff4SSam Leffler &ar->fw_board_len); 65792ecbff4SSam Leffler if (ret) { 65892ecbff4SSam Leffler ath6kl_err("Failed to get DT board file %s: %d\n", 65992ecbff4SSam Leffler board_filename, ret); 66092ecbff4SSam Leffler continue; 66192ecbff4SSam Leffler } 66292ecbff4SSam Leffler return true; 66392ecbff4SSam Leffler } 66492ecbff4SSam Leffler return false; 66592ecbff4SSam Leffler } 66692ecbff4SSam Leffler #else 66792ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar) 66892ecbff4SSam Leffler { 66992ecbff4SSam Leffler return false; 67092ecbff4SSam Leffler } 67192ecbff4SSam Leffler #endif /* CONFIG_OF */ 67292ecbff4SSam Leffler 673bdcd8170SKalle Valo static int ath6kl_fetch_board_file(struct ath6kl *ar) 674bdcd8170SKalle Valo { 675bdcd8170SKalle Valo const char *filename; 676bdcd8170SKalle Valo int ret; 677bdcd8170SKalle Valo 678772c31eeSKalle Valo if (ar->fw_board != NULL) 679772c31eeSKalle Valo return 0; 680772c31eeSKalle Valo 681d1a9421dSKalle Valo if (WARN_ON(ar->hw.fw_board == NULL)) 682d1a9421dSKalle Valo return -EINVAL; 683d1a9421dSKalle Valo 684d1a9421dSKalle Valo filename = ar->hw.fw_board; 685bdcd8170SKalle Valo 686bdcd8170SKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 687bdcd8170SKalle Valo &ar->fw_board_len); 688bdcd8170SKalle Valo if (ret == 0) { 689bdcd8170SKalle Valo /* managed to get proper board file */ 690bdcd8170SKalle Valo return 0; 691bdcd8170SKalle Valo } 692bdcd8170SKalle Valo 69392ecbff4SSam Leffler if (check_device_tree(ar)) { 69492ecbff4SSam Leffler /* got board file from device tree */ 69592ecbff4SSam Leffler return 0; 69692ecbff4SSam Leffler } 69792ecbff4SSam Leffler 698bdcd8170SKalle Valo /* there was no proper board file, try to use default instead */ 699bdcd8170SKalle Valo ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 700bdcd8170SKalle Valo filename, ret); 701bdcd8170SKalle Valo 702d1a9421dSKalle Valo filename = ar->hw.fw_default_board; 703bdcd8170SKalle Valo 704bdcd8170SKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 705bdcd8170SKalle Valo &ar->fw_board_len); 706bdcd8170SKalle Valo if (ret) { 707bdcd8170SKalle Valo ath6kl_err("Failed to get default board file %s: %d\n", 708bdcd8170SKalle Valo filename, ret); 709bdcd8170SKalle Valo return ret; 710bdcd8170SKalle Valo } 711bdcd8170SKalle Valo 712bdcd8170SKalle Valo ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 713bdcd8170SKalle Valo ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 714bdcd8170SKalle Valo 715bdcd8170SKalle Valo return 0; 716bdcd8170SKalle Valo } 717bdcd8170SKalle Valo 718772c31eeSKalle Valo static int ath6kl_fetch_otp_file(struct ath6kl *ar) 719772c31eeSKalle Valo { 720772c31eeSKalle Valo const char *filename; 721772c31eeSKalle Valo int ret; 722772c31eeSKalle Valo 723772c31eeSKalle Valo if (ar->fw_otp != NULL) 724772c31eeSKalle Valo return 0; 725772c31eeSKalle Valo 726d1a9421dSKalle Valo if (ar->hw.fw_otp == NULL) { 727d1a9421dSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 728d1a9421dSKalle Valo "no OTP file configured for this hw\n"); 729772c31eeSKalle Valo return 0; 730772c31eeSKalle Valo } 731772c31eeSKalle Valo 732d1a9421dSKalle Valo filename = ar->hw.fw_otp; 733d1a9421dSKalle Valo 734772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 735772c31eeSKalle Valo &ar->fw_otp_len); 736772c31eeSKalle Valo if (ret) { 737772c31eeSKalle Valo ath6kl_err("Failed to get OTP file %s: %d\n", 738772c31eeSKalle Valo filename, ret); 739772c31eeSKalle Valo return ret; 740772c31eeSKalle Valo } 741772c31eeSKalle Valo 742772c31eeSKalle Valo return 0; 743772c31eeSKalle Valo } 744772c31eeSKalle Valo 745772c31eeSKalle Valo static int ath6kl_fetch_fw_file(struct ath6kl *ar) 746772c31eeSKalle Valo { 747772c31eeSKalle Valo const char *filename; 748772c31eeSKalle Valo int ret; 749772c31eeSKalle Valo 750772c31eeSKalle Valo if (ar->fw != NULL) 751772c31eeSKalle Valo return 0; 752772c31eeSKalle Valo 753772c31eeSKalle Valo if (testmode) { 754d1a9421dSKalle Valo if (ar->hw.fw_tcmd == NULL) { 755d1a9421dSKalle Valo ath6kl_warn("testmode not supported\n"); 756772c31eeSKalle Valo return -EOPNOTSUPP; 757772c31eeSKalle Valo } 758772c31eeSKalle Valo 759d1a9421dSKalle Valo filename = ar->hw.fw_tcmd; 760d1a9421dSKalle Valo 761772c31eeSKalle Valo set_bit(TESTMODE, &ar->flag); 762772c31eeSKalle Valo 763772c31eeSKalle Valo goto get_fw; 764772c31eeSKalle Valo } 765772c31eeSKalle Valo 766d1a9421dSKalle Valo if (WARN_ON(ar->hw.fw == NULL)) 767d1a9421dSKalle Valo return -EINVAL; 768d1a9421dSKalle Valo 769d1a9421dSKalle Valo filename = ar->hw.fw; 770772c31eeSKalle Valo 771772c31eeSKalle Valo get_fw: 772772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 773772c31eeSKalle Valo if (ret) { 774772c31eeSKalle Valo ath6kl_err("Failed to get firmware file %s: %d\n", 775772c31eeSKalle Valo filename, ret); 776772c31eeSKalle Valo return ret; 777772c31eeSKalle Valo } 778772c31eeSKalle Valo 779772c31eeSKalle Valo return 0; 780772c31eeSKalle Valo } 781772c31eeSKalle Valo 782772c31eeSKalle Valo static int ath6kl_fetch_patch_file(struct ath6kl *ar) 783772c31eeSKalle Valo { 784772c31eeSKalle Valo const char *filename; 785772c31eeSKalle Valo int ret; 786772c31eeSKalle Valo 787d1a9421dSKalle Valo if (ar->fw_patch != NULL) 788772c31eeSKalle Valo return 0; 789772c31eeSKalle Valo 790d1a9421dSKalle Valo if (ar->hw.fw_patch == NULL) 791d1a9421dSKalle Valo return 0; 792d1a9421dSKalle Valo 793d1a9421dSKalle Valo filename = ar->hw.fw_patch; 794d1a9421dSKalle Valo 795772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 796772c31eeSKalle Valo &ar->fw_patch_len); 797772c31eeSKalle Valo if (ret) { 798772c31eeSKalle Valo ath6kl_err("Failed to get patch file %s: %d\n", 799772c31eeSKalle Valo filename, ret); 800772c31eeSKalle Valo return ret; 801772c31eeSKalle Valo } 802772c31eeSKalle Valo 803772c31eeSKalle Valo return 0; 804772c31eeSKalle Valo } 805772c31eeSKalle Valo 80650d41234SKalle Valo static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 807772c31eeSKalle Valo { 808772c31eeSKalle Valo int ret; 809772c31eeSKalle Valo 810772c31eeSKalle Valo ret = ath6kl_fetch_otp_file(ar); 811772c31eeSKalle Valo if (ret) 812772c31eeSKalle Valo return ret; 813772c31eeSKalle Valo 814772c31eeSKalle Valo ret = ath6kl_fetch_fw_file(ar); 815772c31eeSKalle Valo if (ret) 816772c31eeSKalle Valo return ret; 817772c31eeSKalle Valo 818772c31eeSKalle Valo ret = ath6kl_fetch_patch_file(ar); 819772c31eeSKalle Valo if (ret) 820772c31eeSKalle Valo return ret; 821772c31eeSKalle Valo 822772c31eeSKalle Valo return 0; 823772c31eeSKalle Valo } 824bdcd8170SKalle Valo 82550d41234SKalle Valo static int ath6kl_fetch_fw_api2(struct ath6kl *ar) 82650d41234SKalle Valo { 82750d41234SKalle Valo size_t magic_len, len, ie_len; 82850d41234SKalle Valo const struct firmware *fw; 82950d41234SKalle Valo struct ath6kl_fw_ie *hdr; 83050d41234SKalle Valo const char *filename; 83150d41234SKalle Valo const u8 *data; 83297e0496dSKalle Valo int ret, ie_id, i, index, bit; 8338a137480SKalle Valo __le32 *val; 83450d41234SKalle Valo 835d1a9421dSKalle Valo if (ar->hw.fw_api2 == NULL) 83650d41234SKalle Valo return -EOPNOTSUPP; 837d1a9421dSKalle Valo 838d1a9421dSKalle Valo filename = ar->hw.fw_api2; 83950d41234SKalle Valo 84050d41234SKalle Valo ret = request_firmware(&fw, filename, ar->dev); 84150d41234SKalle Valo if (ret) 84250d41234SKalle Valo return ret; 84350d41234SKalle Valo 84450d41234SKalle Valo data = fw->data; 84550d41234SKalle Valo len = fw->size; 84650d41234SKalle Valo 84750d41234SKalle Valo /* magic also includes the null byte, check that as well */ 84850d41234SKalle Valo magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 84950d41234SKalle Valo 85050d41234SKalle Valo if (len < magic_len) { 85150d41234SKalle Valo ret = -EINVAL; 85250d41234SKalle Valo goto out; 85350d41234SKalle Valo } 85450d41234SKalle Valo 85550d41234SKalle Valo if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 85650d41234SKalle Valo ret = -EINVAL; 85750d41234SKalle Valo goto out; 85850d41234SKalle Valo } 85950d41234SKalle Valo 86050d41234SKalle Valo len -= magic_len; 86150d41234SKalle Valo data += magic_len; 86250d41234SKalle Valo 86350d41234SKalle Valo /* loop elements */ 86450d41234SKalle Valo while (len > sizeof(struct ath6kl_fw_ie)) { 86550d41234SKalle Valo /* hdr is unaligned! */ 86650d41234SKalle Valo hdr = (struct ath6kl_fw_ie *) data; 86750d41234SKalle Valo 86850d41234SKalle Valo ie_id = le32_to_cpup(&hdr->id); 86950d41234SKalle Valo ie_len = le32_to_cpup(&hdr->len); 87050d41234SKalle Valo 87150d41234SKalle Valo len -= sizeof(*hdr); 87250d41234SKalle Valo data += sizeof(*hdr); 87350d41234SKalle Valo 87450d41234SKalle Valo if (len < ie_len) { 87550d41234SKalle Valo ret = -EINVAL; 87650d41234SKalle Valo goto out; 87750d41234SKalle Valo } 87850d41234SKalle Valo 87950d41234SKalle Valo switch (ie_id) { 88050d41234SKalle Valo case ATH6KL_FW_IE_OTP_IMAGE: 881ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", 8826bc36431SKalle Valo ie_len); 8836bc36431SKalle Valo 88450d41234SKalle Valo ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 88550d41234SKalle Valo 88650d41234SKalle Valo if (ar->fw_otp == NULL) { 88750d41234SKalle Valo ret = -ENOMEM; 88850d41234SKalle Valo goto out; 88950d41234SKalle Valo } 89050d41234SKalle Valo 89150d41234SKalle Valo ar->fw_otp_len = ie_len; 89250d41234SKalle Valo break; 89350d41234SKalle Valo case ATH6KL_FW_IE_FW_IMAGE: 894ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", 8956bc36431SKalle Valo ie_len); 8966bc36431SKalle Valo 89750d41234SKalle Valo ar->fw = kmemdup(data, ie_len, GFP_KERNEL); 89850d41234SKalle Valo 89950d41234SKalle Valo if (ar->fw == NULL) { 90050d41234SKalle Valo ret = -ENOMEM; 90150d41234SKalle Valo goto out; 90250d41234SKalle Valo } 90350d41234SKalle Valo 90450d41234SKalle Valo ar->fw_len = ie_len; 90550d41234SKalle Valo break; 90650d41234SKalle Valo case ATH6KL_FW_IE_PATCH_IMAGE: 907ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", 9086bc36431SKalle Valo ie_len); 9096bc36431SKalle Valo 91050d41234SKalle Valo ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 91150d41234SKalle Valo 91250d41234SKalle Valo if (ar->fw_patch == NULL) { 91350d41234SKalle Valo ret = -ENOMEM; 91450d41234SKalle Valo goto out; 91550d41234SKalle Valo } 91650d41234SKalle Valo 91750d41234SKalle Valo ar->fw_patch_len = ie_len; 91850d41234SKalle Valo break; 9198a137480SKalle Valo case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 9208a137480SKalle Valo val = (__le32 *) data; 9218a137480SKalle Valo ar->hw.reserved_ram_size = le32_to_cpup(val); 9226bc36431SKalle Valo 9236bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 9246bc36431SKalle Valo "found reserved ram size ie 0x%d\n", 9256bc36431SKalle Valo ar->hw.reserved_ram_size); 9268a137480SKalle Valo break; 92797e0496dSKalle Valo case ATH6KL_FW_IE_CAPABILITIES: 9286bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 929ef548626SKalle Valo "found firmware capabilities ie (%zd B)\n", 9306bc36431SKalle Valo ie_len); 9316bc36431SKalle Valo 93297e0496dSKalle Valo for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 93397e0496dSKalle Valo index = ALIGN(i, 8) / 8; 93497e0496dSKalle Valo bit = i % 8; 93597e0496dSKalle Valo 93697e0496dSKalle Valo if (data[index] & (1 << bit)) 93797e0496dSKalle Valo __set_bit(i, ar->fw_capabilities); 93897e0496dSKalle Valo } 9396bc36431SKalle Valo 9406bc36431SKalle Valo ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 9416bc36431SKalle Valo ar->fw_capabilities, 9426bc36431SKalle Valo sizeof(ar->fw_capabilities)); 94397e0496dSKalle Valo break; 9441b4304daSKalle Valo case ATH6KL_FW_IE_PATCH_ADDR: 9451b4304daSKalle Valo if (ie_len != sizeof(*val)) 9461b4304daSKalle Valo break; 9471b4304daSKalle Valo 9481b4304daSKalle Valo val = (__le32 *) data; 9491b4304daSKalle Valo ar->hw.dataset_patch_addr = le32_to_cpup(val); 9506bc36431SKalle Valo 9516bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 95203ef0250SKalle Valo "found patch address ie 0x%x\n", 9536bc36431SKalle Valo ar->hw.dataset_patch_addr); 9541b4304daSKalle Valo break; 95503ef0250SKalle Valo case ATH6KL_FW_IE_BOARD_ADDR: 95603ef0250SKalle Valo if (ie_len != sizeof(*val)) 95703ef0250SKalle Valo break; 95803ef0250SKalle Valo 95903ef0250SKalle Valo val = (__le32 *) data; 96003ef0250SKalle Valo ar->hw.board_addr = le32_to_cpup(val); 96103ef0250SKalle Valo 96203ef0250SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 96303ef0250SKalle Valo "found board address ie 0x%x\n", 96403ef0250SKalle Valo ar->hw.board_addr); 96503ef0250SKalle Valo break; 966368b1b0fSKalle Valo case ATH6KL_FW_IE_VIF_MAX: 967368b1b0fSKalle Valo if (ie_len != sizeof(*val)) 968368b1b0fSKalle Valo break; 969368b1b0fSKalle Valo 970368b1b0fSKalle Valo val = (__le32 *) data; 971368b1b0fSKalle Valo ar->vif_max = min_t(unsigned int, le32_to_cpup(val), 972368b1b0fSKalle Valo ATH6KL_VIF_MAX); 973368b1b0fSKalle Valo 974368b1b0fSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 975368b1b0fSKalle Valo "found vif max ie %d\n", ar->vif_max); 976368b1b0fSKalle Valo break; 97750d41234SKalle Valo default: 9786bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 97950d41234SKalle Valo le32_to_cpup(&hdr->id)); 98050d41234SKalle Valo break; 98150d41234SKalle Valo } 98250d41234SKalle Valo 98350d41234SKalle Valo len -= ie_len; 98450d41234SKalle Valo data += ie_len; 98550d41234SKalle Valo }; 98650d41234SKalle Valo 98750d41234SKalle Valo ret = 0; 98850d41234SKalle Valo out: 98950d41234SKalle Valo release_firmware(fw); 99050d41234SKalle Valo 99150d41234SKalle Valo return ret; 99250d41234SKalle Valo } 99350d41234SKalle Valo 99450d41234SKalle Valo static int ath6kl_fetch_firmwares(struct ath6kl *ar) 99550d41234SKalle Valo { 99650d41234SKalle Valo int ret; 99750d41234SKalle Valo 99850d41234SKalle Valo ret = ath6kl_fetch_board_file(ar); 99950d41234SKalle Valo if (ret) 100050d41234SKalle Valo return ret; 100150d41234SKalle Valo 100250d41234SKalle Valo ret = ath6kl_fetch_fw_api2(ar); 10036bc36431SKalle Valo if (ret == 0) { 10046bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n"); 100550d41234SKalle Valo return 0; 10066bc36431SKalle Valo } 100750d41234SKalle Valo 100850d41234SKalle Valo ret = ath6kl_fetch_fw_api1(ar); 100950d41234SKalle Valo if (ret) 101050d41234SKalle Valo return ret; 101150d41234SKalle Valo 10126bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n"); 10136bc36431SKalle Valo 101450d41234SKalle Valo return 0; 101550d41234SKalle Valo } 101650d41234SKalle Valo 1017bdcd8170SKalle Valo static int ath6kl_upload_board_file(struct ath6kl *ar) 1018bdcd8170SKalle Valo { 1019bdcd8170SKalle Valo u32 board_address, board_ext_address, param; 102031024d99SKevin Fang u32 board_data_size, board_ext_data_size; 1021bdcd8170SKalle Valo int ret; 1022bdcd8170SKalle Valo 1023772c31eeSKalle Valo if (WARN_ON(ar->fw_board == NULL)) 1024772c31eeSKalle Valo return -ENOENT; 1025bdcd8170SKalle Valo 102631024d99SKevin Fang /* 102731024d99SKevin Fang * Determine where in Target RAM to write Board Data. 102831024d99SKevin Fang * For AR6004, host determine Target RAM address for 102931024d99SKevin Fang * writing board data. 103031024d99SKevin Fang */ 10310d4d72bfSKalle Valo if (ar->hw.board_addr != 0) { 10320d4d72bfSKalle Valo board_address = ar->hw.board_addr; 103331024d99SKevin Fang ath6kl_bmi_write(ar, 103431024d99SKevin Fang ath6kl_get_hi_item_addr(ar, 103531024d99SKevin Fang HI_ITEM(hi_board_data)), 103631024d99SKevin Fang (u8 *) &board_address, 4); 103731024d99SKevin Fang } else { 1038bdcd8170SKalle Valo ath6kl_bmi_read(ar, 1039bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1040bdcd8170SKalle Valo HI_ITEM(hi_board_data)), 1041bdcd8170SKalle Valo (u8 *) &board_address, 4); 104231024d99SKevin Fang } 104331024d99SKevin Fang 1044bdcd8170SKalle Valo /* determine where in target ram to write extended board data */ 1045bdcd8170SKalle Valo ath6kl_bmi_read(ar, 1046bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1047bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data)), 1048bdcd8170SKalle Valo (u8 *) &board_ext_address, 4); 1049bdcd8170SKalle Valo 105050e2740bSKalle Valo if (ar->target_type == TARGET_TYPE_AR6003 && 105150e2740bSKalle Valo board_ext_address == 0) { 1052bdcd8170SKalle Valo ath6kl_err("Failed to get board file target address.\n"); 1053bdcd8170SKalle Valo return -EINVAL; 1054bdcd8170SKalle Valo } 1055bdcd8170SKalle Valo 105631024d99SKevin Fang switch (ar->target_type) { 105731024d99SKevin Fang case TARGET_TYPE_AR6003: 105831024d99SKevin Fang board_data_size = AR6003_BOARD_DATA_SZ; 105931024d99SKevin Fang board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 106031024d99SKevin Fang break; 106131024d99SKevin Fang case TARGET_TYPE_AR6004: 106231024d99SKevin Fang board_data_size = AR6004_BOARD_DATA_SZ; 106331024d99SKevin Fang board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 106431024d99SKevin Fang break; 106531024d99SKevin Fang default: 106631024d99SKevin Fang WARN_ON(1); 106731024d99SKevin Fang return -EINVAL; 106831024d99SKevin Fang break; 106931024d99SKevin Fang } 107031024d99SKevin Fang 107150e2740bSKalle Valo if (board_ext_address && 107250e2740bSKalle Valo ar->fw_board_len == (board_data_size + board_ext_data_size)) { 107331024d99SKevin Fang 1074bdcd8170SKalle Valo /* write extended board data */ 10756bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 10766bc36431SKalle Valo "writing extended board data to 0x%x (%d B)\n", 10776bc36431SKalle Valo board_ext_address, board_ext_data_size); 10786bc36431SKalle Valo 1079bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, board_ext_address, 108031024d99SKevin Fang ar->fw_board + board_data_size, 108131024d99SKevin Fang board_ext_data_size); 1082bdcd8170SKalle Valo if (ret) { 1083bdcd8170SKalle Valo ath6kl_err("Failed to write extended board data: %d\n", 1084bdcd8170SKalle Valo ret); 1085bdcd8170SKalle Valo return ret; 1086bdcd8170SKalle Valo } 1087bdcd8170SKalle Valo 1088bdcd8170SKalle Valo /* record that extended board data is initialized */ 108931024d99SKevin Fang param = (board_ext_data_size << 16) | 1; 109031024d99SKevin Fang 1091bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1092bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1093bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data_config)), 1094bdcd8170SKalle Valo (unsigned char *) ¶m, 4); 1095bdcd8170SKalle Valo } 1096bdcd8170SKalle Valo 109731024d99SKevin Fang if (ar->fw_board_len < board_data_size) { 1098bdcd8170SKalle Valo ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1099bdcd8170SKalle Valo ret = -EINVAL; 1100bdcd8170SKalle Valo return ret; 1101bdcd8170SKalle Valo } 1102bdcd8170SKalle Valo 11036bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 11046bc36431SKalle Valo board_address, board_data_size); 11056bc36431SKalle Valo 1106bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 110731024d99SKevin Fang board_data_size); 1108bdcd8170SKalle Valo 1109bdcd8170SKalle Valo if (ret) { 1110bdcd8170SKalle Valo ath6kl_err("Board file bmi write failed: %d\n", ret); 1111bdcd8170SKalle Valo return ret; 1112bdcd8170SKalle Valo } 1113bdcd8170SKalle Valo 1114bdcd8170SKalle Valo /* record the fact that Board Data IS initialized */ 1115bdcd8170SKalle Valo param = 1; 1116bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1117bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1118bdcd8170SKalle Valo HI_ITEM(hi_board_data_initialized)), 1119bdcd8170SKalle Valo (u8 *)¶m, 4); 1120bdcd8170SKalle Valo 1121bdcd8170SKalle Valo return ret; 1122bdcd8170SKalle Valo } 1123bdcd8170SKalle Valo 1124bdcd8170SKalle Valo static int ath6kl_upload_otp(struct ath6kl *ar) 1125bdcd8170SKalle Valo { 1126bdcd8170SKalle Valo u32 address, param; 1127bef26a7fSKalle Valo bool from_hw = false; 1128bdcd8170SKalle Valo int ret; 1129bdcd8170SKalle Valo 113050e2740bSKalle Valo if (ar->fw_otp == NULL) 113150e2740bSKalle Valo return 0; 1132bdcd8170SKalle Valo 1133a01ac414SKalle Valo address = ar->hw.app_load_addr; 1134bdcd8170SKalle Valo 1135ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, 11366bc36431SKalle Valo ar->fw_otp_len); 11376bc36431SKalle Valo 1138bdcd8170SKalle Valo ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1139bdcd8170SKalle Valo ar->fw_otp_len); 1140bdcd8170SKalle Valo if (ret) { 1141bdcd8170SKalle Valo ath6kl_err("Failed to upload OTP file: %d\n", ret); 1142bdcd8170SKalle Valo return ret; 1143bdcd8170SKalle Valo } 1144bdcd8170SKalle Valo 1145639d0b89SKalle Valo /* read firmware start address */ 1146639d0b89SKalle Valo ret = ath6kl_bmi_read(ar, 1147639d0b89SKalle Valo ath6kl_get_hi_item_addr(ar, 1148639d0b89SKalle Valo HI_ITEM(hi_app_start)), 1149639d0b89SKalle Valo (u8 *) &address, sizeof(address)); 1150639d0b89SKalle Valo 1151639d0b89SKalle Valo if (ret) { 1152639d0b89SKalle Valo ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1153639d0b89SKalle Valo return ret; 1154639d0b89SKalle Valo } 1155639d0b89SKalle Valo 1156bef26a7fSKalle Valo if (ar->hw.app_start_override_addr == 0) { 1157639d0b89SKalle Valo ar->hw.app_start_override_addr = address; 1158bef26a7fSKalle Valo from_hw = true; 1159bef26a7fSKalle Valo } 1160639d0b89SKalle Valo 1161bef26a7fSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", 1162bef26a7fSKalle Valo from_hw ? " (from hw)" : "", 11636bc36431SKalle Valo ar->hw.app_start_override_addr); 11646bc36431SKalle Valo 1165bdcd8170SKalle Valo /* execute the OTP code */ 1166bef26a7fSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", 1167bef26a7fSKalle Valo ar->hw.app_start_override_addr); 1168bdcd8170SKalle Valo param = 0; 1169bef26a7fSKalle Valo ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); 1170bdcd8170SKalle Valo 1171bdcd8170SKalle Valo return ret; 1172bdcd8170SKalle Valo } 1173bdcd8170SKalle Valo 1174bdcd8170SKalle Valo static int ath6kl_upload_firmware(struct ath6kl *ar) 1175bdcd8170SKalle Valo { 1176bdcd8170SKalle Valo u32 address; 1177bdcd8170SKalle Valo int ret; 1178bdcd8170SKalle Valo 1179772c31eeSKalle Valo if (WARN_ON(ar->fw == NULL)) 118050e2740bSKalle Valo return 0; 1181bdcd8170SKalle Valo 1182a01ac414SKalle Valo address = ar->hw.app_load_addr; 1183bdcd8170SKalle Valo 1184ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", 11856bc36431SKalle Valo address, ar->fw_len); 11866bc36431SKalle Valo 1187bdcd8170SKalle Valo ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1188bdcd8170SKalle Valo 1189bdcd8170SKalle Valo if (ret) { 1190bdcd8170SKalle Valo ath6kl_err("Failed to write firmware: %d\n", ret); 1191bdcd8170SKalle Valo return ret; 1192bdcd8170SKalle Valo } 1193bdcd8170SKalle Valo 119431024d99SKevin Fang /* 119531024d99SKevin Fang * Set starting address for firmware 119631024d99SKevin Fang * Don't need to setup app_start override addr on AR6004 119731024d99SKevin Fang */ 119831024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6004) { 1199a01ac414SKalle Valo address = ar->hw.app_start_override_addr; 1200bdcd8170SKalle Valo ath6kl_bmi_set_app_start(ar, address); 120131024d99SKevin Fang } 1202bdcd8170SKalle Valo return ret; 1203bdcd8170SKalle Valo } 1204bdcd8170SKalle Valo 1205bdcd8170SKalle Valo static int ath6kl_upload_patch(struct ath6kl *ar) 1206bdcd8170SKalle Valo { 1207bdcd8170SKalle Valo u32 address, param; 1208bdcd8170SKalle Valo int ret; 1209bdcd8170SKalle Valo 121050e2740bSKalle Valo if (ar->fw_patch == NULL) 121150e2740bSKalle Valo return 0; 1212bdcd8170SKalle Valo 1213a01ac414SKalle Valo address = ar->hw.dataset_patch_addr; 1214bdcd8170SKalle Valo 1215ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", 12166bc36431SKalle Valo address, ar->fw_patch_len); 12176bc36431SKalle Valo 1218bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1219bdcd8170SKalle Valo if (ret) { 1220bdcd8170SKalle Valo ath6kl_err("Failed to write patch file: %d\n", ret); 1221bdcd8170SKalle Valo return ret; 1222bdcd8170SKalle Valo } 1223bdcd8170SKalle Valo 1224bdcd8170SKalle Valo param = address; 1225bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1226bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1227bdcd8170SKalle Valo HI_ITEM(hi_dset_list_head)), 1228bdcd8170SKalle Valo (unsigned char *) ¶m, 4); 1229bdcd8170SKalle Valo 1230bdcd8170SKalle Valo return 0; 1231bdcd8170SKalle Valo } 1232bdcd8170SKalle Valo 1233bdcd8170SKalle Valo static int ath6kl_init_upload(struct ath6kl *ar) 1234bdcd8170SKalle Valo { 1235bdcd8170SKalle Valo u32 param, options, sleep, address; 1236bdcd8170SKalle Valo int status = 0; 1237bdcd8170SKalle Valo 123831024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6003 && 123931024d99SKevin Fang ar->target_type != TARGET_TYPE_AR6004) 1240bdcd8170SKalle Valo return -EINVAL; 1241bdcd8170SKalle Valo 1242bdcd8170SKalle Valo /* temporarily disable system sleep */ 1243bdcd8170SKalle Valo address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1244bdcd8170SKalle Valo status = ath6kl_bmi_reg_read(ar, address, ¶m); 1245bdcd8170SKalle Valo if (status) 1246bdcd8170SKalle Valo return status; 1247bdcd8170SKalle Valo 1248bdcd8170SKalle Valo options = param; 1249bdcd8170SKalle Valo 1250bdcd8170SKalle Valo param |= ATH6KL_OPTION_SLEEP_DISABLE; 1251bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1252bdcd8170SKalle Valo if (status) 1253bdcd8170SKalle Valo return status; 1254bdcd8170SKalle Valo 1255bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1256bdcd8170SKalle Valo status = ath6kl_bmi_reg_read(ar, address, ¶m); 1257bdcd8170SKalle Valo if (status) 1258bdcd8170SKalle Valo return status; 1259bdcd8170SKalle Valo 1260bdcd8170SKalle Valo sleep = param; 1261bdcd8170SKalle Valo 1262bdcd8170SKalle Valo param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1263bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1264bdcd8170SKalle Valo if (status) 1265bdcd8170SKalle Valo return status; 1266bdcd8170SKalle Valo 1267bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1268bdcd8170SKalle Valo options, sleep); 1269bdcd8170SKalle Valo 1270bdcd8170SKalle Valo /* program analog PLL register */ 127131024d99SKevin Fang /* no need to control 40/44MHz clock on AR6004 */ 127231024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6004) { 1273bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1274bdcd8170SKalle Valo 0xF9104001); 127531024d99SKevin Fang 1276bdcd8170SKalle Valo if (status) 1277bdcd8170SKalle Valo return status; 1278bdcd8170SKalle Valo 1279bdcd8170SKalle Valo /* Run at 80/88MHz by default */ 1280bdcd8170SKalle Valo param = SM(CPU_CLOCK_STANDARD, 1); 1281bdcd8170SKalle Valo 1282bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1283bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1284bdcd8170SKalle Valo if (status) 1285bdcd8170SKalle Valo return status; 128631024d99SKevin Fang } 1287bdcd8170SKalle Valo 1288bdcd8170SKalle Valo param = 0; 1289bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1290bdcd8170SKalle Valo param = SM(LPO_CAL_ENABLE, 1); 1291bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1292bdcd8170SKalle Valo if (status) 1293bdcd8170SKalle Valo return status; 1294bdcd8170SKalle Valo 1295bdcd8170SKalle Valo /* WAR to avoid SDIO CRC err */ 12960d0192baSKalle Valo if (ar->version.target_ver == AR6003_HW_2_0_VERSION) { 1297bdcd8170SKalle Valo ath6kl_err("temporary war to avoid sdio crc error\n"); 1298bdcd8170SKalle Valo 1299bdcd8170SKalle Valo param = 0x20; 1300bdcd8170SKalle Valo 1301bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1302bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1303bdcd8170SKalle Valo if (status) 1304bdcd8170SKalle Valo return status; 1305bdcd8170SKalle Valo 1306bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1307bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1308bdcd8170SKalle Valo if (status) 1309bdcd8170SKalle Valo return status; 1310bdcd8170SKalle Valo 1311bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1312bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1313bdcd8170SKalle Valo if (status) 1314bdcd8170SKalle Valo return status; 1315bdcd8170SKalle Valo 1316bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1317bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1318bdcd8170SKalle Valo if (status) 1319bdcd8170SKalle Valo return status; 1320bdcd8170SKalle Valo } 1321bdcd8170SKalle Valo 1322bdcd8170SKalle Valo /* write EEPROM data to Target RAM */ 1323bdcd8170SKalle Valo status = ath6kl_upload_board_file(ar); 1324bdcd8170SKalle Valo if (status) 1325bdcd8170SKalle Valo return status; 1326bdcd8170SKalle Valo 1327bdcd8170SKalle Valo /* transfer One time Programmable data */ 1328bdcd8170SKalle Valo status = ath6kl_upload_otp(ar); 1329bdcd8170SKalle Valo if (status) 1330bdcd8170SKalle Valo return status; 1331bdcd8170SKalle Valo 1332bdcd8170SKalle Valo /* Download Target firmware */ 1333bdcd8170SKalle Valo status = ath6kl_upload_firmware(ar); 1334bdcd8170SKalle Valo if (status) 1335bdcd8170SKalle Valo return status; 1336bdcd8170SKalle Valo 1337bdcd8170SKalle Valo status = ath6kl_upload_patch(ar); 1338bdcd8170SKalle Valo if (status) 1339bdcd8170SKalle Valo return status; 1340bdcd8170SKalle Valo 1341bdcd8170SKalle Valo /* Restore system sleep */ 1342bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1343bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, sleep); 1344bdcd8170SKalle Valo if (status) 1345bdcd8170SKalle Valo return status; 1346bdcd8170SKalle Valo 1347bdcd8170SKalle Valo address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1348bdcd8170SKalle Valo param = options | 0x20; 1349bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1350bdcd8170SKalle Valo if (status) 1351bdcd8170SKalle Valo return status; 1352bdcd8170SKalle Valo 1353bdcd8170SKalle Valo /* Configure GPIO AR6003 UART */ 1354bdcd8170SKalle Valo param = CONFIG_AR600x_DEBUG_UART_TX_PIN; 1355bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 1356bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1357bdcd8170SKalle Valo HI_ITEM(hi_dbg_uart_txpin)), 1358bdcd8170SKalle Valo (u8 *)¶m, 4); 1359bdcd8170SKalle Valo 1360bdcd8170SKalle Valo return status; 1361bdcd8170SKalle Valo } 1362bdcd8170SKalle Valo 1363a01ac414SKalle Valo static int ath6kl_init_hw_params(struct ath6kl *ar) 1364a01ac414SKalle Valo { 1365856f4b31SKalle Valo const struct ath6kl_hw *hw; 1366856f4b31SKalle Valo int i; 1367bef26a7fSKalle Valo 1368856f4b31SKalle Valo for (i = 0; i < ARRAY_SIZE(hw_list); i++) { 1369856f4b31SKalle Valo hw = &hw_list[i]; 1370bef26a7fSKalle Valo 1371856f4b31SKalle Valo if (hw->id == ar->version.target_ver) 1372a01ac414SKalle Valo break; 1373856f4b31SKalle Valo } 1374856f4b31SKalle Valo 1375856f4b31SKalle Valo if (i == ARRAY_SIZE(hw_list)) { 1376a01ac414SKalle Valo ath6kl_err("Unsupported hardware version: 0x%x\n", 1377a01ac414SKalle Valo ar->version.target_ver); 1378a01ac414SKalle Valo return -EINVAL; 1379a01ac414SKalle Valo } 1380a01ac414SKalle Valo 1381856f4b31SKalle Valo ar->hw = *hw; 1382856f4b31SKalle Valo 13836bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 13846bc36431SKalle Valo "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 13856bc36431SKalle Valo ar->version.target_ver, ar->target_type, 13866bc36431SKalle Valo ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 13876bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 13886bc36431SKalle Valo "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 13896bc36431SKalle Valo ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 13906bc36431SKalle Valo ar->hw.reserved_ram_size); 13916bc36431SKalle Valo 1392a01ac414SKalle Valo return 0; 1393a01ac414SKalle Valo } 1394a01ac414SKalle Valo 1395293badf4SKalle Valo static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type) 1396293badf4SKalle Valo { 1397293badf4SKalle Valo switch (type) { 1398293badf4SKalle Valo case ATH6KL_HIF_TYPE_SDIO: 1399293badf4SKalle Valo return "sdio"; 1400293badf4SKalle Valo case ATH6KL_HIF_TYPE_USB: 1401293badf4SKalle Valo return "usb"; 1402293badf4SKalle Valo } 1403293badf4SKalle Valo 1404293badf4SKalle Valo return NULL; 1405293badf4SKalle Valo } 1406293badf4SKalle Valo 14075fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar) 140820459ee2SKalle Valo { 140920459ee2SKalle Valo long timeleft; 141020459ee2SKalle Valo int ret, i; 141120459ee2SKalle Valo 14125fe4dffbSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); 14135fe4dffbSKalle Valo 141420459ee2SKalle Valo ret = ath6kl_hif_power_on(ar); 141520459ee2SKalle Valo if (ret) 141620459ee2SKalle Valo return ret; 141720459ee2SKalle Valo 141820459ee2SKalle Valo ret = ath6kl_configure_target(ar); 141920459ee2SKalle Valo if (ret) 142020459ee2SKalle Valo goto err_power_off; 142120459ee2SKalle Valo 142220459ee2SKalle Valo ret = ath6kl_init_upload(ar); 142320459ee2SKalle Valo if (ret) 142420459ee2SKalle Valo goto err_power_off; 142520459ee2SKalle Valo 142620459ee2SKalle Valo /* Do we need to finish the BMI phase */ 142720459ee2SKalle Valo /* FIXME: return error from ath6kl_bmi_done() */ 142820459ee2SKalle Valo if (ath6kl_bmi_done(ar)) { 142920459ee2SKalle Valo ret = -EIO; 143020459ee2SKalle Valo goto err_power_off; 143120459ee2SKalle Valo } 143220459ee2SKalle Valo 143320459ee2SKalle Valo /* 143420459ee2SKalle Valo * The reason we have to wait for the target here is that the 143520459ee2SKalle Valo * driver layer has to init BMI in order to set the host block 143620459ee2SKalle Valo * size. 143720459ee2SKalle Valo */ 143820459ee2SKalle Valo if (ath6kl_htc_wait_target(ar->htc_target)) { 143920459ee2SKalle Valo ret = -EIO; 144020459ee2SKalle Valo goto err_power_off; 144120459ee2SKalle Valo } 144220459ee2SKalle Valo 144320459ee2SKalle Valo if (ath6kl_init_service_ep(ar)) { 144420459ee2SKalle Valo ret = -EIO; 144520459ee2SKalle Valo goto err_cleanup_scatter; 144620459ee2SKalle Valo } 144720459ee2SKalle Valo 144820459ee2SKalle Valo /* setup credit distribution */ 144920459ee2SKalle Valo ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info); 145020459ee2SKalle Valo 145120459ee2SKalle Valo /* start HTC */ 145220459ee2SKalle Valo ret = ath6kl_htc_start(ar->htc_target); 145320459ee2SKalle Valo if (ret) { 145420459ee2SKalle Valo /* FIXME: call this */ 145520459ee2SKalle Valo ath6kl_cookie_cleanup(ar); 145620459ee2SKalle Valo goto err_cleanup_scatter; 145720459ee2SKalle Valo } 145820459ee2SKalle Valo 145920459ee2SKalle Valo /* Wait for Wmi event to be ready */ 146020459ee2SKalle Valo timeleft = wait_event_interruptible_timeout(ar->event_wq, 146120459ee2SKalle Valo test_bit(WMI_READY, 146220459ee2SKalle Valo &ar->flag), 146320459ee2SKalle Valo WMI_TIMEOUT); 146420459ee2SKalle Valo 146520459ee2SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 146620459ee2SKalle Valo 1467293badf4SKalle Valo 1468293badf4SKalle Valo if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) { 1469293badf4SKalle Valo ath6kl_info("%s %s fw %s%s\n", 1470293badf4SKalle Valo ar->hw.name, 1471293badf4SKalle Valo ath6kl_init_get_hif_name(ar->hif_type), 1472293badf4SKalle Valo ar->wiphy->fw_version, 1473293badf4SKalle Valo test_bit(TESTMODE, &ar->flag) ? " testmode" : ""); 1474293badf4SKalle Valo } 1475293badf4SKalle Valo 147620459ee2SKalle Valo if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 147720459ee2SKalle Valo ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 147820459ee2SKalle Valo ATH6KL_ABI_VERSION, ar->version.abi_ver); 147920459ee2SKalle Valo ret = -EIO; 148020459ee2SKalle Valo goto err_htc_stop; 148120459ee2SKalle Valo } 148220459ee2SKalle Valo 148320459ee2SKalle Valo if (!timeleft || signal_pending(current)) { 148420459ee2SKalle Valo ath6kl_err("wmi is not ready or wait was interrupted\n"); 148520459ee2SKalle Valo ret = -EIO; 148620459ee2SKalle Valo goto err_htc_stop; 148720459ee2SKalle Valo } 148820459ee2SKalle Valo 148920459ee2SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 149020459ee2SKalle Valo 149120459ee2SKalle Valo /* communicate the wmi protocol verision to the target */ 149220459ee2SKalle Valo /* FIXME: return error */ 149320459ee2SKalle Valo if ((ath6kl_set_host_app_area(ar)) != 0) 149420459ee2SKalle Valo ath6kl_err("unable to set the host app area\n"); 149520459ee2SKalle Valo 149671f96ee6SKalle Valo for (i = 0; i < ar->vif_max; i++) { 149720459ee2SKalle Valo ret = ath6kl_target_config_wlan_params(ar, i); 149820459ee2SKalle Valo if (ret) 149920459ee2SKalle Valo goto err_htc_stop; 150020459ee2SKalle Valo } 150120459ee2SKalle Valo 150276a9fbe2SKalle Valo ar->state = ATH6KL_STATE_ON; 150376a9fbe2SKalle Valo 150420459ee2SKalle Valo return 0; 150520459ee2SKalle Valo 150620459ee2SKalle Valo err_htc_stop: 150720459ee2SKalle Valo ath6kl_htc_stop(ar->htc_target); 150820459ee2SKalle Valo err_cleanup_scatter: 150920459ee2SKalle Valo ath6kl_hif_cleanup_scatter(ar); 151020459ee2SKalle Valo err_power_off: 151120459ee2SKalle Valo ath6kl_hif_power_off(ar); 151220459ee2SKalle Valo 151320459ee2SKalle Valo return ret; 151420459ee2SKalle Valo } 151520459ee2SKalle Valo 15165fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar) 15175fe4dffbSKalle Valo { 15185fe4dffbSKalle Valo int ret; 15195fe4dffbSKalle Valo 15205fe4dffbSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); 15215fe4dffbSKalle Valo 15225fe4dffbSKalle Valo ath6kl_htc_stop(ar->htc_target); 15235fe4dffbSKalle Valo 15245fe4dffbSKalle Valo ath6kl_hif_stop(ar); 15255fe4dffbSKalle Valo 15265fe4dffbSKalle Valo ath6kl_bmi_reset(ar); 15275fe4dffbSKalle Valo 15285fe4dffbSKalle Valo ret = ath6kl_hif_power_off(ar); 15295fe4dffbSKalle Valo if (ret) 15305fe4dffbSKalle Valo ath6kl_warn("failed to power off hif: %d\n", ret); 15315fe4dffbSKalle Valo 153276a9fbe2SKalle Valo ar->state = ATH6KL_STATE_OFF; 153376a9fbe2SKalle Valo 15345fe4dffbSKalle Valo return 0; 15355fe4dffbSKalle Valo } 15365fe4dffbSKalle Valo 1537bdcd8170SKalle Valo int ath6kl_core_init(struct ath6kl *ar) 1538bdcd8170SKalle Valo { 1539bdcd8170SKalle Valo struct ath6kl_bmi_target_info targ_info; 154061448a93SKalle Valo struct net_device *ndev; 154120459ee2SKalle Valo int ret = 0, i; 1542bdcd8170SKalle Valo 1543bdcd8170SKalle Valo ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); 1544bdcd8170SKalle Valo if (!ar->ath6kl_wq) 1545bdcd8170SKalle Valo return -ENOMEM; 1546bdcd8170SKalle Valo 1547bdcd8170SKalle Valo ret = ath6kl_bmi_init(ar); 1548bdcd8170SKalle Valo if (ret) 1549bdcd8170SKalle Valo goto err_wq; 1550bdcd8170SKalle Valo 155120459ee2SKalle Valo /* 155220459ee2SKalle Valo * Turn on power to get hardware (target) version and leave power 155320459ee2SKalle Valo * on delibrately as we will boot the hardware anyway within few 155420459ee2SKalle Valo * seconds. 155520459ee2SKalle Valo */ 1556b2e75698SKalle Valo ret = ath6kl_hif_power_on(ar); 1557bdcd8170SKalle Valo if (ret) 1558bdcd8170SKalle Valo goto err_bmi_cleanup; 1559bdcd8170SKalle Valo 1560b2e75698SKalle Valo ret = ath6kl_bmi_get_target_info(ar, &targ_info); 1561b2e75698SKalle Valo if (ret) 1562b2e75698SKalle Valo goto err_power_off; 1563b2e75698SKalle Valo 1564bdcd8170SKalle Valo ar->version.target_ver = le32_to_cpu(targ_info.version); 1565bdcd8170SKalle Valo ar->target_type = le32_to_cpu(targ_info.type); 1566be98e3a4SVasanthakumar Thiagarajan ar->wiphy->hw_version = le32_to_cpu(targ_info.version); 1567bdcd8170SKalle Valo 1568a01ac414SKalle Valo ret = ath6kl_init_hw_params(ar); 1569a01ac414SKalle Valo if (ret) 1570b2e75698SKalle Valo goto err_power_off; 1571a01ac414SKalle Valo 1572ad226ec2SKalle Valo ar->htc_target = ath6kl_htc_create(ar); 1573bdcd8170SKalle Valo 1574bdcd8170SKalle Valo if (!ar->htc_target) { 1575bdcd8170SKalle Valo ret = -ENOMEM; 1576b2e75698SKalle Valo goto err_power_off; 1577bdcd8170SKalle Valo } 1578bdcd8170SKalle Valo 1579772c31eeSKalle Valo ret = ath6kl_fetch_firmwares(ar); 1580772c31eeSKalle Valo if (ret) 1581772c31eeSKalle Valo goto err_htc_cleanup; 1582772c31eeSKalle Valo 158361448a93SKalle Valo /* FIXME: we should free all firmwares in the error cases below */ 158461448a93SKalle Valo 158561448a93SKalle Valo /* Indicate that WMI is enabled (although not ready yet) */ 158661448a93SKalle Valo set_bit(WMI_ENABLED, &ar->flag); 158761448a93SKalle Valo ar->wmi = ath6kl_wmi_init(ar); 158861448a93SKalle Valo if (!ar->wmi) { 158961448a93SKalle Valo ath6kl_err("failed to initialize wmi\n"); 159061448a93SKalle Valo ret = -EIO; 159161448a93SKalle Valo goto err_htc_cleanup; 159261448a93SKalle Valo } 159361448a93SKalle Valo 159461448a93SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); 159561448a93SKalle Valo 159661448a93SKalle Valo ret = ath6kl_register_ieee80211_hw(ar); 159761448a93SKalle Valo if (ret) 159861448a93SKalle Valo goto err_node_cleanup; 159961448a93SKalle Valo 160061448a93SKalle Valo ret = ath6kl_debug_init(ar); 160161448a93SKalle Valo if (ret) { 160261448a93SKalle Valo wiphy_unregister(ar->wiphy); 160361448a93SKalle Valo goto err_node_cleanup; 160461448a93SKalle Valo } 160561448a93SKalle Valo 160671f96ee6SKalle Valo for (i = 0; i < ar->vif_max; i++) 160761448a93SKalle Valo ar->avail_idx_map |= BIT(i); 160861448a93SKalle Valo 160961448a93SKalle Valo rtnl_lock(); 161061448a93SKalle Valo 161161448a93SKalle Valo /* Add an initial station interface */ 161261448a93SKalle Valo ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0, 161361448a93SKalle Valo INFRA_NETWORK); 161461448a93SKalle Valo 161561448a93SKalle Valo rtnl_unlock(); 161661448a93SKalle Valo 161761448a93SKalle Valo if (!ndev) { 161861448a93SKalle Valo ath6kl_err("Failed to instantiate a network device\n"); 161961448a93SKalle Valo ret = -ENOMEM; 162061448a93SKalle Valo wiphy_unregister(ar->wiphy); 162161448a93SKalle Valo goto err_debug_init; 162261448a93SKalle Valo } 162361448a93SKalle Valo 162461448a93SKalle Valo 162561448a93SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", 162661448a93SKalle Valo __func__, ndev->name, ndev, ar); 162761448a93SKalle Valo 162861448a93SKalle Valo /* setup access class priority mappings */ 162961448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ 163061448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_BE] = 1; 163161448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_VI] = 2; 163261448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ 163361448a93SKalle Valo 163461448a93SKalle Valo /* give our connected endpoints some buffers */ 163561448a93SKalle Valo ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); 163661448a93SKalle Valo ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); 163761448a93SKalle Valo 163861448a93SKalle Valo /* allocate some buffers that handle larger AMSDU frames */ 163961448a93SKalle Valo ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); 164061448a93SKalle Valo 164161448a93SKalle Valo ath6kl_cookie_init(ar); 164261448a93SKalle Valo 164361448a93SKalle Valo ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | 164461448a93SKalle Valo ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; 164561448a93SKalle Valo 16468277de15SKalle Valo if (suspend_cutpower) 16478277de15SKalle Valo ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER; 16488277de15SKalle Valo 164961448a93SKalle Valo ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM | 165061448a93SKalle Valo WIPHY_FLAG_HAVE_AP_SME; 165161448a93SKalle Valo 16525fe4dffbSKalle Valo set_bit(FIRST_BOOT, &ar->flag); 16535fe4dffbSKalle Valo 16545fe4dffbSKalle Valo ret = ath6kl_init_hw_start(ar); 165520459ee2SKalle Valo if (ret) { 16565fe4dffbSKalle Valo ath6kl_err("Failed to start hardware: %d\n", ret); 165720459ee2SKalle Valo goto err_rxbuf_cleanup; 165861448a93SKalle Valo } 165961448a93SKalle Valo 166061448a93SKalle Valo /* 166161448a93SKalle Valo * Set mac address which is received in ready event 166261448a93SKalle Valo * FIXME: Move to ath6kl_interface_add() 166361448a93SKalle Valo */ 166461448a93SKalle Valo memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN); 1665bdcd8170SKalle Valo 1666bdcd8170SKalle Valo return ret; 1667bdcd8170SKalle Valo 166861448a93SKalle Valo err_rxbuf_cleanup: 166961448a93SKalle Valo ath6kl_htc_flush_rx_buf(ar->htc_target); 167061448a93SKalle Valo ath6kl_cleanup_amsdu_rxbufs(ar); 167161448a93SKalle Valo rtnl_lock(); 167261448a93SKalle Valo ath6kl_deinit_if_data(netdev_priv(ndev)); 167361448a93SKalle Valo rtnl_unlock(); 167461448a93SKalle Valo wiphy_unregister(ar->wiphy); 167561448a93SKalle Valo err_debug_init: 167661448a93SKalle Valo ath6kl_debug_cleanup(ar); 167761448a93SKalle Valo err_node_cleanup: 167861448a93SKalle Valo ath6kl_wmi_shutdown(ar->wmi); 167961448a93SKalle Valo clear_bit(WMI_ENABLED, &ar->flag); 168061448a93SKalle Valo ar->wmi = NULL; 1681bdcd8170SKalle Valo err_htc_cleanup: 1682ad226ec2SKalle Valo ath6kl_htc_cleanup(ar->htc_target); 1683b2e75698SKalle Valo err_power_off: 1684b2e75698SKalle Valo ath6kl_hif_power_off(ar); 1685bdcd8170SKalle Valo err_bmi_cleanup: 1686bdcd8170SKalle Valo ath6kl_bmi_cleanup(ar); 1687bdcd8170SKalle Valo err_wq: 1688bdcd8170SKalle Valo destroy_workqueue(ar->ath6kl_wq); 16898dafb70eSVasanthakumar Thiagarajan 1690bdcd8170SKalle Valo return ret; 1691bdcd8170SKalle Valo } 1692bdcd8170SKalle Valo 169355055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) 16946db8fa53SVasanthakumar Thiagarajan { 16956db8fa53SVasanthakumar Thiagarajan static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 16966db8fa53SVasanthakumar Thiagarajan bool discon_issued; 16976db8fa53SVasanthakumar Thiagarajan 16986db8fa53SVasanthakumar Thiagarajan netif_stop_queue(vif->ndev); 16996db8fa53SVasanthakumar Thiagarajan 17006db8fa53SVasanthakumar Thiagarajan clear_bit(WLAN_ENABLED, &vif->flags); 17016db8fa53SVasanthakumar Thiagarajan 17026db8fa53SVasanthakumar Thiagarajan if (wmi_ready) { 17036db8fa53SVasanthakumar Thiagarajan discon_issued = test_bit(CONNECTED, &vif->flags) || 17046db8fa53SVasanthakumar Thiagarajan test_bit(CONNECT_PEND, &vif->flags); 17056db8fa53SVasanthakumar Thiagarajan ath6kl_disconnect(vif); 17066db8fa53SVasanthakumar Thiagarajan del_timer(&vif->disconnect_timer); 17076db8fa53SVasanthakumar Thiagarajan 17086db8fa53SVasanthakumar Thiagarajan if (discon_issued) 17096db8fa53SVasanthakumar Thiagarajan ath6kl_disconnect_event(vif, DISCONNECT_CMD, 17106db8fa53SVasanthakumar Thiagarajan (vif->nw_type & AP_NETWORK) ? 17116db8fa53SVasanthakumar Thiagarajan bcast_mac : vif->bssid, 17126db8fa53SVasanthakumar Thiagarajan 0, NULL, 0); 17136db8fa53SVasanthakumar Thiagarajan } 17146db8fa53SVasanthakumar Thiagarajan 17156db8fa53SVasanthakumar Thiagarajan if (vif->scan_req) { 17166db8fa53SVasanthakumar Thiagarajan cfg80211_scan_done(vif->scan_req, true); 17176db8fa53SVasanthakumar Thiagarajan vif->scan_req = NULL; 17186db8fa53SVasanthakumar Thiagarajan } 17196db8fa53SVasanthakumar Thiagarajan } 17206db8fa53SVasanthakumar Thiagarajan 1721bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar) 1722bdcd8170SKalle Valo { 1723990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *vif, *tmp_vif; 1724bdcd8170SKalle Valo 1725bdcd8170SKalle Valo set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1726bdcd8170SKalle Valo 1727bdcd8170SKalle Valo if (down_interruptible(&ar->sem)) { 1728bdcd8170SKalle Valo ath6kl_err("down_interruptible failed\n"); 1729bdcd8170SKalle Valo return; 1730bdcd8170SKalle Valo } 1731bdcd8170SKalle Valo 173211f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 1733990bd915SVasanthakumar Thiagarajan list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { 1734990bd915SVasanthakumar Thiagarajan list_del(&vif->list); 173511f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 1736990bd915SVasanthakumar Thiagarajan ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); 173727929723SVasanthakumar Thiagarajan rtnl_lock(); 173827929723SVasanthakumar Thiagarajan ath6kl_deinit_if_data(vif); 173927929723SVasanthakumar Thiagarajan rtnl_unlock(); 174011f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 1741990bd915SVasanthakumar Thiagarajan } 174211f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 1743bdcd8170SKalle Valo 17446db8fa53SVasanthakumar Thiagarajan clear_bit(WMI_READY, &ar->flag); 17456db8fa53SVasanthakumar Thiagarajan 17466db8fa53SVasanthakumar Thiagarajan /* 17476db8fa53SVasanthakumar Thiagarajan * After wmi_shudown all WMI events will be dropped. We 17486db8fa53SVasanthakumar Thiagarajan * need to cleanup the buffers allocated in AP mode and 17496db8fa53SVasanthakumar Thiagarajan * give disconnect notification to stack, which usually 17506db8fa53SVasanthakumar Thiagarajan * happens in the disconnect_event. Simulate the disconnect 17516db8fa53SVasanthakumar Thiagarajan * event by calling the function directly. Sometimes 17526db8fa53SVasanthakumar Thiagarajan * disconnect_event will be received when the debug logs 17536db8fa53SVasanthakumar Thiagarajan * are collected. 17546db8fa53SVasanthakumar Thiagarajan */ 17556db8fa53SVasanthakumar Thiagarajan ath6kl_wmi_shutdown(ar->wmi); 17566db8fa53SVasanthakumar Thiagarajan 17576db8fa53SVasanthakumar Thiagarajan clear_bit(WMI_ENABLED, &ar->flag); 17586db8fa53SVasanthakumar Thiagarajan if (ar->htc_target) { 17596db8fa53SVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); 17606db8fa53SVasanthakumar Thiagarajan ath6kl_htc_stop(ar->htc_target); 1761bdcd8170SKalle Valo } 1762bdcd8170SKalle Valo 1763bdcd8170SKalle Valo /* 17646db8fa53SVasanthakumar Thiagarajan * Try to reset the device if we can. The driver may have been 17656db8fa53SVasanthakumar Thiagarajan * configure NOT to reset the target during a debug session. 1766bdcd8170SKalle Valo */ 17676db8fa53SVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_TRC, 17686db8fa53SVasanthakumar Thiagarajan "attempting to reset target on instance destroy\n"); 17696db8fa53SVasanthakumar Thiagarajan ath6kl_reset_device(ar, ar->target_type, true, true); 1770bdcd8170SKalle Valo 17716db8fa53SVasanthakumar Thiagarajan clear_bit(WLAN_ENABLED, &ar->flag); 1772bdcd8170SKalle Valo } 1773