1bdcd8170SKalle Valo 
2bdcd8170SKalle Valo /*
3bdcd8170SKalle Valo  * Copyright (c) 2011 Atheros Communications Inc.
4bdcd8170SKalle Valo  *
5bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
6bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
7bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
8bdcd8170SKalle Valo  *
9bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16bdcd8170SKalle Valo  */
17bdcd8170SKalle Valo 
18c6efe578SStephen Rothwell #include <linux/moduleparam.h>
19f7830202SSangwook Lee #include <linux/errno.h>
2092ecbff4SSam Leffler #include <linux/of.h>
21bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h>
22bdcd8170SKalle Valo #include "core.h"
23bdcd8170SKalle Valo #include "cfg80211.h"
24bdcd8170SKalle Valo #include "target.h"
25bdcd8170SKalle Valo #include "debug.h"
26bdcd8170SKalle Valo #include "hif-ops.h"
27bdcd8170SKalle Valo 
28bdcd8170SKalle Valo unsigned int debug_mask;
29003353b0SKalle Valo static unsigned int testmode;
308277de15SKalle Valo static bool suspend_cutpower;
31bdcd8170SKalle Valo 
32bdcd8170SKalle Valo module_param(debug_mask, uint, 0644);
33003353b0SKalle Valo module_param(testmode, uint, 0644);
348277de15SKalle Valo module_param(suspend_cutpower, bool, 0444);
35bdcd8170SKalle Valo 
36856f4b31SKalle Valo static const struct ath6kl_hw hw_list[] = {
37856f4b31SKalle Valo 	{
38856f4b31SKalle Valo 		.id				= AR6003_REV2_VERSION,
39856f4b31SKalle Valo 		.dataset_patch_addr		= 0x57e884,
40856f4b31SKalle Valo 		.app_load_addr			= 0x543180,
41856f4b31SKalle Valo 		.board_ext_data_addr		= 0x57e500,
42856f4b31SKalle Valo 		.reserved_ram_size		= 6912,
43856f4b31SKalle Valo 
44856f4b31SKalle Valo 		/* hw2.0 needs override address hardcoded */
45856f4b31SKalle Valo 		.app_start_override_addr	= 0x944C00,
46856f4b31SKalle Valo 	},
47856f4b31SKalle Valo 	{
48856f4b31SKalle Valo 		.id				= AR6003_REV3_VERSION,
49856f4b31SKalle Valo 		.dataset_patch_addr		= 0x57ff74,
50856f4b31SKalle Valo 		.app_load_addr			= 0x1234,
51856f4b31SKalle Valo 		.board_ext_data_addr		= 0x542330,
52856f4b31SKalle Valo 		.reserved_ram_size		= 512,
53856f4b31SKalle Valo 	},
54856f4b31SKalle Valo 	{
55856f4b31SKalle Valo 		.id				= AR6004_REV1_VERSION,
56856f4b31SKalle Valo 		.dataset_patch_addr		= 0x57e884,
57856f4b31SKalle Valo 		.app_load_addr			= 0x1234,
58856f4b31SKalle Valo 		.board_ext_data_addr		= 0x437000,
59856f4b31SKalle Valo 		.reserved_ram_size		= 19456,
600d4d72bfSKalle Valo 		.board_addr			= 0x433900,
61856f4b31SKalle Valo 	},
62856f4b31SKalle Valo 	{
63856f4b31SKalle Valo 		.id				= AR6004_REV2_VERSION,
64856f4b31SKalle Valo 		.dataset_patch_addr		= 0x57e884,
65856f4b31SKalle Valo 		.app_load_addr			= 0x1234,
66856f4b31SKalle Valo 		.board_ext_data_addr		= 0x437000,
67856f4b31SKalle Valo 		.reserved_ram_size		= 11264,
680d4d72bfSKalle Valo 		.board_addr			= 0x43d400,
69856f4b31SKalle Valo 	},
70856f4b31SKalle Valo };
71856f4b31SKalle Valo 
72bdcd8170SKalle Valo /*
73bdcd8170SKalle Valo  * Include definitions here that can be used to tune the WLAN module
74bdcd8170SKalle Valo  * behavior. Different customers can tune the behavior as per their needs,
75bdcd8170SKalle Valo  * here.
76bdcd8170SKalle Valo  */
77bdcd8170SKalle Valo 
78bdcd8170SKalle Valo /*
79bdcd8170SKalle Valo  * This configuration item enable/disable keepalive support.
80bdcd8170SKalle Valo  * Keepalive support: In the absence of any data traffic to AP, null
81bdcd8170SKalle Valo  * frames will be sent to the AP at periodic interval, to keep the association
82bdcd8170SKalle Valo  * active. This configuration item defines the periodic interval.
83bdcd8170SKalle Valo  * Use value of zero to disable keepalive support
84bdcd8170SKalle Valo  * Default: 60 seconds
85bdcd8170SKalle Valo  */
86bdcd8170SKalle Valo #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
87bdcd8170SKalle Valo 
88bdcd8170SKalle Valo /*
89bdcd8170SKalle Valo  * This configuration item sets the value of disconnect timeout
90bdcd8170SKalle Valo  * Firmware delays sending the disconnec event to the host for this
91bdcd8170SKalle Valo  * timeout after is gets disconnected from the current AP.
92bdcd8170SKalle Valo  * If the firmware successly roams within the disconnect timeout
93bdcd8170SKalle Valo  * it sends a new connect event
94bdcd8170SKalle Valo  */
95bdcd8170SKalle Valo #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
96bdcd8170SKalle Valo 
97bdcd8170SKalle Valo #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
98bdcd8170SKalle Valo 
99bdcd8170SKalle Valo #define ATH6KL_DATA_OFFSET    64
100bdcd8170SKalle Valo struct sk_buff *ath6kl_buf_alloc(int size)
101bdcd8170SKalle Valo {
102bdcd8170SKalle Valo 	struct sk_buff *skb;
103bdcd8170SKalle Valo 	u16 reserved;
104bdcd8170SKalle Valo 
105bdcd8170SKalle Valo 	/* Add chacheline space at front and back of buffer */
106bdcd8170SKalle Valo 	reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
1071df94a85SVasanthakumar Thiagarajan 		   sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
108bdcd8170SKalle Valo 	skb = dev_alloc_skb(size + reserved);
109bdcd8170SKalle Valo 
110bdcd8170SKalle Valo 	if (skb)
111bdcd8170SKalle Valo 		skb_reserve(skb, reserved - L1_CACHE_BYTES);
112bdcd8170SKalle Valo 	return skb;
113bdcd8170SKalle Valo }
114bdcd8170SKalle Valo 
115e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif)
116bdcd8170SKalle Valo {
1173450334fSVasanthakumar Thiagarajan 	vif->ssid_len = 0;
1183450334fSVasanthakumar Thiagarajan 	memset(vif->ssid, 0, sizeof(vif->ssid));
1193450334fSVasanthakumar Thiagarajan 
1203450334fSVasanthakumar Thiagarajan 	vif->dot11_auth_mode = OPEN_AUTH;
1213450334fSVasanthakumar Thiagarajan 	vif->auth_mode = NONE_AUTH;
1223450334fSVasanthakumar Thiagarajan 	vif->prwise_crypto = NONE_CRYPT;
1233450334fSVasanthakumar Thiagarajan 	vif->prwise_crypto_len = 0;
1243450334fSVasanthakumar Thiagarajan 	vif->grp_crypto = NONE_CRYPT;
1253450334fSVasanthakumar Thiagarajan 	vif->grp_crypto_len = 0;
1266f2a73f9SVasanthakumar Thiagarajan 	memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
1278c8b65e3SVasanthakumar Thiagarajan 	memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
1288c8b65e3SVasanthakumar Thiagarajan 	memset(vif->bssid, 0, sizeof(vif->bssid));
129f74bac54SVasanthakumar Thiagarajan 	vif->bss_ch = 0;
130bdcd8170SKalle Valo }
131bdcd8170SKalle Valo 
132bdcd8170SKalle Valo static int ath6kl_set_host_app_area(struct ath6kl *ar)
133bdcd8170SKalle Valo {
134bdcd8170SKalle Valo 	u32 address, data;
135bdcd8170SKalle Valo 	struct host_app_area host_app_area;
136bdcd8170SKalle Valo 
137bdcd8170SKalle Valo 	/* Fetch the address of the host_app_area_s
138bdcd8170SKalle Valo 	 * instance in the host interest area */
139bdcd8170SKalle Valo 	address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
14031024d99SKevin Fang 	address = TARG_VTOP(ar->target_type, address);
141bdcd8170SKalle Valo 
142addb44beSKalle Valo 	if (ath6kl_diag_read32(ar, address, &data))
143bdcd8170SKalle Valo 		return -EIO;
144bdcd8170SKalle Valo 
14531024d99SKevin Fang 	address = TARG_VTOP(ar->target_type, data);
146cbf49a6fSKalle Valo 	host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
147addb44beSKalle Valo 	if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
148addb44beSKalle Valo 			      sizeof(struct host_app_area)))
149bdcd8170SKalle Valo 		return -EIO;
150bdcd8170SKalle Valo 
151bdcd8170SKalle Valo 	return 0;
152bdcd8170SKalle Valo }
153bdcd8170SKalle Valo 
154bdcd8170SKalle Valo static inline void set_ac2_ep_map(struct ath6kl *ar,
155bdcd8170SKalle Valo 				  u8 ac,
156bdcd8170SKalle Valo 				  enum htc_endpoint_id ep)
157bdcd8170SKalle Valo {
158bdcd8170SKalle Valo 	ar->ac2ep_map[ac] = ep;
159bdcd8170SKalle Valo 	ar->ep2ac_map[ep] = ac;
160bdcd8170SKalle Valo }
161bdcd8170SKalle Valo 
162bdcd8170SKalle Valo /* connect to a service */
163bdcd8170SKalle Valo static int ath6kl_connectservice(struct ath6kl *ar,
164bdcd8170SKalle Valo 				 struct htc_service_connect_req  *con_req,
165bdcd8170SKalle Valo 				 char *desc)
166bdcd8170SKalle Valo {
167bdcd8170SKalle Valo 	int status;
168bdcd8170SKalle Valo 	struct htc_service_connect_resp response;
169bdcd8170SKalle Valo 
170bdcd8170SKalle Valo 	memset(&response, 0, sizeof(response));
171bdcd8170SKalle Valo 
172ad226ec2SKalle Valo 	status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
173bdcd8170SKalle Valo 	if (status) {
174bdcd8170SKalle Valo 		ath6kl_err("failed to connect to %s service status:%d\n",
175bdcd8170SKalle Valo 			   desc, status);
176bdcd8170SKalle Valo 		return status;
177bdcd8170SKalle Valo 	}
178bdcd8170SKalle Valo 
179bdcd8170SKalle Valo 	switch (con_req->svc_id) {
180bdcd8170SKalle Valo 	case WMI_CONTROL_SVC:
181bdcd8170SKalle Valo 		if (test_bit(WMI_ENABLED, &ar->flag))
182bdcd8170SKalle Valo 			ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
183bdcd8170SKalle Valo 		ar->ctrl_ep = response.endpoint;
184bdcd8170SKalle Valo 		break;
185bdcd8170SKalle Valo 	case WMI_DATA_BE_SVC:
186bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
187bdcd8170SKalle Valo 		break;
188bdcd8170SKalle Valo 	case WMI_DATA_BK_SVC:
189bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
190bdcd8170SKalle Valo 		break;
191bdcd8170SKalle Valo 	case WMI_DATA_VI_SVC:
192bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
193bdcd8170SKalle Valo 		break;
194bdcd8170SKalle Valo 	case WMI_DATA_VO_SVC:
195bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
196bdcd8170SKalle Valo 		break;
197bdcd8170SKalle Valo 	default:
198bdcd8170SKalle Valo 		ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
199bdcd8170SKalle Valo 		return -EINVAL;
200bdcd8170SKalle Valo 	}
201bdcd8170SKalle Valo 
202bdcd8170SKalle Valo 	return 0;
203bdcd8170SKalle Valo }
204bdcd8170SKalle Valo 
205bdcd8170SKalle Valo static int ath6kl_init_service_ep(struct ath6kl *ar)
206bdcd8170SKalle Valo {
207bdcd8170SKalle Valo 	struct htc_service_connect_req connect;
208bdcd8170SKalle Valo 
209bdcd8170SKalle Valo 	memset(&connect, 0, sizeof(connect));
210bdcd8170SKalle Valo 
211bdcd8170SKalle Valo 	/* these fields are the same for all service endpoints */
212bdcd8170SKalle Valo 	connect.ep_cb.rx = ath6kl_rx;
213bdcd8170SKalle Valo 	connect.ep_cb.rx_refill = ath6kl_rx_refill;
214bdcd8170SKalle Valo 	connect.ep_cb.tx_full = ath6kl_tx_queue_full;
215bdcd8170SKalle Valo 
216bdcd8170SKalle Valo 	/*
217bdcd8170SKalle Valo 	 * Set the max queue depth so that our ath6kl_tx_queue_full handler
218bdcd8170SKalle Valo 	 * gets called.
219bdcd8170SKalle Valo 	*/
220bdcd8170SKalle Valo 	connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
221bdcd8170SKalle Valo 	connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
222bdcd8170SKalle Valo 	if (!connect.ep_cb.rx_refill_thresh)
223bdcd8170SKalle Valo 		connect.ep_cb.rx_refill_thresh++;
224bdcd8170SKalle Valo 
225bdcd8170SKalle Valo 	/* connect to control service */
226bdcd8170SKalle Valo 	connect.svc_id = WMI_CONTROL_SVC;
227bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
228bdcd8170SKalle Valo 		return -EIO;
229bdcd8170SKalle Valo 
230bdcd8170SKalle Valo 	connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
231bdcd8170SKalle Valo 
232bdcd8170SKalle Valo 	/*
233bdcd8170SKalle Valo 	 * Limit the HTC message size on the send path, although e can
234bdcd8170SKalle Valo 	 * receive A-MSDU frames of 4K, we will only send ethernet-sized
235bdcd8170SKalle Valo 	 * (802.3) frames on the send path.
236bdcd8170SKalle Valo 	 */
237bdcd8170SKalle Valo 	connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
238bdcd8170SKalle Valo 
239bdcd8170SKalle Valo 	/*
240bdcd8170SKalle Valo 	 * To reduce the amount of committed memory for larger A_MSDU
241bdcd8170SKalle Valo 	 * frames, use the recv-alloc threshold mechanism for larger
242bdcd8170SKalle Valo 	 * packets.
243bdcd8170SKalle Valo 	 */
244bdcd8170SKalle Valo 	connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
245bdcd8170SKalle Valo 	connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
246bdcd8170SKalle Valo 
247bdcd8170SKalle Valo 	/*
248bdcd8170SKalle Valo 	 * For the remaining data services set the connection flag to
249bdcd8170SKalle Valo 	 * reduce dribbling, if configured to do so.
250bdcd8170SKalle Valo 	 */
251bdcd8170SKalle Valo 	connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
252bdcd8170SKalle Valo 	connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
253bdcd8170SKalle Valo 	connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
254bdcd8170SKalle Valo 
255bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_BE_SVC;
256bdcd8170SKalle Valo 
257bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
258bdcd8170SKalle Valo 		return -EIO;
259bdcd8170SKalle Valo 
260bdcd8170SKalle Valo 	/* connect to back-ground map this to WMI LOW_PRI */
261bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_BK_SVC;
262bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
263bdcd8170SKalle Valo 		return -EIO;
264bdcd8170SKalle Valo 
265bdcd8170SKalle Valo 	/* connect to Video service, map this to to HI PRI */
266bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_VI_SVC;
267bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
268bdcd8170SKalle Valo 		return -EIO;
269bdcd8170SKalle Valo 
270bdcd8170SKalle Valo 	/*
271bdcd8170SKalle Valo 	 * Connect to VO service, this is currently not mapped to a WMI
272bdcd8170SKalle Valo 	 * priority stream due to historical reasons. WMI originally
273bdcd8170SKalle Valo 	 * defined 3 priorities over 3 mailboxes We can change this when
274bdcd8170SKalle Valo 	 * WMI is reworked so that priorities are not dependent on
275bdcd8170SKalle Valo 	 * mailboxes.
276bdcd8170SKalle Valo 	 */
277bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_VO_SVC;
278bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
279bdcd8170SKalle Valo 		return -EIO;
280bdcd8170SKalle Valo 
281bdcd8170SKalle Valo 	return 0;
282bdcd8170SKalle Valo }
283bdcd8170SKalle Valo 
284e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif)
285bdcd8170SKalle Valo {
286e29f25f5SVasanthakumar Thiagarajan 	ath6kl_init_profile_info(vif);
2873450334fSVasanthakumar Thiagarajan 	vif->def_txkey_index = 0;
2886f2a73f9SVasanthakumar Thiagarajan 	memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
289f74bac54SVasanthakumar Thiagarajan 	vif->ch_hint = 0;
290bdcd8170SKalle Valo }
291bdcd8170SKalle Valo 
292bdcd8170SKalle Valo /*
293bdcd8170SKalle Valo  * Set HTC/Mbox operational parameters, this can only be called when the
294bdcd8170SKalle Valo  * target is in the BMI phase.
295bdcd8170SKalle Valo  */
296bdcd8170SKalle Valo static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
297bdcd8170SKalle Valo 				 u8 htc_ctrl_buf)
298bdcd8170SKalle Valo {
299bdcd8170SKalle Valo 	int status;
300bdcd8170SKalle Valo 	u32 blk_size;
301bdcd8170SKalle Valo 
302bdcd8170SKalle Valo 	blk_size = ar->mbox_info.block_size;
303bdcd8170SKalle Valo 
304bdcd8170SKalle Valo 	if (htc_ctrl_buf)
305bdcd8170SKalle Valo 		blk_size |=  ((u32)htc_ctrl_buf) << 16;
306bdcd8170SKalle Valo 
307bdcd8170SKalle Valo 	/* set the host interest area for the block size */
308bdcd8170SKalle Valo 	status = ath6kl_bmi_write(ar,
309bdcd8170SKalle Valo 			ath6kl_get_hi_item_addr(ar,
310bdcd8170SKalle Valo 			HI_ITEM(hi_mbox_io_block_sz)),
311bdcd8170SKalle Valo 			(u8 *)&blk_size,
312bdcd8170SKalle Valo 			4);
313bdcd8170SKalle Valo 	if (status) {
314bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for IO block size failed\n");
315bdcd8170SKalle Valo 		goto out;
316bdcd8170SKalle Valo 	}
317bdcd8170SKalle Valo 
318bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
319bdcd8170SKalle Valo 		   blk_size,
320bdcd8170SKalle Valo 		   ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
321bdcd8170SKalle Valo 
322bdcd8170SKalle Valo 	if (mbox_isr_yield_val) {
323bdcd8170SKalle Valo 		/* set the host interest area for the mbox ISR yield limit */
324bdcd8170SKalle Valo 		status = ath6kl_bmi_write(ar,
325bdcd8170SKalle Valo 				ath6kl_get_hi_item_addr(ar,
326bdcd8170SKalle Valo 				HI_ITEM(hi_mbox_isr_yield_limit)),
327bdcd8170SKalle Valo 				(u8 *)&mbox_isr_yield_val,
328bdcd8170SKalle Valo 				4);
329bdcd8170SKalle Valo 		if (status) {
330bdcd8170SKalle Valo 			ath6kl_err("bmi_write_memory for yield limit failed\n");
331bdcd8170SKalle Valo 			goto out;
332bdcd8170SKalle Valo 		}
333bdcd8170SKalle Valo 	}
334bdcd8170SKalle Valo 
335bdcd8170SKalle Valo out:
336bdcd8170SKalle Valo 	return status;
337bdcd8170SKalle Valo }
338bdcd8170SKalle Valo 
3390ce59445SVasanthakumar Thiagarajan static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
340bdcd8170SKalle Valo {
341bdcd8170SKalle Valo 	int status = 0;
3424dea08e0SJouni Malinen 	int ret;
343bdcd8170SKalle Valo 
344bdcd8170SKalle Valo 	/*
345bdcd8170SKalle Valo 	 * Configure the device for rx dot11 header rules. "0,0" are the
346bdcd8170SKalle Valo 	 * default values. Required if checksum offload is needed. Set
347bdcd8170SKalle Valo 	 * RxMetaVersion to 2.
348bdcd8170SKalle Valo 	 */
3490ce59445SVasanthakumar Thiagarajan 	if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
350bdcd8170SKalle Valo 					       ar->rx_meta_ver, 0, 0)) {
351bdcd8170SKalle Valo 		ath6kl_err("unable to set the rx frame format\n");
352bdcd8170SKalle Valo 		status = -EIO;
353bdcd8170SKalle Valo 	}
354bdcd8170SKalle Valo 
355bdcd8170SKalle Valo 	if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
3560ce59445SVasanthakumar Thiagarajan 		if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
357bdcd8170SKalle Valo 		     IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
358bdcd8170SKalle Valo 			ath6kl_err("unable to set power save fail event policy\n");
359bdcd8170SKalle Valo 			status = -EIO;
360bdcd8170SKalle Valo 		}
361bdcd8170SKalle Valo 
362bdcd8170SKalle Valo 	if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
3630ce59445SVasanthakumar Thiagarajan 		if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
364bdcd8170SKalle Valo 		     WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
365bdcd8170SKalle Valo 			ath6kl_err("unable to set barker preamble policy\n");
366bdcd8170SKalle Valo 			status = -EIO;
367bdcd8170SKalle Valo 		}
368bdcd8170SKalle Valo 
3690ce59445SVasanthakumar Thiagarajan 	if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
370bdcd8170SKalle Valo 			WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
371bdcd8170SKalle Valo 		ath6kl_err("unable to set keep alive interval\n");
372bdcd8170SKalle Valo 		status = -EIO;
373bdcd8170SKalle Valo 	}
374bdcd8170SKalle Valo 
3750ce59445SVasanthakumar Thiagarajan 	if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
376bdcd8170SKalle Valo 			WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
377bdcd8170SKalle Valo 		ath6kl_err("unable to set disconnect timeout\n");
378bdcd8170SKalle Valo 		status = -EIO;
379bdcd8170SKalle Valo 	}
380bdcd8170SKalle Valo 
381bdcd8170SKalle Valo 	if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
3820ce59445SVasanthakumar Thiagarajan 		if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
383bdcd8170SKalle Valo 			ath6kl_err("unable to set txop bursting\n");
384bdcd8170SKalle Valo 			status = -EIO;
385bdcd8170SKalle Valo 		}
386bdcd8170SKalle Valo 
3870ce59445SVasanthakumar Thiagarajan 	/*
3880ce59445SVasanthakumar Thiagarajan 	 * FIXME: Make sure p2p configurations are not applied to
3890ce59445SVasanthakumar Thiagarajan 	 * non-p2p capable interfaces when multivif support is enabled.
3900ce59445SVasanthakumar Thiagarajan 	 */
3916bbc7c35SJouni Malinen 	if (ar->p2p) {
3920ce59445SVasanthakumar Thiagarajan 		ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
3936bbc7c35SJouni Malinen 					      P2P_FLAG_CAPABILITIES_REQ |
3944dea08e0SJouni Malinen 					      P2P_FLAG_MACADDR_REQ |
3954dea08e0SJouni Malinen 					      P2P_FLAG_HMODEL_REQ);
3964dea08e0SJouni Malinen 		if (ret) {
3974dea08e0SJouni Malinen 			ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
3986bbc7c35SJouni Malinen 				   "capabilities (%d) - assuming P2P not "
3996bbc7c35SJouni Malinen 				   "supported\n", ret);
4006bbc7c35SJouni Malinen 			ar->p2p = 0;
4016bbc7c35SJouni Malinen 		}
4026bbc7c35SJouni Malinen 	}
4036bbc7c35SJouni Malinen 
4040ce59445SVasanthakumar Thiagarajan 	/*
4050ce59445SVasanthakumar Thiagarajan 	 * FIXME: Make sure p2p configurations are not applied to
4060ce59445SVasanthakumar Thiagarajan 	 * non-p2p capable interfaces when multivif support is enabled.
4070ce59445SVasanthakumar Thiagarajan 	 */
4086bbc7c35SJouni Malinen 	if (ar->p2p) {
4096bbc7c35SJouni Malinen 		/* Enable Probe Request reporting for P2P */
4100ce59445SVasanthakumar Thiagarajan 		ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
4116bbc7c35SJouni Malinen 		if (ret) {
4126bbc7c35SJouni Malinen 			ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
4136bbc7c35SJouni Malinen 				   "Request reporting (%d)\n", ret);
4146bbc7c35SJouni Malinen 		}
4154dea08e0SJouni Malinen 	}
4164dea08e0SJouni Malinen 
417bdcd8170SKalle Valo 	return status;
418bdcd8170SKalle Valo }
419bdcd8170SKalle Valo 
420bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar)
421bdcd8170SKalle Valo {
422bdcd8170SKalle Valo 	u32 param, ram_reserved_size;
4233226f68aSVasanthakumar Thiagarajan 	u8 fw_iftype, fw_mode = 0, fw_submode = 0;
4247b85832dSVasanthakumar Thiagarajan 	int i;
425bdcd8170SKalle Valo 
4267b85832dSVasanthakumar Thiagarajan 	/*
4277b85832dSVasanthakumar Thiagarajan 	 * Note: Even though the firmware interface type is
4287b85832dSVasanthakumar Thiagarajan 	 * chosen as BSS_STA for all three interfaces, can
4297b85832dSVasanthakumar Thiagarajan 	 * be configured to IBSS/AP as long as the fw submode
4307b85832dSVasanthakumar Thiagarajan 	 * remains normal mode (0 - AP, STA and IBSS). But
4317b85832dSVasanthakumar Thiagarajan 	 * due to an target assert in firmware only one interface is
4327b85832dSVasanthakumar Thiagarajan 	 * configured for now.
4337b85832dSVasanthakumar Thiagarajan 	 */
434dd3751f7SVasanthakumar Thiagarajan 	fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
435bdcd8170SKalle Valo 
4367b85832dSVasanthakumar Thiagarajan 	for (i = 0; i < MAX_NUM_VIF; i++)
4377b85832dSVasanthakumar Thiagarajan 		fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
4387b85832dSVasanthakumar Thiagarajan 
4397b85832dSVasanthakumar Thiagarajan 	/*
4403226f68aSVasanthakumar Thiagarajan 	 * By default, submodes :
4413226f68aSVasanthakumar Thiagarajan 	 *		vif[0] - AP/STA/IBSS
4427b85832dSVasanthakumar Thiagarajan 	 *		vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
4437b85832dSVasanthakumar Thiagarajan 	 *		vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
4447b85832dSVasanthakumar Thiagarajan 	 */
4453226f68aSVasanthakumar Thiagarajan 
4463226f68aSVasanthakumar Thiagarajan 	for (i = 0; i < ar->max_norm_iface; i++)
4473226f68aSVasanthakumar Thiagarajan 		fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
4483226f68aSVasanthakumar Thiagarajan 			      (i * HI_OPTION_FW_SUBMODE_BITS);
4493226f68aSVasanthakumar Thiagarajan 
4503226f68aSVasanthakumar Thiagarajan 	for (i = ar->max_norm_iface; i < MAX_NUM_VIF; i++)
4513226f68aSVasanthakumar Thiagarajan 		fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
4523226f68aSVasanthakumar Thiagarajan 			      (i * HI_OPTION_FW_SUBMODE_BITS);
4537b85832dSVasanthakumar Thiagarajan 
4547b85832dSVasanthakumar Thiagarajan 	/*
4557b85832dSVasanthakumar Thiagarajan 	 * FIXME: This needs to be removed once the multivif
4567b85832dSVasanthakumar Thiagarajan 	 * support is enabled.
4577b85832dSVasanthakumar Thiagarajan 	 */
4587b85832dSVasanthakumar Thiagarajan 	if (ar->p2p)
4597b85832dSVasanthakumar Thiagarajan 		fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
4607b85832dSVasanthakumar Thiagarajan 
461bdcd8170SKalle Valo 	param = HTC_PROTOCOL_VERSION;
462bdcd8170SKalle Valo 	if (ath6kl_bmi_write(ar,
463bdcd8170SKalle Valo 			     ath6kl_get_hi_item_addr(ar,
464bdcd8170SKalle Valo 			     HI_ITEM(hi_app_host_interest)),
465bdcd8170SKalle Valo 			     (u8 *)&param, 4) != 0) {
466bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for htc version failed\n");
467bdcd8170SKalle Valo 		return -EIO;
468bdcd8170SKalle Valo 	}
469bdcd8170SKalle Valo 
470bdcd8170SKalle Valo 	/* set the firmware mode to STA/IBSS/AP */
471bdcd8170SKalle Valo 	param = 0;
472bdcd8170SKalle Valo 
473bdcd8170SKalle Valo 	if (ath6kl_bmi_read(ar,
474bdcd8170SKalle Valo 			    ath6kl_get_hi_item_addr(ar,
475bdcd8170SKalle Valo 			    HI_ITEM(hi_option_flag)),
476bdcd8170SKalle Valo 			    (u8 *)&param, 4) != 0) {
477bdcd8170SKalle Valo 		ath6kl_err("bmi_read_memory for setting fwmode failed\n");
478bdcd8170SKalle Valo 		return -EIO;
479bdcd8170SKalle Valo 	}
480bdcd8170SKalle Valo 
4817b85832dSVasanthakumar Thiagarajan 	param |= (MAX_NUM_VIF << HI_OPTION_NUM_DEV_SHIFT);
4827b85832dSVasanthakumar Thiagarajan 	param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
4837b85832dSVasanthakumar Thiagarajan 	param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
4847b85832dSVasanthakumar Thiagarajan 
485bdcd8170SKalle Valo 	param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
486bdcd8170SKalle Valo 	param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
487bdcd8170SKalle Valo 
488bdcd8170SKalle Valo 	if (ath6kl_bmi_write(ar,
489bdcd8170SKalle Valo 			     ath6kl_get_hi_item_addr(ar,
490bdcd8170SKalle Valo 			     HI_ITEM(hi_option_flag)),
491bdcd8170SKalle Valo 			     (u8 *)&param,
492bdcd8170SKalle Valo 			     4) != 0) {
493bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for setting fwmode failed\n");
494bdcd8170SKalle Valo 		return -EIO;
495bdcd8170SKalle Valo 	}
496bdcd8170SKalle Valo 
497bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
498bdcd8170SKalle Valo 
499bdcd8170SKalle Valo 	/*
500bdcd8170SKalle Valo 	 * Hardcode the address use for the extended board data
501bdcd8170SKalle Valo 	 * Ideally this should be pre-allocate by the OS at boot time
502bdcd8170SKalle Valo 	 * But since it is a new feature and board data is loaded
503bdcd8170SKalle Valo 	 * at init time, we have to workaround this from host.
504bdcd8170SKalle Valo 	 * It is difficult to patch the firmware boot code,
505bdcd8170SKalle Valo 	 * but possible in theory.
506bdcd8170SKalle Valo 	 */
507bdcd8170SKalle Valo 
508991b27eaSKalle Valo 	param = ar->hw.board_ext_data_addr;
509991b27eaSKalle Valo 	ram_reserved_size = ar->hw.reserved_ram_size;
510bdcd8170SKalle Valo 
511991b27eaSKalle Valo 	if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
512bdcd8170SKalle Valo 					HI_ITEM(hi_board_ext_data)),
513bdcd8170SKalle Valo 			     (u8 *)&param, 4) != 0) {
514bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
515bdcd8170SKalle Valo 		return -EIO;
516bdcd8170SKalle Valo 	}
517991b27eaSKalle Valo 
518991b27eaSKalle Valo 	if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
519bdcd8170SKalle Valo 					HI_ITEM(hi_end_ram_reserve_sz)),
520bdcd8170SKalle Valo 			     (u8 *)&ram_reserved_size, 4) != 0) {
521bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
522bdcd8170SKalle Valo 		return -EIO;
523bdcd8170SKalle Valo 	}
524bdcd8170SKalle Valo 
525bdcd8170SKalle Valo 	/* set the block size for the target */
526bdcd8170SKalle Valo 	if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
527bdcd8170SKalle Valo 		/* use default number of control buffers */
528bdcd8170SKalle Valo 		return -EIO;
529bdcd8170SKalle Valo 
530bdcd8170SKalle Valo 	return 0;
531bdcd8170SKalle Valo }
532bdcd8170SKalle Valo 
5338dafb70eSVasanthakumar Thiagarajan void ath6kl_core_free(struct ath6kl *ar)
534bdcd8170SKalle Valo {
5358dafb70eSVasanthakumar Thiagarajan 	wiphy_free(ar->wiphy);
536bdcd8170SKalle Valo }
537bdcd8170SKalle Valo 
5386db8fa53SVasanthakumar Thiagarajan void ath6kl_core_cleanup(struct ath6kl *ar)
539bdcd8170SKalle Valo {
540b2e75698SKalle Valo 	ath6kl_hif_power_off(ar);
541b2e75698SKalle Valo 
5426db8fa53SVasanthakumar Thiagarajan 	destroy_workqueue(ar->ath6kl_wq);
543bdcd8170SKalle Valo 
5446db8fa53SVasanthakumar Thiagarajan 	if (ar->htc_target)
5456db8fa53SVasanthakumar Thiagarajan 		ath6kl_htc_cleanup(ar->htc_target);
5466db8fa53SVasanthakumar Thiagarajan 
5476db8fa53SVasanthakumar Thiagarajan 	ath6kl_cookie_cleanup(ar);
5486db8fa53SVasanthakumar Thiagarajan 
5496db8fa53SVasanthakumar Thiagarajan 	ath6kl_cleanup_amsdu_rxbufs(ar);
5506db8fa53SVasanthakumar Thiagarajan 
5516db8fa53SVasanthakumar Thiagarajan 	ath6kl_bmi_cleanup(ar);
5526db8fa53SVasanthakumar Thiagarajan 
5536db8fa53SVasanthakumar Thiagarajan 	ath6kl_debug_cleanup(ar);
5546db8fa53SVasanthakumar Thiagarajan 
5556db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw_board);
5566db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw_otp);
5576db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw);
5586db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw_patch);
5596db8fa53SVasanthakumar Thiagarajan 
5606db8fa53SVasanthakumar Thiagarajan 	ath6kl_deinit_ieee80211_hw(ar);
561bdcd8170SKalle Valo }
562bdcd8170SKalle Valo 
563bdcd8170SKalle Valo /* firmware upload */
564bdcd8170SKalle Valo static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
565bdcd8170SKalle Valo 			 u8 **fw, size_t *fw_len)
566bdcd8170SKalle Valo {
567bdcd8170SKalle Valo 	const struct firmware *fw_entry;
568bdcd8170SKalle Valo 	int ret;
569bdcd8170SKalle Valo 
570bdcd8170SKalle Valo 	ret = request_firmware(&fw_entry, filename, ar->dev);
571bdcd8170SKalle Valo 	if (ret)
572bdcd8170SKalle Valo 		return ret;
573bdcd8170SKalle Valo 
574bdcd8170SKalle Valo 	*fw_len = fw_entry->size;
575bdcd8170SKalle Valo 	*fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
576bdcd8170SKalle Valo 
577bdcd8170SKalle Valo 	if (*fw == NULL)
578bdcd8170SKalle Valo 		ret = -ENOMEM;
579bdcd8170SKalle Valo 
580bdcd8170SKalle Valo 	release_firmware(fw_entry);
581bdcd8170SKalle Valo 
582bdcd8170SKalle Valo 	return ret;
583bdcd8170SKalle Valo }
584bdcd8170SKalle Valo 
58592ecbff4SSam Leffler #ifdef CONFIG_OF
58692ecbff4SSam Leffler static const char *get_target_ver_dir(const struct ath6kl *ar)
58792ecbff4SSam Leffler {
58892ecbff4SSam Leffler 	switch (ar->version.target_ver) {
58992ecbff4SSam Leffler 	case AR6003_REV1_VERSION:
59092ecbff4SSam Leffler 		return "ath6k/AR6003/hw1.0";
59192ecbff4SSam Leffler 	case AR6003_REV2_VERSION:
59292ecbff4SSam Leffler 		return "ath6k/AR6003/hw2.0";
59392ecbff4SSam Leffler 	case AR6003_REV3_VERSION:
59492ecbff4SSam Leffler 		return "ath6k/AR6003/hw2.1.1";
59592ecbff4SSam Leffler 	}
59692ecbff4SSam Leffler 	ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
59792ecbff4SSam Leffler 		    ar->version.target_ver);
59892ecbff4SSam Leffler 	return NULL;
59992ecbff4SSam Leffler }
60092ecbff4SSam Leffler 
60192ecbff4SSam Leffler /*
60292ecbff4SSam Leffler  * Check the device tree for a board-id and use it to construct
60392ecbff4SSam Leffler  * the pathname to the firmware file.  Used (for now) to find a
60492ecbff4SSam Leffler  * fallback to the "bdata.bin" file--typically a symlink to the
60592ecbff4SSam Leffler  * appropriate board-specific file.
60692ecbff4SSam Leffler  */
60792ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar)
60892ecbff4SSam Leffler {
60992ecbff4SSam Leffler 	static const char *board_id_prop = "atheros,board-id";
61092ecbff4SSam Leffler 	struct device_node *node;
61192ecbff4SSam Leffler 	char board_filename[64];
61292ecbff4SSam Leffler 	const char *board_id;
61392ecbff4SSam Leffler 	int ret;
61492ecbff4SSam Leffler 
61592ecbff4SSam Leffler 	for_each_compatible_node(node, NULL, "atheros,ath6kl") {
61692ecbff4SSam Leffler 		board_id = of_get_property(node, board_id_prop, NULL);
61792ecbff4SSam Leffler 		if (board_id == NULL) {
61892ecbff4SSam Leffler 			ath6kl_warn("No \"%s\" property on %s node.\n",
61992ecbff4SSam Leffler 				    board_id_prop, node->name);
62092ecbff4SSam Leffler 			continue;
62192ecbff4SSam Leffler 		}
62292ecbff4SSam Leffler 		snprintf(board_filename, sizeof(board_filename),
62392ecbff4SSam Leffler 			 "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
62492ecbff4SSam Leffler 
62592ecbff4SSam Leffler 		ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
62692ecbff4SSam Leffler 				    &ar->fw_board_len);
62792ecbff4SSam Leffler 		if (ret) {
62892ecbff4SSam Leffler 			ath6kl_err("Failed to get DT board file %s: %d\n",
62992ecbff4SSam Leffler 				   board_filename, ret);
63092ecbff4SSam Leffler 			continue;
63192ecbff4SSam Leffler 		}
63292ecbff4SSam Leffler 		return true;
63392ecbff4SSam Leffler 	}
63492ecbff4SSam Leffler 	return false;
63592ecbff4SSam Leffler }
63692ecbff4SSam Leffler #else
63792ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar)
63892ecbff4SSam Leffler {
63992ecbff4SSam Leffler 	return false;
64092ecbff4SSam Leffler }
64192ecbff4SSam Leffler #endif /* CONFIG_OF */
64292ecbff4SSam Leffler 
643bdcd8170SKalle Valo static int ath6kl_fetch_board_file(struct ath6kl *ar)
644bdcd8170SKalle Valo {
645bdcd8170SKalle Valo 	const char *filename;
646bdcd8170SKalle Valo 	int ret;
647bdcd8170SKalle Valo 
648772c31eeSKalle Valo 	if (ar->fw_board != NULL)
649772c31eeSKalle Valo 		return 0;
650772c31eeSKalle Valo 
651bdcd8170SKalle Valo 	switch (ar->version.target_ver) {
652bdcd8170SKalle Valo 	case AR6003_REV2_VERSION:
653bdcd8170SKalle Valo 		filename = AR6003_REV2_BOARD_DATA_FILE;
654bdcd8170SKalle Valo 		break;
65531024d99SKevin Fang 	case AR6004_REV1_VERSION:
65631024d99SKevin Fang 		filename = AR6004_REV1_BOARD_DATA_FILE;
65731024d99SKevin Fang 		break;
658bdcd8170SKalle Valo 	default:
659bdcd8170SKalle Valo 		filename = AR6003_REV3_BOARD_DATA_FILE;
660bdcd8170SKalle Valo 		break;
661bdcd8170SKalle Valo 	}
662bdcd8170SKalle Valo 
663bdcd8170SKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
664bdcd8170SKalle Valo 			    &ar->fw_board_len);
665bdcd8170SKalle Valo 	if (ret == 0) {
666bdcd8170SKalle Valo 		/* managed to get proper board file */
667bdcd8170SKalle Valo 		return 0;
668bdcd8170SKalle Valo 	}
669bdcd8170SKalle Valo 
67092ecbff4SSam Leffler 	if (check_device_tree(ar)) {
67192ecbff4SSam Leffler 		/* got board file from device tree */
67292ecbff4SSam Leffler 		return 0;
67392ecbff4SSam Leffler 	}
67492ecbff4SSam Leffler 
675bdcd8170SKalle Valo 	/* there was no proper board file, try to use default instead */
676bdcd8170SKalle Valo 	ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
677bdcd8170SKalle Valo 		    filename, ret);
678bdcd8170SKalle Valo 
679bdcd8170SKalle Valo 	switch (ar->version.target_ver) {
680bdcd8170SKalle Valo 	case AR6003_REV2_VERSION:
681bdcd8170SKalle Valo 		filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
682bdcd8170SKalle Valo 		break;
68331024d99SKevin Fang 	case AR6004_REV1_VERSION:
68431024d99SKevin Fang 		filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
68531024d99SKevin Fang 		break;
686bdcd8170SKalle Valo 	default:
687bdcd8170SKalle Valo 		filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
688bdcd8170SKalle Valo 		break;
689bdcd8170SKalle Valo 	}
690bdcd8170SKalle Valo 
691bdcd8170SKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
692bdcd8170SKalle Valo 			    &ar->fw_board_len);
693bdcd8170SKalle Valo 	if (ret) {
694bdcd8170SKalle Valo 		ath6kl_err("Failed to get default board file %s: %d\n",
695bdcd8170SKalle Valo 			   filename, ret);
696bdcd8170SKalle Valo 		return ret;
697bdcd8170SKalle Valo 	}
698bdcd8170SKalle Valo 
699bdcd8170SKalle Valo 	ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
700bdcd8170SKalle Valo 	ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
701bdcd8170SKalle Valo 
702bdcd8170SKalle Valo 	return 0;
703bdcd8170SKalle Valo }
704bdcd8170SKalle Valo 
705772c31eeSKalle Valo static int ath6kl_fetch_otp_file(struct ath6kl *ar)
706772c31eeSKalle Valo {
707772c31eeSKalle Valo 	const char *filename;
708772c31eeSKalle Valo 	int ret;
709772c31eeSKalle Valo 
710772c31eeSKalle Valo 	if (ar->fw_otp != NULL)
711772c31eeSKalle Valo 		return 0;
712772c31eeSKalle Valo 
713772c31eeSKalle Valo 	switch (ar->version.target_ver) {
714772c31eeSKalle Valo 	case AR6003_REV2_VERSION:
715772c31eeSKalle Valo 		filename = AR6003_REV2_OTP_FILE;
716772c31eeSKalle Valo 		break;
717772c31eeSKalle Valo 	case AR6004_REV1_VERSION:
718772c31eeSKalle Valo 		ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
719772c31eeSKalle Valo 		return 0;
720772c31eeSKalle Valo 		break;
721772c31eeSKalle Valo 	default:
722772c31eeSKalle Valo 		filename = AR6003_REV3_OTP_FILE;
723772c31eeSKalle Valo 		break;
724772c31eeSKalle Valo 	}
725772c31eeSKalle Valo 
726772c31eeSKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
727772c31eeSKalle Valo 			    &ar->fw_otp_len);
728772c31eeSKalle Valo 	if (ret) {
729772c31eeSKalle Valo 		ath6kl_err("Failed to get OTP file %s: %d\n",
730772c31eeSKalle Valo 			   filename, ret);
731772c31eeSKalle Valo 		return ret;
732772c31eeSKalle Valo 	}
733772c31eeSKalle Valo 
734772c31eeSKalle Valo 	return 0;
735772c31eeSKalle Valo }
736772c31eeSKalle Valo 
737772c31eeSKalle Valo static int ath6kl_fetch_fw_file(struct ath6kl *ar)
738772c31eeSKalle Valo {
739772c31eeSKalle Valo 	const char *filename;
740772c31eeSKalle Valo 	int ret;
741772c31eeSKalle Valo 
742772c31eeSKalle Valo 	if (ar->fw != NULL)
743772c31eeSKalle Valo 		return 0;
744772c31eeSKalle Valo 
745772c31eeSKalle Valo 	if (testmode) {
746772c31eeSKalle Valo 		switch (ar->version.target_ver) {
747772c31eeSKalle Valo 		case AR6003_REV2_VERSION:
748772c31eeSKalle Valo 			filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
749772c31eeSKalle Valo 			break;
750772c31eeSKalle Valo 		case AR6003_REV3_VERSION:
751772c31eeSKalle Valo 			filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
752772c31eeSKalle Valo 			break;
753772c31eeSKalle Valo 		case AR6004_REV1_VERSION:
754772c31eeSKalle Valo 			ath6kl_warn("testmode not supported with ar6004\n");
755772c31eeSKalle Valo 			return -EOPNOTSUPP;
756772c31eeSKalle Valo 		default:
757772c31eeSKalle Valo 			ath6kl_warn("unknown target version: 0x%x\n",
758772c31eeSKalle Valo 				       ar->version.target_ver);
759772c31eeSKalle Valo 			return -EINVAL;
760772c31eeSKalle Valo 		}
761772c31eeSKalle Valo 
762772c31eeSKalle Valo 		set_bit(TESTMODE, &ar->flag);
763772c31eeSKalle Valo 
764772c31eeSKalle Valo 		goto get_fw;
765772c31eeSKalle Valo 	}
766772c31eeSKalle Valo 
767772c31eeSKalle Valo 	switch (ar->version.target_ver) {
768772c31eeSKalle Valo 	case AR6003_REV2_VERSION:
769772c31eeSKalle Valo 		filename = AR6003_REV2_FIRMWARE_FILE;
770772c31eeSKalle Valo 		break;
771772c31eeSKalle Valo 	case AR6004_REV1_VERSION:
772772c31eeSKalle Valo 		filename = AR6004_REV1_FIRMWARE_FILE;
773772c31eeSKalle Valo 		break;
774772c31eeSKalle Valo 	default:
775772c31eeSKalle Valo 		filename = AR6003_REV3_FIRMWARE_FILE;
776772c31eeSKalle Valo 		break;
777772c31eeSKalle Valo 	}
778772c31eeSKalle Valo 
779772c31eeSKalle Valo get_fw:
780772c31eeSKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
781772c31eeSKalle Valo 	if (ret) {
782772c31eeSKalle Valo 		ath6kl_err("Failed to get firmware file %s: %d\n",
783772c31eeSKalle Valo 			   filename, ret);
784772c31eeSKalle Valo 		return ret;
785772c31eeSKalle Valo 	}
786772c31eeSKalle Valo 
787772c31eeSKalle Valo 	return 0;
788772c31eeSKalle Valo }
789772c31eeSKalle Valo 
790772c31eeSKalle Valo static int ath6kl_fetch_patch_file(struct ath6kl *ar)
791772c31eeSKalle Valo {
792772c31eeSKalle Valo 	const char *filename;
793772c31eeSKalle Valo 	int ret;
794772c31eeSKalle Valo 
795772c31eeSKalle Valo 	switch (ar->version.target_ver) {
796772c31eeSKalle Valo 	case AR6003_REV2_VERSION:
797772c31eeSKalle Valo 		filename = AR6003_REV2_PATCH_FILE;
798772c31eeSKalle Valo 		break;
799772c31eeSKalle Valo 	case AR6004_REV1_VERSION:
800772c31eeSKalle Valo 		/* FIXME: implement for AR6004 */
801772c31eeSKalle Valo 		return 0;
802772c31eeSKalle Valo 		break;
803772c31eeSKalle Valo 	default:
804772c31eeSKalle Valo 		filename = AR6003_REV3_PATCH_FILE;
805772c31eeSKalle Valo 		break;
806772c31eeSKalle Valo 	}
807772c31eeSKalle Valo 
808772c31eeSKalle Valo 	if (ar->fw_patch == NULL) {
809772c31eeSKalle Valo 		ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
810772c31eeSKalle Valo 				    &ar->fw_patch_len);
811772c31eeSKalle Valo 		if (ret) {
812772c31eeSKalle Valo 			ath6kl_err("Failed to get patch file %s: %d\n",
813772c31eeSKalle Valo 				   filename, ret);
814772c31eeSKalle Valo 			return ret;
815772c31eeSKalle Valo 		}
816772c31eeSKalle Valo 	}
817772c31eeSKalle Valo 
818772c31eeSKalle Valo 	return 0;
819772c31eeSKalle Valo }
820772c31eeSKalle Valo 
82150d41234SKalle Valo static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
822772c31eeSKalle Valo {
823772c31eeSKalle Valo 	int ret;
824772c31eeSKalle Valo 
825772c31eeSKalle Valo 	ret = ath6kl_fetch_otp_file(ar);
826772c31eeSKalle Valo 	if (ret)
827772c31eeSKalle Valo 		return ret;
828772c31eeSKalle Valo 
829772c31eeSKalle Valo 	ret = ath6kl_fetch_fw_file(ar);
830772c31eeSKalle Valo 	if (ret)
831772c31eeSKalle Valo 		return ret;
832772c31eeSKalle Valo 
833772c31eeSKalle Valo 	ret = ath6kl_fetch_patch_file(ar);
834772c31eeSKalle Valo 	if (ret)
835772c31eeSKalle Valo 		return ret;
836772c31eeSKalle Valo 
837772c31eeSKalle Valo 	return 0;
838772c31eeSKalle Valo }
839bdcd8170SKalle Valo 
84050d41234SKalle Valo static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
84150d41234SKalle Valo {
84250d41234SKalle Valo 	size_t magic_len, len, ie_len;
84350d41234SKalle Valo 	const struct firmware *fw;
84450d41234SKalle Valo 	struct ath6kl_fw_ie *hdr;
84550d41234SKalle Valo 	const char *filename;
84650d41234SKalle Valo 	const u8 *data;
84797e0496dSKalle Valo 	int ret, ie_id, i, index, bit;
8488a137480SKalle Valo 	__le32 *val;
84950d41234SKalle Valo 
85050d41234SKalle Valo 	switch (ar->version.target_ver) {
85150d41234SKalle Valo 	case AR6003_REV2_VERSION:
85250d41234SKalle Valo 		filename = AR6003_REV2_FIRMWARE_2_FILE;
85350d41234SKalle Valo 		break;
85450d41234SKalle Valo 	case AR6003_REV3_VERSION:
85550d41234SKalle Valo 		filename = AR6003_REV3_FIRMWARE_2_FILE;
85650d41234SKalle Valo 		break;
85750d41234SKalle Valo 	case AR6004_REV1_VERSION:
85850d41234SKalle Valo 		filename = AR6004_REV1_FIRMWARE_2_FILE;
85950d41234SKalle Valo 		break;
86050e2740bSKalle Valo 	case AR6004_REV2_VERSION:
86150e2740bSKalle Valo 		filename = AR6004_REV2_FIRMWARE_2_FILE;
86250e2740bSKalle Valo 		break;
86350d41234SKalle Valo 	default:
86450d41234SKalle Valo 		return -EOPNOTSUPP;
86550d41234SKalle Valo 	}
86650d41234SKalle Valo 
86750d41234SKalle Valo 	ret = request_firmware(&fw, filename, ar->dev);
86850d41234SKalle Valo 	if (ret)
86950d41234SKalle Valo 		return ret;
87050d41234SKalle Valo 
87150d41234SKalle Valo 	data = fw->data;
87250d41234SKalle Valo 	len = fw->size;
87350d41234SKalle Valo 
87450d41234SKalle Valo 	/* magic also includes the null byte, check that as well */
87550d41234SKalle Valo 	magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
87650d41234SKalle Valo 
87750d41234SKalle Valo 	if (len < magic_len) {
87850d41234SKalle Valo 		ret = -EINVAL;
87950d41234SKalle Valo 		goto out;
88050d41234SKalle Valo 	}
88150d41234SKalle Valo 
88250d41234SKalle Valo 	if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
88350d41234SKalle Valo 		ret = -EINVAL;
88450d41234SKalle Valo 		goto out;
88550d41234SKalle Valo 	}
88650d41234SKalle Valo 
88750d41234SKalle Valo 	len -= magic_len;
88850d41234SKalle Valo 	data += magic_len;
88950d41234SKalle Valo 
89050d41234SKalle Valo 	/* loop elements */
89150d41234SKalle Valo 	while (len > sizeof(struct ath6kl_fw_ie)) {
89250d41234SKalle Valo 		/* hdr is unaligned! */
89350d41234SKalle Valo 		hdr = (struct ath6kl_fw_ie *) data;
89450d41234SKalle Valo 
89550d41234SKalle Valo 		ie_id = le32_to_cpup(&hdr->id);
89650d41234SKalle Valo 		ie_len = le32_to_cpup(&hdr->len);
89750d41234SKalle Valo 
89850d41234SKalle Valo 		len -= sizeof(*hdr);
89950d41234SKalle Valo 		data += sizeof(*hdr);
90050d41234SKalle Valo 
90150d41234SKalle Valo 		if (len < ie_len) {
90250d41234SKalle Valo 			ret = -EINVAL;
90350d41234SKalle Valo 			goto out;
90450d41234SKalle Valo 		}
90550d41234SKalle Valo 
90650d41234SKalle Valo 		switch (ie_id) {
90750d41234SKalle Valo 		case ATH6KL_FW_IE_OTP_IMAGE:
908ef548626SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
9096bc36431SKalle Valo 				ie_len);
9106bc36431SKalle Valo 
91150d41234SKalle Valo 			ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
91250d41234SKalle Valo 
91350d41234SKalle Valo 			if (ar->fw_otp == NULL) {
91450d41234SKalle Valo 				ret = -ENOMEM;
91550d41234SKalle Valo 				goto out;
91650d41234SKalle Valo 			}
91750d41234SKalle Valo 
91850d41234SKalle Valo 			ar->fw_otp_len = ie_len;
91950d41234SKalle Valo 			break;
92050d41234SKalle Valo 		case ATH6KL_FW_IE_FW_IMAGE:
921ef548626SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
9226bc36431SKalle Valo 				ie_len);
9236bc36431SKalle Valo 
92450d41234SKalle Valo 			ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
92550d41234SKalle Valo 
92650d41234SKalle Valo 			if (ar->fw == NULL) {
92750d41234SKalle Valo 				ret = -ENOMEM;
92850d41234SKalle Valo 				goto out;
92950d41234SKalle Valo 			}
93050d41234SKalle Valo 
93150d41234SKalle Valo 			ar->fw_len = ie_len;
93250d41234SKalle Valo 			break;
93350d41234SKalle Valo 		case ATH6KL_FW_IE_PATCH_IMAGE:
934ef548626SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
9356bc36431SKalle Valo 				ie_len);
9366bc36431SKalle Valo 
93750d41234SKalle Valo 			ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
93850d41234SKalle Valo 
93950d41234SKalle Valo 			if (ar->fw_patch == NULL) {
94050d41234SKalle Valo 				ret = -ENOMEM;
94150d41234SKalle Valo 				goto out;
94250d41234SKalle Valo 			}
94350d41234SKalle Valo 
94450d41234SKalle Valo 			ar->fw_patch_len = ie_len;
94550d41234SKalle Valo 			break;
9468a137480SKalle Valo 		case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
9478a137480SKalle Valo 			val = (__le32 *) data;
9488a137480SKalle Valo 			ar->hw.reserved_ram_size = le32_to_cpup(val);
9496bc36431SKalle Valo 
9506bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
9516bc36431SKalle Valo 				   "found reserved ram size ie 0x%d\n",
9526bc36431SKalle Valo 				   ar->hw.reserved_ram_size);
9538a137480SKalle Valo 			break;
95497e0496dSKalle Valo 		case ATH6KL_FW_IE_CAPABILITIES:
9556bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
956ef548626SKalle Valo 				   "found firmware capabilities ie (%zd B)\n",
9576bc36431SKalle Valo 				   ie_len);
9586bc36431SKalle Valo 
95997e0496dSKalle Valo 			for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
96097e0496dSKalle Valo 				index = ALIGN(i, 8) / 8;
96197e0496dSKalle Valo 				bit = i % 8;
96297e0496dSKalle Valo 
96397e0496dSKalle Valo 				if (data[index] & (1 << bit))
96497e0496dSKalle Valo 					__set_bit(i, ar->fw_capabilities);
96597e0496dSKalle Valo 			}
9666bc36431SKalle Valo 
9676bc36431SKalle Valo 			ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
9686bc36431SKalle Valo 					ar->fw_capabilities,
9696bc36431SKalle Valo 					sizeof(ar->fw_capabilities));
97097e0496dSKalle Valo 			break;
9711b4304daSKalle Valo 		case ATH6KL_FW_IE_PATCH_ADDR:
9721b4304daSKalle Valo 			if (ie_len != sizeof(*val))
9731b4304daSKalle Valo 				break;
9741b4304daSKalle Valo 
9751b4304daSKalle Valo 			val = (__le32 *) data;
9761b4304daSKalle Valo 			ar->hw.dataset_patch_addr = le32_to_cpup(val);
9776bc36431SKalle Valo 
9786bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
9796bc36431SKalle Valo 				   "found patch address ie 0x%d\n",
9806bc36431SKalle Valo 				   ar->hw.dataset_patch_addr);
9811b4304daSKalle Valo 			break;
98250d41234SKalle Valo 		default:
9836bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
98450d41234SKalle Valo 				   le32_to_cpup(&hdr->id));
98550d41234SKalle Valo 			break;
98650d41234SKalle Valo 		}
98750d41234SKalle Valo 
98850d41234SKalle Valo 		len -= ie_len;
98950d41234SKalle Valo 		data += ie_len;
99050d41234SKalle Valo 	};
99150d41234SKalle Valo 
99250d41234SKalle Valo 	ret = 0;
99350d41234SKalle Valo out:
99450d41234SKalle Valo 	release_firmware(fw);
99550d41234SKalle Valo 
99650d41234SKalle Valo 	return ret;
99750d41234SKalle Valo }
99850d41234SKalle Valo 
99950d41234SKalle Valo static int ath6kl_fetch_firmwares(struct ath6kl *ar)
100050d41234SKalle Valo {
100150d41234SKalle Valo 	int ret;
100250d41234SKalle Valo 
100350d41234SKalle Valo 	ret = ath6kl_fetch_board_file(ar);
100450d41234SKalle Valo 	if (ret)
100550d41234SKalle Valo 		return ret;
100650d41234SKalle Valo 
100750d41234SKalle Valo 	ret = ath6kl_fetch_fw_api2(ar);
10086bc36431SKalle Valo 	if (ret == 0) {
10096bc36431SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
101050d41234SKalle Valo 		return 0;
10116bc36431SKalle Valo 	}
101250d41234SKalle Valo 
101350d41234SKalle Valo 	ret = ath6kl_fetch_fw_api1(ar);
101450d41234SKalle Valo 	if (ret)
101550d41234SKalle Valo 		return ret;
101650d41234SKalle Valo 
10176bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
10186bc36431SKalle Valo 
101950d41234SKalle Valo 	return 0;
102050d41234SKalle Valo }
102150d41234SKalle Valo 
1022bdcd8170SKalle Valo static int ath6kl_upload_board_file(struct ath6kl *ar)
1023bdcd8170SKalle Valo {
1024bdcd8170SKalle Valo 	u32 board_address, board_ext_address, param;
102531024d99SKevin Fang 	u32 board_data_size, board_ext_data_size;
1026bdcd8170SKalle Valo 	int ret;
1027bdcd8170SKalle Valo 
1028772c31eeSKalle Valo 	if (WARN_ON(ar->fw_board == NULL))
1029772c31eeSKalle Valo 		return -ENOENT;
1030bdcd8170SKalle Valo 
103131024d99SKevin Fang 	/*
103231024d99SKevin Fang 	 * Determine where in Target RAM to write Board Data.
103331024d99SKevin Fang 	 * For AR6004, host determine Target RAM address for
103431024d99SKevin Fang 	 * writing board data.
103531024d99SKevin Fang 	 */
10360d4d72bfSKalle Valo 	if (ar->hw.board_addr != 0) {
10370d4d72bfSKalle Valo 		board_address = ar->hw.board_addr;
103831024d99SKevin Fang 		ath6kl_bmi_write(ar,
103931024d99SKevin Fang 				ath6kl_get_hi_item_addr(ar,
104031024d99SKevin Fang 				HI_ITEM(hi_board_data)),
104131024d99SKevin Fang 				(u8 *) &board_address, 4);
104231024d99SKevin Fang 	} else {
1043bdcd8170SKalle Valo 		ath6kl_bmi_read(ar,
1044bdcd8170SKalle Valo 				ath6kl_get_hi_item_addr(ar,
1045bdcd8170SKalle Valo 				HI_ITEM(hi_board_data)),
1046bdcd8170SKalle Valo 				(u8 *) &board_address, 4);
104731024d99SKevin Fang 	}
104831024d99SKevin Fang 
1049bdcd8170SKalle Valo 	/* determine where in target ram to write extended board data */
1050bdcd8170SKalle Valo 	ath6kl_bmi_read(ar,
1051bdcd8170SKalle Valo 			ath6kl_get_hi_item_addr(ar,
1052bdcd8170SKalle Valo 			HI_ITEM(hi_board_ext_data)),
1053bdcd8170SKalle Valo 			(u8 *) &board_ext_address, 4);
1054bdcd8170SKalle Valo 
105550e2740bSKalle Valo 	if (ar->target_type == TARGET_TYPE_AR6003 &&
105650e2740bSKalle Valo 	    board_ext_address == 0) {
1057bdcd8170SKalle Valo 		ath6kl_err("Failed to get board file target address.\n");
1058bdcd8170SKalle Valo 		return -EINVAL;
1059bdcd8170SKalle Valo 	}
1060bdcd8170SKalle Valo 
106131024d99SKevin Fang 	switch (ar->target_type) {
106231024d99SKevin Fang 	case TARGET_TYPE_AR6003:
106331024d99SKevin Fang 		board_data_size = AR6003_BOARD_DATA_SZ;
106431024d99SKevin Fang 		board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
106531024d99SKevin Fang 		break;
106631024d99SKevin Fang 	case TARGET_TYPE_AR6004:
106731024d99SKevin Fang 		board_data_size = AR6004_BOARD_DATA_SZ;
106831024d99SKevin Fang 		board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
106931024d99SKevin Fang 		break;
107031024d99SKevin Fang 	default:
107131024d99SKevin Fang 		WARN_ON(1);
107231024d99SKevin Fang 		return -EINVAL;
107331024d99SKevin Fang 		break;
107431024d99SKevin Fang 	}
107531024d99SKevin Fang 
107650e2740bSKalle Valo 	if (board_ext_address &&
107750e2740bSKalle Valo 	    ar->fw_board_len == (board_data_size + board_ext_data_size)) {
107831024d99SKevin Fang 
1079bdcd8170SKalle Valo 		/* write extended board data */
10806bc36431SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_BOOT,
10816bc36431SKalle Valo 			   "writing extended board data to 0x%x (%d B)\n",
10826bc36431SKalle Valo 			   board_ext_address, board_ext_data_size);
10836bc36431SKalle Valo 
1084bdcd8170SKalle Valo 		ret = ath6kl_bmi_write(ar, board_ext_address,
108531024d99SKevin Fang 				       ar->fw_board + board_data_size,
108631024d99SKevin Fang 				       board_ext_data_size);
1087bdcd8170SKalle Valo 		if (ret) {
1088bdcd8170SKalle Valo 			ath6kl_err("Failed to write extended board data: %d\n",
1089bdcd8170SKalle Valo 				   ret);
1090bdcd8170SKalle Valo 			return ret;
1091bdcd8170SKalle Valo 		}
1092bdcd8170SKalle Valo 
1093bdcd8170SKalle Valo 		/* record that extended board data is initialized */
109431024d99SKevin Fang 		param = (board_ext_data_size << 16) | 1;
109531024d99SKevin Fang 
1096bdcd8170SKalle Valo 		ath6kl_bmi_write(ar,
1097bdcd8170SKalle Valo 				 ath6kl_get_hi_item_addr(ar,
1098bdcd8170SKalle Valo 				 HI_ITEM(hi_board_ext_data_config)),
1099bdcd8170SKalle Valo 				 (unsigned char *) &param, 4);
1100bdcd8170SKalle Valo 	}
1101bdcd8170SKalle Valo 
110231024d99SKevin Fang 	if (ar->fw_board_len < board_data_size) {
1103bdcd8170SKalle Valo 		ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1104bdcd8170SKalle Valo 		ret = -EINVAL;
1105bdcd8170SKalle Valo 		return ret;
1106bdcd8170SKalle Valo 	}
1107bdcd8170SKalle Valo 
11086bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
11096bc36431SKalle Valo 		   board_address, board_data_size);
11106bc36431SKalle Valo 
1111bdcd8170SKalle Valo 	ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
111231024d99SKevin Fang 			       board_data_size);
1113bdcd8170SKalle Valo 
1114bdcd8170SKalle Valo 	if (ret) {
1115bdcd8170SKalle Valo 		ath6kl_err("Board file bmi write failed: %d\n", ret);
1116bdcd8170SKalle Valo 		return ret;
1117bdcd8170SKalle Valo 	}
1118bdcd8170SKalle Valo 
1119bdcd8170SKalle Valo 	/* record the fact that Board Data IS initialized */
1120bdcd8170SKalle Valo 	param = 1;
1121bdcd8170SKalle Valo 	ath6kl_bmi_write(ar,
1122bdcd8170SKalle Valo 			 ath6kl_get_hi_item_addr(ar,
1123bdcd8170SKalle Valo 			 HI_ITEM(hi_board_data_initialized)),
1124bdcd8170SKalle Valo 			 (u8 *)&param, 4);
1125bdcd8170SKalle Valo 
1126bdcd8170SKalle Valo 	return ret;
1127bdcd8170SKalle Valo }
1128bdcd8170SKalle Valo 
1129bdcd8170SKalle Valo static int ath6kl_upload_otp(struct ath6kl *ar)
1130bdcd8170SKalle Valo {
1131bdcd8170SKalle Valo 	u32 address, param;
1132bef26a7fSKalle Valo 	bool from_hw = false;
1133bdcd8170SKalle Valo 	int ret;
1134bdcd8170SKalle Valo 
113550e2740bSKalle Valo 	if (ar->fw_otp == NULL)
113650e2740bSKalle Valo 		return 0;
1137bdcd8170SKalle Valo 
1138a01ac414SKalle Valo 	address = ar->hw.app_load_addr;
1139bdcd8170SKalle Valo 
1140ef548626SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
11416bc36431SKalle Valo 		   ar->fw_otp_len);
11426bc36431SKalle Valo 
1143bdcd8170SKalle Valo 	ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1144bdcd8170SKalle Valo 				       ar->fw_otp_len);
1145bdcd8170SKalle Valo 	if (ret) {
1146bdcd8170SKalle Valo 		ath6kl_err("Failed to upload OTP file: %d\n", ret);
1147bdcd8170SKalle Valo 		return ret;
1148bdcd8170SKalle Valo 	}
1149bdcd8170SKalle Valo 
1150639d0b89SKalle Valo 	/* read firmware start address */
1151639d0b89SKalle Valo 	ret = ath6kl_bmi_read(ar,
1152639d0b89SKalle Valo 			      ath6kl_get_hi_item_addr(ar,
1153639d0b89SKalle Valo 						      HI_ITEM(hi_app_start)),
1154639d0b89SKalle Valo 			      (u8 *) &address, sizeof(address));
1155639d0b89SKalle Valo 
1156639d0b89SKalle Valo 	if (ret) {
1157639d0b89SKalle Valo 		ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1158639d0b89SKalle Valo 		return ret;
1159639d0b89SKalle Valo 	}
1160639d0b89SKalle Valo 
1161bef26a7fSKalle Valo 	if (ar->hw.app_start_override_addr == 0) {
1162639d0b89SKalle Valo 		ar->hw.app_start_override_addr = address;
1163bef26a7fSKalle Valo 		from_hw = true;
1164bef26a7fSKalle Valo 	}
1165639d0b89SKalle Valo 
1166bef26a7fSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1167bef26a7fSKalle Valo 		   from_hw ? " (from hw)" : "",
11686bc36431SKalle Valo 		   ar->hw.app_start_override_addr);
11696bc36431SKalle Valo 
1170bdcd8170SKalle Valo 	/* execute the OTP code */
1171bef26a7fSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1172bef26a7fSKalle Valo 		   ar->hw.app_start_override_addr);
1173bdcd8170SKalle Valo 	param = 0;
1174bef26a7fSKalle Valo 	ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1175bdcd8170SKalle Valo 
1176bdcd8170SKalle Valo 	return ret;
1177bdcd8170SKalle Valo }
1178bdcd8170SKalle Valo 
1179bdcd8170SKalle Valo static int ath6kl_upload_firmware(struct ath6kl *ar)
1180bdcd8170SKalle Valo {
1181bdcd8170SKalle Valo 	u32 address;
1182bdcd8170SKalle Valo 	int ret;
1183bdcd8170SKalle Valo 
1184772c31eeSKalle Valo 	if (WARN_ON(ar->fw == NULL))
118550e2740bSKalle Valo 		return 0;
1186bdcd8170SKalle Valo 
1187a01ac414SKalle Valo 	address = ar->hw.app_load_addr;
1188bdcd8170SKalle Valo 
1189ef548626SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
11906bc36431SKalle Valo 		   address, ar->fw_len);
11916bc36431SKalle Valo 
1192bdcd8170SKalle Valo 	ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1193bdcd8170SKalle Valo 
1194bdcd8170SKalle Valo 	if (ret) {
1195bdcd8170SKalle Valo 		ath6kl_err("Failed to write firmware: %d\n", ret);
1196bdcd8170SKalle Valo 		return ret;
1197bdcd8170SKalle Valo 	}
1198bdcd8170SKalle Valo 
119931024d99SKevin Fang 	/*
120031024d99SKevin Fang 	 * Set starting address for firmware
120131024d99SKevin Fang 	 * Don't need to setup app_start override addr on AR6004
120231024d99SKevin Fang 	 */
120331024d99SKevin Fang 	if (ar->target_type != TARGET_TYPE_AR6004) {
1204a01ac414SKalle Valo 		address = ar->hw.app_start_override_addr;
1205bdcd8170SKalle Valo 		ath6kl_bmi_set_app_start(ar, address);
120631024d99SKevin Fang 	}
1207bdcd8170SKalle Valo 	return ret;
1208bdcd8170SKalle Valo }
1209bdcd8170SKalle Valo 
1210bdcd8170SKalle Valo static int ath6kl_upload_patch(struct ath6kl *ar)
1211bdcd8170SKalle Valo {
1212bdcd8170SKalle Valo 	u32 address, param;
1213bdcd8170SKalle Valo 	int ret;
1214bdcd8170SKalle Valo 
121550e2740bSKalle Valo 	if (ar->fw_patch == NULL)
121650e2740bSKalle Valo 		return 0;
1217bdcd8170SKalle Valo 
1218a01ac414SKalle Valo 	address = ar->hw.dataset_patch_addr;
1219bdcd8170SKalle Valo 
1220ef548626SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
12216bc36431SKalle Valo 		   address, ar->fw_patch_len);
12226bc36431SKalle Valo 
1223bdcd8170SKalle Valo 	ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1224bdcd8170SKalle Valo 	if (ret) {
1225bdcd8170SKalle Valo 		ath6kl_err("Failed to write patch file: %d\n", ret);
1226bdcd8170SKalle Valo 		return ret;
1227bdcd8170SKalle Valo 	}
1228bdcd8170SKalle Valo 
1229bdcd8170SKalle Valo 	param = address;
1230bdcd8170SKalle Valo 	ath6kl_bmi_write(ar,
1231bdcd8170SKalle Valo 			 ath6kl_get_hi_item_addr(ar,
1232bdcd8170SKalle Valo 			 HI_ITEM(hi_dset_list_head)),
1233bdcd8170SKalle Valo 			 (unsigned char *) &param, 4);
1234bdcd8170SKalle Valo 
1235bdcd8170SKalle Valo 	return 0;
1236bdcd8170SKalle Valo }
1237bdcd8170SKalle Valo 
1238bdcd8170SKalle Valo static int ath6kl_init_upload(struct ath6kl *ar)
1239bdcd8170SKalle Valo {
1240bdcd8170SKalle Valo 	u32 param, options, sleep, address;
1241bdcd8170SKalle Valo 	int status = 0;
1242bdcd8170SKalle Valo 
124331024d99SKevin Fang 	if (ar->target_type != TARGET_TYPE_AR6003 &&
124431024d99SKevin Fang 		ar->target_type != TARGET_TYPE_AR6004)
1245bdcd8170SKalle Valo 		return -EINVAL;
1246bdcd8170SKalle Valo 
1247bdcd8170SKalle Valo 	/* temporarily disable system sleep */
1248bdcd8170SKalle Valo 	address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1249bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_read(ar, address, &param);
1250bdcd8170SKalle Valo 	if (status)
1251bdcd8170SKalle Valo 		return status;
1252bdcd8170SKalle Valo 
1253bdcd8170SKalle Valo 	options = param;
1254bdcd8170SKalle Valo 
1255bdcd8170SKalle Valo 	param |= ATH6KL_OPTION_SLEEP_DISABLE;
1256bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1257bdcd8170SKalle Valo 	if (status)
1258bdcd8170SKalle Valo 		return status;
1259bdcd8170SKalle Valo 
1260bdcd8170SKalle Valo 	address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1261bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_read(ar, address, &param);
1262bdcd8170SKalle Valo 	if (status)
1263bdcd8170SKalle Valo 		return status;
1264bdcd8170SKalle Valo 
1265bdcd8170SKalle Valo 	sleep = param;
1266bdcd8170SKalle Valo 
1267bdcd8170SKalle Valo 	param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1268bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1269bdcd8170SKalle Valo 	if (status)
1270bdcd8170SKalle Valo 		return status;
1271bdcd8170SKalle Valo 
1272bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1273bdcd8170SKalle Valo 		   options, sleep);
1274bdcd8170SKalle Valo 
1275bdcd8170SKalle Valo 	/* program analog PLL register */
127631024d99SKevin Fang 	/* no need to control 40/44MHz clock on AR6004 */
127731024d99SKevin Fang 	if (ar->target_type != TARGET_TYPE_AR6004) {
1278bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1279bdcd8170SKalle Valo 					      0xF9104001);
128031024d99SKevin Fang 
1281bdcd8170SKalle Valo 		if (status)
1282bdcd8170SKalle Valo 			return status;
1283bdcd8170SKalle Valo 
1284bdcd8170SKalle Valo 		/* Run at 80/88MHz by default */
1285bdcd8170SKalle Valo 		param = SM(CPU_CLOCK_STANDARD, 1);
1286bdcd8170SKalle Valo 
1287bdcd8170SKalle Valo 		address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1288bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1289bdcd8170SKalle Valo 		if (status)
1290bdcd8170SKalle Valo 			return status;
129131024d99SKevin Fang 	}
1292bdcd8170SKalle Valo 
1293bdcd8170SKalle Valo 	param = 0;
1294bdcd8170SKalle Valo 	address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1295bdcd8170SKalle Valo 	param = SM(LPO_CAL_ENABLE, 1);
1296bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1297bdcd8170SKalle Valo 	if (status)
1298bdcd8170SKalle Valo 		return status;
1299bdcd8170SKalle Valo 
1300bdcd8170SKalle Valo 	/* WAR to avoid SDIO CRC err */
1301bdcd8170SKalle Valo 	if (ar->version.target_ver == AR6003_REV2_VERSION) {
1302bdcd8170SKalle Valo 		ath6kl_err("temporary war to avoid sdio crc error\n");
1303bdcd8170SKalle Valo 
1304bdcd8170SKalle Valo 		param = 0x20;
1305bdcd8170SKalle Valo 
1306bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1307bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1308bdcd8170SKalle Valo 		if (status)
1309bdcd8170SKalle Valo 			return status;
1310bdcd8170SKalle Valo 
1311bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1312bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1313bdcd8170SKalle Valo 		if (status)
1314bdcd8170SKalle Valo 			return status;
1315bdcd8170SKalle Valo 
1316bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1317bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1318bdcd8170SKalle Valo 		if (status)
1319bdcd8170SKalle Valo 			return status;
1320bdcd8170SKalle Valo 
1321bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1322bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1323bdcd8170SKalle Valo 		if (status)
1324bdcd8170SKalle Valo 			return status;
1325bdcd8170SKalle Valo 	}
1326bdcd8170SKalle Valo 
1327bdcd8170SKalle Valo 	/* write EEPROM data to Target RAM */
1328bdcd8170SKalle Valo 	status = ath6kl_upload_board_file(ar);
1329bdcd8170SKalle Valo 	if (status)
1330bdcd8170SKalle Valo 		return status;
1331bdcd8170SKalle Valo 
1332bdcd8170SKalle Valo 	/* transfer One time Programmable data */
1333bdcd8170SKalle Valo 	status = ath6kl_upload_otp(ar);
1334bdcd8170SKalle Valo 	if (status)
1335bdcd8170SKalle Valo 		return status;
1336bdcd8170SKalle Valo 
1337bdcd8170SKalle Valo 	/* Download Target firmware */
1338bdcd8170SKalle Valo 	status = ath6kl_upload_firmware(ar);
1339bdcd8170SKalle Valo 	if (status)
1340bdcd8170SKalle Valo 		return status;
1341bdcd8170SKalle Valo 
1342bdcd8170SKalle Valo 	status = ath6kl_upload_patch(ar);
1343bdcd8170SKalle Valo 	if (status)
1344bdcd8170SKalle Valo 		return status;
1345bdcd8170SKalle Valo 
1346bdcd8170SKalle Valo 	/* Restore system sleep */
1347bdcd8170SKalle Valo 	address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1348bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, sleep);
1349bdcd8170SKalle Valo 	if (status)
1350bdcd8170SKalle Valo 		return status;
1351bdcd8170SKalle Valo 
1352bdcd8170SKalle Valo 	address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1353bdcd8170SKalle Valo 	param = options | 0x20;
1354bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1355bdcd8170SKalle Valo 	if (status)
1356bdcd8170SKalle Valo 		return status;
1357bdcd8170SKalle Valo 
1358bdcd8170SKalle Valo 	/* Configure GPIO AR6003 UART */
1359bdcd8170SKalle Valo 	param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
1360bdcd8170SKalle Valo 	status = ath6kl_bmi_write(ar,
1361bdcd8170SKalle Valo 				  ath6kl_get_hi_item_addr(ar,
1362bdcd8170SKalle Valo 				  HI_ITEM(hi_dbg_uart_txpin)),
1363bdcd8170SKalle Valo 				  (u8 *)&param, 4);
1364bdcd8170SKalle Valo 
1365bdcd8170SKalle Valo 	return status;
1366bdcd8170SKalle Valo }
1367bdcd8170SKalle Valo 
1368a01ac414SKalle Valo static int ath6kl_init_hw_params(struct ath6kl *ar)
1369a01ac414SKalle Valo {
1370856f4b31SKalle Valo 	const struct ath6kl_hw *hw;
1371856f4b31SKalle Valo 	int i;
1372bef26a7fSKalle Valo 
1373856f4b31SKalle Valo 	for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1374856f4b31SKalle Valo 		hw = &hw_list[i];
1375bef26a7fSKalle Valo 
1376856f4b31SKalle Valo 		if (hw->id == ar->version.target_ver)
1377a01ac414SKalle Valo 			break;
1378856f4b31SKalle Valo 	}
1379856f4b31SKalle Valo 
1380856f4b31SKalle Valo 	if (i == ARRAY_SIZE(hw_list)) {
1381a01ac414SKalle Valo 		ath6kl_err("Unsupported hardware version: 0x%x\n",
1382a01ac414SKalle Valo 			   ar->version.target_ver);
1383a01ac414SKalle Valo 		return -EINVAL;
1384a01ac414SKalle Valo 	}
1385a01ac414SKalle Valo 
1386856f4b31SKalle Valo 	ar->hw = *hw;
1387856f4b31SKalle Valo 
13886bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT,
13896bc36431SKalle Valo 		   "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
13906bc36431SKalle Valo 		   ar->version.target_ver, ar->target_type,
13916bc36431SKalle Valo 		   ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
13926bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT,
13936bc36431SKalle Valo 		   "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
13946bc36431SKalle Valo 		   ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
13956bc36431SKalle Valo 		   ar->hw.reserved_ram_size);
13966bc36431SKalle Valo 
1397a01ac414SKalle Valo 	return 0;
1398a01ac414SKalle Valo }
1399a01ac414SKalle Valo 
14005fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar)
140120459ee2SKalle Valo {
140220459ee2SKalle Valo 	long timeleft;
140320459ee2SKalle Valo 	int ret, i;
140420459ee2SKalle Valo 
14055fe4dffbSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
14065fe4dffbSKalle Valo 
140720459ee2SKalle Valo 	ret = ath6kl_hif_power_on(ar);
140820459ee2SKalle Valo 	if (ret)
140920459ee2SKalle Valo 		return ret;
141020459ee2SKalle Valo 
141120459ee2SKalle Valo 	ret = ath6kl_configure_target(ar);
141220459ee2SKalle Valo 	if (ret)
141320459ee2SKalle Valo 		goto err_power_off;
141420459ee2SKalle Valo 
141520459ee2SKalle Valo 	ret = ath6kl_init_upload(ar);
141620459ee2SKalle Valo 	if (ret)
141720459ee2SKalle Valo 		goto err_power_off;
141820459ee2SKalle Valo 
141920459ee2SKalle Valo 	/* Do we need to finish the BMI phase */
142020459ee2SKalle Valo 	/* FIXME: return error from ath6kl_bmi_done() */
142120459ee2SKalle Valo 	if (ath6kl_bmi_done(ar)) {
142220459ee2SKalle Valo 		ret = -EIO;
142320459ee2SKalle Valo 		goto err_power_off;
142420459ee2SKalle Valo 	}
142520459ee2SKalle Valo 
142620459ee2SKalle Valo 	/*
142720459ee2SKalle Valo 	 * The reason we have to wait for the target here is that the
142820459ee2SKalle Valo 	 * driver layer has to init BMI in order to set the host block
142920459ee2SKalle Valo 	 * size.
143020459ee2SKalle Valo 	 */
143120459ee2SKalle Valo 	if (ath6kl_htc_wait_target(ar->htc_target)) {
143220459ee2SKalle Valo 		ret = -EIO;
143320459ee2SKalle Valo 		goto err_power_off;
143420459ee2SKalle Valo 	}
143520459ee2SKalle Valo 
143620459ee2SKalle Valo 	if (ath6kl_init_service_ep(ar)) {
143720459ee2SKalle Valo 		ret = -EIO;
143820459ee2SKalle Valo 		goto err_cleanup_scatter;
143920459ee2SKalle Valo 	}
144020459ee2SKalle Valo 
144120459ee2SKalle Valo 	/* setup credit distribution */
144220459ee2SKalle Valo 	ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
144320459ee2SKalle Valo 
144420459ee2SKalle Valo 	/* start HTC */
144520459ee2SKalle Valo 	ret = ath6kl_htc_start(ar->htc_target);
144620459ee2SKalle Valo 	if (ret) {
144720459ee2SKalle Valo 		/* FIXME: call this */
144820459ee2SKalle Valo 		ath6kl_cookie_cleanup(ar);
144920459ee2SKalle Valo 		goto err_cleanup_scatter;
145020459ee2SKalle Valo 	}
145120459ee2SKalle Valo 
145220459ee2SKalle Valo 	/* Wait for Wmi event to be ready */
145320459ee2SKalle Valo 	timeleft = wait_event_interruptible_timeout(ar->event_wq,
145420459ee2SKalle Valo 						    test_bit(WMI_READY,
145520459ee2SKalle Valo 							     &ar->flag),
145620459ee2SKalle Valo 						    WMI_TIMEOUT);
145720459ee2SKalle Valo 
145820459ee2SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
145920459ee2SKalle Valo 
146020459ee2SKalle Valo 	if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
146120459ee2SKalle Valo 		ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
146220459ee2SKalle Valo 			   ATH6KL_ABI_VERSION, ar->version.abi_ver);
146320459ee2SKalle Valo 		ret = -EIO;
146420459ee2SKalle Valo 		goto err_htc_stop;
146520459ee2SKalle Valo 	}
146620459ee2SKalle Valo 
146720459ee2SKalle Valo 	if (!timeleft || signal_pending(current)) {
146820459ee2SKalle Valo 		ath6kl_err("wmi is not ready or wait was interrupted\n");
146920459ee2SKalle Valo 		ret = -EIO;
147020459ee2SKalle Valo 		goto err_htc_stop;
147120459ee2SKalle Valo 	}
147220459ee2SKalle Valo 
147320459ee2SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
147420459ee2SKalle Valo 
147520459ee2SKalle Valo 	/* communicate the wmi protocol verision to the target */
147620459ee2SKalle Valo 	/* FIXME: return error */
147720459ee2SKalle Valo 	if ((ath6kl_set_host_app_area(ar)) != 0)
147820459ee2SKalle Valo 		ath6kl_err("unable to set the host app area\n");
147920459ee2SKalle Valo 
148020459ee2SKalle Valo 	for (i = 0; i < MAX_NUM_VIF; i++) {
148120459ee2SKalle Valo 		ret = ath6kl_target_config_wlan_params(ar, i);
148220459ee2SKalle Valo 		if (ret)
148320459ee2SKalle Valo 			goto err_htc_stop;
148420459ee2SKalle Valo 	}
148520459ee2SKalle Valo 
148676a9fbe2SKalle Valo 	ar->state = ATH6KL_STATE_ON;
148776a9fbe2SKalle Valo 
148820459ee2SKalle Valo 	return 0;
148920459ee2SKalle Valo 
149020459ee2SKalle Valo err_htc_stop:
149120459ee2SKalle Valo 	ath6kl_htc_stop(ar->htc_target);
149220459ee2SKalle Valo err_cleanup_scatter:
149320459ee2SKalle Valo 	ath6kl_hif_cleanup_scatter(ar);
149420459ee2SKalle Valo err_power_off:
149520459ee2SKalle Valo 	ath6kl_hif_power_off(ar);
149620459ee2SKalle Valo 
149720459ee2SKalle Valo 	return ret;
149820459ee2SKalle Valo }
149920459ee2SKalle Valo 
15005fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar)
15015fe4dffbSKalle Valo {
15025fe4dffbSKalle Valo 	int ret;
15035fe4dffbSKalle Valo 
15045fe4dffbSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
15055fe4dffbSKalle Valo 
15065fe4dffbSKalle Valo 	ath6kl_htc_stop(ar->htc_target);
15075fe4dffbSKalle Valo 
15085fe4dffbSKalle Valo 	ath6kl_hif_stop(ar);
15095fe4dffbSKalle Valo 
15105fe4dffbSKalle Valo 	ath6kl_bmi_reset(ar);
15115fe4dffbSKalle Valo 
15125fe4dffbSKalle Valo 	ret = ath6kl_hif_power_off(ar);
15135fe4dffbSKalle Valo 	if (ret)
15145fe4dffbSKalle Valo 		ath6kl_warn("failed to power off hif: %d\n", ret);
15155fe4dffbSKalle Valo 
151676a9fbe2SKalle Valo 	ar->state = ATH6KL_STATE_OFF;
151776a9fbe2SKalle Valo 
15185fe4dffbSKalle Valo 	return 0;
15195fe4dffbSKalle Valo }
15205fe4dffbSKalle Valo 
1521bdcd8170SKalle Valo int ath6kl_core_init(struct ath6kl *ar)
1522bdcd8170SKalle Valo {
1523bdcd8170SKalle Valo 	struct ath6kl_bmi_target_info targ_info;
152461448a93SKalle Valo 	struct net_device *ndev;
152520459ee2SKalle Valo 	int ret = 0, i;
1526bdcd8170SKalle Valo 
1527bdcd8170SKalle Valo 	ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
1528bdcd8170SKalle Valo 	if (!ar->ath6kl_wq)
1529bdcd8170SKalle Valo 		return -ENOMEM;
1530bdcd8170SKalle Valo 
1531bdcd8170SKalle Valo 	ret = ath6kl_bmi_init(ar);
1532bdcd8170SKalle Valo 	if (ret)
1533bdcd8170SKalle Valo 		goto err_wq;
1534bdcd8170SKalle Valo 
153520459ee2SKalle Valo 	/*
153620459ee2SKalle Valo 	 * Turn on power to get hardware (target) version and leave power
153720459ee2SKalle Valo 	 * on delibrately as we will boot the hardware anyway within few
153820459ee2SKalle Valo 	 * seconds.
153920459ee2SKalle Valo 	 */
1540b2e75698SKalle Valo 	ret = ath6kl_hif_power_on(ar);
1541bdcd8170SKalle Valo 	if (ret)
1542bdcd8170SKalle Valo 		goto err_bmi_cleanup;
1543bdcd8170SKalle Valo 
1544b2e75698SKalle Valo 	ret = ath6kl_bmi_get_target_info(ar, &targ_info);
1545b2e75698SKalle Valo 	if (ret)
1546b2e75698SKalle Valo 		goto err_power_off;
1547b2e75698SKalle Valo 
1548bdcd8170SKalle Valo 	ar->version.target_ver = le32_to_cpu(targ_info.version);
1549bdcd8170SKalle Valo 	ar->target_type = le32_to_cpu(targ_info.type);
1550be98e3a4SVasanthakumar Thiagarajan 	ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
1551bdcd8170SKalle Valo 
1552a01ac414SKalle Valo 	ret = ath6kl_init_hw_params(ar);
1553a01ac414SKalle Valo 	if (ret)
1554b2e75698SKalle Valo 		goto err_power_off;
1555a01ac414SKalle Valo 
1556ad226ec2SKalle Valo 	ar->htc_target = ath6kl_htc_create(ar);
1557bdcd8170SKalle Valo 
1558bdcd8170SKalle Valo 	if (!ar->htc_target) {
1559bdcd8170SKalle Valo 		ret = -ENOMEM;
1560b2e75698SKalle Valo 		goto err_power_off;
1561bdcd8170SKalle Valo 	}
1562bdcd8170SKalle Valo 
1563772c31eeSKalle Valo 	ret = ath6kl_fetch_firmwares(ar);
1564772c31eeSKalle Valo 	if (ret)
1565772c31eeSKalle Valo 		goto err_htc_cleanup;
1566772c31eeSKalle Valo 
156761448a93SKalle Valo 	/* FIXME: we should free all firmwares in the error cases below */
156861448a93SKalle Valo 
156961448a93SKalle Valo 	/* Indicate that WMI is enabled (although not ready yet) */
157061448a93SKalle Valo 	set_bit(WMI_ENABLED, &ar->flag);
157161448a93SKalle Valo 	ar->wmi = ath6kl_wmi_init(ar);
157261448a93SKalle Valo 	if (!ar->wmi) {
157361448a93SKalle Valo 		ath6kl_err("failed to initialize wmi\n");
157461448a93SKalle Valo 		ret = -EIO;
157561448a93SKalle Valo 		goto err_htc_cleanup;
157661448a93SKalle Valo 	}
157761448a93SKalle Valo 
157861448a93SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
157961448a93SKalle Valo 
158061448a93SKalle Valo 	ret = ath6kl_register_ieee80211_hw(ar);
158161448a93SKalle Valo 	if (ret)
158261448a93SKalle Valo 		goto err_node_cleanup;
158361448a93SKalle Valo 
158461448a93SKalle Valo 	ret = ath6kl_debug_init(ar);
158561448a93SKalle Valo 	if (ret) {
158661448a93SKalle Valo 		wiphy_unregister(ar->wiphy);
158761448a93SKalle Valo 		goto err_node_cleanup;
158861448a93SKalle Valo 	}
158961448a93SKalle Valo 
159061448a93SKalle Valo 	for (i = 0; i < MAX_NUM_VIF; i++)
159161448a93SKalle Valo 		ar->avail_idx_map |= BIT(i);
159261448a93SKalle Valo 
159361448a93SKalle Valo 	rtnl_lock();
159461448a93SKalle Valo 
159561448a93SKalle Valo 	/* Add an initial station interface */
159661448a93SKalle Valo 	ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
159761448a93SKalle Valo 				    INFRA_NETWORK);
159861448a93SKalle Valo 
159961448a93SKalle Valo 	rtnl_unlock();
160061448a93SKalle Valo 
160161448a93SKalle Valo 	if (!ndev) {
160261448a93SKalle Valo 		ath6kl_err("Failed to instantiate a network device\n");
160361448a93SKalle Valo 		ret = -ENOMEM;
160461448a93SKalle Valo 		wiphy_unregister(ar->wiphy);
160561448a93SKalle Valo 		goto err_debug_init;
160661448a93SKalle Valo 	}
160761448a93SKalle Valo 
160861448a93SKalle Valo 
160961448a93SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
161061448a93SKalle Valo 			__func__, ndev->name, ndev, ar);
161161448a93SKalle Valo 
161261448a93SKalle Valo 	/* setup access class priority mappings */
161361448a93SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest  */
161461448a93SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_BE] = 1;
161561448a93SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_VI] = 2;
161661448a93SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
161761448a93SKalle Valo 
161861448a93SKalle Valo 	/* give our connected endpoints some buffers */
161961448a93SKalle Valo 	ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
162061448a93SKalle Valo 	ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
162161448a93SKalle Valo 
162261448a93SKalle Valo 	/* allocate some buffers that handle larger AMSDU frames */
162361448a93SKalle Valo 	ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
162461448a93SKalle Valo 
162561448a93SKalle Valo 	ath6kl_cookie_init(ar);
162661448a93SKalle Valo 
162761448a93SKalle Valo 	ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
162861448a93SKalle Valo 			 ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
162961448a93SKalle Valo 
16308277de15SKalle Valo 	if (suspend_cutpower)
16318277de15SKalle Valo 		ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER;
16328277de15SKalle Valo 
163361448a93SKalle Valo 	ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
163461448a93SKalle Valo 			    WIPHY_FLAG_HAVE_AP_SME;
163561448a93SKalle Valo 
16365fe4dffbSKalle Valo 	set_bit(FIRST_BOOT, &ar->flag);
16375fe4dffbSKalle Valo 
16385fe4dffbSKalle Valo 	ret = ath6kl_init_hw_start(ar);
163920459ee2SKalle Valo 	if (ret) {
16405fe4dffbSKalle Valo 		ath6kl_err("Failed to start hardware: %d\n", ret);
164120459ee2SKalle Valo 		goto err_rxbuf_cleanup;
164261448a93SKalle Valo 	}
164361448a93SKalle Valo 
164461448a93SKalle Valo 	/*
164561448a93SKalle Valo 	 * Set mac address which is received in ready event
164661448a93SKalle Valo 	 * FIXME: Move to ath6kl_interface_add()
164761448a93SKalle Valo 	 */
164861448a93SKalle Valo 	memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
1649bdcd8170SKalle Valo 
1650bdcd8170SKalle Valo 	return ret;
1651bdcd8170SKalle Valo 
165261448a93SKalle Valo err_rxbuf_cleanup:
165361448a93SKalle Valo 	ath6kl_htc_flush_rx_buf(ar->htc_target);
165461448a93SKalle Valo 	ath6kl_cleanup_amsdu_rxbufs(ar);
165561448a93SKalle Valo 	rtnl_lock();
165661448a93SKalle Valo 	ath6kl_deinit_if_data(netdev_priv(ndev));
165761448a93SKalle Valo 	rtnl_unlock();
165861448a93SKalle Valo 	wiphy_unregister(ar->wiphy);
165961448a93SKalle Valo err_debug_init:
166061448a93SKalle Valo 	ath6kl_debug_cleanup(ar);
166161448a93SKalle Valo err_node_cleanup:
166261448a93SKalle Valo 	ath6kl_wmi_shutdown(ar->wmi);
166361448a93SKalle Valo 	clear_bit(WMI_ENABLED, &ar->flag);
166461448a93SKalle Valo 	ar->wmi = NULL;
1665bdcd8170SKalle Valo err_htc_cleanup:
1666ad226ec2SKalle Valo 	ath6kl_htc_cleanup(ar->htc_target);
1667b2e75698SKalle Valo err_power_off:
1668b2e75698SKalle Valo 	ath6kl_hif_power_off(ar);
1669bdcd8170SKalle Valo err_bmi_cleanup:
1670bdcd8170SKalle Valo 	ath6kl_bmi_cleanup(ar);
1671bdcd8170SKalle Valo err_wq:
1672bdcd8170SKalle Valo 	destroy_workqueue(ar->ath6kl_wq);
16738dafb70eSVasanthakumar Thiagarajan 
1674bdcd8170SKalle Valo 	return ret;
1675bdcd8170SKalle Valo }
1676bdcd8170SKalle Valo 
167755055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
16786db8fa53SVasanthakumar Thiagarajan {
16796db8fa53SVasanthakumar Thiagarajan 	static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
16806db8fa53SVasanthakumar Thiagarajan 	bool discon_issued;
16816db8fa53SVasanthakumar Thiagarajan 
16826db8fa53SVasanthakumar Thiagarajan 	netif_stop_queue(vif->ndev);
16836db8fa53SVasanthakumar Thiagarajan 
16846db8fa53SVasanthakumar Thiagarajan 	clear_bit(WLAN_ENABLED, &vif->flags);
16856db8fa53SVasanthakumar Thiagarajan 
16866db8fa53SVasanthakumar Thiagarajan 	if (wmi_ready) {
16876db8fa53SVasanthakumar Thiagarajan 		discon_issued = test_bit(CONNECTED, &vif->flags) ||
16886db8fa53SVasanthakumar Thiagarajan 				test_bit(CONNECT_PEND, &vif->flags);
16896db8fa53SVasanthakumar Thiagarajan 		ath6kl_disconnect(vif);
16906db8fa53SVasanthakumar Thiagarajan 		del_timer(&vif->disconnect_timer);
16916db8fa53SVasanthakumar Thiagarajan 
16926db8fa53SVasanthakumar Thiagarajan 		if (discon_issued)
16936db8fa53SVasanthakumar Thiagarajan 			ath6kl_disconnect_event(vif, DISCONNECT_CMD,
16946db8fa53SVasanthakumar Thiagarajan 						(vif->nw_type & AP_NETWORK) ?
16956db8fa53SVasanthakumar Thiagarajan 						bcast_mac : vif->bssid,
16966db8fa53SVasanthakumar Thiagarajan 						0, NULL, 0);
16976db8fa53SVasanthakumar Thiagarajan 	}
16986db8fa53SVasanthakumar Thiagarajan 
16996db8fa53SVasanthakumar Thiagarajan 	if (vif->scan_req) {
17006db8fa53SVasanthakumar Thiagarajan 		cfg80211_scan_done(vif->scan_req, true);
17016db8fa53SVasanthakumar Thiagarajan 		vif->scan_req = NULL;
17026db8fa53SVasanthakumar Thiagarajan 	}
17036db8fa53SVasanthakumar Thiagarajan }
17046db8fa53SVasanthakumar Thiagarajan 
1705bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar)
1706bdcd8170SKalle Valo {
1707990bd915SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif, *tmp_vif;
1708bdcd8170SKalle Valo 
1709bdcd8170SKalle Valo 	set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1710bdcd8170SKalle Valo 
1711bdcd8170SKalle Valo 	if (down_interruptible(&ar->sem)) {
1712bdcd8170SKalle Valo 		ath6kl_err("down_interruptible failed\n");
1713bdcd8170SKalle Valo 		return;
1714bdcd8170SKalle Valo 	}
1715bdcd8170SKalle Valo 
171611f6e40dSVasanthakumar Thiagarajan 	spin_lock_bh(&ar->list_lock);
1717990bd915SVasanthakumar Thiagarajan 	list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1718990bd915SVasanthakumar Thiagarajan 		list_del(&vif->list);
171911f6e40dSVasanthakumar Thiagarajan 		spin_unlock_bh(&ar->list_lock);
1720990bd915SVasanthakumar Thiagarajan 		ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
172127929723SVasanthakumar Thiagarajan 		rtnl_lock();
172227929723SVasanthakumar Thiagarajan 		ath6kl_deinit_if_data(vif);
172327929723SVasanthakumar Thiagarajan 		rtnl_unlock();
172411f6e40dSVasanthakumar Thiagarajan 		spin_lock_bh(&ar->list_lock);
1725990bd915SVasanthakumar Thiagarajan 	}
172611f6e40dSVasanthakumar Thiagarajan 	spin_unlock_bh(&ar->list_lock);
1727bdcd8170SKalle Valo 
17286db8fa53SVasanthakumar Thiagarajan 	clear_bit(WMI_READY, &ar->flag);
17296db8fa53SVasanthakumar Thiagarajan 
17306db8fa53SVasanthakumar Thiagarajan 	/*
17316db8fa53SVasanthakumar Thiagarajan 	 * After wmi_shudown all WMI events will be dropped. We
17326db8fa53SVasanthakumar Thiagarajan 	 * need to cleanup the buffers allocated in AP mode and
17336db8fa53SVasanthakumar Thiagarajan 	 * give disconnect notification to stack, which usually
17346db8fa53SVasanthakumar Thiagarajan 	 * happens in the disconnect_event. Simulate the disconnect
17356db8fa53SVasanthakumar Thiagarajan 	 * event by calling the function directly. Sometimes
17366db8fa53SVasanthakumar Thiagarajan 	 * disconnect_event will be received when the debug logs
17376db8fa53SVasanthakumar Thiagarajan 	 * are collected.
17386db8fa53SVasanthakumar Thiagarajan 	 */
17396db8fa53SVasanthakumar Thiagarajan 	ath6kl_wmi_shutdown(ar->wmi);
17406db8fa53SVasanthakumar Thiagarajan 
17416db8fa53SVasanthakumar Thiagarajan 	clear_bit(WMI_ENABLED, &ar->flag);
17426db8fa53SVasanthakumar Thiagarajan 	if (ar->htc_target) {
17436db8fa53SVasanthakumar Thiagarajan 		ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
17446db8fa53SVasanthakumar Thiagarajan 		ath6kl_htc_stop(ar->htc_target);
1745bdcd8170SKalle Valo 	}
1746bdcd8170SKalle Valo 
1747bdcd8170SKalle Valo 	/*
17486db8fa53SVasanthakumar Thiagarajan 	 * Try to reset the device if we can. The driver may have been
17496db8fa53SVasanthakumar Thiagarajan 	 * configure NOT to reset the target during a debug session.
1750bdcd8170SKalle Valo 	 */
17516db8fa53SVasanthakumar Thiagarajan 	ath6kl_dbg(ATH6KL_DBG_TRC,
17526db8fa53SVasanthakumar Thiagarajan 			"attempting to reset target on instance destroy\n");
17536db8fa53SVasanthakumar Thiagarajan 	ath6kl_reset_device(ar, ar->target_type, true, true);
1754bdcd8170SKalle Valo 
17556db8fa53SVasanthakumar Thiagarajan 	clear_bit(WLAN_ENABLED, &ar->flag);
1756bdcd8170SKalle Valo }
1757