1bdcd8170SKalle Valo 2bdcd8170SKalle Valo /* 3bdcd8170SKalle Valo * Copyright (c) 2011 Atheros Communications Inc. 4bdcd8170SKalle Valo * 5bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 6bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 7bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 8bdcd8170SKalle Valo * 9bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16bdcd8170SKalle Valo */ 17bdcd8170SKalle Valo 18c6efe578SStephen Rothwell #include <linux/moduleparam.h> 1992ecbff4SSam Leffler #include <linux/of.h> 20bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h> 21bdcd8170SKalle Valo #include "core.h" 22bdcd8170SKalle Valo #include "cfg80211.h" 23bdcd8170SKalle Valo #include "target.h" 24bdcd8170SKalle Valo #include "debug.h" 25bdcd8170SKalle Valo #include "hif-ops.h" 26bdcd8170SKalle Valo 27bdcd8170SKalle Valo unsigned int debug_mask; 28003353b0SKalle Valo static unsigned int testmode; 29bdcd8170SKalle Valo 30bdcd8170SKalle Valo module_param(debug_mask, uint, 0644); 31003353b0SKalle Valo module_param(testmode, uint, 0644); 32bdcd8170SKalle Valo 33bdcd8170SKalle Valo /* 34bdcd8170SKalle Valo * Include definitions here that can be used to tune the WLAN module 35bdcd8170SKalle Valo * behavior. Different customers can tune the behavior as per their needs, 36bdcd8170SKalle Valo * here. 37bdcd8170SKalle Valo */ 38bdcd8170SKalle Valo 39bdcd8170SKalle Valo /* 40bdcd8170SKalle Valo * This configuration item enable/disable keepalive support. 41bdcd8170SKalle Valo * Keepalive support: In the absence of any data traffic to AP, null 42bdcd8170SKalle Valo * frames will be sent to the AP at periodic interval, to keep the association 43bdcd8170SKalle Valo * active. This configuration item defines the periodic interval. 44bdcd8170SKalle Valo * Use value of zero to disable keepalive support 45bdcd8170SKalle Valo * Default: 60 seconds 46bdcd8170SKalle Valo */ 47bdcd8170SKalle Valo #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 48bdcd8170SKalle Valo 49bdcd8170SKalle Valo /* 50bdcd8170SKalle Valo * This configuration item sets the value of disconnect timeout 51bdcd8170SKalle Valo * Firmware delays sending the disconnec event to the host for this 52bdcd8170SKalle Valo * timeout after is gets disconnected from the current AP. 53bdcd8170SKalle Valo * If the firmware successly roams within the disconnect timeout 54bdcd8170SKalle Valo * it sends a new connect event 55bdcd8170SKalle Valo */ 56bdcd8170SKalle Valo #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 57bdcd8170SKalle Valo 58bdcd8170SKalle Valo #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8 59bdcd8170SKalle Valo 60bdcd8170SKalle Valo #define ATH6KL_DATA_OFFSET 64 61bdcd8170SKalle Valo struct sk_buff *ath6kl_buf_alloc(int size) 62bdcd8170SKalle Valo { 63bdcd8170SKalle Valo struct sk_buff *skb; 64bdcd8170SKalle Valo u16 reserved; 65bdcd8170SKalle Valo 66bdcd8170SKalle Valo /* Add chacheline space at front and back of buffer */ 67bdcd8170SKalle Valo reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 681df94a85SVasanthakumar Thiagarajan sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; 69bdcd8170SKalle Valo skb = dev_alloc_skb(size + reserved); 70bdcd8170SKalle Valo 71bdcd8170SKalle Valo if (skb) 72bdcd8170SKalle Valo skb_reserve(skb, reserved - L1_CACHE_BYTES); 73bdcd8170SKalle Valo return skb; 74bdcd8170SKalle Valo } 75bdcd8170SKalle Valo 76e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif) 77bdcd8170SKalle Valo { 783450334fSVasanthakumar Thiagarajan vif->ssid_len = 0; 793450334fSVasanthakumar Thiagarajan memset(vif->ssid, 0, sizeof(vif->ssid)); 803450334fSVasanthakumar Thiagarajan 813450334fSVasanthakumar Thiagarajan vif->dot11_auth_mode = OPEN_AUTH; 823450334fSVasanthakumar Thiagarajan vif->auth_mode = NONE_AUTH; 833450334fSVasanthakumar Thiagarajan vif->prwise_crypto = NONE_CRYPT; 843450334fSVasanthakumar Thiagarajan vif->prwise_crypto_len = 0; 853450334fSVasanthakumar Thiagarajan vif->grp_crypto = NONE_CRYPT; 863450334fSVasanthakumar Thiagarajan vif->grp_crypto_len = 0; 876f2a73f9SVasanthakumar Thiagarajan memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 888c8b65e3SVasanthakumar Thiagarajan memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); 898c8b65e3SVasanthakumar Thiagarajan memset(vif->bssid, 0, sizeof(vif->bssid)); 90f74bac54SVasanthakumar Thiagarajan vif->bss_ch = 0; 91bdcd8170SKalle Valo } 92bdcd8170SKalle Valo 93bdcd8170SKalle Valo static int ath6kl_set_host_app_area(struct ath6kl *ar) 94bdcd8170SKalle Valo { 95bdcd8170SKalle Valo u32 address, data; 96bdcd8170SKalle Valo struct host_app_area host_app_area; 97bdcd8170SKalle Valo 98bdcd8170SKalle Valo /* Fetch the address of the host_app_area_s 99bdcd8170SKalle Valo * instance in the host interest area */ 100bdcd8170SKalle Valo address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 10131024d99SKevin Fang address = TARG_VTOP(ar->target_type, address); 102bdcd8170SKalle Valo 103addb44beSKalle Valo if (ath6kl_diag_read32(ar, address, &data)) 104bdcd8170SKalle Valo return -EIO; 105bdcd8170SKalle Valo 10631024d99SKevin Fang address = TARG_VTOP(ar->target_type, data); 107cbf49a6fSKalle Valo host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); 108addb44beSKalle Valo if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 109addb44beSKalle Valo sizeof(struct host_app_area))) 110bdcd8170SKalle Valo return -EIO; 111bdcd8170SKalle Valo 112bdcd8170SKalle Valo return 0; 113bdcd8170SKalle Valo } 114bdcd8170SKalle Valo 115bdcd8170SKalle Valo static inline void set_ac2_ep_map(struct ath6kl *ar, 116bdcd8170SKalle Valo u8 ac, 117bdcd8170SKalle Valo enum htc_endpoint_id ep) 118bdcd8170SKalle Valo { 119bdcd8170SKalle Valo ar->ac2ep_map[ac] = ep; 120bdcd8170SKalle Valo ar->ep2ac_map[ep] = ac; 121bdcd8170SKalle Valo } 122bdcd8170SKalle Valo 123bdcd8170SKalle Valo /* connect to a service */ 124bdcd8170SKalle Valo static int ath6kl_connectservice(struct ath6kl *ar, 125bdcd8170SKalle Valo struct htc_service_connect_req *con_req, 126bdcd8170SKalle Valo char *desc) 127bdcd8170SKalle Valo { 128bdcd8170SKalle Valo int status; 129bdcd8170SKalle Valo struct htc_service_connect_resp response; 130bdcd8170SKalle Valo 131bdcd8170SKalle Valo memset(&response, 0, sizeof(response)); 132bdcd8170SKalle Valo 133ad226ec2SKalle Valo status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 134bdcd8170SKalle Valo if (status) { 135bdcd8170SKalle Valo ath6kl_err("failed to connect to %s service status:%d\n", 136bdcd8170SKalle Valo desc, status); 137bdcd8170SKalle Valo return status; 138bdcd8170SKalle Valo } 139bdcd8170SKalle Valo 140bdcd8170SKalle Valo switch (con_req->svc_id) { 141bdcd8170SKalle Valo case WMI_CONTROL_SVC: 142bdcd8170SKalle Valo if (test_bit(WMI_ENABLED, &ar->flag)) 143bdcd8170SKalle Valo ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 144bdcd8170SKalle Valo ar->ctrl_ep = response.endpoint; 145bdcd8170SKalle Valo break; 146bdcd8170SKalle Valo case WMI_DATA_BE_SVC: 147bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 148bdcd8170SKalle Valo break; 149bdcd8170SKalle Valo case WMI_DATA_BK_SVC: 150bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 151bdcd8170SKalle Valo break; 152bdcd8170SKalle Valo case WMI_DATA_VI_SVC: 153bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 154bdcd8170SKalle Valo break; 155bdcd8170SKalle Valo case WMI_DATA_VO_SVC: 156bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 157bdcd8170SKalle Valo break; 158bdcd8170SKalle Valo default: 159bdcd8170SKalle Valo ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 160bdcd8170SKalle Valo return -EINVAL; 161bdcd8170SKalle Valo } 162bdcd8170SKalle Valo 163bdcd8170SKalle Valo return 0; 164bdcd8170SKalle Valo } 165bdcd8170SKalle Valo 166bdcd8170SKalle Valo static int ath6kl_init_service_ep(struct ath6kl *ar) 167bdcd8170SKalle Valo { 168bdcd8170SKalle Valo struct htc_service_connect_req connect; 169bdcd8170SKalle Valo 170bdcd8170SKalle Valo memset(&connect, 0, sizeof(connect)); 171bdcd8170SKalle Valo 172bdcd8170SKalle Valo /* these fields are the same for all service endpoints */ 173bdcd8170SKalle Valo connect.ep_cb.rx = ath6kl_rx; 174bdcd8170SKalle Valo connect.ep_cb.rx_refill = ath6kl_rx_refill; 175bdcd8170SKalle Valo connect.ep_cb.tx_full = ath6kl_tx_queue_full; 176bdcd8170SKalle Valo 177bdcd8170SKalle Valo /* 178bdcd8170SKalle Valo * Set the max queue depth so that our ath6kl_tx_queue_full handler 179bdcd8170SKalle Valo * gets called. 180bdcd8170SKalle Valo */ 181bdcd8170SKalle Valo connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 182bdcd8170SKalle Valo connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 183bdcd8170SKalle Valo if (!connect.ep_cb.rx_refill_thresh) 184bdcd8170SKalle Valo connect.ep_cb.rx_refill_thresh++; 185bdcd8170SKalle Valo 186bdcd8170SKalle Valo /* connect to control service */ 187bdcd8170SKalle Valo connect.svc_id = WMI_CONTROL_SVC; 188bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 189bdcd8170SKalle Valo return -EIO; 190bdcd8170SKalle Valo 191bdcd8170SKalle Valo connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 192bdcd8170SKalle Valo 193bdcd8170SKalle Valo /* 194bdcd8170SKalle Valo * Limit the HTC message size on the send path, although e can 195bdcd8170SKalle Valo * receive A-MSDU frames of 4K, we will only send ethernet-sized 196bdcd8170SKalle Valo * (802.3) frames on the send path. 197bdcd8170SKalle Valo */ 198bdcd8170SKalle Valo connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 199bdcd8170SKalle Valo 200bdcd8170SKalle Valo /* 201bdcd8170SKalle Valo * To reduce the amount of committed memory for larger A_MSDU 202bdcd8170SKalle Valo * frames, use the recv-alloc threshold mechanism for larger 203bdcd8170SKalle Valo * packets. 204bdcd8170SKalle Valo */ 205bdcd8170SKalle Valo connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 206bdcd8170SKalle Valo connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 207bdcd8170SKalle Valo 208bdcd8170SKalle Valo /* 209bdcd8170SKalle Valo * For the remaining data services set the connection flag to 210bdcd8170SKalle Valo * reduce dribbling, if configured to do so. 211bdcd8170SKalle Valo */ 212bdcd8170SKalle Valo connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 213bdcd8170SKalle Valo connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 214bdcd8170SKalle Valo connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 215bdcd8170SKalle Valo 216bdcd8170SKalle Valo connect.svc_id = WMI_DATA_BE_SVC; 217bdcd8170SKalle Valo 218bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 219bdcd8170SKalle Valo return -EIO; 220bdcd8170SKalle Valo 221bdcd8170SKalle Valo /* connect to back-ground map this to WMI LOW_PRI */ 222bdcd8170SKalle Valo connect.svc_id = WMI_DATA_BK_SVC; 223bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 224bdcd8170SKalle Valo return -EIO; 225bdcd8170SKalle Valo 226bdcd8170SKalle Valo /* connect to Video service, map this to to HI PRI */ 227bdcd8170SKalle Valo connect.svc_id = WMI_DATA_VI_SVC; 228bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 229bdcd8170SKalle Valo return -EIO; 230bdcd8170SKalle Valo 231bdcd8170SKalle Valo /* 232bdcd8170SKalle Valo * Connect to VO service, this is currently not mapped to a WMI 233bdcd8170SKalle Valo * priority stream due to historical reasons. WMI originally 234bdcd8170SKalle Valo * defined 3 priorities over 3 mailboxes We can change this when 235bdcd8170SKalle Valo * WMI is reworked so that priorities are not dependent on 236bdcd8170SKalle Valo * mailboxes. 237bdcd8170SKalle Valo */ 238bdcd8170SKalle Valo connect.svc_id = WMI_DATA_VO_SVC; 239bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 240bdcd8170SKalle Valo return -EIO; 241bdcd8170SKalle Valo 242bdcd8170SKalle Valo return 0; 243bdcd8170SKalle Valo } 244bdcd8170SKalle Valo 245e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif) 246bdcd8170SKalle Valo { 247e29f25f5SVasanthakumar Thiagarajan ath6kl_init_profile_info(vif); 2483450334fSVasanthakumar Thiagarajan vif->def_txkey_index = 0; 2496f2a73f9SVasanthakumar Thiagarajan memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 250f74bac54SVasanthakumar Thiagarajan vif->ch_hint = 0; 251bdcd8170SKalle Valo } 252bdcd8170SKalle Valo 253bdcd8170SKalle Valo /* 254bdcd8170SKalle Valo * Set HTC/Mbox operational parameters, this can only be called when the 255bdcd8170SKalle Valo * target is in the BMI phase. 256bdcd8170SKalle Valo */ 257bdcd8170SKalle Valo static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 258bdcd8170SKalle Valo u8 htc_ctrl_buf) 259bdcd8170SKalle Valo { 260bdcd8170SKalle Valo int status; 261bdcd8170SKalle Valo u32 blk_size; 262bdcd8170SKalle Valo 263bdcd8170SKalle Valo blk_size = ar->mbox_info.block_size; 264bdcd8170SKalle Valo 265bdcd8170SKalle Valo if (htc_ctrl_buf) 266bdcd8170SKalle Valo blk_size |= ((u32)htc_ctrl_buf) << 16; 267bdcd8170SKalle Valo 268bdcd8170SKalle Valo /* set the host interest area for the block size */ 269bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 270bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 271bdcd8170SKalle Valo HI_ITEM(hi_mbox_io_block_sz)), 272bdcd8170SKalle Valo (u8 *)&blk_size, 273bdcd8170SKalle Valo 4); 274bdcd8170SKalle Valo if (status) { 275bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for IO block size failed\n"); 276bdcd8170SKalle Valo goto out; 277bdcd8170SKalle Valo } 278bdcd8170SKalle Valo 279bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 280bdcd8170SKalle Valo blk_size, 281bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 282bdcd8170SKalle Valo 283bdcd8170SKalle Valo if (mbox_isr_yield_val) { 284bdcd8170SKalle Valo /* set the host interest area for the mbox ISR yield limit */ 285bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 286bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 287bdcd8170SKalle Valo HI_ITEM(hi_mbox_isr_yield_limit)), 288bdcd8170SKalle Valo (u8 *)&mbox_isr_yield_val, 289bdcd8170SKalle Valo 4); 290bdcd8170SKalle Valo if (status) { 291bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for yield limit failed\n"); 292bdcd8170SKalle Valo goto out; 293bdcd8170SKalle Valo } 294bdcd8170SKalle Valo } 295bdcd8170SKalle Valo 296bdcd8170SKalle Valo out: 297bdcd8170SKalle Valo return status; 298bdcd8170SKalle Valo } 299bdcd8170SKalle Valo 300bdcd8170SKalle Valo #define REG_DUMP_COUNT_AR6003 60 301bdcd8170SKalle Valo #define REGISTER_DUMP_LEN_MAX 60 302bdcd8170SKalle Valo 303bdcd8170SKalle Valo static void ath6kl_dump_target_assert_info(struct ath6kl *ar) 304bdcd8170SKalle Valo { 305bdcd8170SKalle Valo u32 address; 306bdcd8170SKalle Valo u32 regdump_loc = 0; 307bdcd8170SKalle Valo int status; 308bdcd8170SKalle Valo u32 regdump_val[REGISTER_DUMP_LEN_MAX]; 309bdcd8170SKalle Valo u32 i; 310bdcd8170SKalle Valo 311bdcd8170SKalle Valo if (ar->target_type != TARGET_TYPE_AR6003) 312bdcd8170SKalle Valo return; 313bdcd8170SKalle Valo 314bdcd8170SKalle Valo /* the reg dump pointer is copied to the host interest area */ 315bdcd8170SKalle Valo address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state)); 31631024d99SKevin Fang address = TARG_VTOP(ar->target_type, address); 317bdcd8170SKalle Valo 318bdcd8170SKalle Valo /* read RAM location through diagnostic window */ 319addb44beSKalle Valo status = ath6kl_diag_read32(ar, address, ®dump_loc); 320bdcd8170SKalle Valo 321bdcd8170SKalle Valo if (status || !regdump_loc) { 322bdcd8170SKalle Valo ath6kl_err("failed to get ptr to register dump area\n"); 323bdcd8170SKalle Valo return; 324bdcd8170SKalle Valo } 325bdcd8170SKalle Valo 326bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n", 327bdcd8170SKalle Valo regdump_loc); 32831024d99SKevin Fang regdump_loc = TARG_VTOP(ar->target_type, regdump_loc); 329bdcd8170SKalle Valo 330bdcd8170SKalle Valo /* fetch register dump data */ 331addb44beSKalle Valo status = ath6kl_diag_read(ar, regdump_loc, (u8 *)®dump_val[0], 332addb44beSKalle Valo REG_DUMP_COUNT_AR6003 * (sizeof(u32))); 333bdcd8170SKalle Valo 334bdcd8170SKalle Valo if (status) { 335bdcd8170SKalle Valo ath6kl_err("failed to get register dump\n"); 336bdcd8170SKalle Valo return; 337bdcd8170SKalle Valo } 338bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n"); 339bdcd8170SKalle Valo 340bdcd8170SKalle Valo for (i = 0; i < REG_DUMP_COUNT_AR6003; i++) 341bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n", 342bdcd8170SKalle Valo i, regdump_val[i]); 343bdcd8170SKalle Valo 344bdcd8170SKalle Valo } 345bdcd8170SKalle Valo 346bdcd8170SKalle Valo void ath6kl_target_failure(struct ath6kl *ar) 347bdcd8170SKalle Valo { 348bdcd8170SKalle Valo ath6kl_err("target asserted\n"); 349bdcd8170SKalle Valo 350bdcd8170SKalle Valo /* try dumping target assertion information (if any) */ 351bdcd8170SKalle Valo ath6kl_dump_target_assert_info(ar); 352bdcd8170SKalle Valo 353bdcd8170SKalle Valo } 354bdcd8170SKalle Valo 3550ce59445SVasanthakumar Thiagarajan static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) 356bdcd8170SKalle Valo { 357bdcd8170SKalle Valo int status = 0; 3584dea08e0SJouni Malinen int ret; 359bdcd8170SKalle Valo 360bdcd8170SKalle Valo /* 361bdcd8170SKalle Valo * Configure the device for rx dot11 header rules. "0,0" are the 362bdcd8170SKalle Valo * default values. Required if checksum offload is needed. Set 363bdcd8170SKalle Valo * RxMetaVersion to 2. 364bdcd8170SKalle Valo */ 3650ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, 366bdcd8170SKalle Valo ar->rx_meta_ver, 0, 0)) { 367bdcd8170SKalle Valo ath6kl_err("unable to set the rx frame format\n"); 368bdcd8170SKalle Valo status = -EIO; 369bdcd8170SKalle Valo } 370bdcd8170SKalle Valo 371bdcd8170SKalle Valo if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) 3720ce59445SVasanthakumar Thiagarajan if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, 373bdcd8170SKalle Valo IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { 374bdcd8170SKalle Valo ath6kl_err("unable to set power save fail event policy\n"); 375bdcd8170SKalle Valo status = -EIO; 376bdcd8170SKalle Valo } 377bdcd8170SKalle Valo 378bdcd8170SKalle Valo if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) 3790ce59445SVasanthakumar Thiagarajan if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, 380bdcd8170SKalle Valo WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { 381bdcd8170SKalle Valo ath6kl_err("unable to set barker preamble policy\n"); 382bdcd8170SKalle Valo status = -EIO; 383bdcd8170SKalle Valo } 384bdcd8170SKalle Valo 3850ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, 386bdcd8170SKalle Valo WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { 387bdcd8170SKalle Valo ath6kl_err("unable to set keep alive interval\n"); 388bdcd8170SKalle Valo status = -EIO; 389bdcd8170SKalle Valo } 390bdcd8170SKalle Valo 3910ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, 392bdcd8170SKalle Valo WLAN_CONFIG_DISCONNECT_TIMEOUT)) { 393bdcd8170SKalle Valo ath6kl_err("unable to set disconnect timeout\n"); 394bdcd8170SKalle Valo status = -EIO; 395bdcd8170SKalle Valo } 396bdcd8170SKalle Valo 397bdcd8170SKalle Valo if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) 3980ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) { 399bdcd8170SKalle Valo ath6kl_err("unable to set txop bursting\n"); 400bdcd8170SKalle Valo status = -EIO; 401bdcd8170SKalle Valo } 402bdcd8170SKalle Valo 4030ce59445SVasanthakumar Thiagarajan /* 4040ce59445SVasanthakumar Thiagarajan * FIXME: Make sure p2p configurations are not applied to 4050ce59445SVasanthakumar Thiagarajan * non-p2p capable interfaces when multivif support is enabled. 4060ce59445SVasanthakumar Thiagarajan */ 4076bbc7c35SJouni Malinen if (ar->p2p) { 4080ce59445SVasanthakumar Thiagarajan ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, 4096bbc7c35SJouni Malinen P2P_FLAG_CAPABILITIES_REQ | 4104dea08e0SJouni Malinen P2P_FLAG_MACADDR_REQ | 4114dea08e0SJouni Malinen P2P_FLAG_HMODEL_REQ); 4124dea08e0SJouni Malinen if (ret) { 4134dea08e0SJouni Malinen ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " 4146bbc7c35SJouni Malinen "capabilities (%d) - assuming P2P not " 4156bbc7c35SJouni Malinen "supported\n", ret); 4166bbc7c35SJouni Malinen ar->p2p = 0; 4176bbc7c35SJouni Malinen } 4186bbc7c35SJouni Malinen } 4196bbc7c35SJouni Malinen 4200ce59445SVasanthakumar Thiagarajan /* 4210ce59445SVasanthakumar Thiagarajan * FIXME: Make sure p2p configurations are not applied to 4220ce59445SVasanthakumar Thiagarajan * non-p2p capable interfaces when multivif support is enabled. 4230ce59445SVasanthakumar Thiagarajan */ 4246bbc7c35SJouni Malinen if (ar->p2p) { 4256bbc7c35SJouni Malinen /* Enable Probe Request reporting for P2P */ 4260ce59445SVasanthakumar Thiagarajan ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 4276bbc7c35SJouni Malinen if (ret) { 4286bbc7c35SJouni Malinen ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " 4296bbc7c35SJouni Malinen "Request reporting (%d)\n", ret); 4306bbc7c35SJouni Malinen } 4314dea08e0SJouni Malinen } 4324dea08e0SJouni Malinen 433bdcd8170SKalle Valo return status; 434bdcd8170SKalle Valo } 435bdcd8170SKalle Valo 436bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar) 437bdcd8170SKalle Valo { 438bdcd8170SKalle Valo u32 param, ram_reserved_size; 4393226f68aSVasanthakumar Thiagarajan u8 fw_iftype, fw_mode = 0, fw_submode = 0; 4407b85832dSVasanthakumar Thiagarajan int i; 441bdcd8170SKalle Valo 4427b85832dSVasanthakumar Thiagarajan /* 4437b85832dSVasanthakumar Thiagarajan * Note: Even though the firmware interface type is 4447b85832dSVasanthakumar Thiagarajan * chosen as BSS_STA for all three interfaces, can 4457b85832dSVasanthakumar Thiagarajan * be configured to IBSS/AP as long as the fw submode 4467b85832dSVasanthakumar Thiagarajan * remains normal mode (0 - AP, STA and IBSS). But 4477b85832dSVasanthakumar Thiagarajan * due to an target assert in firmware only one interface is 4487b85832dSVasanthakumar Thiagarajan * configured for now. 4497b85832dSVasanthakumar Thiagarajan */ 450dd3751f7SVasanthakumar Thiagarajan fw_iftype = HI_OPTION_FW_MODE_BSS_STA; 451bdcd8170SKalle Valo 4527b85832dSVasanthakumar Thiagarajan for (i = 0; i < MAX_NUM_VIF; i++) 4537b85832dSVasanthakumar Thiagarajan fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); 4547b85832dSVasanthakumar Thiagarajan 4557b85832dSVasanthakumar Thiagarajan /* 4563226f68aSVasanthakumar Thiagarajan * By default, submodes : 4573226f68aSVasanthakumar Thiagarajan * vif[0] - AP/STA/IBSS 4587b85832dSVasanthakumar Thiagarajan * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" 4597b85832dSVasanthakumar Thiagarajan * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" 4607b85832dSVasanthakumar Thiagarajan */ 4613226f68aSVasanthakumar Thiagarajan 4623226f68aSVasanthakumar Thiagarajan for (i = 0; i < ar->max_norm_iface; i++) 4633226f68aSVasanthakumar Thiagarajan fw_submode |= HI_OPTION_FW_SUBMODE_NONE << 4643226f68aSVasanthakumar Thiagarajan (i * HI_OPTION_FW_SUBMODE_BITS); 4653226f68aSVasanthakumar Thiagarajan 4663226f68aSVasanthakumar Thiagarajan for (i = ar->max_norm_iface; i < MAX_NUM_VIF; i++) 4673226f68aSVasanthakumar Thiagarajan fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 4683226f68aSVasanthakumar Thiagarajan (i * HI_OPTION_FW_SUBMODE_BITS); 4697b85832dSVasanthakumar Thiagarajan 4707b85832dSVasanthakumar Thiagarajan /* 4717b85832dSVasanthakumar Thiagarajan * FIXME: This needs to be removed once the multivif 4727b85832dSVasanthakumar Thiagarajan * support is enabled. 4737b85832dSVasanthakumar Thiagarajan */ 4747b85832dSVasanthakumar Thiagarajan if (ar->p2p) 4757b85832dSVasanthakumar Thiagarajan fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; 4767b85832dSVasanthakumar Thiagarajan 477bdcd8170SKalle Valo param = HTC_PROTOCOL_VERSION; 478bdcd8170SKalle Valo if (ath6kl_bmi_write(ar, 479bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 480bdcd8170SKalle Valo HI_ITEM(hi_app_host_interest)), 481bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 482bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for htc version failed\n"); 483bdcd8170SKalle Valo return -EIO; 484bdcd8170SKalle Valo } 485bdcd8170SKalle Valo 486bdcd8170SKalle Valo /* set the firmware mode to STA/IBSS/AP */ 487bdcd8170SKalle Valo param = 0; 488bdcd8170SKalle Valo 489bdcd8170SKalle Valo if (ath6kl_bmi_read(ar, 490bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 491bdcd8170SKalle Valo HI_ITEM(hi_option_flag)), 492bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 493bdcd8170SKalle Valo ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 494bdcd8170SKalle Valo return -EIO; 495bdcd8170SKalle Valo } 496bdcd8170SKalle Valo 4977b85832dSVasanthakumar Thiagarajan param |= (MAX_NUM_VIF << HI_OPTION_NUM_DEV_SHIFT); 4987b85832dSVasanthakumar Thiagarajan param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; 4997b85832dSVasanthakumar Thiagarajan param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; 5007b85832dSVasanthakumar Thiagarajan 501bdcd8170SKalle Valo param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 502bdcd8170SKalle Valo param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 503bdcd8170SKalle Valo 504bdcd8170SKalle Valo if (ath6kl_bmi_write(ar, 505bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 506bdcd8170SKalle Valo HI_ITEM(hi_option_flag)), 507bdcd8170SKalle Valo (u8 *)¶m, 508bdcd8170SKalle Valo 4) != 0) { 509bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 510bdcd8170SKalle Valo return -EIO; 511bdcd8170SKalle Valo } 512bdcd8170SKalle Valo 513bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 514bdcd8170SKalle Valo 515bdcd8170SKalle Valo /* 516bdcd8170SKalle Valo * Hardcode the address use for the extended board data 517bdcd8170SKalle Valo * Ideally this should be pre-allocate by the OS at boot time 518bdcd8170SKalle Valo * But since it is a new feature and board data is loaded 519bdcd8170SKalle Valo * at init time, we have to workaround this from host. 520bdcd8170SKalle Valo * It is difficult to patch the firmware boot code, 521bdcd8170SKalle Valo * but possible in theory. 522bdcd8170SKalle Valo */ 523bdcd8170SKalle Valo 524991b27eaSKalle Valo param = ar->hw.board_ext_data_addr; 525991b27eaSKalle Valo ram_reserved_size = ar->hw.reserved_ram_size; 526bdcd8170SKalle Valo 527991b27eaSKalle Valo if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 528bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data)), 529bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 530bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 531bdcd8170SKalle Valo return -EIO; 532bdcd8170SKalle Valo } 533991b27eaSKalle Valo 534991b27eaSKalle Valo if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 535bdcd8170SKalle Valo HI_ITEM(hi_end_ram_reserve_sz)), 536bdcd8170SKalle Valo (u8 *)&ram_reserved_size, 4) != 0) { 537bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 538bdcd8170SKalle Valo return -EIO; 539bdcd8170SKalle Valo } 540bdcd8170SKalle Valo 541bdcd8170SKalle Valo /* set the block size for the target */ 542bdcd8170SKalle Valo if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 543bdcd8170SKalle Valo /* use default number of control buffers */ 544bdcd8170SKalle Valo return -EIO; 545bdcd8170SKalle Valo 546bdcd8170SKalle Valo return 0; 547bdcd8170SKalle Valo } 548bdcd8170SKalle Valo 5498dafb70eSVasanthakumar Thiagarajan void ath6kl_core_free(struct ath6kl *ar) 550bdcd8170SKalle Valo { 5518dafb70eSVasanthakumar Thiagarajan wiphy_free(ar->wiphy); 552bdcd8170SKalle Valo } 553bdcd8170SKalle Valo 5546db8fa53SVasanthakumar Thiagarajan void ath6kl_core_cleanup(struct ath6kl *ar) 555bdcd8170SKalle Valo { 5566db8fa53SVasanthakumar Thiagarajan destroy_workqueue(ar->ath6kl_wq); 557bdcd8170SKalle Valo 5586db8fa53SVasanthakumar Thiagarajan if (ar->htc_target) 5596db8fa53SVasanthakumar Thiagarajan ath6kl_htc_cleanup(ar->htc_target); 5606db8fa53SVasanthakumar Thiagarajan 5616db8fa53SVasanthakumar Thiagarajan ath6kl_cookie_cleanup(ar); 5626db8fa53SVasanthakumar Thiagarajan 5636db8fa53SVasanthakumar Thiagarajan ath6kl_cleanup_amsdu_rxbufs(ar); 5646db8fa53SVasanthakumar Thiagarajan 5656db8fa53SVasanthakumar Thiagarajan ath6kl_bmi_cleanup(ar); 5666db8fa53SVasanthakumar Thiagarajan 5676db8fa53SVasanthakumar Thiagarajan ath6kl_debug_cleanup(ar); 5686db8fa53SVasanthakumar Thiagarajan 5696db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_board); 5706db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_otp); 5716db8fa53SVasanthakumar Thiagarajan kfree(ar->fw); 5726db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_patch); 5736db8fa53SVasanthakumar Thiagarajan 5746db8fa53SVasanthakumar Thiagarajan ath6kl_deinit_ieee80211_hw(ar); 575bdcd8170SKalle Valo } 576bdcd8170SKalle Valo 577bdcd8170SKalle Valo /* firmware upload */ 578bdcd8170SKalle Valo static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 579bdcd8170SKalle Valo u8 **fw, size_t *fw_len) 580bdcd8170SKalle Valo { 581bdcd8170SKalle Valo const struct firmware *fw_entry; 582bdcd8170SKalle Valo int ret; 583bdcd8170SKalle Valo 584bdcd8170SKalle Valo ret = request_firmware(&fw_entry, filename, ar->dev); 585bdcd8170SKalle Valo if (ret) 586bdcd8170SKalle Valo return ret; 587bdcd8170SKalle Valo 588bdcd8170SKalle Valo *fw_len = fw_entry->size; 589bdcd8170SKalle Valo *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 590bdcd8170SKalle Valo 591bdcd8170SKalle Valo if (*fw == NULL) 592bdcd8170SKalle Valo ret = -ENOMEM; 593bdcd8170SKalle Valo 594bdcd8170SKalle Valo release_firmware(fw_entry); 595bdcd8170SKalle Valo 596bdcd8170SKalle Valo return ret; 597bdcd8170SKalle Valo } 598bdcd8170SKalle Valo 59992ecbff4SSam Leffler #ifdef CONFIG_OF 60092ecbff4SSam Leffler static const char *get_target_ver_dir(const struct ath6kl *ar) 60192ecbff4SSam Leffler { 60292ecbff4SSam Leffler switch (ar->version.target_ver) { 60392ecbff4SSam Leffler case AR6003_REV1_VERSION: 60492ecbff4SSam Leffler return "ath6k/AR6003/hw1.0"; 60592ecbff4SSam Leffler case AR6003_REV2_VERSION: 60692ecbff4SSam Leffler return "ath6k/AR6003/hw2.0"; 60792ecbff4SSam Leffler case AR6003_REV3_VERSION: 60892ecbff4SSam Leffler return "ath6k/AR6003/hw2.1.1"; 60992ecbff4SSam Leffler } 61092ecbff4SSam Leffler ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__, 61192ecbff4SSam Leffler ar->version.target_ver); 61292ecbff4SSam Leffler return NULL; 61392ecbff4SSam Leffler } 61492ecbff4SSam Leffler 61592ecbff4SSam Leffler /* 61692ecbff4SSam Leffler * Check the device tree for a board-id and use it to construct 61792ecbff4SSam Leffler * the pathname to the firmware file. Used (for now) to find a 61892ecbff4SSam Leffler * fallback to the "bdata.bin" file--typically a symlink to the 61992ecbff4SSam Leffler * appropriate board-specific file. 62092ecbff4SSam Leffler */ 62192ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar) 62292ecbff4SSam Leffler { 62392ecbff4SSam Leffler static const char *board_id_prop = "atheros,board-id"; 62492ecbff4SSam Leffler struct device_node *node; 62592ecbff4SSam Leffler char board_filename[64]; 62692ecbff4SSam Leffler const char *board_id; 62792ecbff4SSam Leffler int ret; 62892ecbff4SSam Leffler 62992ecbff4SSam Leffler for_each_compatible_node(node, NULL, "atheros,ath6kl") { 63092ecbff4SSam Leffler board_id = of_get_property(node, board_id_prop, NULL); 63192ecbff4SSam Leffler if (board_id == NULL) { 63292ecbff4SSam Leffler ath6kl_warn("No \"%s\" property on %s node.\n", 63392ecbff4SSam Leffler board_id_prop, node->name); 63492ecbff4SSam Leffler continue; 63592ecbff4SSam Leffler } 63692ecbff4SSam Leffler snprintf(board_filename, sizeof(board_filename), 63792ecbff4SSam Leffler "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id); 63892ecbff4SSam Leffler 63992ecbff4SSam Leffler ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 64092ecbff4SSam Leffler &ar->fw_board_len); 64192ecbff4SSam Leffler if (ret) { 64292ecbff4SSam Leffler ath6kl_err("Failed to get DT board file %s: %d\n", 64392ecbff4SSam Leffler board_filename, ret); 64492ecbff4SSam Leffler continue; 64592ecbff4SSam Leffler } 64692ecbff4SSam Leffler return true; 64792ecbff4SSam Leffler } 64892ecbff4SSam Leffler return false; 64992ecbff4SSam Leffler } 65092ecbff4SSam Leffler #else 65192ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar) 65292ecbff4SSam Leffler { 65392ecbff4SSam Leffler return false; 65492ecbff4SSam Leffler } 65592ecbff4SSam Leffler #endif /* CONFIG_OF */ 65692ecbff4SSam Leffler 657bdcd8170SKalle Valo static int ath6kl_fetch_board_file(struct ath6kl *ar) 658bdcd8170SKalle Valo { 659bdcd8170SKalle Valo const char *filename; 660bdcd8170SKalle Valo int ret; 661bdcd8170SKalle Valo 662772c31eeSKalle Valo if (ar->fw_board != NULL) 663772c31eeSKalle Valo return 0; 664772c31eeSKalle Valo 665bdcd8170SKalle Valo switch (ar->version.target_ver) { 666bdcd8170SKalle Valo case AR6003_REV2_VERSION: 667bdcd8170SKalle Valo filename = AR6003_REV2_BOARD_DATA_FILE; 668bdcd8170SKalle Valo break; 66931024d99SKevin Fang case AR6004_REV1_VERSION: 67031024d99SKevin Fang filename = AR6004_REV1_BOARD_DATA_FILE; 67131024d99SKevin Fang break; 672bdcd8170SKalle Valo default: 673bdcd8170SKalle Valo filename = AR6003_REV3_BOARD_DATA_FILE; 674bdcd8170SKalle Valo break; 675bdcd8170SKalle Valo } 676bdcd8170SKalle Valo 677bdcd8170SKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 678bdcd8170SKalle Valo &ar->fw_board_len); 679bdcd8170SKalle Valo if (ret == 0) { 680bdcd8170SKalle Valo /* managed to get proper board file */ 681bdcd8170SKalle Valo return 0; 682bdcd8170SKalle Valo } 683bdcd8170SKalle Valo 68492ecbff4SSam Leffler if (check_device_tree(ar)) { 68592ecbff4SSam Leffler /* got board file from device tree */ 68692ecbff4SSam Leffler return 0; 68792ecbff4SSam Leffler } 68892ecbff4SSam Leffler 689bdcd8170SKalle Valo /* there was no proper board file, try to use default instead */ 690bdcd8170SKalle Valo ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 691bdcd8170SKalle Valo filename, ret); 692bdcd8170SKalle Valo 693bdcd8170SKalle Valo switch (ar->version.target_ver) { 694bdcd8170SKalle Valo case AR6003_REV2_VERSION: 695bdcd8170SKalle Valo filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE; 696bdcd8170SKalle Valo break; 69731024d99SKevin Fang case AR6004_REV1_VERSION: 69831024d99SKevin Fang filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE; 69931024d99SKevin Fang break; 700bdcd8170SKalle Valo default: 701bdcd8170SKalle Valo filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE; 702bdcd8170SKalle Valo break; 703bdcd8170SKalle Valo } 704bdcd8170SKalle Valo 705bdcd8170SKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 706bdcd8170SKalle Valo &ar->fw_board_len); 707bdcd8170SKalle Valo if (ret) { 708bdcd8170SKalle Valo ath6kl_err("Failed to get default board file %s: %d\n", 709bdcd8170SKalle Valo filename, ret); 710bdcd8170SKalle Valo return ret; 711bdcd8170SKalle Valo } 712bdcd8170SKalle Valo 713bdcd8170SKalle Valo ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 714bdcd8170SKalle Valo ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 715bdcd8170SKalle Valo 716bdcd8170SKalle Valo return 0; 717bdcd8170SKalle Valo } 718bdcd8170SKalle Valo 719772c31eeSKalle Valo static int ath6kl_fetch_otp_file(struct ath6kl *ar) 720772c31eeSKalle Valo { 721772c31eeSKalle Valo const char *filename; 722772c31eeSKalle Valo int ret; 723772c31eeSKalle Valo 724772c31eeSKalle Valo if (ar->fw_otp != NULL) 725772c31eeSKalle Valo return 0; 726772c31eeSKalle Valo 727772c31eeSKalle Valo switch (ar->version.target_ver) { 728772c31eeSKalle Valo case AR6003_REV2_VERSION: 729772c31eeSKalle Valo filename = AR6003_REV2_OTP_FILE; 730772c31eeSKalle Valo break; 731772c31eeSKalle Valo case AR6004_REV1_VERSION: 732772c31eeSKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n"); 733772c31eeSKalle Valo return 0; 734772c31eeSKalle Valo break; 735772c31eeSKalle Valo default: 736772c31eeSKalle Valo filename = AR6003_REV3_OTP_FILE; 737772c31eeSKalle Valo break; 738772c31eeSKalle Valo } 739772c31eeSKalle Valo 740772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 741772c31eeSKalle Valo &ar->fw_otp_len); 742772c31eeSKalle Valo if (ret) { 743772c31eeSKalle Valo ath6kl_err("Failed to get OTP file %s: %d\n", 744772c31eeSKalle Valo filename, ret); 745772c31eeSKalle Valo return ret; 746772c31eeSKalle Valo } 747772c31eeSKalle Valo 748772c31eeSKalle Valo return 0; 749772c31eeSKalle Valo } 750772c31eeSKalle Valo 751772c31eeSKalle Valo static int ath6kl_fetch_fw_file(struct ath6kl *ar) 752772c31eeSKalle Valo { 753772c31eeSKalle Valo const char *filename; 754772c31eeSKalle Valo int ret; 755772c31eeSKalle Valo 756772c31eeSKalle Valo if (ar->fw != NULL) 757772c31eeSKalle Valo return 0; 758772c31eeSKalle Valo 759772c31eeSKalle Valo if (testmode) { 760772c31eeSKalle Valo switch (ar->version.target_ver) { 761772c31eeSKalle Valo case AR6003_REV2_VERSION: 762772c31eeSKalle Valo filename = AR6003_REV2_TCMD_FIRMWARE_FILE; 763772c31eeSKalle Valo break; 764772c31eeSKalle Valo case AR6003_REV3_VERSION: 765772c31eeSKalle Valo filename = AR6003_REV3_TCMD_FIRMWARE_FILE; 766772c31eeSKalle Valo break; 767772c31eeSKalle Valo case AR6004_REV1_VERSION: 768772c31eeSKalle Valo ath6kl_warn("testmode not supported with ar6004\n"); 769772c31eeSKalle Valo return -EOPNOTSUPP; 770772c31eeSKalle Valo default: 771772c31eeSKalle Valo ath6kl_warn("unknown target version: 0x%x\n", 772772c31eeSKalle Valo ar->version.target_ver); 773772c31eeSKalle Valo return -EINVAL; 774772c31eeSKalle Valo } 775772c31eeSKalle Valo 776772c31eeSKalle Valo set_bit(TESTMODE, &ar->flag); 777772c31eeSKalle Valo 778772c31eeSKalle Valo goto get_fw; 779772c31eeSKalle Valo } 780772c31eeSKalle Valo 781772c31eeSKalle Valo switch (ar->version.target_ver) { 782772c31eeSKalle Valo case AR6003_REV2_VERSION: 783772c31eeSKalle Valo filename = AR6003_REV2_FIRMWARE_FILE; 784772c31eeSKalle Valo break; 785772c31eeSKalle Valo case AR6004_REV1_VERSION: 786772c31eeSKalle Valo filename = AR6004_REV1_FIRMWARE_FILE; 787772c31eeSKalle Valo break; 788772c31eeSKalle Valo default: 789772c31eeSKalle Valo filename = AR6003_REV3_FIRMWARE_FILE; 790772c31eeSKalle Valo break; 791772c31eeSKalle Valo } 792772c31eeSKalle Valo 793772c31eeSKalle Valo get_fw: 794772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 795772c31eeSKalle Valo if (ret) { 796772c31eeSKalle Valo ath6kl_err("Failed to get firmware file %s: %d\n", 797772c31eeSKalle Valo filename, ret); 798772c31eeSKalle Valo return ret; 799772c31eeSKalle Valo } 800772c31eeSKalle Valo 801772c31eeSKalle Valo return 0; 802772c31eeSKalle Valo } 803772c31eeSKalle Valo 804772c31eeSKalle Valo static int ath6kl_fetch_patch_file(struct ath6kl *ar) 805772c31eeSKalle Valo { 806772c31eeSKalle Valo const char *filename; 807772c31eeSKalle Valo int ret; 808772c31eeSKalle Valo 809772c31eeSKalle Valo switch (ar->version.target_ver) { 810772c31eeSKalle Valo case AR6003_REV2_VERSION: 811772c31eeSKalle Valo filename = AR6003_REV2_PATCH_FILE; 812772c31eeSKalle Valo break; 813772c31eeSKalle Valo case AR6004_REV1_VERSION: 814772c31eeSKalle Valo /* FIXME: implement for AR6004 */ 815772c31eeSKalle Valo return 0; 816772c31eeSKalle Valo break; 817772c31eeSKalle Valo default: 818772c31eeSKalle Valo filename = AR6003_REV3_PATCH_FILE; 819772c31eeSKalle Valo break; 820772c31eeSKalle Valo } 821772c31eeSKalle Valo 822772c31eeSKalle Valo if (ar->fw_patch == NULL) { 823772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 824772c31eeSKalle Valo &ar->fw_patch_len); 825772c31eeSKalle Valo if (ret) { 826772c31eeSKalle Valo ath6kl_err("Failed to get patch file %s: %d\n", 827772c31eeSKalle Valo filename, ret); 828772c31eeSKalle Valo return ret; 829772c31eeSKalle Valo } 830772c31eeSKalle Valo } 831772c31eeSKalle Valo 832772c31eeSKalle Valo return 0; 833772c31eeSKalle Valo } 834772c31eeSKalle Valo 83550d41234SKalle Valo static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 836772c31eeSKalle Valo { 837772c31eeSKalle Valo int ret; 838772c31eeSKalle Valo 839772c31eeSKalle Valo ret = ath6kl_fetch_otp_file(ar); 840772c31eeSKalle Valo if (ret) 841772c31eeSKalle Valo return ret; 842772c31eeSKalle Valo 843772c31eeSKalle Valo ret = ath6kl_fetch_fw_file(ar); 844772c31eeSKalle Valo if (ret) 845772c31eeSKalle Valo return ret; 846772c31eeSKalle Valo 847772c31eeSKalle Valo ret = ath6kl_fetch_patch_file(ar); 848772c31eeSKalle Valo if (ret) 849772c31eeSKalle Valo return ret; 850772c31eeSKalle Valo 851772c31eeSKalle Valo return 0; 852772c31eeSKalle Valo } 853bdcd8170SKalle Valo 85450d41234SKalle Valo static int ath6kl_fetch_fw_api2(struct ath6kl *ar) 85550d41234SKalle Valo { 85650d41234SKalle Valo size_t magic_len, len, ie_len; 85750d41234SKalle Valo const struct firmware *fw; 85850d41234SKalle Valo struct ath6kl_fw_ie *hdr; 85950d41234SKalle Valo const char *filename; 86050d41234SKalle Valo const u8 *data; 86197e0496dSKalle Valo int ret, ie_id, i, index, bit; 8628a137480SKalle Valo __le32 *val; 86350d41234SKalle Valo 86450d41234SKalle Valo switch (ar->version.target_ver) { 86550d41234SKalle Valo case AR6003_REV2_VERSION: 86650d41234SKalle Valo filename = AR6003_REV2_FIRMWARE_2_FILE; 86750d41234SKalle Valo break; 86850d41234SKalle Valo case AR6003_REV3_VERSION: 86950d41234SKalle Valo filename = AR6003_REV3_FIRMWARE_2_FILE; 87050d41234SKalle Valo break; 87150d41234SKalle Valo case AR6004_REV1_VERSION: 87250d41234SKalle Valo filename = AR6004_REV1_FIRMWARE_2_FILE; 87350d41234SKalle Valo break; 87450d41234SKalle Valo default: 87550d41234SKalle Valo return -EOPNOTSUPP; 87650d41234SKalle Valo } 87750d41234SKalle Valo 87850d41234SKalle Valo ret = request_firmware(&fw, filename, ar->dev); 87950d41234SKalle Valo if (ret) 88050d41234SKalle Valo return ret; 88150d41234SKalle Valo 88250d41234SKalle Valo data = fw->data; 88350d41234SKalle Valo len = fw->size; 88450d41234SKalle Valo 88550d41234SKalle Valo /* magic also includes the null byte, check that as well */ 88650d41234SKalle Valo magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 88750d41234SKalle Valo 88850d41234SKalle Valo if (len < magic_len) { 88950d41234SKalle Valo ret = -EINVAL; 89050d41234SKalle Valo goto out; 89150d41234SKalle Valo } 89250d41234SKalle Valo 89350d41234SKalle Valo if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 89450d41234SKalle Valo ret = -EINVAL; 89550d41234SKalle Valo goto out; 89650d41234SKalle Valo } 89750d41234SKalle Valo 89850d41234SKalle Valo len -= magic_len; 89950d41234SKalle Valo data += magic_len; 90050d41234SKalle Valo 90150d41234SKalle Valo /* loop elements */ 90250d41234SKalle Valo while (len > sizeof(struct ath6kl_fw_ie)) { 90350d41234SKalle Valo /* hdr is unaligned! */ 90450d41234SKalle Valo hdr = (struct ath6kl_fw_ie *) data; 90550d41234SKalle Valo 90650d41234SKalle Valo ie_id = le32_to_cpup(&hdr->id); 90750d41234SKalle Valo ie_len = le32_to_cpup(&hdr->len); 90850d41234SKalle Valo 90950d41234SKalle Valo len -= sizeof(*hdr); 91050d41234SKalle Valo data += sizeof(*hdr); 91150d41234SKalle Valo 91250d41234SKalle Valo if (len < ie_len) { 91350d41234SKalle Valo ret = -EINVAL; 91450d41234SKalle Valo goto out; 91550d41234SKalle Valo } 91650d41234SKalle Valo 91750d41234SKalle Valo switch (ie_id) { 91850d41234SKalle Valo case ATH6KL_FW_IE_OTP_IMAGE: 919ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", 9206bc36431SKalle Valo ie_len); 9216bc36431SKalle Valo 92250d41234SKalle Valo ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 92350d41234SKalle Valo 92450d41234SKalle Valo if (ar->fw_otp == NULL) { 92550d41234SKalle Valo ret = -ENOMEM; 92650d41234SKalle Valo goto out; 92750d41234SKalle Valo } 92850d41234SKalle Valo 92950d41234SKalle Valo ar->fw_otp_len = ie_len; 93050d41234SKalle Valo break; 93150d41234SKalle Valo case ATH6KL_FW_IE_FW_IMAGE: 932ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", 9336bc36431SKalle Valo ie_len); 9346bc36431SKalle Valo 93550d41234SKalle Valo ar->fw = kmemdup(data, ie_len, GFP_KERNEL); 93650d41234SKalle Valo 93750d41234SKalle Valo if (ar->fw == NULL) { 93850d41234SKalle Valo ret = -ENOMEM; 93950d41234SKalle Valo goto out; 94050d41234SKalle Valo } 94150d41234SKalle Valo 94250d41234SKalle Valo ar->fw_len = ie_len; 94350d41234SKalle Valo break; 94450d41234SKalle Valo case ATH6KL_FW_IE_PATCH_IMAGE: 945ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", 9466bc36431SKalle Valo ie_len); 9476bc36431SKalle Valo 94850d41234SKalle Valo ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 94950d41234SKalle Valo 95050d41234SKalle Valo if (ar->fw_patch == NULL) { 95150d41234SKalle Valo ret = -ENOMEM; 95250d41234SKalle Valo goto out; 95350d41234SKalle Valo } 95450d41234SKalle Valo 95550d41234SKalle Valo ar->fw_patch_len = ie_len; 95650d41234SKalle Valo break; 9578a137480SKalle Valo case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 9588a137480SKalle Valo val = (__le32 *) data; 9598a137480SKalle Valo ar->hw.reserved_ram_size = le32_to_cpup(val); 9606bc36431SKalle Valo 9616bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 9626bc36431SKalle Valo "found reserved ram size ie 0x%d\n", 9636bc36431SKalle Valo ar->hw.reserved_ram_size); 9648a137480SKalle Valo break; 96597e0496dSKalle Valo case ATH6KL_FW_IE_CAPABILITIES: 9666bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 967ef548626SKalle Valo "found firmware capabilities ie (%zd B)\n", 9686bc36431SKalle Valo ie_len); 9696bc36431SKalle Valo 97097e0496dSKalle Valo for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 97197e0496dSKalle Valo index = ALIGN(i, 8) / 8; 97297e0496dSKalle Valo bit = i % 8; 97397e0496dSKalle Valo 97497e0496dSKalle Valo if (data[index] & (1 << bit)) 97597e0496dSKalle Valo __set_bit(i, ar->fw_capabilities); 97697e0496dSKalle Valo } 9776bc36431SKalle Valo 9786bc36431SKalle Valo ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 9796bc36431SKalle Valo ar->fw_capabilities, 9806bc36431SKalle Valo sizeof(ar->fw_capabilities)); 98197e0496dSKalle Valo break; 9821b4304daSKalle Valo case ATH6KL_FW_IE_PATCH_ADDR: 9831b4304daSKalle Valo if (ie_len != sizeof(*val)) 9841b4304daSKalle Valo break; 9851b4304daSKalle Valo 9861b4304daSKalle Valo val = (__le32 *) data; 9871b4304daSKalle Valo ar->hw.dataset_patch_addr = le32_to_cpup(val); 9886bc36431SKalle Valo 9896bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 9906bc36431SKalle Valo "found patch address ie 0x%d\n", 9916bc36431SKalle Valo ar->hw.dataset_patch_addr); 9921b4304daSKalle Valo break; 99350d41234SKalle Valo default: 9946bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 99550d41234SKalle Valo le32_to_cpup(&hdr->id)); 99650d41234SKalle Valo break; 99750d41234SKalle Valo } 99850d41234SKalle Valo 99950d41234SKalle Valo len -= ie_len; 100050d41234SKalle Valo data += ie_len; 100150d41234SKalle Valo }; 100250d41234SKalle Valo 100350d41234SKalle Valo ret = 0; 100450d41234SKalle Valo out: 100550d41234SKalle Valo release_firmware(fw); 100650d41234SKalle Valo 100750d41234SKalle Valo return ret; 100850d41234SKalle Valo } 100950d41234SKalle Valo 101050d41234SKalle Valo static int ath6kl_fetch_firmwares(struct ath6kl *ar) 101150d41234SKalle Valo { 101250d41234SKalle Valo int ret; 101350d41234SKalle Valo 101450d41234SKalle Valo ret = ath6kl_fetch_board_file(ar); 101550d41234SKalle Valo if (ret) 101650d41234SKalle Valo return ret; 101750d41234SKalle Valo 101850d41234SKalle Valo ret = ath6kl_fetch_fw_api2(ar); 10196bc36431SKalle Valo if (ret == 0) { 10206bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n"); 102150d41234SKalle Valo return 0; 10226bc36431SKalle Valo } 102350d41234SKalle Valo 102450d41234SKalle Valo ret = ath6kl_fetch_fw_api1(ar); 102550d41234SKalle Valo if (ret) 102650d41234SKalle Valo return ret; 102750d41234SKalle Valo 10286bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n"); 10296bc36431SKalle Valo 103050d41234SKalle Valo return 0; 103150d41234SKalle Valo } 103250d41234SKalle Valo 1033bdcd8170SKalle Valo static int ath6kl_upload_board_file(struct ath6kl *ar) 1034bdcd8170SKalle Valo { 1035bdcd8170SKalle Valo u32 board_address, board_ext_address, param; 103631024d99SKevin Fang u32 board_data_size, board_ext_data_size; 1037bdcd8170SKalle Valo int ret; 1038bdcd8170SKalle Valo 1039772c31eeSKalle Valo if (WARN_ON(ar->fw_board == NULL)) 1040772c31eeSKalle Valo return -ENOENT; 1041bdcd8170SKalle Valo 104231024d99SKevin Fang /* 104331024d99SKevin Fang * Determine where in Target RAM to write Board Data. 104431024d99SKevin Fang * For AR6004, host determine Target RAM address for 104531024d99SKevin Fang * writing board data. 104631024d99SKevin Fang */ 104731024d99SKevin Fang if (ar->target_type == TARGET_TYPE_AR6004) { 104831024d99SKevin Fang board_address = AR6004_REV1_BOARD_DATA_ADDRESS; 104931024d99SKevin Fang ath6kl_bmi_write(ar, 105031024d99SKevin Fang ath6kl_get_hi_item_addr(ar, 105131024d99SKevin Fang HI_ITEM(hi_board_data)), 105231024d99SKevin Fang (u8 *) &board_address, 4); 105331024d99SKevin Fang } else { 1054bdcd8170SKalle Valo ath6kl_bmi_read(ar, 1055bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1056bdcd8170SKalle Valo HI_ITEM(hi_board_data)), 1057bdcd8170SKalle Valo (u8 *) &board_address, 4); 105831024d99SKevin Fang } 105931024d99SKevin Fang 1060bdcd8170SKalle Valo /* determine where in target ram to write extended board data */ 1061bdcd8170SKalle Valo ath6kl_bmi_read(ar, 1062bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1063bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data)), 1064bdcd8170SKalle Valo (u8 *) &board_ext_address, 4); 1065bdcd8170SKalle Valo 1066bdcd8170SKalle Valo if (board_ext_address == 0) { 1067bdcd8170SKalle Valo ath6kl_err("Failed to get board file target address.\n"); 1068bdcd8170SKalle Valo return -EINVAL; 1069bdcd8170SKalle Valo } 1070bdcd8170SKalle Valo 107131024d99SKevin Fang switch (ar->target_type) { 107231024d99SKevin Fang case TARGET_TYPE_AR6003: 107331024d99SKevin Fang board_data_size = AR6003_BOARD_DATA_SZ; 107431024d99SKevin Fang board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 107531024d99SKevin Fang break; 107631024d99SKevin Fang case TARGET_TYPE_AR6004: 107731024d99SKevin Fang board_data_size = AR6004_BOARD_DATA_SZ; 107831024d99SKevin Fang board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 107931024d99SKevin Fang break; 108031024d99SKevin Fang default: 108131024d99SKevin Fang WARN_ON(1); 108231024d99SKevin Fang return -EINVAL; 108331024d99SKevin Fang break; 108431024d99SKevin Fang } 108531024d99SKevin Fang 108631024d99SKevin Fang if (ar->fw_board_len == (board_data_size + 108731024d99SKevin Fang board_ext_data_size)) { 108831024d99SKevin Fang 1089bdcd8170SKalle Valo /* write extended board data */ 10906bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 10916bc36431SKalle Valo "writing extended board data to 0x%x (%d B)\n", 10926bc36431SKalle Valo board_ext_address, board_ext_data_size); 10936bc36431SKalle Valo 1094bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, board_ext_address, 109531024d99SKevin Fang ar->fw_board + board_data_size, 109631024d99SKevin Fang board_ext_data_size); 1097bdcd8170SKalle Valo if (ret) { 1098bdcd8170SKalle Valo ath6kl_err("Failed to write extended board data: %d\n", 1099bdcd8170SKalle Valo ret); 1100bdcd8170SKalle Valo return ret; 1101bdcd8170SKalle Valo } 1102bdcd8170SKalle Valo 1103bdcd8170SKalle Valo /* record that extended board data is initialized */ 110431024d99SKevin Fang param = (board_ext_data_size << 16) | 1; 110531024d99SKevin Fang 1106bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1107bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1108bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data_config)), 1109bdcd8170SKalle Valo (unsigned char *) ¶m, 4); 1110bdcd8170SKalle Valo } 1111bdcd8170SKalle Valo 111231024d99SKevin Fang if (ar->fw_board_len < board_data_size) { 1113bdcd8170SKalle Valo ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1114bdcd8170SKalle Valo ret = -EINVAL; 1115bdcd8170SKalle Valo return ret; 1116bdcd8170SKalle Valo } 1117bdcd8170SKalle Valo 11186bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 11196bc36431SKalle Valo board_address, board_data_size); 11206bc36431SKalle Valo 1121bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 112231024d99SKevin Fang board_data_size); 1123bdcd8170SKalle Valo 1124bdcd8170SKalle Valo if (ret) { 1125bdcd8170SKalle Valo ath6kl_err("Board file bmi write failed: %d\n", ret); 1126bdcd8170SKalle Valo return ret; 1127bdcd8170SKalle Valo } 1128bdcd8170SKalle Valo 1129bdcd8170SKalle Valo /* record the fact that Board Data IS initialized */ 1130bdcd8170SKalle Valo param = 1; 1131bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1132bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1133bdcd8170SKalle Valo HI_ITEM(hi_board_data_initialized)), 1134bdcd8170SKalle Valo (u8 *)¶m, 4); 1135bdcd8170SKalle Valo 1136bdcd8170SKalle Valo return ret; 1137bdcd8170SKalle Valo } 1138bdcd8170SKalle Valo 1139bdcd8170SKalle Valo static int ath6kl_upload_otp(struct ath6kl *ar) 1140bdcd8170SKalle Valo { 1141bdcd8170SKalle Valo u32 address, param; 1142bef26a7fSKalle Valo bool from_hw = false; 1143bdcd8170SKalle Valo int ret; 1144bdcd8170SKalle Valo 1145772c31eeSKalle Valo if (WARN_ON(ar->fw_otp == NULL)) 1146772c31eeSKalle Valo return -ENOENT; 1147bdcd8170SKalle Valo 1148a01ac414SKalle Valo address = ar->hw.app_load_addr; 1149bdcd8170SKalle Valo 1150ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, 11516bc36431SKalle Valo ar->fw_otp_len); 11526bc36431SKalle Valo 1153bdcd8170SKalle Valo ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1154bdcd8170SKalle Valo ar->fw_otp_len); 1155bdcd8170SKalle Valo if (ret) { 1156bdcd8170SKalle Valo ath6kl_err("Failed to upload OTP file: %d\n", ret); 1157bdcd8170SKalle Valo return ret; 1158bdcd8170SKalle Valo } 1159bdcd8170SKalle Valo 1160639d0b89SKalle Valo /* read firmware start address */ 1161639d0b89SKalle Valo ret = ath6kl_bmi_read(ar, 1162639d0b89SKalle Valo ath6kl_get_hi_item_addr(ar, 1163639d0b89SKalle Valo HI_ITEM(hi_app_start)), 1164639d0b89SKalle Valo (u8 *) &address, sizeof(address)); 1165639d0b89SKalle Valo 1166639d0b89SKalle Valo if (ret) { 1167639d0b89SKalle Valo ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1168639d0b89SKalle Valo return ret; 1169639d0b89SKalle Valo } 1170639d0b89SKalle Valo 1171bef26a7fSKalle Valo if (ar->hw.app_start_override_addr == 0) { 1172639d0b89SKalle Valo ar->hw.app_start_override_addr = address; 1173bef26a7fSKalle Valo from_hw = true; 1174bef26a7fSKalle Valo } 1175639d0b89SKalle Valo 1176bef26a7fSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", 1177bef26a7fSKalle Valo from_hw ? " (from hw)" : "", 11786bc36431SKalle Valo ar->hw.app_start_override_addr); 11796bc36431SKalle Valo 1180bdcd8170SKalle Valo /* execute the OTP code */ 1181bef26a7fSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", 1182bef26a7fSKalle Valo ar->hw.app_start_override_addr); 1183bdcd8170SKalle Valo param = 0; 1184bef26a7fSKalle Valo ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); 1185bdcd8170SKalle Valo 1186bdcd8170SKalle Valo return ret; 1187bdcd8170SKalle Valo } 1188bdcd8170SKalle Valo 1189bdcd8170SKalle Valo static int ath6kl_upload_firmware(struct ath6kl *ar) 1190bdcd8170SKalle Valo { 1191bdcd8170SKalle Valo u32 address; 1192bdcd8170SKalle Valo int ret; 1193bdcd8170SKalle Valo 1194772c31eeSKalle Valo if (WARN_ON(ar->fw == NULL)) 1195772c31eeSKalle Valo return -ENOENT; 1196bdcd8170SKalle Valo 1197a01ac414SKalle Valo address = ar->hw.app_load_addr; 1198bdcd8170SKalle Valo 1199ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", 12006bc36431SKalle Valo address, ar->fw_len); 12016bc36431SKalle Valo 1202bdcd8170SKalle Valo ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1203bdcd8170SKalle Valo 1204bdcd8170SKalle Valo if (ret) { 1205bdcd8170SKalle Valo ath6kl_err("Failed to write firmware: %d\n", ret); 1206bdcd8170SKalle Valo return ret; 1207bdcd8170SKalle Valo } 1208bdcd8170SKalle Valo 120931024d99SKevin Fang /* 121031024d99SKevin Fang * Set starting address for firmware 121131024d99SKevin Fang * Don't need to setup app_start override addr on AR6004 121231024d99SKevin Fang */ 121331024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6004) { 1214a01ac414SKalle Valo address = ar->hw.app_start_override_addr; 1215bdcd8170SKalle Valo ath6kl_bmi_set_app_start(ar, address); 121631024d99SKevin Fang } 1217bdcd8170SKalle Valo return ret; 1218bdcd8170SKalle Valo } 1219bdcd8170SKalle Valo 1220bdcd8170SKalle Valo static int ath6kl_upload_patch(struct ath6kl *ar) 1221bdcd8170SKalle Valo { 1222bdcd8170SKalle Valo u32 address, param; 1223bdcd8170SKalle Valo int ret; 1224bdcd8170SKalle Valo 1225772c31eeSKalle Valo if (WARN_ON(ar->fw_patch == NULL)) 1226772c31eeSKalle Valo return -ENOENT; 1227bdcd8170SKalle Valo 1228a01ac414SKalle Valo address = ar->hw.dataset_patch_addr; 1229bdcd8170SKalle Valo 1230ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", 12316bc36431SKalle Valo address, ar->fw_patch_len); 12326bc36431SKalle Valo 1233bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1234bdcd8170SKalle Valo if (ret) { 1235bdcd8170SKalle Valo ath6kl_err("Failed to write patch file: %d\n", ret); 1236bdcd8170SKalle Valo return ret; 1237bdcd8170SKalle Valo } 1238bdcd8170SKalle Valo 1239bdcd8170SKalle Valo param = address; 1240bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1241bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1242bdcd8170SKalle Valo HI_ITEM(hi_dset_list_head)), 1243bdcd8170SKalle Valo (unsigned char *) ¶m, 4); 1244bdcd8170SKalle Valo 1245bdcd8170SKalle Valo return 0; 1246bdcd8170SKalle Valo } 1247bdcd8170SKalle Valo 1248bdcd8170SKalle Valo static int ath6kl_init_upload(struct ath6kl *ar) 1249bdcd8170SKalle Valo { 1250bdcd8170SKalle Valo u32 param, options, sleep, address; 1251bdcd8170SKalle Valo int status = 0; 1252bdcd8170SKalle Valo 125331024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6003 && 125431024d99SKevin Fang ar->target_type != TARGET_TYPE_AR6004) 1255bdcd8170SKalle Valo return -EINVAL; 1256bdcd8170SKalle Valo 1257bdcd8170SKalle Valo /* temporarily disable system sleep */ 1258bdcd8170SKalle Valo address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1259bdcd8170SKalle Valo status = ath6kl_bmi_reg_read(ar, address, ¶m); 1260bdcd8170SKalle Valo if (status) 1261bdcd8170SKalle Valo return status; 1262bdcd8170SKalle Valo 1263bdcd8170SKalle Valo options = param; 1264bdcd8170SKalle Valo 1265bdcd8170SKalle Valo param |= ATH6KL_OPTION_SLEEP_DISABLE; 1266bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1267bdcd8170SKalle Valo if (status) 1268bdcd8170SKalle Valo return status; 1269bdcd8170SKalle Valo 1270bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1271bdcd8170SKalle Valo status = ath6kl_bmi_reg_read(ar, address, ¶m); 1272bdcd8170SKalle Valo if (status) 1273bdcd8170SKalle Valo return status; 1274bdcd8170SKalle Valo 1275bdcd8170SKalle Valo sleep = param; 1276bdcd8170SKalle Valo 1277bdcd8170SKalle Valo param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1278bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1279bdcd8170SKalle Valo if (status) 1280bdcd8170SKalle Valo return status; 1281bdcd8170SKalle Valo 1282bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1283bdcd8170SKalle Valo options, sleep); 1284bdcd8170SKalle Valo 1285bdcd8170SKalle Valo /* program analog PLL register */ 128631024d99SKevin Fang /* no need to control 40/44MHz clock on AR6004 */ 128731024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6004) { 1288bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1289bdcd8170SKalle Valo 0xF9104001); 129031024d99SKevin Fang 1291bdcd8170SKalle Valo if (status) 1292bdcd8170SKalle Valo return status; 1293bdcd8170SKalle Valo 1294bdcd8170SKalle Valo /* Run at 80/88MHz by default */ 1295bdcd8170SKalle Valo param = SM(CPU_CLOCK_STANDARD, 1); 1296bdcd8170SKalle Valo 1297bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1298bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1299bdcd8170SKalle Valo if (status) 1300bdcd8170SKalle Valo return status; 130131024d99SKevin Fang } 1302bdcd8170SKalle Valo 1303bdcd8170SKalle Valo param = 0; 1304bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1305bdcd8170SKalle Valo param = SM(LPO_CAL_ENABLE, 1); 1306bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1307bdcd8170SKalle Valo if (status) 1308bdcd8170SKalle Valo return status; 1309bdcd8170SKalle Valo 1310bdcd8170SKalle Valo /* WAR to avoid SDIO CRC err */ 1311bdcd8170SKalle Valo if (ar->version.target_ver == AR6003_REV2_VERSION) { 1312bdcd8170SKalle Valo ath6kl_err("temporary war to avoid sdio crc error\n"); 1313bdcd8170SKalle Valo 1314bdcd8170SKalle Valo param = 0x20; 1315bdcd8170SKalle Valo 1316bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1317bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1318bdcd8170SKalle Valo if (status) 1319bdcd8170SKalle Valo return status; 1320bdcd8170SKalle Valo 1321bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1322bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1323bdcd8170SKalle Valo if (status) 1324bdcd8170SKalle Valo return status; 1325bdcd8170SKalle Valo 1326bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1327bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1328bdcd8170SKalle Valo if (status) 1329bdcd8170SKalle Valo return status; 1330bdcd8170SKalle Valo 1331bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1332bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1333bdcd8170SKalle Valo if (status) 1334bdcd8170SKalle Valo return status; 1335bdcd8170SKalle Valo } 1336bdcd8170SKalle Valo 1337bdcd8170SKalle Valo /* write EEPROM data to Target RAM */ 1338bdcd8170SKalle Valo status = ath6kl_upload_board_file(ar); 1339bdcd8170SKalle Valo if (status) 1340bdcd8170SKalle Valo return status; 1341bdcd8170SKalle Valo 1342bdcd8170SKalle Valo /* transfer One time Programmable data */ 1343bdcd8170SKalle Valo status = ath6kl_upload_otp(ar); 1344bdcd8170SKalle Valo if (status) 1345bdcd8170SKalle Valo return status; 1346bdcd8170SKalle Valo 1347bdcd8170SKalle Valo /* Download Target firmware */ 1348bdcd8170SKalle Valo status = ath6kl_upload_firmware(ar); 1349bdcd8170SKalle Valo if (status) 1350bdcd8170SKalle Valo return status; 1351bdcd8170SKalle Valo 1352bdcd8170SKalle Valo status = ath6kl_upload_patch(ar); 1353bdcd8170SKalle Valo if (status) 1354bdcd8170SKalle Valo return status; 1355bdcd8170SKalle Valo 1356bdcd8170SKalle Valo /* Restore system sleep */ 1357bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1358bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, sleep); 1359bdcd8170SKalle Valo if (status) 1360bdcd8170SKalle Valo return status; 1361bdcd8170SKalle Valo 1362bdcd8170SKalle Valo address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1363bdcd8170SKalle Valo param = options | 0x20; 1364bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1365bdcd8170SKalle Valo if (status) 1366bdcd8170SKalle Valo return status; 1367bdcd8170SKalle Valo 1368bdcd8170SKalle Valo /* Configure GPIO AR6003 UART */ 1369bdcd8170SKalle Valo param = CONFIG_AR600x_DEBUG_UART_TX_PIN; 1370bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 1371bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1372bdcd8170SKalle Valo HI_ITEM(hi_dbg_uart_txpin)), 1373bdcd8170SKalle Valo (u8 *)¶m, 4); 1374bdcd8170SKalle Valo 1375bdcd8170SKalle Valo return status; 1376bdcd8170SKalle Valo } 1377bdcd8170SKalle Valo 1378a01ac414SKalle Valo static int ath6kl_init_hw_params(struct ath6kl *ar) 1379a01ac414SKalle Valo { 1380a01ac414SKalle Valo switch (ar->version.target_ver) { 1381a01ac414SKalle Valo case AR6003_REV2_VERSION: 1382a01ac414SKalle Valo ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS; 1383a01ac414SKalle Valo ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS; 1384991b27eaSKalle Valo ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS; 1385991b27eaSKalle Valo ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE; 1386bef26a7fSKalle Valo 1387bef26a7fSKalle Valo /* hw2.0 needs override address hardcoded */ 1388bef26a7fSKalle Valo ar->hw.app_start_override_addr = 0x944C00; 1389bef26a7fSKalle Valo 1390a01ac414SKalle Valo break; 1391a01ac414SKalle Valo case AR6003_REV3_VERSION: 1392a01ac414SKalle Valo ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS; 1393a01ac414SKalle Valo ar->hw.app_load_addr = 0x1234; 1394991b27eaSKalle Valo ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS; 1395991b27eaSKalle Valo ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE; 1396a01ac414SKalle Valo break; 1397a01ac414SKalle Valo case AR6004_REV1_VERSION: 1398a01ac414SKalle Valo ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS; 1399a01ac414SKalle Valo ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS; 1400991b27eaSKalle Valo ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS; 1401991b27eaSKalle Valo ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE; 1402a01ac414SKalle Valo break; 1403a01ac414SKalle Valo default: 1404a01ac414SKalle Valo ath6kl_err("Unsupported hardware version: 0x%x\n", 1405a01ac414SKalle Valo ar->version.target_ver); 1406a01ac414SKalle Valo return -EINVAL; 1407a01ac414SKalle Valo } 1408a01ac414SKalle Valo 14096bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 14106bc36431SKalle Valo "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 14116bc36431SKalle Valo ar->version.target_ver, ar->target_type, 14126bc36431SKalle Valo ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 14136bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 14146bc36431SKalle Valo "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 14156bc36431SKalle Valo ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 14166bc36431SKalle Valo ar->hw.reserved_ram_size); 14176bc36431SKalle Valo 1418a01ac414SKalle Valo return 0; 1419a01ac414SKalle Valo } 1420a01ac414SKalle Valo 1421521dffccSVasanthakumar Thiagarajan static int ath6kl_init(struct ath6kl *ar) 1422bdcd8170SKalle Valo { 1423bdcd8170SKalle Valo int status = 0; 1424bdcd8170SKalle Valo s32 timeleft; 14258dafb70eSVasanthakumar Thiagarajan struct net_device *ndev; 142655055976SVasanthakumar Thiagarajan int i; 1427bdcd8170SKalle Valo 1428bdcd8170SKalle Valo if (!ar) 1429bdcd8170SKalle Valo return -EIO; 1430bdcd8170SKalle Valo 1431bdcd8170SKalle Valo /* Do we need to finish the BMI phase */ 1432bdcd8170SKalle Valo if (ath6kl_bmi_done(ar)) { 1433bdcd8170SKalle Valo status = -EIO; 1434bdcd8170SKalle Valo goto ath6kl_init_done; 1435bdcd8170SKalle Valo } 1436bdcd8170SKalle Valo 1437bdcd8170SKalle Valo /* Indicate that WMI is enabled (although not ready yet) */ 1438bdcd8170SKalle Valo set_bit(WMI_ENABLED, &ar->flag); 14392865785eSVasanthakumar Thiagarajan ar->wmi = ath6kl_wmi_init(ar); 1440bdcd8170SKalle Valo if (!ar->wmi) { 1441bdcd8170SKalle Valo ath6kl_err("failed to initialize wmi\n"); 1442bdcd8170SKalle Valo status = -EIO; 1443bdcd8170SKalle Valo goto ath6kl_init_done; 1444bdcd8170SKalle Valo } 1445bdcd8170SKalle Valo 1446bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); 1447bdcd8170SKalle Valo 14488dafb70eSVasanthakumar Thiagarajan status = ath6kl_register_ieee80211_hw(ar); 14498dafb70eSVasanthakumar Thiagarajan if (status) 14508dafb70eSVasanthakumar Thiagarajan goto err_node_cleanup; 14518dafb70eSVasanthakumar Thiagarajan 14528dafb70eSVasanthakumar Thiagarajan status = ath6kl_debug_init(ar); 14538dafb70eSVasanthakumar Thiagarajan if (status) { 14548dafb70eSVasanthakumar Thiagarajan wiphy_unregister(ar->wiphy); 14558dafb70eSVasanthakumar Thiagarajan goto err_node_cleanup; 14568dafb70eSVasanthakumar Thiagarajan } 14578dafb70eSVasanthakumar Thiagarajan 145855055976SVasanthakumar Thiagarajan for (i = 0; i < MAX_NUM_VIF; i++) 145955055976SVasanthakumar Thiagarajan ar->avail_idx_map |= BIT(i); 146055055976SVasanthakumar Thiagarajan 146127929723SVasanthakumar Thiagarajan rtnl_lock(); 146227929723SVasanthakumar Thiagarajan 14638dafb70eSVasanthakumar Thiagarajan /* Add an initial station interface */ 146455055976SVasanthakumar Thiagarajan ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0, 146555055976SVasanthakumar Thiagarajan INFRA_NETWORK); 146627929723SVasanthakumar Thiagarajan 146727929723SVasanthakumar Thiagarajan rtnl_unlock(); 146827929723SVasanthakumar Thiagarajan 14698dafb70eSVasanthakumar Thiagarajan if (!ndev) { 14708dafb70eSVasanthakumar Thiagarajan ath6kl_err("Failed to instantiate a network device\n"); 14718dafb70eSVasanthakumar Thiagarajan status = -ENOMEM; 14728dafb70eSVasanthakumar Thiagarajan wiphy_unregister(ar->wiphy); 14738dafb70eSVasanthakumar Thiagarajan goto err_debug_init; 14748dafb70eSVasanthakumar Thiagarajan } 14758dafb70eSVasanthakumar Thiagarajan 14768dafb70eSVasanthakumar Thiagarajan 14778dafb70eSVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", 147828ae58ddSVasanthakumar Thiagarajan __func__, ndev->name, ndev, ar); 14798dafb70eSVasanthakumar Thiagarajan 1480bdcd8170SKalle Valo /* 1481bdcd8170SKalle Valo * The reason we have to wait for the target here is that the 1482bdcd8170SKalle Valo * driver layer has to init BMI in order to set the host block 1483bdcd8170SKalle Valo * size. 1484bdcd8170SKalle Valo */ 1485ad226ec2SKalle Valo if (ath6kl_htc_wait_target(ar->htc_target)) { 1486bdcd8170SKalle Valo status = -EIO; 14878dafb70eSVasanthakumar Thiagarajan goto err_if_deinit; 1488bdcd8170SKalle Valo } 1489bdcd8170SKalle Valo 1490bdcd8170SKalle Valo if (ath6kl_init_service_ep(ar)) { 1491bdcd8170SKalle Valo status = -EIO; 1492bdcd8170SKalle Valo goto err_cleanup_scatter; 1493bdcd8170SKalle Valo } 1494bdcd8170SKalle Valo 1495bdcd8170SKalle Valo /* setup access class priority mappings */ 1496bdcd8170SKalle Valo ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ 1497bdcd8170SKalle Valo ar->ac_stream_pri_map[WMM_AC_BE] = 1; 1498bdcd8170SKalle Valo ar->ac_stream_pri_map[WMM_AC_VI] = 2; 1499bdcd8170SKalle Valo ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ 1500bdcd8170SKalle Valo 1501bdcd8170SKalle Valo /* give our connected endpoints some buffers */ 1502bdcd8170SKalle Valo ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); 1503bdcd8170SKalle Valo ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); 1504bdcd8170SKalle Valo 1505bdcd8170SKalle Valo /* allocate some buffers that handle larger AMSDU frames */ 1506bdcd8170SKalle Valo ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); 1507bdcd8170SKalle Valo 1508bdcd8170SKalle Valo /* setup credit distribution */ 1509bdcd8170SKalle Valo ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info); 1510bdcd8170SKalle Valo 1511bdcd8170SKalle Valo ath6kl_cookie_init(ar); 1512bdcd8170SKalle Valo 1513bdcd8170SKalle Valo /* start HTC */ 1514ad226ec2SKalle Valo status = ath6kl_htc_start(ar->htc_target); 1515bdcd8170SKalle Valo 1516bdcd8170SKalle Valo if (status) { 1517bdcd8170SKalle Valo ath6kl_cookie_cleanup(ar); 1518bdcd8170SKalle Valo goto err_rxbuf_cleanup; 1519bdcd8170SKalle Valo } 1520bdcd8170SKalle Valo 1521bdcd8170SKalle Valo /* Wait for Wmi event to be ready */ 1522bdcd8170SKalle Valo timeleft = wait_event_interruptible_timeout(ar->event_wq, 1523bdcd8170SKalle Valo test_bit(WMI_READY, 1524bdcd8170SKalle Valo &ar->flag), 1525bdcd8170SKalle Valo WMI_TIMEOUT); 1526bdcd8170SKalle Valo 15276bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 15286bc36431SKalle Valo 1529bdcd8170SKalle Valo if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 1530bdcd8170SKalle Valo ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 1531bdcd8170SKalle Valo ATH6KL_ABI_VERSION, ar->version.abi_ver); 1532bdcd8170SKalle Valo status = -EIO; 1533bdcd8170SKalle Valo goto err_htc_stop; 1534bdcd8170SKalle Valo } 1535bdcd8170SKalle Valo 1536bdcd8170SKalle Valo if (!timeleft || signal_pending(current)) { 1537bdcd8170SKalle Valo ath6kl_err("wmi is not ready or wait was interrupted\n"); 1538bdcd8170SKalle Valo status = -EIO; 1539bdcd8170SKalle Valo goto err_htc_stop; 1540bdcd8170SKalle Valo } 1541bdcd8170SKalle Valo 1542bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 1543bdcd8170SKalle Valo 1544bdcd8170SKalle Valo /* communicate the wmi protocol verision to the target */ 1545bdcd8170SKalle Valo if ((ath6kl_set_host_app_area(ar)) != 0) 1546bdcd8170SKalle Valo ath6kl_err("unable to set the host app area\n"); 1547bdcd8170SKalle Valo 1548bdcd8170SKalle Valo ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | 1549bdcd8170SKalle Valo ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; 1550bdcd8170SKalle Valo 1551be98e3a4SVasanthakumar Thiagarajan ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM | 1552562a7480SJohannes Berg WIPHY_FLAG_HAVE_AP_SME; 1553011a36e1SVivek Natarajan 15540ce59445SVasanthakumar Thiagarajan for (i = 0; i < MAX_NUM_VIF; i++) { 15550ce59445SVasanthakumar Thiagarajan status = ath6kl_target_config_wlan_params(ar, i); 1556d66ea4f9SVasanthakumar Thiagarajan if (status) 1557d66ea4f9SVasanthakumar Thiagarajan goto err_htc_stop; 15580ce59445SVasanthakumar Thiagarajan } 1559d66ea4f9SVasanthakumar Thiagarajan 1560d66ea4f9SVasanthakumar Thiagarajan /* 1561d66ea4f9SVasanthakumar Thiagarajan * Set mac address which is received in ready event 1562d66ea4f9SVasanthakumar Thiagarajan * FIXME: Move to ath6kl_interface_add() 1563d66ea4f9SVasanthakumar Thiagarajan */ 1564d66ea4f9SVasanthakumar Thiagarajan memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN); 1565d66ea4f9SVasanthakumar Thiagarajan 1566d66ea4f9SVasanthakumar Thiagarajan return status; 1567bdcd8170SKalle Valo 1568bdcd8170SKalle Valo err_htc_stop: 1569ad226ec2SKalle Valo ath6kl_htc_stop(ar->htc_target); 1570bdcd8170SKalle Valo err_rxbuf_cleanup: 1571ad226ec2SKalle Valo ath6kl_htc_flush_rx_buf(ar->htc_target); 1572bdcd8170SKalle Valo ath6kl_cleanup_amsdu_rxbufs(ar); 1573bdcd8170SKalle Valo err_cleanup_scatter: 1574bdcd8170SKalle Valo ath6kl_hif_cleanup_scatter(ar); 15758dafb70eSVasanthakumar Thiagarajan err_if_deinit: 157627929723SVasanthakumar Thiagarajan rtnl_lock(); 1577108438bcSVasanthakumar Thiagarajan ath6kl_deinit_if_data(netdev_priv(ndev)); 157827929723SVasanthakumar Thiagarajan rtnl_unlock(); 15798dafb70eSVasanthakumar Thiagarajan wiphy_unregister(ar->wiphy); 15808dafb70eSVasanthakumar Thiagarajan err_debug_init: 15818dafb70eSVasanthakumar Thiagarajan ath6kl_debug_cleanup(ar); 1582852bd9d9SVasanthakumar Thiagarajan err_node_cleanup: 1583bdcd8170SKalle Valo ath6kl_wmi_shutdown(ar->wmi); 1584bdcd8170SKalle Valo clear_bit(WMI_ENABLED, &ar->flag); 1585bdcd8170SKalle Valo ar->wmi = NULL; 1586bdcd8170SKalle Valo 1587bdcd8170SKalle Valo ath6kl_init_done: 1588bdcd8170SKalle Valo return status; 1589bdcd8170SKalle Valo } 1590bdcd8170SKalle Valo 1591bdcd8170SKalle Valo int ath6kl_core_init(struct ath6kl *ar) 1592bdcd8170SKalle Valo { 1593bdcd8170SKalle Valo int ret = 0; 1594bdcd8170SKalle Valo struct ath6kl_bmi_target_info targ_info; 1595bdcd8170SKalle Valo 1596bdcd8170SKalle Valo ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); 1597bdcd8170SKalle Valo if (!ar->ath6kl_wq) 1598bdcd8170SKalle Valo return -ENOMEM; 1599bdcd8170SKalle Valo 1600bdcd8170SKalle Valo ret = ath6kl_bmi_init(ar); 1601bdcd8170SKalle Valo if (ret) 1602bdcd8170SKalle Valo goto err_wq; 1603bdcd8170SKalle Valo 1604bdcd8170SKalle Valo ret = ath6kl_bmi_get_target_info(ar, &targ_info); 1605bdcd8170SKalle Valo if (ret) 1606bdcd8170SKalle Valo goto err_bmi_cleanup; 1607bdcd8170SKalle Valo 1608bdcd8170SKalle Valo ar->version.target_ver = le32_to_cpu(targ_info.version); 1609bdcd8170SKalle Valo ar->target_type = le32_to_cpu(targ_info.type); 1610be98e3a4SVasanthakumar Thiagarajan ar->wiphy->hw_version = le32_to_cpu(targ_info.version); 1611bdcd8170SKalle Valo 1612a01ac414SKalle Valo ret = ath6kl_init_hw_params(ar); 1613a01ac414SKalle Valo if (ret) 1614a01ac414SKalle Valo goto err_bmi_cleanup; 1615a01ac414SKalle Valo 1616bdcd8170SKalle Valo ret = ath6kl_configure_target(ar); 1617bdcd8170SKalle Valo if (ret) 1618bdcd8170SKalle Valo goto err_bmi_cleanup; 1619bdcd8170SKalle Valo 1620ad226ec2SKalle Valo ar->htc_target = ath6kl_htc_create(ar); 1621bdcd8170SKalle Valo 1622bdcd8170SKalle Valo if (!ar->htc_target) { 1623bdcd8170SKalle Valo ret = -ENOMEM; 1624bdcd8170SKalle Valo goto err_bmi_cleanup; 1625bdcd8170SKalle Valo } 1626bdcd8170SKalle Valo 1627772c31eeSKalle Valo ret = ath6kl_fetch_firmwares(ar); 1628772c31eeSKalle Valo if (ret) 1629772c31eeSKalle Valo goto err_htc_cleanup; 1630772c31eeSKalle Valo 1631bdcd8170SKalle Valo ret = ath6kl_init_upload(ar); 1632bdcd8170SKalle Valo if (ret) 1633bdcd8170SKalle Valo goto err_htc_cleanup; 1634bdcd8170SKalle Valo 1635521dffccSVasanthakumar Thiagarajan ret = ath6kl_init(ar); 1636bdcd8170SKalle Valo if (ret) 1637bdcd8170SKalle Valo goto err_htc_cleanup; 1638bdcd8170SKalle Valo 1639bdcd8170SKalle Valo return ret; 1640bdcd8170SKalle Valo 1641bdcd8170SKalle Valo err_htc_cleanup: 1642ad226ec2SKalle Valo ath6kl_htc_cleanup(ar->htc_target); 1643bdcd8170SKalle Valo err_bmi_cleanup: 1644bdcd8170SKalle Valo ath6kl_bmi_cleanup(ar); 1645bdcd8170SKalle Valo err_wq: 1646bdcd8170SKalle Valo destroy_workqueue(ar->ath6kl_wq); 16478dafb70eSVasanthakumar Thiagarajan 1648bdcd8170SKalle Valo return ret; 1649bdcd8170SKalle Valo } 1650bdcd8170SKalle Valo 165155055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) 16526db8fa53SVasanthakumar Thiagarajan { 16536db8fa53SVasanthakumar Thiagarajan static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 16546db8fa53SVasanthakumar Thiagarajan bool discon_issued; 16556db8fa53SVasanthakumar Thiagarajan 16566db8fa53SVasanthakumar Thiagarajan netif_stop_queue(vif->ndev); 16576db8fa53SVasanthakumar Thiagarajan 16586db8fa53SVasanthakumar Thiagarajan clear_bit(WLAN_ENABLED, &vif->flags); 16596db8fa53SVasanthakumar Thiagarajan 16606db8fa53SVasanthakumar Thiagarajan if (wmi_ready) { 16616db8fa53SVasanthakumar Thiagarajan discon_issued = test_bit(CONNECTED, &vif->flags) || 16626db8fa53SVasanthakumar Thiagarajan test_bit(CONNECT_PEND, &vif->flags); 16636db8fa53SVasanthakumar Thiagarajan ath6kl_disconnect(vif); 16646db8fa53SVasanthakumar Thiagarajan del_timer(&vif->disconnect_timer); 16656db8fa53SVasanthakumar Thiagarajan 16666db8fa53SVasanthakumar Thiagarajan if (discon_issued) 16676db8fa53SVasanthakumar Thiagarajan ath6kl_disconnect_event(vif, DISCONNECT_CMD, 16686db8fa53SVasanthakumar Thiagarajan (vif->nw_type & AP_NETWORK) ? 16696db8fa53SVasanthakumar Thiagarajan bcast_mac : vif->bssid, 16706db8fa53SVasanthakumar Thiagarajan 0, NULL, 0); 16716db8fa53SVasanthakumar Thiagarajan } 16726db8fa53SVasanthakumar Thiagarajan 16736db8fa53SVasanthakumar Thiagarajan if (vif->scan_req) { 16746db8fa53SVasanthakumar Thiagarajan cfg80211_scan_done(vif->scan_req, true); 16756db8fa53SVasanthakumar Thiagarajan vif->scan_req = NULL; 16766db8fa53SVasanthakumar Thiagarajan } 16776db8fa53SVasanthakumar Thiagarajan } 16786db8fa53SVasanthakumar Thiagarajan 1679bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar) 1680bdcd8170SKalle Valo { 1681990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *vif, *tmp_vif; 1682bdcd8170SKalle Valo 1683bdcd8170SKalle Valo set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1684bdcd8170SKalle Valo 1685bdcd8170SKalle Valo if (down_interruptible(&ar->sem)) { 1686bdcd8170SKalle Valo ath6kl_err("down_interruptible failed\n"); 1687bdcd8170SKalle Valo return; 1688bdcd8170SKalle Valo } 1689bdcd8170SKalle Valo 1690990bd915SVasanthakumar Thiagarajan spin_lock(&ar->list_lock); 1691990bd915SVasanthakumar Thiagarajan list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { 1692990bd915SVasanthakumar Thiagarajan list_del(&vif->list); 1693990bd915SVasanthakumar Thiagarajan spin_unlock(&ar->list_lock); 1694990bd915SVasanthakumar Thiagarajan ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); 169527929723SVasanthakumar Thiagarajan rtnl_lock(); 169627929723SVasanthakumar Thiagarajan ath6kl_deinit_if_data(vif); 169727929723SVasanthakumar Thiagarajan rtnl_unlock(); 1698990bd915SVasanthakumar Thiagarajan spin_lock(&ar->list_lock); 1699990bd915SVasanthakumar Thiagarajan } 1700990bd915SVasanthakumar Thiagarajan spin_unlock(&ar->list_lock); 1701bdcd8170SKalle Valo 17026db8fa53SVasanthakumar Thiagarajan clear_bit(WMI_READY, &ar->flag); 17036db8fa53SVasanthakumar Thiagarajan 17046db8fa53SVasanthakumar Thiagarajan /* 17056db8fa53SVasanthakumar Thiagarajan * After wmi_shudown all WMI events will be dropped. We 17066db8fa53SVasanthakumar Thiagarajan * need to cleanup the buffers allocated in AP mode and 17076db8fa53SVasanthakumar Thiagarajan * give disconnect notification to stack, which usually 17086db8fa53SVasanthakumar Thiagarajan * happens in the disconnect_event. Simulate the disconnect 17096db8fa53SVasanthakumar Thiagarajan * event by calling the function directly. Sometimes 17106db8fa53SVasanthakumar Thiagarajan * disconnect_event will be received when the debug logs 17116db8fa53SVasanthakumar Thiagarajan * are collected. 17126db8fa53SVasanthakumar Thiagarajan */ 17136db8fa53SVasanthakumar Thiagarajan ath6kl_wmi_shutdown(ar->wmi); 17146db8fa53SVasanthakumar Thiagarajan 17156db8fa53SVasanthakumar Thiagarajan clear_bit(WMI_ENABLED, &ar->flag); 17166db8fa53SVasanthakumar Thiagarajan if (ar->htc_target) { 17176db8fa53SVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); 17186db8fa53SVasanthakumar Thiagarajan ath6kl_htc_stop(ar->htc_target); 1719bdcd8170SKalle Valo } 1720bdcd8170SKalle Valo 1721bdcd8170SKalle Valo /* 17226db8fa53SVasanthakumar Thiagarajan * Try to reset the device if we can. The driver may have been 17236db8fa53SVasanthakumar Thiagarajan * configure NOT to reset the target during a debug session. 1724bdcd8170SKalle Valo */ 17256db8fa53SVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_TRC, 17266db8fa53SVasanthakumar Thiagarajan "attempting to reset target on instance destroy\n"); 17276db8fa53SVasanthakumar Thiagarajan ath6kl_reset_device(ar, ar->target_type, true, true); 1728bdcd8170SKalle Valo 17296db8fa53SVasanthakumar Thiagarajan clear_bit(WLAN_ENABLED, &ar->flag); 1730bdcd8170SKalle Valo } 1731