1bdcd8170SKalle Valo /* 2bdcd8170SKalle Valo * Copyright (c) 2004-2011 Atheros Communications Inc. 31b2df407SVasanthakumar Thiagarajan * Copyright (c) 2011 Qualcomm Atheros, Inc. 4bdcd8170SKalle Valo * 5bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 6bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 7bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 8bdcd8170SKalle Valo * 9bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16bdcd8170SKalle Valo */ 17bdcd8170SKalle Valo 18bdcd8170SKalle Valo #ifndef HIF_OPS_H 19bdcd8170SKalle Valo #define HIF_OPS_H 20bdcd8170SKalle Valo 21bdcd8170SKalle Valo #include "hif.h" 2283973e03SKalle Valo #include "debug.h" 23bdcd8170SKalle Valo 24bdcd8170SKalle Valo static inline int hif_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf, 25bdcd8170SKalle Valo u32 len, u32 request) 26bdcd8170SKalle Valo { 2783973e03SKalle Valo ath6kl_dbg(ATH6KL_DBG_HIF, 2883973e03SKalle Valo "hif %s sync addr 0x%x buf 0x%p len %d request 0x%x\n", 2983973e03SKalle Valo (request & HIF_WRITE) ? "write" : "read", 3083973e03SKalle Valo addr, buf, len, request); 3183973e03SKalle Valo 32bdcd8170SKalle Valo return ar->hif_ops->read_write_sync(ar, addr, buf, len, request); 33bdcd8170SKalle Valo } 34bdcd8170SKalle Valo 35bdcd8170SKalle Valo static inline int hif_write_async(struct ath6kl *ar, u32 address, u8 *buffer, 36bdcd8170SKalle Valo u32 length, u32 request, 37bdcd8170SKalle Valo struct htc_packet *packet) 38bdcd8170SKalle Valo { 3983973e03SKalle Valo ath6kl_dbg(ATH6KL_DBG_HIF, 4083973e03SKalle Valo "hif write async addr 0x%x buf 0x%p len %d request 0x%x\n", 4183973e03SKalle Valo address, buffer, length, request); 4283973e03SKalle Valo 43bdcd8170SKalle Valo return ar->hif_ops->write_async(ar, address, buffer, length, 44bdcd8170SKalle Valo request, packet); 45bdcd8170SKalle Valo } 46bdcd8170SKalle Valo static inline void ath6kl_hif_irq_enable(struct ath6kl *ar) 47bdcd8170SKalle Valo { 4883973e03SKalle Valo ath6kl_dbg(ATH6KL_DBG_HIF, "hif irq enable\n"); 4983973e03SKalle Valo 50bdcd8170SKalle Valo return ar->hif_ops->irq_enable(ar); 51bdcd8170SKalle Valo } 52bdcd8170SKalle Valo 53bdcd8170SKalle Valo static inline void ath6kl_hif_irq_disable(struct ath6kl *ar) 54bdcd8170SKalle Valo { 5583973e03SKalle Valo ath6kl_dbg(ATH6KL_DBG_HIF, "hif irq disable\n"); 5683973e03SKalle Valo 57bdcd8170SKalle Valo return ar->hif_ops->irq_disable(ar); 58bdcd8170SKalle Valo } 59bdcd8170SKalle Valo 60bdcd8170SKalle Valo static inline struct hif_scatter_req *hif_scatter_req_get(struct ath6kl *ar) 61bdcd8170SKalle Valo { 62bdcd8170SKalle Valo return ar->hif_ops->scatter_req_get(ar); 63bdcd8170SKalle Valo } 64bdcd8170SKalle Valo 65bdcd8170SKalle Valo static inline void hif_scatter_req_add(struct ath6kl *ar, 66bdcd8170SKalle Valo struct hif_scatter_req *s_req) 67bdcd8170SKalle Valo { 68bdcd8170SKalle Valo return ar->hif_ops->scatter_req_add(ar, s_req); 69bdcd8170SKalle Valo } 70bdcd8170SKalle Valo 7150745af7SVasanthakumar Thiagarajan static inline int ath6kl_hif_enable_scatter(struct ath6kl *ar) 72bdcd8170SKalle Valo { 7350745af7SVasanthakumar Thiagarajan return ar->hif_ops->enable_scatter(ar); 74bdcd8170SKalle Valo } 75bdcd8170SKalle Valo 76f74a7361SVasanthakumar Thiagarajan static inline int ath6kl_hif_scat_req_rw(struct ath6kl *ar, 77f74a7361SVasanthakumar Thiagarajan struct hif_scatter_req *scat_req) 78f74a7361SVasanthakumar Thiagarajan { 79f74a7361SVasanthakumar Thiagarajan return ar->hif_ops->scat_req_rw(ar, scat_req); 80f74a7361SVasanthakumar Thiagarajan } 81f74a7361SVasanthakumar Thiagarajan 82bdcd8170SKalle Valo static inline void ath6kl_hif_cleanup_scatter(struct ath6kl *ar) 83bdcd8170SKalle Valo { 84bdcd8170SKalle Valo return ar->hif_ops->cleanup_scatter(ar); 85bdcd8170SKalle Valo } 86bdcd8170SKalle Valo 870f60e9f4SRaja Mani static inline int ath6kl_hif_suspend(struct ath6kl *ar, 880f60e9f4SRaja Mani struct cfg80211_wowlan *wow) 89abcb344bSKalle Valo { 9083973e03SKalle Valo ath6kl_dbg(ATH6KL_DBG_HIF, "hif suspend\n"); 9183973e03SKalle Valo 920f60e9f4SRaja Mani return ar->hif_ops->suspend(ar, wow); 93abcb344bSKalle Valo } 94abcb344bSKalle Valo 95c7111495SKalle Valo /* 96c7111495SKalle Valo * Read from the ATH6KL through its diagnostic window. No cooperation from 97c7111495SKalle Valo * the Target is required for this. 98c7111495SKalle Valo */ 99c7111495SKalle Valo static inline int ath6kl_hif_diag_read32(struct ath6kl *ar, u32 address, 100c7111495SKalle Valo u32 *value) 101c7111495SKalle Valo { 102c7111495SKalle Valo return ar->hif_ops->diag_read32(ar, address, value); 103c7111495SKalle Valo } 104c7111495SKalle Valo 105c7111495SKalle Valo /* 106c7111495SKalle Valo * Write to the ATH6KL through its diagnostic window. No cooperation from 107c7111495SKalle Valo * the Target is required for this. 108c7111495SKalle Valo */ 109c7111495SKalle Valo static inline int ath6kl_hif_diag_write32(struct ath6kl *ar, u32 address, 110c7111495SKalle Valo __le32 value) 111c7111495SKalle Valo { 112c7111495SKalle Valo return ar->hif_ops->diag_write32(ar, address, value); 113c7111495SKalle Valo } 114c7111495SKalle Valo 11566b693c3SKalle Valo static inline int ath6kl_hif_bmi_read(struct ath6kl *ar, u8 *buf, u32 len) 11666b693c3SKalle Valo { 11766b693c3SKalle Valo return ar->hif_ops->bmi_read(ar, buf, len); 11866b693c3SKalle Valo } 11966b693c3SKalle Valo 12066b693c3SKalle Valo static inline int ath6kl_hif_bmi_write(struct ath6kl *ar, u8 *buf, u32 len) 12166b693c3SKalle Valo { 12266b693c3SKalle Valo return ar->hif_ops->bmi_write(ar, buf, len); 12366b693c3SKalle Valo } 12466b693c3SKalle Valo 125aa6cffc1SChilam Ng static inline int ath6kl_hif_resume(struct ath6kl *ar) 126aa6cffc1SChilam Ng { 12783973e03SKalle Valo ath6kl_dbg(ATH6KL_DBG_HIF, "hif resume\n"); 12883973e03SKalle Valo 129aa6cffc1SChilam Ng return ar->hif_ops->resume(ar); 130aa6cffc1SChilam Ng } 131b2e75698SKalle Valo 132b2e75698SKalle Valo static inline int ath6kl_hif_power_on(struct ath6kl *ar) 133b2e75698SKalle Valo { 134b2e75698SKalle Valo ath6kl_dbg(ATH6KL_DBG_HIF, "hif power on\n"); 135b2e75698SKalle Valo 136b2e75698SKalle Valo return ar->hif_ops->power_on(ar); 137b2e75698SKalle Valo } 138b2e75698SKalle Valo 139b2e75698SKalle Valo static inline int ath6kl_hif_power_off(struct ath6kl *ar) 140b2e75698SKalle Valo { 141b2e75698SKalle Valo ath6kl_dbg(ATH6KL_DBG_HIF, "hif power off\n"); 142b2e75698SKalle Valo 143b2e75698SKalle Valo return ar->hif_ops->power_off(ar); 144b2e75698SKalle Valo } 145b2e75698SKalle Valo 14632a07e44SKalle Valo static inline void ath6kl_hif_stop(struct ath6kl *ar) 14732a07e44SKalle Valo { 14832a07e44SKalle Valo ath6kl_dbg(ATH6KL_DBG_HIF, "hif stop\n"); 14932a07e44SKalle Valo 15032a07e44SKalle Valo ar->hif_ops->stop(ar); 15132a07e44SKalle Valo } 15232a07e44SKalle Valo 153bdcd8170SKalle Valo #endif 154