1 /* 2 * Copyright (c) 2010-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef CORE_H 19 #define CORE_H 20 21 #include <linux/etherdevice.h> 22 #include <linux/rtnetlink.h> 23 #include <linux/firmware.h> 24 #include <linux/sched.h> 25 #include <linux/circ_buf.h> 26 #include <net/cfg80211.h> 27 #include "htc.h" 28 #include "wmi.h" 29 #include "bmi.h" 30 #include "target.h" 31 32 #define MAX_ATH6KL 1 33 #define ATH6KL_MAX_RX_BUFFERS 16 34 #define ATH6KL_BUFFER_SIZE 1664 35 #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4 36 #define ATH6KL_AMSDU_REFILL_THRESHOLD 3 37 #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128) 38 #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508 39 #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46 40 41 #define USER_SAVEDKEYS_STAT_INIT 0 42 #define USER_SAVEDKEYS_STAT_RUN 1 43 44 #define ATH6KL_TX_TIMEOUT 10 45 #define ATH6KL_MAX_ENDPOINTS 4 46 #define MAX_NODE_NUM 15 47 48 #define ATH6KL_APSD_ALL_FRAME 0xFFFF 49 #define ATH6KL_APSD_NUM_OF_AC 0x4 50 #define ATH6KL_APSD_FRAME_MASK 0xF 51 52 /* Extra bytes for htc header alignment */ 53 #define ATH6KL_HTC_ALIGN_BYTES 3 54 55 /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */ 56 #define MAX_DEF_COOKIE_NUM 180 57 #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */ 58 #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM) 59 60 #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC) 61 62 #define DISCON_TIMER_INTVAL 10000 /* in msec */ 63 64 /* Channel dwell time in fg scan */ 65 #define ATH6KL_FG_SCAN_INTERVAL 50 /* in ms */ 66 67 /* includes also the null byte */ 68 #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL" 69 70 enum ath6kl_fw_ie_type { 71 ATH6KL_FW_IE_FW_VERSION = 0, 72 ATH6KL_FW_IE_TIMESTAMP = 1, 73 ATH6KL_FW_IE_OTP_IMAGE = 2, 74 ATH6KL_FW_IE_FW_IMAGE = 3, 75 ATH6KL_FW_IE_PATCH_IMAGE = 4, 76 ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5, 77 ATH6KL_FW_IE_CAPABILITIES = 6, 78 ATH6KL_FW_IE_PATCH_ADDR = 7, 79 ATH6KL_FW_IE_BOARD_ADDR = 8, 80 ATH6KL_FW_IE_VIF_MAX = 9, 81 }; 82 83 enum ath6kl_fw_capability { 84 ATH6KL_FW_CAPABILITY_HOST_P2P = 0, 85 ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1, 86 87 /* 88 * Firmware is capable of supporting P2P mgmt operations on a 89 * station interface. After group formation, the station 90 * interface will become a P2P client/GO interface as the case may be 91 */ 92 ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, 93 94 /* 95 * Firmware has support to cleanup inactive stations 96 * in AP mode. 97 */ 98 ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, 99 100 /* Firmware has support to override rsn cap of rsn ie */ 101 ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, 102 103 /* 104 * Multicast support in WOW and host awake mode. 105 * Allow all multicast in host awake mode. 106 * Apply multicast filter in WOW mode. 107 */ 108 ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER, 109 110 /* Firmware supports enhanced bmiss detection */ 111 ATH6KL_FW_CAPABILITY_BMISS_ENHANCE, 112 113 /* 114 * FW supports matching of ssid in schedule scan 115 */ 116 ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST, 117 118 /* Firmware supports filtering BSS results by RSSI */ 119 ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD, 120 121 /* FW sets mac_addr[4] ^= 0x80 for newly created interfaces */ 122 ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR, 123 124 /* Firmware supports TX error rate notification */ 125 ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY, 126 127 /* supports WMI_SET_REGDOMAIN_CMDID command */ 128 ATH6KL_FW_CAPABILITY_REGDOMAIN, 129 130 /* Firmware supports sched scan decoupled from host sleep */ 131 ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2, 132 133 /* 134 * Firmware capability for hang detection through heart beat 135 * challenge messages. 136 */ 137 ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL, 138 139 /* this needs to be last */ 140 ATH6KL_FW_CAPABILITY_MAX, 141 }; 142 143 #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32) 144 145 struct ath6kl_fw_ie { 146 __le32 id; 147 __le32 len; 148 u8 data[0]; 149 }; 150 151 enum ath6kl_hw_flags { 152 ATH6KL_HW_FLAG_64BIT_RATES = BIT(0), 153 }; 154 155 #define ATH6KL_FW_API2_FILE "fw-2.bin" 156 #define ATH6KL_FW_API3_FILE "fw-3.bin" 157 #define ATH6KL_FW_API4_FILE "fw-4.bin" 158 159 /* AR6003 1.0 definitions */ 160 #define AR6003_HW_1_0_VERSION 0x300002ba 161 162 /* AR6003 2.0 definitions */ 163 #define AR6003_HW_2_0_VERSION 0x30000384 164 #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910 165 #define AR6003_HW_2_0_FW_DIR "ath6k/AR6003/hw2.0" 166 #define AR6003_HW_2_0_OTP_FILE "otp.bin.z77" 167 #define AR6003_HW_2_0_FIRMWARE_FILE "athwlan.bin.z77" 168 #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "athtcmd_ram.bin" 169 #define AR6003_HW_2_0_PATCH_FILE "data.patch.bin" 170 #define AR6003_HW_2_0_BOARD_DATA_FILE AR6003_HW_2_0_FW_DIR "/bdata.bin" 171 #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \ 172 AR6003_HW_2_0_FW_DIR "/bdata.SD31.bin" 173 174 /* AR6003 3.0 definitions */ 175 #define AR6003_HW_2_1_1_VERSION 0x30000582 176 #define AR6003_HW_2_1_1_FW_DIR "ath6k/AR6003/hw2.1.1" 177 #define AR6003_HW_2_1_1_OTP_FILE "otp.bin" 178 #define AR6003_HW_2_1_1_FIRMWARE_FILE "athwlan.bin" 179 #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE "athtcmd_ram.bin" 180 #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE "utf.bin" 181 #define AR6003_HW_2_1_1_TESTSCRIPT_FILE "nullTestFlow.bin" 182 #define AR6003_HW_2_1_1_PATCH_FILE "data.patch.bin" 183 #define AR6003_HW_2_1_1_BOARD_DATA_FILE AR6003_HW_2_1_1_FW_DIR "/bdata.bin" 184 #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \ 185 AR6003_HW_2_1_1_FW_DIR "/bdata.SD31.bin" 186 187 /* AR6004 1.0 definitions */ 188 #define AR6004_HW_1_0_VERSION 0x30000623 189 #define AR6004_HW_1_0_FW_DIR "ath6k/AR6004/hw1.0" 190 #define AR6004_HW_1_0_FIRMWARE_FILE "fw.ram.bin" 191 #define AR6004_HW_1_0_BOARD_DATA_FILE AR6004_HW_1_0_FW_DIR "/bdata.bin" 192 #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \ 193 AR6004_HW_1_0_FW_DIR "/bdata.DB132.bin" 194 195 /* AR6004 1.1 definitions */ 196 #define AR6004_HW_1_1_VERSION 0x30000001 197 #define AR6004_HW_1_1_FW_DIR "ath6k/AR6004/hw1.1" 198 #define AR6004_HW_1_1_FIRMWARE_FILE "fw.ram.bin" 199 #define AR6004_HW_1_1_BOARD_DATA_FILE AR6004_HW_1_1_FW_DIR "/bdata.bin" 200 #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \ 201 AR6004_HW_1_1_FW_DIR "/bdata.DB132.bin" 202 203 /* AR6004 1.2 definitions */ 204 #define AR6004_HW_1_2_VERSION 0x300007e8 205 #define AR6004_HW_1_2_FW_DIR "ath6k/AR6004/hw1.2" 206 #define AR6004_HW_1_2_FIRMWARE_FILE "fw.ram.bin" 207 #define AR6004_HW_1_2_BOARD_DATA_FILE AR6004_HW_1_2_FW_DIR "/bdata.bin" 208 #define AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE \ 209 AR6004_HW_1_2_FW_DIR "/bdata.bin" 210 211 /* AR6004 1.3 definitions */ 212 #define AR6004_HW_1_3_VERSION 0x31c8088a 213 #define AR6004_HW_1_3_FW_DIR "ath6k/AR6004/hw1.3" 214 #define AR6004_HW_1_3_FIRMWARE_FILE "fw.ram.bin" 215 #define AR6004_HW_1_3_BOARD_DATA_FILE "ath6k/AR6004/hw1.3/bdata.bin" 216 #define AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE "ath6k/AR6004/hw1.3/bdata.bin" 217 218 /* Per STA data, used in AP mode */ 219 #define STA_PS_AWAKE BIT(0) 220 #define STA_PS_SLEEP BIT(1) 221 #define STA_PS_POLLED BIT(2) 222 #define STA_PS_APSD_TRIGGER BIT(3) 223 #define STA_PS_APSD_EOSP BIT(4) 224 225 /* HTC TX packet tagging definitions */ 226 #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED 227 #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1) 228 229 #define AR6003_CUST_DATA_SIZE 16 230 231 #define AGGR_WIN_IDX(x, y) ((x) % (y)) 232 #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y)) 233 #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y)) 234 #define ATH6KL_MAX_SEQ_NO 0xFFF 235 #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO) 236 237 #define NUM_OF_TIDS 8 238 #define AGGR_SZ_DEFAULT 8 239 240 #define AGGR_WIN_SZ_MIN 2 241 #define AGGR_WIN_SZ_MAX 8 242 243 #define TID_WINDOW_SZ(_x) ((_x) << 1) 244 245 #define AGGR_NUM_OF_FREE_NETBUFS 16 246 247 #define AGGR_RX_TIMEOUT 100 /* in ms */ 248 249 #define WMI_TIMEOUT (2 * HZ) 250 251 #define MBOX_YIELD_LIMIT 99 252 253 #define ATH6KL_DEFAULT_LISTEN_INTVAL 100 /* in TUs */ 254 #define ATH6KL_DEFAULT_BMISS_TIME 1500 255 #define ATH6KL_MAX_WOW_LISTEN_INTL 300 /* in TUs */ 256 #define ATH6KL_MAX_BMISS_TIME 5000 257 258 /* configuration lags */ 259 /* 260 * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in 261 * ERP IE of beacon to determine the short premable support when 262 * sending (Re)Assoc req. 263 * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power 264 * module state transition failure events which happen during 265 * scan, to the host. 266 */ 267 #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0) 268 #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1) 269 #define ATH6KL_CONF_ENABLE_11N BIT(2) 270 #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3) 271 #define ATH6KL_CONF_UART_DEBUG BIT(4) 272 273 #define P2P_WILDCARD_SSID_LEN 7 /* DIRECT- */ 274 275 enum wlan_low_pwr_state { 276 WLAN_POWER_STATE_ON, 277 WLAN_POWER_STATE_CUT_PWR, 278 WLAN_POWER_STATE_DEEP_SLEEP, 279 WLAN_POWER_STATE_WOW 280 }; 281 282 enum sme_state { 283 SME_DISCONNECTED, 284 SME_CONNECTING, 285 SME_CONNECTED 286 }; 287 288 struct skb_hold_q { 289 struct sk_buff *skb; 290 bool is_amsdu; 291 u16 seq_no; 292 }; 293 294 struct rxtid { 295 bool aggr; 296 bool timer_mon; 297 u16 win_sz; 298 u16 seq_next; 299 u32 hold_q_sz; 300 struct skb_hold_q *hold_q; 301 struct sk_buff_head q; 302 303 /* 304 * lock mainly protects seq_next and hold_q. Movement of seq_next 305 * needs to be protected between aggr_timeout() and 306 * aggr_process_recv_frm(). hold_q will be holding the pending 307 * reorder frames and it's access should also be protected. 308 * Some of the other fields like hold_q_sz, win_sz and aggr are 309 * initialized/reset when receiving addba/delba req, also while 310 * deleting aggr state all the pending buffers are flushed before 311 * resetting these fields, so there should not be any race in accessing 312 * these fields. 313 */ 314 spinlock_t lock; 315 }; 316 317 struct rxtid_stats { 318 u32 num_into_aggr; 319 u32 num_dups; 320 u32 num_oow; 321 u32 num_mpdu; 322 u32 num_amsdu; 323 u32 num_delivered; 324 u32 num_timeouts; 325 u32 num_hole; 326 u32 num_bar; 327 }; 328 329 struct aggr_info_conn { 330 u8 aggr_sz; 331 u8 timer_scheduled; 332 struct timer_list timer; 333 struct net_device *dev; 334 struct rxtid rx_tid[NUM_OF_TIDS]; 335 struct rxtid_stats stat[NUM_OF_TIDS]; 336 struct aggr_info *aggr_info; 337 }; 338 339 struct aggr_info { 340 struct aggr_info_conn *aggr_conn; 341 struct sk_buff_head rx_amsdu_freeq; 342 }; 343 344 struct ath6kl_wep_key { 345 u8 key_index; 346 u8 key_len; 347 u8 key[64]; 348 }; 349 350 #define ATH6KL_KEY_SEQ_LEN 8 351 352 struct ath6kl_key { 353 u8 key[WLAN_MAX_KEY_LEN]; 354 u8 key_len; 355 u8 seq[ATH6KL_KEY_SEQ_LEN]; 356 u8 seq_len; 357 u32 cipher; 358 }; 359 360 struct ath6kl_node_mapping { 361 u8 mac_addr[ETH_ALEN]; 362 u8 ep_id; 363 u8 tx_pend; 364 }; 365 366 struct ath6kl_cookie { 367 struct sk_buff *skb; 368 u32 map_no; 369 struct htc_packet htc_pkt; 370 struct ath6kl_cookie *arc_list_next; 371 }; 372 373 struct ath6kl_mgmt_buff { 374 struct list_head list; 375 u32 freq; 376 u32 wait; 377 u32 id; 378 bool no_cck; 379 size_t len; 380 u8 buf[0]; 381 }; 382 383 struct ath6kl_sta { 384 u16 sta_flags; 385 u8 mac[ETH_ALEN]; 386 u8 aid; 387 u8 keymgmt; 388 u8 ucipher; 389 u8 auth; 390 u8 wpa_ie[ATH6KL_MAX_IE]; 391 struct sk_buff_head psq; 392 393 /* protects psq, mgmt_psq, apsdq, and mgmt_psq_len fields */ 394 spinlock_t psq_lock; 395 396 struct list_head mgmt_psq; 397 size_t mgmt_psq_len; 398 u8 apsd_info; 399 struct sk_buff_head apsdq; 400 struct aggr_info_conn *aggr_conn; 401 }; 402 403 struct ath6kl_version { 404 u32 target_ver; 405 u32 wlan_ver; 406 u32 abi_ver; 407 }; 408 409 struct ath6kl_bmi { 410 u32 cmd_credits; 411 bool done_sent; 412 u8 *cmd_buf; 413 u32 max_data_size; 414 u32 max_cmd_size; 415 }; 416 417 struct target_stats { 418 u64 tx_pkt; 419 u64 tx_byte; 420 u64 tx_ucast_pkt; 421 u64 tx_ucast_byte; 422 u64 tx_mcast_pkt; 423 u64 tx_mcast_byte; 424 u64 tx_bcast_pkt; 425 u64 tx_bcast_byte; 426 u64 tx_rts_success_cnt; 427 u64 tx_pkt_per_ac[4]; 428 429 u64 tx_err; 430 u64 tx_fail_cnt; 431 u64 tx_retry_cnt; 432 u64 tx_mult_retry_cnt; 433 u64 tx_rts_fail_cnt; 434 435 u64 rx_pkt; 436 u64 rx_byte; 437 u64 rx_ucast_pkt; 438 u64 rx_ucast_byte; 439 u64 rx_mcast_pkt; 440 u64 rx_mcast_byte; 441 u64 rx_bcast_pkt; 442 u64 rx_bcast_byte; 443 u64 rx_frgment_pkt; 444 445 u64 rx_err; 446 u64 rx_crc_err; 447 u64 rx_key_cache_miss; 448 u64 rx_decrypt_err; 449 u64 rx_dupl_frame; 450 451 u64 tkip_local_mic_fail; 452 u64 tkip_cnter_measures_invoked; 453 u64 tkip_replays; 454 u64 tkip_fmt_err; 455 u64 ccmp_fmt_err; 456 u64 ccmp_replays; 457 458 u64 pwr_save_fail_cnt; 459 460 u64 cs_bmiss_cnt; 461 u64 cs_low_rssi_cnt; 462 u64 cs_connect_cnt; 463 u64 cs_discon_cnt; 464 465 s32 tx_ucast_rate; 466 s32 rx_ucast_rate; 467 468 u32 lq_val; 469 470 u32 wow_pkt_dropped; 471 u16 wow_evt_discarded; 472 473 s16 noise_floor_calib; 474 s16 cs_rssi; 475 s16 cs_ave_beacon_rssi; 476 u8 cs_ave_beacon_snr; 477 u8 cs_last_roam_msec; 478 u8 cs_snr; 479 480 u8 wow_host_pkt_wakeups; 481 u8 wow_host_evt_wakeups; 482 483 u32 arp_received; 484 u32 arp_matched; 485 u32 arp_replied; 486 }; 487 488 struct ath6kl_mbox_info { 489 u32 htc_addr; 490 u32 htc_ext_addr; 491 u32 htc_ext_sz; 492 493 u32 block_size; 494 495 u32 gmbox_addr; 496 497 u32 gmbox_sz; 498 }; 499 500 /* 501 * 802.11i defines an extended IV for use with non-WEP ciphers. 502 * When the EXTIV bit is set in the key id byte an additional 503 * 4 bytes immediately follow the IV for TKIP. For CCMP the 504 * EXTIV bit is likewise set but the 8 bytes represent the 505 * CCMP header rather than IV+extended-IV. 506 */ 507 508 #define ATH6KL_KEYBUF_SIZE 16 509 #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */ 510 511 #define ATH6KL_KEY_XMIT 0x01 512 #define ATH6KL_KEY_RECV 0x02 513 #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */ 514 515 /* Initial group key for AP mode */ 516 struct ath6kl_req_key { 517 bool valid; 518 u8 key_index; 519 int key_type; 520 u8 key[WLAN_MAX_KEY_LEN]; 521 u8 key_len; 522 }; 523 524 enum ath6kl_hif_type { 525 ATH6KL_HIF_TYPE_SDIO, 526 ATH6KL_HIF_TYPE_USB, 527 }; 528 529 enum ath6kl_htc_type { 530 ATH6KL_HTC_TYPE_MBOX, 531 ATH6KL_HTC_TYPE_PIPE, 532 }; 533 534 /* Max number of filters that hw supports */ 535 #define ATH6K_MAX_MC_FILTERS_PER_LIST 7 536 struct ath6kl_mc_filter { 537 struct list_head list; 538 char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE]; 539 }; 540 541 struct ath6kl_htcap { 542 bool ht_enable; 543 u8 ampdu_factor; 544 unsigned short cap_info; 545 }; 546 547 /* 548 * Driver's maximum limit, note that some firmwares support only one vif 549 * and the runtime (current) limit must be checked from ar->vif_max. 550 */ 551 #define ATH6KL_VIF_MAX 3 552 553 /* vif flags info */ 554 enum ath6kl_vif_state { 555 CONNECTED, 556 CONNECT_PEND, 557 WMM_ENABLED, 558 NETQ_STOPPED, 559 DTIM_EXPIRED, 560 NETDEV_REGISTERED, 561 CLEAR_BSSFILTER_ON_BEACON, 562 DTIM_PERIOD_AVAIL, 563 WLAN_ENABLED, 564 STATS_UPDATE_PEND, 565 HOST_SLEEP_MODE_CMD_PROCESSED, 566 NETDEV_MCAST_ALL_ON, 567 NETDEV_MCAST_ALL_OFF, 568 SCHED_SCANNING, 569 }; 570 571 struct ath6kl_vif { 572 struct list_head list; 573 struct wireless_dev wdev; 574 struct net_device *ndev; 575 struct ath6kl *ar; 576 /* Lock to protect vif specific net_stats and flags */ 577 spinlock_t if_lock; 578 u8 fw_vif_idx; 579 unsigned long flags; 580 int ssid_len; 581 u8 ssid[IEEE80211_MAX_SSID_LEN]; 582 u8 dot11_auth_mode; 583 u8 auth_mode; 584 u8 prwise_crypto; 585 u8 prwise_crypto_len; 586 u8 grp_crypto; 587 u8 grp_crypto_len; 588 u8 def_txkey_index; 589 u8 next_mode; 590 u8 nw_type; 591 u8 bssid[ETH_ALEN]; 592 u8 req_bssid[ETH_ALEN]; 593 u16 ch_hint; 594 u16 bss_ch; 595 struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1]; 596 struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1]; 597 struct aggr_info *aggr_cntxt; 598 struct ath6kl_htcap htcap[IEEE80211_NUM_BANDS]; 599 600 struct timer_list disconnect_timer; 601 struct timer_list sched_scan_timer; 602 603 struct cfg80211_scan_request *scan_req; 604 enum sme_state sme_state; 605 int reconnect_flag; 606 u32 last_roc_id; 607 u32 last_cancel_roc_id; 608 u32 send_action_id; 609 bool probe_req_report; 610 u16 assoc_bss_beacon_int; 611 u16 listen_intvl_t; 612 u16 bmiss_time_t; 613 u32 txe_intvl; 614 u16 bg_scan_period; 615 u8 assoc_bss_dtim_period; 616 struct net_device_stats net_stats; 617 struct target_stats target_stats; 618 struct wmi_connect_cmd profile; 619 u16 rsn_capab; 620 621 struct list_head mc_filter; 622 }; 623 624 static inline struct ath6kl_vif *ath6kl_vif_from_wdev(struct wireless_dev *wdev) 625 { 626 return container_of(wdev, struct ath6kl_vif, wdev); 627 } 628 629 #define WOW_LIST_ID 0 630 #define WOW_HOST_REQ_DELAY 500 /* ms */ 631 632 #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */ 633 634 /* Flag info */ 635 enum ath6kl_dev_state { 636 WMI_ENABLED, 637 WMI_READY, 638 WMI_CTRL_EP_FULL, 639 TESTMODE, 640 DESTROY_IN_PROGRESS, 641 SKIP_SCAN, 642 ROAM_TBL_PEND, 643 FIRST_BOOT, 644 RECOVERY_CLEANUP, 645 }; 646 647 enum ath6kl_state { 648 ATH6KL_STATE_OFF, 649 ATH6KL_STATE_ON, 650 ATH6KL_STATE_SUSPENDING, 651 ATH6KL_STATE_RESUMING, 652 ATH6KL_STATE_DEEPSLEEP, 653 ATH6KL_STATE_CUTPOWER, 654 ATH6KL_STATE_WOW, 655 ATH6KL_STATE_RECOVERY, 656 }; 657 658 /* Fw error recovery */ 659 #define ATH6KL_HB_RESP_MISS_THRES 5 660 661 enum ath6kl_fw_err { 662 ATH6KL_FW_ASSERT, 663 ATH6KL_FW_HB_RESP_FAILURE, 664 ATH6KL_FW_EP_FULL, 665 }; 666 667 struct ath6kl { 668 struct device *dev; 669 struct wiphy *wiphy; 670 671 enum ath6kl_state state; 672 unsigned int testmode; 673 674 struct ath6kl_bmi bmi; 675 const struct ath6kl_hif_ops *hif_ops; 676 const struct ath6kl_htc_ops *htc_ops; 677 struct wmi *wmi; 678 int tx_pending[ENDPOINT_MAX]; 679 int total_tx_data_pend; 680 struct htc_target *htc_target; 681 enum ath6kl_hif_type hif_type; 682 void *hif_priv; 683 struct list_head vif_list; 684 /* Lock to avoid race in vif_list entries among add/del/traverse */ 685 spinlock_t list_lock; 686 u8 num_vif; 687 unsigned int vif_max; 688 u8 max_norm_iface; 689 u8 avail_idx_map; 690 691 /* 692 * Protects at least amsdu_rx_buffer_queue, ath6kl_alloc_cookie() 693 * calls, tx_pending and total_tx_data_pend. 694 */ 695 spinlock_t lock; 696 697 struct semaphore sem; 698 u8 lrssi_roam_threshold; 699 struct ath6kl_version version; 700 u32 target_type; 701 u8 tx_pwr; 702 struct ath6kl_node_mapping node_map[MAX_NODE_NUM]; 703 u8 ibss_ps_enable; 704 bool ibss_if_active; 705 u8 node_num; 706 u8 next_ep_id; 707 struct ath6kl_cookie *cookie_list; 708 u32 cookie_count; 709 enum htc_endpoint_id ac2ep_map[WMM_NUM_AC]; 710 bool ac_stream_active[WMM_NUM_AC]; 711 u8 ac_stream_pri_map[WMM_NUM_AC]; 712 u8 hiac_stream_active_pri; 713 u8 ep2ac_map[ENDPOINT_MAX]; 714 enum htc_endpoint_id ctrl_ep; 715 struct ath6kl_htc_credit_info credit_state_info; 716 u32 connect_ctrl_flags; 717 u32 user_key_ctrl; 718 u8 usr_bss_filter; 719 struct ath6kl_sta sta_list[AP_MAX_NUM_STA]; 720 u8 sta_list_index; 721 struct ath6kl_req_key ap_mode_bkey; 722 struct sk_buff_head mcastpsq; 723 u32 want_ch_switch; 724 u16 last_ch; 725 726 /* 727 * FIXME: protects access to mcastpsq but is actually useless as 728 * all skbe_queue_*() functions provide serialisation themselves 729 */ 730 spinlock_t mcastpsq_lock; 731 732 u8 intra_bss; 733 struct wmi_ap_mode_stat ap_stats; 734 u8 ap_country_code[3]; 735 struct list_head amsdu_rx_buffer_queue; 736 u8 rx_meta_ver; 737 enum wlan_low_pwr_state wlan_pwr_state; 738 u8 mac_addr[ETH_ALEN]; 739 #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4 740 struct { 741 void *rx_report; 742 size_t rx_report_len; 743 } tm; 744 745 struct ath6kl_hw { 746 u32 id; 747 const char *name; 748 u32 dataset_patch_addr; 749 u32 app_load_addr; 750 u32 app_start_override_addr; 751 u32 board_ext_data_addr; 752 u32 reserved_ram_size; 753 u32 board_addr; 754 u32 refclk_hz; 755 u32 uarttx_pin; 756 u32 testscript_addr; 757 enum wmi_phy_cap cap; 758 759 u32 flags; 760 761 struct ath6kl_hw_fw { 762 const char *dir; 763 const char *otp; 764 const char *fw; 765 const char *tcmd; 766 const char *patch; 767 const char *utf; 768 const char *testscript; 769 } fw; 770 771 const char *fw_board; 772 const char *fw_default_board; 773 } hw; 774 775 u16 conf_flags; 776 u16 suspend_mode; 777 u16 wow_suspend_mode; 778 wait_queue_head_t event_wq; 779 struct ath6kl_mbox_info mbox_info; 780 781 struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM]; 782 unsigned long flag; 783 784 u8 *fw_board; 785 size_t fw_board_len; 786 787 u8 *fw_otp; 788 size_t fw_otp_len; 789 790 u8 *fw; 791 size_t fw_len; 792 793 u8 *fw_patch; 794 size_t fw_patch_len; 795 796 u8 *fw_testscript; 797 size_t fw_testscript_len; 798 799 unsigned int fw_api; 800 unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN]; 801 802 struct workqueue_struct *ath6kl_wq; 803 804 struct dentry *debugfs_phy; 805 806 bool p2p; 807 808 bool wiphy_registered; 809 810 struct ath6kl_fw_recovery { 811 struct work_struct recovery_work; 812 unsigned long err_reason; 813 unsigned long hb_poll; 814 struct timer_list hb_timer; 815 u32 seq_num; 816 bool hb_pending; 817 u8 hb_misscnt; 818 bool enable; 819 } fw_recovery; 820 821 #ifdef CONFIG_ATH6KL_DEBUG 822 struct { 823 struct sk_buff_head fwlog_queue; 824 struct completion fwlog_completion; 825 bool fwlog_open; 826 827 u32 fwlog_mask; 828 829 unsigned int dbgfs_diag_reg; 830 u32 diag_reg_addr_wr; 831 u32 diag_reg_val_wr; 832 833 struct { 834 unsigned int invalid_rate; 835 } war_stats; 836 837 u8 *roam_tbl; 838 unsigned int roam_tbl_len; 839 840 u8 keepalive; 841 u8 disc_timeout; 842 } debug; 843 #endif /* CONFIG_ATH6KL_DEBUG */ 844 }; 845 846 static inline struct ath6kl *ath6kl_priv(struct net_device *dev) 847 { 848 return ((struct ath6kl_vif *) netdev_priv(dev))->ar; 849 } 850 851 static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar, 852 u32 item_offset) 853 { 854 u32 addr = 0; 855 856 if (ar->target_type == TARGET_TYPE_AR6003) 857 addr = ATH6KL_AR6003_HI_START_ADDR + item_offset; 858 else if (ar->target_type == TARGET_TYPE_AR6004) 859 addr = ATH6KL_AR6004_HI_START_ADDR + item_offset; 860 861 return addr; 862 } 863 864 int ath6kl_configure_target(struct ath6kl *ar); 865 void ath6kl_detect_error(unsigned long ptr); 866 void disconnect_timer_handler(unsigned long ptr); 867 void init_netdev(struct net_device *dev); 868 void ath6kl_cookie_init(struct ath6kl *ar); 869 void ath6kl_cookie_cleanup(struct ath6kl *ar); 870 void ath6kl_rx(struct htc_target *target, struct htc_packet *packet); 871 void ath6kl_tx_complete(struct htc_target *context, 872 struct list_head *packet_queue); 873 enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target, 874 struct htc_packet *packet); 875 void ath6kl_stop_txrx(struct ath6kl *ar); 876 void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar); 877 int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value); 878 int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length); 879 int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value); 880 int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length); 881 int ath6kl_read_fwlogs(struct ath6kl *ar); 882 void ath6kl_init_profile_info(struct ath6kl_vif *vif); 883 void ath6kl_tx_data_cleanup(struct ath6kl *ar); 884 885 struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar); 886 void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie); 887 int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev); 888 889 struct aggr_info *aggr_init(struct ath6kl_vif *vif); 890 void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info, 891 struct aggr_info_conn *aggr_conn); 892 void ath6kl_rx_refill(struct htc_target *target, 893 enum htc_endpoint_id endpoint); 894 void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count); 895 struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target, 896 enum htc_endpoint_id endpoint, 897 int len); 898 void aggr_module_destroy(struct aggr_info *aggr_info); 899 void aggr_reset_state(struct aggr_info_conn *aggr_conn); 900 901 struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 *node_addr); 902 struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid); 903 904 void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver, 905 enum wmi_phy_cap cap); 906 int ath6kl_control_tx(void *devt, struct sk_buff *skb, 907 enum htc_endpoint_id eid); 908 void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel, 909 u8 *bssid, u16 listen_int, 910 u16 beacon_int, enum network_type net_type, 911 u8 beacon_ie_len, u8 assoc_req_len, 912 u8 assoc_resp_len, u8 *assoc_info); 913 void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel); 914 void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr, 915 u8 keymgmt, u8 ucipher, u8 auth, 916 u8 assoc_req_len, u8 *assoc_info, u8 apsd_info); 917 void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason, 918 u8 *bssid, u8 assoc_resp_len, 919 u8 *assoc_info, u16 prot_reason_status); 920 void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast); 921 void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr); 922 void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status); 923 void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len); 924 void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active); 925 enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac); 926 927 void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid); 928 929 void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif); 930 void ath6kl_disconnect(struct ath6kl_vif *vif); 931 void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid); 932 void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no, 933 u8 win_sz); 934 void ath6kl_wakeup_event(void *dev); 935 936 void ath6kl_reset_device(struct ath6kl *ar, u32 target_type, 937 bool wait_fot_compltn, bool cold_reset); 938 void ath6kl_init_control_info(struct ath6kl_vif *vif); 939 struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar); 940 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready); 941 int ath6kl_init_hw_start(struct ath6kl *ar); 942 int ath6kl_init_hw_stop(struct ath6kl *ar); 943 int ath6kl_init_fetch_firmwares(struct ath6kl *ar); 944 int ath6kl_init_hw_params(struct ath6kl *ar); 945 946 void ath6kl_check_wow_status(struct ath6kl *ar); 947 948 void ath6kl_core_tx_complete(struct ath6kl *ar, struct sk_buff *skb); 949 void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe); 950 951 struct ath6kl *ath6kl_core_create(struct device *dev); 952 int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type); 953 void ath6kl_core_cleanup(struct ath6kl *ar); 954 void ath6kl_core_destroy(struct ath6kl *ar); 955 956 /* Fw error recovery */ 957 void ath6kl_init_hw_restart(struct ath6kl *ar); 958 void ath6kl_recovery_err_notify(struct ath6kl *ar, enum ath6kl_fw_err reason); 959 void ath6kl_recovery_hb_event(struct ath6kl *ar, u32 cookie); 960 void ath6kl_recovery_init(struct ath6kl *ar); 961 void ath6kl_recovery_cleanup(struct ath6kl *ar); 962 void ath6kl_recovery_suspend(struct ath6kl *ar); 963 void ath6kl_recovery_resume(struct ath6kl *ar); 964 #endif /* CORE_H */ 965