1bdcd8170SKalle Valo /*
2bdcd8170SKalle Valo  * Copyright (c) 2010-2011 Atheros Communications Inc.
31b2df407SVasanthakumar Thiagarajan  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
4bdcd8170SKalle Valo  *
5bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
6bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
7bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
8bdcd8170SKalle Valo  *
9bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16bdcd8170SKalle Valo  */
17bdcd8170SKalle Valo 
18bdcd8170SKalle Valo #ifndef CORE_H
19bdcd8170SKalle Valo #define CORE_H
20bdcd8170SKalle Valo 
21bdcd8170SKalle Valo #include <linux/etherdevice.h>
22bdcd8170SKalle Valo #include <linux/rtnetlink.h>
23bdcd8170SKalle Valo #include <linux/firmware.h>
24bdcd8170SKalle Valo #include <linux/sched.h>
25bdf5396bSKalle Valo #include <linux/circ_buf.h>
26bdcd8170SKalle Valo #include <net/cfg80211.h>
27bdcd8170SKalle Valo #include "htc.h"
28bdcd8170SKalle Valo #include "wmi.h"
29bdcd8170SKalle Valo #include "bmi.h"
30bc07ddb2SKalle Valo #include "target.h"
31bdcd8170SKalle Valo 
32bdcd8170SKalle Valo #define MAX_ATH6KL                        1
33bdcd8170SKalle Valo #define ATH6KL_MAX_RX_BUFFERS             16
34bdcd8170SKalle Valo #define ATH6KL_BUFFER_SIZE                1664
35bdcd8170SKalle Valo #define ATH6KL_MAX_AMSDU_RX_BUFFERS       4
36bdcd8170SKalle Valo #define ATH6KL_AMSDU_REFILL_THRESHOLD     3
37bdcd8170SKalle Valo #define ATH6KL_AMSDU_BUFFER_SIZE     (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128)
38bdcd8170SKalle Valo #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN	1508
39bdcd8170SKalle Valo #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN	46
40bdcd8170SKalle Valo 
41bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_INIT     0
42bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_RUN      1
43bdcd8170SKalle Valo 
44bdcd8170SKalle Valo #define ATH6KL_TX_TIMEOUT      10
45bdcd8170SKalle Valo #define ATH6KL_MAX_ENDPOINTS   4
46bdcd8170SKalle Valo #define MAX_NODE_NUM           15
47bdcd8170SKalle Valo 
48c1762a3fSThirumalai Pachamuthu #define ATH6KL_APSD_ALL_FRAME		0xFFFF
49c1762a3fSThirumalai Pachamuthu #define ATH6KL_APSD_NUM_OF_AC		0x4
50c1762a3fSThirumalai Pachamuthu #define ATH6KL_APSD_FRAME_MASK		0xF
51c1762a3fSThirumalai Pachamuthu 
521df94a85SVasanthakumar Thiagarajan /* Extra bytes for htc header alignment */
531df94a85SVasanthakumar Thiagarajan #define ATH6KL_HTC_ALIGN_BYTES 3
541df94a85SVasanthakumar Thiagarajan 
55bdcd8170SKalle Valo /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */
56bdcd8170SKalle Valo #define MAX_DEF_COOKIE_NUM                180
57bdcd8170SKalle Valo #define MAX_HI_COOKIE_NUM                 18	/* 10% of MAX_COOKIE_NUM */
58bdcd8170SKalle Valo #define MAX_COOKIE_NUM                 (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM)
59bdcd8170SKalle Valo 
60bdcd8170SKalle Valo #define MAX_DEFAULT_SEND_QUEUE_DEPTH      (MAX_DEF_COOKIE_NUM / WMM_NUM_AC)
61bdcd8170SKalle Valo 
62bdcd8170SKalle Valo #define DISCON_TIMER_INTVAL               10000  /* in msec */
63bdcd8170SKalle Valo 
6413423c31SVasanthakumar Thiagarajan /* Channel dwell time in fg scan */
6513423c31SVasanthakumar Thiagarajan #define ATH6KL_FG_SCAN_INTERVAL		50 /* in ms */
6613423c31SVasanthakumar Thiagarajan 
6750d41234SKalle Valo /* includes also the null byte */
6850d41234SKalle Valo #define ATH6KL_FIRMWARE_MAGIC               "QCA-ATH6KL"
6950d41234SKalle Valo 
7050d41234SKalle Valo enum ath6kl_fw_ie_type {
7150d41234SKalle Valo 	ATH6KL_FW_IE_FW_VERSION = 0,
7250d41234SKalle Valo 	ATH6KL_FW_IE_TIMESTAMP = 1,
7350d41234SKalle Valo 	ATH6KL_FW_IE_OTP_IMAGE = 2,
7450d41234SKalle Valo 	ATH6KL_FW_IE_FW_IMAGE = 3,
7550d41234SKalle Valo 	ATH6KL_FW_IE_PATCH_IMAGE = 4,
768a137480SKalle Valo 	ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5,
7797e0496dSKalle Valo 	ATH6KL_FW_IE_CAPABILITIES = 6,
781b4304daSKalle Valo 	ATH6KL_FW_IE_PATCH_ADDR = 7,
7903ef0250SKalle Valo 	ATH6KL_FW_IE_BOARD_ADDR = 8,
80368b1b0fSKalle Valo 	ATH6KL_FW_IE_VIF_MAX = 9,
8150d41234SKalle Valo };
8250d41234SKalle Valo 
8397e0496dSKalle Valo enum ath6kl_fw_capability {
8497e0496dSKalle Valo 	ATH6KL_FW_CAPABILITY_HOST_P2P = 0,
8510509f90SKalle Valo 	ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1,
8697e0496dSKalle Valo 
873ca9d1fcSAarthi Thiruvengadam 	/*
883ca9d1fcSAarthi Thiruvengadam 	 * Firmware is capable of supporting P2P mgmt operations on a
893ca9d1fcSAarthi Thiruvengadam 	 * station interface. After group formation, the station
903ca9d1fcSAarthi Thiruvengadam 	 * interface will become a P2P client/GO interface as the case may be
913ca9d1fcSAarthi Thiruvengadam 	 */
923ca9d1fcSAarthi Thiruvengadam 	ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
933ca9d1fcSAarthi Thiruvengadam 
9403bdeb0dSVasanthakumar Thiagarajan 	/*
9503bdeb0dSVasanthakumar Thiagarajan 	 * Firmware has support to cleanup inactive stations
9603bdeb0dSVasanthakumar Thiagarajan 	 * in AP mode.
9703bdeb0dSVasanthakumar Thiagarajan 	 */
9803bdeb0dSVasanthakumar Thiagarajan 	ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT,
9903bdeb0dSVasanthakumar Thiagarajan 
100d97c121bSVasanthakumar Thiagarajan 	/* Firmware has support to override rsn cap of rsn ie */
101d97c121bSVasanthakumar Thiagarajan 	ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE,
102d97c121bSVasanthakumar Thiagarajan 
1036821d4f0SNaveen Gangadharan 	/*
1046821d4f0SNaveen Gangadharan 	 * Multicast support in WOW and host awake mode.
1056821d4f0SNaveen Gangadharan 	 * Allow all multicast in host awake mode.
1066821d4f0SNaveen Gangadharan 	 * Apply multicast filter in WOW mode.
1076821d4f0SNaveen Gangadharan 	 */
1086821d4f0SNaveen Gangadharan 	ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER,
1096821d4f0SNaveen Gangadharan 
110c422d52dSThomas Pedersen 	/* Firmware supports enhanced bmiss detection */
111c422d52dSThomas Pedersen 	ATH6KL_FW_CAPABILITY_BMISS_ENHANCE,
112c422d52dSThomas Pedersen 
113dd45b759SNaveen Singh 	/*
114dd45b759SNaveen Singh 	 * FW supports matching of ssid in schedule scan
115dd45b759SNaveen Singh 	 */
116dd45b759SNaveen Singh 	ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST,
117dd45b759SNaveen Singh 
11897e0496dSKalle Valo 	/* this needs to be last */
11997e0496dSKalle Valo 	ATH6KL_FW_CAPABILITY_MAX,
12097e0496dSKalle Valo };
12197e0496dSKalle Valo 
12297e0496dSKalle Valo #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32)
12397e0496dSKalle Valo 
12450d41234SKalle Valo struct ath6kl_fw_ie {
12550d41234SKalle Valo 	__le32 id;
12650d41234SKalle Valo 	__le32 len;
12750d41234SKalle Valo 	u8 data[0];
12850d41234SKalle Valo };
12950d41234SKalle Valo 
130c0038972SKalle Valo #define ATH6KL_FW_API2_FILE "fw-2.bin"
13165a8b4ccSKalle Valo #define ATH6KL_FW_API3_FILE "fw-3.bin"
132c0038972SKalle Valo 
133bdcd8170SKalle Valo /* AR6003 1.0 definitions */
1340d0192baSKalle Valo #define AR6003_HW_1_0_VERSION                 0x300002ba
135bdcd8170SKalle Valo 
136bdcd8170SKalle Valo /* AR6003 2.0 definitions */
1370d0192baSKalle Valo #define AR6003_HW_2_0_VERSION                 0x30000384
1380d0192baSKalle Valo #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS  0x57e910
139c0038972SKalle Valo #define AR6003_HW_2_0_FW_DIR			"ath6k/AR6003/hw2.0"
140c0038972SKalle Valo #define AR6003_HW_2_0_OTP_FILE			"otp.bin.z77"
141c0038972SKalle Valo #define AR6003_HW_2_0_FIRMWARE_FILE		"athwlan.bin.z77"
142c0038972SKalle Valo #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE	"athtcmd_ram.bin"
143c0038972SKalle Valo #define AR6003_HW_2_0_PATCH_FILE		"data.patch.bin"
1442023dbb8STim Gardner #define AR6003_HW_2_0_BOARD_DATA_FILE AR6003_HW_2_0_FW_DIR "/bdata.bin"
1450d0192baSKalle Valo #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \
1462023dbb8STim Gardner 			AR6003_HW_2_0_FW_DIR "/bdata.SD31.bin"
147bdcd8170SKalle Valo 
148bdcd8170SKalle Valo /* AR6003 3.0 definitions */
1490d0192baSKalle Valo #define AR6003_HW_2_1_1_VERSION                 0x30000582
150c0038972SKalle Valo #define AR6003_HW_2_1_1_FW_DIR			"ath6k/AR6003/hw2.1.1"
151c0038972SKalle Valo #define AR6003_HW_2_1_1_OTP_FILE		"otp.bin"
152c0038972SKalle Valo #define AR6003_HW_2_1_1_FIRMWARE_FILE		"athwlan.bin"
153c0038972SKalle Valo #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE	"athtcmd_ram.bin"
154cd23c1c9SAlex Yang #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE	"utf.bin"
155cd23c1c9SAlex Yang #define AR6003_HW_2_1_1_TESTSCRIPT_FILE	"nullTestFlow.bin"
156c0038972SKalle Valo #define AR6003_HW_2_1_1_PATCH_FILE		"data.patch.bin"
1572023dbb8STim Gardner #define AR6003_HW_2_1_1_BOARD_DATA_FILE AR6003_HW_2_1_1_FW_DIR "/bdata.bin"
1580d0192baSKalle Valo #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE	\
1592023dbb8STim Gardner 			AR6003_HW_2_1_1_FW_DIR "/bdata.SD31.bin"
160bdcd8170SKalle Valo 
16131024d99SKevin Fang /* AR6004 1.0 definitions */
1620d0192baSKalle Valo #define AR6004_HW_1_0_VERSION                 0x30000623
163c0038972SKalle Valo #define AR6004_HW_1_0_FW_DIR			"ath6k/AR6004/hw1.0"
164c0038972SKalle Valo #define AR6004_HW_1_0_FIRMWARE_FILE		"fw.ram.bin"
1652023dbb8STim Gardner #define AR6004_HW_1_0_BOARD_DATA_FILE         AR6004_HW_1_0_FW_DIR "/bdata.bin"
1660d0192baSKalle Valo #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \
1672023dbb8STim Gardner 	AR6004_HW_1_0_FW_DIR "/bdata.DB132.bin"
168d5720e59SKalle Valo 
169d5720e59SKalle Valo /* AR6004 1.1 definitions */
1700d0192baSKalle Valo #define AR6004_HW_1_1_VERSION                 0x30000001
171c0038972SKalle Valo #define AR6004_HW_1_1_FW_DIR			"ath6k/AR6004/hw1.1"
172c0038972SKalle Valo #define AR6004_HW_1_1_FIRMWARE_FILE		"fw.ram.bin"
1732023dbb8STim Gardner #define AR6004_HW_1_1_BOARD_DATA_FILE         AR6004_HW_1_1_FW_DIR "/bdata.bin"
1740d0192baSKalle Valo #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \
1752023dbb8STim Gardner 	AR6004_HW_1_1_FW_DIR "/bdata.DB132.bin"
17631024d99SKevin Fang 
1776146ca69SRay Chen /* AR6004 1.2 definitions */
1786146ca69SRay Chen #define AR6004_HW_1_2_VERSION                 0x300007e8
1796146ca69SRay Chen #define AR6004_HW_1_2_FW_DIR			"ath6k/AR6004/hw1.2"
1806146ca69SRay Chen #define AR6004_HW_1_2_FIRMWARE_FILE           "fw.ram.bin"
1812023dbb8STim Gardner #define AR6004_HW_1_2_BOARD_DATA_FILE         AR6004_HW_1_2_FW_DIR "/bdata.bin"
1826146ca69SRay Chen #define AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE \
1832023dbb8STim Gardner 	AR6004_HW_1_2_FW_DIR "/bdata.bin"
1846146ca69SRay Chen 
185bdcd8170SKalle Valo /* Per STA data, used in AP mode */
186bdcd8170SKalle Valo #define STA_PS_AWAKE		BIT(0)
187bdcd8170SKalle Valo #define	STA_PS_SLEEP		BIT(1)
188bdcd8170SKalle Valo #define	STA_PS_POLLED		BIT(2)
189c1762a3fSThirumalai Pachamuthu #define STA_PS_APSD_TRIGGER     BIT(3)
190c1762a3fSThirumalai Pachamuthu #define STA_PS_APSD_EOSP        BIT(4)
191bdcd8170SKalle Valo 
192bdcd8170SKalle Valo /* HTC TX packet tagging definitions */
193bdcd8170SKalle Valo #define ATH6KL_CONTROL_PKT_TAG    HTC_TX_PACKET_TAG_USER_DEFINED
194bdcd8170SKalle Valo #define ATH6KL_DATA_PKT_TAG       (ATH6KL_CONTROL_PKT_TAG + 1)
195bdcd8170SKalle Valo 
196bdcd8170SKalle Valo #define AR6003_CUST_DATA_SIZE 16
197bdcd8170SKalle Valo 
198bdcd8170SKalle Valo #define AGGR_WIN_IDX(x, y)          ((x) % (y))
199bdcd8170SKalle Valo #define AGGR_INCR_IDX(x, y)         AGGR_WIN_IDX(((x) + 1), (y))
200bdcd8170SKalle Valo #define AGGR_DCRM_IDX(x, y)         AGGR_WIN_IDX(((x) - 1), (y))
201bdcd8170SKalle Valo #define ATH6KL_MAX_SEQ_NO		0xFFF
202bdcd8170SKalle Valo #define ATH6KL_NEXT_SEQ_NO(x)		(((x) + 1) & ATH6KL_MAX_SEQ_NO)
203bdcd8170SKalle Valo 
204bdcd8170SKalle Valo #define NUM_OF_TIDS         8
205bdcd8170SKalle Valo #define AGGR_SZ_DEFAULT     8
206bdcd8170SKalle Valo 
207bdcd8170SKalle Valo #define AGGR_WIN_SZ_MIN     2
208bdcd8170SKalle Valo #define AGGR_WIN_SZ_MAX     8
209bdcd8170SKalle Valo 
210bdcd8170SKalle Valo #define TID_WINDOW_SZ(_x)   ((_x) << 1)
211bdcd8170SKalle Valo 
212bdcd8170SKalle Valo #define AGGR_NUM_OF_FREE_NETBUFS    16
213bdcd8170SKalle Valo 
214bdcd8170SKalle Valo #define AGGR_RX_TIMEOUT     400	/* in ms */
215bdcd8170SKalle Valo 
216bdcd8170SKalle Valo #define WMI_TIMEOUT (2 * HZ)
217bdcd8170SKalle Valo 
218bdcd8170SKalle Valo #define MBOX_YIELD_LIMIT 99
219bdcd8170SKalle Valo 
2208f46fccdSRaja Mani #define ATH6KL_DEFAULT_LISTEN_INTVAL	100 /* in TUs */
221ce0dc0cfSRaja Mani #define ATH6KL_DEFAULT_BMISS_TIME	1500
222ce0dc0cfSRaja Mani #define ATH6KL_MAX_WOW_LISTEN_INTL	300 /* in TUs */
223ce0dc0cfSRaja Mani #define ATH6KL_MAX_BMISS_TIME		5000
2248f46fccdSRaja Mani 
225bdcd8170SKalle Valo /* configuration lags */
226bdcd8170SKalle Valo /*
227bdcd8170SKalle Valo  * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in
228bdcd8170SKalle Valo  * ERP IE of beacon to determine the short premable support when
229bdcd8170SKalle Valo  * sending (Re)Assoc req.
230bdcd8170SKalle Valo  * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power
231bdcd8170SKalle Valo  * module state transition failure events which happen during
232bdcd8170SKalle Valo  * scan, to the host.
233bdcd8170SKalle Valo  */
234bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_ERP_BARKER		BIT(0)
235bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN  BIT(1)
236bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_11N			BIT(2)
237bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_TX_BURST		BIT(3)
238e390af77SRaja Mani #define ATH6KL_CONF_UART_DEBUG			BIT(4)
239bdcd8170SKalle Valo 
240c86e4f44SAarthi Thiruvengadam #define P2P_WILDCARD_SSID_LEN			7 /* DIRECT- */
241c86e4f44SAarthi Thiruvengadam 
242bdcd8170SKalle Valo enum wlan_low_pwr_state {
243bdcd8170SKalle Valo 	WLAN_POWER_STATE_ON,
244bdcd8170SKalle Valo 	WLAN_POWER_STATE_CUT_PWR,
245bdcd8170SKalle Valo 	WLAN_POWER_STATE_DEEP_SLEEP,
246bdcd8170SKalle Valo 	WLAN_POWER_STATE_WOW
247bdcd8170SKalle Valo };
248bdcd8170SKalle Valo 
249bdcd8170SKalle Valo enum sme_state {
250bdcd8170SKalle Valo 	SME_DISCONNECTED,
251bdcd8170SKalle Valo 	SME_CONNECTING,
252bdcd8170SKalle Valo 	SME_CONNECTED
253bdcd8170SKalle Valo };
254bdcd8170SKalle Valo 
255bdcd8170SKalle Valo struct skb_hold_q {
256bdcd8170SKalle Valo 	struct sk_buff *skb;
257bdcd8170SKalle Valo 	bool is_amsdu;
258bdcd8170SKalle Valo 	u16 seq_no;
259bdcd8170SKalle Valo };
260bdcd8170SKalle Valo 
261bdcd8170SKalle Valo struct rxtid {
262bdcd8170SKalle Valo 	bool aggr;
263bdcd8170SKalle Valo 	bool progress;
264bdcd8170SKalle Valo 	bool timer_mon;
265bdcd8170SKalle Valo 	u16 win_sz;
266bdcd8170SKalle Valo 	u16 seq_next;
267bdcd8170SKalle Valo 	u32 hold_q_sz;
268bdcd8170SKalle Valo 	struct skb_hold_q *hold_q;
269bdcd8170SKalle Valo 	struct sk_buff_head q;
27012eb9444SKalle Valo 
27112eb9444SKalle Valo 	/*
27212eb9444SKalle Valo 	 * FIXME: No clue what this should protect. Apparently it should
27312eb9444SKalle Valo 	 * protect some of the fields above but they are also accessed
27412eb9444SKalle Valo 	 * without taking the lock.
27512eb9444SKalle Valo 	 */
276bdcd8170SKalle Valo 	spinlock_t lock;
277bdcd8170SKalle Valo };
278bdcd8170SKalle Valo 
279bdcd8170SKalle Valo struct rxtid_stats {
280bdcd8170SKalle Valo 	u32 num_into_aggr;
281bdcd8170SKalle Valo 	u32 num_dups;
282bdcd8170SKalle Valo 	u32 num_oow;
283bdcd8170SKalle Valo 	u32 num_mpdu;
284bdcd8170SKalle Valo 	u32 num_amsdu;
285bdcd8170SKalle Valo 	u32 num_delivered;
286bdcd8170SKalle Valo 	u32 num_timeouts;
287bdcd8170SKalle Valo 	u32 num_hole;
288bdcd8170SKalle Valo 	u32 num_bar;
289bdcd8170SKalle Valo };
290bdcd8170SKalle Valo 
2917baef812SVasanthakumar Thiagarajan struct aggr_info_conn {
292bdcd8170SKalle Valo 	u8 aggr_sz;
293bdcd8170SKalle Valo 	u8 timer_scheduled;
294bdcd8170SKalle Valo 	struct timer_list timer;
295bdcd8170SKalle Valo 	struct net_device *dev;
296bdcd8170SKalle Valo 	struct rxtid rx_tid[NUM_OF_TIDS];
297bdcd8170SKalle Valo 	struct rxtid_stats stat[NUM_OF_TIDS];
2987baef812SVasanthakumar Thiagarajan 	struct aggr_info *aggr_info;
2997baef812SVasanthakumar Thiagarajan };
3007baef812SVasanthakumar Thiagarajan 
3017baef812SVasanthakumar Thiagarajan struct aggr_info {
3027baef812SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn;
3037baef812SVasanthakumar Thiagarajan 	struct sk_buff_head rx_amsdu_freeq;
304bdcd8170SKalle Valo };
305bdcd8170SKalle Valo 
306bdcd8170SKalle Valo struct ath6kl_wep_key {
307bdcd8170SKalle Valo 	u8 key_index;
308bdcd8170SKalle Valo 	u8 key_len;
309bdcd8170SKalle Valo 	u8 key[64];
310bdcd8170SKalle Valo };
311bdcd8170SKalle Valo 
312bdcd8170SKalle Valo #define ATH6KL_KEY_SEQ_LEN 8
313bdcd8170SKalle Valo 
314bdcd8170SKalle Valo struct ath6kl_key {
315bdcd8170SKalle Valo 	u8 key[WLAN_MAX_KEY_LEN];
316bdcd8170SKalle Valo 	u8 key_len;
317bdcd8170SKalle Valo 	u8 seq[ATH6KL_KEY_SEQ_LEN];
318bdcd8170SKalle Valo 	u8 seq_len;
319bdcd8170SKalle Valo 	u32 cipher;
320bdcd8170SKalle Valo };
321bdcd8170SKalle Valo 
322bdcd8170SKalle Valo struct ath6kl_node_mapping {
323bdcd8170SKalle Valo 	u8 mac_addr[ETH_ALEN];
324bdcd8170SKalle Valo 	u8 ep_id;
325bdcd8170SKalle Valo 	u8 tx_pend;
326bdcd8170SKalle Valo };
327bdcd8170SKalle Valo 
328bdcd8170SKalle Valo struct ath6kl_cookie {
329bdcd8170SKalle Valo 	struct sk_buff *skb;
330bdcd8170SKalle Valo 	u32 map_no;
331bdcd8170SKalle Valo 	struct htc_packet htc_pkt;
332bdcd8170SKalle Valo 	struct ath6kl_cookie *arc_list_next;
333bdcd8170SKalle Valo };
334bdcd8170SKalle Valo 
335d0ff7383SNaveen Gangadharan struct ath6kl_mgmt_buff {
336d0ff7383SNaveen Gangadharan 	struct list_head list;
337d0ff7383SNaveen Gangadharan 	u32 freq;
338d0ff7383SNaveen Gangadharan 	u32 wait;
339d0ff7383SNaveen Gangadharan 	u32 id;
340d0ff7383SNaveen Gangadharan 	bool no_cck;
341d0ff7383SNaveen Gangadharan 	size_t len;
342d0ff7383SNaveen Gangadharan 	u8 buf[0];
343d0ff7383SNaveen Gangadharan };
344d0ff7383SNaveen Gangadharan 
345bdcd8170SKalle Valo struct ath6kl_sta {
346bdcd8170SKalle Valo 	u16 sta_flags;
347bdcd8170SKalle Valo 	u8 mac[ETH_ALEN];
348bdcd8170SKalle Valo 	u8 aid;
349bdcd8170SKalle Valo 	u8 keymgmt;
350bdcd8170SKalle Valo 	u8 ucipher;
351bdcd8170SKalle Valo 	u8 auth;
352bdcd8170SKalle Valo 	u8 wpa_ie[ATH6KL_MAX_IE];
353bdcd8170SKalle Valo 	struct sk_buff_head psq;
35412eb9444SKalle Valo 
35512eb9444SKalle Valo 	/* protects psq, mgmt_psq, apsdq, and mgmt_psq_len fields */
356bdcd8170SKalle Valo 	spinlock_t psq_lock;
35712eb9444SKalle Valo 
358d0ff7383SNaveen Gangadharan 	struct list_head mgmt_psq;
359d0ff7383SNaveen Gangadharan 	size_t mgmt_psq_len;
360c1762a3fSThirumalai Pachamuthu 	u8 apsd_info;
361c1762a3fSThirumalai Pachamuthu 	struct sk_buff_head apsdq;
3621d2a4456SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn;
363bdcd8170SKalle Valo };
364bdcd8170SKalle Valo 
365bdcd8170SKalle Valo struct ath6kl_version {
366bdcd8170SKalle Valo 	u32 target_ver;
367bdcd8170SKalle Valo 	u32 wlan_ver;
368bdcd8170SKalle Valo 	u32 abi_ver;
369bdcd8170SKalle Valo };
370bdcd8170SKalle Valo 
371bdcd8170SKalle Valo struct ath6kl_bmi {
372bdcd8170SKalle Valo 	u32 cmd_credits;
373bdcd8170SKalle Valo 	bool done_sent;
374bdcd8170SKalle Valo 	u8 *cmd_buf;
3751f4c894dSKalle Valo 	u32 max_data_size;
3761f4c894dSKalle Valo 	u32 max_cmd_size;
377bdcd8170SKalle Valo };
378bdcd8170SKalle Valo 
379bdcd8170SKalle Valo struct target_stats {
380bdcd8170SKalle Valo 	u64 tx_pkt;
381bdcd8170SKalle Valo 	u64 tx_byte;
382bdcd8170SKalle Valo 	u64 tx_ucast_pkt;
383bdcd8170SKalle Valo 	u64 tx_ucast_byte;
384bdcd8170SKalle Valo 	u64 tx_mcast_pkt;
385bdcd8170SKalle Valo 	u64 tx_mcast_byte;
386bdcd8170SKalle Valo 	u64 tx_bcast_pkt;
387bdcd8170SKalle Valo 	u64 tx_bcast_byte;
388bdcd8170SKalle Valo 	u64 tx_rts_success_cnt;
389bdcd8170SKalle Valo 	u64 tx_pkt_per_ac[4];
390bdcd8170SKalle Valo 
391bdcd8170SKalle Valo 	u64 tx_err;
392bdcd8170SKalle Valo 	u64 tx_fail_cnt;
393bdcd8170SKalle Valo 	u64 tx_retry_cnt;
394bdcd8170SKalle Valo 	u64 tx_mult_retry_cnt;
395bdcd8170SKalle Valo 	u64 tx_rts_fail_cnt;
396bdcd8170SKalle Valo 
397bdcd8170SKalle Valo 	u64 rx_pkt;
398bdcd8170SKalle Valo 	u64 rx_byte;
399bdcd8170SKalle Valo 	u64 rx_ucast_pkt;
400bdcd8170SKalle Valo 	u64 rx_ucast_byte;
401bdcd8170SKalle Valo 	u64 rx_mcast_pkt;
402bdcd8170SKalle Valo 	u64 rx_mcast_byte;
403bdcd8170SKalle Valo 	u64 rx_bcast_pkt;
404bdcd8170SKalle Valo 	u64 rx_bcast_byte;
405bdcd8170SKalle Valo 	u64 rx_frgment_pkt;
406bdcd8170SKalle Valo 
407bdcd8170SKalle Valo 	u64 rx_err;
408bdcd8170SKalle Valo 	u64 rx_crc_err;
409bdcd8170SKalle Valo 	u64 rx_key_cache_miss;
410bdcd8170SKalle Valo 	u64 rx_decrypt_err;
411bdcd8170SKalle Valo 	u64 rx_dupl_frame;
412bdcd8170SKalle Valo 
413bdcd8170SKalle Valo 	u64 tkip_local_mic_fail;
414bdcd8170SKalle Valo 	u64 tkip_cnter_measures_invoked;
415bdcd8170SKalle Valo 	u64 tkip_replays;
416bdcd8170SKalle Valo 	u64 tkip_fmt_err;
417bdcd8170SKalle Valo 	u64 ccmp_fmt_err;
418bdcd8170SKalle Valo 	u64 ccmp_replays;
419bdcd8170SKalle Valo 
420bdcd8170SKalle Valo 	u64 pwr_save_fail_cnt;
421bdcd8170SKalle Valo 
422bdcd8170SKalle Valo 	u64 cs_bmiss_cnt;
423bdcd8170SKalle Valo 	u64 cs_low_rssi_cnt;
424bdcd8170SKalle Valo 	u64 cs_connect_cnt;
425bdcd8170SKalle Valo 	u64 cs_discon_cnt;
426bdcd8170SKalle Valo 
427bdcd8170SKalle Valo 	s32 tx_ucast_rate;
428bdcd8170SKalle Valo 	s32 rx_ucast_rate;
429bdcd8170SKalle Valo 
430bdcd8170SKalle Valo 	u32 lq_val;
431bdcd8170SKalle Valo 
432bdcd8170SKalle Valo 	u32 wow_pkt_dropped;
433bdcd8170SKalle Valo 	u16 wow_evt_discarded;
434bdcd8170SKalle Valo 
435bdcd8170SKalle Valo 	s16 noise_floor_calib;
436bdcd8170SKalle Valo 	s16 cs_rssi;
437bdcd8170SKalle Valo 	s16 cs_ave_beacon_rssi;
438bdcd8170SKalle Valo 	u8 cs_ave_beacon_snr;
439bdcd8170SKalle Valo 	u8 cs_last_roam_msec;
440bdcd8170SKalle Valo 	u8 cs_snr;
441bdcd8170SKalle Valo 
442bdcd8170SKalle Valo 	u8 wow_host_pkt_wakeups;
443bdcd8170SKalle Valo 	u8 wow_host_evt_wakeups;
444bdcd8170SKalle Valo 
445bdcd8170SKalle Valo 	u32 arp_received;
446bdcd8170SKalle Valo 	u32 arp_matched;
447bdcd8170SKalle Valo 	u32 arp_replied;
448bdcd8170SKalle Valo };
449bdcd8170SKalle Valo 
450bdcd8170SKalle Valo struct ath6kl_mbox_info {
451bdcd8170SKalle Valo 	u32 htc_addr;
452bdcd8170SKalle Valo 	u32 htc_ext_addr;
453bdcd8170SKalle Valo 	u32 htc_ext_sz;
454bdcd8170SKalle Valo 
455bdcd8170SKalle Valo 	u32 block_size;
456bdcd8170SKalle Valo 
457bdcd8170SKalle Valo 	u32 gmbox_addr;
458bdcd8170SKalle Valo 
459bdcd8170SKalle Valo 	u32 gmbox_sz;
460bdcd8170SKalle Valo };
461bdcd8170SKalle Valo 
462bdcd8170SKalle Valo /*
463bdcd8170SKalle Valo  * 802.11i defines an extended IV for use with non-WEP ciphers.
464bdcd8170SKalle Valo  * When the EXTIV bit is set in the key id byte an additional
465bdcd8170SKalle Valo  * 4 bytes immediately follow the IV for TKIP.  For CCMP the
466bdcd8170SKalle Valo  * EXTIV bit is likewise set but the 8 bytes represent the
467bdcd8170SKalle Valo  * CCMP header rather than IV+extended-IV.
468bdcd8170SKalle Valo  */
469bdcd8170SKalle Valo 
470bdcd8170SKalle Valo #define ATH6KL_KEYBUF_SIZE 16
471bdcd8170SKalle Valo #define ATH6KL_MICBUF_SIZE (8+8)	/* space for both tx and rx */
472bdcd8170SKalle Valo 
473bdcd8170SKalle Valo #define ATH6KL_KEY_XMIT  0x01
474bdcd8170SKalle Valo #define ATH6KL_KEY_RECV  0x02
475bdcd8170SKalle Valo #define ATH6KL_KEY_DEFAULT   0x80	/* default xmit key */
476bdcd8170SKalle Valo 
4779a5b1318SJouni Malinen /* Initial group key for AP mode */
478bdcd8170SKalle Valo struct ath6kl_req_key {
4799a5b1318SJouni Malinen 	bool valid;
4809a5b1318SJouni Malinen 	u8 key_index;
4819a5b1318SJouni Malinen 	int key_type;
4829a5b1318SJouni Malinen 	u8 key[WLAN_MAX_KEY_LEN];
4839a5b1318SJouni Malinen 	u8 key_len;
484bdcd8170SKalle Valo };
485bdcd8170SKalle Valo 
48677eab1e9SKalle Valo enum ath6kl_hif_type {
48777eab1e9SKalle Valo 	ATH6KL_HIF_TYPE_SDIO,
48877eab1e9SKalle Valo 	ATH6KL_HIF_TYPE_USB,
48977eab1e9SKalle Valo };
49077eab1e9SKalle Valo 
491e76ac2bfSKalle Valo enum ath6kl_htc_type {
492e76ac2bfSKalle Valo 	ATH6KL_HTC_TYPE_MBOX,
493636f8288SKalle Valo 	ATH6KL_HTC_TYPE_PIPE,
494e76ac2bfSKalle Valo };
495e76ac2bfSKalle Valo 
49680abaf9bSVasanthakumar Thiagarajan /* Max number of filters that hw supports */
49780abaf9bSVasanthakumar Thiagarajan #define ATH6K_MAX_MC_FILTERS_PER_LIST 7
49880abaf9bSVasanthakumar Thiagarajan struct ath6kl_mc_filter {
49980abaf9bSVasanthakumar Thiagarajan 	struct list_head list;
50080abaf9bSVasanthakumar Thiagarajan 	char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE];
50180abaf9bSVasanthakumar Thiagarajan };
50280abaf9bSVasanthakumar Thiagarajan 
503df90b369SVasanthakumar Thiagarajan struct ath6kl_htcap {
504df90b369SVasanthakumar Thiagarajan 	bool ht_enable;
505df90b369SVasanthakumar Thiagarajan 	u8 ampdu_factor;
506df90b369SVasanthakumar Thiagarajan 	unsigned short cap_info;
507df90b369SVasanthakumar Thiagarajan };
508df90b369SVasanthakumar Thiagarajan 
50971f96ee6SKalle Valo /*
51071f96ee6SKalle Valo  * Driver's maximum limit, note that some firmwares support only one vif
51171f96ee6SKalle Valo  * and the runtime (current) limit must be checked from ar->vif_max.
51271f96ee6SKalle Valo  */
513b64de356SVasanthakumar Thiagarajan #define ATH6KL_VIF_MAX	3
514334234b5SVasanthakumar Thiagarajan 
51559c98449SVasanthakumar Thiagarajan /* vif flags info */
51659c98449SVasanthakumar Thiagarajan enum ath6kl_vif_state {
51759c98449SVasanthakumar Thiagarajan 	CONNECTED,
51859c98449SVasanthakumar Thiagarajan 	CONNECT_PEND,
51959c98449SVasanthakumar Thiagarajan 	WMM_ENABLED,
52059c98449SVasanthakumar Thiagarajan 	NETQ_STOPPED,
52159c98449SVasanthakumar Thiagarajan 	DTIM_EXPIRED,
52259c98449SVasanthakumar Thiagarajan 	NETDEV_REGISTERED,
52359c98449SVasanthakumar Thiagarajan 	CLEAR_BSSFILTER_ON_BEACON,
52459c98449SVasanthakumar Thiagarajan 	DTIM_PERIOD_AVAIL,
52559c98449SVasanthakumar Thiagarajan 	WLAN_ENABLED,
526b95907a7SVasanthakumar Thiagarajan 	STATS_UPDATE_PEND,
527081c7a84SRaja Mani 	HOST_SLEEP_MODE_CMD_PROCESSED,
5286251d801SNaveen Gangadharan 	NETDEV_MCAST_ALL_ON,
5296251d801SNaveen Gangadharan 	NETDEV_MCAST_ALL_OFF,
53059c98449SVasanthakumar Thiagarajan };
53159c98449SVasanthakumar Thiagarajan 
532108438bcSVasanthakumar Thiagarajan struct ath6kl_vif {
533990bd915SVasanthakumar Thiagarajan 	struct list_head list;
534108438bcSVasanthakumar Thiagarajan 	struct wireless_dev wdev;
535108438bcSVasanthakumar Thiagarajan 	struct net_device *ndev;
536108438bcSVasanthakumar Thiagarajan 	struct ath6kl *ar;
537478ac027SVasanthakumar Thiagarajan 	/* Lock to protect vif specific net_stats and flags */
538478ac027SVasanthakumar Thiagarajan 	spinlock_t if_lock;
539334234b5SVasanthakumar Thiagarajan 	u8 fw_vif_idx;
54059c98449SVasanthakumar Thiagarajan 	unsigned long flags;
5413450334fSVasanthakumar Thiagarajan 	int ssid_len;
5423450334fSVasanthakumar Thiagarajan 	u8 ssid[IEEE80211_MAX_SSID_LEN];
5433450334fSVasanthakumar Thiagarajan 	u8 dot11_auth_mode;
5443450334fSVasanthakumar Thiagarajan 	u8 auth_mode;
5453450334fSVasanthakumar Thiagarajan 	u8 prwise_crypto;
5463450334fSVasanthakumar Thiagarajan 	u8 prwise_crypto_len;
5473450334fSVasanthakumar Thiagarajan 	u8 grp_crypto;
5483450334fSVasanthakumar Thiagarajan 	u8 grp_crypto_len;
5493450334fSVasanthakumar Thiagarajan 	u8 def_txkey_index;
550f5938f24SVasanthakumar Thiagarajan 	u8 next_mode;
551f5938f24SVasanthakumar Thiagarajan 	u8 nw_type;
5528c8b65e3SVasanthakumar Thiagarajan 	u8 bssid[ETH_ALEN];
5538c8b65e3SVasanthakumar Thiagarajan 	u8 req_bssid[ETH_ALEN];
554f74bac54SVasanthakumar Thiagarajan 	u16 ch_hint;
555f74bac54SVasanthakumar Thiagarajan 	u16 bss_ch;
5566f2a73f9SVasanthakumar Thiagarajan 	struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1];
5576f2a73f9SVasanthakumar Thiagarajan 	struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1];
5582132c69cSVasanthakumar Thiagarajan 	struct aggr_info *aggr_cntxt;
559df90b369SVasanthakumar Thiagarajan 	struct ath6kl_htcap htcap;
56010509f90SKalle Valo 
561de3ad713SVasanthakumar Thiagarajan 	struct timer_list disconnect_timer;
56210509f90SKalle Valo 	struct timer_list sched_scan_timer;
56310509f90SKalle Valo 
56414ee6f6bSVasanthakumar Thiagarajan 	struct cfg80211_scan_request *scan_req;
56514ee6f6bSVasanthakumar Thiagarajan 	enum sme_state sme_state;
566cf5333d7SVasanthakumar Thiagarajan 	int reconnect_flag;
5671052261eSJouni Malinen 	u32 last_roc_id;
5681052261eSJouni Malinen 	u32 last_cancel_roc_id;
569cf5333d7SVasanthakumar Thiagarajan 	u32 send_action_id;
570cf5333d7SVasanthakumar Thiagarajan 	bool probe_req_report;
571cf5333d7SVasanthakumar Thiagarajan 	u16 next_chan;
572df90b369SVasanthakumar Thiagarajan 	enum nl80211_channel_type next_ch_type;
573df90b369SVasanthakumar Thiagarajan 	enum ieee80211_band next_ch_band;
574cf5333d7SVasanthakumar Thiagarajan 	u16 assoc_bss_beacon_int;
5758f46fccdSRaja Mani 	u16 listen_intvl_t;
576ce0dc0cfSRaja Mani 	u16 bmiss_time_t;
577eb38987eSRaja Mani 	u16 bg_scan_period;
578cf5333d7SVasanthakumar Thiagarajan 	u8 assoc_bss_dtim_period;
579b95907a7SVasanthakumar Thiagarajan 	struct net_device_stats net_stats;
580b95907a7SVasanthakumar Thiagarajan 	struct target_stats target_stats;
581c4f7863eSThomas Pedersen 	struct wmi_connect_cmd profile;
58280abaf9bSVasanthakumar Thiagarajan 
58380abaf9bSVasanthakumar Thiagarajan 	struct list_head mc_filter;
584108438bcSVasanthakumar Thiagarajan };
585108438bcSVasanthakumar Thiagarajan 
5866cb3c714SRaja Mani #define WOW_LIST_ID		0
5876cb3c714SRaja Mani #define WOW_HOST_REQ_DELAY	500 /* ms */
5886cb3c714SRaja Mani 
58910509f90SKalle Valo #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */
59010509f90SKalle Valo 
591bdcd8170SKalle Valo /* Flag info */
59259c98449SVasanthakumar Thiagarajan enum ath6kl_dev_state {
59359c98449SVasanthakumar Thiagarajan 	WMI_ENABLED,
59459c98449SVasanthakumar Thiagarajan 	WMI_READY,
59559c98449SVasanthakumar Thiagarajan 	WMI_CTRL_EP_FULL,
59659c98449SVasanthakumar Thiagarajan 	TESTMODE,
59759c98449SVasanthakumar Thiagarajan 	DESTROY_IN_PROGRESS,
59859c98449SVasanthakumar Thiagarajan 	SKIP_SCAN,
59959c98449SVasanthakumar Thiagarajan 	ROAM_TBL_PEND,
6005fe4dffbSKalle Valo 	FIRST_BOOT,
60159c98449SVasanthakumar Thiagarajan };
602bdcd8170SKalle Valo 
60376a9fbe2SKalle Valo enum ath6kl_state {
60476a9fbe2SKalle Valo 	ATH6KL_STATE_OFF,
60576a9fbe2SKalle Valo 	ATH6KL_STATE_ON,
606390a8c8fSRaja Mani 	ATH6KL_STATE_SUSPENDING,
607390a8c8fSRaja Mani 	ATH6KL_STATE_RESUMING,
60876a9fbe2SKalle Valo 	ATH6KL_STATE_DEEPSLEEP,
609b4b2a0b1SKalle Valo 	ATH6KL_STATE_CUTPOWER,
610dd6c0c63SRaja Mani 	ATH6KL_STATE_WOW,
61110509f90SKalle Valo 	ATH6KL_STATE_SCHED_SCAN,
61276a9fbe2SKalle Valo };
61376a9fbe2SKalle Valo 
614bdcd8170SKalle Valo struct ath6kl {
615bdcd8170SKalle Valo 	struct device *dev;
616be98e3a4SVasanthakumar Thiagarajan 	struct wiphy *wiphy;
61776a9fbe2SKalle Valo 
61876a9fbe2SKalle Valo 	enum ath6kl_state state;
6195f1127ffSKalle Valo 	unsigned int testmode;
62076a9fbe2SKalle Valo 
621bdcd8170SKalle Valo 	struct ath6kl_bmi bmi;
622bdcd8170SKalle Valo 	const struct ath6kl_hif_ops *hif_ops;
623e76ac2bfSKalle Valo 	const struct ath6kl_htc_ops *htc_ops;
624bdcd8170SKalle Valo 	struct wmi *wmi;
625bdcd8170SKalle Valo 	int tx_pending[ENDPOINT_MAX];
626bdcd8170SKalle Valo 	int total_tx_data_pend;
627bdcd8170SKalle Valo 	struct htc_target *htc_target;
62877eab1e9SKalle Valo 	enum ath6kl_hif_type hif_type;
629bdcd8170SKalle Valo 	void *hif_priv;
630990bd915SVasanthakumar Thiagarajan 	struct list_head vif_list;
631990bd915SVasanthakumar Thiagarajan 	/* Lock to avoid race in vif_list entries among add/del/traverse */
632990bd915SVasanthakumar Thiagarajan 	spinlock_t list_lock;
63355055976SVasanthakumar Thiagarajan 	u8 num_vif;
634368b1b0fSKalle Valo 	unsigned int vif_max;
6353226f68aSVasanthakumar Thiagarajan 	u8 max_norm_iface;
63655055976SVasanthakumar Thiagarajan 	u8 avail_idx_map;
63712eb9444SKalle Valo 
63812eb9444SKalle Valo 	/*
63912eb9444SKalle Valo 	 * Protects at least amsdu_rx_buffer_queue, ath6kl_alloc_cookie()
64012eb9444SKalle Valo 	 * calls, tx_pending and total_tx_data_pend.
64112eb9444SKalle Valo 	 */
642bdcd8170SKalle Valo 	spinlock_t lock;
64312eb9444SKalle Valo 
644bdcd8170SKalle Valo 	struct semaphore sem;
645e5090444SVivek Natarajan 	u8 lrssi_roam_threshold;
646bdcd8170SKalle Valo 	struct ath6kl_version version;
647bdcd8170SKalle Valo 	u32 target_type;
648bdcd8170SKalle Valo 	u8 tx_pwr;
649bdcd8170SKalle Valo 	struct ath6kl_node_mapping node_map[MAX_NODE_NUM];
650bdcd8170SKalle Valo 	u8 ibss_ps_enable;
65155055976SVasanthakumar Thiagarajan 	bool ibss_if_active;
652bdcd8170SKalle Valo 	u8 node_num;
653bdcd8170SKalle Valo 	u8 next_ep_id;
654bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie_list;
655bdcd8170SKalle Valo 	u32 cookie_count;
656bdcd8170SKalle Valo 	enum htc_endpoint_id ac2ep_map[WMM_NUM_AC];
657bdcd8170SKalle Valo 	bool ac_stream_active[WMM_NUM_AC];
658bdcd8170SKalle Valo 	u8 ac_stream_pri_map[WMM_NUM_AC];
659bdcd8170SKalle Valo 	u8 hiac_stream_active_pri;
660bdcd8170SKalle Valo 	u8 ep2ac_map[ENDPOINT_MAX];
661bdcd8170SKalle Valo 	enum htc_endpoint_id ctrl_ep;
6623c370398SKalle Valo 	struct ath6kl_htc_credit_info credit_state_info;
663bdcd8170SKalle Valo 	u32 connect_ctrl_flags;
664bdcd8170SKalle Valo 	u32 user_key_ctrl;
665bdcd8170SKalle Valo 	u8 usr_bss_filter;
666bdcd8170SKalle Valo 	struct ath6kl_sta sta_list[AP_MAX_NUM_STA];
667bdcd8170SKalle Valo 	u8 sta_list_index;
668bdcd8170SKalle Valo 	struct ath6kl_req_key ap_mode_bkey;
669bdcd8170SKalle Valo 	struct sk_buff_head mcastpsq;
670c4f7863eSThomas Pedersen 	u32 want_ch_switch;
67112eb9444SKalle Valo 
67212eb9444SKalle Valo 	/*
67312eb9444SKalle Valo 	 * FIXME: protects access to mcastpsq but is actually useless as
67412eb9444SKalle Valo 	 * all skbe_queue_*() functions provide serialisation themselves
67512eb9444SKalle Valo 	 */
676bdcd8170SKalle Valo 	spinlock_t mcastpsq_lock;
67712eb9444SKalle Valo 
678bdcd8170SKalle Valo 	u8 intra_bss;
679bdcd8170SKalle Valo 	struct wmi_ap_mode_stat ap_stats;
680bdcd8170SKalle Valo 	u8 ap_country_code[3];
681bdcd8170SKalle Valo 	struct list_head amsdu_rx_buffer_queue;
682bdcd8170SKalle Valo 	u8 rx_meta_ver;
683bdcd8170SKalle Valo 	enum wlan_low_pwr_state wlan_pwr_state;
684d66ea4f9SVasanthakumar Thiagarajan 	u8 mac_addr[ETH_ALEN];
685bdcd8170SKalle Valo #define AR_MCAST_FILTER_MAC_ADDR_SIZE  4
686003353b0SKalle Valo 	struct {
687003353b0SKalle Valo 		void *rx_report;
688003353b0SKalle Valo 		size_t rx_report_len;
689003353b0SKalle Valo 	} tm;
690003353b0SKalle Valo 
691856f4b31SKalle Valo 	struct ath6kl_hw {
692856f4b31SKalle Valo 		u32 id;
693293badf4SKalle Valo 		const char *name;
694a01ac414SKalle Valo 		u32 dataset_patch_addr;
695a01ac414SKalle Valo 		u32 app_load_addr;
696a01ac414SKalle Valo 		u32 app_start_override_addr;
697991b27eaSKalle Valo 		u32 board_ext_data_addr;
698991b27eaSKalle Valo 		u32 reserved_ram_size;
6990d4d72bfSKalle Valo 		u32 board_addr;
70039586bf2SRyan Hsu 		u32 refclk_hz;
70139586bf2SRyan Hsu 		u32 uarttx_pin;
702cd23c1c9SAlex Yang 		u32 testscript_addr;
703d92917e4SThomas Pedersen 		enum wmi_phy_cap cap;
704d1a9421dSKalle Valo 
705c0038972SKalle Valo 		struct ath6kl_hw_fw {
706c0038972SKalle Valo 			const char *dir;
707c0038972SKalle Valo 			const char *otp;
708d1a9421dSKalle Valo 			const char *fw;
709c0038972SKalle Valo 			const char *tcmd;
710c0038972SKalle Valo 			const char *patch;
711cd23c1c9SAlex Yang 			const char *utf;
712cd23c1c9SAlex Yang 			const char *testscript;
713c0038972SKalle Valo 		} fw;
714c0038972SKalle Valo 
715d1a9421dSKalle Valo 		const char *fw_board;
716d1a9421dSKalle Valo 		const char *fw_default_board;
717a01ac414SKalle Valo 	} hw;
718a01ac414SKalle Valo 
719bdcd8170SKalle Valo 	u16 conf_flags;
720e390af77SRaja Mani 	u16 suspend_mode;
7211e9a905dSRaja Mani 	u16 wow_suspend_mode;
722bdcd8170SKalle Valo 	wait_queue_head_t event_wq;
723bdcd8170SKalle Valo 	struct ath6kl_mbox_info mbox_info;
724bdcd8170SKalle Valo 
725bdcd8170SKalle Valo 	struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM];
726bdcd8170SKalle Valo 	unsigned long flag;
727bdcd8170SKalle Valo 
728bdcd8170SKalle Valo 	u8 *fw_board;
729bdcd8170SKalle Valo 	size_t fw_board_len;
730bdcd8170SKalle Valo 
731bdcd8170SKalle Valo 	u8 *fw_otp;
732bdcd8170SKalle Valo 	size_t fw_otp_len;
733bdcd8170SKalle Valo 
734bdcd8170SKalle Valo 	u8 *fw;
735bdcd8170SKalle Valo 	size_t fw_len;
736bdcd8170SKalle Valo 
737bdcd8170SKalle Valo 	u8 *fw_patch;
738bdcd8170SKalle Valo 	size_t fw_patch_len;
739bdcd8170SKalle Valo 
740cd23c1c9SAlex Yang 	u8 *fw_testscript;
741cd23c1c9SAlex Yang 	size_t fw_testscript_len;
742cd23c1c9SAlex Yang 
74365a8b4ccSKalle Valo 	unsigned int fw_api;
74497e0496dSKalle Valo 	unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN];
74597e0496dSKalle Valo 
746bdcd8170SKalle Valo 	struct workqueue_struct *ath6kl_wq;
7477c3075e9SVasanthakumar Thiagarajan 
748d999ba3eSVasanthakumar Thiagarajan 	struct dentry *debugfs_phy;
7496a7c9badSJouni Malinen 
7506bbc7c35SJouni Malinen 	bool p2p;
7516bbc7c35SJouni Malinen 
752e5348a1eSVasanthakumar Thiagarajan 	bool wiphy_registered;
753e5348a1eSVasanthakumar Thiagarajan 
754bdf5396bSKalle Valo #ifdef CONFIG_ATH6KL_DEBUG
755bdf5396bSKalle Valo 	struct {
7569b9a4f2aSKalle Valo 		struct sk_buff_head fwlog_queue;
757c807b30dSKalle Valo 		struct completion fwlog_completion;
758c807b30dSKalle Valo 		bool fwlog_open;
759c807b30dSKalle Valo 
760939f1cceSKalle Valo 		u32 fwlog_mask;
7619b9a4f2aSKalle Valo 
76291d57de5SVasanthakumar Thiagarajan 		unsigned int dbgfs_diag_reg;
763252c068bSVasanthakumar Thiagarajan 		u32 diag_reg_addr_wr;
764252c068bSVasanthakumar Thiagarajan 		u32 diag_reg_val_wr;
7659a730834SKalle Valo 
7669a730834SKalle Valo 		struct {
7679a730834SKalle Valo 			unsigned int invalid_rate;
7689a730834SKalle Valo 		} war_stats;
7694b28a80dSJouni Malinen 
7704b28a80dSJouni Malinen 		u8 *roam_tbl;
7714b28a80dSJouni Malinen 		unsigned int roam_tbl_len;
772ff0b0075SJouni Malinen 
773ff0b0075SJouni Malinen 		u8 keepalive;
774ff0b0075SJouni Malinen 		u8 disc_timeout;
775bdf5396bSKalle Valo 	} debug;
776bdf5396bSKalle Valo #endif /* CONFIG_ATH6KL_DEBUG */
777bdcd8170SKalle Valo };
778bdcd8170SKalle Valo 
779d6d5c06cSKalle Valo static inline struct ath6kl *ath6kl_priv(struct net_device *dev)
780bdcd8170SKalle Valo {
781108438bcSVasanthakumar Thiagarajan 	return ((struct ath6kl_vif *) netdev_priv(dev))->ar;
782bdcd8170SKalle Valo }
783bdcd8170SKalle Valo 
784bc07ddb2SKalle Valo static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
785bc07ddb2SKalle Valo 					  u32 item_offset)
786bc07ddb2SKalle Valo {
787bc07ddb2SKalle Valo 	u32 addr = 0;
788bc07ddb2SKalle Valo 
789bc07ddb2SKalle Valo 	if (ar->target_type == TARGET_TYPE_AR6003)
790bc07ddb2SKalle Valo 		addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
791bc07ddb2SKalle Valo 	else if (ar->target_type == TARGET_TYPE_AR6004)
792bc07ddb2SKalle Valo 		addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
793bc07ddb2SKalle Valo 
794bc07ddb2SKalle Valo 	return addr;
795bc07ddb2SKalle Valo }
796bc07ddb2SKalle Valo 
797bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar);
798bdcd8170SKalle Valo void ath6kl_detect_error(unsigned long ptr);
799bdcd8170SKalle Valo void disconnect_timer_handler(unsigned long ptr);
800bdcd8170SKalle Valo void init_netdev(struct net_device *dev);
801bdcd8170SKalle Valo void ath6kl_cookie_init(struct ath6kl *ar);
802bdcd8170SKalle Valo void ath6kl_cookie_cleanup(struct ath6kl *ar);
803bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet);
80463de1112SKalle Valo void ath6kl_tx_complete(struct htc_target *context,
80563de1112SKalle Valo 			struct list_head *packet_queue);
806bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
807bdcd8170SKalle Valo 					       struct htc_packet *packet);
808bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar);
809bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar);
810f9ea0753SVasanthakumar Thiagarajan int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value);
811addb44beSKalle Valo int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length);
812addb44beSKalle Valo int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value);
813addb44beSKalle Valo int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length);
814bc07ddb2SKalle Valo int ath6kl_read_fwlogs(struct ath6kl *ar);
815e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif);
816bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar);
817bdcd8170SKalle Valo 
818bdcd8170SKalle Valo struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar);
819bdcd8170SKalle Valo void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie);
820bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev);
821bdcd8170SKalle Valo 
8227baef812SVasanthakumar Thiagarajan struct aggr_info *aggr_init(struct ath6kl_vif *vif);
823c8651541SVasanthakumar Thiagarajan void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info,
824c8651541SVasanthakumar Thiagarajan 		    struct aggr_info_conn *aggr_conn);
825bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target,
826bdcd8170SKalle Valo 		      enum htc_endpoint_id endpoint);
827bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count);
828bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
829bdcd8170SKalle Valo 					    enum htc_endpoint_id endpoint,
830bdcd8170SKalle Valo 					    int len);
831bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info);
8321d2a4456SVasanthakumar Thiagarajan void aggr_reset_state(struct aggr_info_conn *aggr_conn);
833bdcd8170SKalle Valo 
8346765d0aaSVasanthakumar Thiagarajan struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 *node_addr);
835bdcd8170SKalle Valo struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid);
836bdcd8170SKalle Valo 
837d92917e4SThomas Pedersen void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver,
838d92917e4SThomas Pedersen 			enum wmi_phy_cap cap);
839bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb,
840bdcd8170SKalle Valo 		      enum htc_endpoint_id eid);
841240d2799SVasanthakumar Thiagarajan void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel,
842bdcd8170SKalle Valo 			  u8 *bssid, u16 listen_int,
843bdcd8170SKalle Valo 			  u16 beacon_int, enum network_type net_type,
844bdcd8170SKalle Valo 			  u8 beacon_ie_len, u8 assoc_req_len,
845bdcd8170SKalle Valo 			  u8 assoc_resp_len, u8 *assoc_info);
846240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel);
847240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr,
848572e27c0SJouni Malinen 				u8 keymgmt, u8 ucipher, u8 auth,
849c1762a3fSThirumalai Pachamuthu 				u8 assoc_req_len, u8 *assoc_info, u8 apsd_info);
850240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason,
851bdcd8170SKalle Valo 			     u8 *bssid, u8 assoc_resp_len,
852bdcd8170SKalle Valo 			     u8 *assoc_info, u16 prot_reason_status);
853240d2799SVasanthakumar Thiagarajan void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast);
854bdcd8170SKalle Valo void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr);
855240d2799SVasanthakumar Thiagarajan void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status);
856240d2799SVasanthakumar Thiagarajan void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len);
857bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active);
858bdcd8170SKalle Valo enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac);
859bdcd8170SKalle Valo 
860240d2799SVasanthakumar Thiagarajan void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid);
861bdcd8170SKalle Valo 
862240d2799SVasanthakumar Thiagarajan void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif);
863240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect(struct ath6kl_vif *vif);
864240d2799SVasanthakumar Thiagarajan void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid);
865240d2799SVasanthakumar Thiagarajan void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no,
866bdcd8170SKalle Valo 			     u8 win_sz);
867bdcd8170SKalle Valo void ath6kl_wakeup_event(void *dev);
868bdcd8170SKalle Valo 
8696db8fa53SVasanthakumar Thiagarajan void ath6kl_reset_device(struct ath6kl *ar, u32 target_type,
8706db8fa53SVasanthakumar Thiagarajan 			 bool wait_fot_compltn, bool cold_reset);
871e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif);
872990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar);
87355055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready);
8745fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar);
8755fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar);
87645eaa78fSKalle Valo int ath6kl_init_fetch_firmwares(struct ath6kl *ar);
87745eaa78fSKalle Valo int ath6kl_init_hw_params(struct ath6kl *ar);
87845eaa78fSKalle Valo 
879a918fb3cSRaja Mani void ath6kl_check_wow_status(struct ath6kl *ar);
8805fe4dffbSKalle Valo 
881636f8288SKalle Valo void ath6kl_core_tx_complete(struct ath6kl *ar, struct sk_buff *skb);
882636f8288SKalle Valo void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe);
883636f8288SKalle Valo 
88445eaa78fSKalle Valo struct ath6kl *ath6kl_core_create(struct device *dev);
885e76ac2bfSKalle Valo int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type);
88645eaa78fSKalle Valo void ath6kl_core_cleanup(struct ath6kl *ar);
88745eaa78fSKalle Valo void ath6kl_core_destroy(struct ath6kl *ar);
88845eaa78fSKalle Valo 
889bdcd8170SKalle Valo #endif /* CORE_H */
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