1bdcd8170SKalle Valo /* 2bdcd8170SKalle Valo * Copyright (c) 2010-2011 Atheros Communications Inc. 31b2df407SVasanthakumar Thiagarajan * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. 4bdcd8170SKalle Valo * 5bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 6bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 7bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 8bdcd8170SKalle Valo * 9bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16bdcd8170SKalle Valo */ 17bdcd8170SKalle Valo 18bdcd8170SKalle Valo #ifndef CORE_H 19bdcd8170SKalle Valo #define CORE_H 20bdcd8170SKalle Valo 21bdcd8170SKalle Valo #include <linux/etherdevice.h> 22bdcd8170SKalle Valo #include <linux/rtnetlink.h> 23bdcd8170SKalle Valo #include <linux/firmware.h> 24bdcd8170SKalle Valo #include <linux/sched.h> 25bdf5396bSKalle Valo #include <linux/circ_buf.h> 26bdcd8170SKalle Valo #include <net/cfg80211.h> 27bdcd8170SKalle Valo #include "htc.h" 28bdcd8170SKalle Valo #include "wmi.h" 29bdcd8170SKalle Valo #include "bmi.h" 30bc07ddb2SKalle Valo #include "target.h" 31bdcd8170SKalle Valo 32bdcd8170SKalle Valo #define MAX_ATH6KL 1 33bdcd8170SKalle Valo #define ATH6KL_MAX_RX_BUFFERS 16 34bdcd8170SKalle Valo #define ATH6KL_BUFFER_SIZE 1664 35bdcd8170SKalle Valo #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4 36bdcd8170SKalle Valo #define ATH6KL_AMSDU_REFILL_THRESHOLD 3 37bdcd8170SKalle Valo #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128) 38bdcd8170SKalle Valo #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508 39bdcd8170SKalle Valo #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46 40bdcd8170SKalle Valo 41bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_INIT 0 42bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_RUN 1 43bdcd8170SKalle Valo 44bdcd8170SKalle Valo #define ATH6KL_TX_TIMEOUT 10 45bdcd8170SKalle Valo #define ATH6KL_MAX_ENDPOINTS 4 46bdcd8170SKalle Valo #define MAX_NODE_NUM 15 47bdcd8170SKalle Valo 48c1762a3fSThirumalai Pachamuthu #define ATH6KL_APSD_ALL_FRAME 0xFFFF 49c1762a3fSThirumalai Pachamuthu #define ATH6KL_APSD_NUM_OF_AC 0x4 50c1762a3fSThirumalai Pachamuthu #define ATH6KL_APSD_FRAME_MASK 0xF 51c1762a3fSThirumalai Pachamuthu 521df94a85SVasanthakumar Thiagarajan /* Extra bytes for htc header alignment */ 531df94a85SVasanthakumar Thiagarajan #define ATH6KL_HTC_ALIGN_BYTES 3 541df94a85SVasanthakumar Thiagarajan 55bdcd8170SKalle Valo /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */ 56bdcd8170SKalle Valo #define MAX_DEF_COOKIE_NUM 180 57bdcd8170SKalle Valo #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */ 58bdcd8170SKalle Valo #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM) 59bdcd8170SKalle Valo 60bdcd8170SKalle Valo #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC) 61bdcd8170SKalle Valo 62bdcd8170SKalle Valo #define DISCON_TIMER_INTVAL 10000 /* in msec */ 63bdcd8170SKalle Valo 6413423c31SVasanthakumar Thiagarajan /* Channel dwell time in fg scan */ 6513423c31SVasanthakumar Thiagarajan #define ATH6KL_FG_SCAN_INTERVAL 50 /* in ms */ 6613423c31SVasanthakumar Thiagarajan 6750d41234SKalle Valo /* includes also the null byte */ 6850d41234SKalle Valo #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL" 6950d41234SKalle Valo 7050d41234SKalle Valo enum ath6kl_fw_ie_type { 7150d41234SKalle Valo ATH6KL_FW_IE_FW_VERSION = 0, 7250d41234SKalle Valo ATH6KL_FW_IE_TIMESTAMP = 1, 7350d41234SKalle Valo ATH6KL_FW_IE_OTP_IMAGE = 2, 7450d41234SKalle Valo ATH6KL_FW_IE_FW_IMAGE = 3, 7550d41234SKalle Valo ATH6KL_FW_IE_PATCH_IMAGE = 4, 768a137480SKalle Valo ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5, 7797e0496dSKalle Valo ATH6KL_FW_IE_CAPABILITIES = 6, 781b4304daSKalle Valo ATH6KL_FW_IE_PATCH_ADDR = 7, 7903ef0250SKalle Valo ATH6KL_FW_IE_BOARD_ADDR = 8, 80368b1b0fSKalle Valo ATH6KL_FW_IE_VIF_MAX = 9, 8150d41234SKalle Valo }; 8250d41234SKalle Valo 8397e0496dSKalle Valo enum ath6kl_fw_capability { 8497e0496dSKalle Valo ATH6KL_FW_CAPABILITY_HOST_P2P = 0, 8510509f90SKalle Valo ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1, 8697e0496dSKalle Valo 873ca9d1fcSAarthi Thiruvengadam /* 883ca9d1fcSAarthi Thiruvengadam * Firmware is capable of supporting P2P mgmt operations on a 893ca9d1fcSAarthi Thiruvengadam * station interface. After group formation, the station 903ca9d1fcSAarthi Thiruvengadam * interface will become a P2P client/GO interface as the case may be 913ca9d1fcSAarthi Thiruvengadam */ 923ca9d1fcSAarthi Thiruvengadam ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, 933ca9d1fcSAarthi Thiruvengadam 9403bdeb0dSVasanthakumar Thiagarajan /* 9503bdeb0dSVasanthakumar Thiagarajan * Firmware has support to cleanup inactive stations 9603bdeb0dSVasanthakumar Thiagarajan * in AP mode. 9703bdeb0dSVasanthakumar Thiagarajan */ 9803bdeb0dSVasanthakumar Thiagarajan ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, 9903bdeb0dSVasanthakumar Thiagarajan 100d97c121bSVasanthakumar Thiagarajan /* Firmware has support to override rsn cap of rsn ie */ 101d97c121bSVasanthakumar Thiagarajan ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, 102d97c121bSVasanthakumar Thiagarajan 10397e0496dSKalle Valo /* this needs to be last */ 10497e0496dSKalle Valo ATH6KL_FW_CAPABILITY_MAX, 10597e0496dSKalle Valo }; 10697e0496dSKalle Valo 10797e0496dSKalle Valo #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32) 10897e0496dSKalle Valo 10950d41234SKalle Valo struct ath6kl_fw_ie { 11050d41234SKalle Valo __le32 id; 11150d41234SKalle Valo __le32 len; 11250d41234SKalle Valo u8 data[0]; 11350d41234SKalle Valo }; 11450d41234SKalle Valo 115c0038972SKalle Valo #define ATH6KL_FW_API2_FILE "fw-2.bin" 11665a8b4ccSKalle Valo #define ATH6KL_FW_API3_FILE "fw-3.bin" 117c0038972SKalle Valo 118bdcd8170SKalle Valo /* AR6003 1.0 definitions */ 1190d0192baSKalle Valo #define AR6003_HW_1_0_VERSION 0x300002ba 120bdcd8170SKalle Valo 121bdcd8170SKalle Valo /* AR6003 2.0 definitions */ 1220d0192baSKalle Valo #define AR6003_HW_2_0_VERSION 0x30000384 1230d0192baSKalle Valo #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910 124c0038972SKalle Valo #define AR6003_HW_2_0_FW_DIR "ath6k/AR6003/hw2.0" 125c0038972SKalle Valo #define AR6003_HW_2_0_OTP_FILE "otp.bin.z77" 126c0038972SKalle Valo #define AR6003_HW_2_0_FIRMWARE_FILE "athwlan.bin.z77" 127c0038972SKalle Valo #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "athtcmd_ram.bin" 128c0038972SKalle Valo #define AR6003_HW_2_0_PATCH_FILE "data.patch.bin" 1290d0192baSKalle Valo #define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin" 1300d0192baSKalle Valo #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \ 1310d0192baSKalle Valo "ath6k/AR6003/hw2.0/bdata.SD31.bin" 132bdcd8170SKalle Valo 133bdcd8170SKalle Valo /* AR6003 3.0 definitions */ 1340d0192baSKalle Valo #define AR6003_HW_2_1_1_VERSION 0x30000582 135c0038972SKalle Valo #define AR6003_HW_2_1_1_FW_DIR "ath6k/AR6003/hw2.1.1" 136c0038972SKalle Valo #define AR6003_HW_2_1_1_OTP_FILE "otp.bin" 137c0038972SKalle Valo #define AR6003_HW_2_1_1_FIRMWARE_FILE "athwlan.bin" 138c0038972SKalle Valo #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE "athtcmd_ram.bin" 139cd23c1c9SAlex Yang #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE "utf.bin" 140cd23c1c9SAlex Yang #define AR6003_HW_2_1_1_TESTSCRIPT_FILE "nullTestFlow.bin" 141c0038972SKalle Valo #define AR6003_HW_2_1_1_PATCH_FILE "data.patch.bin" 1420d0192baSKalle Valo #define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin" 1430d0192baSKalle Valo #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \ 144bdcd8170SKalle Valo "ath6k/AR6003/hw2.1.1/bdata.SD31.bin" 145bdcd8170SKalle Valo 14631024d99SKevin Fang /* AR6004 1.0 definitions */ 1470d0192baSKalle Valo #define AR6004_HW_1_0_VERSION 0x30000623 148c0038972SKalle Valo #define AR6004_HW_1_0_FW_DIR "ath6k/AR6004/hw1.0" 149c0038972SKalle Valo #define AR6004_HW_1_0_FIRMWARE_FILE "fw.ram.bin" 1500d0192baSKalle Valo #define AR6004_HW_1_0_BOARD_DATA_FILE "ath6k/AR6004/hw1.0/bdata.bin" 1510d0192baSKalle Valo #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \ 152d5720e59SKalle Valo "ath6k/AR6004/hw1.0/bdata.DB132.bin" 153d5720e59SKalle Valo 154d5720e59SKalle Valo /* AR6004 1.1 definitions */ 1550d0192baSKalle Valo #define AR6004_HW_1_1_VERSION 0x30000001 156c0038972SKalle Valo #define AR6004_HW_1_1_FW_DIR "ath6k/AR6004/hw1.1" 157c0038972SKalle Valo #define AR6004_HW_1_1_FIRMWARE_FILE "fw.ram.bin" 1580d0192baSKalle Valo #define AR6004_HW_1_1_BOARD_DATA_FILE "ath6k/AR6004/hw1.1/bdata.bin" 1590d0192baSKalle Valo #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \ 160d5720e59SKalle Valo "ath6k/AR6004/hw1.1/bdata.DB132.bin" 16131024d99SKevin Fang 162bdcd8170SKalle Valo /* Per STA data, used in AP mode */ 163bdcd8170SKalle Valo #define STA_PS_AWAKE BIT(0) 164bdcd8170SKalle Valo #define STA_PS_SLEEP BIT(1) 165bdcd8170SKalle Valo #define STA_PS_POLLED BIT(2) 166c1762a3fSThirumalai Pachamuthu #define STA_PS_APSD_TRIGGER BIT(3) 167c1762a3fSThirumalai Pachamuthu #define STA_PS_APSD_EOSP BIT(4) 168bdcd8170SKalle Valo 169bdcd8170SKalle Valo /* HTC TX packet tagging definitions */ 170bdcd8170SKalle Valo #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED 171bdcd8170SKalle Valo #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1) 172bdcd8170SKalle Valo 173bdcd8170SKalle Valo #define AR6003_CUST_DATA_SIZE 16 174bdcd8170SKalle Valo 175bdcd8170SKalle Valo #define AGGR_WIN_IDX(x, y) ((x) % (y)) 176bdcd8170SKalle Valo #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y)) 177bdcd8170SKalle Valo #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y)) 178bdcd8170SKalle Valo #define ATH6KL_MAX_SEQ_NO 0xFFF 179bdcd8170SKalle Valo #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO) 180bdcd8170SKalle Valo 181bdcd8170SKalle Valo #define NUM_OF_TIDS 8 182bdcd8170SKalle Valo #define AGGR_SZ_DEFAULT 8 183bdcd8170SKalle Valo 184bdcd8170SKalle Valo #define AGGR_WIN_SZ_MIN 2 185bdcd8170SKalle Valo #define AGGR_WIN_SZ_MAX 8 186bdcd8170SKalle Valo 187bdcd8170SKalle Valo #define TID_WINDOW_SZ(_x) ((_x) << 1) 188bdcd8170SKalle Valo 189bdcd8170SKalle Valo #define AGGR_NUM_OF_FREE_NETBUFS 16 190bdcd8170SKalle Valo 191bdcd8170SKalle Valo #define AGGR_RX_TIMEOUT 400 /* in ms */ 192bdcd8170SKalle Valo 193bdcd8170SKalle Valo #define WMI_TIMEOUT (2 * HZ) 194bdcd8170SKalle Valo 195bdcd8170SKalle Valo #define MBOX_YIELD_LIMIT 99 196bdcd8170SKalle Valo 1978f46fccdSRaja Mani #define ATH6KL_DEFAULT_LISTEN_INTVAL 100 /* in TUs */ 198ce0dc0cfSRaja Mani #define ATH6KL_DEFAULT_BMISS_TIME 1500 199ce0dc0cfSRaja Mani #define ATH6KL_MAX_WOW_LISTEN_INTL 300 /* in TUs */ 200ce0dc0cfSRaja Mani #define ATH6KL_MAX_BMISS_TIME 5000 2018f46fccdSRaja Mani 202bdcd8170SKalle Valo /* configuration lags */ 203bdcd8170SKalle Valo /* 204bdcd8170SKalle Valo * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in 205bdcd8170SKalle Valo * ERP IE of beacon to determine the short premable support when 206bdcd8170SKalle Valo * sending (Re)Assoc req. 207bdcd8170SKalle Valo * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power 208bdcd8170SKalle Valo * module state transition failure events which happen during 209bdcd8170SKalle Valo * scan, to the host. 210bdcd8170SKalle Valo */ 211bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0) 212bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1) 213bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_11N BIT(2) 214bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3) 215e390af77SRaja Mani #define ATH6KL_CONF_UART_DEBUG BIT(4) 216bdcd8170SKalle Valo 217c86e4f44SAarthi Thiruvengadam #define P2P_WILDCARD_SSID_LEN 7 /* DIRECT- */ 218c86e4f44SAarthi Thiruvengadam 219bdcd8170SKalle Valo enum wlan_low_pwr_state { 220bdcd8170SKalle Valo WLAN_POWER_STATE_ON, 221bdcd8170SKalle Valo WLAN_POWER_STATE_CUT_PWR, 222bdcd8170SKalle Valo WLAN_POWER_STATE_DEEP_SLEEP, 223bdcd8170SKalle Valo WLAN_POWER_STATE_WOW 224bdcd8170SKalle Valo }; 225bdcd8170SKalle Valo 226bdcd8170SKalle Valo enum sme_state { 227bdcd8170SKalle Valo SME_DISCONNECTED, 228bdcd8170SKalle Valo SME_CONNECTING, 229bdcd8170SKalle Valo SME_CONNECTED 230bdcd8170SKalle Valo }; 231bdcd8170SKalle Valo 232bdcd8170SKalle Valo struct skb_hold_q { 233bdcd8170SKalle Valo struct sk_buff *skb; 234bdcd8170SKalle Valo bool is_amsdu; 235bdcd8170SKalle Valo u16 seq_no; 236bdcd8170SKalle Valo }; 237bdcd8170SKalle Valo 238bdcd8170SKalle Valo struct rxtid { 239bdcd8170SKalle Valo bool aggr; 240bdcd8170SKalle Valo bool progress; 241bdcd8170SKalle Valo bool timer_mon; 242bdcd8170SKalle Valo u16 win_sz; 243bdcd8170SKalle Valo u16 seq_next; 244bdcd8170SKalle Valo u32 hold_q_sz; 245bdcd8170SKalle Valo struct skb_hold_q *hold_q; 246bdcd8170SKalle Valo struct sk_buff_head q; 24712eb9444SKalle Valo 24812eb9444SKalle Valo /* 24912eb9444SKalle Valo * FIXME: No clue what this should protect. Apparently it should 25012eb9444SKalle Valo * protect some of the fields above but they are also accessed 25112eb9444SKalle Valo * without taking the lock. 25212eb9444SKalle Valo */ 253bdcd8170SKalle Valo spinlock_t lock; 254bdcd8170SKalle Valo }; 255bdcd8170SKalle Valo 256bdcd8170SKalle Valo struct rxtid_stats { 257bdcd8170SKalle Valo u32 num_into_aggr; 258bdcd8170SKalle Valo u32 num_dups; 259bdcd8170SKalle Valo u32 num_oow; 260bdcd8170SKalle Valo u32 num_mpdu; 261bdcd8170SKalle Valo u32 num_amsdu; 262bdcd8170SKalle Valo u32 num_delivered; 263bdcd8170SKalle Valo u32 num_timeouts; 264bdcd8170SKalle Valo u32 num_hole; 265bdcd8170SKalle Valo u32 num_bar; 266bdcd8170SKalle Valo }; 267bdcd8170SKalle Valo 2687baef812SVasanthakumar Thiagarajan struct aggr_info_conn { 269bdcd8170SKalle Valo u8 aggr_sz; 270bdcd8170SKalle Valo u8 timer_scheduled; 271bdcd8170SKalle Valo struct timer_list timer; 272bdcd8170SKalle Valo struct net_device *dev; 273bdcd8170SKalle Valo struct rxtid rx_tid[NUM_OF_TIDS]; 274bdcd8170SKalle Valo struct rxtid_stats stat[NUM_OF_TIDS]; 2757baef812SVasanthakumar Thiagarajan struct aggr_info *aggr_info; 2767baef812SVasanthakumar Thiagarajan }; 2777baef812SVasanthakumar Thiagarajan 2787baef812SVasanthakumar Thiagarajan struct aggr_info { 2797baef812SVasanthakumar Thiagarajan struct aggr_info_conn *aggr_conn; 2807baef812SVasanthakumar Thiagarajan struct sk_buff_head rx_amsdu_freeq; 281bdcd8170SKalle Valo }; 282bdcd8170SKalle Valo 283bdcd8170SKalle Valo struct ath6kl_wep_key { 284bdcd8170SKalle Valo u8 key_index; 285bdcd8170SKalle Valo u8 key_len; 286bdcd8170SKalle Valo u8 key[64]; 287bdcd8170SKalle Valo }; 288bdcd8170SKalle Valo 289bdcd8170SKalle Valo #define ATH6KL_KEY_SEQ_LEN 8 290bdcd8170SKalle Valo 291bdcd8170SKalle Valo struct ath6kl_key { 292bdcd8170SKalle Valo u8 key[WLAN_MAX_KEY_LEN]; 293bdcd8170SKalle Valo u8 key_len; 294bdcd8170SKalle Valo u8 seq[ATH6KL_KEY_SEQ_LEN]; 295bdcd8170SKalle Valo u8 seq_len; 296bdcd8170SKalle Valo u32 cipher; 297bdcd8170SKalle Valo }; 298bdcd8170SKalle Valo 299bdcd8170SKalle Valo struct ath6kl_node_mapping { 300bdcd8170SKalle Valo u8 mac_addr[ETH_ALEN]; 301bdcd8170SKalle Valo u8 ep_id; 302bdcd8170SKalle Valo u8 tx_pend; 303bdcd8170SKalle Valo }; 304bdcd8170SKalle Valo 305bdcd8170SKalle Valo struct ath6kl_cookie { 306bdcd8170SKalle Valo struct sk_buff *skb; 307bdcd8170SKalle Valo u32 map_no; 308bdcd8170SKalle Valo struct htc_packet htc_pkt; 309bdcd8170SKalle Valo struct ath6kl_cookie *arc_list_next; 310bdcd8170SKalle Valo }; 311bdcd8170SKalle Valo 312d0ff7383SNaveen Gangadharan struct ath6kl_mgmt_buff { 313d0ff7383SNaveen Gangadharan struct list_head list; 314d0ff7383SNaveen Gangadharan u32 freq; 315d0ff7383SNaveen Gangadharan u32 wait; 316d0ff7383SNaveen Gangadharan u32 id; 317d0ff7383SNaveen Gangadharan bool no_cck; 318d0ff7383SNaveen Gangadharan size_t len; 319d0ff7383SNaveen Gangadharan u8 buf[0]; 320d0ff7383SNaveen Gangadharan }; 321d0ff7383SNaveen Gangadharan 322bdcd8170SKalle Valo struct ath6kl_sta { 323bdcd8170SKalle Valo u16 sta_flags; 324bdcd8170SKalle Valo u8 mac[ETH_ALEN]; 325bdcd8170SKalle Valo u8 aid; 326bdcd8170SKalle Valo u8 keymgmt; 327bdcd8170SKalle Valo u8 ucipher; 328bdcd8170SKalle Valo u8 auth; 329bdcd8170SKalle Valo u8 wpa_ie[ATH6KL_MAX_IE]; 330bdcd8170SKalle Valo struct sk_buff_head psq; 33112eb9444SKalle Valo 33212eb9444SKalle Valo /* protects psq, mgmt_psq, apsdq, and mgmt_psq_len fields */ 333bdcd8170SKalle Valo spinlock_t psq_lock; 33412eb9444SKalle Valo 335d0ff7383SNaveen Gangadharan struct list_head mgmt_psq; 336d0ff7383SNaveen Gangadharan size_t mgmt_psq_len; 337c1762a3fSThirumalai Pachamuthu u8 apsd_info; 338c1762a3fSThirumalai Pachamuthu struct sk_buff_head apsdq; 3391d2a4456SVasanthakumar Thiagarajan struct aggr_info_conn *aggr_conn; 340bdcd8170SKalle Valo }; 341bdcd8170SKalle Valo 342bdcd8170SKalle Valo struct ath6kl_version { 343bdcd8170SKalle Valo u32 target_ver; 344bdcd8170SKalle Valo u32 wlan_ver; 345bdcd8170SKalle Valo u32 abi_ver; 346bdcd8170SKalle Valo }; 347bdcd8170SKalle Valo 348bdcd8170SKalle Valo struct ath6kl_bmi { 349bdcd8170SKalle Valo u32 cmd_credits; 350bdcd8170SKalle Valo bool done_sent; 351bdcd8170SKalle Valo u8 *cmd_buf; 3521f4c894dSKalle Valo u32 max_data_size; 3531f4c894dSKalle Valo u32 max_cmd_size; 354bdcd8170SKalle Valo }; 355bdcd8170SKalle Valo 356bdcd8170SKalle Valo struct target_stats { 357bdcd8170SKalle Valo u64 tx_pkt; 358bdcd8170SKalle Valo u64 tx_byte; 359bdcd8170SKalle Valo u64 tx_ucast_pkt; 360bdcd8170SKalle Valo u64 tx_ucast_byte; 361bdcd8170SKalle Valo u64 tx_mcast_pkt; 362bdcd8170SKalle Valo u64 tx_mcast_byte; 363bdcd8170SKalle Valo u64 tx_bcast_pkt; 364bdcd8170SKalle Valo u64 tx_bcast_byte; 365bdcd8170SKalle Valo u64 tx_rts_success_cnt; 366bdcd8170SKalle Valo u64 tx_pkt_per_ac[4]; 367bdcd8170SKalle Valo 368bdcd8170SKalle Valo u64 tx_err; 369bdcd8170SKalle Valo u64 tx_fail_cnt; 370bdcd8170SKalle Valo u64 tx_retry_cnt; 371bdcd8170SKalle Valo u64 tx_mult_retry_cnt; 372bdcd8170SKalle Valo u64 tx_rts_fail_cnt; 373bdcd8170SKalle Valo 374bdcd8170SKalle Valo u64 rx_pkt; 375bdcd8170SKalle Valo u64 rx_byte; 376bdcd8170SKalle Valo u64 rx_ucast_pkt; 377bdcd8170SKalle Valo u64 rx_ucast_byte; 378bdcd8170SKalle Valo u64 rx_mcast_pkt; 379bdcd8170SKalle Valo u64 rx_mcast_byte; 380bdcd8170SKalle Valo u64 rx_bcast_pkt; 381bdcd8170SKalle Valo u64 rx_bcast_byte; 382bdcd8170SKalle Valo u64 rx_frgment_pkt; 383bdcd8170SKalle Valo 384bdcd8170SKalle Valo u64 rx_err; 385bdcd8170SKalle Valo u64 rx_crc_err; 386bdcd8170SKalle Valo u64 rx_key_cache_miss; 387bdcd8170SKalle Valo u64 rx_decrypt_err; 388bdcd8170SKalle Valo u64 rx_dupl_frame; 389bdcd8170SKalle Valo 390bdcd8170SKalle Valo u64 tkip_local_mic_fail; 391bdcd8170SKalle Valo u64 tkip_cnter_measures_invoked; 392bdcd8170SKalle Valo u64 tkip_replays; 393bdcd8170SKalle Valo u64 tkip_fmt_err; 394bdcd8170SKalle Valo u64 ccmp_fmt_err; 395bdcd8170SKalle Valo u64 ccmp_replays; 396bdcd8170SKalle Valo 397bdcd8170SKalle Valo u64 pwr_save_fail_cnt; 398bdcd8170SKalle Valo 399bdcd8170SKalle Valo u64 cs_bmiss_cnt; 400bdcd8170SKalle Valo u64 cs_low_rssi_cnt; 401bdcd8170SKalle Valo u64 cs_connect_cnt; 402bdcd8170SKalle Valo u64 cs_discon_cnt; 403bdcd8170SKalle Valo 404bdcd8170SKalle Valo s32 tx_ucast_rate; 405bdcd8170SKalle Valo s32 rx_ucast_rate; 406bdcd8170SKalle Valo 407bdcd8170SKalle Valo u32 lq_val; 408bdcd8170SKalle Valo 409bdcd8170SKalle Valo u32 wow_pkt_dropped; 410bdcd8170SKalle Valo u16 wow_evt_discarded; 411bdcd8170SKalle Valo 412bdcd8170SKalle Valo s16 noise_floor_calib; 413bdcd8170SKalle Valo s16 cs_rssi; 414bdcd8170SKalle Valo s16 cs_ave_beacon_rssi; 415bdcd8170SKalle Valo u8 cs_ave_beacon_snr; 416bdcd8170SKalle Valo u8 cs_last_roam_msec; 417bdcd8170SKalle Valo u8 cs_snr; 418bdcd8170SKalle Valo 419bdcd8170SKalle Valo u8 wow_host_pkt_wakeups; 420bdcd8170SKalle Valo u8 wow_host_evt_wakeups; 421bdcd8170SKalle Valo 422bdcd8170SKalle Valo u32 arp_received; 423bdcd8170SKalle Valo u32 arp_matched; 424bdcd8170SKalle Valo u32 arp_replied; 425bdcd8170SKalle Valo }; 426bdcd8170SKalle Valo 427bdcd8170SKalle Valo struct ath6kl_mbox_info { 428bdcd8170SKalle Valo u32 htc_addr; 429bdcd8170SKalle Valo u32 htc_ext_addr; 430bdcd8170SKalle Valo u32 htc_ext_sz; 431bdcd8170SKalle Valo 432bdcd8170SKalle Valo u32 block_size; 433bdcd8170SKalle Valo 434bdcd8170SKalle Valo u32 gmbox_addr; 435bdcd8170SKalle Valo 436bdcd8170SKalle Valo u32 gmbox_sz; 437bdcd8170SKalle Valo }; 438bdcd8170SKalle Valo 439bdcd8170SKalle Valo /* 440bdcd8170SKalle Valo * 802.11i defines an extended IV for use with non-WEP ciphers. 441bdcd8170SKalle Valo * When the EXTIV bit is set in the key id byte an additional 442bdcd8170SKalle Valo * 4 bytes immediately follow the IV for TKIP. For CCMP the 443bdcd8170SKalle Valo * EXTIV bit is likewise set but the 8 bytes represent the 444bdcd8170SKalle Valo * CCMP header rather than IV+extended-IV. 445bdcd8170SKalle Valo */ 446bdcd8170SKalle Valo 447bdcd8170SKalle Valo #define ATH6KL_KEYBUF_SIZE 16 448bdcd8170SKalle Valo #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */ 449bdcd8170SKalle Valo 450bdcd8170SKalle Valo #define ATH6KL_KEY_XMIT 0x01 451bdcd8170SKalle Valo #define ATH6KL_KEY_RECV 0x02 452bdcd8170SKalle Valo #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */ 453bdcd8170SKalle Valo 4549a5b1318SJouni Malinen /* Initial group key for AP mode */ 455bdcd8170SKalle Valo struct ath6kl_req_key { 4569a5b1318SJouni Malinen bool valid; 4579a5b1318SJouni Malinen u8 key_index; 4589a5b1318SJouni Malinen int key_type; 4599a5b1318SJouni Malinen u8 key[WLAN_MAX_KEY_LEN]; 4609a5b1318SJouni Malinen u8 key_len; 461bdcd8170SKalle Valo }; 462bdcd8170SKalle Valo 46377eab1e9SKalle Valo enum ath6kl_hif_type { 46477eab1e9SKalle Valo ATH6KL_HIF_TYPE_SDIO, 46577eab1e9SKalle Valo ATH6KL_HIF_TYPE_USB, 46677eab1e9SKalle Valo }; 46777eab1e9SKalle Valo 468e76ac2bfSKalle Valo enum ath6kl_htc_type { 469e76ac2bfSKalle Valo ATH6KL_HTC_TYPE_MBOX, 470636f8288SKalle Valo ATH6KL_HTC_TYPE_PIPE, 471e76ac2bfSKalle Valo }; 472e76ac2bfSKalle Valo 47380abaf9bSVasanthakumar Thiagarajan /* Max number of filters that hw supports */ 47480abaf9bSVasanthakumar Thiagarajan #define ATH6K_MAX_MC_FILTERS_PER_LIST 7 47580abaf9bSVasanthakumar Thiagarajan struct ath6kl_mc_filter { 47680abaf9bSVasanthakumar Thiagarajan struct list_head list; 47780abaf9bSVasanthakumar Thiagarajan char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE]; 47880abaf9bSVasanthakumar Thiagarajan }; 47980abaf9bSVasanthakumar Thiagarajan 480df90b369SVasanthakumar Thiagarajan struct ath6kl_htcap { 481df90b369SVasanthakumar Thiagarajan bool ht_enable; 482df90b369SVasanthakumar Thiagarajan u8 ampdu_factor; 483df90b369SVasanthakumar Thiagarajan unsigned short cap_info; 484df90b369SVasanthakumar Thiagarajan }; 485df90b369SVasanthakumar Thiagarajan 48671f96ee6SKalle Valo /* 48771f96ee6SKalle Valo * Driver's maximum limit, note that some firmwares support only one vif 48871f96ee6SKalle Valo * and the runtime (current) limit must be checked from ar->vif_max. 48971f96ee6SKalle Valo */ 490b64de356SVasanthakumar Thiagarajan #define ATH6KL_VIF_MAX 3 491334234b5SVasanthakumar Thiagarajan 49259c98449SVasanthakumar Thiagarajan /* vif flags info */ 49359c98449SVasanthakumar Thiagarajan enum ath6kl_vif_state { 49459c98449SVasanthakumar Thiagarajan CONNECTED, 49559c98449SVasanthakumar Thiagarajan CONNECT_PEND, 49659c98449SVasanthakumar Thiagarajan WMM_ENABLED, 49759c98449SVasanthakumar Thiagarajan NETQ_STOPPED, 49859c98449SVasanthakumar Thiagarajan DTIM_EXPIRED, 49959c98449SVasanthakumar Thiagarajan NETDEV_REGISTERED, 50059c98449SVasanthakumar Thiagarajan CLEAR_BSSFILTER_ON_BEACON, 50159c98449SVasanthakumar Thiagarajan DTIM_PERIOD_AVAIL, 50259c98449SVasanthakumar Thiagarajan WLAN_ENABLED, 503b95907a7SVasanthakumar Thiagarajan STATS_UPDATE_PEND, 504081c7a84SRaja Mani HOST_SLEEP_MODE_CMD_PROCESSED, 50559c98449SVasanthakumar Thiagarajan }; 50659c98449SVasanthakumar Thiagarajan 507108438bcSVasanthakumar Thiagarajan struct ath6kl_vif { 508990bd915SVasanthakumar Thiagarajan struct list_head list; 509108438bcSVasanthakumar Thiagarajan struct wireless_dev wdev; 510108438bcSVasanthakumar Thiagarajan struct net_device *ndev; 511108438bcSVasanthakumar Thiagarajan struct ath6kl *ar; 512478ac027SVasanthakumar Thiagarajan /* Lock to protect vif specific net_stats and flags */ 513478ac027SVasanthakumar Thiagarajan spinlock_t if_lock; 514334234b5SVasanthakumar Thiagarajan u8 fw_vif_idx; 51559c98449SVasanthakumar Thiagarajan unsigned long flags; 5163450334fSVasanthakumar Thiagarajan int ssid_len; 5173450334fSVasanthakumar Thiagarajan u8 ssid[IEEE80211_MAX_SSID_LEN]; 5183450334fSVasanthakumar Thiagarajan u8 dot11_auth_mode; 5193450334fSVasanthakumar Thiagarajan u8 auth_mode; 5203450334fSVasanthakumar Thiagarajan u8 prwise_crypto; 5213450334fSVasanthakumar Thiagarajan u8 prwise_crypto_len; 5223450334fSVasanthakumar Thiagarajan u8 grp_crypto; 5233450334fSVasanthakumar Thiagarajan u8 grp_crypto_len; 5243450334fSVasanthakumar Thiagarajan u8 def_txkey_index; 525f5938f24SVasanthakumar Thiagarajan u8 next_mode; 526f5938f24SVasanthakumar Thiagarajan u8 nw_type; 5278c8b65e3SVasanthakumar Thiagarajan u8 bssid[ETH_ALEN]; 5288c8b65e3SVasanthakumar Thiagarajan u8 req_bssid[ETH_ALEN]; 529f74bac54SVasanthakumar Thiagarajan u16 ch_hint; 530f74bac54SVasanthakumar Thiagarajan u16 bss_ch; 5316f2a73f9SVasanthakumar Thiagarajan struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1]; 5326f2a73f9SVasanthakumar Thiagarajan struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1]; 5332132c69cSVasanthakumar Thiagarajan struct aggr_info *aggr_cntxt; 534df90b369SVasanthakumar Thiagarajan struct ath6kl_htcap htcap; 53510509f90SKalle Valo 536de3ad713SVasanthakumar Thiagarajan struct timer_list disconnect_timer; 53710509f90SKalle Valo struct timer_list sched_scan_timer; 53810509f90SKalle Valo 53914ee6f6bSVasanthakumar Thiagarajan struct cfg80211_scan_request *scan_req; 54014ee6f6bSVasanthakumar Thiagarajan enum sme_state sme_state; 541cf5333d7SVasanthakumar Thiagarajan int reconnect_flag; 5421052261eSJouni Malinen u32 last_roc_id; 5431052261eSJouni Malinen u32 last_cancel_roc_id; 544cf5333d7SVasanthakumar Thiagarajan u32 send_action_id; 545cf5333d7SVasanthakumar Thiagarajan bool probe_req_report; 546cf5333d7SVasanthakumar Thiagarajan u16 next_chan; 547df90b369SVasanthakumar Thiagarajan enum nl80211_channel_type next_ch_type; 548df90b369SVasanthakumar Thiagarajan enum ieee80211_band next_ch_band; 549cf5333d7SVasanthakumar Thiagarajan u16 assoc_bss_beacon_int; 5508f46fccdSRaja Mani u16 listen_intvl_t; 551ce0dc0cfSRaja Mani u16 bmiss_time_t; 552cf5333d7SVasanthakumar Thiagarajan u8 assoc_bss_dtim_period; 553b95907a7SVasanthakumar Thiagarajan struct net_device_stats net_stats; 554b95907a7SVasanthakumar Thiagarajan struct target_stats target_stats; 55580abaf9bSVasanthakumar Thiagarajan 55680abaf9bSVasanthakumar Thiagarajan struct list_head mc_filter; 557108438bcSVasanthakumar Thiagarajan }; 558108438bcSVasanthakumar Thiagarajan 5596cb3c714SRaja Mani #define WOW_LIST_ID 0 5606cb3c714SRaja Mani #define WOW_HOST_REQ_DELAY 500 /* ms */ 5616cb3c714SRaja Mani 56210509f90SKalle Valo #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */ 56310509f90SKalle Valo 564bdcd8170SKalle Valo /* Flag info */ 56559c98449SVasanthakumar Thiagarajan enum ath6kl_dev_state { 56659c98449SVasanthakumar Thiagarajan WMI_ENABLED, 56759c98449SVasanthakumar Thiagarajan WMI_READY, 56859c98449SVasanthakumar Thiagarajan WMI_CTRL_EP_FULL, 56959c98449SVasanthakumar Thiagarajan TESTMODE, 57059c98449SVasanthakumar Thiagarajan DESTROY_IN_PROGRESS, 57159c98449SVasanthakumar Thiagarajan SKIP_SCAN, 57259c98449SVasanthakumar Thiagarajan ROAM_TBL_PEND, 5735fe4dffbSKalle Valo FIRST_BOOT, 57459c98449SVasanthakumar Thiagarajan }; 575bdcd8170SKalle Valo 57676a9fbe2SKalle Valo enum ath6kl_state { 57776a9fbe2SKalle Valo ATH6KL_STATE_OFF, 57876a9fbe2SKalle Valo ATH6KL_STATE_ON, 579390a8c8fSRaja Mani ATH6KL_STATE_SUSPENDING, 580390a8c8fSRaja Mani ATH6KL_STATE_RESUMING, 58176a9fbe2SKalle Valo ATH6KL_STATE_DEEPSLEEP, 582b4b2a0b1SKalle Valo ATH6KL_STATE_CUTPOWER, 583dd6c0c63SRaja Mani ATH6KL_STATE_WOW, 58410509f90SKalle Valo ATH6KL_STATE_SCHED_SCAN, 58576a9fbe2SKalle Valo }; 58676a9fbe2SKalle Valo 587bdcd8170SKalle Valo struct ath6kl { 588bdcd8170SKalle Valo struct device *dev; 589be98e3a4SVasanthakumar Thiagarajan struct wiphy *wiphy; 59076a9fbe2SKalle Valo 59176a9fbe2SKalle Valo enum ath6kl_state state; 5925f1127ffSKalle Valo unsigned int testmode; 59376a9fbe2SKalle Valo 594bdcd8170SKalle Valo struct ath6kl_bmi bmi; 595bdcd8170SKalle Valo const struct ath6kl_hif_ops *hif_ops; 596e76ac2bfSKalle Valo const struct ath6kl_htc_ops *htc_ops; 597bdcd8170SKalle Valo struct wmi *wmi; 598bdcd8170SKalle Valo int tx_pending[ENDPOINT_MAX]; 599bdcd8170SKalle Valo int total_tx_data_pend; 600bdcd8170SKalle Valo struct htc_target *htc_target; 60177eab1e9SKalle Valo enum ath6kl_hif_type hif_type; 602bdcd8170SKalle Valo void *hif_priv; 603990bd915SVasanthakumar Thiagarajan struct list_head vif_list; 604990bd915SVasanthakumar Thiagarajan /* Lock to avoid race in vif_list entries among add/del/traverse */ 605990bd915SVasanthakumar Thiagarajan spinlock_t list_lock; 60655055976SVasanthakumar Thiagarajan u8 num_vif; 607368b1b0fSKalle Valo unsigned int vif_max; 6083226f68aSVasanthakumar Thiagarajan u8 max_norm_iface; 60955055976SVasanthakumar Thiagarajan u8 avail_idx_map; 61012eb9444SKalle Valo 61112eb9444SKalle Valo /* 61212eb9444SKalle Valo * Protects at least amsdu_rx_buffer_queue, ath6kl_alloc_cookie() 61312eb9444SKalle Valo * calls, tx_pending and total_tx_data_pend. 61412eb9444SKalle Valo */ 615bdcd8170SKalle Valo spinlock_t lock; 61612eb9444SKalle Valo 617bdcd8170SKalle Valo struct semaphore sem; 618e5090444SVivek Natarajan u8 lrssi_roam_threshold; 619bdcd8170SKalle Valo struct ath6kl_version version; 620bdcd8170SKalle Valo u32 target_type; 621bdcd8170SKalle Valo u8 tx_pwr; 622bdcd8170SKalle Valo struct ath6kl_node_mapping node_map[MAX_NODE_NUM]; 623bdcd8170SKalle Valo u8 ibss_ps_enable; 62455055976SVasanthakumar Thiagarajan bool ibss_if_active; 625bdcd8170SKalle Valo u8 node_num; 626bdcd8170SKalle Valo u8 next_ep_id; 627bdcd8170SKalle Valo struct ath6kl_cookie *cookie_list; 628bdcd8170SKalle Valo u32 cookie_count; 629bdcd8170SKalle Valo enum htc_endpoint_id ac2ep_map[WMM_NUM_AC]; 630bdcd8170SKalle Valo bool ac_stream_active[WMM_NUM_AC]; 631bdcd8170SKalle Valo u8 ac_stream_pri_map[WMM_NUM_AC]; 632bdcd8170SKalle Valo u8 hiac_stream_active_pri; 633bdcd8170SKalle Valo u8 ep2ac_map[ENDPOINT_MAX]; 634bdcd8170SKalle Valo enum htc_endpoint_id ctrl_ep; 6353c370398SKalle Valo struct ath6kl_htc_credit_info credit_state_info; 636bdcd8170SKalle Valo u32 connect_ctrl_flags; 637bdcd8170SKalle Valo u32 user_key_ctrl; 638bdcd8170SKalle Valo u8 usr_bss_filter; 639bdcd8170SKalle Valo struct ath6kl_sta sta_list[AP_MAX_NUM_STA]; 640bdcd8170SKalle Valo u8 sta_list_index; 641bdcd8170SKalle Valo struct ath6kl_req_key ap_mode_bkey; 642bdcd8170SKalle Valo struct sk_buff_head mcastpsq; 64312eb9444SKalle Valo 64412eb9444SKalle Valo /* 64512eb9444SKalle Valo * FIXME: protects access to mcastpsq but is actually useless as 64612eb9444SKalle Valo * all skbe_queue_*() functions provide serialisation themselves 64712eb9444SKalle Valo */ 648bdcd8170SKalle Valo spinlock_t mcastpsq_lock; 64912eb9444SKalle Valo 650bdcd8170SKalle Valo u8 intra_bss; 651bdcd8170SKalle Valo struct wmi_ap_mode_stat ap_stats; 652bdcd8170SKalle Valo u8 ap_country_code[3]; 653bdcd8170SKalle Valo struct list_head amsdu_rx_buffer_queue; 654bdcd8170SKalle Valo u8 rx_meta_ver; 655bdcd8170SKalle Valo enum wlan_low_pwr_state wlan_pwr_state; 656d66ea4f9SVasanthakumar Thiagarajan u8 mac_addr[ETH_ALEN]; 657bdcd8170SKalle Valo #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4 658003353b0SKalle Valo struct { 659003353b0SKalle Valo void *rx_report; 660003353b0SKalle Valo size_t rx_report_len; 661003353b0SKalle Valo } tm; 662003353b0SKalle Valo 663856f4b31SKalle Valo struct ath6kl_hw { 664856f4b31SKalle Valo u32 id; 665293badf4SKalle Valo const char *name; 666a01ac414SKalle Valo u32 dataset_patch_addr; 667a01ac414SKalle Valo u32 app_load_addr; 668a01ac414SKalle Valo u32 app_start_override_addr; 669991b27eaSKalle Valo u32 board_ext_data_addr; 670991b27eaSKalle Valo u32 reserved_ram_size; 6710d4d72bfSKalle Valo u32 board_addr; 67239586bf2SRyan Hsu u32 refclk_hz; 67339586bf2SRyan Hsu u32 uarttx_pin; 674cd23c1c9SAlex Yang u32 testscript_addr; 675d1a9421dSKalle Valo 676c0038972SKalle Valo struct ath6kl_hw_fw { 677c0038972SKalle Valo const char *dir; 678c0038972SKalle Valo const char *otp; 679d1a9421dSKalle Valo const char *fw; 680c0038972SKalle Valo const char *tcmd; 681c0038972SKalle Valo const char *patch; 682cd23c1c9SAlex Yang const char *utf; 683cd23c1c9SAlex Yang const char *testscript; 684c0038972SKalle Valo } fw; 685c0038972SKalle Valo 686d1a9421dSKalle Valo const char *fw_board; 687d1a9421dSKalle Valo const char *fw_default_board; 688a01ac414SKalle Valo } hw; 689a01ac414SKalle Valo 690bdcd8170SKalle Valo u16 conf_flags; 691e390af77SRaja Mani u16 suspend_mode; 6921e9a905dSRaja Mani u16 wow_suspend_mode; 693bdcd8170SKalle Valo wait_queue_head_t event_wq; 694bdcd8170SKalle Valo struct ath6kl_mbox_info mbox_info; 695bdcd8170SKalle Valo 696bdcd8170SKalle Valo struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM]; 697bdcd8170SKalle Valo unsigned long flag; 698bdcd8170SKalle Valo 699bdcd8170SKalle Valo u8 *fw_board; 700bdcd8170SKalle Valo size_t fw_board_len; 701bdcd8170SKalle Valo 702bdcd8170SKalle Valo u8 *fw_otp; 703bdcd8170SKalle Valo size_t fw_otp_len; 704bdcd8170SKalle Valo 705bdcd8170SKalle Valo u8 *fw; 706bdcd8170SKalle Valo size_t fw_len; 707bdcd8170SKalle Valo 708bdcd8170SKalle Valo u8 *fw_patch; 709bdcd8170SKalle Valo size_t fw_patch_len; 710bdcd8170SKalle Valo 711cd23c1c9SAlex Yang u8 *fw_testscript; 712cd23c1c9SAlex Yang size_t fw_testscript_len; 713cd23c1c9SAlex Yang 71465a8b4ccSKalle Valo unsigned int fw_api; 71597e0496dSKalle Valo unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN]; 71697e0496dSKalle Valo 717bdcd8170SKalle Valo struct workqueue_struct *ath6kl_wq; 7187c3075e9SVasanthakumar Thiagarajan 719d999ba3eSVasanthakumar Thiagarajan struct dentry *debugfs_phy; 7206a7c9badSJouni Malinen 7216bbc7c35SJouni Malinen bool p2p; 7226bbc7c35SJouni Malinen 723e5348a1eSVasanthakumar Thiagarajan bool wiphy_registered; 724e5348a1eSVasanthakumar Thiagarajan 725bdf5396bSKalle Valo #ifdef CONFIG_ATH6KL_DEBUG 726bdf5396bSKalle Valo struct { 7279b9a4f2aSKalle Valo struct sk_buff_head fwlog_queue; 728c807b30dSKalle Valo struct completion fwlog_completion; 729c807b30dSKalle Valo bool fwlog_open; 730c807b30dSKalle Valo 731939f1cceSKalle Valo u32 fwlog_mask; 7329b9a4f2aSKalle Valo 73391d57de5SVasanthakumar Thiagarajan unsigned int dbgfs_diag_reg; 734252c068bSVasanthakumar Thiagarajan u32 diag_reg_addr_wr; 735252c068bSVasanthakumar Thiagarajan u32 diag_reg_val_wr; 7369a730834SKalle Valo 7379a730834SKalle Valo struct { 7389a730834SKalle Valo unsigned int invalid_rate; 7399a730834SKalle Valo } war_stats; 7404b28a80dSJouni Malinen 7414b28a80dSJouni Malinen u8 *roam_tbl; 7424b28a80dSJouni Malinen unsigned int roam_tbl_len; 743ff0b0075SJouni Malinen 744ff0b0075SJouni Malinen u8 keepalive; 745ff0b0075SJouni Malinen u8 disc_timeout; 746bdf5396bSKalle Valo } debug; 747bdf5396bSKalle Valo #endif /* CONFIG_ATH6KL_DEBUG */ 748bdcd8170SKalle Valo }; 749bdcd8170SKalle Valo 750d6d5c06cSKalle Valo static inline struct ath6kl *ath6kl_priv(struct net_device *dev) 751bdcd8170SKalle Valo { 752108438bcSVasanthakumar Thiagarajan return ((struct ath6kl_vif *) netdev_priv(dev))->ar; 753bdcd8170SKalle Valo } 754bdcd8170SKalle Valo 755bc07ddb2SKalle Valo static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar, 756bc07ddb2SKalle Valo u32 item_offset) 757bc07ddb2SKalle Valo { 758bc07ddb2SKalle Valo u32 addr = 0; 759bc07ddb2SKalle Valo 760bc07ddb2SKalle Valo if (ar->target_type == TARGET_TYPE_AR6003) 761bc07ddb2SKalle Valo addr = ATH6KL_AR6003_HI_START_ADDR + item_offset; 762bc07ddb2SKalle Valo else if (ar->target_type == TARGET_TYPE_AR6004) 763bc07ddb2SKalle Valo addr = ATH6KL_AR6004_HI_START_ADDR + item_offset; 764bc07ddb2SKalle Valo 765bc07ddb2SKalle Valo return addr; 766bc07ddb2SKalle Valo } 767bc07ddb2SKalle Valo 768bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar); 769bdcd8170SKalle Valo void ath6kl_detect_error(unsigned long ptr); 770bdcd8170SKalle Valo void disconnect_timer_handler(unsigned long ptr); 771bdcd8170SKalle Valo void init_netdev(struct net_device *dev); 772bdcd8170SKalle Valo void ath6kl_cookie_init(struct ath6kl *ar); 773bdcd8170SKalle Valo void ath6kl_cookie_cleanup(struct ath6kl *ar); 774bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet); 77563de1112SKalle Valo void ath6kl_tx_complete(struct htc_target *context, 77663de1112SKalle Valo struct list_head *packet_queue); 777bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target, 778bdcd8170SKalle Valo struct htc_packet *packet); 779bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar); 780bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar); 781f9ea0753SVasanthakumar Thiagarajan int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value); 782addb44beSKalle Valo int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length); 783addb44beSKalle Valo int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value); 784addb44beSKalle Valo int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length); 785bc07ddb2SKalle Valo int ath6kl_read_fwlogs(struct ath6kl *ar); 786e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif); 787bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar); 788bdcd8170SKalle Valo 789bdcd8170SKalle Valo struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar); 790bdcd8170SKalle Valo void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie); 791bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev); 792bdcd8170SKalle Valo 7937baef812SVasanthakumar Thiagarajan struct aggr_info *aggr_init(struct ath6kl_vif *vif); 794c8651541SVasanthakumar Thiagarajan void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info, 795c8651541SVasanthakumar Thiagarajan struct aggr_info_conn *aggr_conn); 796bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target, 797bdcd8170SKalle Valo enum htc_endpoint_id endpoint); 798bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count); 799bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target, 800bdcd8170SKalle Valo enum htc_endpoint_id endpoint, 801bdcd8170SKalle Valo int len); 802bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info); 8031d2a4456SVasanthakumar Thiagarajan void aggr_reset_state(struct aggr_info_conn *aggr_conn); 804bdcd8170SKalle Valo 8056765d0aaSVasanthakumar Thiagarajan struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 *node_addr); 806bdcd8170SKalle Valo struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid); 807bdcd8170SKalle Valo 808bdcd8170SKalle Valo void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver); 809bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb, 810bdcd8170SKalle Valo enum htc_endpoint_id eid); 811240d2799SVasanthakumar Thiagarajan void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel, 812bdcd8170SKalle Valo u8 *bssid, u16 listen_int, 813bdcd8170SKalle Valo u16 beacon_int, enum network_type net_type, 814bdcd8170SKalle Valo u8 beacon_ie_len, u8 assoc_req_len, 815bdcd8170SKalle Valo u8 assoc_resp_len, u8 *assoc_info); 816240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel); 817240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr, 818572e27c0SJouni Malinen u8 keymgmt, u8 ucipher, u8 auth, 819c1762a3fSThirumalai Pachamuthu u8 assoc_req_len, u8 *assoc_info, u8 apsd_info); 820240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason, 821bdcd8170SKalle Valo u8 *bssid, u8 assoc_resp_len, 822bdcd8170SKalle Valo u8 *assoc_info, u16 prot_reason_status); 823240d2799SVasanthakumar Thiagarajan void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast); 824bdcd8170SKalle Valo void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr); 825240d2799SVasanthakumar Thiagarajan void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status); 826240d2799SVasanthakumar Thiagarajan void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len); 827bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active); 828bdcd8170SKalle Valo enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac); 829bdcd8170SKalle Valo 830240d2799SVasanthakumar Thiagarajan void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid); 831bdcd8170SKalle Valo 832240d2799SVasanthakumar Thiagarajan void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif); 833240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect(struct ath6kl_vif *vif); 834240d2799SVasanthakumar Thiagarajan void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid); 835240d2799SVasanthakumar Thiagarajan void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no, 836bdcd8170SKalle Valo u8 win_sz); 837bdcd8170SKalle Valo void ath6kl_wakeup_event(void *dev); 838bdcd8170SKalle Valo 8396db8fa53SVasanthakumar Thiagarajan void ath6kl_reset_device(struct ath6kl *ar, u32 target_type, 8406db8fa53SVasanthakumar Thiagarajan bool wait_fot_compltn, bool cold_reset); 841e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif); 842990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar); 84355055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready); 8445fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar); 8455fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar); 84645eaa78fSKalle Valo int ath6kl_init_fetch_firmwares(struct ath6kl *ar); 84745eaa78fSKalle Valo int ath6kl_init_hw_params(struct ath6kl *ar); 84845eaa78fSKalle Valo 849a918fb3cSRaja Mani void ath6kl_check_wow_status(struct ath6kl *ar); 8505fe4dffbSKalle Valo 851636f8288SKalle Valo void ath6kl_core_tx_complete(struct ath6kl *ar, struct sk_buff *skb); 852636f8288SKalle Valo void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe); 853636f8288SKalle Valo 85445eaa78fSKalle Valo struct ath6kl *ath6kl_core_create(struct device *dev); 855e76ac2bfSKalle Valo int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type); 85645eaa78fSKalle Valo void ath6kl_core_cleanup(struct ath6kl *ar); 85745eaa78fSKalle Valo void ath6kl_core_destroy(struct ath6kl *ar); 85845eaa78fSKalle Valo 859bdcd8170SKalle Valo #endif /* CORE_H */ 860