1bdcd8170SKalle Valo /*
2bdcd8170SKalle Valo  * Copyright (c) 2010-2011 Atheros Communications Inc.
31b2df407SVasanthakumar Thiagarajan  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
4bdcd8170SKalle Valo  *
5bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
6bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
7bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
8bdcd8170SKalle Valo  *
9bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16bdcd8170SKalle Valo  */
17bdcd8170SKalle Valo 
18bdcd8170SKalle Valo #ifndef CORE_H
19bdcd8170SKalle Valo #define CORE_H
20bdcd8170SKalle Valo 
21bdcd8170SKalle Valo #include <linux/etherdevice.h>
22bdcd8170SKalle Valo #include <linux/rtnetlink.h>
23bdcd8170SKalle Valo #include <linux/firmware.h>
24bdcd8170SKalle Valo #include <linux/sched.h>
25bdf5396bSKalle Valo #include <linux/circ_buf.h>
26bdcd8170SKalle Valo #include <net/cfg80211.h>
27bdcd8170SKalle Valo #include "htc.h"
28bdcd8170SKalle Valo #include "wmi.h"
29bdcd8170SKalle Valo #include "bmi.h"
30bc07ddb2SKalle Valo #include "target.h"
31bdcd8170SKalle Valo 
32bdcd8170SKalle Valo #define MAX_ATH6KL                        1
33bdcd8170SKalle Valo #define ATH6KL_MAX_RX_BUFFERS             16
34bdcd8170SKalle Valo #define ATH6KL_BUFFER_SIZE                1664
35bdcd8170SKalle Valo #define ATH6KL_MAX_AMSDU_RX_BUFFERS       4
36bdcd8170SKalle Valo #define ATH6KL_AMSDU_REFILL_THRESHOLD     3
37bdcd8170SKalle Valo #define ATH6KL_AMSDU_BUFFER_SIZE     (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128)
38bdcd8170SKalle Valo #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN	1508
39bdcd8170SKalle Valo #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN	46
40bdcd8170SKalle Valo 
41bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_INIT     0
42bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_RUN      1
43bdcd8170SKalle Valo 
44bdcd8170SKalle Valo #define ATH6KL_TX_TIMEOUT      10
45bdcd8170SKalle Valo #define ATH6KL_MAX_ENDPOINTS   4
46bdcd8170SKalle Valo #define MAX_NODE_NUM           15
47bdcd8170SKalle Valo 
48c1762a3fSThirumalai Pachamuthu #define ATH6KL_APSD_ALL_FRAME		0xFFFF
49c1762a3fSThirumalai Pachamuthu #define ATH6KL_APSD_NUM_OF_AC		0x4
50c1762a3fSThirumalai Pachamuthu #define ATH6KL_APSD_FRAME_MASK		0xF
51c1762a3fSThirumalai Pachamuthu 
521df94a85SVasanthakumar Thiagarajan /* Extra bytes for htc header alignment */
531df94a85SVasanthakumar Thiagarajan #define ATH6KL_HTC_ALIGN_BYTES 3
541df94a85SVasanthakumar Thiagarajan 
55bdcd8170SKalle Valo /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */
56bdcd8170SKalle Valo #define MAX_DEF_COOKIE_NUM                180
57bdcd8170SKalle Valo #define MAX_HI_COOKIE_NUM                 18	/* 10% of MAX_COOKIE_NUM */
58bdcd8170SKalle Valo #define MAX_COOKIE_NUM                 (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM)
59bdcd8170SKalle Valo 
60bdcd8170SKalle Valo #define MAX_DEFAULT_SEND_QUEUE_DEPTH      (MAX_DEF_COOKIE_NUM / WMM_NUM_AC)
61bdcd8170SKalle Valo 
62bdcd8170SKalle Valo #define DISCON_TIMER_INTVAL               10000  /* in msec */
63bdcd8170SKalle Valo 
6413423c31SVasanthakumar Thiagarajan /* Channel dwell time in fg scan */
6513423c31SVasanthakumar Thiagarajan #define ATH6KL_FG_SCAN_INTERVAL		50 /* in ms */
6613423c31SVasanthakumar Thiagarajan 
6750d41234SKalle Valo /* includes also the null byte */
6850d41234SKalle Valo #define ATH6KL_FIRMWARE_MAGIC               "QCA-ATH6KL"
6950d41234SKalle Valo 
7050d41234SKalle Valo enum ath6kl_fw_ie_type {
7150d41234SKalle Valo 	ATH6KL_FW_IE_FW_VERSION = 0,
7250d41234SKalle Valo 	ATH6KL_FW_IE_TIMESTAMP = 1,
7350d41234SKalle Valo 	ATH6KL_FW_IE_OTP_IMAGE = 2,
7450d41234SKalle Valo 	ATH6KL_FW_IE_FW_IMAGE = 3,
7550d41234SKalle Valo 	ATH6KL_FW_IE_PATCH_IMAGE = 4,
768a137480SKalle Valo 	ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5,
7797e0496dSKalle Valo 	ATH6KL_FW_IE_CAPABILITIES = 6,
781b4304daSKalle Valo 	ATH6KL_FW_IE_PATCH_ADDR = 7,
7903ef0250SKalle Valo 	ATH6KL_FW_IE_BOARD_ADDR = 8,
80368b1b0fSKalle Valo 	ATH6KL_FW_IE_VIF_MAX = 9,
8150d41234SKalle Valo };
8250d41234SKalle Valo 
8397e0496dSKalle Valo enum ath6kl_fw_capability {
8497e0496dSKalle Valo 	ATH6KL_FW_CAPABILITY_HOST_P2P = 0,
8510509f90SKalle Valo 	ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1,
8697e0496dSKalle Valo 
873ca9d1fcSAarthi Thiruvengadam 	/*
883ca9d1fcSAarthi Thiruvengadam 	 * Firmware is capable of supporting P2P mgmt operations on a
893ca9d1fcSAarthi Thiruvengadam 	 * station interface. After group formation, the station
903ca9d1fcSAarthi Thiruvengadam 	 * interface will become a P2P client/GO interface as the case may be
913ca9d1fcSAarthi Thiruvengadam 	 */
923ca9d1fcSAarthi Thiruvengadam 	ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
933ca9d1fcSAarthi Thiruvengadam 
9497e0496dSKalle Valo 	/* this needs to be last */
9597e0496dSKalle Valo 	ATH6KL_FW_CAPABILITY_MAX,
9697e0496dSKalle Valo };
9797e0496dSKalle Valo 
9897e0496dSKalle Valo #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32)
9997e0496dSKalle Valo 
10050d41234SKalle Valo struct ath6kl_fw_ie {
10150d41234SKalle Valo 	__le32 id;
10250d41234SKalle Valo 	__le32 len;
10350d41234SKalle Valo 	u8 data[0];
10450d41234SKalle Valo };
10550d41234SKalle Valo 
106c0038972SKalle Valo #define ATH6KL_FW_API2_FILE "fw-2.bin"
10765a8b4ccSKalle Valo #define ATH6KL_FW_API3_FILE "fw-3.bin"
108c0038972SKalle Valo 
109bdcd8170SKalle Valo /* AR6003 1.0 definitions */
1100d0192baSKalle Valo #define AR6003_HW_1_0_VERSION                 0x300002ba
111bdcd8170SKalle Valo 
112bdcd8170SKalle Valo /* AR6003 2.0 definitions */
1130d0192baSKalle Valo #define AR6003_HW_2_0_VERSION                 0x30000384
1140d0192baSKalle Valo #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS  0x57e910
115c0038972SKalle Valo #define AR6003_HW_2_0_FW_DIR			"ath6k/AR6003/hw2.0"
116c0038972SKalle Valo #define AR6003_HW_2_0_OTP_FILE			"otp.bin.z77"
117c0038972SKalle Valo #define AR6003_HW_2_0_FIRMWARE_FILE		"athwlan.bin.z77"
118c0038972SKalle Valo #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE	"athtcmd_ram.bin"
119c0038972SKalle Valo #define AR6003_HW_2_0_PATCH_FILE		"data.patch.bin"
1200d0192baSKalle Valo #define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin"
1210d0192baSKalle Valo #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \
1220d0192baSKalle Valo 			"ath6k/AR6003/hw2.0/bdata.SD31.bin"
123bdcd8170SKalle Valo 
124bdcd8170SKalle Valo /* AR6003 3.0 definitions */
1250d0192baSKalle Valo #define AR6003_HW_2_1_1_VERSION                 0x30000582
126c0038972SKalle Valo #define AR6003_HW_2_1_1_FW_DIR			"ath6k/AR6003/hw2.1.1"
127c0038972SKalle Valo #define AR6003_HW_2_1_1_OTP_FILE		"otp.bin"
128c0038972SKalle Valo #define AR6003_HW_2_1_1_FIRMWARE_FILE		"athwlan.bin"
129c0038972SKalle Valo #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE	"athtcmd_ram.bin"
130cd23c1c9SAlex Yang #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE	"utf.bin"
131cd23c1c9SAlex Yang #define AR6003_HW_2_1_1_TESTSCRIPT_FILE	"nullTestFlow.bin"
132c0038972SKalle Valo #define AR6003_HW_2_1_1_PATCH_FILE		"data.patch.bin"
1330d0192baSKalle Valo #define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin"
1340d0192baSKalle Valo #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE	\
135bdcd8170SKalle Valo 			"ath6k/AR6003/hw2.1.1/bdata.SD31.bin"
136bdcd8170SKalle Valo 
13731024d99SKevin Fang /* AR6004 1.0 definitions */
1380d0192baSKalle Valo #define AR6004_HW_1_0_VERSION                 0x30000623
139c0038972SKalle Valo #define AR6004_HW_1_0_FW_DIR			"ath6k/AR6004/hw1.0"
140c0038972SKalle Valo #define AR6004_HW_1_0_FIRMWARE_FILE		"fw.ram.bin"
1410d0192baSKalle Valo #define AR6004_HW_1_0_BOARD_DATA_FILE         "ath6k/AR6004/hw1.0/bdata.bin"
1420d0192baSKalle Valo #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \
143d5720e59SKalle Valo 	"ath6k/AR6004/hw1.0/bdata.DB132.bin"
144d5720e59SKalle Valo 
145d5720e59SKalle Valo /* AR6004 1.1 definitions */
1460d0192baSKalle Valo #define AR6004_HW_1_1_VERSION                 0x30000001
147c0038972SKalle Valo #define AR6004_HW_1_1_FW_DIR			"ath6k/AR6004/hw1.1"
148c0038972SKalle Valo #define AR6004_HW_1_1_FIRMWARE_FILE		"fw.ram.bin"
1490d0192baSKalle Valo #define AR6004_HW_1_1_BOARD_DATA_FILE         "ath6k/AR6004/hw1.1/bdata.bin"
1500d0192baSKalle Valo #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \
151d5720e59SKalle Valo 	"ath6k/AR6004/hw1.1/bdata.DB132.bin"
15231024d99SKevin Fang 
153bdcd8170SKalle Valo /* Per STA data, used in AP mode */
154bdcd8170SKalle Valo #define STA_PS_AWAKE		BIT(0)
155bdcd8170SKalle Valo #define	STA_PS_SLEEP		BIT(1)
156bdcd8170SKalle Valo #define	STA_PS_POLLED		BIT(2)
157c1762a3fSThirumalai Pachamuthu #define STA_PS_APSD_TRIGGER     BIT(3)
158c1762a3fSThirumalai Pachamuthu #define STA_PS_APSD_EOSP        BIT(4)
159bdcd8170SKalle Valo 
160bdcd8170SKalle Valo /* HTC TX packet tagging definitions */
161bdcd8170SKalle Valo #define ATH6KL_CONTROL_PKT_TAG    HTC_TX_PACKET_TAG_USER_DEFINED
162bdcd8170SKalle Valo #define ATH6KL_DATA_PKT_TAG       (ATH6KL_CONTROL_PKT_TAG + 1)
163bdcd8170SKalle Valo 
164bdcd8170SKalle Valo #define AR6003_CUST_DATA_SIZE 16
165bdcd8170SKalle Valo 
166bdcd8170SKalle Valo #define AGGR_WIN_IDX(x, y)          ((x) % (y))
167bdcd8170SKalle Valo #define AGGR_INCR_IDX(x, y)         AGGR_WIN_IDX(((x) + 1), (y))
168bdcd8170SKalle Valo #define AGGR_DCRM_IDX(x, y)         AGGR_WIN_IDX(((x) - 1), (y))
169bdcd8170SKalle Valo #define ATH6KL_MAX_SEQ_NO		0xFFF
170bdcd8170SKalle Valo #define ATH6KL_NEXT_SEQ_NO(x)		(((x) + 1) & ATH6KL_MAX_SEQ_NO)
171bdcd8170SKalle Valo 
172bdcd8170SKalle Valo #define NUM_OF_TIDS         8
173bdcd8170SKalle Valo #define AGGR_SZ_DEFAULT     8
174bdcd8170SKalle Valo 
175bdcd8170SKalle Valo #define AGGR_WIN_SZ_MIN     2
176bdcd8170SKalle Valo #define AGGR_WIN_SZ_MAX     8
177bdcd8170SKalle Valo 
178bdcd8170SKalle Valo #define TID_WINDOW_SZ(_x)   ((_x) << 1)
179bdcd8170SKalle Valo 
180bdcd8170SKalle Valo #define AGGR_NUM_OF_FREE_NETBUFS    16
181bdcd8170SKalle Valo 
182bdcd8170SKalle Valo #define AGGR_RX_TIMEOUT     400	/* in ms */
183bdcd8170SKalle Valo 
184bdcd8170SKalle Valo #define WMI_TIMEOUT (2 * HZ)
185bdcd8170SKalle Valo 
186bdcd8170SKalle Valo #define MBOX_YIELD_LIMIT 99
187bdcd8170SKalle Valo 
1888f46fccdSRaja Mani #define ATH6KL_DEFAULT_LISTEN_INTVAL	100 /* in TUs */
189ce0dc0cfSRaja Mani #define ATH6KL_DEFAULT_BMISS_TIME	1500
190ce0dc0cfSRaja Mani #define ATH6KL_MAX_WOW_LISTEN_INTL	300 /* in TUs */
191ce0dc0cfSRaja Mani #define ATH6KL_MAX_BMISS_TIME		5000
1928f46fccdSRaja Mani 
193bdcd8170SKalle Valo /* configuration lags */
194bdcd8170SKalle Valo /*
195bdcd8170SKalle Valo  * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in
196bdcd8170SKalle Valo  * ERP IE of beacon to determine the short premable support when
197bdcd8170SKalle Valo  * sending (Re)Assoc req.
198bdcd8170SKalle Valo  * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power
199bdcd8170SKalle Valo  * module state transition failure events which happen during
200bdcd8170SKalle Valo  * scan, to the host.
201bdcd8170SKalle Valo  */
202bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_ERP_BARKER		BIT(0)
203bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN  BIT(1)
204bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_11N			BIT(2)
205bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_TX_BURST		BIT(3)
206e390af77SRaja Mani #define ATH6KL_CONF_UART_DEBUG			BIT(4)
207bdcd8170SKalle Valo 
208bdcd8170SKalle Valo enum wlan_low_pwr_state {
209bdcd8170SKalle Valo 	WLAN_POWER_STATE_ON,
210bdcd8170SKalle Valo 	WLAN_POWER_STATE_CUT_PWR,
211bdcd8170SKalle Valo 	WLAN_POWER_STATE_DEEP_SLEEP,
212bdcd8170SKalle Valo 	WLAN_POWER_STATE_WOW
213bdcd8170SKalle Valo };
214bdcd8170SKalle Valo 
215bdcd8170SKalle Valo enum sme_state {
216bdcd8170SKalle Valo 	SME_DISCONNECTED,
217bdcd8170SKalle Valo 	SME_CONNECTING,
218bdcd8170SKalle Valo 	SME_CONNECTED
219bdcd8170SKalle Valo };
220bdcd8170SKalle Valo 
221bdcd8170SKalle Valo struct skb_hold_q {
222bdcd8170SKalle Valo 	struct sk_buff *skb;
223bdcd8170SKalle Valo 	bool is_amsdu;
224bdcd8170SKalle Valo 	u16 seq_no;
225bdcd8170SKalle Valo };
226bdcd8170SKalle Valo 
227bdcd8170SKalle Valo struct rxtid {
228bdcd8170SKalle Valo 	bool aggr;
229bdcd8170SKalle Valo 	bool progress;
230bdcd8170SKalle Valo 	bool timer_mon;
231bdcd8170SKalle Valo 	u16 win_sz;
232bdcd8170SKalle Valo 	u16 seq_next;
233bdcd8170SKalle Valo 	u32 hold_q_sz;
234bdcd8170SKalle Valo 	struct skb_hold_q *hold_q;
235bdcd8170SKalle Valo 	struct sk_buff_head q;
236bdcd8170SKalle Valo 	spinlock_t lock;
237bdcd8170SKalle Valo };
238bdcd8170SKalle Valo 
239bdcd8170SKalle Valo struct rxtid_stats {
240bdcd8170SKalle Valo 	u32 num_into_aggr;
241bdcd8170SKalle Valo 	u32 num_dups;
242bdcd8170SKalle Valo 	u32 num_oow;
243bdcd8170SKalle Valo 	u32 num_mpdu;
244bdcd8170SKalle Valo 	u32 num_amsdu;
245bdcd8170SKalle Valo 	u32 num_delivered;
246bdcd8170SKalle Valo 	u32 num_timeouts;
247bdcd8170SKalle Valo 	u32 num_hole;
248bdcd8170SKalle Valo 	u32 num_bar;
249bdcd8170SKalle Valo };
250bdcd8170SKalle Valo 
2517baef812SVasanthakumar Thiagarajan struct aggr_info_conn {
252bdcd8170SKalle Valo 	u8 aggr_sz;
253bdcd8170SKalle Valo 	u8 timer_scheduled;
254bdcd8170SKalle Valo 	struct timer_list timer;
255bdcd8170SKalle Valo 	struct net_device *dev;
256bdcd8170SKalle Valo 	struct rxtid rx_tid[NUM_OF_TIDS];
257bdcd8170SKalle Valo 	struct rxtid_stats stat[NUM_OF_TIDS];
2587baef812SVasanthakumar Thiagarajan 	struct aggr_info *aggr_info;
2597baef812SVasanthakumar Thiagarajan };
2607baef812SVasanthakumar Thiagarajan 
2617baef812SVasanthakumar Thiagarajan struct aggr_info {
2627baef812SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn;
2637baef812SVasanthakumar Thiagarajan 	struct sk_buff_head rx_amsdu_freeq;
264bdcd8170SKalle Valo };
265bdcd8170SKalle Valo 
266bdcd8170SKalle Valo struct ath6kl_wep_key {
267bdcd8170SKalle Valo 	u8 key_index;
268bdcd8170SKalle Valo 	u8 key_len;
269bdcd8170SKalle Valo 	u8 key[64];
270bdcd8170SKalle Valo };
271bdcd8170SKalle Valo 
272bdcd8170SKalle Valo #define ATH6KL_KEY_SEQ_LEN 8
273bdcd8170SKalle Valo 
274bdcd8170SKalle Valo struct ath6kl_key {
275bdcd8170SKalle Valo 	u8 key[WLAN_MAX_KEY_LEN];
276bdcd8170SKalle Valo 	u8 key_len;
277bdcd8170SKalle Valo 	u8 seq[ATH6KL_KEY_SEQ_LEN];
278bdcd8170SKalle Valo 	u8 seq_len;
279bdcd8170SKalle Valo 	u32 cipher;
280bdcd8170SKalle Valo };
281bdcd8170SKalle Valo 
282bdcd8170SKalle Valo struct ath6kl_node_mapping {
283bdcd8170SKalle Valo 	u8 mac_addr[ETH_ALEN];
284bdcd8170SKalle Valo 	u8 ep_id;
285bdcd8170SKalle Valo 	u8 tx_pend;
286bdcd8170SKalle Valo };
287bdcd8170SKalle Valo 
288bdcd8170SKalle Valo struct ath6kl_cookie {
289bdcd8170SKalle Valo 	struct sk_buff *skb;
290bdcd8170SKalle Valo 	u32 map_no;
291bdcd8170SKalle Valo 	struct htc_packet htc_pkt;
292bdcd8170SKalle Valo 	struct ath6kl_cookie *arc_list_next;
293bdcd8170SKalle Valo };
294bdcd8170SKalle Valo 
295d0ff7383SNaveen Gangadharan struct ath6kl_mgmt_buff {
296d0ff7383SNaveen Gangadharan 	struct list_head list;
297d0ff7383SNaveen Gangadharan 	u32 freq;
298d0ff7383SNaveen Gangadharan 	u32 wait;
299d0ff7383SNaveen Gangadharan 	u32 id;
300d0ff7383SNaveen Gangadharan 	bool no_cck;
301d0ff7383SNaveen Gangadharan 	size_t len;
302d0ff7383SNaveen Gangadharan 	u8 buf[0];
303d0ff7383SNaveen Gangadharan };
304d0ff7383SNaveen Gangadharan 
305bdcd8170SKalle Valo struct ath6kl_sta {
306bdcd8170SKalle Valo 	u16 sta_flags;
307bdcd8170SKalle Valo 	u8 mac[ETH_ALEN];
308bdcd8170SKalle Valo 	u8 aid;
309bdcd8170SKalle Valo 	u8 keymgmt;
310bdcd8170SKalle Valo 	u8 ucipher;
311bdcd8170SKalle Valo 	u8 auth;
312bdcd8170SKalle Valo 	u8 wpa_ie[ATH6KL_MAX_IE];
313bdcd8170SKalle Valo 	struct sk_buff_head psq;
314bdcd8170SKalle Valo 	spinlock_t psq_lock;
315d0ff7383SNaveen Gangadharan 	struct list_head mgmt_psq;
316d0ff7383SNaveen Gangadharan 	size_t mgmt_psq_len;
317c1762a3fSThirumalai Pachamuthu 	u8 apsd_info;
318c1762a3fSThirumalai Pachamuthu 	struct sk_buff_head apsdq;
3191d2a4456SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn;
320bdcd8170SKalle Valo };
321bdcd8170SKalle Valo 
322bdcd8170SKalle Valo struct ath6kl_version {
323bdcd8170SKalle Valo 	u32 target_ver;
324bdcd8170SKalle Valo 	u32 wlan_ver;
325bdcd8170SKalle Valo 	u32 abi_ver;
326bdcd8170SKalle Valo };
327bdcd8170SKalle Valo 
328bdcd8170SKalle Valo struct ath6kl_bmi {
329bdcd8170SKalle Valo 	u32 cmd_credits;
330bdcd8170SKalle Valo 	bool done_sent;
331bdcd8170SKalle Valo 	u8 *cmd_buf;
3321f4c894dSKalle Valo 	u32 max_data_size;
3331f4c894dSKalle Valo 	u32 max_cmd_size;
334bdcd8170SKalle Valo };
335bdcd8170SKalle Valo 
336bdcd8170SKalle Valo struct target_stats {
337bdcd8170SKalle Valo 	u64 tx_pkt;
338bdcd8170SKalle Valo 	u64 tx_byte;
339bdcd8170SKalle Valo 	u64 tx_ucast_pkt;
340bdcd8170SKalle Valo 	u64 tx_ucast_byte;
341bdcd8170SKalle Valo 	u64 tx_mcast_pkt;
342bdcd8170SKalle Valo 	u64 tx_mcast_byte;
343bdcd8170SKalle Valo 	u64 tx_bcast_pkt;
344bdcd8170SKalle Valo 	u64 tx_bcast_byte;
345bdcd8170SKalle Valo 	u64 tx_rts_success_cnt;
346bdcd8170SKalle Valo 	u64 tx_pkt_per_ac[4];
347bdcd8170SKalle Valo 
348bdcd8170SKalle Valo 	u64 tx_err;
349bdcd8170SKalle Valo 	u64 tx_fail_cnt;
350bdcd8170SKalle Valo 	u64 tx_retry_cnt;
351bdcd8170SKalle Valo 	u64 tx_mult_retry_cnt;
352bdcd8170SKalle Valo 	u64 tx_rts_fail_cnt;
353bdcd8170SKalle Valo 
354bdcd8170SKalle Valo 	u64 rx_pkt;
355bdcd8170SKalle Valo 	u64 rx_byte;
356bdcd8170SKalle Valo 	u64 rx_ucast_pkt;
357bdcd8170SKalle Valo 	u64 rx_ucast_byte;
358bdcd8170SKalle Valo 	u64 rx_mcast_pkt;
359bdcd8170SKalle Valo 	u64 rx_mcast_byte;
360bdcd8170SKalle Valo 	u64 rx_bcast_pkt;
361bdcd8170SKalle Valo 	u64 rx_bcast_byte;
362bdcd8170SKalle Valo 	u64 rx_frgment_pkt;
363bdcd8170SKalle Valo 
364bdcd8170SKalle Valo 	u64 rx_err;
365bdcd8170SKalle Valo 	u64 rx_crc_err;
366bdcd8170SKalle Valo 	u64 rx_key_cache_miss;
367bdcd8170SKalle Valo 	u64 rx_decrypt_err;
368bdcd8170SKalle Valo 	u64 rx_dupl_frame;
369bdcd8170SKalle Valo 
370bdcd8170SKalle Valo 	u64 tkip_local_mic_fail;
371bdcd8170SKalle Valo 	u64 tkip_cnter_measures_invoked;
372bdcd8170SKalle Valo 	u64 tkip_replays;
373bdcd8170SKalle Valo 	u64 tkip_fmt_err;
374bdcd8170SKalle Valo 	u64 ccmp_fmt_err;
375bdcd8170SKalle Valo 	u64 ccmp_replays;
376bdcd8170SKalle Valo 
377bdcd8170SKalle Valo 	u64 pwr_save_fail_cnt;
378bdcd8170SKalle Valo 
379bdcd8170SKalle Valo 	u64 cs_bmiss_cnt;
380bdcd8170SKalle Valo 	u64 cs_low_rssi_cnt;
381bdcd8170SKalle Valo 	u64 cs_connect_cnt;
382bdcd8170SKalle Valo 	u64 cs_discon_cnt;
383bdcd8170SKalle Valo 
384bdcd8170SKalle Valo 	s32 tx_ucast_rate;
385bdcd8170SKalle Valo 	s32 rx_ucast_rate;
386bdcd8170SKalle Valo 
387bdcd8170SKalle Valo 	u32 lq_val;
388bdcd8170SKalle Valo 
389bdcd8170SKalle Valo 	u32 wow_pkt_dropped;
390bdcd8170SKalle Valo 	u16 wow_evt_discarded;
391bdcd8170SKalle Valo 
392bdcd8170SKalle Valo 	s16 noise_floor_calib;
393bdcd8170SKalle Valo 	s16 cs_rssi;
394bdcd8170SKalle Valo 	s16 cs_ave_beacon_rssi;
395bdcd8170SKalle Valo 	u8 cs_ave_beacon_snr;
396bdcd8170SKalle Valo 	u8 cs_last_roam_msec;
397bdcd8170SKalle Valo 	u8 cs_snr;
398bdcd8170SKalle Valo 
399bdcd8170SKalle Valo 	u8 wow_host_pkt_wakeups;
400bdcd8170SKalle Valo 	u8 wow_host_evt_wakeups;
401bdcd8170SKalle Valo 
402bdcd8170SKalle Valo 	u32 arp_received;
403bdcd8170SKalle Valo 	u32 arp_matched;
404bdcd8170SKalle Valo 	u32 arp_replied;
405bdcd8170SKalle Valo };
406bdcd8170SKalle Valo 
407bdcd8170SKalle Valo struct ath6kl_mbox_info {
408bdcd8170SKalle Valo 	u32 htc_addr;
409bdcd8170SKalle Valo 	u32 htc_ext_addr;
410bdcd8170SKalle Valo 	u32 htc_ext_sz;
411bdcd8170SKalle Valo 
412bdcd8170SKalle Valo 	u32 block_size;
413bdcd8170SKalle Valo 
414bdcd8170SKalle Valo 	u32 gmbox_addr;
415bdcd8170SKalle Valo 
416bdcd8170SKalle Valo 	u32 gmbox_sz;
417bdcd8170SKalle Valo };
418bdcd8170SKalle Valo 
419bdcd8170SKalle Valo /*
420bdcd8170SKalle Valo  * 802.11i defines an extended IV for use with non-WEP ciphers.
421bdcd8170SKalle Valo  * When the EXTIV bit is set in the key id byte an additional
422bdcd8170SKalle Valo  * 4 bytes immediately follow the IV for TKIP.  For CCMP the
423bdcd8170SKalle Valo  * EXTIV bit is likewise set but the 8 bytes represent the
424bdcd8170SKalle Valo  * CCMP header rather than IV+extended-IV.
425bdcd8170SKalle Valo  */
426bdcd8170SKalle Valo 
427bdcd8170SKalle Valo #define ATH6KL_KEYBUF_SIZE 16
428bdcd8170SKalle Valo #define ATH6KL_MICBUF_SIZE (8+8)	/* space for both tx and rx */
429bdcd8170SKalle Valo 
430bdcd8170SKalle Valo #define ATH6KL_KEY_XMIT  0x01
431bdcd8170SKalle Valo #define ATH6KL_KEY_RECV  0x02
432bdcd8170SKalle Valo #define ATH6KL_KEY_DEFAULT   0x80	/* default xmit key */
433bdcd8170SKalle Valo 
4349a5b1318SJouni Malinen /* Initial group key for AP mode */
435bdcd8170SKalle Valo struct ath6kl_req_key {
4369a5b1318SJouni Malinen 	bool valid;
4379a5b1318SJouni Malinen 	u8 key_index;
4389a5b1318SJouni Malinen 	int key_type;
4399a5b1318SJouni Malinen 	u8 key[WLAN_MAX_KEY_LEN];
4409a5b1318SJouni Malinen 	u8 key_len;
441bdcd8170SKalle Valo };
442bdcd8170SKalle Valo 
44377eab1e9SKalle Valo enum ath6kl_hif_type {
44477eab1e9SKalle Valo 	ATH6KL_HIF_TYPE_SDIO,
44577eab1e9SKalle Valo 	ATH6KL_HIF_TYPE_USB,
44677eab1e9SKalle Valo };
44777eab1e9SKalle Valo 
44880abaf9bSVasanthakumar Thiagarajan /* Max number of filters that hw supports */
44980abaf9bSVasanthakumar Thiagarajan #define ATH6K_MAX_MC_FILTERS_PER_LIST 7
45080abaf9bSVasanthakumar Thiagarajan struct ath6kl_mc_filter {
45180abaf9bSVasanthakumar Thiagarajan 	struct list_head list;
45280abaf9bSVasanthakumar Thiagarajan 	char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE];
45380abaf9bSVasanthakumar Thiagarajan };
45480abaf9bSVasanthakumar Thiagarajan 
45571f96ee6SKalle Valo /*
45671f96ee6SKalle Valo  * Driver's maximum limit, note that some firmwares support only one vif
45771f96ee6SKalle Valo  * and the runtime (current) limit must be checked from ar->vif_max.
45871f96ee6SKalle Valo  */
459b64de356SVasanthakumar Thiagarajan #define ATH6KL_VIF_MAX	3
460334234b5SVasanthakumar Thiagarajan 
46159c98449SVasanthakumar Thiagarajan /* vif flags info */
46259c98449SVasanthakumar Thiagarajan enum ath6kl_vif_state {
46359c98449SVasanthakumar Thiagarajan 	CONNECTED,
46459c98449SVasanthakumar Thiagarajan 	CONNECT_PEND,
46559c98449SVasanthakumar Thiagarajan 	WMM_ENABLED,
46659c98449SVasanthakumar Thiagarajan 	NETQ_STOPPED,
46759c98449SVasanthakumar Thiagarajan 	DTIM_EXPIRED,
46859c98449SVasanthakumar Thiagarajan 	NETDEV_REGISTERED,
46959c98449SVasanthakumar Thiagarajan 	CLEAR_BSSFILTER_ON_BEACON,
47059c98449SVasanthakumar Thiagarajan 	DTIM_PERIOD_AVAIL,
47159c98449SVasanthakumar Thiagarajan 	WLAN_ENABLED,
472b95907a7SVasanthakumar Thiagarajan 	STATS_UPDATE_PEND,
473081c7a84SRaja Mani 	HOST_SLEEP_MODE_CMD_PROCESSED,
47459c98449SVasanthakumar Thiagarajan };
47559c98449SVasanthakumar Thiagarajan 
476108438bcSVasanthakumar Thiagarajan struct ath6kl_vif {
477990bd915SVasanthakumar Thiagarajan 	struct list_head list;
478108438bcSVasanthakumar Thiagarajan 	struct wireless_dev wdev;
479108438bcSVasanthakumar Thiagarajan 	struct net_device *ndev;
480108438bcSVasanthakumar Thiagarajan 	struct ath6kl *ar;
481478ac027SVasanthakumar Thiagarajan 	/* Lock to protect vif specific net_stats and flags */
482478ac027SVasanthakumar Thiagarajan 	spinlock_t if_lock;
483334234b5SVasanthakumar Thiagarajan 	u8 fw_vif_idx;
48459c98449SVasanthakumar Thiagarajan 	unsigned long flags;
4853450334fSVasanthakumar Thiagarajan 	int ssid_len;
4863450334fSVasanthakumar Thiagarajan 	u8 ssid[IEEE80211_MAX_SSID_LEN];
4873450334fSVasanthakumar Thiagarajan 	u8 dot11_auth_mode;
4883450334fSVasanthakumar Thiagarajan 	u8 auth_mode;
4893450334fSVasanthakumar Thiagarajan 	u8 prwise_crypto;
4903450334fSVasanthakumar Thiagarajan 	u8 prwise_crypto_len;
4913450334fSVasanthakumar Thiagarajan 	u8 grp_crypto;
4923450334fSVasanthakumar Thiagarajan 	u8 grp_crypto_len;
4933450334fSVasanthakumar Thiagarajan 	u8 def_txkey_index;
494f5938f24SVasanthakumar Thiagarajan 	u8 next_mode;
495f5938f24SVasanthakumar Thiagarajan 	u8 nw_type;
4968c8b65e3SVasanthakumar Thiagarajan 	u8 bssid[ETH_ALEN];
4978c8b65e3SVasanthakumar Thiagarajan 	u8 req_bssid[ETH_ALEN];
498f74bac54SVasanthakumar Thiagarajan 	u16 ch_hint;
499f74bac54SVasanthakumar Thiagarajan 	u16 bss_ch;
5006f2a73f9SVasanthakumar Thiagarajan 	struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1];
5016f2a73f9SVasanthakumar Thiagarajan 	struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1];
5022132c69cSVasanthakumar Thiagarajan 	struct aggr_info *aggr_cntxt;
50310509f90SKalle Valo 
504de3ad713SVasanthakumar Thiagarajan 	struct timer_list disconnect_timer;
50510509f90SKalle Valo 	struct timer_list sched_scan_timer;
50610509f90SKalle Valo 
50714ee6f6bSVasanthakumar Thiagarajan 	struct cfg80211_scan_request *scan_req;
50814ee6f6bSVasanthakumar Thiagarajan 	enum sme_state sme_state;
509cf5333d7SVasanthakumar Thiagarajan 	int reconnect_flag;
5101052261eSJouni Malinen 	u32 last_roc_id;
5111052261eSJouni Malinen 	u32 last_cancel_roc_id;
512cf5333d7SVasanthakumar Thiagarajan 	u32 send_action_id;
513cf5333d7SVasanthakumar Thiagarajan 	bool probe_req_report;
514cf5333d7SVasanthakumar Thiagarajan 	u16 next_chan;
515cf5333d7SVasanthakumar Thiagarajan 	u16 assoc_bss_beacon_int;
5168f46fccdSRaja Mani 	u16 listen_intvl_t;
517ce0dc0cfSRaja Mani 	u16 bmiss_time_t;
518cf5333d7SVasanthakumar Thiagarajan 	u8 assoc_bss_dtim_period;
519b95907a7SVasanthakumar Thiagarajan 	struct net_device_stats net_stats;
520b95907a7SVasanthakumar Thiagarajan 	struct target_stats target_stats;
52180abaf9bSVasanthakumar Thiagarajan 
52280abaf9bSVasanthakumar Thiagarajan 	struct list_head mc_filter;
523108438bcSVasanthakumar Thiagarajan };
524108438bcSVasanthakumar Thiagarajan 
5256cb3c714SRaja Mani #define WOW_LIST_ID		0
5266cb3c714SRaja Mani #define WOW_HOST_REQ_DELAY	500 /* ms */
5276cb3c714SRaja Mani 
52810509f90SKalle Valo #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */
52910509f90SKalle Valo 
530bdcd8170SKalle Valo /* Flag info */
53159c98449SVasanthakumar Thiagarajan enum ath6kl_dev_state {
53259c98449SVasanthakumar Thiagarajan 	WMI_ENABLED,
53359c98449SVasanthakumar Thiagarajan 	WMI_READY,
53459c98449SVasanthakumar Thiagarajan 	WMI_CTRL_EP_FULL,
53559c98449SVasanthakumar Thiagarajan 	TESTMODE,
53659c98449SVasanthakumar Thiagarajan 	DESTROY_IN_PROGRESS,
53759c98449SVasanthakumar Thiagarajan 	SKIP_SCAN,
53859c98449SVasanthakumar Thiagarajan 	ROAM_TBL_PEND,
5395fe4dffbSKalle Valo 	FIRST_BOOT,
54059c98449SVasanthakumar Thiagarajan };
541bdcd8170SKalle Valo 
54276a9fbe2SKalle Valo enum ath6kl_state {
54376a9fbe2SKalle Valo 	ATH6KL_STATE_OFF,
54476a9fbe2SKalle Valo 	ATH6KL_STATE_ON,
545390a8c8fSRaja Mani 	ATH6KL_STATE_SUSPENDING,
546390a8c8fSRaja Mani 	ATH6KL_STATE_RESUMING,
54776a9fbe2SKalle Valo 	ATH6KL_STATE_DEEPSLEEP,
548b4b2a0b1SKalle Valo 	ATH6KL_STATE_CUTPOWER,
549dd6c0c63SRaja Mani 	ATH6KL_STATE_WOW,
55010509f90SKalle Valo 	ATH6KL_STATE_SCHED_SCAN,
55176a9fbe2SKalle Valo };
55276a9fbe2SKalle Valo 
553bdcd8170SKalle Valo struct ath6kl {
554bdcd8170SKalle Valo 	struct device *dev;
555be98e3a4SVasanthakumar Thiagarajan 	struct wiphy *wiphy;
55676a9fbe2SKalle Valo 
55776a9fbe2SKalle Valo 	enum ath6kl_state state;
5585f1127ffSKalle Valo 	unsigned int testmode;
55976a9fbe2SKalle Valo 
560bdcd8170SKalle Valo 	struct ath6kl_bmi bmi;
561bdcd8170SKalle Valo 	const struct ath6kl_hif_ops *hif_ops;
562bdcd8170SKalle Valo 	struct wmi *wmi;
563bdcd8170SKalle Valo 	int tx_pending[ENDPOINT_MAX];
564bdcd8170SKalle Valo 	int total_tx_data_pend;
565bdcd8170SKalle Valo 	struct htc_target *htc_target;
56677eab1e9SKalle Valo 	enum ath6kl_hif_type hif_type;
567bdcd8170SKalle Valo 	void *hif_priv;
568990bd915SVasanthakumar Thiagarajan 	struct list_head vif_list;
569990bd915SVasanthakumar Thiagarajan 	/* Lock to avoid race in vif_list entries among add/del/traverse */
570990bd915SVasanthakumar Thiagarajan 	spinlock_t list_lock;
57155055976SVasanthakumar Thiagarajan 	u8 num_vif;
572368b1b0fSKalle Valo 	unsigned int vif_max;
5733226f68aSVasanthakumar Thiagarajan 	u8 max_norm_iface;
57455055976SVasanthakumar Thiagarajan 	u8 avail_idx_map;
575bdcd8170SKalle Valo 	spinlock_t lock;
576bdcd8170SKalle Valo 	struct semaphore sem;
577e5090444SVivek Natarajan 	u8 lrssi_roam_threshold;
578bdcd8170SKalle Valo 	struct ath6kl_version version;
579bdcd8170SKalle Valo 	u32 target_type;
580bdcd8170SKalle Valo 	u8 tx_pwr;
581bdcd8170SKalle Valo 	struct ath6kl_node_mapping node_map[MAX_NODE_NUM];
582bdcd8170SKalle Valo 	u8 ibss_ps_enable;
58355055976SVasanthakumar Thiagarajan 	bool ibss_if_active;
584bdcd8170SKalle Valo 	u8 node_num;
585bdcd8170SKalle Valo 	u8 next_ep_id;
586bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie_list;
587bdcd8170SKalle Valo 	u32 cookie_count;
588bdcd8170SKalle Valo 	enum htc_endpoint_id ac2ep_map[WMM_NUM_AC];
589bdcd8170SKalle Valo 	bool ac_stream_active[WMM_NUM_AC];
590bdcd8170SKalle Valo 	u8 ac_stream_pri_map[WMM_NUM_AC];
591bdcd8170SKalle Valo 	u8 hiac_stream_active_pri;
592bdcd8170SKalle Valo 	u8 ep2ac_map[ENDPOINT_MAX];
593bdcd8170SKalle Valo 	enum htc_endpoint_id ctrl_ep;
5943c370398SKalle Valo 	struct ath6kl_htc_credit_info credit_state_info;
595bdcd8170SKalle Valo 	u32 connect_ctrl_flags;
596bdcd8170SKalle Valo 	u32 user_key_ctrl;
597bdcd8170SKalle Valo 	u8 usr_bss_filter;
598bdcd8170SKalle Valo 	struct ath6kl_sta sta_list[AP_MAX_NUM_STA];
599bdcd8170SKalle Valo 	u8 sta_list_index;
600bdcd8170SKalle Valo 	struct ath6kl_req_key ap_mode_bkey;
601bdcd8170SKalle Valo 	struct sk_buff_head mcastpsq;
602bdcd8170SKalle Valo 	spinlock_t mcastpsq_lock;
603bdcd8170SKalle Valo 	u8 intra_bss;
604bdcd8170SKalle Valo 	struct wmi_ap_mode_stat ap_stats;
605bdcd8170SKalle Valo 	u8 ap_country_code[3];
606bdcd8170SKalle Valo 	struct list_head amsdu_rx_buffer_queue;
607bdcd8170SKalle Valo 	u8 rx_meta_ver;
608bdcd8170SKalle Valo 	enum wlan_low_pwr_state wlan_pwr_state;
609d66ea4f9SVasanthakumar Thiagarajan 	u8 mac_addr[ETH_ALEN];
610bdcd8170SKalle Valo #define AR_MCAST_FILTER_MAC_ADDR_SIZE  4
611003353b0SKalle Valo 	struct {
612003353b0SKalle Valo 		void *rx_report;
613003353b0SKalle Valo 		size_t rx_report_len;
614003353b0SKalle Valo 	} tm;
615003353b0SKalle Valo 
616856f4b31SKalle Valo 	struct ath6kl_hw {
617856f4b31SKalle Valo 		u32 id;
618293badf4SKalle Valo 		const char *name;
619a01ac414SKalle Valo 		u32 dataset_patch_addr;
620a01ac414SKalle Valo 		u32 app_load_addr;
621a01ac414SKalle Valo 		u32 app_start_override_addr;
622991b27eaSKalle Valo 		u32 board_ext_data_addr;
623991b27eaSKalle Valo 		u32 reserved_ram_size;
6240d4d72bfSKalle Valo 		u32 board_addr;
62539586bf2SRyan Hsu 		u32 refclk_hz;
62639586bf2SRyan Hsu 		u32 uarttx_pin;
627cd23c1c9SAlex Yang 		u32 testscript_addr;
628d1a9421dSKalle Valo 
629c0038972SKalle Valo 		struct ath6kl_hw_fw {
630c0038972SKalle Valo 			const char *dir;
631c0038972SKalle Valo 			const char *otp;
632d1a9421dSKalle Valo 			const char *fw;
633c0038972SKalle Valo 			const char *tcmd;
634c0038972SKalle Valo 			const char *patch;
635cd23c1c9SAlex Yang 			const char *utf;
636cd23c1c9SAlex Yang 			const char *testscript;
637c0038972SKalle Valo 		} fw;
638c0038972SKalle Valo 
639d1a9421dSKalle Valo 		const char *fw_board;
640d1a9421dSKalle Valo 		const char *fw_default_board;
641a01ac414SKalle Valo 	} hw;
642a01ac414SKalle Valo 
643bdcd8170SKalle Valo 	u16 conf_flags;
644e390af77SRaja Mani 	u16 suspend_mode;
6451e9a905dSRaja Mani 	u16 wow_suspend_mode;
646bdcd8170SKalle Valo 	wait_queue_head_t event_wq;
647bdcd8170SKalle Valo 	struct ath6kl_mbox_info mbox_info;
648bdcd8170SKalle Valo 
649bdcd8170SKalle Valo 	struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM];
650bdcd8170SKalle Valo 	unsigned long flag;
651bdcd8170SKalle Valo 
652bdcd8170SKalle Valo 	u8 *fw_board;
653bdcd8170SKalle Valo 	size_t fw_board_len;
654bdcd8170SKalle Valo 
655bdcd8170SKalle Valo 	u8 *fw_otp;
656bdcd8170SKalle Valo 	size_t fw_otp_len;
657bdcd8170SKalle Valo 
658bdcd8170SKalle Valo 	u8 *fw;
659bdcd8170SKalle Valo 	size_t fw_len;
660bdcd8170SKalle Valo 
661bdcd8170SKalle Valo 	u8 *fw_patch;
662bdcd8170SKalle Valo 	size_t fw_patch_len;
663bdcd8170SKalle Valo 
664cd23c1c9SAlex Yang 	u8 *fw_testscript;
665cd23c1c9SAlex Yang 	size_t fw_testscript_len;
666cd23c1c9SAlex Yang 
66765a8b4ccSKalle Valo 	unsigned int fw_api;
66897e0496dSKalle Valo 	unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN];
66997e0496dSKalle Valo 
670bdcd8170SKalle Valo 	struct workqueue_struct *ath6kl_wq;
6717c3075e9SVasanthakumar Thiagarajan 
672d999ba3eSVasanthakumar Thiagarajan 	struct dentry *debugfs_phy;
6736a7c9badSJouni Malinen 
6746bbc7c35SJouni Malinen 	bool p2p;
6756bbc7c35SJouni Malinen 
676e5348a1eSVasanthakumar Thiagarajan 	bool wiphy_registered;
677e5348a1eSVasanthakumar Thiagarajan 
678bdf5396bSKalle Valo #ifdef CONFIG_ATH6KL_DEBUG
679bdf5396bSKalle Valo 	struct {
6809b9a4f2aSKalle Valo 		struct sk_buff_head fwlog_queue;
681c807b30dSKalle Valo 		struct completion fwlog_completion;
682c807b30dSKalle Valo 		bool fwlog_open;
683c807b30dSKalle Valo 
684939f1cceSKalle Valo 		u32 fwlog_mask;
6859b9a4f2aSKalle Valo 
68691d57de5SVasanthakumar Thiagarajan 		unsigned int dbgfs_diag_reg;
687252c068bSVasanthakumar Thiagarajan 		u32 diag_reg_addr_wr;
688252c068bSVasanthakumar Thiagarajan 		u32 diag_reg_val_wr;
6899a730834SKalle Valo 
6909a730834SKalle Valo 		struct {
6919a730834SKalle Valo 			unsigned int invalid_rate;
6929a730834SKalle Valo 		} war_stats;
6934b28a80dSJouni Malinen 
6944b28a80dSJouni Malinen 		u8 *roam_tbl;
6954b28a80dSJouni Malinen 		unsigned int roam_tbl_len;
696ff0b0075SJouni Malinen 
697ff0b0075SJouni Malinen 		u8 keepalive;
698ff0b0075SJouni Malinen 		u8 disc_timeout;
699bdf5396bSKalle Valo 	} debug;
700bdf5396bSKalle Valo #endif /* CONFIG_ATH6KL_DEBUG */
701bdcd8170SKalle Valo };
702bdcd8170SKalle Valo 
703d6d5c06cSKalle Valo static inline struct ath6kl *ath6kl_priv(struct net_device *dev)
704bdcd8170SKalle Valo {
705108438bcSVasanthakumar Thiagarajan 	return ((struct ath6kl_vif *) netdev_priv(dev))->ar;
706bdcd8170SKalle Valo }
707bdcd8170SKalle Valo 
708bc07ddb2SKalle Valo static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
709bc07ddb2SKalle Valo 					  u32 item_offset)
710bc07ddb2SKalle Valo {
711bc07ddb2SKalle Valo 	u32 addr = 0;
712bc07ddb2SKalle Valo 
713bc07ddb2SKalle Valo 	if (ar->target_type == TARGET_TYPE_AR6003)
714bc07ddb2SKalle Valo 		addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
715bc07ddb2SKalle Valo 	else if (ar->target_type == TARGET_TYPE_AR6004)
716bc07ddb2SKalle Valo 		addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
717bc07ddb2SKalle Valo 
718bc07ddb2SKalle Valo 	return addr;
719bc07ddb2SKalle Valo }
720bc07ddb2SKalle Valo 
721bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar);
722bdcd8170SKalle Valo void ath6kl_detect_error(unsigned long ptr);
723bdcd8170SKalle Valo void disconnect_timer_handler(unsigned long ptr);
724bdcd8170SKalle Valo void init_netdev(struct net_device *dev);
725bdcd8170SKalle Valo void ath6kl_cookie_init(struct ath6kl *ar);
726bdcd8170SKalle Valo void ath6kl_cookie_cleanup(struct ath6kl *ar);
727bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet);
728bdcd8170SKalle Valo void ath6kl_tx_complete(void *context, struct list_head *packet_queue);
729bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
730bdcd8170SKalle Valo 					       struct htc_packet *packet);
731bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar);
732bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar);
733f9ea0753SVasanthakumar Thiagarajan int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value);
734addb44beSKalle Valo int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length);
735addb44beSKalle Valo int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value);
736addb44beSKalle Valo int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length);
737bc07ddb2SKalle Valo int ath6kl_read_fwlogs(struct ath6kl *ar);
738e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif);
739bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar);
740bdcd8170SKalle Valo 
741bdcd8170SKalle Valo struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar);
742bdcd8170SKalle Valo void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie);
743bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev);
744bdcd8170SKalle Valo 
7457baef812SVasanthakumar Thiagarajan struct aggr_info *aggr_init(struct ath6kl_vif *vif);
746c8651541SVasanthakumar Thiagarajan void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info,
747c8651541SVasanthakumar Thiagarajan 		    struct aggr_info_conn *aggr_conn);
748bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target,
749bdcd8170SKalle Valo 		      enum htc_endpoint_id endpoint);
750bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count);
751bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
752bdcd8170SKalle Valo 					    enum htc_endpoint_id endpoint,
753bdcd8170SKalle Valo 					    int len);
754bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info);
7551d2a4456SVasanthakumar Thiagarajan void aggr_reset_state(struct aggr_info_conn *aggr_conn);
756bdcd8170SKalle Valo 
7576765d0aaSVasanthakumar Thiagarajan struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 * node_addr);
758bdcd8170SKalle Valo struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid);
759bdcd8170SKalle Valo 
760bdcd8170SKalle Valo void ath6kl_ready_event(void *devt, u8 * datap, u32 sw_ver, u32 abi_ver);
761bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb,
762bdcd8170SKalle Valo 		      enum htc_endpoint_id eid);
763240d2799SVasanthakumar Thiagarajan void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel,
764bdcd8170SKalle Valo 			  u8 *bssid, u16 listen_int,
765bdcd8170SKalle Valo 			  u16 beacon_int, enum network_type net_type,
766bdcd8170SKalle Valo 			  u8 beacon_ie_len, u8 assoc_req_len,
767bdcd8170SKalle Valo 			  u8 assoc_resp_len, u8 *assoc_info);
768240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel);
769240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr,
770572e27c0SJouni Malinen 				u8 keymgmt, u8 ucipher, u8 auth,
771c1762a3fSThirumalai Pachamuthu 				u8 assoc_req_len, u8 *assoc_info, u8 apsd_info);
772240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason,
773bdcd8170SKalle Valo 			     u8 *bssid, u8 assoc_resp_len,
774bdcd8170SKalle Valo 			     u8 *assoc_info, u16 prot_reason_status);
775240d2799SVasanthakumar Thiagarajan void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast);
776bdcd8170SKalle Valo void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr);
777240d2799SVasanthakumar Thiagarajan void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status);
778240d2799SVasanthakumar Thiagarajan void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len);
779bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active);
780bdcd8170SKalle Valo enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac);
781bdcd8170SKalle Valo 
782240d2799SVasanthakumar Thiagarajan void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid);
783bdcd8170SKalle Valo 
784240d2799SVasanthakumar Thiagarajan void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif);
785240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect(struct ath6kl_vif *vif);
786240d2799SVasanthakumar Thiagarajan void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid);
787240d2799SVasanthakumar Thiagarajan void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no,
788bdcd8170SKalle Valo 			     u8 win_sz);
789bdcd8170SKalle Valo void ath6kl_wakeup_event(void *dev);
790bdcd8170SKalle Valo 
7916db8fa53SVasanthakumar Thiagarajan void ath6kl_reset_device(struct ath6kl *ar, u32 target_type,
7926db8fa53SVasanthakumar Thiagarajan 			 bool wait_fot_compltn, bool cold_reset);
793e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif);
794990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar);
79555055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready);
7965fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar);
7975fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar);
79845eaa78fSKalle Valo int ath6kl_init_fetch_firmwares(struct ath6kl *ar);
79945eaa78fSKalle Valo int ath6kl_init_hw_params(struct ath6kl *ar);
80045eaa78fSKalle Valo 
801a918fb3cSRaja Mani void ath6kl_check_wow_status(struct ath6kl *ar);
8025fe4dffbSKalle Valo 
80345eaa78fSKalle Valo struct ath6kl *ath6kl_core_create(struct device *dev);
80445eaa78fSKalle Valo int ath6kl_core_init(struct ath6kl *ar);
80545eaa78fSKalle Valo void ath6kl_core_cleanup(struct ath6kl *ar);
80645eaa78fSKalle Valo void ath6kl_core_destroy(struct ath6kl *ar);
80745eaa78fSKalle Valo 
808bdcd8170SKalle Valo #endif /* CORE_H */
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