1bdcd8170SKalle Valo /* 2bdcd8170SKalle Valo * Copyright (c) 2010-2011 Atheros Communications Inc. 3bdcd8170SKalle Valo * 4bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 5bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 6bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 7bdcd8170SKalle Valo * 8bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15bdcd8170SKalle Valo */ 16bdcd8170SKalle Valo 17bdcd8170SKalle Valo #ifndef CORE_H 18bdcd8170SKalle Valo #define CORE_H 19bdcd8170SKalle Valo 20bdcd8170SKalle Valo #include <linux/etherdevice.h> 21bdcd8170SKalle Valo #include <linux/rtnetlink.h> 22bdcd8170SKalle Valo #include <linux/firmware.h> 23bdcd8170SKalle Valo #include <linux/sched.h> 24bdf5396bSKalle Valo #include <linux/circ_buf.h> 25bdcd8170SKalle Valo #include <net/cfg80211.h> 26bdcd8170SKalle Valo #include "htc.h" 27bdcd8170SKalle Valo #include "wmi.h" 28bdcd8170SKalle Valo #include "bmi.h" 29bc07ddb2SKalle Valo #include "target.h" 30bdcd8170SKalle Valo 31bdcd8170SKalle Valo #define MAX_ATH6KL 1 32bdcd8170SKalle Valo #define ATH6KL_MAX_RX_BUFFERS 16 33bdcd8170SKalle Valo #define ATH6KL_BUFFER_SIZE 1664 34bdcd8170SKalle Valo #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4 35bdcd8170SKalle Valo #define ATH6KL_AMSDU_REFILL_THRESHOLD 3 36bdcd8170SKalle Valo #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128) 37bdcd8170SKalle Valo #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508 38bdcd8170SKalle Valo #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46 39bdcd8170SKalle Valo 40bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_INIT 0 41bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_RUN 1 42bdcd8170SKalle Valo 43bdcd8170SKalle Valo #define ATH6KL_TX_TIMEOUT 10 44bdcd8170SKalle Valo #define ATH6KL_MAX_ENDPOINTS 4 45bdcd8170SKalle Valo #define MAX_NODE_NUM 15 46bdcd8170SKalle Valo 471df94a85SVasanthakumar Thiagarajan /* Extra bytes for htc header alignment */ 481df94a85SVasanthakumar Thiagarajan #define ATH6KL_HTC_ALIGN_BYTES 3 491df94a85SVasanthakumar Thiagarajan 50bdcd8170SKalle Valo /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */ 51bdcd8170SKalle Valo #define MAX_DEF_COOKIE_NUM 180 52bdcd8170SKalle Valo #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */ 53bdcd8170SKalle Valo #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM) 54bdcd8170SKalle Valo 55bdcd8170SKalle Valo #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC) 56bdcd8170SKalle Valo 57bdcd8170SKalle Valo #define DISCON_TIMER_INTVAL 10000 /* in msec */ 58bdcd8170SKalle Valo #define A_DEFAULT_LISTEN_INTERVAL 100 59bdcd8170SKalle Valo #define A_MAX_WOW_LISTEN_INTERVAL 1000 60bdcd8170SKalle Valo 6150d41234SKalle Valo /* includes also the null byte */ 6250d41234SKalle Valo #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL" 6350d41234SKalle Valo 6450d41234SKalle Valo enum ath6kl_fw_ie_type { 6550d41234SKalle Valo ATH6KL_FW_IE_FW_VERSION = 0, 6650d41234SKalle Valo ATH6KL_FW_IE_TIMESTAMP = 1, 6750d41234SKalle Valo ATH6KL_FW_IE_OTP_IMAGE = 2, 6850d41234SKalle Valo ATH6KL_FW_IE_FW_IMAGE = 3, 6950d41234SKalle Valo ATH6KL_FW_IE_PATCH_IMAGE = 4, 708a137480SKalle Valo ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5, 7197e0496dSKalle Valo ATH6KL_FW_IE_CAPABILITIES = 6, 721b4304daSKalle Valo ATH6KL_FW_IE_PATCH_ADDR = 7, 7303ef0250SKalle Valo ATH6KL_FW_IE_BOARD_ADDR = 8, 74368b1b0fSKalle Valo ATH6KL_FW_IE_VIF_MAX = 9, 7550d41234SKalle Valo }; 7650d41234SKalle Valo 7797e0496dSKalle Valo enum ath6kl_fw_capability { 7897e0496dSKalle Valo ATH6KL_FW_CAPABILITY_HOST_P2P = 0, 7910509f90SKalle Valo ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1, 8097e0496dSKalle Valo 813ca9d1fcSAarthi Thiruvengadam /* 823ca9d1fcSAarthi Thiruvengadam * Firmware is capable of supporting P2P mgmt operations on a 833ca9d1fcSAarthi Thiruvengadam * station interface. After group formation, the station 843ca9d1fcSAarthi Thiruvengadam * interface will become a P2P client/GO interface as the case may be 853ca9d1fcSAarthi Thiruvengadam */ 863ca9d1fcSAarthi Thiruvengadam ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, 873ca9d1fcSAarthi Thiruvengadam 8897e0496dSKalle Valo /* this needs to be last */ 8997e0496dSKalle Valo ATH6KL_FW_CAPABILITY_MAX, 9097e0496dSKalle Valo }; 9197e0496dSKalle Valo 9297e0496dSKalle Valo #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32) 9397e0496dSKalle Valo 9450d41234SKalle Valo struct ath6kl_fw_ie { 9550d41234SKalle Valo __le32 id; 9650d41234SKalle Valo __le32 len; 9750d41234SKalle Valo u8 data[0]; 9850d41234SKalle Valo }; 9950d41234SKalle Valo 100c0038972SKalle Valo #define ATH6KL_FW_API2_FILE "fw-2.bin" 101c0038972SKalle Valo 102bdcd8170SKalle Valo /* AR6003 1.0 definitions */ 1030d0192baSKalle Valo #define AR6003_HW_1_0_VERSION 0x300002ba 104bdcd8170SKalle Valo 105bdcd8170SKalle Valo /* AR6003 2.0 definitions */ 1060d0192baSKalle Valo #define AR6003_HW_2_0_VERSION 0x30000384 1070d0192baSKalle Valo #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910 108c0038972SKalle Valo #define AR6003_HW_2_0_FW_DIR "ath6k/AR6003/hw2.0" 109c0038972SKalle Valo #define AR6003_HW_2_0_OTP_FILE "otp.bin.z77" 110c0038972SKalle Valo #define AR6003_HW_2_0_FIRMWARE_FILE "athwlan.bin.z77" 111c0038972SKalle Valo #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "athtcmd_ram.bin" 112c0038972SKalle Valo #define AR6003_HW_2_0_PATCH_FILE "data.patch.bin" 1130d0192baSKalle Valo #define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin" 1140d0192baSKalle Valo #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \ 1150d0192baSKalle Valo "ath6k/AR6003/hw2.0/bdata.SD31.bin" 116bdcd8170SKalle Valo 117bdcd8170SKalle Valo /* AR6003 3.0 definitions */ 1180d0192baSKalle Valo #define AR6003_HW_2_1_1_VERSION 0x30000582 119c0038972SKalle Valo #define AR6003_HW_2_1_1_FW_DIR "ath6k/AR6003/hw2.1.1" 120c0038972SKalle Valo #define AR6003_HW_2_1_1_OTP_FILE "otp.bin" 121c0038972SKalle Valo #define AR6003_HW_2_1_1_FIRMWARE_FILE "athwlan.bin" 122c0038972SKalle Valo #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE "athtcmd_ram.bin" 123c0038972SKalle Valo #define AR6003_HW_2_1_1_PATCH_FILE "data.patch.bin" 1240d0192baSKalle Valo #define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin" 1250d0192baSKalle Valo #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \ 126bdcd8170SKalle Valo "ath6k/AR6003/hw2.1.1/bdata.SD31.bin" 127bdcd8170SKalle Valo 12831024d99SKevin Fang /* AR6004 1.0 definitions */ 1290d0192baSKalle Valo #define AR6004_HW_1_0_VERSION 0x30000623 130c0038972SKalle Valo #define AR6004_HW_1_0_FW_DIR "ath6k/AR6004/hw1.0" 131c0038972SKalle Valo #define AR6004_HW_1_0_FIRMWARE_FILE "fw.ram.bin" 1320d0192baSKalle Valo #define AR6004_HW_1_0_BOARD_DATA_FILE "ath6k/AR6004/hw1.0/bdata.bin" 1330d0192baSKalle Valo #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \ 134d5720e59SKalle Valo "ath6k/AR6004/hw1.0/bdata.DB132.bin" 135d5720e59SKalle Valo 136d5720e59SKalle Valo /* AR6004 1.1 definitions */ 1370d0192baSKalle Valo #define AR6004_HW_1_1_VERSION 0x30000001 138c0038972SKalle Valo #define AR6004_HW_1_1_FW_DIR "ath6k/AR6004/hw1.1" 139c0038972SKalle Valo #define AR6004_HW_1_1_FIRMWARE_FILE "fw.ram.bin" 1400d0192baSKalle Valo #define AR6004_HW_1_1_BOARD_DATA_FILE "ath6k/AR6004/hw1.1/bdata.bin" 1410d0192baSKalle Valo #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \ 142d5720e59SKalle Valo "ath6k/AR6004/hw1.1/bdata.DB132.bin" 14331024d99SKevin Fang 144bdcd8170SKalle Valo /* Per STA data, used in AP mode */ 145bdcd8170SKalle Valo #define STA_PS_AWAKE BIT(0) 146bdcd8170SKalle Valo #define STA_PS_SLEEP BIT(1) 147bdcd8170SKalle Valo #define STA_PS_POLLED BIT(2) 148bdcd8170SKalle Valo 149bdcd8170SKalle Valo /* HTC TX packet tagging definitions */ 150bdcd8170SKalle Valo #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED 151bdcd8170SKalle Valo #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1) 152bdcd8170SKalle Valo 153bdcd8170SKalle Valo #define AR6003_CUST_DATA_SIZE 16 154bdcd8170SKalle Valo 155bdcd8170SKalle Valo #define AGGR_WIN_IDX(x, y) ((x) % (y)) 156bdcd8170SKalle Valo #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y)) 157bdcd8170SKalle Valo #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y)) 158bdcd8170SKalle Valo #define ATH6KL_MAX_SEQ_NO 0xFFF 159bdcd8170SKalle Valo #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO) 160bdcd8170SKalle Valo 161bdcd8170SKalle Valo #define NUM_OF_TIDS 8 162bdcd8170SKalle Valo #define AGGR_SZ_DEFAULT 8 163bdcd8170SKalle Valo 164bdcd8170SKalle Valo #define AGGR_WIN_SZ_MIN 2 165bdcd8170SKalle Valo #define AGGR_WIN_SZ_MAX 8 166bdcd8170SKalle Valo 167bdcd8170SKalle Valo #define TID_WINDOW_SZ(_x) ((_x) << 1) 168bdcd8170SKalle Valo 169bdcd8170SKalle Valo #define AGGR_NUM_OF_FREE_NETBUFS 16 170bdcd8170SKalle Valo 171bdcd8170SKalle Valo #define AGGR_RX_TIMEOUT 400 /* in ms */ 172bdcd8170SKalle Valo 173bdcd8170SKalle Valo #define WMI_TIMEOUT (2 * HZ) 174bdcd8170SKalle Valo 175bdcd8170SKalle Valo #define MBOX_YIELD_LIMIT 99 176bdcd8170SKalle Valo 177bdcd8170SKalle Valo /* configuration lags */ 178bdcd8170SKalle Valo /* 179bdcd8170SKalle Valo * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in 180bdcd8170SKalle Valo * ERP IE of beacon to determine the short premable support when 181bdcd8170SKalle Valo * sending (Re)Assoc req. 182bdcd8170SKalle Valo * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power 183bdcd8170SKalle Valo * module state transition failure events which happen during 184bdcd8170SKalle Valo * scan, to the host. 185bdcd8170SKalle Valo */ 186bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0) 187bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1) 188bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_11N BIT(2) 189bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3) 1908277de15SKalle Valo #define ATH6KL_CONF_SUSPEND_CUTPOWER BIT(4) 191bdcd8170SKalle Valo 192bdcd8170SKalle Valo enum wlan_low_pwr_state { 193bdcd8170SKalle Valo WLAN_POWER_STATE_ON, 194bdcd8170SKalle Valo WLAN_POWER_STATE_CUT_PWR, 195bdcd8170SKalle Valo WLAN_POWER_STATE_DEEP_SLEEP, 196bdcd8170SKalle Valo WLAN_POWER_STATE_WOW 197bdcd8170SKalle Valo }; 198bdcd8170SKalle Valo 199bdcd8170SKalle Valo enum sme_state { 200bdcd8170SKalle Valo SME_DISCONNECTED, 201bdcd8170SKalle Valo SME_CONNECTING, 202bdcd8170SKalle Valo SME_CONNECTED 203bdcd8170SKalle Valo }; 204bdcd8170SKalle Valo 205bdcd8170SKalle Valo struct skb_hold_q { 206bdcd8170SKalle Valo struct sk_buff *skb; 207bdcd8170SKalle Valo bool is_amsdu; 208bdcd8170SKalle Valo u16 seq_no; 209bdcd8170SKalle Valo }; 210bdcd8170SKalle Valo 211bdcd8170SKalle Valo struct rxtid { 212bdcd8170SKalle Valo bool aggr; 213bdcd8170SKalle Valo bool progress; 214bdcd8170SKalle Valo bool timer_mon; 215bdcd8170SKalle Valo u16 win_sz; 216bdcd8170SKalle Valo u16 seq_next; 217bdcd8170SKalle Valo u32 hold_q_sz; 218bdcd8170SKalle Valo struct skb_hold_q *hold_q; 219bdcd8170SKalle Valo struct sk_buff_head q; 220bdcd8170SKalle Valo spinlock_t lock; 221bdcd8170SKalle Valo }; 222bdcd8170SKalle Valo 223bdcd8170SKalle Valo struct rxtid_stats { 224bdcd8170SKalle Valo u32 num_into_aggr; 225bdcd8170SKalle Valo u32 num_dups; 226bdcd8170SKalle Valo u32 num_oow; 227bdcd8170SKalle Valo u32 num_mpdu; 228bdcd8170SKalle Valo u32 num_amsdu; 229bdcd8170SKalle Valo u32 num_delivered; 230bdcd8170SKalle Valo u32 num_timeouts; 231bdcd8170SKalle Valo u32 num_hole; 232bdcd8170SKalle Valo u32 num_bar; 233bdcd8170SKalle Valo }; 234bdcd8170SKalle Valo 235bdcd8170SKalle Valo struct aggr_info { 236bdcd8170SKalle Valo u8 aggr_sz; 237bdcd8170SKalle Valo u8 timer_scheduled; 238bdcd8170SKalle Valo struct timer_list timer; 239bdcd8170SKalle Valo struct net_device *dev; 240bdcd8170SKalle Valo struct rxtid rx_tid[NUM_OF_TIDS]; 241bdcd8170SKalle Valo struct sk_buff_head free_q; 242bdcd8170SKalle Valo struct rxtid_stats stat[NUM_OF_TIDS]; 243bdcd8170SKalle Valo }; 244bdcd8170SKalle Valo 245bdcd8170SKalle Valo struct ath6kl_wep_key { 246bdcd8170SKalle Valo u8 key_index; 247bdcd8170SKalle Valo u8 key_len; 248bdcd8170SKalle Valo u8 key[64]; 249bdcd8170SKalle Valo }; 250bdcd8170SKalle Valo 251bdcd8170SKalle Valo #define ATH6KL_KEY_SEQ_LEN 8 252bdcd8170SKalle Valo 253bdcd8170SKalle Valo struct ath6kl_key { 254bdcd8170SKalle Valo u8 key[WLAN_MAX_KEY_LEN]; 255bdcd8170SKalle Valo u8 key_len; 256bdcd8170SKalle Valo u8 seq[ATH6KL_KEY_SEQ_LEN]; 257bdcd8170SKalle Valo u8 seq_len; 258bdcd8170SKalle Valo u32 cipher; 259bdcd8170SKalle Valo }; 260bdcd8170SKalle Valo 261bdcd8170SKalle Valo struct ath6kl_node_mapping { 262bdcd8170SKalle Valo u8 mac_addr[ETH_ALEN]; 263bdcd8170SKalle Valo u8 ep_id; 264bdcd8170SKalle Valo u8 tx_pend; 265bdcd8170SKalle Valo }; 266bdcd8170SKalle Valo 267bdcd8170SKalle Valo struct ath6kl_cookie { 268bdcd8170SKalle Valo struct sk_buff *skb; 269bdcd8170SKalle Valo u32 map_no; 270bdcd8170SKalle Valo struct htc_packet htc_pkt; 271bdcd8170SKalle Valo struct ath6kl_cookie *arc_list_next; 272bdcd8170SKalle Valo }; 273bdcd8170SKalle Valo 274bdcd8170SKalle Valo struct ath6kl_sta { 275bdcd8170SKalle Valo u16 sta_flags; 276bdcd8170SKalle Valo u8 mac[ETH_ALEN]; 277bdcd8170SKalle Valo u8 aid; 278bdcd8170SKalle Valo u8 keymgmt; 279bdcd8170SKalle Valo u8 ucipher; 280bdcd8170SKalle Valo u8 auth; 281bdcd8170SKalle Valo u8 wpa_ie[ATH6KL_MAX_IE]; 282bdcd8170SKalle Valo struct sk_buff_head psq; 283bdcd8170SKalle Valo spinlock_t psq_lock; 284bdcd8170SKalle Valo }; 285bdcd8170SKalle Valo 286bdcd8170SKalle Valo struct ath6kl_version { 287bdcd8170SKalle Valo u32 target_ver; 288bdcd8170SKalle Valo u32 wlan_ver; 289bdcd8170SKalle Valo u32 abi_ver; 290bdcd8170SKalle Valo }; 291bdcd8170SKalle Valo 292bdcd8170SKalle Valo struct ath6kl_bmi { 293bdcd8170SKalle Valo u32 cmd_credits; 294bdcd8170SKalle Valo bool done_sent; 295bdcd8170SKalle Valo u8 *cmd_buf; 2961f4c894dSKalle Valo u32 max_data_size; 2971f4c894dSKalle Valo u32 max_cmd_size; 298bdcd8170SKalle Valo }; 299bdcd8170SKalle Valo 300bdcd8170SKalle Valo struct target_stats { 301bdcd8170SKalle Valo u64 tx_pkt; 302bdcd8170SKalle Valo u64 tx_byte; 303bdcd8170SKalle Valo u64 tx_ucast_pkt; 304bdcd8170SKalle Valo u64 tx_ucast_byte; 305bdcd8170SKalle Valo u64 tx_mcast_pkt; 306bdcd8170SKalle Valo u64 tx_mcast_byte; 307bdcd8170SKalle Valo u64 tx_bcast_pkt; 308bdcd8170SKalle Valo u64 tx_bcast_byte; 309bdcd8170SKalle Valo u64 tx_rts_success_cnt; 310bdcd8170SKalle Valo u64 tx_pkt_per_ac[4]; 311bdcd8170SKalle Valo 312bdcd8170SKalle Valo u64 tx_err; 313bdcd8170SKalle Valo u64 tx_fail_cnt; 314bdcd8170SKalle Valo u64 tx_retry_cnt; 315bdcd8170SKalle Valo u64 tx_mult_retry_cnt; 316bdcd8170SKalle Valo u64 tx_rts_fail_cnt; 317bdcd8170SKalle Valo 318bdcd8170SKalle Valo u64 rx_pkt; 319bdcd8170SKalle Valo u64 rx_byte; 320bdcd8170SKalle Valo u64 rx_ucast_pkt; 321bdcd8170SKalle Valo u64 rx_ucast_byte; 322bdcd8170SKalle Valo u64 rx_mcast_pkt; 323bdcd8170SKalle Valo u64 rx_mcast_byte; 324bdcd8170SKalle Valo u64 rx_bcast_pkt; 325bdcd8170SKalle Valo u64 rx_bcast_byte; 326bdcd8170SKalle Valo u64 rx_frgment_pkt; 327bdcd8170SKalle Valo 328bdcd8170SKalle Valo u64 rx_err; 329bdcd8170SKalle Valo u64 rx_crc_err; 330bdcd8170SKalle Valo u64 rx_key_cache_miss; 331bdcd8170SKalle Valo u64 rx_decrypt_err; 332bdcd8170SKalle Valo u64 rx_dupl_frame; 333bdcd8170SKalle Valo 334bdcd8170SKalle Valo u64 tkip_local_mic_fail; 335bdcd8170SKalle Valo u64 tkip_cnter_measures_invoked; 336bdcd8170SKalle Valo u64 tkip_replays; 337bdcd8170SKalle Valo u64 tkip_fmt_err; 338bdcd8170SKalle Valo u64 ccmp_fmt_err; 339bdcd8170SKalle Valo u64 ccmp_replays; 340bdcd8170SKalle Valo 341bdcd8170SKalle Valo u64 pwr_save_fail_cnt; 342bdcd8170SKalle Valo 343bdcd8170SKalle Valo u64 cs_bmiss_cnt; 344bdcd8170SKalle Valo u64 cs_low_rssi_cnt; 345bdcd8170SKalle Valo u64 cs_connect_cnt; 346bdcd8170SKalle Valo u64 cs_discon_cnt; 347bdcd8170SKalle Valo 348bdcd8170SKalle Valo s32 tx_ucast_rate; 349bdcd8170SKalle Valo s32 rx_ucast_rate; 350bdcd8170SKalle Valo 351bdcd8170SKalle Valo u32 lq_val; 352bdcd8170SKalle Valo 353bdcd8170SKalle Valo u32 wow_pkt_dropped; 354bdcd8170SKalle Valo u16 wow_evt_discarded; 355bdcd8170SKalle Valo 356bdcd8170SKalle Valo s16 noise_floor_calib; 357bdcd8170SKalle Valo s16 cs_rssi; 358bdcd8170SKalle Valo s16 cs_ave_beacon_rssi; 359bdcd8170SKalle Valo u8 cs_ave_beacon_snr; 360bdcd8170SKalle Valo u8 cs_last_roam_msec; 361bdcd8170SKalle Valo u8 cs_snr; 362bdcd8170SKalle Valo 363bdcd8170SKalle Valo u8 wow_host_pkt_wakeups; 364bdcd8170SKalle Valo u8 wow_host_evt_wakeups; 365bdcd8170SKalle Valo 366bdcd8170SKalle Valo u32 arp_received; 367bdcd8170SKalle Valo u32 arp_matched; 368bdcd8170SKalle Valo u32 arp_replied; 369bdcd8170SKalle Valo }; 370bdcd8170SKalle Valo 371bdcd8170SKalle Valo struct ath6kl_mbox_info { 372bdcd8170SKalle Valo u32 htc_addr; 373bdcd8170SKalle Valo u32 htc_ext_addr; 374bdcd8170SKalle Valo u32 htc_ext_sz; 375bdcd8170SKalle Valo 376bdcd8170SKalle Valo u32 block_size; 377bdcd8170SKalle Valo 378bdcd8170SKalle Valo u32 gmbox_addr; 379bdcd8170SKalle Valo 380bdcd8170SKalle Valo u32 gmbox_sz; 381bdcd8170SKalle Valo }; 382bdcd8170SKalle Valo 383bdcd8170SKalle Valo /* 384bdcd8170SKalle Valo * 802.11i defines an extended IV for use with non-WEP ciphers. 385bdcd8170SKalle Valo * When the EXTIV bit is set in the key id byte an additional 386bdcd8170SKalle Valo * 4 bytes immediately follow the IV for TKIP. For CCMP the 387bdcd8170SKalle Valo * EXTIV bit is likewise set but the 8 bytes represent the 388bdcd8170SKalle Valo * CCMP header rather than IV+extended-IV. 389bdcd8170SKalle Valo */ 390bdcd8170SKalle Valo 391bdcd8170SKalle Valo #define ATH6KL_KEYBUF_SIZE 16 392bdcd8170SKalle Valo #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */ 393bdcd8170SKalle Valo 394bdcd8170SKalle Valo #define ATH6KL_KEY_XMIT 0x01 395bdcd8170SKalle Valo #define ATH6KL_KEY_RECV 0x02 396bdcd8170SKalle Valo #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */ 397bdcd8170SKalle Valo 3989a5b1318SJouni Malinen /* Initial group key for AP mode */ 399bdcd8170SKalle Valo struct ath6kl_req_key { 4009a5b1318SJouni Malinen bool valid; 4019a5b1318SJouni Malinen u8 key_index; 4029a5b1318SJouni Malinen int key_type; 4039a5b1318SJouni Malinen u8 key[WLAN_MAX_KEY_LEN]; 4049a5b1318SJouni Malinen u8 key_len; 405bdcd8170SKalle Valo }; 406bdcd8170SKalle Valo 40777eab1e9SKalle Valo enum ath6kl_hif_type { 40877eab1e9SKalle Valo ATH6KL_HIF_TYPE_SDIO, 40977eab1e9SKalle Valo ATH6KL_HIF_TYPE_USB, 41077eab1e9SKalle Valo }; 41177eab1e9SKalle Valo 41271f96ee6SKalle Valo /* 41371f96ee6SKalle Valo * Driver's maximum limit, note that some firmwares support only one vif 41471f96ee6SKalle Valo * and the runtime (current) limit must be checked from ar->vif_max. 41571f96ee6SKalle Valo */ 416b64de356SVasanthakumar Thiagarajan #define ATH6KL_VIF_MAX 3 417334234b5SVasanthakumar Thiagarajan 41859c98449SVasanthakumar Thiagarajan /* vif flags info */ 41959c98449SVasanthakumar Thiagarajan enum ath6kl_vif_state { 42059c98449SVasanthakumar Thiagarajan CONNECTED, 42159c98449SVasanthakumar Thiagarajan CONNECT_PEND, 42259c98449SVasanthakumar Thiagarajan WMM_ENABLED, 42359c98449SVasanthakumar Thiagarajan NETQ_STOPPED, 42459c98449SVasanthakumar Thiagarajan DTIM_EXPIRED, 42559c98449SVasanthakumar Thiagarajan NETDEV_REGISTERED, 42659c98449SVasanthakumar Thiagarajan CLEAR_BSSFILTER_ON_BEACON, 42759c98449SVasanthakumar Thiagarajan DTIM_PERIOD_AVAIL, 42859c98449SVasanthakumar Thiagarajan WLAN_ENABLED, 429b95907a7SVasanthakumar Thiagarajan STATS_UPDATE_PEND, 43059c98449SVasanthakumar Thiagarajan }; 43159c98449SVasanthakumar Thiagarajan 432108438bcSVasanthakumar Thiagarajan struct ath6kl_vif { 433990bd915SVasanthakumar Thiagarajan struct list_head list; 434108438bcSVasanthakumar Thiagarajan struct wireless_dev wdev; 435108438bcSVasanthakumar Thiagarajan struct net_device *ndev; 436108438bcSVasanthakumar Thiagarajan struct ath6kl *ar; 437478ac027SVasanthakumar Thiagarajan /* Lock to protect vif specific net_stats and flags */ 438478ac027SVasanthakumar Thiagarajan spinlock_t if_lock; 439334234b5SVasanthakumar Thiagarajan u8 fw_vif_idx; 44059c98449SVasanthakumar Thiagarajan unsigned long flags; 4413450334fSVasanthakumar Thiagarajan int ssid_len; 4423450334fSVasanthakumar Thiagarajan u8 ssid[IEEE80211_MAX_SSID_LEN]; 4433450334fSVasanthakumar Thiagarajan u8 dot11_auth_mode; 4443450334fSVasanthakumar Thiagarajan u8 auth_mode; 4453450334fSVasanthakumar Thiagarajan u8 prwise_crypto; 4463450334fSVasanthakumar Thiagarajan u8 prwise_crypto_len; 4473450334fSVasanthakumar Thiagarajan u8 grp_crypto; 4483450334fSVasanthakumar Thiagarajan u8 grp_crypto_len; 4493450334fSVasanthakumar Thiagarajan u8 def_txkey_index; 450f5938f24SVasanthakumar Thiagarajan u8 next_mode; 451f5938f24SVasanthakumar Thiagarajan u8 nw_type; 4528c8b65e3SVasanthakumar Thiagarajan u8 bssid[ETH_ALEN]; 4538c8b65e3SVasanthakumar Thiagarajan u8 req_bssid[ETH_ALEN]; 454f74bac54SVasanthakumar Thiagarajan u16 ch_hint; 455f74bac54SVasanthakumar Thiagarajan u16 bss_ch; 4566f2a73f9SVasanthakumar Thiagarajan struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1]; 4576f2a73f9SVasanthakumar Thiagarajan struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1]; 4582132c69cSVasanthakumar Thiagarajan struct aggr_info *aggr_cntxt; 45910509f90SKalle Valo 460de3ad713SVasanthakumar Thiagarajan struct timer_list disconnect_timer; 46110509f90SKalle Valo struct timer_list sched_scan_timer; 46210509f90SKalle Valo 46314ee6f6bSVasanthakumar Thiagarajan struct cfg80211_scan_request *scan_req; 46414ee6f6bSVasanthakumar Thiagarajan enum sme_state sme_state; 465cf5333d7SVasanthakumar Thiagarajan int reconnect_flag; 4661052261eSJouni Malinen u32 last_roc_id; 4671052261eSJouni Malinen u32 last_cancel_roc_id; 468cf5333d7SVasanthakumar Thiagarajan u32 send_action_id; 469cf5333d7SVasanthakumar Thiagarajan bool probe_req_report; 470cf5333d7SVasanthakumar Thiagarajan u16 next_chan; 471cf5333d7SVasanthakumar Thiagarajan u16 assoc_bss_beacon_int; 472cf5333d7SVasanthakumar Thiagarajan u8 assoc_bss_dtim_period; 473b95907a7SVasanthakumar Thiagarajan struct net_device_stats net_stats; 474b95907a7SVasanthakumar Thiagarajan struct target_stats target_stats; 475108438bcSVasanthakumar Thiagarajan }; 476108438bcSVasanthakumar Thiagarajan 4776cb3c714SRaja Mani #define WOW_LIST_ID 0 4786cb3c714SRaja Mani #define WOW_HOST_REQ_DELAY 500 /* ms */ 4796cb3c714SRaja Mani 48010509f90SKalle Valo #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */ 48110509f90SKalle Valo 482bdcd8170SKalle Valo /* Flag info */ 48359c98449SVasanthakumar Thiagarajan enum ath6kl_dev_state { 48459c98449SVasanthakumar Thiagarajan WMI_ENABLED, 48559c98449SVasanthakumar Thiagarajan WMI_READY, 48659c98449SVasanthakumar Thiagarajan WMI_CTRL_EP_FULL, 48759c98449SVasanthakumar Thiagarajan TESTMODE, 48859c98449SVasanthakumar Thiagarajan DESTROY_IN_PROGRESS, 48959c98449SVasanthakumar Thiagarajan SKIP_SCAN, 49059c98449SVasanthakumar Thiagarajan ROAM_TBL_PEND, 4915fe4dffbSKalle Valo FIRST_BOOT, 49259c98449SVasanthakumar Thiagarajan }; 493bdcd8170SKalle Valo 49476a9fbe2SKalle Valo enum ath6kl_state { 49576a9fbe2SKalle Valo ATH6KL_STATE_OFF, 49676a9fbe2SKalle Valo ATH6KL_STATE_ON, 49776a9fbe2SKalle Valo ATH6KL_STATE_DEEPSLEEP, 498b4b2a0b1SKalle Valo ATH6KL_STATE_CUTPOWER, 499dd6c0c63SRaja Mani ATH6KL_STATE_WOW, 50010509f90SKalle Valo ATH6KL_STATE_SCHED_SCAN, 50176a9fbe2SKalle Valo }; 50276a9fbe2SKalle Valo 503bdcd8170SKalle Valo struct ath6kl { 504bdcd8170SKalle Valo struct device *dev; 505be98e3a4SVasanthakumar Thiagarajan struct wiphy *wiphy; 50676a9fbe2SKalle Valo 50776a9fbe2SKalle Valo enum ath6kl_state state; 50876a9fbe2SKalle Valo 509bdcd8170SKalle Valo struct ath6kl_bmi bmi; 510bdcd8170SKalle Valo const struct ath6kl_hif_ops *hif_ops; 511bdcd8170SKalle Valo struct wmi *wmi; 512bdcd8170SKalle Valo int tx_pending[ENDPOINT_MAX]; 513bdcd8170SKalle Valo int total_tx_data_pend; 514bdcd8170SKalle Valo struct htc_target *htc_target; 51577eab1e9SKalle Valo enum ath6kl_hif_type hif_type; 516bdcd8170SKalle Valo void *hif_priv; 517990bd915SVasanthakumar Thiagarajan struct list_head vif_list; 518990bd915SVasanthakumar Thiagarajan /* Lock to avoid race in vif_list entries among add/del/traverse */ 519990bd915SVasanthakumar Thiagarajan spinlock_t list_lock; 52055055976SVasanthakumar Thiagarajan u8 num_vif; 521368b1b0fSKalle Valo unsigned int vif_max; 5223226f68aSVasanthakumar Thiagarajan u8 max_norm_iface; 52355055976SVasanthakumar Thiagarajan u8 avail_idx_map; 524bdcd8170SKalle Valo spinlock_t lock; 525bdcd8170SKalle Valo struct semaphore sem; 526bdcd8170SKalle Valo u16 listen_intvl_b; 527bdcd8170SKalle Valo u16 listen_intvl_t; 528e5090444SVivek Natarajan u8 lrssi_roam_threshold; 529bdcd8170SKalle Valo struct ath6kl_version version; 530bdcd8170SKalle Valo u32 target_type; 531bdcd8170SKalle Valo u8 tx_pwr; 532bdcd8170SKalle Valo struct ath6kl_node_mapping node_map[MAX_NODE_NUM]; 533bdcd8170SKalle Valo u8 ibss_ps_enable; 53455055976SVasanthakumar Thiagarajan bool ibss_if_active; 535bdcd8170SKalle Valo u8 node_num; 536bdcd8170SKalle Valo u8 next_ep_id; 537bdcd8170SKalle Valo struct ath6kl_cookie *cookie_list; 538bdcd8170SKalle Valo u32 cookie_count; 539bdcd8170SKalle Valo enum htc_endpoint_id ac2ep_map[WMM_NUM_AC]; 540bdcd8170SKalle Valo bool ac_stream_active[WMM_NUM_AC]; 541bdcd8170SKalle Valo u8 ac_stream_pri_map[WMM_NUM_AC]; 542bdcd8170SKalle Valo u8 hiac_stream_active_pri; 543bdcd8170SKalle Valo u8 ep2ac_map[ENDPOINT_MAX]; 544bdcd8170SKalle Valo enum htc_endpoint_id ctrl_ep; 5453c370398SKalle Valo struct ath6kl_htc_credit_info credit_state_info; 546bdcd8170SKalle Valo u32 connect_ctrl_flags; 547bdcd8170SKalle Valo u32 user_key_ctrl; 548bdcd8170SKalle Valo u8 usr_bss_filter; 549bdcd8170SKalle Valo struct ath6kl_sta sta_list[AP_MAX_NUM_STA]; 550bdcd8170SKalle Valo u8 sta_list_index; 551bdcd8170SKalle Valo struct ath6kl_req_key ap_mode_bkey; 552bdcd8170SKalle Valo struct sk_buff_head mcastpsq; 553bdcd8170SKalle Valo spinlock_t mcastpsq_lock; 554bdcd8170SKalle Valo u8 intra_bss; 555bdcd8170SKalle Valo struct wmi_ap_mode_stat ap_stats; 556bdcd8170SKalle Valo u8 ap_country_code[3]; 557bdcd8170SKalle Valo struct list_head amsdu_rx_buffer_queue; 558bdcd8170SKalle Valo u8 rx_meta_ver; 559bdcd8170SKalle Valo enum wlan_low_pwr_state wlan_pwr_state; 560d66ea4f9SVasanthakumar Thiagarajan u8 mac_addr[ETH_ALEN]; 561bdcd8170SKalle Valo #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4 562003353b0SKalle Valo struct { 563003353b0SKalle Valo void *rx_report; 564003353b0SKalle Valo size_t rx_report_len; 565003353b0SKalle Valo } tm; 566003353b0SKalle Valo 567856f4b31SKalle Valo struct ath6kl_hw { 568856f4b31SKalle Valo u32 id; 569293badf4SKalle Valo const char *name; 570a01ac414SKalle Valo u32 dataset_patch_addr; 571a01ac414SKalle Valo u32 app_load_addr; 572a01ac414SKalle Valo u32 app_start_override_addr; 573991b27eaSKalle Valo u32 board_ext_data_addr; 574991b27eaSKalle Valo u32 reserved_ram_size; 5750d4d72bfSKalle Valo u32 board_addr; 57639586bf2SRyan Hsu u32 refclk_hz; 57739586bf2SRyan Hsu u32 uarttx_pin; 578d1a9421dSKalle Valo 579c0038972SKalle Valo struct ath6kl_hw_fw { 580c0038972SKalle Valo const char *dir; 581c0038972SKalle Valo const char *otp; 582d1a9421dSKalle Valo const char *fw; 583c0038972SKalle Valo const char *tcmd; 584c0038972SKalle Valo const char *patch; 585c0038972SKalle Valo const char *api2; 586c0038972SKalle Valo } fw; 587c0038972SKalle Valo 588d1a9421dSKalle Valo const char *fw_board; 589d1a9421dSKalle Valo const char *fw_default_board; 590a01ac414SKalle Valo } hw; 591a01ac414SKalle Valo 592bdcd8170SKalle Valo u16 conf_flags; 593bdcd8170SKalle Valo wait_queue_head_t event_wq; 594bdcd8170SKalle Valo struct ath6kl_mbox_info mbox_info; 595bdcd8170SKalle Valo 596bdcd8170SKalle Valo struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM]; 597bdcd8170SKalle Valo unsigned long flag; 598bdcd8170SKalle Valo 599bdcd8170SKalle Valo u8 *fw_board; 600bdcd8170SKalle Valo size_t fw_board_len; 601bdcd8170SKalle Valo 602bdcd8170SKalle Valo u8 *fw_otp; 603bdcd8170SKalle Valo size_t fw_otp_len; 604bdcd8170SKalle Valo 605bdcd8170SKalle Valo u8 *fw; 606bdcd8170SKalle Valo size_t fw_len; 607bdcd8170SKalle Valo 608bdcd8170SKalle Valo u8 *fw_patch; 609bdcd8170SKalle Valo size_t fw_patch_len; 610bdcd8170SKalle Valo 61197e0496dSKalle Valo unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN]; 61297e0496dSKalle Valo 613bdcd8170SKalle Valo struct workqueue_struct *ath6kl_wq; 6147c3075e9SVasanthakumar Thiagarajan 615d999ba3eSVasanthakumar Thiagarajan struct dentry *debugfs_phy; 6166a7c9badSJouni Malinen 6176bbc7c35SJouni Malinen bool p2p; 6186bbc7c35SJouni Malinen 619bdf5396bSKalle Valo #ifdef CONFIG_ATH6KL_DEBUG 620bdf5396bSKalle Valo struct { 621bdf5396bSKalle Valo struct circ_buf fwlog_buf; 622bdf5396bSKalle Valo spinlock_t fwlog_lock; 623bdf5396bSKalle Valo void *fwlog_tmp; 624939f1cceSKalle Valo u32 fwlog_mask; 62591d57de5SVasanthakumar Thiagarajan unsigned int dbgfs_diag_reg; 626252c068bSVasanthakumar Thiagarajan u32 diag_reg_addr_wr; 627252c068bSVasanthakumar Thiagarajan u32 diag_reg_val_wr; 6289a730834SKalle Valo 6299a730834SKalle Valo struct { 6309a730834SKalle Valo unsigned int invalid_rate; 6319a730834SKalle Valo } war_stats; 6324b28a80dSJouni Malinen 6334b28a80dSJouni Malinen u8 *roam_tbl; 6344b28a80dSJouni Malinen unsigned int roam_tbl_len; 635ff0b0075SJouni Malinen 636ff0b0075SJouni Malinen u8 keepalive; 637ff0b0075SJouni Malinen u8 disc_timeout; 638bdf5396bSKalle Valo } debug; 639bdf5396bSKalle Valo #endif /* CONFIG_ATH6KL_DEBUG */ 640bdcd8170SKalle Valo }; 641bdcd8170SKalle Valo 642d6d5c06cSKalle Valo static inline struct ath6kl *ath6kl_priv(struct net_device *dev) 643bdcd8170SKalle Valo { 644108438bcSVasanthakumar Thiagarajan return ((struct ath6kl_vif *) netdev_priv(dev))->ar; 645bdcd8170SKalle Valo } 646bdcd8170SKalle Valo 647bc07ddb2SKalle Valo static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar, 648bc07ddb2SKalle Valo u32 item_offset) 649bc07ddb2SKalle Valo { 650bc07ddb2SKalle Valo u32 addr = 0; 651bc07ddb2SKalle Valo 652bc07ddb2SKalle Valo if (ar->target_type == TARGET_TYPE_AR6003) 653bc07ddb2SKalle Valo addr = ATH6KL_AR6003_HI_START_ADDR + item_offset; 654bc07ddb2SKalle Valo else if (ar->target_type == TARGET_TYPE_AR6004) 655bc07ddb2SKalle Valo addr = ATH6KL_AR6004_HI_START_ADDR + item_offset; 656bc07ddb2SKalle Valo 657bc07ddb2SKalle Valo return addr; 658bc07ddb2SKalle Valo } 659bc07ddb2SKalle Valo 660bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar); 661bdcd8170SKalle Valo void ath6kl_detect_error(unsigned long ptr); 662bdcd8170SKalle Valo void disconnect_timer_handler(unsigned long ptr); 663bdcd8170SKalle Valo void init_netdev(struct net_device *dev); 664bdcd8170SKalle Valo void ath6kl_cookie_init(struct ath6kl *ar); 665bdcd8170SKalle Valo void ath6kl_cookie_cleanup(struct ath6kl *ar); 666bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet); 667bdcd8170SKalle Valo void ath6kl_tx_complete(void *context, struct list_head *packet_queue); 668bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target, 669bdcd8170SKalle Valo struct htc_packet *packet); 670bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar); 671bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar); 672f9ea0753SVasanthakumar Thiagarajan int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value); 673addb44beSKalle Valo int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length); 674addb44beSKalle Valo int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value); 675addb44beSKalle Valo int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length); 676bc07ddb2SKalle Valo int ath6kl_read_fwlogs(struct ath6kl *ar); 677e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif); 678bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar); 679bdcd8170SKalle Valo 680bdcd8170SKalle Valo struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar); 681bdcd8170SKalle Valo void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie); 682bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev); 683bdcd8170SKalle Valo 684bdcd8170SKalle Valo struct aggr_info *aggr_init(struct net_device *dev); 685bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target, 686bdcd8170SKalle Valo enum htc_endpoint_id endpoint); 687bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count); 688bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target, 689bdcd8170SKalle Valo enum htc_endpoint_id endpoint, 690bdcd8170SKalle Valo int len); 691bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info); 692bdcd8170SKalle Valo void aggr_reset_state(struct aggr_info *aggr_info); 693bdcd8170SKalle Valo 6946765d0aaSVasanthakumar Thiagarajan struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 * node_addr); 695bdcd8170SKalle Valo struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid); 696bdcd8170SKalle Valo 697bdcd8170SKalle Valo void ath6kl_ready_event(void *devt, u8 * datap, u32 sw_ver, u32 abi_ver); 698bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb, 699bdcd8170SKalle Valo enum htc_endpoint_id eid); 700240d2799SVasanthakumar Thiagarajan void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel, 701bdcd8170SKalle Valo u8 *bssid, u16 listen_int, 702bdcd8170SKalle Valo u16 beacon_int, enum network_type net_type, 703bdcd8170SKalle Valo u8 beacon_ie_len, u8 assoc_req_len, 704bdcd8170SKalle Valo u8 assoc_resp_len, u8 *assoc_info); 705240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel); 706240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr, 707572e27c0SJouni Malinen u8 keymgmt, u8 ucipher, u8 auth, 708572e27c0SJouni Malinen u8 assoc_req_len, u8 *assoc_info); 709240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason, 710bdcd8170SKalle Valo u8 *bssid, u8 assoc_resp_len, 711bdcd8170SKalle Valo u8 *assoc_info, u16 prot_reason_status); 712240d2799SVasanthakumar Thiagarajan void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast); 713bdcd8170SKalle Valo void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr); 714240d2799SVasanthakumar Thiagarajan void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status); 715240d2799SVasanthakumar Thiagarajan void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len); 716bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active); 717bdcd8170SKalle Valo enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac); 718bdcd8170SKalle Valo 719240d2799SVasanthakumar Thiagarajan void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid); 720bdcd8170SKalle Valo 721240d2799SVasanthakumar Thiagarajan void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif); 722240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect(struct ath6kl_vif *vif); 723240d2799SVasanthakumar Thiagarajan void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid); 724240d2799SVasanthakumar Thiagarajan void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no, 725bdcd8170SKalle Valo u8 win_sz); 726bdcd8170SKalle Valo void ath6kl_wakeup_event(void *dev); 727bdcd8170SKalle Valo 7286db8fa53SVasanthakumar Thiagarajan void ath6kl_reset_device(struct ath6kl *ar, u32 target_type, 7296db8fa53SVasanthakumar Thiagarajan bool wait_fot_compltn, bool cold_reset); 730e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif); 731108438bcSVasanthakumar Thiagarajan void ath6kl_deinit_if_data(struct ath6kl_vif *vif); 7328dafb70eSVasanthakumar Thiagarajan void ath6kl_core_free(struct ath6kl *ar); 733990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar); 73455055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready); 7355fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar); 7365fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar); 737a918fb3cSRaja Mani void ath6kl_check_wow_status(struct ath6kl *ar); 7385fe4dffbSKalle Valo 739bdcd8170SKalle Valo #endif /* CORE_H */ 740