1bdcd8170SKalle Valo /* 2bdcd8170SKalle Valo * Copyright (c) 2010-2011 Atheros Communications Inc. 3bdcd8170SKalle Valo * 4bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 5bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 6bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 7bdcd8170SKalle Valo * 8bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15bdcd8170SKalle Valo */ 16bdcd8170SKalle Valo 17bdcd8170SKalle Valo #ifndef CORE_H 18bdcd8170SKalle Valo #define CORE_H 19bdcd8170SKalle Valo 20bdcd8170SKalle Valo #include <linux/etherdevice.h> 21bdcd8170SKalle Valo #include <linux/rtnetlink.h> 22bdcd8170SKalle Valo #include <linux/firmware.h> 23bdcd8170SKalle Valo #include <linux/sched.h> 24bdf5396bSKalle Valo #include <linux/circ_buf.h> 25bdcd8170SKalle Valo #include <net/cfg80211.h> 26bdcd8170SKalle Valo #include "htc.h" 27bdcd8170SKalle Valo #include "wmi.h" 28bdcd8170SKalle Valo #include "bmi.h" 29bc07ddb2SKalle Valo #include "target.h" 30bdcd8170SKalle Valo 31bdcd8170SKalle Valo #define MAX_ATH6KL 1 32bdcd8170SKalle Valo #define ATH6KL_MAX_RX_BUFFERS 16 33bdcd8170SKalle Valo #define ATH6KL_BUFFER_SIZE 1664 34bdcd8170SKalle Valo #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4 35bdcd8170SKalle Valo #define ATH6KL_AMSDU_REFILL_THRESHOLD 3 36bdcd8170SKalle Valo #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128) 37bdcd8170SKalle Valo #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508 38bdcd8170SKalle Valo #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46 39bdcd8170SKalle Valo 40bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_INIT 0 41bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_RUN 1 42bdcd8170SKalle Valo 43bdcd8170SKalle Valo #define ATH6KL_TX_TIMEOUT 10 44bdcd8170SKalle Valo #define ATH6KL_MAX_ENDPOINTS 4 45bdcd8170SKalle Valo #define MAX_NODE_NUM 15 46bdcd8170SKalle Valo 471df94a85SVasanthakumar Thiagarajan /* Extra bytes for htc header alignment */ 481df94a85SVasanthakumar Thiagarajan #define ATH6KL_HTC_ALIGN_BYTES 3 491df94a85SVasanthakumar Thiagarajan 50bdcd8170SKalle Valo /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */ 51bdcd8170SKalle Valo #define MAX_DEF_COOKIE_NUM 180 52bdcd8170SKalle Valo #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */ 53bdcd8170SKalle Valo #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM) 54bdcd8170SKalle Valo 55bdcd8170SKalle Valo #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC) 56bdcd8170SKalle Valo 57bdcd8170SKalle Valo #define DISCON_TIMER_INTVAL 10000 /* in msec */ 58bdcd8170SKalle Valo #define A_DEFAULT_LISTEN_INTERVAL 100 59bdcd8170SKalle Valo #define A_MAX_WOW_LISTEN_INTERVAL 1000 60bdcd8170SKalle Valo 6150d41234SKalle Valo /* includes also the null byte */ 6250d41234SKalle Valo #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL" 6350d41234SKalle Valo 6450d41234SKalle Valo enum ath6kl_fw_ie_type { 6550d41234SKalle Valo ATH6KL_FW_IE_FW_VERSION = 0, 6650d41234SKalle Valo ATH6KL_FW_IE_TIMESTAMP = 1, 6750d41234SKalle Valo ATH6KL_FW_IE_OTP_IMAGE = 2, 6850d41234SKalle Valo ATH6KL_FW_IE_FW_IMAGE = 3, 6950d41234SKalle Valo ATH6KL_FW_IE_PATCH_IMAGE = 4, 708a137480SKalle Valo ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5, 7197e0496dSKalle Valo ATH6KL_FW_IE_CAPABILITIES = 6, 7250d41234SKalle Valo }; 7350d41234SKalle Valo 7497e0496dSKalle Valo enum ath6kl_fw_capability { 7597e0496dSKalle Valo ATH6KL_FW_CAPABILITY_HOST_P2P = 0, 7697e0496dSKalle Valo 7797e0496dSKalle Valo /* this needs to be last */ 7897e0496dSKalle Valo ATH6KL_FW_CAPABILITY_MAX, 7997e0496dSKalle Valo }; 8097e0496dSKalle Valo 8197e0496dSKalle Valo #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32) 8297e0496dSKalle Valo 8350d41234SKalle Valo struct ath6kl_fw_ie { 8450d41234SKalle Valo __le32 id; 8550d41234SKalle Valo __le32 len; 8650d41234SKalle Valo u8 data[0]; 8750d41234SKalle Valo }; 8850d41234SKalle Valo 89bdcd8170SKalle Valo /* AR6003 1.0 definitions */ 90bdcd8170SKalle Valo #define AR6003_REV1_VERSION 0x300002ba 91bdcd8170SKalle Valo 92bdcd8170SKalle Valo /* AR6003 2.0 definitions */ 93bdcd8170SKalle Valo #define AR6003_REV2_VERSION 0x30000384 94bdcd8170SKalle Valo #define AR6003_REV2_PATCH_DOWNLOAD_ADDRESS 0x57e910 95bdcd8170SKalle Valo #define AR6003_REV2_OTP_FILE "ath6k/AR6003/hw2.0/otp.bin.z77" 96bdcd8170SKalle Valo #define AR6003_REV2_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athwlan.bin.z77" 97003353b0SKalle Valo #define AR6003_REV2_TCMD_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athtcmd_ram.bin" 98bdcd8170SKalle Valo #define AR6003_REV2_PATCH_FILE "ath6k/AR6003/hw2.0/data.patch.bin" 9950d41234SKalle Valo #define AR6003_REV2_FIRMWARE_2_FILE "ath6k/AR6003/hw2.0/fw-2.bin" 100bdcd8170SKalle Valo #define AR6003_REV2_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin" 101bdcd8170SKalle Valo #define AR6003_REV2_DEFAULT_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.SD31.bin" 102bdcd8170SKalle Valo 103bdcd8170SKalle Valo /* AR6003 3.0 definitions */ 104bdcd8170SKalle Valo #define AR6003_REV3_VERSION 0x30000582 105bdcd8170SKalle Valo #define AR6003_REV3_OTP_FILE "ath6k/AR6003/hw2.1.1/otp.bin" 106bdcd8170SKalle Valo #define AR6003_REV3_FIRMWARE_FILE "ath6k/AR6003/hw2.1.1/athwlan.bin" 107003353b0SKalle Valo #define AR6003_REV3_TCMD_FIRMWARE_FILE "ath6k/AR6003/hw2.1.1/athtcmd_ram.bin" 108bdcd8170SKalle Valo #define AR6003_REV3_PATCH_FILE "ath6k/AR6003/hw2.1.1/data.patch.bin" 10950d41234SKalle Valo #define AR6003_REV3_FIRMWARE_2_FILE "ath6k/AR6003/hw2.1.1/fw-2.bin" 110bdcd8170SKalle Valo #define AR6003_REV3_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin" 111bdcd8170SKalle Valo #define AR6003_REV3_DEFAULT_BOARD_DATA_FILE \ 112bdcd8170SKalle Valo "ath6k/AR6003/hw2.1.1/bdata.SD31.bin" 113bdcd8170SKalle Valo 11431024d99SKevin Fang /* AR6004 1.0 definitions */ 11531024d99SKevin Fang #define AR6004_REV1_VERSION 0x30000623 11631024d99SKevin Fang #define AR6004_REV1_FIRMWARE_FILE "ath6k/AR6004/hw6.1/fw.ram.bin" 11750d41234SKalle Valo #define AR6004_REV1_FIRMWARE_2_FILE "ath6k/AR6004/hw6.1/fw-2.bin" 11831024d99SKevin Fang #define AR6004_REV1_BOARD_DATA_FILE "ath6k/AR6004/hw6.1/bdata.bin" 11931024d99SKevin Fang #define AR6004_REV1_DEFAULT_BOARD_DATA_FILE "ath6k/AR6004/hw6.1/bdata.DB132.bin" 12031024d99SKevin Fang #define AR6004_REV1_EPPING_FIRMWARE_FILE "ath6k/AR6004/hw6.1/endpointping.bin" 12131024d99SKevin Fang 122bdcd8170SKalle Valo /* Per STA data, used in AP mode */ 123bdcd8170SKalle Valo #define STA_PS_AWAKE BIT(0) 124bdcd8170SKalle Valo #define STA_PS_SLEEP BIT(1) 125bdcd8170SKalle Valo #define STA_PS_POLLED BIT(2) 126bdcd8170SKalle Valo 127bdcd8170SKalle Valo /* HTC TX packet tagging definitions */ 128bdcd8170SKalle Valo #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED 129bdcd8170SKalle Valo #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1) 130bdcd8170SKalle Valo 131bdcd8170SKalle Valo #define AR6003_CUST_DATA_SIZE 16 132bdcd8170SKalle Valo 133bdcd8170SKalle Valo #define AGGR_WIN_IDX(x, y) ((x) % (y)) 134bdcd8170SKalle Valo #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y)) 135bdcd8170SKalle Valo #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y)) 136bdcd8170SKalle Valo #define ATH6KL_MAX_SEQ_NO 0xFFF 137bdcd8170SKalle Valo #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO) 138bdcd8170SKalle Valo 139bdcd8170SKalle Valo #define NUM_OF_TIDS 8 140bdcd8170SKalle Valo #define AGGR_SZ_DEFAULT 8 141bdcd8170SKalle Valo 142bdcd8170SKalle Valo #define AGGR_WIN_SZ_MIN 2 143bdcd8170SKalle Valo #define AGGR_WIN_SZ_MAX 8 144bdcd8170SKalle Valo 145bdcd8170SKalle Valo #define TID_WINDOW_SZ(_x) ((_x) << 1) 146bdcd8170SKalle Valo 147bdcd8170SKalle Valo #define AGGR_NUM_OF_FREE_NETBUFS 16 148bdcd8170SKalle Valo 149bdcd8170SKalle Valo #define AGGR_RX_TIMEOUT 400 /* in ms */ 150bdcd8170SKalle Valo 151bdcd8170SKalle Valo #define WMI_TIMEOUT (2 * HZ) 152bdcd8170SKalle Valo 153bdcd8170SKalle Valo #define MBOX_YIELD_LIMIT 99 154bdcd8170SKalle Valo 155bdcd8170SKalle Valo /* configuration lags */ 156bdcd8170SKalle Valo /* 157bdcd8170SKalle Valo * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in 158bdcd8170SKalle Valo * ERP IE of beacon to determine the short premable support when 159bdcd8170SKalle Valo * sending (Re)Assoc req. 160bdcd8170SKalle Valo * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power 161bdcd8170SKalle Valo * module state transition failure events which happen during 162bdcd8170SKalle Valo * scan, to the host. 163bdcd8170SKalle Valo */ 164bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0) 165bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1) 166bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_11N BIT(2) 167bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3) 168bdcd8170SKalle Valo 169bdcd8170SKalle Valo enum wlan_low_pwr_state { 170bdcd8170SKalle Valo WLAN_POWER_STATE_ON, 171bdcd8170SKalle Valo WLAN_POWER_STATE_CUT_PWR, 172bdcd8170SKalle Valo WLAN_POWER_STATE_DEEP_SLEEP, 173bdcd8170SKalle Valo WLAN_POWER_STATE_WOW 174bdcd8170SKalle Valo }; 175bdcd8170SKalle Valo 176bdcd8170SKalle Valo enum sme_state { 177bdcd8170SKalle Valo SME_DISCONNECTED, 178bdcd8170SKalle Valo SME_CONNECTING, 179bdcd8170SKalle Valo SME_CONNECTED 180bdcd8170SKalle Valo }; 181bdcd8170SKalle Valo 182bdcd8170SKalle Valo struct skb_hold_q { 183bdcd8170SKalle Valo struct sk_buff *skb; 184bdcd8170SKalle Valo bool is_amsdu; 185bdcd8170SKalle Valo u16 seq_no; 186bdcd8170SKalle Valo }; 187bdcd8170SKalle Valo 188bdcd8170SKalle Valo struct rxtid { 189bdcd8170SKalle Valo bool aggr; 190bdcd8170SKalle Valo bool progress; 191bdcd8170SKalle Valo bool timer_mon; 192bdcd8170SKalle Valo u16 win_sz; 193bdcd8170SKalle Valo u16 seq_next; 194bdcd8170SKalle Valo u32 hold_q_sz; 195bdcd8170SKalle Valo struct skb_hold_q *hold_q; 196bdcd8170SKalle Valo struct sk_buff_head q; 197bdcd8170SKalle Valo spinlock_t lock; 198bdcd8170SKalle Valo }; 199bdcd8170SKalle Valo 200bdcd8170SKalle Valo struct rxtid_stats { 201bdcd8170SKalle Valo u32 num_into_aggr; 202bdcd8170SKalle Valo u32 num_dups; 203bdcd8170SKalle Valo u32 num_oow; 204bdcd8170SKalle Valo u32 num_mpdu; 205bdcd8170SKalle Valo u32 num_amsdu; 206bdcd8170SKalle Valo u32 num_delivered; 207bdcd8170SKalle Valo u32 num_timeouts; 208bdcd8170SKalle Valo u32 num_hole; 209bdcd8170SKalle Valo u32 num_bar; 210bdcd8170SKalle Valo }; 211bdcd8170SKalle Valo 212bdcd8170SKalle Valo struct aggr_info { 213bdcd8170SKalle Valo u8 aggr_sz; 214bdcd8170SKalle Valo u8 timer_scheduled; 215bdcd8170SKalle Valo struct timer_list timer; 216bdcd8170SKalle Valo struct net_device *dev; 217bdcd8170SKalle Valo struct rxtid rx_tid[NUM_OF_TIDS]; 218bdcd8170SKalle Valo struct sk_buff_head free_q; 219bdcd8170SKalle Valo struct rxtid_stats stat[NUM_OF_TIDS]; 220bdcd8170SKalle Valo }; 221bdcd8170SKalle Valo 222bdcd8170SKalle Valo struct ath6kl_wep_key { 223bdcd8170SKalle Valo u8 key_index; 224bdcd8170SKalle Valo u8 key_len; 225bdcd8170SKalle Valo u8 key[64]; 226bdcd8170SKalle Valo }; 227bdcd8170SKalle Valo 228bdcd8170SKalle Valo #define ATH6KL_KEY_SEQ_LEN 8 229bdcd8170SKalle Valo 230bdcd8170SKalle Valo struct ath6kl_key { 231bdcd8170SKalle Valo u8 key[WLAN_MAX_KEY_LEN]; 232bdcd8170SKalle Valo u8 key_len; 233bdcd8170SKalle Valo u8 seq[ATH6KL_KEY_SEQ_LEN]; 234bdcd8170SKalle Valo u8 seq_len; 235bdcd8170SKalle Valo u32 cipher; 236bdcd8170SKalle Valo }; 237bdcd8170SKalle Valo 238bdcd8170SKalle Valo struct ath6kl_node_mapping { 239bdcd8170SKalle Valo u8 mac_addr[ETH_ALEN]; 240bdcd8170SKalle Valo u8 ep_id; 241bdcd8170SKalle Valo u8 tx_pend; 242bdcd8170SKalle Valo }; 243bdcd8170SKalle Valo 244bdcd8170SKalle Valo struct ath6kl_cookie { 245bdcd8170SKalle Valo struct sk_buff *skb; 246bdcd8170SKalle Valo u32 map_no; 247bdcd8170SKalle Valo struct htc_packet htc_pkt; 248bdcd8170SKalle Valo struct ath6kl_cookie *arc_list_next; 249bdcd8170SKalle Valo }; 250bdcd8170SKalle Valo 251bdcd8170SKalle Valo struct ath6kl_sta { 252bdcd8170SKalle Valo u16 sta_flags; 253bdcd8170SKalle Valo u8 mac[ETH_ALEN]; 254bdcd8170SKalle Valo u8 aid; 255bdcd8170SKalle Valo u8 keymgmt; 256bdcd8170SKalle Valo u8 ucipher; 257bdcd8170SKalle Valo u8 auth; 258bdcd8170SKalle Valo u8 wpa_ie[ATH6KL_MAX_IE]; 259bdcd8170SKalle Valo struct sk_buff_head psq; 260bdcd8170SKalle Valo spinlock_t psq_lock; 261bdcd8170SKalle Valo }; 262bdcd8170SKalle Valo 263bdcd8170SKalle Valo struct ath6kl_version { 264bdcd8170SKalle Valo u32 target_ver; 265bdcd8170SKalle Valo u32 wlan_ver; 266bdcd8170SKalle Valo u32 abi_ver; 267bdcd8170SKalle Valo }; 268bdcd8170SKalle Valo 269bdcd8170SKalle Valo struct ath6kl_bmi { 270bdcd8170SKalle Valo u32 cmd_credits; 271bdcd8170SKalle Valo bool done_sent; 272bdcd8170SKalle Valo u8 *cmd_buf; 273bdcd8170SKalle Valo }; 274bdcd8170SKalle Valo 275bdcd8170SKalle Valo struct target_stats { 276bdcd8170SKalle Valo u64 tx_pkt; 277bdcd8170SKalle Valo u64 tx_byte; 278bdcd8170SKalle Valo u64 tx_ucast_pkt; 279bdcd8170SKalle Valo u64 tx_ucast_byte; 280bdcd8170SKalle Valo u64 tx_mcast_pkt; 281bdcd8170SKalle Valo u64 tx_mcast_byte; 282bdcd8170SKalle Valo u64 tx_bcast_pkt; 283bdcd8170SKalle Valo u64 tx_bcast_byte; 284bdcd8170SKalle Valo u64 tx_rts_success_cnt; 285bdcd8170SKalle Valo u64 tx_pkt_per_ac[4]; 286bdcd8170SKalle Valo 287bdcd8170SKalle Valo u64 tx_err; 288bdcd8170SKalle Valo u64 tx_fail_cnt; 289bdcd8170SKalle Valo u64 tx_retry_cnt; 290bdcd8170SKalle Valo u64 tx_mult_retry_cnt; 291bdcd8170SKalle Valo u64 tx_rts_fail_cnt; 292bdcd8170SKalle Valo 293bdcd8170SKalle Valo u64 rx_pkt; 294bdcd8170SKalle Valo u64 rx_byte; 295bdcd8170SKalle Valo u64 rx_ucast_pkt; 296bdcd8170SKalle Valo u64 rx_ucast_byte; 297bdcd8170SKalle Valo u64 rx_mcast_pkt; 298bdcd8170SKalle Valo u64 rx_mcast_byte; 299bdcd8170SKalle Valo u64 rx_bcast_pkt; 300bdcd8170SKalle Valo u64 rx_bcast_byte; 301bdcd8170SKalle Valo u64 rx_frgment_pkt; 302bdcd8170SKalle Valo 303bdcd8170SKalle Valo u64 rx_err; 304bdcd8170SKalle Valo u64 rx_crc_err; 305bdcd8170SKalle Valo u64 rx_key_cache_miss; 306bdcd8170SKalle Valo u64 rx_decrypt_err; 307bdcd8170SKalle Valo u64 rx_dupl_frame; 308bdcd8170SKalle Valo 309bdcd8170SKalle Valo u64 tkip_local_mic_fail; 310bdcd8170SKalle Valo u64 tkip_cnter_measures_invoked; 311bdcd8170SKalle Valo u64 tkip_replays; 312bdcd8170SKalle Valo u64 tkip_fmt_err; 313bdcd8170SKalle Valo u64 ccmp_fmt_err; 314bdcd8170SKalle Valo u64 ccmp_replays; 315bdcd8170SKalle Valo 316bdcd8170SKalle Valo u64 pwr_save_fail_cnt; 317bdcd8170SKalle Valo 318bdcd8170SKalle Valo u64 cs_bmiss_cnt; 319bdcd8170SKalle Valo u64 cs_low_rssi_cnt; 320bdcd8170SKalle Valo u64 cs_connect_cnt; 321bdcd8170SKalle Valo u64 cs_discon_cnt; 322bdcd8170SKalle Valo 323bdcd8170SKalle Valo s32 tx_ucast_rate; 324bdcd8170SKalle Valo s32 rx_ucast_rate; 325bdcd8170SKalle Valo 326bdcd8170SKalle Valo u32 lq_val; 327bdcd8170SKalle Valo 328bdcd8170SKalle Valo u32 wow_pkt_dropped; 329bdcd8170SKalle Valo u16 wow_evt_discarded; 330bdcd8170SKalle Valo 331bdcd8170SKalle Valo s16 noise_floor_calib; 332bdcd8170SKalle Valo s16 cs_rssi; 333bdcd8170SKalle Valo s16 cs_ave_beacon_rssi; 334bdcd8170SKalle Valo u8 cs_ave_beacon_snr; 335bdcd8170SKalle Valo u8 cs_last_roam_msec; 336bdcd8170SKalle Valo u8 cs_snr; 337bdcd8170SKalle Valo 338bdcd8170SKalle Valo u8 wow_host_pkt_wakeups; 339bdcd8170SKalle Valo u8 wow_host_evt_wakeups; 340bdcd8170SKalle Valo 341bdcd8170SKalle Valo u32 arp_received; 342bdcd8170SKalle Valo u32 arp_matched; 343bdcd8170SKalle Valo u32 arp_replied; 344bdcd8170SKalle Valo }; 345bdcd8170SKalle Valo 346bdcd8170SKalle Valo struct ath6kl_mbox_info { 347bdcd8170SKalle Valo u32 htc_addr; 348bdcd8170SKalle Valo u32 htc_ext_addr; 349bdcd8170SKalle Valo u32 htc_ext_sz; 350bdcd8170SKalle Valo 351bdcd8170SKalle Valo u32 block_size; 352bdcd8170SKalle Valo 353bdcd8170SKalle Valo u32 gmbox_addr; 354bdcd8170SKalle Valo 355bdcd8170SKalle Valo u32 gmbox_sz; 356bdcd8170SKalle Valo }; 357bdcd8170SKalle Valo 358bdcd8170SKalle Valo /* 359bdcd8170SKalle Valo * 802.11i defines an extended IV for use with non-WEP ciphers. 360bdcd8170SKalle Valo * When the EXTIV bit is set in the key id byte an additional 361bdcd8170SKalle Valo * 4 bytes immediately follow the IV for TKIP. For CCMP the 362bdcd8170SKalle Valo * EXTIV bit is likewise set but the 8 bytes represent the 363bdcd8170SKalle Valo * CCMP header rather than IV+extended-IV. 364bdcd8170SKalle Valo */ 365bdcd8170SKalle Valo 366bdcd8170SKalle Valo #define ATH6KL_KEYBUF_SIZE 16 367bdcd8170SKalle Valo #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */ 368bdcd8170SKalle Valo 369bdcd8170SKalle Valo #define ATH6KL_KEY_XMIT 0x01 370bdcd8170SKalle Valo #define ATH6KL_KEY_RECV 0x02 371bdcd8170SKalle Valo #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */ 372bdcd8170SKalle Valo 3739a5b1318SJouni Malinen /* Initial group key for AP mode */ 374bdcd8170SKalle Valo struct ath6kl_req_key { 3759a5b1318SJouni Malinen bool valid; 3769a5b1318SJouni Malinen u8 key_index; 3779a5b1318SJouni Malinen int key_type; 3789a5b1318SJouni Malinen u8 key[WLAN_MAX_KEY_LEN]; 3799a5b1318SJouni Malinen u8 key_len; 380bdcd8170SKalle Valo }; 381bdcd8170SKalle Valo 382bdcd8170SKalle Valo /* Flag info */ 383bdcd8170SKalle Valo #define WMI_ENABLED 0 384bdcd8170SKalle Valo #define WMI_READY 1 385bdcd8170SKalle Valo #define CONNECTED 2 386bdcd8170SKalle Valo #define STATS_UPDATE_PEND 3 387bdcd8170SKalle Valo #define CONNECT_PEND 4 388bdcd8170SKalle Valo #define WMM_ENABLED 5 389bdcd8170SKalle Valo #define NETQ_STOPPED 6 390bdcd8170SKalle Valo #define WMI_CTRL_EP_FULL 7 391bdcd8170SKalle Valo #define DTIM_EXPIRED 8 392bdcd8170SKalle Valo #define DESTROY_IN_PROGRESS 9 393bdcd8170SKalle Valo #define NETDEV_REGISTERED 10 394bdcd8170SKalle Valo #define SKIP_SCAN 11 395575b5f34SRaja Mani #define WLAN_ENABLED 12 396003353b0SKalle Valo #define TESTMODE 13 397551185caSJouni Malinen #define CLEAR_BSSFILTER_ON_BEACON 14 398bdcd8170SKalle Valo 399bdcd8170SKalle Valo struct ath6kl { 400bdcd8170SKalle Valo struct device *dev; 401bdcd8170SKalle Valo struct net_device *net_dev; 402bdcd8170SKalle Valo struct ath6kl_bmi bmi; 403bdcd8170SKalle Valo const struct ath6kl_hif_ops *hif_ops; 404bdcd8170SKalle Valo struct wmi *wmi; 405bdcd8170SKalle Valo int tx_pending[ENDPOINT_MAX]; 406bdcd8170SKalle Valo int total_tx_data_pend; 407bdcd8170SKalle Valo struct htc_target *htc_target; 408bdcd8170SKalle Valo void *hif_priv; 409bdcd8170SKalle Valo spinlock_t lock; 410bdcd8170SKalle Valo struct semaphore sem; 411bdcd8170SKalle Valo int ssid_len; 412bdcd8170SKalle Valo u8 ssid[IEEE80211_MAX_SSID_LEN]; 413bdcd8170SKalle Valo u8 next_mode; 414bdcd8170SKalle Valo u8 nw_type; 415bdcd8170SKalle Valo u8 dot11_auth_mode; 416bdcd8170SKalle Valo u8 auth_mode; 417bdcd8170SKalle Valo u8 prwise_crypto; 418bdcd8170SKalle Valo u8 prwise_crypto_len; 419bdcd8170SKalle Valo u8 grp_crypto; 42038acde3cSEdward Lu u8 grp_crypto_len; 421bdcd8170SKalle Valo u8 def_txkey_index; 422bdcd8170SKalle Valo struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1]; 423bdcd8170SKalle Valo u8 bssid[ETH_ALEN]; 424bdcd8170SKalle Valo u8 req_bssid[ETH_ALEN]; 425bdcd8170SKalle Valo u16 ch_hint; 426bdcd8170SKalle Valo u16 bss_ch; 427bdcd8170SKalle Valo u16 listen_intvl_b; 428bdcd8170SKalle Valo u16 listen_intvl_t; 429e5090444SVivek Natarajan u8 lrssi_roam_threshold; 430bdcd8170SKalle Valo struct ath6kl_version version; 431bdcd8170SKalle Valo u32 target_type; 432bdcd8170SKalle Valo u8 tx_pwr; 433bdcd8170SKalle Valo struct net_device_stats net_stats; 434bdcd8170SKalle Valo struct target_stats target_stats; 435bdcd8170SKalle Valo struct ath6kl_node_mapping node_map[MAX_NODE_NUM]; 436bdcd8170SKalle Valo u8 ibss_ps_enable; 437bdcd8170SKalle Valo u8 node_num; 438bdcd8170SKalle Valo u8 next_ep_id; 439bdcd8170SKalle Valo struct ath6kl_cookie *cookie_list; 440bdcd8170SKalle Valo u32 cookie_count; 441bdcd8170SKalle Valo enum htc_endpoint_id ac2ep_map[WMM_NUM_AC]; 442bdcd8170SKalle Valo bool ac_stream_active[WMM_NUM_AC]; 443bdcd8170SKalle Valo u8 ac_stream_pri_map[WMM_NUM_AC]; 444bdcd8170SKalle Valo u8 hiac_stream_active_pri; 445bdcd8170SKalle Valo u8 ep2ac_map[ENDPOINT_MAX]; 446bdcd8170SKalle Valo enum htc_endpoint_id ctrl_ep; 447bdcd8170SKalle Valo struct htc_credit_state_info credit_state_info; 448bdcd8170SKalle Valo u32 connect_ctrl_flags; 449bdcd8170SKalle Valo u32 user_key_ctrl; 450bdcd8170SKalle Valo u8 usr_bss_filter; 451bdcd8170SKalle Valo struct ath6kl_sta sta_list[AP_MAX_NUM_STA]; 452bdcd8170SKalle Valo u8 sta_list_index; 453bdcd8170SKalle Valo struct ath6kl_req_key ap_mode_bkey; 454bdcd8170SKalle Valo struct sk_buff_head mcastpsq; 455bdcd8170SKalle Valo spinlock_t mcastpsq_lock; 456bdcd8170SKalle Valo u8 intra_bss; 457bdcd8170SKalle Valo struct aggr_info *aggr_cntxt; 458bdcd8170SKalle Valo struct wmi_ap_mode_stat ap_stats; 459bdcd8170SKalle Valo u8 ap_country_code[3]; 460bdcd8170SKalle Valo struct list_head amsdu_rx_buffer_queue; 461bdcd8170SKalle Valo struct timer_list disconnect_timer; 462bdcd8170SKalle Valo u8 rx_meta_ver; 463bdcd8170SKalle Valo struct wireless_dev *wdev; 464bdcd8170SKalle Valo struct cfg80211_scan_request *scan_req; 465bdcd8170SKalle Valo struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1]; 466bdcd8170SKalle Valo enum sme_state sme_state; 467bdcd8170SKalle Valo enum wlan_low_pwr_state wlan_pwr_state; 468bdcd8170SKalle Valo struct wmi_scan_params_cmd sc_params; 469bdcd8170SKalle Valo #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4 470003353b0SKalle Valo struct { 471003353b0SKalle Valo void *rx_report; 472003353b0SKalle Valo size_t rx_report_len; 473003353b0SKalle Valo } tm; 474003353b0SKalle Valo 475a01ac414SKalle Valo struct { 476a01ac414SKalle Valo u32 dataset_patch_addr; 477a01ac414SKalle Valo u32 app_load_addr; 478a01ac414SKalle Valo u32 app_start_override_addr; 479991b27eaSKalle Valo u32 board_ext_data_addr; 480991b27eaSKalle Valo u32 reserved_ram_size; 481a01ac414SKalle Valo } hw; 482a01ac414SKalle Valo 483bdcd8170SKalle Valo u16 conf_flags; 484bdcd8170SKalle Valo wait_queue_head_t event_wq; 485bdcd8170SKalle Valo struct ath6kl_mbox_info mbox_info; 486bdcd8170SKalle Valo 487bdcd8170SKalle Valo struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM]; 488bdcd8170SKalle Valo int reconnect_flag; 489bdcd8170SKalle Valo unsigned long flag; 490bdcd8170SKalle Valo 491bdcd8170SKalle Valo u8 *fw_board; 492bdcd8170SKalle Valo size_t fw_board_len; 493bdcd8170SKalle Valo 494bdcd8170SKalle Valo u8 *fw_otp; 495bdcd8170SKalle Valo size_t fw_otp_len; 496bdcd8170SKalle Valo 497bdcd8170SKalle Valo u8 *fw; 498bdcd8170SKalle Valo size_t fw_len; 499bdcd8170SKalle Valo 500bdcd8170SKalle Valo u8 *fw_patch; 501bdcd8170SKalle Valo size_t fw_patch_len; 502bdcd8170SKalle Valo 50397e0496dSKalle Valo unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN]; 50497e0496dSKalle Valo 505bdcd8170SKalle Valo struct workqueue_struct *ath6kl_wq; 5067c3075e9SVasanthakumar Thiagarajan 507d999ba3eSVasanthakumar Thiagarajan struct dentry *debugfs_phy; 5086a7c9badSJouni Malinen 5098a6c8060SJouni Malinen u32 send_action_id; 510ae32c30aSJouni Malinen bool probe_req_report; 5116a7c9badSJouni Malinen u16 next_chan; 512bdf5396bSKalle Valo 5136bbc7c35SJouni Malinen bool p2p; 5146bbc7c35SJouni Malinen 515bdf5396bSKalle Valo #ifdef CONFIG_ATH6KL_DEBUG 516bdf5396bSKalle Valo struct { 517bdf5396bSKalle Valo struct circ_buf fwlog_buf; 518bdf5396bSKalle Valo spinlock_t fwlog_lock; 519bdf5396bSKalle Valo void *fwlog_tmp; 520939f1cceSKalle Valo u32 fwlog_mask; 52191d57de5SVasanthakumar Thiagarajan unsigned int dbgfs_diag_reg; 522252c068bSVasanthakumar Thiagarajan u32 diag_reg_addr_wr; 523252c068bSVasanthakumar Thiagarajan u32 diag_reg_val_wr; 524bdf5396bSKalle Valo } debug; 525bdf5396bSKalle Valo #endif /* CONFIG_ATH6KL_DEBUG */ 526bdcd8170SKalle Valo }; 527bdcd8170SKalle Valo 528bdcd8170SKalle Valo static inline void *ath6kl_priv(struct net_device *dev) 529bdcd8170SKalle Valo { 530bdcd8170SKalle Valo return wdev_priv(dev->ieee80211_ptr); 531bdcd8170SKalle Valo } 532bdcd8170SKalle Valo 533bdcd8170SKalle Valo static inline void ath6kl_deposit_credit_to_ep(struct htc_credit_state_info 534bdcd8170SKalle Valo *cred_info, 535bdcd8170SKalle Valo struct htc_endpoint_credit_dist 536bdcd8170SKalle Valo *ep_dist, int credits) 537bdcd8170SKalle Valo { 538bdcd8170SKalle Valo ep_dist->credits += credits; 539bdcd8170SKalle Valo ep_dist->cred_assngd += credits; 540bdcd8170SKalle Valo cred_info->cur_free_credits -= credits; 541bdcd8170SKalle Valo } 542bdcd8170SKalle Valo 543bc07ddb2SKalle Valo static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar, 544bc07ddb2SKalle Valo u32 item_offset) 545bc07ddb2SKalle Valo { 546bc07ddb2SKalle Valo u32 addr = 0; 547bc07ddb2SKalle Valo 548bc07ddb2SKalle Valo if (ar->target_type == TARGET_TYPE_AR6003) 549bc07ddb2SKalle Valo addr = ATH6KL_AR6003_HI_START_ADDR + item_offset; 550bc07ddb2SKalle Valo else if (ar->target_type == TARGET_TYPE_AR6004) 551bc07ddb2SKalle Valo addr = ATH6KL_AR6004_HI_START_ADDR + item_offset; 552bc07ddb2SKalle Valo 553bc07ddb2SKalle Valo return addr; 554bc07ddb2SKalle Valo } 555bc07ddb2SKalle Valo 556bdcd8170SKalle Valo void ath6kl_destroy(struct net_device *dev, unsigned int unregister); 557bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar); 558bdcd8170SKalle Valo void ath6kl_detect_error(unsigned long ptr); 559bdcd8170SKalle Valo void disconnect_timer_handler(unsigned long ptr); 560bdcd8170SKalle Valo void init_netdev(struct net_device *dev); 561bdcd8170SKalle Valo void ath6kl_cookie_init(struct ath6kl *ar); 562bdcd8170SKalle Valo void ath6kl_cookie_cleanup(struct ath6kl *ar); 563bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet); 564bdcd8170SKalle Valo void ath6kl_tx_complete(void *context, struct list_head *packet_queue); 565bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target, 566bdcd8170SKalle Valo struct htc_packet *packet); 567bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar); 568bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar); 569f9ea0753SVasanthakumar Thiagarajan int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value); 570addb44beSKalle Valo int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length); 571addb44beSKalle Valo int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value); 572addb44beSKalle Valo int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length); 573bc07ddb2SKalle Valo int ath6kl_read_fwlogs(struct ath6kl *ar); 574bdcd8170SKalle Valo void ath6kl_init_profile_info(struct ath6kl *ar); 575bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar); 576bdcd8170SKalle Valo void ath6kl_stop_endpoint(struct net_device *dev, bool keep_profile, 577bdcd8170SKalle Valo bool get_dbglogs); 578bdcd8170SKalle Valo 579bdcd8170SKalle Valo struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar); 580bdcd8170SKalle Valo void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie); 581bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev); 582bdcd8170SKalle Valo 583bdcd8170SKalle Valo struct aggr_info *aggr_init(struct net_device *dev); 584bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target, 585bdcd8170SKalle Valo enum htc_endpoint_id endpoint); 586bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count); 587bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target, 588bdcd8170SKalle Valo enum htc_endpoint_id endpoint, 589bdcd8170SKalle Valo int len); 590bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info); 591bdcd8170SKalle Valo void aggr_reset_state(struct aggr_info *aggr_info); 592bdcd8170SKalle Valo 593bdcd8170SKalle Valo struct ath6kl_sta *ath6kl_find_sta(struct ath6kl *ar, u8 * node_addr); 594bdcd8170SKalle Valo struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid); 595bdcd8170SKalle Valo 596bdcd8170SKalle Valo void ath6kl_ready_event(void *devt, u8 * datap, u32 sw_ver, u32 abi_ver); 597bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb, 598bdcd8170SKalle Valo enum htc_endpoint_id eid); 599bdcd8170SKalle Valo void ath6kl_connect_event(struct ath6kl *ar, u16 channel, 600bdcd8170SKalle Valo u8 *bssid, u16 listen_int, 601bdcd8170SKalle Valo u16 beacon_int, enum network_type net_type, 602bdcd8170SKalle Valo u8 beacon_ie_len, u8 assoc_req_len, 603bdcd8170SKalle Valo u8 assoc_resp_len, u8 *assoc_info); 604572e27c0SJouni Malinen void ath6kl_connect_ap_mode_bss(struct ath6kl *ar, u16 channel); 605572e27c0SJouni Malinen void ath6kl_connect_ap_mode_sta(struct ath6kl *ar, u16 aid, u8 *mac_addr, 606572e27c0SJouni Malinen u8 keymgmt, u8 ucipher, u8 auth, 607572e27c0SJouni Malinen u8 assoc_req_len, u8 *assoc_info); 608bdcd8170SKalle Valo void ath6kl_disconnect_event(struct ath6kl *ar, u8 reason, 609bdcd8170SKalle Valo u8 *bssid, u8 assoc_resp_len, 610bdcd8170SKalle Valo u8 *assoc_info, u16 prot_reason_status); 611bdcd8170SKalle Valo void ath6kl_tkip_micerr_event(struct ath6kl *ar, u8 keyid, bool ismcast); 612bdcd8170SKalle Valo void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr); 613bdcd8170SKalle Valo void ath6kl_scan_complete_evt(struct ath6kl *ar, int status); 614bdcd8170SKalle Valo void ath6kl_tgt_stats_event(struct ath6kl *ar, u8 *ptr, u32 len); 615bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active); 616bdcd8170SKalle Valo enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac); 617bdcd8170SKalle Valo 618bdcd8170SKalle Valo void ath6kl_pspoll_event(struct ath6kl *ar, u8 aid); 619bdcd8170SKalle Valo 620bdcd8170SKalle Valo void ath6kl_dtimexpiry_event(struct ath6kl *ar); 621bdcd8170SKalle Valo void ath6kl_disconnect(struct ath6kl *ar); 622abcb344bSKalle Valo void ath6kl_deep_sleep_enable(struct ath6kl *ar); 623bdcd8170SKalle Valo void aggr_recv_delba_req_evt(struct ath6kl *ar, u8 tid); 624bdcd8170SKalle Valo void aggr_recv_addba_req_evt(struct ath6kl *ar, u8 tid, u16 seq_no, 625bdcd8170SKalle Valo u8 win_sz); 626bdcd8170SKalle Valo void ath6kl_wakeup_event(void *dev); 627bdcd8170SKalle Valo void ath6kl_target_failure(struct ath6kl *ar); 628bdcd8170SKalle Valo 629bdcd8170SKalle Valo #endif /* CORE_H */ 630