1bdcd8170SKalle Valo /* 2bdcd8170SKalle Valo * Copyright (c) 2010-2011 Atheros Communications Inc. 3bdcd8170SKalle Valo * 4bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 5bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 6bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 7bdcd8170SKalle Valo * 8bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15bdcd8170SKalle Valo */ 16bdcd8170SKalle Valo 17bdcd8170SKalle Valo #ifndef CORE_H 18bdcd8170SKalle Valo #define CORE_H 19bdcd8170SKalle Valo 20bdcd8170SKalle Valo #include <linux/etherdevice.h> 21bdcd8170SKalle Valo #include <linux/rtnetlink.h> 22bdcd8170SKalle Valo #include <linux/firmware.h> 23bdcd8170SKalle Valo #include <linux/sched.h> 24bdf5396bSKalle Valo #include <linux/circ_buf.h> 25bdcd8170SKalle Valo #include <net/cfg80211.h> 26bdcd8170SKalle Valo #include "htc.h" 27bdcd8170SKalle Valo #include "wmi.h" 28bdcd8170SKalle Valo #include "bmi.h" 29bc07ddb2SKalle Valo #include "target.h" 30bdcd8170SKalle Valo 31bdcd8170SKalle Valo #define MAX_ATH6KL 1 32bdcd8170SKalle Valo #define ATH6KL_MAX_RX_BUFFERS 16 33bdcd8170SKalle Valo #define ATH6KL_BUFFER_SIZE 1664 34bdcd8170SKalle Valo #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4 35bdcd8170SKalle Valo #define ATH6KL_AMSDU_REFILL_THRESHOLD 3 36bdcd8170SKalle Valo #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128) 37bdcd8170SKalle Valo #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508 38bdcd8170SKalle Valo #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46 39bdcd8170SKalle Valo 40bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_INIT 0 41bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_RUN 1 42bdcd8170SKalle Valo 43bdcd8170SKalle Valo #define ATH6KL_TX_TIMEOUT 10 44bdcd8170SKalle Valo #define ATH6KL_MAX_ENDPOINTS 4 45bdcd8170SKalle Valo #define MAX_NODE_NUM 15 46bdcd8170SKalle Valo 471df94a85SVasanthakumar Thiagarajan /* Extra bytes for htc header alignment */ 481df94a85SVasanthakumar Thiagarajan #define ATH6KL_HTC_ALIGN_BYTES 3 491df94a85SVasanthakumar Thiagarajan 50bdcd8170SKalle Valo /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */ 51bdcd8170SKalle Valo #define MAX_DEF_COOKIE_NUM 180 52bdcd8170SKalle Valo #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */ 53bdcd8170SKalle Valo #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM) 54bdcd8170SKalle Valo 55bdcd8170SKalle Valo #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC) 56bdcd8170SKalle Valo 57bdcd8170SKalle Valo #define DISCON_TIMER_INTVAL 10000 /* in msec */ 58bdcd8170SKalle Valo #define A_DEFAULT_LISTEN_INTERVAL 100 59bdcd8170SKalle Valo #define A_MAX_WOW_LISTEN_INTERVAL 1000 60bdcd8170SKalle Valo 6150d41234SKalle Valo /* includes also the null byte */ 6250d41234SKalle Valo #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL" 6350d41234SKalle Valo 6450d41234SKalle Valo enum ath6kl_fw_ie_type { 6550d41234SKalle Valo ATH6KL_FW_IE_FW_VERSION = 0, 6650d41234SKalle Valo ATH6KL_FW_IE_TIMESTAMP = 1, 6750d41234SKalle Valo ATH6KL_FW_IE_OTP_IMAGE = 2, 6850d41234SKalle Valo ATH6KL_FW_IE_FW_IMAGE = 3, 6950d41234SKalle Valo ATH6KL_FW_IE_PATCH_IMAGE = 4, 708a137480SKalle Valo ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5, 7197e0496dSKalle Valo ATH6KL_FW_IE_CAPABILITIES = 6, 721b4304daSKalle Valo ATH6KL_FW_IE_PATCH_ADDR = 7, 7303ef0250SKalle Valo ATH6KL_FW_IE_BOARD_ADDR = 8, 74368b1b0fSKalle Valo ATH6KL_FW_IE_VIF_MAX = 9, 7550d41234SKalle Valo }; 7650d41234SKalle Valo 7797e0496dSKalle Valo enum ath6kl_fw_capability { 7897e0496dSKalle Valo ATH6KL_FW_CAPABILITY_HOST_P2P = 0, 7997e0496dSKalle Valo 8097e0496dSKalle Valo /* this needs to be last */ 8197e0496dSKalle Valo ATH6KL_FW_CAPABILITY_MAX, 8297e0496dSKalle Valo }; 8397e0496dSKalle Valo 8497e0496dSKalle Valo #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32) 8597e0496dSKalle Valo 8650d41234SKalle Valo struct ath6kl_fw_ie { 8750d41234SKalle Valo __le32 id; 8850d41234SKalle Valo __le32 len; 8950d41234SKalle Valo u8 data[0]; 9050d41234SKalle Valo }; 9150d41234SKalle Valo 92bdcd8170SKalle Valo /* AR6003 1.0 definitions */ 930d0192baSKalle Valo #define AR6003_HW_1_0_VERSION 0x300002ba 94bdcd8170SKalle Valo 95bdcd8170SKalle Valo /* AR6003 2.0 definitions */ 960d0192baSKalle Valo #define AR6003_HW_2_0_VERSION 0x30000384 970d0192baSKalle Valo #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910 980d0192baSKalle Valo #define AR6003_HW_2_0_OTP_FILE "ath6k/AR6003/hw2.0/otp.bin.z77" 990d0192baSKalle Valo #define AR6003_HW_2_0_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athwlan.bin.z77" 1000d0192baSKalle Valo #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athtcmd_ram.bin" 1010d0192baSKalle Valo #define AR6003_HW_2_0_PATCH_FILE "ath6k/AR6003/hw2.0/data.patch.bin" 1020d0192baSKalle Valo #define AR6003_HW_2_0_FIRMWARE_2_FILE "ath6k/AR6003/hw2.0/fw-2.bin" 1030d0192baSKalle Valo #define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin" 1040d0192baSKalle Valo #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \ 1050d0192baSKalle Valo "ath6k/AR6003/hw2.0/bdata.SD31.bin" 106bdcd8170SKalle Valo 107bdcd8170SKalle Valo /* AR6003 3.0 definitions */ 1080d0192baSKalle Valo #define AR6003_HW_2_1_1_VERSION 0x30000582 1090d0192baSKalle Valo #define AR6003_HW_2_1_1_OTP_FILE "ath6k/AR6003/hw2.1.1/otp.bin" 1100d0192baSKalle Valo #define AR6003_HW_2_1_1_FIRMWARE_FILE "ath6k/AR6003/hw2.1.1/athwlan.bin" 1110d0192baSKalle Valo #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE \ 1120d0192baSKalle Valo "ath6k/AR6003/hw2.1.1/athtcmd_ram.bin" 1130d0192baSKalle Valo #define AR6003_HW_2_1_1_PATCH_FILE "ath6k/AR6003/hw2.1.1/data.patch.bin" 1140d0192baSKalle Valo #define AR6003_HW_2_1_1_FIRMWARE_2_FILE "ath6k/AR6003/hw2.1.1/fw-2.bin" 1150d0192baSKalle Valo #define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin" 1160d0192baSKalle Valo #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \ 117bdcd8170SKalle Valo "ath6k/AR6003/hw2.1.1/bdata.SD31.bin" 118bdcd8170SKalle Valo 11931024d99SKevin Fang /* AR6004 1.0 definitions */ 1200d0192baSKalle Valo #define AR6004_HW_1_0_VERSION 0x30000623 1210d0192baSKalle Valo #define AR6004_HW_1_0_FIRMWARE_2_FILE "ath6k/AR6004/hw1.0/fw-2.bin" 1220d0192baSKalle Valo #define AR6004_HW_1_0_FIRMWARE_FILE "ath6k/AR6004/hw1.0/fw.ram.bin" 1230d0192baSKalle Valo #define AR6004_HW_1_0_BOARD_DATA_FILE "ath6k/AR6004/hw1.0/bdata.bin" 1240d0192baSKalle Valo #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \ 125d5720e59SKalle Valo "ath6k/AR6004/hw1.0/bdata.DB132.bin" 126d5720e59SKalle Valo 127d5720e59SKalle Valo /* AR6004 1.1 definitions */ 1280d0192baSKalle Valo #define AR6004_HW_1_1_VERSION 0x30000001 1290d0192baSKalle Valo #define AR6004_HW_1_1_FIRMWARE_2_FILE "ath6k/AR6004/hw1.1/fw-2.bin" 1300d0192baSKalle Valo #define AR6004_HW_1_1_FIRMWARE_FILE "ath6k/AR6004/hw1.1/fw.ram.bin" 1310d0192baSKalle Valo #define AR6004_HW_1_1_BOARD_DATA_FILE "ath6k/AR6004/hw1.1/bdata.bin" 1320d0192baSKalle Valo #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \ 133d5720e59SKalle Valo "ath6k/AR6004/hw1.1/bdata.DB132.bin" 13431024d99SKevin Fang 135bdcd8170SKalle Valo /* Per STA data, used in AP mode */ 136bdcd8170SKalle Valo #define STA_PS_AWAKE BIT(0) 137bdcd8170SKalle Valo #define STA_PS_SLEEP BIT(1) 138bdcd8170SKalle Valo #define STA_PS_POLLED BIT(2) 139bdcd8170SKalle Valo 140bdcd8170SKalle Valo /* HTC TX packet tagging definitions */ 141bdcd8170SKalle Valo #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED 142bdcd8170SKalle Valo #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1) 143bdcd8170SKalle Valo 144bdcd8170SKalle Valo #define AR6003_CUST_DATA_SIZE 16 145bdcd8170SKalle Valo 146bdcd8170SKalle Valo #define AGGR_WIN_IDX(x, y) ((x) % (y)) 147bdcd8170SKalle Valo #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y)) 148bdcd8170SKalle Valo #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y)) 149bdcd8170SKalle Valo #define ATH6KL_MAX_SEQ_NO 0xFFF 150bdcd8170SKalle Valo #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO) 151bdcd8170SKalle Valo 152bdcd8170SKalle Valo #define NUM_OF_TIDS 8 153bdcd8170SKalle Valo #define AGGR_SZ_DEFAULT 8 154bdcd8170SKalle Valo 155bdcd8170SKalle Valo #define AGGR_WIN_SZ_MIN 2 156bdcd8170SKalle Valo #define AGGR_WIN_SZ_MAX 8 157bdcd8170SKalle Valo 158bdcd8170SKalle Valo #define TID_WINDOW_SZ(_x) ((_x) << 1) 159bdcd8170SKalle Valo 160bdcd8170SKalle Valo #define AGGR_NUM_OF_FREE_NETBUFS 16 161bdcd8170SKalle Valo 162bdcd8170SKalle Valo #define AGGR_RX_TIMEOUT 400 /* in ms */ 163bdcd8170SKalle Valo 164bdcd8170SKalle Valo #define WMI_TIMEOUT (2 * HZ) 165bdcd8170SKalle Valo 166bdcd8170SKalle Valo #define MBOX_YIELD_LIMIT 99 167bdcd8170SKalle Valo 168bdcd8170SKalle Valo /* configuration lags */ 169bdcd8170SKalle Valo /* 170bdcd8170SKalle Valo * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in 171bdcd8170SKalle Valo * ERP IE of beacon to determine the short premable support when 172bdcd8170SKalle Valo * sending (Re)Assoc req. 173bdcd8170SKalle Valo * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power 174bdcd8170SKalle Valo * module state transition failure events which happen during 175bdcd8170SKalle Valo * scan, to the host. 176bdcd8170SKalle Valo */ 177bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0) 178bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1) 179bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_11N BIT(2) 180bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3) 1818277de15SKalle Valo #define ATH6KL_CONF_SUSPEND_CUTPOWER BIT(4) 182bdcd8170SKalle Valo 183bdcd8170SKalle Valo enum wlan_low_pwr_state { 184bdcd8170SKalle Valo WLAN_POWER_STATE_ON, 185bdcd8170SKalle Valo WLAN_POWER_STATE_CUT_PWR, 186bdcd8170SKalle Valo WLAN_POWER_STATE_DEEP_SLEEP, 187bdcd8170SKalle Valo WLAN_POWER_STATE_WOW 188bdcd8170SKalle Valo }; 189bdcd8170SKalle Valo 190bdcd8170SKalle Valo enum sme_state { 191bdcd8170SKalle Valo SME_DISCONNECTED, 192bdcd8170SKalle Valo SME_CONNECTING, 193bdcd8170SKalle Valo SME_CONNECTED 194bdcd8170SKalle Valo }; 195bdcd8170SKalle Valo 196bdcd8170SKalle Valo struct skb_hold_q { 197bdcd8170SKalle Valo struct sk_buff *skb; 198bdcd8170SKalle Valo bool is_amsdu; 199bdcd8170SKalle Valo u16 seq_no; 200bdcd8170SKalle Valo }; 201bdcd8170SKalle Valo 202bdcd8170SKalle Valo struct rxtid { 203bdcd8170SKalle Valo bool aggr; 204bdcd8170SKalle Valo bool progress; 205bdcd8170SKalle Valo bool timer_mon; 206bdcd8170SKalle Valo u16 win_sz; 207bdcd8170SKalle Valo u16 seq_next; 208bdcd8170SKalle Valo u32 hold_q_sz; 209bdcd8170SKalle Valo struct skb_hold_q *hold_q; 210bdcd8170SKalle Valo struct sk_buff_head q; 211bdcd8170SKalle Valo spinlock_t lock; 212bdcd8170SKalle Valo }; 213bdcd8170SKalle Valo 214bdcd8170SKalle Valo struct rxtid_stats { 215bdcd8170SKalle Valo u32 num_into_aggr; 216bdcd8170SKalle Valo u32 num_dups; 217bdcd8170SKalle Valo u32 num_oow; 218bdcd8170SKalle Valo u32 num_mpdu; 219bdcd8170SKalle Valo u32 num_amsdu; 220bdcd8170SKalle Valo u32 num_delivered; 221bdcd8170SKalle Valo u32 num_timeouts; 222bdcd8170SKalle Valo u32 num_hole; 223bdcd8170SKalle Valo u32 num_bar; 224bdcd8170SKalle Valo }; 225bdcd8170SKalle Valo 226bdcd8170SKalle Valo struct aggr_info { 227bdcd8170SKalle Valo u8 aggr_sz; 228bdcd8170SKalle Valo u8 timer_scheduled; 229bdcd8170SKalle Valo struct timer_list timer; 230bdcd8170SKalle Valo struct net_device *dev; 231bdcd8170SKalle Valo struct rxtid rx_tid[NUM_OF_TIDS]; 232bdcd8170SKalle Valo struct sk_buff_head free_q; 233bdcd8170SKalle Valo struct rxtid_stats stat[NUM_OF_TIDS]; 234bdcd8170SKalle Valo }; 235bdcd8170SKalle Valo 236bdcd8170SKalle Valo struct ath6kl_wep_key { 237bdcd8170SKalle Valo u8 key_index; 238bdcd8170SKalle Valo u8 key_len; 239bdcd8170SKalle Valo u8 key[64]; 240bdcd8170SKalle Valo }; 241bdcd8170SKalle Valo 242bdcd8170SKalle Valo #define ATH6KL_KEY_SEQ_LEN 8 243bdcd8170SKalle Valo 244bdcd8170SKalle Valo struct ath6kl_key { 245bdcd8170SKalle Valo u8 key[WLAN_MAX_KEY_LEN]; 246bdcd8170SKalle Valo u8 key_len; 247bdcd8170SKalle Valo u8 seq[ATH6KL_KEY_SEQ_LEN]; 248bdcd8170SKalle Valo u8 seq_len; 249bdcd8170SKalle Valo u32 cipher; 250bdcd8170SKalle Valo }; 251bdcd8170SKalle Valo 252bdcd8170SKalle Valo struct ath6kl_node_mapping { 253bdcd8170SKalle Valo u8 mac_addr[ETH_ALEN]; 254bdcd8170SKalle Valo u8 ep_id; 255bdcd8170SKalle Valo u8 tx_pend; 256bdcd8170SKalle Valo }; 257bdcd8170SKalle Valo 258bdcd8170SKalle Valo struct ath6kl_cookie { 259bdcd8170SKalle Valo struct sk_buff *skb; 260bdcd8170SKalle Valo u32 map_no; 261bdcd8170SKalle Valo struct htc_packet htc_pkt; 262bdcd8170SKalle Valo struct ath6kl_cookie *arc_list_next; 263bdcd8170SKalle Valo }; 264bdcd8170SKalle Valo 265bdcd8170SKalle Valo struct ath6kl_sta { 266bdcd8170SKalle Valo u16 sta_flags; 267bdcd8170SKalle Valo u8 mac[ETH_ALEN]; 268bdcd8170SKalle Valo u8 aid; 269bdcd8170SKalle Valo u8 keymgmt; 270bdcd8170SKalle Valo u8 ucipher; 271bdcd8170SKalle Valo u8 auth; 272bdcd8170SKalle Valo u8 wpa_ie[ATH6KL_MAX_IE]; 273bdcd8170SKalle Valo struct sk_buff_head psq; 274bdcd8170SKalle Valo spinlock_t psq_lock; 275bdcd8170SKalle Valo }; 276bdcd8170SKalle Valo 277bdcd8170SKalle Valo struct ath6kl_version { 278bdcd8170SKalle Valo u32 target_ver; 279bdcd8170SKalle Valo u32 wlan_ver; 280bdcd8170SKalle Valo u32 abi_ver; 281bdcd8170SKalle Valo }; 282bdcd8170SKalle Valo 283bdcd8170SKalle Valo struct ath6kl_bmi { 284bdcd8170SKalle Valo u32 cmd_credits; 285bdcd8170SKalle Valo bool done_sent; 286bdcd8170SKalle Valo u8 *cmd_buf; 2871f4c894dSKalle Valo u32 max_data_size; 2881f4c894dSKalle Valo u32 max_cmd_size; 289bdcd8170SKalle Valo }; 290bdcd8170SKalle Valo 291bdcd8170SKalle Valo struct target_stats { 292bdcd8170SKalle Valo u64 tx_pkt; 293bdcd8170SKalle Valo u64 tx_byte; 294bdcd8170SKalle Valo u64 tx_ucast_pkt; 295bdcd8170SKalle Valo u64 tx_ucast_byte; 296bdcd8170SKalle Valo u64 tx_mcast_pkt; 297bdcd8170SKalle Valo u64 tx_mcast_byte; 298bdcd8170SKalle Valo u64 tx_bcast_pkt; 299bdcd8170SKalle Valo u64 tx_bcast_byte; 300bdcd8170SKalle Valo u64 tx_rts_success_cnt; 301bdcd8170SKalle Valo u64 tx_pkt_per_ac[4]; 302bdcd8170SKalle Valo 303bdcd8170SKalle Valo u64 tx_err; 304bdcd8170SKalle Valo u64 tx_fail_cnt; 305bdcd8170SKalle Valo u64 tx_retry_cnt; 306bdcd8170SKalle Valo u64 tx_mult_retry_cnt; 307bdcd8170SKalle Valo u64 tx_rts_fail_cnt; 308bdcd8170SKalle Valo 309bdcd8170SKalle Valo u64 rx_pkt; 310bdcd8170SKalle Valo u64 rx_byte; 311bdcd8170SKalle Valo u64 rx_ucast_pkt; 312bdcd8170SKalle Valo u64 rx_ucast_byte; 313bdcd8170SKalle Valo u64 rx_mcast_pkt; 314bdcd8170SKalle Valo u64 rx_mcast_byte; 315bdcd8170SKalle Valo u64 rx_bcast_pkt; 316bdcd8170SKalle Valo u64 rx_bcast_byte; 317bdcd8170SKalle Valo u64 rx_frgment_pkt; 318bdcd8170SKalle Valo 319bdcd8170SKalle Valo u64 rx_err; 320bdcd8170SKalle Valo u64 rx_crc_err; 321bdcd8170SKalle Valo u64 rx_key_cache_miss; 322bdcd8170SKalle Valo u64 rx_decrypt_err; 323bdcd8170SKalle Valo u64 rx_dupl_frame; 324bdcd8170SKalle Valo 325bdcd8170SKalle Valo u64 tkip_local_mic_fail; 326bdcd8170SKalle Valo u64 tkip_cnter_measures_invoked; 327bdcd8170SKalle Valo u64 tkip_replays; 328bdcd8170SKalle Valo u64 tkip_fmt_err; 329bdcd8170SKalle Valo u64 ccmp_fmt_err; 330bdcd8170SKalle Valo u64 ccmp_replays; 331bdcd8170SKalle Valo 332bdcd8170SKalle Valo u64 pwr_save_fail_cnt; 333bdcd8170SKalle Valo 334bdcd8170SKalle Valo u64 cs_bmiss_cnt; 335bdcd8170SKalle Valo u64 cs_low_rssi_cnt; 336bdcd8170SKalle Valo u64 cs_connect_cnt; 337bdcd8170SKalle Valo u64 cs_discon_cnt; 338bdcd8170SKalle Valo 339bdcd8170SKalle Valo s32 tx_ucast_rate; 340bdcd8170SKalle Valo s32 rx_ucast_rate; 341bdcd8170SKalle Valo 342bdcd8170SKalle Valo u32 lq_val; 343bdcd8170SKalle Valo 344bdcd8170SKalle Valo u32 wow_pkt_dropped; 345bdcd8170SKalle Valo u16 wow_evt_discarded; 346bdcd8170SKalle Valo 347bdcd8170SKalle Valo s16 noise_floor_calib; 348bdcd8170SKalle Valo s16 cs_rssi; 349bdcd8170SKalle Valo s16 cs_ave_beacon_rssi; 350bdcd8170SKalle Valo u8 cs_ave_beacon_snr; 351bdcd8170SKalle Valo u8 cs_last_roam_msec; 352bdcd8170SKalle Valo u8 cs_snr; 353bdcd8170SKalle Valo 354bdcd8170SKalle Valo u8 wow_host_pkt_wakeups; 355bdcd8170SKalle Valo u8 wow_host_evt_wakeups; 356bdcd8170SKalle Valo 357bdcd8170SKalle Valo u32 arp_received; 358bdcd8170SKalle Valo u32 arp_matched; 359bdcd8170SKalle Valo u32 arp_replied; 360bdcd8170SKalle Valo }; 361bdcd8170SKalle Valo 362bdcd8170SKalle Valo struct ath6kl_mbox_info { 363bdcd8170SKalle Valo u32 htc_addr; 364bdcd8170SKalle Valo u32 htc_ext_addr; 365bdcd8170SKalle Valo u32 htc_ext_sz; 366bdcd8170SKalle Valo 367bdcd8170SKalle Valo u32 block_size; 368bdcd8170SKalle Valo 369bdcd8170SKalle Valo u32 gmbox_addr; 370bdcd8170SKalle Valo 371bdcd8170SKalle Valo u32 gmbox_sz; 372bdcd8170SKalle Valo }; 373bdcd8170SKalle Valo 374bdcd8170SKalle Valo /* 375bdcd8170SKalle Valo * 802.11i defines an extended IV for use with non-WEP ciphers. 376bdcd8170SKalle Valo * When the EXTIV bit is set in the key id byte an additional 377bdcd8170SKalle Valo * 4 bytes immediately follow the IV for TKIP. For CCMP the 378bdcd8170SKalle Valo * EXTIV bit is likewise set but the 8 bytes represent the 379bdcd8170SKalle Valo * CCMP header rather than IV+extended-IV. 380bdcd8170SKalle Valo */ 381bdcd8170SKalle Valo 382bdcd8170SKalle Valo #define ATH6KL_KEYBUF_SIZE 16 383bdcd8170SKalle Valo #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */ 384bdcd8170SKalle Valo 385bdcd8170SKalle Valo #define ATH6KL_KEY_XMIT 0x01 386bdcd8170SKalle Valo #define ATH6KL_KEY_RECV 0x02 387bdcd8170SKalle Valo #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */ 388bdcd8170SKalle Valo 3899a5b1318SJouni Malinen /* Initial group key for AP mode */ 390bdcd8170SKalle Valo struct ath6kl_req_key { 3919a5b1318SJouni Malinen bool valid; 3929a5b1318SJouni Malinen u8 key_index; 3939a5b1318SJouni Malinen int key_type; 3949a5b1318SJouni Malinen u8 key[WLAN_MAX_KEY_LEN]; 3959a5b1318SJouni Malinen u8 key_len; 396bdcd8170SKalle Valo }; 397bdcd8170SKalle Valo 39877eab1e9SKalle Valo enum ath6kl_hif_type { 39977eab1e9SKalle Valo ATH6KL_HIF_TYPE_SDIO, 40077eab1e9SKalle Valo ATH6KL_HIF_TYPE_USB, 40177eab1e9SKalle Valo }; 40277eab1e9SKalle Valo 40371f96ee6SKalle Valo /* 40471f96ee6SKalle Valo * Driver's maximum limit, note that some firmwares support only one vif 40571f96ee6SKalle Valo * and the runtime (current) limit must be checked from ar->vif_max. 40671f96ee6SKalle Valo */ 40771f96ee6SKalle Valo #define ATH6KL_VIF_MAX 1 408334234b5SVasanthakumar Thiagarajan 40959c98449SVasanthakumar Thiagarajan /* vif flags info */ 41059c98449SVasanthakumar Thiagarajan enum ath6kl_vif_state { 41159c98449SVasanthakumar Thiagarajan CONNECTED, 41259c98449SVasanthakumar Thiagarajan CONNECT_PEND, 41359c98449SVasanthakumar Thiagarajan WMM_ENABLED, 41459c98449SVasanthakumar Thiagarajan NETQ_STOPPED, 41559c98449SVasanthakumar Thiagarajan DTIM_EXPIRED, 41659c98449SVasanthakumar Thiagarajan NETDEV_REGISTERED, 41759c98449SVasanthakumar Thiagarajan CLEAR_BSSFILTER_ON_BEACON, 41859c98449SVasanthakumar Thiagarajan DTIM_PERIOD_AVAIL, 41959c98449SVasanthakumar Thiagarajan WLAN_ENABLED, 420b95907a7SVasanthakumar Thiagarajan STATS_UPDATE_PEND, 42159c98449SVasanthakumar Thiagarajan }; 42259c98449SVasanthakumar Thiagarajan 423108438bcSVasanthakumar Thiagarajan struct ath6kl_vif { 424990bd915SVasanthakumar Thiagarajan struct list_head list; 425108438bcSVasanthakumar Thiagarajan struct wireless_dev wdev; 426108438bcSVasanthakumar Thiagarajan struct net_device *ndev; 427108438bcSVasanthakumar Thiagarajan struct ath6kl *ar; 428478ac027SVasanthakumar Thiagarajan /* Lock to protect vif specific net_stats and flags */ 429478ac027SVasanthakumar Thiagarajan spinlock_t if_lock; 430334234b5SVasanthakumar Thiagarajan u8 fw_vif_idx; 43159c98449SVasanthakumar Thiagarajan unsigned long flags; 4323450334fSVasanthakumar Thiagarajan int ssid_len; 4333450334fSVasanthakumar Thiagarajan u8 ssid[IEEE80211_MAX_SSID_LEN]; 4343450334fSVasanthakumar Thiagarajan u8 dot11_auth_mode; 4353450334fSVasanthakumar Thiagarajan u8 auth_mode; 4363450334fSVasanthakumar Thiagarajan u8 prwise_crypto; 4373450334fSVasanthakumar Thiagarajan u8 prwise_crypto_len; 4383450334fSVasanthakumar Thiagarajan u8 grp_crypto; 4393450334fSVasanthakumar Thiagarajan u8 grp_crypto_len; 4403450334fSVasanthakumar Thiagarajan u8 def_txkey_index; 441f5938f24SVasanthakumar Thiagarajan u8 next_mode; 442f5938f24SVasanthakumar Thiagarajan u8 nw_type; 4438c8b65e3SVasanthakumar Thiagarajan u8 bssid[ETH_ALEN]; 4448c8b65e3SVasanthakumar Thiagarajan u8 req_bssid[ETH_ALEN]; 445f74bac54SVasanthakumar Thiagarajan u16 ch_hint; 446f74bac54SVasanthakumar Thiagarajan u16 bss_ch; 4476f2a73f9SVasanthakumar Thiagarajan struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1]; 4486f2a73f9SVasanthakumar Thiagarajan struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1]; 4492132c69cSVasanthakumar Thiagarajan struct aggr_info *aggr_cntxt; 450de3ad713SVasanthakumar Thiagarajan struct timer_list disconnect_timer; 45114ee6f6bSVasanthakumar Thiagarajan struct cfg80211_scan_request *scan_req; 45214ee6f6bSVasanthakumar Thiagarajan enum sme_state sme_state; 453cf5333d7SVasanthakumar Thiagarajan int reconnect_flag; 4541052261eSJouni Malinen u32 last_roc_id; 4551052261eSJouni Malinen u32 last_cancel_roc_id; 456cf5333d7SVasanthakumar Thiagarajan u32 send_action_id; 457cf5333d7SVasanthakumar Thiagarajan bool probe_req_report; 458cf5333d7SVasanthakumar Thiagarajan u16 next_chan; 459cf5333d7SVasanthakumar Thiagarajan u16 assoc_bss_beacon_int; 460cf5333d7SVasanthakumar Thiagarajan u8 assoc_bss_dtim_period; 461b95907a7SVasanthakumar Thiagarajan struct net_device_stats net_stats; 462b95907a7SVasanthakumar Thiagarajan struct target_stats target_stats; 463108438bcSVasanthakumar Thiagarajan }; 464108438bcSVasanthakumar Thiagarajan 4656cb3c714SRaja Mani #define WOW_LIST_ID 0 4666cb3c714SRaja Mani #define WOW_HOST_REQ_DELAY 500 /* ms */ 4676cb3c714SRaja Mani 468bdcd8170SKalle Valo /* Flag info */ 46959c98449SVasanthakumar Thiagarajan enum ath6kl_dev_state { 47059c98449SVasanthakumar Thiagarajan WMI_ENABLED, 47159c98449SVasanthakumar Thiagarajan WMI_READY, 47259c98449SVasanthakumar Thiagarajan WMI_CTRL_EP_FULL, 47359c98449SVasanthakumar Thiagarajan TESTMODE, 47459c98449SVasanthakumar Thiagarajan DESTROY_IN_PROGRESS, 47559c98449SVasanthakumar Thiagarajan SKIP_SCAN, 47659c98449SVasanthakumar Thiagarajan ROAM_TBL_PEND, 4775fe4dffbSKalle Valo FIRST_BOOT, 47859c98449SVasanthakumar Thiagarajan }; 479bdcd8170SKalle Valo 48076a9fbe2SKalle Valo enum ath6kl_state { 48176a9fbe2SKalle Valo ATH6KL_STATE_OFF, 48276a9fbe2SKalle Valo ATH6KL_STATE_ON, 48376a9fbe2SKalle Valo ATH6KL_STATE_DEEPSLEEP, 484b4b2a0b1SKalle Valo ATH6KL_STATE_CUTPOWER, 485dd6c0c63SRaja Mani ATH6KL_STATE_WOW, 48676a9fbe2SKalle Valo }; 48776a9fbe2SKalle Valo 488bdcd8170SKalle Valo struct ath6kl { 489bdcd8170SKalle Valo struct device *dev; 490be98e3a4SVasanthakumar Thiagarajan struct wiphy *wiphy; 49176a9fbe2SKalle Valo 49276a9fbe2SKalle Valo enum ath6kl_state state; 49376a9fbe2SKalle Valo 494bdcd8170SKalle Valo struct ath6kl_bmi bmi; 495bdcd8170SKalle Valo const struct ath6kl_hif_ops *hif_ops; 496bdcd8170SKalle Valo struct wmi *wmi; 497bdcd8170SKalle Valo int tx_pending[ENDPOINT_MAX]; 498bdcd8170SKalle Valo int total_tx_data_pend; 499bdcd8170SKalle Valo struct htc_target *htc_target; 50077eab1e9SKalle Valo enum ath6kl_hif_type hif_type; 501bdcd8170SKalle Valo void *hif_priv; 502990bd915SVasanthakumar Thiagarajan struct list_head vif_list; 503990bd915SVasanthakumar Thiagarajan /* Lock to avoid race in vif_list entries among add/del/traverse */ 504990bd915SVasanthakumar Thiagarajan spinlock_t list_lock; 50555055976SVasanthakumar Thiagarajan u8 num_vif; 506368b1b0fSKalle Valo unsigned int vif_max; 5073226f68aSVasanthakumar Thiagarajan u8 max_norm_iface; 50855055976SVasanthakumar Thiagarajan u8 avail_idx_map; 509bdcd8170SKalle Valo spinlock_t lock; 510bdcd8170SKalle Valo struct semaphore sem; 511bdcd8170SKalle Valo u16 listen_intvl_b; 512bdcd8170SKalle Valo u16 listen_intvl_t; 513e5090444SVivek Natarajan u8 lrssi_roam_threshold; 514bdcd8170SKalle Valo struct ath6kl_version version; 515bdcd8170SKalle Valo u32 target_type; 516bdcd8170SKalle Valo u8 tx_pwr; 517bdcd8170SKalle Valo struct ath6kl_node_mapping node_map[MAX_NODE_NUM]; 518bdcd8170SKalle Valo u8 ibss_ps_enable; 51955055976SVasanthakumar Thiagarajan bool ibss_if_active; 520bdcd8170SKalle Valo u8 node_num; 521bdcd8170SKalle Valo u8 next_ep_id; 522bdcd8170SKalle Valo struct ath6kl_cookie *cookie_list; 523bdcd8170SKalle Valo u32 cookie_count; 524bdcd8170SKalle Valo enum htc_endpoint_id ac2ep_map[WMM_NUM_AC]; 525bdcd8170SKalle Valo bool ac_stream_active[WMM_NUM_AC]; 526bdcd8170SKalle Valo u8 ac_stream_pri_map[WMM_NUM_AC]; 527bdcd8170SKalle Valo u8 hiac_stream_active_pri; 528bdcd8170SKalle Valo u8 ep2ac_map[ENDPOINT_MAX]; 529bdcd8170SKalle Valo enum htc_endpoint_id ctrl_ep; 5303c370398SKalle Valo struct ath6kl_htc_credit_info credit_state_info; 531bdcd8170SKalle Valo u32 connect_ctrl_flags; 532bdcd8170SKalle Valo u32 user_key_ctrl; 533bdcd8170SKalle Valo u8 usr_bss_filter; 534bdcd8170SKalle Valo struct ath6kl_sta sta_list[AP_MAX_NUM_STA]; 535bdcd8170SKalle Valo u8 sta_list_index; 536bdcd8170SKalle Valo struct ath6kl_req_key ap_mode_bkey; 537bdcd8170SKalle Valo struct sk_buff_head mcastpsq; 538bdcd8170SKalle Valo spinlock_t mcastpsq_lock; 539bdcd8170SKalle Valo u8 intra_bss; 540bdcd8170SKalle Valo struct wmi_ap_mode_stat ap_stats; 541bdcd8170SKalle Valo u8 ap_country_code[3]; 542bdcd8170SKalle Valo struct list_head amsdu_rx_buffer_queue; 543bdcd8170SKalle Valo u8 rx_meta_ver; 544bdcd8170SKalle Valo enum wlan_low_pwr_state wlan_pwr_state; 545bdcd8170SKalle Valo struct wmi_scan_params_cmd sc_params; 546d66ea4f9SVasanthakumar Thiagarajan u8 mac_addr[ETH_ALEN]; 547bdcd8170SKalle Valo #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4 548003353b0SKalle Valo struct { 549003353b0SKalle Valo void *rx_report; 550003353b0SKalle Valo size_t rx_report_len; 551003353b0SKalle Valo } tm; 552003353b0SKalle Valo 553856f4b31SKalle Valo struct ath6kl_hw { 554856f4b31SKalle Valo u32 id; 555293badf4SKalle Valo const char *name; 556a01ac414SKalle Valo u32 dataset_patch_addr; 557a01ac414SKalle Valo u32 app_load_addr; 558a01ac414SKalle Valo u32 app_start_override_addr; 559991b27eaSKalle Valo u32 board_ext_data_addr; 560991b27eaSKalle Valo u32 reserved_ram_size; 5610d4d72bfSKalle Valo u32 board_addr; 562d1a9421dSKalle Valo 563d1a9421dSKalle Valo const char *fw_otp; 564d1a9421dSKalle Valo const char *fw; 565d1a9421dSKalle Valo const char *fw_tcmd; 566d1a9421dSKalle Valo const char *fw_patch; 567d1a9421dSKalle Valo const char *fw_api2; 568d1a9421dSKalle Valo const char *fw_board; 569d1a9421dSKalle Valo const char *fw_default_board; 570a01ac414SKalle Valo } hw; 571a01ac414SKalle Valo 572bdcd8170SKalle Valo u16 conf_flags; 573bdcd8170SKalle Valo wait_queue_head_t event_wq; 574bdcd8170SKalle Valo struct ath6kl_mbox_info mbox_info; 575bdcd8170SKalle Valo 576bdcd8170SKalle Valo struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM]; 577bdcd8170SKalle Valo unsigned long flag; 578bdcd8170SKalle Valo 579bdcd8170SKalle Valo u8 *fw_board; 580bdcd8170SKalle Valo size_t fw_board_len; 581bdcd8170SKalle Valo 582bdcd8170SKalle Valo u8 *fw_otp; 583bdcd8170SKalle Valo size_t fw_otp_len; 584bdcd8170SKalle Valo 585bdcd8170SKalle Valo u8 *fw; 586bdcd8170SKalle Valo size_t fw_len; 587bdcd8170SKalle Valo 588bdcd8170SKalle Valo u8 *fw_patch; 589bdcd8170SKalle Valo size_t fw_patch_len; 590bdcd8170SKalle Valo 59197e0496dSKalle Valo unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN]; 59297e0496dSKalle Valo 593bdcd8170SKalle Valo struct workqueue_struct *ath6kl_wq; 5947c3075e9SVasanthakumar Thiagarajan 595d999ba3eSVasanthakumar Thiagarajan struct dentry *debugfs_phy; 5966a7c9badSJouni Malinen 5976bbc7c35SJouni Malinen bool p2p; 5986bbc7c35SJouni Malinen 599bdf5396bSKalle Valo #ifdef CONFIG_ATH6KL_DEBUG 600bdf5396bSKalle Valo struct { 601bdf5396bSKalle Valo struct circ_buf fwlog_buf; 602bdf5396bSKalle Valo spinlock_t fwlog_lock; 603bdf5396bSKalle Valo void *fwlog_tmp; 604939f1cceSKalle Valo u32 fwlog_mask; 60591d57de5SVasanthakumar Thiagarajan unsigned int dbgfs_diag_reg; 606252c068bSVasanthakumar Thiagarajan u32 diag_reg_addr_wr; 607252c068bSVasanthakumar Thiagarajan u32 diag_reg_val_wr; 6089a730834SKalle Valo 6099a730834SKalle Valo struct { 6109a730834SKalle Valo unsigned int invalid_rate; 6119a730834SKalle Valo } war_stats; 6124b28a80dSJouni Malinen 6134b28a80dSJouni Malinen u8 *roam_tbl; 6144b28a80dSJouni Malinen unsigned int roam_tbl_len; 615ff0b0075SJouni Malinen 616ff0b0075SJouni Malinen u8 keepalive; 617ff0b0075SJouni Malinen u8 disc_timeout; 618bdf5396bSKalle Valo } debug; 619bdf5396bSKalle Valo #endif /* CONFIG_ATH6KL_DEBUG */ 620bdcd8170SKalle Valo }; 621bdcd8170SKalle Valo 622bdcd8170SKalle Valo static inline void *ath6kl_priv(struct net_device *dev) 623bdcd8170SKalle Valo { 624108438bcSVasanthakumar Thiagarajan return ((struct ath6kl_vif *) netdev_priv(dev))->ar; 625bdcd8170SKalle Valo } 626bdcd8170SKalle Valo 627bc07ddb2SKalle Valo static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar, 628bc07ddb2SKalle Valo u32 item_offset) 629bc07ddb2SKalle Valo { 630bc07ddb2SKalle Valo u32 addr = 0; 631bc07ddb2SKalle Valo 632bc07ddb2SKalle Valo if (ar->target_type == TARGET_TYPE_AR6003) 633bc07ddb2SKalle Valo addr = ATH6KL_AR6003_HI_START_ADDR + item_offset; 634bc07ddb2SKalle Valo else if (ar->target_type == TARGET_TYPE_AR6004) 635bc07ddb2SKalle Valo addr = ATH6KL_AR6004_HI_START_ADDR + item_offset; 636bc07ddb2SKalle Valo 637bc07ddb2SKalle Valo return addr; 638bc07ddb2SKalle Valo } 639bc07ddb2SKalle Valo 640bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar); 641bdcd8170SKalle Valo void ath6kl_detect_error(unsigned long ptr); 642bdcd8170SKalle Valo void disconnect_timer_handler(unsigned long ptr); 643bdcd8170SKalle Valo void init_netdev(struct net_device *dev); 644bdcd8170SKalle Valo void ath6kl_cookie_init(struct ath6kl *ar); 645bdcd8170SKalle Valo void ath6kl_cookie_cleanup(struct ath6kl *ar); 646bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet); 647bdcd8170SKalle Valo void ath6kl_tx_complete(void *context, struct list_head *packet_queue); 648bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target, 649bdcd8170SKalle Valo struct htc_packet *packet); 650bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar); 651bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar); 652f9ea0753SVasanthakumar Thiagarajan int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value); 653addb44beSKalle Valo int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length); 654addb44beSKalle Valo int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value); 655addb44beSKalle Valo int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length); 656bc07ddb2SKalle Valo int ath6kl_read_fwlogs(struct ath6kl *ar); 657e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif); 658bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar); 659bdcd8170SKalle Valo 660bdcd8170SKalle Valo struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar); 661bdcd8170SKalle Valo void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie); 662bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev); 663bdcd8170SKalle Valo 664bdcd8170SKalle Valo struct aggr_info *aggr_init(struct net_device *dev); 665bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target, 666bdcd8170SKalle Valo enum htc_endpoint_id endpoint); 667bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count); 668bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target, 669bdcd8170SKalle Valo enum htc_endpoint_id endpoint, 670bdcd8170SKalle Valo int len); 671bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info); 672bdcd8170SKalle Valo void aggr_reset_state(struct aggr_info *aggr_info); 673bdcd8170SKalle Valo 6746765d0aaSVasanthakumar Thiagarajan struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 * node_addr); 675bdcd8170SKalle Valo struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid); 676bdcd8170SKalle Valo 677bdcd8170SKalle Valo void ath6kl_ready_event(void *devt, u8 * datap, u32 sw_ver, u32 abi_ver); 678bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb, 679bdcd8170SKalle Valo enum htc_endpoint_id eid); 680240d2799SVasanthakumar Thiagarajan void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel, 681bdcd8170SKalle Valo u8 *bssid, u16 listen_int, 682bdcd8170SKalle Valo u16 beacon_int, enum network_type net_type, 683bdcd8170SKalle Valo u8 beacon_ie_len, u8 assoc_req_len, 684bdcd8170SKalle Valo u8 assoc_resp_len, u8 *assoc_info); 685240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel); 686240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr, 687572e27c0SJouni Malinen u8 keymgmt, u8 ucipher, u8 auth, 688572e27c0SJouni Malinen u8 assoc_req_len, u8 *assoc_info); 689240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason, 690bdcd8170SKalle Valo u8 *bssid, u8 assoc_resp_len, 691bdcd8170SKalle Valo u8 *assoc_info, u16 prot_reason_status); 692240d2799SVasanthakumar Thiagarajan void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast); 693bdcd8170SKalle Valo void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr); 694240d2799SVasanthakumar Thiagarajan void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status); 695240d2799SVasanthakumar Thiagarajan void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len); 696bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active); 697bdcd8170SKalle Valo enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac); 698bdcd8170SKalle Valo 699240d2799SVasanthakumar Thiagarajan void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid); 700bdcd8170SKalle Valo 701240d2799SVasanthakumar Thiagarajan void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif); 702240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect(struct ath6kl_vif *vif); 703240d2799SVasanthakumar Thiagarajan void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid); 704240d2799SVasanthakumar Thiagarajan void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no, 705bdcd8170SKalle Valo u8 win_sz); 706bdcd8170SKalle Valo void ath6kl_wakeup_event(void *dev); 707bdcd8170SKalle Valo 7086db8fa53SVasanthakumar Thiagarajan void ath6kl_reset_device(struct ath6kl *ar, u32 target_type, 7096db8fa53SVasanthakumar Thiagarajan bool wait_fot_compltn, bool cold_reset); 710e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif); 711108438bcSVasanthakumar Thiagarajan void ath6kl_deinit_if_data(struct ath6kl_vif *vif); 7128dafb70eSVasanthakumar Thiagarajan void ath6kl_core_free(struct ath6kl *ar); 713990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar); 71455055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready); 7155fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar); 7165fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar); 717a918fb3cSRaja Mani void ath6kl_check_wow_status(struct ath6kl *ar); 7185fe4dffbSKalle Valo 719bdcd8170SKalle Valo #endif /* CORE_H */ 720