1bdcd8170SKalle Valo /*
2bdcd8170SKalle Valo  * Copyright (c) 2010-2011 Atheros Communications Inc.
31b2df407SVasanthakumar Thiagarajan  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
4bdcd8170SKalle Valo  *
5bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
6bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
7bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
8bdcd8170SKalle Valo  *
9bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16bdcd8170SKalle Valo  */
17bdcd8170SKalle Valo 
18bdcd8170SKalle Valo #ifndef CORE_H
19bdcd8170SKalle Valo #define CORE_H
20bdcd8170SKalle Valo 
21bdcd8170SKalle Valo #include <linux/etherdevice.h>
22bdcd8170SKalle Valo #include <linux/rtnetlink.h>
23bdcd8170SKalle Valo #include <linux/firmware.h>
24bdcd8170SKalle Valo #include <linux/sched.h>
25bdf5396bSKalle Valo #include <linux/circ_buf.h>
26bdcd8170SKalle Valo #include <net/cfg80211.h>
27bdcd8170SKalle Valo #include "htc.h"
28bdcd8170SKalle Valo #include "wmi.h"
29bdcd8170SKalle Valo #include "bmi.h"
30bc07ddb2SKalle Valo #include "target.h"
31bdcd8170SKalle Valo 
32bdcd8170SKalle Valo #define MAX_ATH6KL                        1
33bdcd8170SKalle Valo #define ATH6KL_MAX_RX_BUFFERS             16
34bdcd8170SKalle Valo #define ATH6KL_BUFFER_SIZE                1664
35bdcd8170SKalle Valo #define ATH6KL_MAX_AMSDU_RX_BUFFERS       4
36bdcd8170SKalle Valo #define ATH6KL_AMSDU_REFILL_THRESHOLD     3
37bdcd8170SKalle Valo #define ATH6KL_AMSDU_BUFFER_SIZE     (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128)
38bdcd8170SKalle Valo #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN	1508
39bdcd8170SKalle Valo #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN	46
40bdcd8170SKalle Valo 
41bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_INIT     0
42bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_RUN      1
43bdcd8170SKalle Valo 
44bdcd8170SKalle Valo #define ATH6KL_TX_TIMEOUT      10
45bdcd8170SKalle Valo #define ATH6KL_MAX_ENDPOINTS   4
46bdcd8170SKalle Valo #define MAX_NODE_NUM           15
47bdcd8170SKalle Valo 
48c1762a3fSThirumalai Pachamuthu #define ATH6KL_APSD_ALL_FRAME		0xFFFF
49c1762a3fSThirumalai Pachamuthu #define ATH6KL_APSD_NUM_OF_AC		0x4
50c1762a3fSThirumalai Pachamuthu #define ATH6KL_APSD_FRAME_MASK		0xF
51c1762a3fSThirumalai Pachamuthu 
521df94a85SVasanthakumar Thiagarajan /* Extra bytes for htc header alignment */
531df94a85SVasanthakumar Thiagarajan #define ATH6KL_HTC_ALIGN_BYTES 3
541df94a85SVasanthakumar Thiagarajan 
55bdcd8170SKalle Valo /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */
56bdcd8170SKalle Valo #define MAX_DEF_COOKIE_NUM                180
57bdcd8170SKalle Valo #define MAX_HI_COOKIE_NUM                 18	/* 10% of MAX_COOKIE_NUM */
58bdcd8170SKalle Valo #define MAX_COOKIE_NUM                 (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM)
59bdcd8170SKalle Valo 
60bdcd8170SKalle Valo #define MAX_DEFAULT_SEND_QUEUE_DEPTH      (MAX_DEF_COOKIE_NUM / WMM_NUM_AC)
61bdcd8170SKalle Valo 
62bdcd8170SKalle Valo #define DISCON_TIMER_INTVAL               10000  /* in msec */
638232736dSSujith Manoharan #define A_DEFAULT_LISTEN_INTERVAL         1      /* beacon intervals */
64bdcd8170SKalle Valo #define A_MAX_WOW_LISTEN_INTERVAL         1000
65bdcd8170SKalle Valo 
6613423c31SVasanthakumar Thiagarajan /* Channel dwell time in fg scan */
6713423c31SVasanthakumar Thiagarajan #define ATH6KL_FG_SCAN_INTERVAL		50 /* in ms */
6813423c31SVasanthakumar Thiagarajan 
6950d41234SKalle Valo /* includes also the null byte */
7050d41234SKalle Valo #define ATH6KL_FIRMWARE_MAGIC               "QCA-ATH6KL"
7150d41234SKalle Valo 
7250d41234SKalle Valo enum ath6kl_fw_ie_type {
7350d41234SKalle Valo 	ATH6KL_FW_IE_FW_VERSION = 0,
7450d41234SKalle Valo 	ATH6KL_FW_IE_TIMESTAMP = 1,
7550d41234SKalle Valo 	ATH6KL_FW_IE_OTP_IMAGE = 2,
7650d41234SKalle Valo 	ATH6KL_FW_IE_FW_IMAGE = 3,
7750d41234SKalle Valo 	ATH6KL_FW_IE_PATCH_IMAGE = 4,
788a137480SKalle Valo 	ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5,
7997e0496dSKalle Valo 	ATH6KL_FW_IE_CAPABILITIES = 6,
801b4304daSKalle Valo 	ATH6KL_FW_IE_PATCH_ADDR = 7,
8103ef0250SKalle Valo 	ATH6KL_FW_IE_BOARD_ADDR = 8,
82368b1b0fSKalle Valo 	ATH6KL_FW_IE_VIF_MAX = 9,
8350d41234SKalle Valo };
8450d41234SKalle Valo 
8597e0496dSKalle Valo enum ath6kl_fw_capability {
8697e0496dSKalle Valo 	ATH6KL_FW_CAPABILITY_HOST_P2P = 0,
8710509f90SKalle Valo 	ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1,
8897e0496dSKalle Valo 
893ca9d1fcSAarthi Thiruvengadam 	/*
903ca9d1fcSAarthi Thiruvengadam 	 * Firmware is capable of supporting P2P mgmt operations on a
913ca9d1fcSAarthi Thiruvengadam 	 * station interface. After group formation, the station
923ca9d1fcSAarthi Thiruvengadam 	 * interface will become a P2P client/GO interface as the case may be
933ca9d1fcSAarthi Thiruvengadam 	 */
943ca9d1fcSAarthi Thiruvengadam 	ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
953ca9d1fcSAarthi Thiruvengadam 
9697e0496dSKalle Valo 	/* this needs to be last */
9797e0496dSKalle Valo 	ATH6KL_FW_CAPABILITY_MAX,
9897e0496dSKalle Valo };
9997e0496dSKalle Valo 
10097e0496dSKalle Valo #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32)
10197e0496dSKalle Valo 
10250d41234SKalle Valo struct ath6kl_fw_ie {
10350d41234SKalle Valo 	__le32 id;
10450d41234SKalle Valo 	__le32 len;
10550d41234SKalle Valo 	u8 data[0];
10650d41234SKalle Valo };
10750d41234SKalle Valo 
108c0038972SKalle Valo #define ATH6KL_FW_API2_FILE "fw-2.bin"
10965a8b4ccSKalle Valo #define ATH6KL_FW_API3_FILE "fw-3.bin"
110c0038972SKalle Valo 
111bdcd8170SKalle Valo /* AR6003 1.0 definitions */
1120d0192baSKalle Valo #define AR6003_HW_1_0_VERSION                 0x300002ba
113bdcd8170SKalle Valo 
114bdcd8170SKalle Valo /* AR6003 2.0 definitions */
1150d0192baSKalle Valo #define AR6003_HW_2_0_VERSION                 0x30000384
1160d0192baSKalle Valo #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS  0x57e910
117c0038972SKalle Valo #define AR6003_HW_2_0_FW_DIR			"ath6k/AR6003/hw2.0"
118c0038972SKalle Valo #define AR6003_HW_2_0_OTP_FILE			"otp.bin.z77"
119c0038972SKalle Valo #define AR6003_HW_2_0_FIRMWARE_FILE		"athwlan.bin.z77"
120c0038972SKalle Valo #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE	"athtcmd_ram.bin"
121c0038972SKalle Valo #define AR6003_HW_2_0_PATCH_FILE		"data.patch.bin"
1220d0192baSKalle Valo #define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin"
1230d0192baSKalle Valo #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \
1240d0192baSKalle Valo 			"ath6k/AR6003/hw2.0/bdata.SD31.bin"
125bdcd8170SKalle Valo 
126bdcd8170SKalle Valo /* AR6003 3.0 definitions */
1270d0192baSKalle Valo #define AR6003_HW_2_1_1_VERSION                 0x30000582
128c0038972SKalle Valo #define AR6003_HW_2_1_1_FW_DIR			"ath6k/AR6003/hw2.1.1"
129c0038972SKalle Valo #define AR6003_HW_2_1_1_OTP_FILE		"otp.bin"
130c0038972SKalle Valo #define AR6003_HW_2_1_1_FIRMWARE_FILE		"athwlan.bin"
131c0038972SKalle Valo #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE	"athtcmd_ram.bin"
132cd23c1c9SAlex Yang #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE	"utf.bin"
133cd23c1c9SAlex Yang #define AR6003_HW_2_1_1_TESTSCRIPT_FILE	"nullTestFlow.bin"
134c0038972SKalle Valo #define AR6003_HW_2_1_1_PATCH_FILE		"data.patch.bin"
1350d0192baSKalle Valo #define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin"
1360d0192baSKalle Valo #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE	\
137bdcd8170SKalle Valo 			"ath6k/AR6003/hw2.1.1/bdata.SD31.bin"
138bdcd8170SKalle Valo 
13931024d99SKevin Fang /* AR6004 1.0 definitions */
1400d0192baSKalle Valo #define AR6004_HW_1_0_VERSION                 0x30000623
141c0038972SKalle Valo #define AR6004_HW_1_0_FW_DIR			"ath6k/AR6004/hw1.0"
142c0038972SKalle Valo #define AR6004_HW_1_0_FIRMWARE_FILE		"fw.ram.bin"
1430d0192baSKalle Valo #define AR6004_HW_1_0_BOARD_DATA_FILE         "ath6k/AR6004/hw1.0/bdata.bin"
1440d0192baSKalle Valo #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \
145d5720e59SKalle Valo 	"ath6k/AR6004/hw1.0/bdata.DB132.bin"
146d5720e59SKalle Valo 
147d5720e59SKalle Valo /* AR6004 1.1 definitions */
1480d0192baSKalle Valo #define AR6004_HW_1_1_VERSION                 0x30000001
149c0038972SKalle Valo #define AR6004_HW_1_1_FW_DIR			"ath6k/AR6004/hw1.1"
150c0038972SKalle Valo #define AR6004_HW_1_1_FIRMWARE_FILE		"fw.ram.bin"
1510d0192baSKalle Valo #define AR6004_HW_1_1_BOARD_DATA_FILE         "ath6k/AR6004/hw1.1/bdata.bin"
1520d0192baSKalle Valo #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \
153d5720e59SKalle Valo 	"ath6k/AR6004/hw1.1/bdata.DB132.bin"
15431024d99SKevin Fang 
155bdcd8170SKalle Valo /* Per STA data, used in AP mode */
156bdcd8170SKalle Valo #define STA_PS_AWAKE		BIT(0)
157bdcd8170SKalle Valo #define	STA_PS_SLEEP		BIT(1)
158bdcd8170SKalle Valo #define	STA_PS_POLLED		BIT(2)
159c1762a3fSThirumalai Pachamuthu #define STA_PS_APSD_TRIGGER     BIT(3)
160c1762a3fSThirumalai Pachamuthu #define STA_PS_APSD_EOSP        BIT(4)
161bdcd8170SKalle Valo 
162bdcd8170SKalle Valo /* HTC TX packet tagging definitions */
163bdcd8170SKalle Valo #define ATH6KL_CONTROL_PKT_TAG    HTC_TX_PACKET_TAG_USER_DEFINED
164bdcd8170SKalle Valo #define ATH6KL_DATA_PKT_TAG       (ATH6KL_CONTROL_PKT_TAG + 1)
165bdcd8170SKalle Valo 
166bdcd8170SKalle Valo #define AR6003_CUST_DATA_SIZE 16
167bdcd8170SKalle Valo 
168bdcd8170SKalle Valo #define AGGR_WIN_IDX(x, y)          ((x) % (y))
169bdcd8170SKalle Valo #define AGGR_INCR_IDX(x, y)         AGGR_WIN_IDX(((x) + 1), (y))
170bdcd8170SKalle Valo #define AGGR_DCRM_IDX(x, y)         AGGR_WIN_IDX(((x) - 1), (y))
171bdcd8170SKalle Valo #define ATH6KL_MAX_SEQ_NO		0xFFF
172bdcd8170SKalle Valo #define ATH6KL_NEXT_SEQ_NO(x)		(((x) + 1) & ATH6KL_MAX_SEQ_NO)
173bdcd8170SKalle Valo 
174bdcd8170SKalle Valo #define NUM_OF_TIDS         8
175bdcd8170SKalle Valo #define AGGR_SZ_DEFAULT     8
176bdcd8170SKalle Valo 
177bdcd8170SKalle Valo #define AGGR_WIN_SZ_MIN     2
178bdcd8170SKalle Valo #define AGGR_WIN_SZ_MAX     8
179bdcd8170SKalle Valo 
180bdcd8170SKalle Valo #define TID_WINDOW_SZ(_x)   ((_x) << 1)
181bdcd8170SKalle Valo 
182bdcd8170SKalle Valo #define AGGR_NUM_OF_FREE_NETBUFS    16
183bdcd8170SKalle Valo 
184bdcd8170SKalle Valo #define AGGR_RX_TIMEOUT     400	/* in ms */
185bdcd8170SKalle Valo 
186bdcd8170SKalle Valo #define WMI_TIMEOUT (2 * HZ)
187bdcd8170SKalle Valo 
188bdcd8170SKalle Valo #define MBOX_YIELD_LIMIT 99
189bdcd8170SKalle Valo 
190bdcd8170SKalle Valo /* configuration lags */
191bdcd8170SKalle Valo /*
192bdcd8170SKalle Valo  * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in
193bdcd8170SKalle Valo  * ERP IE of beacon to determine the short premable support when
194bdcd8170SKalle Valo  * sending (Re)Assoc req.
195bdcd8170SKalle Valo  * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power
196bdcd8170SKalle Valo  * module state transition failure events which happen during
197bdcd8170SKalle Valo  * scan, to the host.
198bdcd8170SKalle Valo  */
199bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_ERP_BARKER		BIT(0)
200bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN  BIT(1)
201bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_11N			BIT(2)
202bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_TX_BURST		BIT(3)
203e390af77SRaja Mani #define ATH6KL_CONF_UART_DEBUG			BIT(4)
204bdcd8170SKalle Valo 
205bdcd8170SKalle Valo enum wlan_low_pwr_state {
206bdcd8170SKalle Valo 	WLAN_POWER_STATE_ON,
207bdcd8170SKalle Valo 	WLAN_POWER_STATE_CUT_PWR,
208bdcd8170SKalle Valo 	WLAN_POWER_STATE_DEEP_SLEEP,
209bdcd8170SKalle Valo 	WLAN_POWER_STATE_WOW
210bdcd8170SKalle Valo };
211bdcd8170SKalle Valo 
212bdcd8170SKalle Valo enum sme_state {
213bdcd8170SKalle Valo 	SME_DISCONNECTED,
214bdcd8170SKalle Valo 	SME_CONNECTING,
215bdcd8170SKalle Valo 	SME_CONNECTED
216bdcd8170SKalle Valo };
217bdcd8170SKalle Valo 
218bdcd8170SKalle Valo struct skb_hold_q {
219bdcd8170SKalle Valo 	struct sk_buff *skb;
220bdcd8170SKalle Valo 	bool is_amsdu;
221bdcd8170SKalle Valo 	u16 seq_no;
222bdcd8170SKalle Valo };
223bdcd8170SKalle Valo 
224bdcd8170SKalle Valo struct rxtid {
225bdcd8170SKalle Valo 	bool aggr;
226bdcd8170SKalle Valo 	bool progress;
227bdcd8170SKalle Valo 	bool timer_mon;
228bdcd8170SKalle Valo 	u16 win_sz;
229bdcd8170SKalle Valo 	u16 seq_next;
230bdcd8170SKalle Valo 	u32 hold_q_sz;
231bdcd8170SKalle Valo 	struct skb_hold_q *hold_q;
232bdcd8170SKalle Valo 	struct sk_buff_head q;
233bdcd8170SKalle Valo 	spinlock_t lock;
234bdcd8170SKalle Valo };
235bdcd8170SKalle Valo 
236bdcd8170SKalle Valo struct rxtid_stats {
237bdcd8170SKalle Valo 	u32 num_into_aggr;
238bdcd8170SKalle Valo 	u32 num_dups;
239bdcd8170SKalle Valo 	u32 num_oow;
240bdcd8170SKalle Valo 	u32 num_mpdu;
241bdcd8170SKalle Valo 	u32 num_amsdu;
242bdcd8170SKalle Valo 	u32 num_delivered;
243bdcd8170SKalle Valo 	u32 num_timeouts;
244bdcd8170SKalle Valo 	u32 num_hole;
245bdcd8170SKalle Valo 	u32 num_bar;
246bdcd8170SKalle Valo };
247bdcd8170SKalle Valo 
2487baef812SVasanthakumar Thiagarajan struct aggr_info_conn {
249bdcd8170SKalle Valo 	u8 aggr_sz;
250bdcd8170SKalle Valo 	u8 timer_scheduled;
251bdcd8170SKalle Valo 	struct timer_list timer;
252bdcd8170SKalle Valo 	struct net_device *dev;
253bdcd8170SKalle Valo 	struct rxtid rx_tid[NUM_OF_TIDS];
254bdcd8170SKalle Valo 	struct rxtid_stats stat[NUM_OF_TIDS];
2557baef812SVasanthakumar Thiagarajan 	struct aggr_info *aggr_info;
2567baef812SVasanthakumar Thiagarajan };
2577baef812SVasanthakumar Thiagarajan 
2587baef812SVasanthakumar Thiagarajan struct aggr_info {
2597baef812SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn;
2607baef812SVasanthakumar Thiagarajan 	struct sk_buff_head rx_amsdu_freeq;
261bdcd8170SKalle Valo };
262bdcd8170SKalle Valo 
263bdcd8170SKalle Valo struct ath6kl_wep_key {
264bdcd8170SKalle Valo 	u8 key_index;
265bdcd8170SKalle Valo 	u8 key_len;
266bdcd8170SKalle Valo 	u8 key[64];
267bdcd8170SKalle Valo };
268bdcd8170SKalle Valo 
269bdcd8170SKalle Valo #define ATH6KL_KEY_SEQ_LEN 8
270bdcd8170SKalle Valo 
271bdcd8170SKalle Valo struct ath6kl_key {
272bdcd8170SKalle Valo 	u8 key[WLAN_MAX_KEY_LEN];
273bdcd8170SKalle Valo 	u8 key_len;
274bdcd8170SKalle Valo 	u8 seq[ATH6KL_KEY_SEQ_LEN];
275bdcd8170SKalle Valo 	u8 seq_len;
276bdcd8170SKalle Valo 	u32 cipher;
277bdcd8170SKalle Valo };
278bdcd8170SKalle Valo 
279bdcd8170SKalle Valo struct ath6kl_node_mapping {
280bdcd8170SKalle Valo 	u8 mac_addr[ETH_ALEN];
281bdcd8170SKalle Valo 	u8 ep_id;
282bdcd8170SKalle Valo 	u8 tx_pend;
283bdcd8170SKalle Valo };
284bdcd8170SKalle Valo 
285bdcd8170SKalle Valo struct ath6kl_cookie {
286bdcd8170SKalle Valo 	struct sk_buff *skb;
287bdcd8170SKalle Valo 	u32 map_no;
288bdcd8170SKalle Valo 	struct htc_packet htc_pkt;
289bdcd8170SKalle Valo 	struct ath6kl_cookie *arc_list_next;
290bdcd8170SKalle Valo };
291bdcd8170SKalle Valo 
292d0ff7383SNaveen Gangadharan struct ath6kl_mgmt_buff {
293d0ff7383SNaveen Gangadharan 	struct list_head list;
294d0ff7383SNaveen Gangadharan 	u32 freq;
295d0ff7383SNaveen Gangadharan 	u32 wait;
296d0ff7383SNaveen Gangadharan 	u32 id;
297d0ff7383SNaveen Gangadharan 	bool no_cck;
298d0ff7383SNaveen Gangadharan 	size_t len;
299d0ff7383SNaveen Gangadharan 	u8 buf[0];
300d0ff7383SNaveen Gangadharan };
301d0ff7383SNaveen Gangadharan 
302bdcd8170SKalle Valo struct ath6kl_sta {
303bdcd8170SKalle Valo 	u16 sta_flags;
304bdcd8170SKalle Valo 	u8 mac[ETH_ALEN];
305bdcd8170SKalle Valo 	u8 aid;
306bdcd8170SKalle Valo 	u8 keymgmt;
307bdcd8170SKalle Valo 	u8 ucipher;
308bdcd8170SKalle Valo 	u8 auth;
309bdcd8170SKalle Valo 	u8 wpa_ie[ATH6KL_MAX_IE];
310bdcd8170SKalle Valo 	struct sk_buff_head psq;
311bdcd8170SKalle Valo 	spinlock_t psq_lock;
312d0ff7383SNaveen Gangadharan 	struct list_head mgmt_psq;
313d0ff7383SNaveen Gangadharan 	size_t mgmt_psq_len;
314c1762a3fSThirumalai Pachamuthu 	u8 apsd_info;
315c1762a3fSThirumalai Pachamuthu 	struct sk_buff_head apsdq;
3161d2a4456SVasanthakumar Thiagarajan 	struct aggr_info_conn *aggr_conn;
317bdcd8170SKalle Valo };
318bdcd8170SKalle Valo 
319bdcd8170SKalle Valo struct ath6kl_version {
320bdcd8170SKalle Valo 	u32 target_ver;
321bdcd8170SKalle Valo 	u32 wlan_ver;
322bdcd8170SKalle Valo 	u32 abi_ver;
323bdcd8170SKalle Valo };
324bdcd8170SKalle Valo 
325bdcd8170SKalle Valo struct ath6kl_bmi {
326bdcd8170SKalle Valo 	u32 cmd_credits;
327bdcd8170SKalle Valo 	bool done_sent;
328bdcd8170SKalle Valo 	u8 *cmd_buf;
3291f4c894dSKalle Valo 	u32 max_data_size;
3301f4c894dSKalle Valo 	u32 max_cmd_size;
331bdcd8170SKalle Valo };
332bdcd8170SKalle Valo 
333bdcd8170SKalle Valo struct target_stats {
334bdcd8170SKalle Valo 	u64 tx_pkt;
335bdcd8170SKalle Valo 	u64 tx_byte;
336bdcd8170SKalle Valo 	u64 tx_ucast_pkt;
337bdcd8170SKalle Valo 	u64 tx_ucast_byte;
338bdcd8170SKalle Valo 	u64 tx_mcast_pkt;
339bdcd8170SKalle Valo 	u64 tx_mcast_byte;
340bdcd8170SKalle Valo 	u64 tx_bcast_pkt;
341bdcd8170SKalle Valo 	u64 tx_bcast_byte;
342bdcd8170SKalle Valo 	u64 tx_rts_success_cnt;
343bdcd8170SKalle Valo 	u64 tx_pkt_per_ac[4];
344bdcd8170SKalle Valo 
345bdcd8170SKalle Valo 	u64 tx_err;
346bdcd8170SKalle Valo 	u64 tx_fail_cnt;
347bdcd8170SKalle Valo 	u64 tx_retry_cnt;
348bdcd8170SKalle Valo 	u64 tx_mult_retry_cnt;
349bdcd8170SKalle Valo 	u64 tx_rts_fail_cnt;
350bdcd8170SKalle Valo 
351bdcd8170SKalle Valo 	u64 rx_pkt;
352bdcd8170SKalle Valo 	u64 rx_byte;
353bdcd8170SKalle Valo 	u64 rx_ucast_pkt;
354bdcd8170SKalle Valo 	u64 rx_ucast_byte;
355bdcd8170SKalle Valo 	u64 rx_mcast_pkt;
356bdcd8170SKalle Valo 	u64 rx_mcast_byte;
357bdcd8170SKalle Valo 	u64 rx_bcast_pkt;
358bdcd8170SKalle Valo 	u64 rx_bcast_byte;
359bdcd8170SKalle Valo 	u64 rx_frgment_pkt;
360bdcd8170SKalle Valo 
361bdcd8170SKalle Valo 	u64 rx_err;
362bdcd8170SKalle Valo 	u64 rx_crc_err;
363bdcd8170SKalle Valo 	u64 rx_key_cache_miss;
364bdcd8170SKalle Valo 	u64 rx_decrypt_err;
365bdcd8170SKalle Valo 	u64 rx_dupl_frame;
366bdcd8170SKalle Valo 
367bdcd8170SKalle Valo 	u64 tkip_local_mic_fail;
368bdcd8170SKalle Valo 	u64 tkip_cnter_measures_invoked;
369bdcd8170SKalle Valo 	u64 tkip_replays;
370bdcd8170SKalle Valo 	u64 tkip_fmt_err;
371bdcd8170SKalle Valo 	u64 ccmp_fmt_err;
372bdcd8170SKalle Valo 	u64 ccmp_replays;
373bdcd8170SKalle Valo 
374bdcd8170SKalle Valo 	u64 pwr_save_fail_cnt;
375bdcd8170SKalle Valo 
376bdcd8170SKalle Valo 	u64 cs_bmiss_cnt;
377bdcd8170SKalle Valo 	u64 cs_low_rssi_cnt;
378bdcd8170SKalle Valo 	u64 cs_connect_cnt;
379bdcd8170SKalle Valo 	u64 cs_discon_cnt;
380bdcd8170SKalle Valo 
381bdcd8170SKalle Valo 	s32 tx_ucast_rate;
382bdcd8170SKalle Valo 	s32 rx_ucast_rate;
383bdcd8170SKalle Valo 
384bdcd8170SKalle Valo 	u32 lq_val;
385bdcd8170SKalle Valo 
386bdcd8170SKalle Valo 	u32 wow_pkt_dropped;
387bdcd8170SKalle Valo 	u16 wow_evt_discarded;
388bdcd8170SKalle Valo 
389bdcd8170SKalle Valo 	s16 noise_floor_calib;
390bdcd8170SKalle Valo 	s16 cs_rssi;
391bdcd8170SKalle Valo 	s16 cs_ave_beacon_rssi;
392bdcd8170SKalle Valo 	u8 cs_ave_beacon_snr;
393bdcd8170SKalle Valo 	u8 cs_last_roam_msec;
394bdcd8170SKalle Valo 	u8 cs_snr;
395bdcd8170SKalle Valo 
396bdcd8170SKalle Valo 	u8 wow_host_pkt_wakeups;
397bdcd8170SKalle Valo 	u8 wow_host_evt_wakeups;
398bdcd8170SKalle Valo 
399bdcd8170SKalle Valo 	u32 arp_received;
400bdcd8170SKalle Valo 	u32 arp_matched;
401bdcd8170SKalle Valo 	u32 arp_replied;
402bdcd8170SKalle Valo };
403bdcd8170SKalle Valo 
404bdcd8170SKalle Valo struct ath6kl_mbox_info {
405bdcd8170SKalle Valo 	u32 htc_addr;
406bdcd8170SKalle Valo 	u32 htc_ext_addr;
407bdcd8170SKalle Valo 	u32 htc_ext_sz;
408bdcd8170SKalle Valo 
409bdcd8170SKalle Valo 	u32 block_size;
410bdcd8170SKalle Valo 
411bdcd8170SKalle Valo 	u32 gmbox_addr;
412bdcd8170SKalle Valo 
413bdcd8170SKalle Valo 	u32 gmbox_sz;
414bdcd8170SKalle Valo };
415bdcd8170SKalle Valo 
416bdcd8170SKalle Valo /*
417bdcd8170SKalle Valo  * 802.11i defines an extended IV for use with non-WEP ciphers.
418bdcd8170SKalle Valo  * When the EXTIV bit is set in the key id byte an additional
419bdcd8170SKalle Valo  * 4 bytes immediately follow the IV for TKIP.  For CCMP the
420bdcd8170SKalle Valo  * EXTIV bit is likewise set but the 8 bytes represent the
421bdcd8170SKalle Valo  * CCMP header rather than IV+extended-IV.
422bdcd8170SKalle Valo  */
423bdcd8170SKalle Valo 
424bdcd8170SKalle Valo #define ATH6KL_KEYBUF_SIZE 16
425bdcd8170SKalle Valo #define ATH6KL_MICBUF_SIZE (8+8)	/* space for both tx and rx */
426bdcd8170SKalle Valo 
427bdcd8170SKalle Valo #define ATH6KL_KEY_XMIT  0x01
428bdcd8170SKalle Valo #define ATH6KL_KEY_RECV  0x02
429bdcd8170SKalle Valo #define ATH6KL_KEY_DEFAULT   0x80	/* default xmit key */
430bdcd8170SKalle Valo 
4319a5b1318SJouni Malinen /* Initial group key for AP mode */
432bdcd8170SKalle Valo struct ath6kl_req_key {
4339a5b1318SJouni Malinen 	bool valid;
4349a5b1318SJouni Malinen 	u8 key_index;
4359a5b1318SJouni Malinen 	int key_type;
4369a5b1318SJouni Malinen 	u8 key[WLAN_MAX_KEY_LEN];
4379a5b1318SJouni Malinen 	u8 key_len;
438bdcd8170SKalle Valo };
439bdcd8170SKalle Valo 
44077eab1e9SKalle Valo enum ath6kl_hif_type {
44177eab1e9SKalle Valo 	ATH6KL_HIF_TYPE_SDIO,
44277eab1e9SKalle Valo 	ATH6KL_HIF_TYPE_USB,
44377eab1e9SKalle Valo };
44477eab1e9SKalle Valo 
44580abaf9bSVasanthakumar Thiagarajan /* Max number of filters that hw supports */
44680abaf9bSVasanthakumar Thiagarajan #define ATH6K_MAX_MC_FILTERS_PER_LIST 7
44780abaf9bSVasanthakumar Thiagarajan struct ath6kl_mc_filter {
44880abaf9bSVasanthakumar Thiagarajan 	struct list_head list;
44980abaf9bSVasanthakumar Thiagarajan 	char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE];
45080abaf9bSVasanthakumar Thiagarajan };
45180abaf9bSVasanthakumar Thiagarajan 
45271f96ee6SKalle Valo /*
45371f96ee6SKalle Valo  * Driver's maximum limit, note that some firmwares support only one vif
45471f96ee6SKalle Valo  * and the runtime (current) limit must be checked from ar->vif_max.
45571f96ee6SKalle Valo  */
456b64de356SVasanthakumar Thiagarajan #define ATH6KL_VIF_MAX	3
457334234b5SVasanthakumar Thiagarajan 
45859c98449SVasanthakumar Thiagarajan /* vif flags info */
45959c98449SVasanthakumar Thiagarajan enum ath6kl_vif_state {
46059c98449SVasanthakumar Thiagarajan 	CONNECTED,
46159c98449SVasanthakumar Thiagarajan 	CONNECT_PEND,
46259c98449SVasanthakumar Thiagarajan 	WMM_ENABLED,
46359c98449SVasanthakumar Thiagarajan 	NETQ_STOPPED,
46459c98449SVasanthakumar Thiagarajan 	DTIM_EXPIRED,
46559c98449SVasanthakumar Thiagarajan 	NETDEV_REGISTERED,
46659c98449SVasanthakumar Thiagarajan 	CLEAR_BSSFILTER_ON_BEACON,
46759c98449SVasanthakumar Thiagarajan 	DTIM_PERIOD_AVAIL,
46859c98449SVasanthakumar Thiagarajan 	WLAN_ENABLED,
469b95907a7SVasanthakumar Thiagarajan 	STATS_UPDATE_PEND,
470081c7a84SRaja Mani 	HOST_SLEEP_MODE_CMD_PROCESSED,
47159c98449SVasanthakumar Thiagarajan };
47259c98449SVasanthakumar Thiagarajan 
473108438bcSVasanthakumar Thiagarajan struct ath6kl_vif {
474990bd915SVasanthakumar Thiagarajan 	struct list_head list;
475108438bcSVasanthakumar Thiagarajan 	struct wireless_dev wdev;
476108438bcSVasanthakumar Thiagarajan 	struct net_device *ndev;
477108438bcSVasanthakumar Thiagarajan 	struct ath6kl *ar;
478478ac027SVasanthakumar Thiagarajan 	/* Lock to protect vif specific net_stats and flags */
479478ac027SVasanthakumar Thiagarajan 	spinlock_t if_lock;
480334234b5SVasanthakumar Thiagarajan 	u8 fw_vif_idx;
48159c98449SVasanthakumar Thiagarajan 	unsigned long flags;
4823450334fSVasanthakumar Thiagarajan 	int ssid_len;
4833450334fSVasanthakumar Thiagarajan 	u8 ssid[IEEE80211_MAX_SSID_LEN];
4843450334fSVasanthakumar Thiagarajan 	u8 dot11_auth_mode;
4853450334fSVasanthakumar Thiagarajan 	u8 auth_mode;
4863450334fSVasanthakumar Thiagarajan 	u8 prwise_crypto;
4873450334fSVasanthakumar Thiagarajan 	u8 prwise_crypto_len;
4883450334fSVasanthakumar Thiagarajan 	u8 grp_crypto;
4893450334fSVasanthakumar Thiagarajan 	u8 grp_crypto_len;
4903450334fSVasanthakumar Thiagarajan 	u8 def_txkey_index;
491f5938f24SVasanthakumar Thiagarajan 	u8 next_mode;
492f5938f24SVasanthakumar Thiagarajan 	u8 nw_type;
4938c8b65e3SVasanthakumar Thiagarajan 	u8 bssid[ETH_ALEN];
4948c8b65e3SVasanthakumar Thiagarajan 	u8 req_bssid[ETH_ALEN];
495f74bac54SVasanthakumar Thiagarajan 	u16 ch_hint;
496f74bac54SVasanthakumar Thiagarajan 	u16 bss_ch;
4976f2a73f9SVasanthakumar Thiagarajan 	struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1];
4986f2a73f9SVasanthakumar Thiagarajan 	struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1];
4992132c69cSVasanthakumar Thiagarajan 	struct aggr_info *aggr_cntxt;
50010509f90SKalle Valo 
501de3ad713SVasanthakumar Thiagarajan 	struct timer_list disconnect_timer;
50210509f90SKalle Valo 	struct timer_list sched_scan_timer;
50310509f90SKalle Valo 
50414ee6f6bSVasanthakumar Thiagarajan 	struct cfg80211_scan_request *scan_req;
50514ee6f6bSVasanthakumar Thiagarajan 	enum sme_state sme_state;
506cf5333d7SVasanthakumar Thiagarajan 	int reconnect_flag;
5071052261eSJouni Malinen 	u32 last_roc_id;
5081052261eSJouni Malinen 	u32 last_cancel_roc_id;
509cf5333d7SVasanthakumar Thiagarajan 	u32 send_action_id;
510cf5333d7SVasanthakumar Thiagarajan 	bool probe_req_report;
511cf5333d7SVasanthakumar Thiagarajan 	u16 next_chan;
512cf5333d7SVasanthakumar Thiagarajan 	u16 assoc_bss_beacon_int;
513cf5333d7SVasanthakumar Thiagarajan 	u8 assoc_bss_dtim_period;
514b95907a7SVasanthakumar Thiagarajan 	struct net_device_stats net_stats;
515b95907a7SVasanthakumar Thiagarajan 	struct target_stats target_stats;
51680abaf9bSVasanthakumar Thiagarajan 
51780abaf9bSVasanthakumar Thiagarajan 	struct list_head mc_filter;
518108438bcSVasanthakumar Thiagarajan };
519108438bcSVasanthakumar Thiagarajan 
5206cb3c714SRaja Mani #define WOW_LIST_ID		0
5216cb3c714SRaja Mani #define WOW_HOST_REQ_DELAY	500 /* ms */
5226cb3c714SRaja Mani 
52310509f90SKalle Valo #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */
52410509f90SKalle Valo 
525bdcd8170SKalle Valo /* Flag info */
52659c98449SVasanthakumar Thiagarajan enum ath6kl_dev_state {
52759c98449SVasanthakumar Thiagarajan 	WMI_ENABLED,
52859c98449SVasanthakumar Thiagarajan 	WMI_READY,
52959c98449SVasanthakumar Thiagarajan 	WMI_CTRL_EP_FULL,
53059c98449SVasanthakumar Thiagarajan 	TESTMODE,
53159c98449SVasanthakumar Thiagarajan 	DESTROY_IN_PROGRESS,
53259c98449SVasanthakumar Thiagarajan 	SKIP_SCAN,
53359c98449SVasanthakumar Thiagarajan 	ROAM_TBL_PEND,
5345fe4dffbSKalle Valo 	FIRST_BOOT,
53559c98449SVasanthakumar Thiagarajan };
536bdcd8170SKalle Valo 
53776a9fbe2SKalle Valo enum ath6kl_state {
53876a9fbe2SKalle Valo 	ATH6KL_STATE_OFF,
53976a9fbe2SKalle Valo 	ATH6KL_STATE_ON,
54076a9fbe2SKalle Valo 	ATH6KL_STATE_DEEPSLEEP,
541b4b2a0b1SKalle Valo 	ATH6KL_STATE_CUTPOWER,
542dd6c0c63SRaja Mani 	ATH6KL_STATE_WOW,
54310509f90SKalle Valo 	ATH6KL_STATE_SCHED_SCAN,
54476a9fbe2SKalle Valo };
54576a9fbe2SKalle Valo 
546bdcd8170SKalle Valo struct ath6kl {
547bdcd8170SKalle Valo 	struct device *dev;
548be98e3a4SVasanthakumar Thiagarajan 	struct wiphy *wiphy;
54976a9fbe2SKalle Valo 
55076a9fbe2SKalle Valo 	enum ath6kl_state state;
5515f1127ffSKalle Valo 	unsigned int testmode;
55276a9fbe2SKalle Valo 
553bdcd8170SKalle Valo 	struct ath6kl_bmi bmi;
554bdcd8170SKalle Valo 	const struct ath6kl_hif_ops *hif_ops;
555bdcd8170SKalle Valo 	struct wmi *wmi;
556bdcd8170SKalle Valo 	int tx_pending[ENDPOINT_MAX];
557bdcd8170SKalle Valo 	int total_tx_data_pend;
558bdcd8170SKalle Valo 	struct htc_target *htc_target;
55977eab1e9SKalle Valo 	enum ath6kl_hif_type hif_type;
560bdcd8170SKalle Valo 	void *hif_priv;
561990bd915SVasanthakumar Thiagarajan 	struct list_head vif_list;
562990bd915SVasanthakumar Thiagarajan 	/* Lock to avoid race in vif_list entries among add/del/traverse */
563990bd915SVasanthakumar Thiagarajan 	spinlock_t list_lock;
56455055976SVasanthakumar Thiagarajan 	u8 num_vif;
565368b1b0fSKalle Valo 	unsigned int vif_max;
5663226f68aSVasanthakumar Thiagarajan 	u8 max_norm_iface;
56755055976SVasanthakumar Thiagarajan 	u8 avail_idx_map;
568bdcd8170SKalle Valo 	spinlock_t lock;
569bdcd8170SKalle Valo 	struct semaphore sem;
570bdcd8170SKalle Valo 	u16 listen_intvl_b;
571e5090444SVivek Natarajan 	u8 lrssi_roam_threshold;
572bdcd8170SKalle Valo 	struct ath6kl_version version;
573bdcd8170SKalle Valo 	u32 target_type;
574bdcd8170SKalle Valo 	u8 tx_pwr;
575bdcd8170SKalle Valo 	struct ath6kl_node_mapping node_map[MAX_NODE_NUM];
576bdcd8170SKalle Valo 	u8 ibss_ps_enable;
57755055976SVasanthakumar Thiagarajan 	bool ibss_if_active;
578bdcd8170SKalle Valo 	u8 node_num;
579bdcd8170SKalle Valo 	u8 next_ep_id;
580bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie_list;
581bdcd8170SKalle Valo 	u32 cookie_count;
582bdcd8170SKalle Valo 	enum htc_endpoint_id ac2ep_map[WMM_NUM_AC];
583bdcd8170SKalle Valo 	bool ac_stream_active[WMM_NUM_AC];
584bdcd8170SKalle Valo 	u8 ac_stream_pri_map[WMM_NUM_AC];
585bdcd8170SKalle Valo 	u8 hiac_stream_active_pri;
586bdcd8170SKalle Valo 	u8 ep2ac_map[ENDPOINT_MAX];
587bdcd8170SKalle Valo 	enum htc_endpoint_id ctrl_ep;
5883c370398SKalle Valo 	struct ath6kl_htc_credit_info credit_state_info;
589bdcd8170SKalle Valo 	u32 connect_ctrl_flags;
590bdcd8170SKalle Valo 	u32 user_key_ctrl;
591bdcd8170SKalle Valo 	u8 usr_bss_filter;
592bdcd8170SKalle Valo 	struct ath6kl_sta sta_list[AP_MAX_NUM_STA];
593bdcd8170SKalle Valo 	u8 sta_list_index;
594bdcd8170SKalle Valo 	struct ath6kl_req_key ap_mode_bkey;
595bdcd8170SKalle Valo 	struct sk_buff_head mcastpsq;
596bdcd8170SKalle Valo 	spinlock_t mcastpsq_lock;
597bdcd8170SKalle Valo 	u8 intra_bss;
598bdcd8170SKalle Valo 	struct wmi_ap_mode_stat ap_stats;
599bdcd8170SKalle Valo 	u8 ap_country_code[3];
600bdcd8170SKalle Valo 	struct list_head amsdu_rx_buffer_queue;
601bdcd8170SKalle Valo 	u8 rx_meta_ver;
602bdcd8170SKalle Valo 	enum wlan_low_pwr_state wlan_pwr_state;
603d66ea4f9SVasanthakumar Thiagarajan 	u8 mac_addr[ETH_ALEN];
604bdcd8170SKalle Valo #define AR_MCAST_FILTER_MAC_ADDR_SIZE  4
605003353b0SKalle Valo 	struct {
606003353b0SKalle Valo 		void *rx_report;
607003353b0SKalle Valo 		size_t rx_report_len;
608003353b0SKalle Valo 	} tm;
609003353b0SKalle Valo 
610856f4b31SKalle Valo 	struct ath6kl_hw {
611856f4b31SKalle Valo 		u32 id;
612293badf4SKalle Valo 		const char *name;
613a01ac414SKalle Valo 		u32 dataset_patch_addr;
614a01ac414SKalle Valo 		u32 app_load_addr;
615a01ac414SKalle Valo 		u32 app_start_override_addr;
616991b27eaSKalle Valo 		u32 board_ext_data_addr;
617991b27eaSKalle Valo 		u32 reserved_ram_size;
6180d4d72bfSKalle Valo 		u32 board_addr;
61939586bf2SRyan Hsu 		u32 refclk_hz;
62039586bf2SRyan Hsu 		u32 uarttx_pin;
621cd23c1c9SAlex Yang 		u32 testscript_addr;
622d1a9421dSKalle Valo 
623c0038972SKalle Valo 		struct ath6kl_hw_fw {
624c0038972SKalle Valo 			const char *dir;
625c0038972SKalle Valo 			const char *otp;
626d1a9421dSKalle Valo 			const char *fw;
627c0038972SKalle Valo 			const char *tcmd;
628c0038972SKalle Valo 			const char *patch;
629cd23c1c9SAlex Yang 			const char *utf;
630cd23c1c9SAlex Yang 			const char *testscript;
631c0038972SKalle Valo 		} fw;
632c0038972SKalle Valo 
633d1a9421dSKalle Valo 		const char *fw_board;
634d1a9421dSKalle Valo 		const char *fw_default_board;
635a01ac414SKalle Valo 	} hw;
636a01ac414SKalle Valo 
637bdcd8170SKalle Valo 	u16 conf_flags;
638e390af77SRaja Mani 	u16 suspend_mode;
639bdcd8170SKalle Valo 	wait_queue_head_t event_wq;
640bdcd8170SKalle Valo 	struct ath6kl_mbox_info mbox_info;
641bdcd8170SKalle Valo 
642bdcd8170SKalle Valo 	struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM];
643bdcd8170SKalle Valo 	unsigned long flag;
644bdcd8170SKalle Valo 
645bdcd8170SKalle Valo 	u8 *fw_board;
646bdcd8170SKalle Valo 	size_t fw_board_len;
647bdcd8170SKalle Valo 
648bdcd8170SKalle Valo 	u8 *fw_otp;
649bdcd8170SKalle Valo 	size_t fw_otp_len;
650bdcd8170SKalle Valo 
651bdcd8170SKalle Valo 	u8 *fw;
652bdcd8170SKalle Valo 	size_t fw_len;
653bdcd8170SKalle Valo 
654bdcd8170SKalle Valo 	u8 *fw_patch;
655bdcd8170SKalle Valo 	size_t fw_patch_len;
656bdcd8170SKalle Valo 
657cd23c1c9SAlex Yang 	u8 *fw_testscript;
658cd23c1c9SAlex Yang 	size_t fw_testscript_len;
659cd23c1c9SAlex Yang 
66065a8b4ccSKalle Valo 	unsigned int fw_api;
66197e0496dSKalle Valo 	unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN];
66297e0496dSKalle Valo 
663bdcd8170SKalle Valo 	struct workqueue_struct *ath6kl_wq;
6647c3075e9SVasanthakumar Thiagarajan 
665d999ba3eSVasanthakumar Thiagarajan 	struct dentry *debugfs_phy;
6666a7c9badSJouni Malinen 
6676bbc7c35SJouni Malinen 	bool p2p;
6686bbc7c35SJouni Malinen 
669bdf5396bSKalle Valo #ifdef CONFIG_ATH6KL_DEBUG
670bdf5396bSKalle Valo 	struct {
6719b9a4f2aSKalle Valo 		struct sk_buff_head fwlog_queue;
672c807b30dSKalle Valo 		struct completion fwlog_completion;
673c807b30dSKalle Valo 		bool fwlog_open;
674c807b30dSKalle Valo 
675939f1cceSKalle Valo 		u32 fwlog_mask;
6769b9a4f2aSKalle Valo 
67791d57de5SVasanthakumar Thiagarajan 		unsigned int dbgfs_diag_reg;
678252c068bSVasanthakumar Thiagarajan 		u32 diag_reg_addr_wr;
679252c068bSVasanthakumar Thiagarajan 		u32 diag_reg_val_wr;
6809a730834SKalle Valo 
6819a730834SKalle Valo 		struct {
6829a730834SKalle Valo 			unsigned int invalid_rate;
6839a730834SKalle Valo 		} war_stats;
6844b28a80dSJouni Malinen 
6854b28a80dSJouni Malinen 		u8 *roam_tbl;
6864b28a80dSJouni Malinen 		unsigned int roam_tbl_len;
687ff0b0075SJouni Malinen 
688ff0b0075SJouni Malinen 		u8 keepalive;
689ff0b0075SJouni Malinen 		u8 disc_timeout;
690bdf5396bSKalle Valo 	} debug;
691bdf5396bSKalle Valo #endif /* CONFIG_ATH6KL_DEBUG */
692bdcd8170SKalle Valo };
693bdcd8170SKalle Valo 
694d6d5c06cSKalle Valo static inline struct ath6kl *ath6kl_priv(struct net_device *dev)
695bdcd8170SKalle Valo {
696108438bcSVasanthakumar Thiagarajan 	return ((struct ath6kl_vif *) netdev_priv(dev))->ar;
697bdcd8170SKalle Valo }
698bdcd8170SKalle Valo 
699bc07ddb2SKalle Valo static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
700bc07ddb2SKalle Valo 					  u32 item_offset)
701bc07ddb2SKalle Valo {
702bc07ddb2SKalle Valo 	u32 addr = 0;
703bc07ddb2SKalle Valo 
704bc07ddb2SKalle Valo 	if (ar->target_type == TARGET_TYPE_AR6003)
705bc07ddb2SKalle Valo 		addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
706bc07ddb2SKalle Valo 	else if (ar->target_type == TARGET_TYPE_AR6004)
707bc07ddb2SKalle Valo 		addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
708bc07ddb2SKalle Valo 
709bc07ddb2SKalle Valo 	return addr;
710bc07ddb2SKalle Valo }
711bc07ddb2SKalle Valo 
712bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar);
713bdcd8170SKalle Valo void ath6kl_detect_error(unsigned long ptr);
714bdcd8170SKalle Valo void disconnect_timer_handler(unsigned long ptr);
715bdcd8170SKalle Valo void init_netdev(struct net_device *dev);
716bdcd8170SKalle Valo void ath6kl_cookie_init(struct ath6kl *ar);
717bdcd8170SKalle Valo void ath6kl_cookie_cleanup(struct ath6kl *ar);
718bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet);
719bdcd8170SKalle Valo void ath6kl_tx_complete(void *context, struct list_head *packet_queue);
720bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
721bdcd8170SKalle Valo 					       struct htc_packet *packet);
722bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar);
723bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar);
724f9ea0753SVasanthakumar Thiagarajan int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value);
725addb44beSKalle Valo int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length);
726addb44beSKalle Valo int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value);
727addb44beSKalle Valo int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length);
728bc07ddb2SKalle Valo int ath6kl_read_fwlogs(struct ath6kl *ar);
729e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif);
730bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar);
731bdcd8170SKalle Valo 
732bdcd8170SKalle Valo struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar);
733bdcd8170SKalle Valo void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie);
734bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev);
735bdcd8170SKalle Valo 
7367baef812SVasanthakumar Thiagarajan struct aggr_info *aggr_init(struct ath6kl_vif *vif);
737c8651541SVasanthakumar Thiagarajan void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info,
738c8651541SVasanthakumar Thiagarajan 		    struct aggr_info_conn *aggr_conn);
739bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target,
740bdcd8170SKalle Valo 		      enum htc_endpoint_id endpoint);
741bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count);
742bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
743bdcd8170SKalle Valo 					    enum htc_endpoint_id endpoint,
744bdcd8170SKalle Valo 					    int len);
745bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info);
7461d2a4456SVasanthakumar Thiagarajan void aggr_reset_state(struct aggr_info_conn *aggr_conn);
747bdcd8170SKalle Valo 
7486765d0aaSVasanthakumar Thiagarajan struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 * node_addr);
749bdcd8170SKalle Valo struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid);
750bdcd8170SKalle Valo 
751bdcd8170SKalle Valo void ath6kl_ready_event(void *devt, u8 * datap, u32 sw_ver, u32 abi_ver);
752bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb,
753bdcd8170SKalle Valo 		      enum htc_endpoint_id eid);
754240d2799SVasanthakumar Thiagarajan void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel,
755bdcd8170SKalle Valo 			  u8 *bssid, u16 listen_int,
756bdcd8170SKalle Valo 			  u16 beacon_int, enum network_type net_type,
757bdcd8170SKalle Valo 			  u8 beacon_ie_len, u8 assoc_req_len,
758bdcd8170SKalle Valo 			  u8 assoc_resp_len, u8 *assoc_info);
759240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel);
760240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr,
761572e27c0SJouni Malinen 				u8 keymgmt, u8 ucipher, u8 auth,
762c1762a3fSThirumalai Pachamuthu 				u8 assoc_req_len, u8 *assoc_info, u8 apsd_info);
763240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason,
764bdcd8170SKalle Valo 			     u8 *bssid, u8 assoc_resp_len,
765bdcd8170SKalle Valo 			     u8 *assoc_info, u16 prot_reason_status);
766240d2799SVasanthakumar Thiagarajan void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast);
767bdcd8170SKalle Valo void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr);
768240d2799SVasanthakumar Thiagarajan void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status);
769240d2799SVasanthakumar Thiagarajan void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len);
770bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active);
771bdcd8170SKalle Valo enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac);
772bdcd8170SKalle Valo 
773240d2799SVasanthakumar Thiagarajan void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid);
774bdcd8170SKalle Valo 
775240d2799SVasanthakumar Thiagarajan void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif);
776240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect(struct ath6kl_vif *vif);
777240d2799SVasanthakumar Thiagarajan void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid);
778240d2799SVasanthakumar Thiagarajan void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no,
779bdcd8170SKalle Valo 			     u8 win_sz);
780bdcd8170SKalle Valo void ath6kl_wakeup_event(void *dev);
781bdcd8170SKalle Valo 
7826db8fa53SVasanthakumar Thiagarajan void ath6kl_reset_device(struct ath6kl *ar, u32 target_type,
7836db8fa53SVasanthakumar Thiagarajan 			 bool wait_fot_compltn, bool cold_reset);
784e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif);
785990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar);
78655055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready);
7875fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar);
7885fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar);
78945eaa78fSKalle Valo int ath6kl_init_fetch_firmwares(struct ath6kl *ar);
79045eaa78fSKalle Valo int ath6kl_init_hw_params(struct ath6kl *ar);
79145eaa78fSKalle Valo 
792a918fb3cSRaja Mani void ath6kl_check_wow_status(struct ath6kl *ar);
7935fe4dffbSKalle Valo 
79445eaa78fSKalle Valo struct ath6kl *ath6kl_core_create(struct device *dev);
79545eaa78fSKalle Valo int ath6kl_core_init(struct ath6kl *ar);
79645eaa78fSKalle Valo void ath6kl_core_cleanup(struct ath6kl *ar);
79745eaa78fSKalle Valo void ath6kl_core_destroy(struct ath6kl *ar);
79845eaa78fSKalle Valo 
799bdcd8170SKalle Valo #endif /* CORE_H */
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